MARCH 2012 IEEE MTT-V060-I03 (2012-03B) [60, 3 ed.]

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MARCH 2012

VOLUME 60

NUMBER 3

IETMAB

(ISSN 0018-9480)

PART II OF TWO PARTS

SPECIAL ISSUE ON MILLIMETER-WAVE CIRCUITS AND SYSTEMS Guest Editorial .... ......... ........ ......... ......... ........ ......... . G. M. Rebeiz, S. P. Voinigescu, and J. Papapolymerou

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PAPERS

Passive Components and Circuits A Small Package With 46-dB Isolation Between Tx and Rx Antennas Suitable for 60-GHz WPAN Module ... ......... .. .. ........ ......... ......... ........ ......... ......... ........ .... R. Suga, H. Nakano, Y. Hirachi, J. Hirokawa, and M. Ando Vertical RF Transition With Mechanical Fit for 3-D Heterogeneous Integration ......... ......... ........ ......... ......... .. .. ........ ......... ......... ........ ......... ......... ........ ......... ......... . L. Chen, J. Wood, S. Raman, and N. S. Barker Hybrid and Monolithic RF Integrated Circuits Ultrafast Low-Loss 42–70 GHz Differential SPDT Switch in 0.35 m SiGe Technology ..... ... M. Thian and V. F. Fusco Broadband Millimeter-Wave Single Balanced Mixer and Its Applications to Substrate Integrated Wireless Systems ... .. .. ........ ......... ......... ........ ......... ......... ........ ......... ......... ........ ....... Z.-Y. Zhang, Y. R. Wei, and K. Wu Design of 40–108-GHz Low-Power and High-Speed CMOS Up-/Down-Conversion Ring Mixers for Multistandard MMW Radio Applications .... ......... ......... ........ ......... ......... ........ ......... ......... ........ ........ J.-H. Tsai Low-Voltage, Wide-Locking-Range, Millimeter-Wave Divide-by-5 Injection-Locked Frequency Dividers ..... ......... .. .. ........ ......... ......... ........ ......... ......... ........ ......... M.-W. Li, P.-C. Wang, T.-H. Huang, and H.-R. Chuang Millimeter-Wave Optoelectronic Mixers Based on Uni-Traveling Carrier Photodiodes . ......... ........ ......... ......... .. .. ........ ......... ......... ........ ......... ......... ........ ......... . E. Rouvalis, M. J. Fice, C. C. Renaud, and A. J. Seeds -Band Amplifiers With 6-dB Noise Figure and Milliwatt-Level 170–200-GHz Doublers in 45-nm CMOS .. ......... .. .. ........ ......... ......... ........ ......... ......... ........ ......... . B. Cetinoneri, Y. A. Atesal, A. Fung, and G. M. Rebeiz

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(Contents Continued on Back Cover)

(Contents Continued from Front Cover) Analysis and Design of a 60 GHz Wideband Voltage-Voltage Transformer Feedback LNA ..... ........ ......... ......... .. .. ........ ......... ......... ........ ......... ......... ..... P. Sakian, E. Janssen, A. H. M. van Roermund, and R. Mahmoudi ESD Protection Design for 60-GHz LNA With Inductor-Triggered SCR in 65-nm CMOS Process ..... ......... ......... .. .. ........ ......... ......... ........ ......... ......... ........ ......... ......... ........ .... C.-Y. Lin, L.-W. Chu, and M.-D. Ker Power Amplification at 0.65 THz Using InP HEMTs .... ......... ......... ........ ......... ......... ........ ......... ......... .. .. ........ ......... ......... ........ ......... V. Radisic, K. M. K. H. Leong, X. Mei, S. Sarkozy, W. Yoshida, and W. R. Deal A 44–46-GHz 16-Element SiGe BiCMOS High-Linearity Transmit/Receive Phased Array ..... ........ ......... ......... .. .. ........ ......... ......... ........ ......... ......... ........ ......... ......... ...... C.-Y. Kim, D.-W. Kang, and G. M. Rebeiz 60-GHz Four-Element Phased-Array Transmit/Receive System-in-Package Using Phase Compensation Techniques in 65-nm Flip-Chip CMOS Process ....... ......... ........ ......... ......... ........ ......... ......... ........ ......... ......... .. .. ........ ......... ........ J.-L. Kuo, Y.-F. Lu, T.-Y. Huang, Y.-L. Chang, Y.-K. Hsieh, P.-J. Peng, I.-C. Chang, T.-C. Tsai, K.-Y. Kao, W.-Y. Hsiung, J. Wang, Y. A. Hsu, K.-Y. Lin, H.-C. Lu, Y.-C. Lin, L.-H. Lu, Y.-W. Huang, R.-B. Wu, and H. Wang An Ultra-Wideband 80 GHz FMCW Radar System Using a SiGe Bipolar Transceiver Chip Stabilized by a Fractional-N PLL Synthesizer ........ ........ ......... ......... ... ...... ......... ......... ........ ... N. Pohl, T. Jaeschke, and K. Aufinger -Band CMOS Chip Modules on Ceramic Integrated Passive Device With Transition Flip-Chip-Assembled Compensation for Millimeter-Wave System-in-Package Integration .. ........ ......... ......... ........ ......... ......... .. .. ........ ...... H.-C. Lu, C.-C. Kuo, P.-A. Lin, C.-F. Tai, Y.-L. Chang, Y.-S. Jiang, J.-H. Tsai, Y.-M. Hsin, and H. Wang An RCP Packaged Transceiver Chipset for Automotive LRR and SRR Systems in SiGe BiCMOS Technology ........ .. .. ... S. Trotta, M. Wintermantel, J. Dixon, U. Moeller, R. Jammers, T. Hauck, A. Samulak, B. Dehlink, K. Shun-Meen, H. Li, A. Ghazinour, Y. Yin, S. Pacheco, R. Reuter, S. Majied, D. Moline, T. Aaron, V. P. Trivedi, D. J. Morgan, and J. John A Fundamental Frequency 120-GHz SiGe BiCMOS Distance Sensor With Integrated Antenna ........ ......... ......... .. .. ........ ......... ......... ........ ......... ......... ........ ......... .. I. Sarkas, J. Hasch, A. Balteanu, and S. P. Voinigescu -Band Total Power Radiometer Performance Optimization in an SiGe HBT Technology ..... ........ ......... ......... .. .. ........ E. Dacquay, A. Tomkins, K. H. K. Yau, E. Laskin, P. Chevalier, A. Chantre, B. Sautreuil, and S. P. Voinigescu Instrumentation and Measurement Techniques New Method for Determining Dielectric Properties of Skin and Phantoms at Millimeter Waves Based on Heating Kinetics ......... ......... ........ ......... ......... ........ ........ N. Chahat, M. Zhadobov, R. Sauleau, and S. I. Alekseev Diffraction in mm and Sub-mm Wave Indoor Propagation Channels ..... ........ ......... ......... ........ ......... ......... .. .. ........ ......... ......... ........ ...... M. Jacob, S. Priebe, R. Dickhoff, T. Kleine-Ostmann, T. Schrader, and T. Kürner

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RF Applications and Systems Millimeter-Wave Technology for Automotive Radar Sensors in the 77 GHz Frequency Band ... ........ ......... ......... .. .. ........ ......... ......... ........ ......... .... J. Hasch, E. Topak, R. Schnabel, T. Zwick, R. Weigel, and C. Waldschmidt A Four-Channel 94-GHz SiGe-Based Digital Beamforming FMCW Radar ..... ......... ......... ........ ......... ......... .. .. ........ ......... ......... ........ ......... ......... ........ ......... .. M. Jahn, R. Feger, C. Wagner, Z. Tong, and A. Stelzer Security Pre-screening of Moving Persons Using a Rotating Multichannel -Band Radar ..... ..... .... .... S. Hantscher, B. Schlenther, M. Hägelen, S. A. Lang, H. Essen, A. Tessmann, A. Hülsmann, P. Leuther, and M. Schlechtweg 120-GHz-Band Wireless Link Technologies for Outdoor 10-Gbit/s Data Transmission . ......... .... A. Hirata, T. Kosugi, H. Takahashi, J. Takeuchi, H. Togo, M. Yaita, N. Kukutsu, K. Aihara, K. Murata, Y. Sato, T. Nagatsuma, and Y. Kado

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Information for Authors .. ........ ......... ......... ........ ......... .......... ........ ......... ......... ........ ......... ......... .

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CALLS FOR PAPERS

Special Issue on Biomedical Applications of RF/Microwave Technologies ..... ......... ......... ........ ......... ......... .

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Digital Object Identifier 10.1109/TMTT.2012.2188758

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Guest Editorial

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HIS TRANSACTIONS’ Special Issue covers the latest research in millimeter-wave circuits and systems with emphasis on silicon and III–V integrated circuits and their use in state-of-the-art communication, radar, and imaging systems. This is made possible by tremendous advances in InP HEMTs and silicon transistor technologies, low-loss packaging techniques, and on-wafer antennas, which has led to a high level of complexity on a single chip or in a single package. The millimeter-wave area is now experiencing a revolution similar to what happened in the 0.8–10-GHz silicon fiber optic and RF integrated circuit (RFIC) area in the early 2000s, but unlike the RF area, it is not driven by cellular, wireless local area network (WLAN), or wireline communications, but by gigabitper-second short-range and point-to-point wireless communication systems, low-cost automotive radars, active and passive imaging systems, and terahertz scientific instruments and techniques. This TRANSACTIONS’ Special Issue presents several key developments which have contributed to this recent revolution in millimeter-wave systems. Semiconductor technologies have made remarkable progress during the past ten years with the maximum oscillation frequency of III–V field-effect transistors (FETs) and heterojunction bipolar transistors (HBTs) now exceeding 1 THz. In this respect, 30-nm gate-length InP HEMTs hold a slight advantage over InP HBTs, and have resulted in both low-noise and power amplifiers with useful gain beyond 600 GHz. The highest frequency solid-state power amplifiers, operating at 650 GHz, are reported in this Special Issue. Perhaps the most striking recent development has been the continued scaling of the cutoff frequency of digital high-performance n- and p-channel silicon MOSFETs by more than a factor of 4 between the 130–32-nm CMOS technology nodes. Somewhat ironically, while the speed of microprocessors has remained almost stagnant during this period, millimeter-wave integrated circuits (ICs), which are relatively immune to gate and subthreshold leakage, have benefited the most from silicon CMOS and SiGe HBT scaling. The measured maximum available gain and the maximum stable gain of fully wired state-of-the-art SiGe HBTs and 45-nm SOI n- and p-channel MOSFETs now exceeds 6 dB throughout the -band (110–170 GHz). For comparison, according to the 2011 ITRS Roadmap, 35-nm InP HEMTs exhibit power gain in excess of 10.5 dB at 140 GHz and 9 dB at 220 GHz, with 12-dB gain predicted at 220 GHz at the 25-nm node. It is therefore now possible to develop silicon integrated circuits at frequencies up to 200 GHz. Examples of such - and -band (140–220 GHz) circuits, in both SiGe BiCMOS and 45-nm SOI CMOS technologies, are presented in this Special Issue along with III–V chip-sets for -band imaging and 10-Gb/s point-to-point outdoor wireless communication. Despite the tremendous advancements in semiconductor technologies (both silicon and III–V’s) that allow operaDigital Object Identifier 10.1109/TMTT.2012.2183789

tion to well above 100 GHz, packaging and interconnect technologies that are necessary for millimeter-wave and sub-millimeter-wave systems have not traditionally followed the same explosive trend, and have thus, placed constraints on the use of these technologies. Recently, several groups have made significant steps in developing low-loss and relatively low-cost packaging and system integration technologies for the millimeter-wave and sub-millimeter-wave frequency range. Low-temperature co-fired ceramic (LTCC)-based, as well as multilayer organic-based (e.g., thin polymers such as liquid crystal polymer, Rogers 3003, Rogers Experimental Polymer RXP) packaging and integration platforms combined with embedded flip-chip bonding techniques now allow for less than 1-dB loss interconnects up to 110 GHz. Also, high-performance passive elements such as matching networks and planar antennas (e.g., multilayer organic high-gain Yagi–Uda arrays) can be placed together in IC packages at relatively low cost due to “large-panel” manufacturing capabilities, and with excellent mechanical characteristics such as stability versus temperature, hermeticity, and environmental protection. These two technologies have enabled the development of low-cost millimeter-wave systems-on-package (SoPs) with excellent millimeter-wave and packaging performance simultaneously. In addition, the redistributed chip package (RCP) technology, also known as redistribution layers (RDLs), which uses several 5–10- m-thick dielectric layers such as BCB and polyimide directly on silicon RFICs for interconnections, as well as passive element embedding, and connects to RF/dc boards using ball grid arrays (BGAs), has made significant advances with good performance up to 94 GHz. As the feature size of these packaging technologies shrinks to less than 30 m, while still maintaining low RF loss capability and good mechanical properties, the production of low-cost millimeter-wave systems and sensors with silicon and III–V electronics will become a reality. The largest number of integrated circuits presented in this Special Issue target the promising commercial markets below 100 GHz. Several papers discuss SiGe BiCMOS automotive radar transceivers and beamforming arrays at 77 and 94 GHz, while quite a few others focus on propagation, electrostatic discharge (ESD), and packaging solutions for 60- and 94-GHz radio transceivers. Other papers showing a high degree of complexity describe a 16-element transmit-receive phased array at 44–46 GHz for satellite and point-to-point communications, a four-element transmit and receive 60-GHz phased-array chip-set together with flip-chip packaging, and an InP -band imaging platform. There is no doubt that silicon and III–V technologies are ready for high-volume production even at 100 GHz. Currently, there are more than 2.5-million 24-GHz short-range automotive radars and more than a half-million 77-GHz long-range automotive radars being shipped per year (mostly based on SiGe HBT or BiCMOS technology) and with volumes increasing

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every year at a high rate. Each of these chips contains 2–4 transmit–receive channels, features wide-angle digital beamforming capabilities, and is saving lives every single day. SiGe BiCMOS, CMOS, and InP HEMT and HBT technologies are also used extensively in 40/100-Gb/s serializers-deserializers, ADCs, DACs, modulator drivers, and transimpedance amplifiers for the fiber-optic network, which, once again, is growing at a very fast rate due to the explosion of mobile data traffic. As is well known from numerous publications, there is currently a large development effort at several companies in 60-GHz Gb/s point-to-point data networks and mostly based on CMOS, with one product already available in stores since 2010. However, the low-cost commercialization of CMOS, SiGe, and III–V chips at 94 and 120 GHz and above has remained elusive since, until now, there have been no high-volume products at these frequencies, and the present low-volume imaging and defense needs are being fulfilled by InP and advanced SiGe BiCMOS technologies. Still, what this TRANSACTIONS’ Special Issue shows is that these technologies, together with the associated antenna integration and packaging techniques, are becoming ready for use at 100 GHz and above, and it is now up to the market to decide how to use them best.

ACKNOWLEDGMENT Special thanks are due to the reviewers for lending their time and expertise to make sure that this TRANSACTIONS’ Special Issue papers are of the highest quality. GABRIEL M. REBEIZ Electrical and Computer Engineering Department University of California at San Diego La Jolla, CA 92093-0407 USA SORIN P. VOINIGESCU Department of Electrical and Computer Engineering University of Toronto Toronto, ON, Canada M5S 3G4 JOHN PAPAPOLYMEROU School of Electrical and Computer Engineering Georgia Institute of Technology Atlanta, GA 30308 USA

Gabriel M. Rebeiz (S’86–M’88–SM’93–F’97) received the Ph.D. degree from the California Institute of Technology, Pasadena. He is the Wireless Communications Industry Chair Professor of electrical and computer engineering with the University of California at San Diego (UCSD), La Jolla. From 1988 to 2004, he was with The University of Michigan at Ann Arbor. He has contributed to planar millimeter-wave and terahertz antennas and imaging arrays from 1988 to 1996, and his group has optimized the dielectric-lens antennas, which is the most widely used antenna at millimeter-wave and terahertz frequencies. His group also developed 6–18- and 40–50-GHz eight- and 16-element phased arrays on a single silicon chip, and the first millimeter-wave silicon passive imager chip at 85–105 GHz. His group also demonstrated high- RF microelectromechanical systems (MEMS) tunable filters at 1–6 GHz and the new angular-based RF MEMS capacitive and metal-contact switches. As a consultant, he helped develop the USM/ViaSat 24-GHz single-chip SiGe automotive radar, phased arrays operating at -, -, and -band for defense and commercial applications, the RFMD RF MEMS switch, and the Agilent RF MEMS switch. He is the Director of the UCSD/Defense Advanced Research Projects Agency (DARPA) Center on RF MEMS Reliability and Design Fundamentals. He has graduated 42 Ph.D. students and 15 post-doctoral fellows, and currently leads a group of 21 Ph.D. students and post-doctoral fellows in the area of millimeter-wave RF integrated circuits (RFICs), tunable microwaves circuits, RF MEMS, planar millimeter-wave antennas, and terahertz systems. He authored RF MEMS: Theory, Design and Technology (Wiley, 2003). Prof. Rebeiz is a National Science Foundation (NSF) Presidential Young Investigator. He has been an associate editor of the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES and a Distinguished Lecturer for the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) and the IEEE Antennas and Propagation Society (IEEE AP-S). He was a recipient of the URSI Koga Gold Medal Recipient, the IEEE MTT-S 2003 Distinguished Young Engineer, the IEEE MTT-S 2000 Microwave Prize, the IEEE MTT-S 2010 Distinguished Educator Award, and the IEEE AP-S 2011 John D. Kraus Award. He was also the recipient of the 1998 Eta Kappa Nu Professor of the Year Award and the 1998 Amoco Teaching Award given to the best undergraduate teacher at The University of Michigan at Ann Arbor, and the 2008 Teacher of the Year Award of the Jacobs School of Engineering, UCSD. His students have been the recipients of a total of 19 Best Paper Awards presented at IEEE MTT-S, RFIC, and AP-S conferences.

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Sorin P. Voinigescu (S’91–M’95–SM’02) received the M.Sc. degree in electronics from the Polytechnic Institute of Bucharest, Bucharest, Romania, in 1984, and the Ph.D. degree in electrical and computer engineering from the University of Toronto, Toronto, ON, Canada, in 1994. From 1994 to 2002, he was first with Nortel Networks and later with Quake Technologies, Ottawa, ON, Canada, where he was responsible for projects in high-frequency characterization and statistical scalable compact model development for Si, SiGe, and III–V devices. He later conducted research on wireless and optical fiber building blocks and transceivers in these technologies. In 2002, he joined the University of Toronto, where he is currently a Full Professor. From 2008 to 2009, he spent a sabbatical year with Fujitsu Laboratories of America, Sunnyvale, CA. His research and teaching interests focus on nanoscale semiconductor devices and their application in integrated circuits at frequencies beyond 300 GHz. Dr. Voinigescu is a member of the ITRS RF/AMS Committee and of the Technical Program Committees (TPCs) of the IEEE CSICS and BCTM. He was the recipient of Nortel’s 1996 President Award for Innovation. He was a corecipient of the Best Paper Award of the 2001 IEEE CICC and the 2005 IEEE CSICS. He was also a recipient of the Beatrice Winner Award of the 2008 IEEE ISSCC. His students have been the recipients of Student Paper Awards presented at the 2004 VLSI Circuits Symposium, the 2006 SiRF Meeting, RFIC Symposium, BCTM, and the 2008 IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium.

John Papapolymerou (S’90–M’99–SM’04–F’11) received the B.S.E.E. degree from the National Technical University of Athens, Athens, Greece, in 1993, and the M.S.E.E. and Ph.D. degrees from The University of Michigan at Ann Arbor, in 1994 and 1999, respectively. From 1999 to 2001, he was an Assistant Professor with the Department of Electrical and Computer Engineering, University of Arizona, Tucson. During the summers of 2000 and 2003, he was a Visiting Professor with The University of Limoges, Limoges, France. From 2001 to 2005 and 2005 to 2009, he was an Assistant Professor and Associate Professor, respectively, with the School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, where he is currently a Professor. He has authored or coauthored over 300 publications in peer-reviewed journals and conferences. He is an Associate Editor for The International Journal of Microwave and Wireless Technologies. His research interests include the implementation of micromachining techniques and microelectromechanical (MEMS) devices in microwave, millimeter-wave, and terahertz circuits, and the development of both passive and active planar circuits on semiconductor (Si/SiGe, GaAs) and organic substrates [liquid-crystal polymer (LCP), low-temperature co-fired ceramic (LTCC)] for system-on-a-chip (SOC)/system-on-a-package (SOP) RF front ends. Dr. Papapolymerou currently serves as an associate editor for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. From 2009 to 2011, he was chair for Commission D, U.S. National Committee, URSI. He was also associate editor for the IEEE MICROWAVE AND WIRELESS COMPONENT LETTERS (2004–2007), and the IEEE TRANSACTIONS ON ANTENNAS AND PROPAGATION (2004–2010). During 2004, he was the chair of the IEEE Microwave Theory and Techniques (MTT)/Antennas and Propagation (AP) Atlanta Chapter. He was the recipient of the 2010 IEEE Antennas and Propagation Society (AP-S) John Kraus Antenna Award, the 2009 IEEE Microwave Theory and Techniques-Society (MTT-S) Outstanding Young Engineer Award, the 2009 School of Electrical and Computer Engineering Outstanding Junior Faculty Award, the 2004 Army Research Office (ARO) Young Investigator Award, the 2002 National Science Foundation (NSF) CAREER Award, the Best Paper Award of the 3rd IEEE International Conference on Microwave and Millimeter-Wave Technology (ICMMT2002), Beijing, China, and the 1997 Outstanding Graduate Student Instructional Assistant Award presented by the American Society for Engineering Education (ASEE), The University of Michigan at Ann Arbor Chapter. His students have also been recipients of several awards, including the Best Student Paper Award presented at the 2004 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, the 2007 IEEE MTT-S Graduate Fellowship, and the 2007/2008 and 2008/2009 IEEE MTT-S Undergraduate Scholarship/Fellowship.

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A Small Package With 46-dB Isolation Between Tx and Rx Antennas Suitable for 60-GHz WPAN Module Ryosuke Suga, Member, IEEE, Hiroshi Nakano, Yasutake Hirachi, Life Member, IEEE, Jiro Hirokawa, Senior Member, IEEE, and Makoto Ando, Fellow, IEEE

Abstract—A small package suitable for the mobile terminals of the 60-GHz wireless personal area network is proposed. Two antennas for Tx and Rx are integrated in the package. The antenna provides the end-fire radiation from the side face of the substrate. The package is mounted on the edge of a printed circuit board by using the ball grid array assembly. The antenna is composed of a post-wall waveguide and a slab waveguide with metal sidewalls. The gain and beamwidth are determined by the size of the slab waveguide. The sidewalls are for the design of the beamwidth in the -plane and for realizing the high isolation between Tx and Rx antennas. The beamwidths of the fabricated antenna were measured to be 47° and 46° in the - and -plane at 60 GHz, respectively. The gain more than 7.8 dBi was measured in the frequency range from 59 to 66 GHz. The package was fabricated for the evaluation of the isolation. The measured average isolation level between Tx and Rx antenna was 46.0 dB in the frequency range above. The antenna characteristics and isolation level are sufficient for the 60-GHz WPAN system.

Fig. 1. Mounting configuration of the proposed package on a PCB.

TABLE I MEASURED DIELECTRIC CONSTANTS AND THICKNESSES OF SUBSTRATE FOR EACH LAYER IN THE PACKAGE [21]

THE

Index Terms—IEEE 802.15.3c, integrated antenna, isolation, millimeter wave, package, wireless personal area network (WPAN).

I. INTRODUCTION

B

ROADBAND wireless communication systems using unlicensed 60-GHz band are desired for indoor high-speed applications, such as wireless personal area networks (WPANs) [1], [2]. A WPAN system using mobile terminals is one of attractive practical candidates. In order to realize such mobile terminals, the following are desired: low cost, low power consumption, small size, and low profile. The packaging of devices, such as a CMOS chip and an antenna, to a printed circuit board (PCB) are important to reduce the total cost, as well as to keep RF characteristics, since each characteristics depends on the mounting configuration of all devices.

Manuscript received July 01, 2011; revised December 08, 2011; accepted December 13, 2011. Date of publication January 17, 2012; date of current version March 02, 2012. This work was supported in part by the “Research and Development Project for Expansion of Radio Spectrum Resources” of The Ministry of Internal Affairs and Communications, Japan. R. Suga is with the Department of Electrical Engineering and Electronics, Aoyama Gakuin University, Kanagawa 252-5258, Japan (e-mail: rsuga@ee. aoyama.ac.jp). H. Nakano and Y. Hirachi are with AMMSys Inc., Tokyo 145-0062, Japan (e-mail: [email protected]; [email protected]). J. Hirokawa, and M. Ando are with the Department of Electrical and Electronic Engineering, Tokyo Institute of Technology, Tokyo 152-8552, Japan (e-mail: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2181535

Small low-cost antennas integrated on a chip [3]–[12] or in a package [13]–[21] were developed. Many of the antennas in a package are, however, fabricated in a liquid crystal polymer, alumina, or PTFE substrate. These antennas have a broad beamwidth, and alignment of the antenna is not needed. A few antennas radiating parallel to the PCB were reported [7], [10], [20] (hereinafter called end-fire radiation). Authors have proposed a surface-mount package with an integrated antenna, which has radiation for end-fire direction, as shown in Fig. 1 [21]. The mobile terminal in the WPAN system is radiating the rectilinear millimeter wave from its side face, thus it is suitable for pointing another terminal to communicate with. This means the end-fire radiation is suitable for the system. The isolation between Tx and Rx antennas is also necessary for duplex communications to meet the required carrier noise ratio (CNR). In the case of antenna integration into the packages, the Tx and Rx antennas are closely arranged, and the lower isolation level between them degrades the CNR of the system. Therefore, the packaging of the antenna to the PCB is very important for determining the radiation characteristics and the isolation level of the antenna. This paper proposes an antenna with high-isolation characteristics and a package with the antennas suitable for the mobile terminal in the duplex WPAN module. The antenna is composed of a post-wall waveguide and a slab waveguide, which will be integrated in the organic package. The proposed antenna is designed and evaluated for confirmation of the design validity of

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Fig. 2. Structure of the proposed antenna. (a) Perspective view. (b) MSL/post-wall waveguide transition.

the antenna. The surface-mount 60-GHz package with the antennas for Tx and Rx is fabricated and the isolation characteristics between the Tx and Rx antenna is evaluated. II. PROPOSED ANTENNA SUITABLE FOR WPAN SYSTEM A. Features of the Antenna for Integration Into the Package This paper proposes an antenna for the WPAN system using the 60-GHz band. The specifications of the antenna for the system are a gain of 6 dBi and a beamwidth of 40°–60° in the frequency range of 59–66 GHz. The antenna is composed of a post-wall waveguide [22] and a slab waveguide. The antenna provides the end-fire radiation through the antenna made of the waveguides. Two antennas for Tx and Rx will be integrated into a surface-mountable organic package. The package is called an antenna package, as it has antennas. Since the package is used for duplex communication within 1 m, the isolation characteristics between antennas is very important for improving the CNR. Moreover, the antenna is very cost effective, especially in high-volume production, because it can be fabricated simultaneously with the package made of organic substrate. Finally, solder balls were attached on the pads in the back of the package. The package is mounted on the edge of the PCB by the ball grid array assembly for the end-fire radiation. B. Structure of the Antenna The antenna is made of three dielectric layers, which are a post-wall waveguide layer and two microstrip line (MSL) layers. The measured anisotropic dielectric constants and the thickness of each layer in the package are summarized in Table I. The MSL layers made of thin buildup film were laminated on the top and bottom of the post-wall waveguide layer, thickness of which is 0.86 mm. The substrates for the MSL and post-wall waveguide layer are an epoxy substrate and a glass cloth-epoxy resin substrate, respectively. The post-wall waveguide is formed between metal 1 and metal 4, as shown in Fig. 2. An open stub, MSL/waveguide transition, and the ground–signal–ground

(GSG) pad were printed on the top MSL layer. The gain of an open-ended post-wall waveguide aperture antenna is 2.2 dBi, and the gain is improved to be 6.0 dBi with two loop-type metal directors (conventional antenna) [21]. A key for the required beamwidth is to realize a large effective aperture area in the -plane with a planar substrate with fixed thickness. For realizing broadband characteristics, the dielectric slab waveguide is arranged in front of the open-ended post-wall waveguide as a substitute for the directors made of metallic parasitic elements, which have narrowband characteristics. The beamwidth in the -plane and gain are determined by the length of the slab waveguide. Two metal sidewalls made of thru-holes are arranged on the both side of the slab waveguide. The walls are for the design of the beamwidth in the -plane and to suppress the mutual coupling between Tx and Rx antennas for realizing the high isolation. The transition between the post-wall waveguide and slab waveguide should be designed to realize lower reflection and not to excite evanescent modes. The mode in the post-wall waveguide is transformed to -like mode in the slab waveguide. Thereby the only -like mode propagates in the slab waveguide, and hertz component, which might degrade the isolation, is not excited in the slab waveguide. Moreover, this means that the designed beamwidth in the -plane is not so affected by the integration of two antennas into the package. One sidewall of the slab waveguide is shared by Tx and Rx antennas in the antenna package, as will be described later. C. Antenna Design The input impedance of the antenna is designed to be 50wire for impedance matching under the condition that bonding wires were connected, as shown in Fig. 1. Here, the wire is an inductance of the bonding wires. The length and diameter of the wire are fixed to be 270 and 25 m considering the mounting process. The antenna is designed by using Ansoft’s full-wave High Frequency Structure Simulator (HFSS). The larger size of the slab waveguide is needed for the higher gain. The width discontinuity between the post-wall waveguide

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Fig. 3. Designed directivity, gain, and radiation efficiency.

Fig. 5. Fabricated post-wall waveguide aperture antenna.

Fig. 4. Designed beamwidth in both

- and

-plane.

and the slab waveguide, however, becomes large, and that degrades the isolation and directivity due to the evanescent modes in the slab waveguide. The other design details are reported in [23]. The designed directivity, gain, and radiation efficiency is shown in Fig. 3. The improvement of the return loss with the wire is taken into account for the calculation of the gain and radiation efficiency. The directivity increases with the increase of the frequency. The gain and radiation efficiency are designed to be more than 5.0 dBi and 70% in the frequency range, respectively. A fixed beamwidth in all angles is desirable for the antenna considering the usage models of the system. The frequency characteristics of the designed beamwidth in the - and -plane are shown in Fig. 4. The difference between beamwidths in the - and -plane at each frequency is within 3°, which is sufficiently small for an actual use. The fabricated antenna is shown in Fig. 5. The size of the fabricated antenna is 7.5 mm 8.4 mm 1.0 mm. The length of the antenna is 14% smaller than a conventional antenna. D. Antenna Characteristics The reflection characteristics at the ground–signal–ground (GSG) pad reference plane were measured by using an RF probe. The designed and evaluated results are shown in Fig. 6. The characteristics with the

Fig. 6. Reflection coefficient of the antenna.

bonding wires of 270 m are also indicated. The designed and measured without a wire agree well with a frequency shift of 2%. is designed to be 50 with the bonding wire. The measured with the wire is realized less than 10 dB in the frequency range from 57.1 to 67.5 GHz, which is sufficient for the system requirement. The gain and radiation pattern of the antenna were measured in an anechoic chamber using a test jig to feed the antenna. The antenna mounted on the jig is shown in Fig. 7. The jig is made of a hollow waveguide and an alumina substrate. An MSL/conductor-backed coplanar waveguide (CBCPW) transition is patterned on the substrate. In other words, the jig is a waveguide-to-CBCPW transition. The waveguide input port is on the bottom plane of the jig in Fig. 7. The GSG pads on the antenna and CBCPW on the alumina substrate are connected to each other by bonding wires. The insertion loss of the jig is measured by using the back-to-back connected jigs. The loss is measured to be 1.1–1.7 dB per a jig in the frequency range, and is used for the calibration to measure the antenna gain. The radiation patterns in the - and -plane at 60 GHz are shown in Figs. 8 and 9, respectively. The patterns predicted by

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Fig. 7. Fabricated antenna mounted on the test jig to measure the radiation characteristics of the antenna.

Fig. 9. Radiation pattern in the

Fig. 8. Radiation pattern in the

Fig. 10. Frequency characteristics of the antenna gain.

-plane at 60 GHz.

using HFSS with a simplified test jig are also presented as “designed with the jig” in the figures. The measured patterns agree well with the designed antenna if the angle is within 30°. If the angle is 30° or more, the patterns are affected by reflected wave from the jig. The beamwidths in the - and -plane are narrowed due to the reflection. The beamwidths in the - and -plane were measured to be 47° and 46°, respectively. From these result, the antenna without the jig would have the similar radiation pattern with designed one without the jig. The antenna gain is shown in Fig. 10. The gain is measured by using comparison method between a 15-dBi standard gain horn antenna and the proposed antenna with the jig. The measured gains are corrected with the loss of the jig, and the designed one is done with the improved insertion loss by the assembly of the bonding wires. The designed gains are also indicated, which are with and without consideration of the reflected wave from the jig. The designed and measured gains with the jig agree within the error of 1 dB in the frequency range, and the gain is measured to be more than 7.8 dBi. The feasibility of the proposed antenna and the validity of the design method are made clear from the agreement of the designed and measured results reported above. The broadband characteristics are realized, which meet the specification of the antenna.

-plane at 60 GHz.

Fig. 11. Block diagram of RF front-end for the transceiver (TDD, receiving state).

III. ANTENNA PACKAGE A. Required Isolation Between the Tx/Rx Antennas This WPAN system is based on IEEE 802.15.3c. [24] The system applies quadrature phase-shift keying (QPSK) modulation and time division duplex (TDD). The example for the

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Fig. 13. Antenna isolation measurement of the antenna package with slab waveguide.

be 10 dB [25]. The leakage from the local input port to RF one in the Tx mixer and of the power amplifier (PA) without bias are assumed to be less than 20 dB [26], [27]. Therefore the leaked local oscillator power of 40 dBm would be fed to the antenna in spite of the receiving state. Thus, the antenna isolation must be greater than about 33 dB with an antenna gain of 6 dBi because of required CNR of 10 dB, system NF of 10 dB, and Rx level of 53 dBm at the Rx antenna. B. Evaluation of the Isolation Characteristics

Fig. 12. Fabricated antenna-package with two antennas for Tx and Rx. (a) With loop-type directors (conventional antenna). (b) With slab waveguide.

block diagram and the power levels of the transceiver in the receiving state is illustrated in Fig. 11. This system has two antennas without a transmit/receive switch. The local oscillator signal of 0 dBm at 60 GHz is fed to the mixer through the frequency tripler. The other specifications of the system are as follows; the communication range is 1 m, the Tx output power level is 3 dBm, and the antenna gain is 6 dBi for the Tx and Rx antennas. The system requires the CNR more than 10 dB for the bit error rate of 10 . The thermal noise is 81.6 dBm at 290 K. The antenna isolation between Tx and Rx is one of the problems to be solved in realizing such an antenna package because the Rx antenna is located adjacent to the Tx antenna. Even though the system uses TDD, the antenna isolation is needed to suppress the noise due to the local oscillator leakage. As shown in Fig. 11, the noise figure (NF) of the Rx circuit is assumed is to

The fabricated packages: 1) with loop-type directors and 2) with slab waveguide are shown in Fig. 12(a) and (b), respectively. The antenna of the package with loop-type directors is the conventional one, which was reported in [21], and that with slab waveguide is the proposed antenna. The laminated structures of the packages are exactly the same as the antenna. The circuits and pads for the interconnection between the package and the PCB were structured on the bottom MSL layer. The length of the package with proposed antenna is 10% smaller than that with conventional antenna. The package has two antennas, one for Tx and one for Rx, the MSLs for IF and dc circuits. A sidewall between Tx and Rx antennas is shared by the antennas. The cavity is structured in the center of the package for connecting the CMOS device and package with shorter bonding wires. The sizes of the fabricated packages are 14.4 mm 18.0 mm and 14.4 mm 16.3 mm. The sizes of the cavities in the center of the packages are 4.4 mm 5.8 mm 0.3 mm. The photograph of the antenna isolation measurement is shown in Fig. 13. An alumina substrate with a bent 50CBCPW is attached into the cavity of the package for avoiding interference and the mutual coupling between two probes.

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REFERENCES

Fig. 14. Tx/Rx isolation characteristics.

The antenna isolation is measured under the condition that the substrate and GSG pad on the antenna were connected by bonding wires. The RF wave absorber is arranged around the antennas to suppress the reflected wave from a probe station. The calculated and measured isolations between the Tx and Rx antennas in the antenna package and the required isolation are shown in Fig. 14. The transmission loss of the CPW was measured to be less than 0.1 dB in the frequency range of 50–70 GHz and is confirmed negligibly small. The reflection coefficient of the antenna seen from the bent CPW was measured to be 10 dB in the frequency range of 58.3–64.6 GHz. The isolation level is improved by 6.0–27.5 dB in the frequency range compared with the conventional one. The measured isolation of the antenna package with the slab waveguide is more than 38.1 dB and on the average of 46.0 dB.

IV. CONCLUSION We have proposed an antenna package with high isolation between Tx and Rx antennas suitable for the WPAN applications. The high isolation is realized by using the dielectric slab waveguide with metal sidewalls. The transition between the post-wall waveguide and the slab waveguide is designed not to excite evanescent modes for keeping the isolation level. The size of the fabricated antenna is 7.5 mm 8.4 mm 1.0 mm. The measured including the bonding wires is realized less than 10 dB in the frequency range from 57.1 to 67.5 GHz. The radiation characteristics of the antenna are measured with a test jig. The beamwidths of 47° and 46° are measured in the - and -plane, respectively. The gain of the antenna is measured to be more than 7.8 dBi. The feasibility of the proposed antenna and the validity of the design method are confirmed. The antenna package with the proposed antennas is fabricated for evaluation of the isolation between the Tx and Rx antenna. The size of the package with proposed antenna is 14.4 mm 16.3 mm 1.0 mm. The average isolation level between the Tx and Rx antenna of the antenna package is measured to be 46 dB. The isolation level is sufficient for the WPAN system.

[1] R. Fisher, “60 GHz WPAN standardization within IEEE 802.15.3c,” in Proc. Int. Signals, Syst. Electron. Symp., 2007, pp. 103–105. [2] R. Funada, H. Harada, Y. Shoji, R. Kimura, Y. Nishiguchi, M. Lei, C. Choi, F. Kojima, C. Pyo, Z. Lan, I. Lakkis, M. Umehira, and S. Kato, “A design of single carrier based PHY for IEEE 802.15.3c standard,” in Int. Personal, Indoor, Mobile Radio Commun. Symp., 2007, pp. 1–5. [3] Y. P. Zhang, M. Sun, and L. H. Guo, “On-chip antenna for 60-GHz radios in silicon technology,” IEEE Trans. Electron Devices, vol. 52, no. 7, pp. 1664–1668, Jul. 2005. [4] S. Montusclat, F. Gianesello, and D. Gloria, “Silicon full integrated LNA, filter and antenna system beyond 40 GHz for MMW wireless communication links in advanced CMOS technologies,” in Proc. IEEE Radio Freq. Integr. Circuits Symp., 2006, pp. 77–80. [5] A. Boé, M. Fryziel, N. Deparis, C. Loyez, N. Rolland, and P. A. Rolland, “Smart antenna based on RF MEMS switches and printed Yagi–Uda antennas for 60 GHz ad hoc WPAN,” in Proc. 36th Eur. Microw. Conf., Sep. 2006, pp. 310–313. [6] P.-J. Guo and H.-R. Chuang, “A 60-GHz millimeter-wave CMOS RFIC-on-chip meander-line planar inverted-F antenna for WPAN applications,” in Proc. IEEE Antenna Propag. Symp., Jul. 2007, pp. 1–4. [7] S.-S. Hsu, K.-C. Wei, C.-Y. Hsu, and H.-R. Chuang, “A 60-GHz millimeter-wave CPW-fed yagi antenna fabricated by using 0.18- m CMOS technology,” IEEE Device Lett., vol. 29, no. 6, Jun. 2008. [8] J. Hirokawa, K. Kimishima, M. Ando, and Y. Hirachi, “Dipole antenna on a thick resin layer on the back side of a silicon chip at 60 GHz,” in Proc. 39th Eur. Microw. Conf., Sep. 2009, pp. 528–531. [9] F. Gutierrez, S. Agarwal, K. Parrish, and T. S. Rappaport, “On-chip integrated antenna structures in CMOS for 60 GHz WPAN systems,” IEEE J. Sel. Areas Commun., vol. 27, no. 8, pp. 1367–1378, Oct. 2009. [10] R. Willmot, D. Kim, and D. Peroulis, “A Yagi–Uda array of highefficiency wire-bond antennas for on-chip radio applications,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 12, pp. 3315–3321, Dec. 2009. [11] L. Pazin and Y. Leviatan, “A compact 60-GHz tapered slot antenna printed on LCP substrate for WPAN applications,” IEEE Antennas Wireless Propag. Lett., vol. 9, pp. 272–275, 2010. [12] W. Lee, J. Kim, C. S. Cho, and Y. J. Yoon, “Beamformimg lens antenna on a high resistivity silicon wafer for 60 GHz WPAN,” IEEE Trans. Antennas Propag., vol. 58, no. 3, pp. 706–713, Mar. 2010. [13] Y. Tsutsumi, M. Nishio, S. Sekine, H. Shoki, and T. Morooka, “A triangular loop antenna mounted adjacent to a lossy Si substrate for millimeter-wave wireless PAN,” in Proc. IEEE Antenna Propag. Symp., Jun. 2007, pp. 1008–1011. [14] K. Maruhashi, M. Ito, S. Kishimoto, and K. Ohata, “60-GHz-band LTCC module technology for wireless gigabit transceiver applications,” in Proc. IEEE Int. Radio Freq. Integr. Technol. Symp., Dec. 2005, pp. 131–134. [15] H. Nakano, K. Kosemura, T. Hamada, Y. Hirachi, J. Hirokawa, and M. Ando, “Cost-effective 60-GHz modules with a post-wall planar antenna for gigabit home-link systems,” in Proc. Eur. Microw. Conf., Oct. 2003, pp. 891–894. [16] J. Grzyb, L. Duxian, U. Pfeiffer, and B. Gaucher, “Wideband cavitybacked folded dipole superstrate antenna for 60 GHz applications,” in Proc. IEEE Antenna Propag. Symp., 2006, pp. 3939–3942. [17] A. L. Amadjikepé, D. Choudhury, G. E. Ponchak, and J. Papapolymerou, “60-GHz switched-beam end-fire antenna module integrated with novel microstrip-to-slot transition,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2011, pp. 1–4. [18] C. Kärnfelt, P. Hallbjörner, H. Zirath, and A. Apling, “High gain active microstrip antenna for 60-GHz WLAN/WPAN applications,” IEEE Trans. Microw. Theory Tech, vol. 54, no. 6, pp. 2593–2603, Jun. 2006. [19] N. Caillet, Ch. Person, C. Quendo, J. F. Favennec, S. Pinel, E. Rius, and J. Laskar, “High gain conical horn antenna integrated to a planar substrate for 60 GHz WPAN applications,” in Proc. 4th Eur. Antennas Propag. Conf., Apr. 2010, pp. 1–5. [20] R. Suga, H. Nakano, Y. Hirachi, J. Hirokawa, and M. Ando, “Lateral radiation millimeter-wave antenna package using post-wall waveguide,” in Proc. IEEE Antenna Propag. Symp., Jun. 2009, pp. 1–4. [21] R. Suga, H. Nakano, Y. Hirachi, J. Hirokawa, and M. Ando, “Costeffective 60-GHz antenna package with end-fire radiation for wireless file-transfer system,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 12, pp. 3989–3995, Dec. 2010.

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[22] J. Hirokawa and M. Ando, “Single-layer feed waveguide consisting of posts for plane TEM wave excitation in parallel plates,” IEEE Trans. Antennas Propag., vol. 46, no. 5, pp. 625–630, May 1998. [23] R. Suga, H. Nakano, Y. Hirachi, J. Hirokawa, and M. Ando, “Millimeter-wave antenna with high-isolation using slab waveguide for WPAN applications,” in Proc. Eur. Microw. Conf., Oct. 2011. [24] WPAN Millimeter Wave Alternative PHY Task Group 3c (TG3c), “IEEE 802.15,” Jan. 2012. [Online]. Available: http://www.ieee802. org/15/pub/TG3c.html [25] M. Kraemer, D. Dragomirescu, and R. Plana, “A low-power high-gain LNA for the 60 GHz band in a 65 nm CMOS technology,” in Proc. Asia–Pacific Microw. Conf., 2009, pp. 1156–1159. [26] M. Varonen, M. Karkkainen, M. Käntänen, and K. A. I. Halonen, “Millimeter-wave integrated circuits in 65-nm CMOS,” IEEE J. Solid-State Circuits, vol. 43, no. 9, pp. 1991–2002, Sep. 2008. [27] J. Tsai, H. Yang, T. Huang, and H. Wang, “A 30–100 GHz wideband sub-harmonic active mixer in 90 nm CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 8, pp. 554–556, Aug. 2008. Ryosuke Suga (M’08) was born in Tokyo, Japan, on December 31, 1979. He received the B.S., M.S., and D.E. degrees in electrical engineering and electronics from Aoyama Gakuin University, Kanagawa, Japan, in 2002, 2004, and 2008, respectively. From 2008 to 2010, he was a Postdoctoral Fellow with the Tokyo Institute of Technology. He is currently a Research Assistant with Aoyama Gakuin University. He has been engaged in research on millimeter-wave passive devices and antennas. Dr. Suga is a member of the Institute of Electronics, Information and Communication Engineers (IEICE), Japan.

Hiroshi Nakano was born in Nagano, Japan, on March 13, 1961. He received the B.S. and M.S. degrees in electrical and electric engineering from the Shibaura Institute of Technology, Tokyo, Japan, in 1984 and 1986, respectively. From 1986 to 1998, he was with the Olympus Optical Company Ltd., as an Engineer involved with memory devices using ferroelectric materials. From 1998 to 2004, he was with Fujitsu Quantum Devices Ltd., where he was engaged in development of highfrequency RF transmitter and receiver modules. He is currently with AMMSYS Inc., Tokyo, Japan, where he is engaged in the development of high-frequency monolithic microwave integrated circuit (MMIC) and RF modules.

Yasutake Hirachi (M’74–LM’09) was born in Tokyo, Japan, on December 24, 1944. He received the B.S. and M.S. degrees in electrical engineering from the Tokyo University of Agriculture and Technology, Tokyo, Japan, in 1968 and 1970, respectively, and the Ph.D. degree in electrical engineering from Tokyo Institute of Technology, Tokyo, Japan, in 1979. From 1970 to 1971, he was a Research Assistant with the Tokyo Institute of Technology. In 1971, he joined Fujitsu Laboratories Ltd., where he had been engaged in the research, development, and business of microwave- and millimeter-wave- IMPATT diodes, GaAs field-effect transistors (FETs), and HEMTs. In 1998, he joined Fujitsu Quantum Devices Ltd., where he managed the development and business of MMICs and millimeter-wave subsystems. From 2000 to 2005, he was a Visiting Professor with the Tokyo Institute of Technology. In 2005, he established the AMMSYS Inc., for which he has been the President. Since 2007, he has been one of the research readers of the millimeter-wave project supported by the Ministry of Internal Affairs and Communications. He is currently a Research Fellow with the Tokyo Institute of Technology. He authored the technical book GaAs Field-Effect Transistors

(IEICE, 1992) and the easier technical book Compound Semiconductor Devices supporting the Internet World (Kogyo Chosakai Publishing Company Ltd., 2002). Dr. Hirachi is a Fellow of the Institute of Electrical, Information and Communication Engineers (IEICE), Japan. He is a Life Member of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S). He was the recipient of the 1978 Watanabe Memorial Award for GaAs hi–lo IMPATT diodes, the 1989 Ichimura Award for outstanding contribution to the practical use of HEMTs, and a Best Paper Award in 2007 from the IEICE Communication Society.

Jiro Hirokawa (S’89–M’90–SM’03) was born in Tokyo, Japan, on May 8, 1965. He received the B.S., M.S., and D.E. degrees in electrical and electronic engineering from the Tokyo Institute of Technology, Tokyo, Japan, in 1988, 1990, and 1994, respectively. From 1990 to 1996, he was a Research Associate, and is currently an Associate Professor with the Tokyo Institute of Technology. From 1994 to 1995, he was a Postdoctoral Fellow with the Antenna Group, Chalmers University of Technology, Göteborg, Sweden. His research area has been in slotted waveguide array antennas and millimeter-wave antennas. Dr. Hirokawa is a member of the Institute of Electrical, Information and Communication Engineers (IEICE), Japan. He was the recipient of an IEEE Antennas and Propagation Society (AP-S) Tokyo Chapter Young Engineer Award in 1991, a Young Engineer Award of the IEICE in 1996, a Tokyo Institute of Technology Award for Challenging Research in 2003, a Young Scientists’ Prize of the Minister of Education, Cultures, Sports, Science and Technology, Japan, in 2005, a Best Paper Award in 2007, and a Best Letter Award of the IEICE Communications Society in 2009.

Makoto Ando (SM’01–F’03) was born in Hokkaido, Japan, on February 16, 1952. He received the B.S., M.S., and D.E. degrees in electrical engineering from the Tokyo Institute of Technology, Tokyo, Japan, in 1974, 1976, and 1979, respectively. From 1979 to 1983, he was with the Yokosuka Electrical Communication Laboratory, NTT, where he was engaged in development of antennas for satellite communication. From 1983 to 1985, he was a Research Associate with the Tokyo Institute of Technology, where he is currently a Professor. He has been the Guest Editor-in-Chief of special issues of the Institute of Electrical, Information and Communication Engineers (IEICE), Japan, and Radio Science. His main research interests have been high-frequency diffraction theory such as physical optics and geometrical theory of diffraction. His research also concerns the design of reflector antennas and waveguide planar arrays for DBS and VSAT. His recent research interest includes the design of high-gain millimeter-wave antennas. Dr. Ando is a Fellow of the IEICE. He has been the guest editor-in-chief for the IEEE TRANSACTIONS ON ANETNNAS AND PROPAGATION. He was the general chair of the 2004 URSI EMT symposium, Pisa. Italy, and of the ISAP 2007, Niigata, Japan. He was the chair of the IEICE Technical Committee of Electromagnetic theory (2004–2005) and IEICE Antennas and Propagation (2005–2007). He was a member of the IEEE Antennas and Propagation Society (AP-S) Administrative Committee (AdCom) (2004–2006). Since 2004, he has also been a member of the Scientific Council for Antenna Centre of Excellence–ACE of the European Union (EU)’s 6th Framework Programme. He was the chair of Commission B, URSI (2002–2005). He was the 2007 president of the IEICE Electronics Society and the 2009 president of the IEEE AP-S. He was the Program Officer for the Engineering Science Group, Research Center for Science Systems (JSPS) (2006–2009). He was the recipient of the IEICE Young Engineers Award in 1981, the IEICE Achievement Award in 1993, and the Paper Award in 2009. He was also the recipient of the 5th Telecom Systems Award in 1990, the 8th Inoue Prize for Science in 1992, the Meritorious Award of the Minister of Internal Affairs and Communications, the Chairman of the Board of ARIB in 2004, and the Information Promotion Month Award in 2006, Minister of Internal Affairs and Communications.

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Vertical RF Transition With Mechanical Fit for 3-D Heterogeneous Integration Lihan Chen, Student Member, IEEE, Joseph Wood, Student Member, IEEE, Sanjay Raman, Senior Member, IEEE, and N. Scott Barker, Member, IEEE

Abstract—This paper presents the design, simulation, and measurement of a vertical RF interconnect with mechanical fit for 3-D heterogeneous integration. The mechanical fit is a flip-chip strategy employing interlocking SU-8, an ultra-thick photoresist, structures to prevent misalignment during assembly and increase the reliability of the interconnects. To determine the electromagnetic characteristics, such as insertion loss and the coupling between face-to-face chips, different test structures were fabricated and measured. Experimental results show excellent RF performance up to 110 GHz with low insertion loss (better than 0.1 dB per transition at 40 GHz). Index Terms—Coplanar waveguide (CPW), mechanical fit, SU-8, vertical transition, -band. Fig. 1. Structure of proposed vertical transition with mechanical fit.

I. INTRODUCTION

B

Y VERTICALLY stacking multiple die, 3–D integration promises smaller and smarter subsystems. 3-D packaging requires high-density vertical transitions that can transfer signals from the front of a chip to its back and between stacked chips. Vertical transitions with low insertion loss and high return loss are critical for millimeter-wave applications. An increasingly popular transition configuration is the flip-chip-based millimeter-wave inter-chip interconnect, which has been demonstrated up to -band [1], [2]. Due to its small dimensions, the flip-chip interconnect is attractive for high-performance, highfrequency, and broadband applications [3]. This paper describes the concept of including a mechanical fit as part of the inter-chip vertical interconnect to facilitate the heterogeneous integration of different microsystem layers fabricated in different technologies. The mechanical fit, first introduced in [4], is an interlocking structure made of SU-8, an ultra-thick photoresist. The gold microbumps, which provide electrical connection between Manuscript received July 02, 2011; revised October 24, 2011; accepted November 08, 2011. Date of publication January 05, 2012; date of current version March 02, 2012. This work was supported by the Army Research Office (ARO) under Contract W911NF-06-1-0368 and Contract W944NF-06-1-0422. L. Chen and N. S. Barker are with the Charles L. Brown Department of Electrical and Computer Engineering, University of Virginia, Charlottesville, VA 22904-4743 USA (email: [email protected]; [email protected]). J. Wood was with the Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, VA 24061 USA. He is now with BAE Systems, Merrimack, NH 03060 USA. S. Raman is with the Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, VA 24061 USA. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2176502

chips, are embedded within the SU-8 structures. The whole structure is illustrated in Fig. 1. In this example, the three gold microbumps form the ground–signal–ground (GSG) structure, connecting two sets of coplanar waveguide (CPW) lines in the two face-to-face chips. This configuration is best suited for directly contacting CPW traces through vertical microbumps. The benefits of the mechanical fit include the following. • Providing an alignment guide for assembly. The interlocking structures will prevent misalignment during assembly and will keep the die and the substrate in place during thermocompression bonding. • Improving reliability by supporting the microbumps with SU-8. Regular microbumps deform under compression bonding [5]. The SU-8 structures protect the gold microbumps from excessive deformation during the bonding process. Epoxybased underfill has been used to improve the reliability of flip-chip interconnects [6]. However, this strategy requires taking the underfill effect into account in advance for both interconnect and chip designs. For the design presented in this paper, the shape of the mechanical fit structures can be specifically designed to avoid sensitive areas that could detune active RF chips while serving as an underfill in less sensitive areas. • Separating adjacent chips for improved RF isolation. The additional space in between chips due to the height of the mechanical fit structures helps to reduce cross-coupling and also enables the integration/self-packaging of high aspect-ratio 3-D and microelectromechanical systems (MEMS) structures between assembled layers. Section II presents the design of the transition with mechanical fit. Section III details the fabrication and assembly process. Section IV presents the measurement results.

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Fig. 2. Full-wave electromagnetic simulation of effective permittivity and aton hightenuation for different signal conductor widths of CPW cm). resistivity silicon substrate (

Fig. 3. Dimensions of the -band vertical transition and its Pi-network circuit model. The substrates are 380- m-thick high-resistivity silicon ( 2000 cm).

II. DESIGN

to compensate for any extra capacitance in the transition region [11]. The vertical transitions are initially simulated using HFSS with no loss ( and ). A -band design [4] with CPW dimensions of m and m is shown in Fig. 3. This -band transition is simulated to have better than 20-dB return loss up to 50 GHz and a compensation network in the CPW transmission line is not needed. A similar transition is designed at -band by studying the influence of the transition geometrical parameters using HFSS to simulate the -parameters of a single transition. The circuit model parameters are obtained from the HFSS simulation by using the admittance matrix representation of the network [12]. It was found that varying the height ( in Fig. 3) of the microbumps (equivalently the thickness of the SU-8), has little effect on the return loss of the transition. However, a smaller radius ( in Fig. 3) results in better return loss. In addition, better return loss is achieved with larger spacing ( in Fig. 3) since the increased path length of the ground current raises the inductance, which compensates capacitance in the transition region. These conclusions agree well with the study of flip-chip interconnects without SU-8 [1]. Surrounding the interconnects with SU-8 increases the capacitance, which reduces return loss, as shown in Fig. 4. Return loss is reduced by 2 dB at 100 GHz when an SU-8 structure ( m) is added. Return loss is reduced further as the SU-8 structure is extended to m. However, a further extension of the SU-8 structure ( m) does not result in any noticeable change in return loss since only the dielectric next to the interconnect can change the capacitance. It is difficult to make less than the diameter of the microbump. In order to minimize the coupling between the top and bottom chips, the height should be at least 0.3 times the CPW ground-toground spacing [13]. Increasing the height between the chips improves the isolation between the chips, but also increases the fabrication difficulty. Thicker SU-8 requires a multilayer deposition and introduces additional loss. Therefore, 35 m is chosen as the thickness of the SU-8 for the -band design, which is 0.6 times the CPW ground-to-ground spacing.

The vertical RF transition consists of interlocking SU-8 structures and three embedded metal microbumps (GSG). The SU-8 serves two main functions: an electroplating mold (as shown on the bottom chip in Fig. 1) and mating structure (as shown on the top chip in Fig. 1). SU-8 is an ultra-thick photoresist designed for micromachining and other microelectronic applications. The size and pitch capabilities of the plated microbumps are determined by the SU-8 mold. Since SU-8 is chemically and thermally stable after being imaged and cured, the SU-8 plating mold can be left on the device as part of the interlocking structures. SU-8 can achieve high aspect ratios, over 10:1, and various thicknesses from 5 to 1200 m [7]. Using SU-8 enables optimization of plated microbump dimensions for various applications. To design the vertical RF transition, the first step is to choose CPW dimensions that represent typical traces used in monolithic microwave integrated circuit (MMIC) design. The CPW dimensions used in this study are chosen based on full-wave electromagnetic simulation using Ansoft HFSS. The characteristic impedance is mainly determined by the ratio of the center conductor width ( ) to the gap ( ) between the center conductor and ground planes and is not significantly affected by the width of the ground planes [8]. Fig. 2 shows the effective permittivity and attenuation for different center conductor widths for CPW on a high-resistivity silicon substrate. Larger widths have lower attenuation, but higher dispersion effects. Die area is also a consideration while choosing dimensions. Choosing a center conductor width of 30 m provides a compromise between attenuation loss, dispersion, and die area. The metal microbumps are embedded in the interlocking SU-8 structures with a relative dielectric constant of 4 [9]. The return loss of the vertical transition is determined by this material parameter, as well as the radius, height, and spacing of the microbumps. The vertical RF transition can be represented by a pi-network circuit model consisting of one series inductor and two parallel capacitors and [10], as shown in Fig. 3. If needed, a short section of high-impedance CPW can be used

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TABLE II CIRCUIT PARAMETERS OF TWO TRANSITION DESIGNS

Fig. 6. Dimensions of the Fig. 4. Return loss of the transition versus length of the SU-8 structure with m, m, and m.

Fig. 5. -parameters of the transition with and without high high-impedance m, m, and m. compensation with TABLE I DIMENSIONS OF TWO TRANSITION DESIGNS

For the same microbump height, a smaller radius results in a higher aspect ratio for the SU-8 features. A radius of 15 m is chosen for the -band design, which is relatively easy to realize in a 35- m-thick SU-8 layer. Increasing the spacing of the microbumps improves return loss, but it also increases parasitic coupling into the unwanted substrate mode (parallel-plate line (PPL) mode) [1]. Instead, a 50- m length of 65- CPW is added to the -band design to improve return loss and the simulation results are shown in Fig. 5. The dimensions and corresponding circuit parameters of both designs are detailed in Tables I and II. Interlocking structures for the -band design are shown in Fig. 6. The minimum size of the SU-8 plating mold is limited

-band interlocking structures.

by the size of the microbumps and their spacing. In this case, with a microbump diameter of 30 m, the plating mold width is set as 198 m (greater than six times the microbump diameter). A simple top-chip mating structure is used in this design; however, alternatively shaped mating structures are possible. When the mating structures are designed, two things need to be kept in mind: aspect ratio and adhesion. The aspect ratio of the mating structure cannot exceed SU-8’s capability of 10:1 and the mating structure surface area needs to be large enough to provide sufficient adhesion to the chip to withstand the assembly and bonding process with a high yield. The adhesion between SU-8 and the chip is determined by the contact area and surface material on which the SU-8 is deposited. Increasing the contact area can improve adhesion and reduce the aspect ratio, whereas reducing contact area may cause a reduction in yield. SU-8 3000 from MicroChem, used in this work, is an improved formulation of SU-8 for better adhesion. According to shear analysis, SU-8 3000 on silicon nitride (used in this work) can withstand a shear stress up to 73 MPa, whereas on gold it can only stand up to 47 MPa [14]. The clearance between the interlocking structures defines the alignment accuracy between the top chip and the bottom chip. A larger clearance makes the assembly easier, but alignment accuracy is reduced. Interlocking structures with clearances of 1, 2, and 5 m were fabricated and tested. The structures with a 1- m clearance were unable to be assembled successfully. However the 2- m clearance structures worked well and were used for both designs presented in this work, resulting in an alignment accuracy of 2 m. The 5- m clearance structures provided too loose of a fit for these aspect ratios and were never successfully bonded using the low-cost techniques presented in this study. III. FABRICATION AND ASSEMBLY The fabrication and assembly processes of the - and -band designs are similar. For the test structures presented in this study, the substrates are 380- m-thick high-resistivity silicon ( 2000 cm). The fabrication mainly consists of the following three steps (as detailed in Fig. 7). Step 1) Deposit and pattern metal layers, Ti-Au-Cr (5/800/10 nm), on silicon substrate by liftoff.

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Fig. 9. Structure of the thermal bonding chamber.

Fig. 7. Process flow for the vertical transition. CPW dimensions are 15/30/15 m. (a) Deposit and pattern metal layers by liftoff. (b) Spin and define the SU-8 layer. (c) Form gold microbumps by electroplating into the SU-8 mold.

Fig. 8. SEM graphic of a

-band test sample with gold microbumps.

Step 2) Spin and define the SU-8 layer. Step 3) Form gold microbumps by electroplating into the SU-8 mold. A PECVD Si N layer is deposited upon the metal layers, which serves as a plating mask to prevent Au plating outside the SU-8 mold, and is etched using a CF4/O2 reactive ion etching (RIE) after plating. The SU-8 layer for the -band design is deposited by a multilayer SU-8 process [15]. The first spin of SU-8 3025 is 2000 r/min for 60 s and the second is 3000 r\min for 60 s. The combination of the two spins creates a smooth 55- m-thick layer. For the -band design, the SU-8 layer is deposited by a single spin of SU-8 3025 at 2000 r/min for 60 s, resulting in a 36- m-thick layer. The gold microbumps are formed by electroplating. The microbumps are plated to just over the thickness of the SU-8 mold ( 57 m for -band design) to aid with bonding. The plating procedure is carefully controlled

to ensure each microbump is the same height. Fig. 8 shows a -band test sample with the microbumps formed. The centers of the microbumps are slightly higher than the edges, making bonding easier. In the fabrication flow above, both the bottom chip with the microbumps and the top chip with the mating structure are made at the same time. To create the mating structure on previously designed chips, SU-8 structures can be added as the final processing step in the foundry process flow before dicing the wafer. Alternatively, post processing can be performed on die by using a specially designed carrier wafer [4]. During assembly, the top chip with the mating structure is flipped over and attached to the bottom chip. Misalignment is avoided by checking the thickness of the assembled sample. If the interlocking structures are close, but do not fit, parts of the mating structure will be on top of the SU-8 plating mold. In this scenario, the vertical distance between the top and bottom chips equals twice the thickness of the SU-8 structures, indicating a misalignment. A gold-to-gold thermocompression bond is used to electrically connect the two chips together. During thermocompression bonding, pressure helps to deform surface contamination by flattening the gold surface, and temperature helps to provide the energy to remove the deformed surface contamination film [16]. Therefore, the gold surfaces are brought into intimate contact such that the interatomic interaction between the two occurs. The bonding is done in a simple thermal compression bonding chamber, which is shown in Fig. 9. The aligned sample is first put into the chamber and covered with a circular plate (1-in diameter) and a flexible rubber membrane. The chamber is then pumped down to low vacuum, and put on a 200 C hotplate for 20 min. The inner diameter of the chamber is only slightly larger than 1 in so that the circular plate moves perpendicularly to the aligned chips. The compressive load for this setup is estimated to be around 5 kg, which is about 800 g/bump for the single-channel devices and 400 g/pump for the doublechannel devices. Reference [16] shows that for temperatures between 150 C–200 C, the pressure should be in the range of 300–500 g/bump for standalone gold bumps. The plated microbumps extend just 2–3 m over the SU-8 mold (as shown in Fig. 8) and are surrounded and protected by the SU-8. Therefore, this process does not require precise pressure control since SU-8 maintains the structural dimensions of the transition. In this setup, the chips are held under pressure for 20 min to ensure the gold–gold interface reaches the critical bonding temperature of 150 C [16].

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Fig. 10. Measurement results of single-channel back-to-back transitions with the full-wave electromagnetic field simulations and the circuit simulations. The full-wave simulation is done with m, m, and m, and other dimensions are shown in Fig. 7. The full-wave simulation is done with a gold conductivity of 3.3 10 m and a loss tangent of 0.08 for SU-8 [18].

IV. MEASUREMENT A. RF Performance The vertical RF transitions are measured in a back-to-back configuration. The measurement includes return loss, insertion loss, and isolation between different ports. 1) -Band Design: The fabricated structures (as shown in Fig. 7) were measured using an HP 8510 network analyzer and two GSG probes (Picoprobe Model 50A, dc–50 GHz) with an on-wafer thru-reflect-line (TRL) calibration for 2–50 GHz. The calibration kits have multiple delay lines to cover the 2–50-GHz band [17] and the TRL calibration calculates the propagation constant of the CPW lines, (dB/cm) and (rad/cm), which is used in the circuit simulations of the vertical transitions. Fig. 10 shows the measured and simulated results. As seen from this figure, the measured results show return loss better than 15 dB up to 50 GHz. The circuit simulation results in Fig. 10 are from ADS with the pi-model and physical transmission lines (e.g., dB/cm and rad/cm at 40 GHz). The circuit values of the pi-model used in the simulation are shown in Table II, and the phase constant and attenuation of the transmission lines are based on the TRL calibration data. The HFSS simulations have been changed to simulate the fabricated structures with a gold conductivity of 3.3 10 m and a loss tangent of 0.08 for the SU-8 [18]. A reasonable agreement between the full-wave electromagnetic field simulation, circuit model simulation, and measurements is shown in Fig. 10. 2) -Band Design: The -band design is similar to the -band design, but with smaller microbumps. Three different -band test structures, detailed in Fig. 11, were fabricated and measured. The measurements were done separately in three frequency bands (2–50, 50–75, and 75–110 GHz). On-wafer TRL calibrations were performed in each band and after each calibration, the isolation between the pair of short standards was measured for comparison against the isolation between the test channels. In the test structure shown in Fig. 11(a), channel-I (between ports P1 and P2) has back-to-back vertical transitions,

Fig. 11. Three test structures for the -band vertical transition. The thickness of SU-8 is 36 m. The dimensions of the vertical transition are detailed in the Fig. 3 and Table I. CPW dimensions are 15/30/15 m.

Fig. 12. Simulation and measurement results of test structure shown in Fig. 11(a). The circuit simulation was done with Pi-models and CPW transmission lines. The circuit values of the Pi-model and the dimensions of the CPW are detailed in Table II and Fig. 11.

whereas channel-II has no vertical transition and is adjucent to channel-I. The center-to-center distance between the two channels is 300 m. The simulation and measurement results are shown in Fig. 12. Both the simulation and measurement results show a return loss of better than 14 dB up to 90 GHz and better than 10 dB to 110 GHz. Channel-II has better return loss, but the insertion loss of both channels is nearly identical, as can be seen in Fig. 13, along with the calculated loss of a CPW line with a length of channel-I. The calculated loss is based on the

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Fig. 13. Loss comparison for Fig. 11(a). Line loss is calculated from the TRL calibration data.

Fig. 14. Isolation between channels P1 and P4, as shown in Fig. 11(a). Ports P2 and P3 are left open during the measurement.

attenuation data of the CPW lines from TRL calibration. From Fig. 13, the insertion loss per transition is better than 0.1 dB at 40 GHz. For higher frequencies, it is difficult to measure insertion loss with high accuracy. To measure the isolation, the insertion loss between port P1 and P4 [as shown in the Fig. 11(a)] was measured, leaving the other ports open, and is shown in Fig. 14. The isolation between these two channels is better than 30 dB up to 50 GHz. At higher frequencies, the isolation decreases, but remains better than 18 dB. The test structure (b) is similar to (a), but both channels in test structure (b) include back-to-back vertical transitions. The results are similar to that of channel-I in test structure (a). The results at the measurement reference plane are plotted in Fig. 15 and show good agreement between the HFSS and circuit simulations. The circuit model simulation uses the phase constant and attenuation of the transmission lines calculated by TRL calibration data. The isolation between the two channels is also measured under similar

Fig. 15. Simulation and measurement results of the test structure shown in Fig. 11(b).

Fig. 16. Isolation between channels P1 and P4, as shown in Fig. 11(b). Ports P2 and P3 are left open during the measurement.

conditions as test structure (a) and the results are shown in Fig. 16. In the frequency range 90–110 GHz, the isolation is slightly worse than test structure (a), which could be due to increased coupling between the pair of vertical transitions. The measurement results of test structure (c) are shown in Figs. 17 and 18. In test structure (c), Channel-I has back-to-back vertical transitions, while Channel-II does not. The insertion loss of both channels is around 4 dB at 100 GHz, which is double the loss of channel-I in structure (a) (as shown in Fig. 12), but the insertion loss between these two channels in test structure (c) remains close (as shown in Fig. 13). The increased insertion loss is likely due to the discontinuities in the CPW lines since air bridges are not included around the CPW corners. The isolation between the two channels (Fig. 18) is also worse by comparison, which points to radiation of the discontinuities in the CPW lines. B. Reliability The integration of high-performance GaAs devices with lowcost silicon devices would significantly improve system perfor-

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Fig. 17. Measurement results of crossing channels shown in Fig. 11(c).

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Fig. 19. Thermal cycle test results. The dash lines is the RF performance before thermal cycle test. The solid line show the RF performance of three independent test samples that have back-to-back vertical transitions after 100 thermal cycles ( 40 C–125 C).

procedure shown in Fig. 2. CPW dimensions of m and m were chosen for the quartz substrate (500- m thick). Due to limited access to the thermal cycle test equipment, the test was stopped after 100 cycles. However, as seen in Fig. 19, the preliminary thermal cycle test results are promising. V. CONCLUSION

Fig. 18. Isolation between channels P1 and P2, as shown in Fig. 11(c). Ports P3 and P4 are left open during the measurement. TABLE III THERMAL EXPANSION COEFFICIENTS FOR Si, GaAs, and

Vertical RF transitions for heterogeneous integration with interlocking structures fabricated using SU-8 have been demonstrated in this paper. The measurement results show excellent performance up to 110 GHz with insertion loss less than 0.1 dB per transition at 40 GHz. Designs for - and -band have been presented with excellent agreement between simulations and measurement. The vertical RF transition with mechanical fit presented in this paper can provide a useful alternative for millimeter-wave circuits packaging and vertical interconnects since the SU-8 structure maintains the precisely defined dimensions within the vertical transition. ACKNOWLEDGMENT

mance while remaining relatively low cost. However, the coefficient of thermal expansion (CTE) mismatch is a big concern for the reliability of heterogeneous integration. The CTE difference between different substrates will dominate the mismatch. Temperature cycling is a well-known method for evaluating package reliability. The end-customer reliability requirement for the packaged device is expressed principally by a temperature cycle test (TCT) excursion range and number of cycles to first failure. The most prevalent requirement for flip-chip packages is TCT ( 40 C–125 C) for 1000 cycles [19]. The CTE difference between Si and quartz is close to that between Si and GaAs, as shown in Table III. Since quartz is less expensive, it was used instead of GaAs for this test. The CPW lines were redesigned for quartz by following the same design

The authors would like to acknowledge the support of Dr. D. Palmer, U.S. Army Research Office (ARO), Adelphi, MD. The authors also would like to acknowledge the help of Dr. C. Smith with SU-8 processing. REFERENCES [1] A. Jentzsch and W. Heinrich, “Theory and measurements of flip-chip interconnects for frequencies up to 100 GHz,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 5, pp. 871–878, May 2001. [2] C.-C. Kuo, P.-A. Lin, H.-C. Lu, Y.-S. Jiang, C.-M. Liu, Y.-M. Hsin, and H. Wang, “ -band flip-chip assembled CMOS amplifier with transition compensation network for sip integration,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2010, pp. 465–468. [3] W. Heinrich, “The flip-chip approach for millimeter wave packaging,” IEEE Microw. Mag., vol. 6, pp. 36–45, Sep. 2005. [4] L. Chen, J. Wood, S. Raman, and N. S. Barker, “Vertical RF transition with mechanical fit for three-dimensional heterogeneous integration,” in Eur. Microw. Integr. Circuit Conf., Oct. 2008, pp. 534–537. [5] C. Luk, Y. Chan, and K. Hung, “Development of gold to gold interconnection flip chip bonding for chip on suspension assemblies,” in Proc. 51st Electron. Compon. Technol. Conf., 2001, pp. 1040–1044.

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[6] L.-H. Hsu, W.-C. Wu, E. Chang, H. Zirath, Y.-C. Hu, C.-T. Wang, Y.-C. Wu, and S.-P. Tsai, “Design of flip-chip interconnect using epoxy-based underfill up to -band frequencies with excellent reliability,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 8, pp. 2244–2250, Aug. 2010. [7] H. Lorenz, M. Despont, N. Fahrni, J. Brugger, P. Vettiger, and P. Renaud, “High-aspect-ratio, ultrathick, negative-tone near-UV photoresist and its applications for MEMS,” Sens. Actuators A, Phys., vol. 64, no. 1, pp. 33–39, 1998. [8] M. Chapman and S. Raman, “A 60-GHz uniplanar MMIC 4 subharmonic mixer,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 11, pp. 2580–2588, Nov. 2002. [9] J. Thorpe, D. Steenson, and R. Miles, “High frequency transmission line using micromachined polymerdielectric,” Electron. Lett., vol. 34, no. 12, pp. 1237–1238, 1998. [10] Z. Feng, W. Zhang, B. Su, K. Gupta, and Y. Lee, “RF and mechanical characterization of flip-chip interconnects in CPW circuits with underfill,” IEEE Trans. Microw. Theory Tech., vol. 46, no. 12, pp. 2269–2275, Dec. 1998. [11] A. Jentzsch and W. Heinrich, “Optimization of flip-chip interconnects for millimeter-wave frequencies,” in IEEE MTT-S Int. Microw. Symp. Dig., 1999, vol. 2, pp. 637–640. [12] D. Pozar, Microwave Engineering, 3rd ed. New York: Wiley, 2009, p. 188. [13] W. Heinrich, A. Jentzsch, and G. Baumann, “Millimeter-wave characteristics of flip-chip interconnects for multichip modules,” IEEE Trans. Microw. Theory Tech., vol. 46, no. 12, pt. 2, pp. 2264–2268, Dec. 1998. [14] “Adhesion results-shear analysis,” MicroChem Corporation, Newton, MA, Datasheet. [15] C. Smith, H. Xu, and N. S. Barker, “Development of a multi-layer SU-8 process for terahertz frequency waveguide blocks,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2005, pp. 493–442. [16] X. Ang, G. Zhang, B. Tan, J. Wei, Z. Chen, and C. Wong, “Direct metal to metal bonding for microsystems interconnections and integration,” in Proc. 7th Electron. Packag. Technol. Conf., Dec. 2005, vol. 2, pp. 390–393. [17] R. Marks, “A multiline method of network analyzer calibration,” IEEE Trans. Microw. Theory Tech., vol. 39, no. 7, pp. 1205–1215, Jul. 1991. [18] S. Lucyszyn, “Comment: Terahertz time-domain spectroscopy of films fabricated from SU-8,” Electron. Lett., vol. 37, no. 20, p. 1267, 2001. [19] R. Lanzone, “How flip-chip package interactions affect the manufacture of high-performance ICs,” Chip Scale Rev., vol. 10, pp. 43–48, Jan./Feb. 2006. Lihan Chen (S’06) received the B.S. degree in electrical engineering from the Nanjing University of Aeronautics and Astronautics, Nanjing, China, in 2003, and the M.S. degree in electrical engineering from the Southeast University, China, in 2006. Since 2006, he has been a Graduate Student with the Charles L. Brown Department of Electrical and Computer Engineering, University of Virginia, Charlottesville. His research is focused on applying micromachining techniques for submillimeter-wave circuits. He is also interested in RF systems and circuits design. Joseph Wood (S’08) received the B.S. and M.S. degrees in electrical engineering from the Virginia Polytechnic Institute and State University, Blackburg, in 2006 and 2008, respectively. He currently is an RF Design and Test Engineer with BAE Systems, Merrimack, NH. His interests include integration and packaging strategies for RF/microwave systems.

Sanjay Raman (S’84–M’98–SM’06) was born April 25, 1966, in Nottingham, U.K. He received the Bachelor’s degree in electrical engineering (with highest honor) from the Georgia Institute of Technology, Atlanta, in 1987, and the M.S. and Ph.D. degrees in electrical engineering from The University of Michigan at Ann Arbor, in 1993 and 1998 respectively. From 1987 to 1992, he was a Nuclear Trained Submarine Officer with the U.S. Navy. In January 1998, he joined the faculty of the Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, where he is currently a Professor. He is currently on assignment as a Program Manager with the Microsystems Technology Office, Defense Advanced Research Projects Agency (DARPA), Arlington, VA. He has authored or coauthored over 80 publications in peer-reviewed journals and conferences and a number of other invited presentations. His programmatic interests include adaptive RF/mixed-signal integrated circuits (ICs), silicon-based microwave/millimeter-wave transceivers, RF MEMS, and heterogeneous integration technologies. His research interests include RF/microwave/millimeter-wave integrated circuits and antennas, high-speed/mixed-signal ICs, interconnects and packaging, RF MEMS/nanoelectromechanical (MEMS/NEMS) devices, and integrated wireless communications and sensor microsystems. Dr. Raman has served as an associate editor for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. He currently serves on the Technical Program Committee of the IEEE Radio Frequency Integrated Circuits Symposium. He was the recipient of the 2007 Virginia Tech College of Engineering Faculty Fellow, the 2000 Presidential Early Career Award for Scientists and Engineers (PECASE) (1999 NSF CAREER Award), the Virginia Tech College of Engineering Outstanding New Assistant Professor Award (2000), and a 1996–1997 Armed Forces Communications and Electronics Association (AFCEA) Postgraduate Fellowship. N. Scott Barker (S’94–M’99) received the B.S.E.E. degree from the University of Virginia, Charlottesville, in 1994, and the M.S.E.E. and Ph.D. degrees in electrical engineering from The University of Michigan at Ann Arbor, in 1996 and 1999 respectively. From 1999 to 2000, he was a Staff Scientist with the Naval Research Laboratory. In 2001, he joined the Charles L. Brown Department of Electrical and Computer Engineering, University of Virginia, where he is currently an Associate Professor. He recently started the company Dominion MicroProbes Inc., to develop the terahertz frequency wafer-probe technology coinvented by his group at the University of Virginia. He has authored or coauthored over 60 publications. His research interests include applying MEMS and micromachining techniques to the development of millimeter-wave and terahertz circuits and components. Prof. Barker has served on the MTT-21 Technical Committee on RF-MEMS since 2000, and was the committee chair from 2008 to 2011. He has also served for many years on the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwavwe Symposium (IMS) Technical Program Review Committee. In 2011, he served on the Steering Committee of the IEEE MTT-S IMS, Baltimore, MD. He will be the Technical Program Committee (TPC) vice-chair for the 2014 IEEE MTT-S IMS, Tampa, FL. He was an associate editor of the IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS from 2008 to 2010. He is currently an associate editor for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. He was the recipient of the Charles L. Brown Department of Electrical and Computer Engineering New Faculty Teaching Award in 2006, the Faculty Innovation Award in 2004, the 2003 National Science Foundation (NSF) CAREER Award, the 2000 IEEE Microwave Prize, and First and Second Place of the Student Paper Competition, IEEE MTT-S IMS.

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Ultrafast Low-Loss 42–70 GHz Differential SPDT Switch in 0.35 m SiGe Technology Mury Thian and Vincent F. Fusco, Fellow, IEEE

Abstract—This paper presents an ultrafast wideband low-loss single-pole double-throw (SPDT) differential switch in 0.35 m SiGe bipolar technology. The proposed topology adopting currentsteering technique results in a total measured switching time of 75 ps, which suggests a maximum switching rate of 13 Gb/s, the fastest ever reported at V-band. In addition, the switch exhibits an insertion loss lower than 1.25 dB and an isolation higher than 18 dB from 42 GHz to 70 GHz. Index Terms—Absorptive, balanced circuits, current steering, heterojunction bipolar transistor (HBT), insertion loss, integrated circuit (IC), isolation, mm-wave, rise time, silicon germanium (SiGe), single-pole double-throw (SPDT), switches, switching speed, transistor circuits, V-band, 60 GHz.

I. INTRODUCTION

A

SIMPLE direct-conversion transmitter architecture for use in 60 GHz radio, Fig. 1, was recently proposed in [1]. The transmitter is capable of handling BPSK/QPSK/OQPSK, and due to the generous bandwidth of at least 5 GHz allocated in the 60 GHz band worldwide [2] it is possible to realize a high-speed radio with several Gb/s data rate using the architecture in Fig. 1. The single-pole double-throw (SPDT) switch in Fig. 1 is one of the key components that predominantly determine the modulator’s highest data rate. The rise time and fall time of the GaAs switch in [1] are, respectively, 1.4 ns and 1.8 ns compared to 3.1 ns and 2.7 ns of the 90 nm CMOS switch reported in [3]. Over the past decade, SiGe technology has been rapidly imand maximum oscilproving with the transit frequency of the advanced SiGe bipolar transislation frequency tors now exceeded 200 GHz. When compared to III-V semiconductor processes, SiGe technology holds the promise for high level of integration, reduced cost, and power dissipation. Comparisons between SiGe and CMOS devices in [4] suggest and of SiGe are superior by 2–3 generations to that (i) CMOS, i.e., 0.18 m SiGe with of 200 GHz is comparable to 65 nm CMOS, leading to lower mask/wafer cost, and (ii) SiGe Manuscript received April 23, 2011; revised September 29, 2011; accepted November 25, 2011. Date of publication January 24, 2012; date of current version March 02, 2012. This work was supported in part by the Northern Ireland Department for Employment and Learning under Strengthening All Island Mobile Wireless Future’s Programme and in part by FP7 Marie Curie IAPP “GigaRadio”. M. Thian was with the ECIT Institute, Queen’s University Belfast, Belfast B17 1NN, U.K. He is on a secondment to Infineon Technologies, 9500 Villach, Austria (e-mail: [email protected]). V. F. Fusco is with the ECIT Institute, Queen’s University Belfast, Belfast B17 1NN, U.K. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2180395

Fig. 1. Reduced architecture for V-band QPSK transmitter.

offers better dynamic range and higher voltage handling capability than CMOS, i.e., 0.18 m SiGe supports for 5 V collector voltage compared to 1 V in 65 nm CMOS. Sub-nanosecond SiGe switches for use in the 24 GHz ultrawideband (UWB) automotive radar systems were described in [5]–[7]. Extending the work in [1], the design and characterization of an ultrafast SPDT switch operating in the V-band are discussed in this paper. In addition, the common-base (CB) configuration employed in the switch circuits in [6], [7] results in a rather poor noise figure (NF) of 13.3 dB at 24 GHz. In this paper, common-emitter (CE) topology is proposed with the expectation to minimize NF [8] but at the expense of reduced isolation (base-collector capacitance that couples the input and the output in the CE configuration is typically higher than the collector-emitter capacitance in the CB configuration). II. BASIC OPERATION AND DESIGN The SPDT switch circuit is illustrated in Fig. 2. The current-steering technique is adopted for fast switching operation. can be steered either to differential The tail current or - . To steer the majority current of pairs should to - , the potential applied at the base of ( is the thermal voltage and be at least 10 mV at room temperature) more positive than the . In this case, will be potential at the base of switched ON while - is switched OFF thus producing the port. If is steered to - , output signal only at will be ON while is OFF thus differential pair port. producing the output signal only at and as well as and are In Fig. 2, the bases of connected. As a result, the switch input will always see a parallel combination of ON and OFF impedances. Differential pairs are used as a dummy to maintain the output and impedance in the ON and OFF states. For example, when difis switched ON, will be switched ferential pair OFF and when - is switched OFF, - will be switched port in the ON. Consequently, the impedances seen by ON and OFF states will remain the same. The same applies to port.

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Fig. 2. High-speed SPDT differential switch circuit with current steering. TABLE I CIRCUIT AND TRANSISTOR PARAMETERS

As opposed to the reflective switches in [1] and [3], it is clear from the explanation above that the proposed switch is absorptive at both its input and output meaning that the input reflection coefficient and the output reflection coefficient remain constant regardless of the states of the switch. In a system deployment, this feature is essential in order to help mitigate unwanted transient-related effects, such as pulse reflection and frequency pulling of a signal source as well as to minimize the phase and amplitude imbalance of the 90 coupler in Fig. 1 due to inappropriate termination at the isolation port. The switching time is, in principle, determined by two factors: (i) the inherent rise time of the transistors core and (ii) the bandwidth of the output matching network. From the analysis in [7], it turns out that the latter dominates the switching time. Broadband output matching networks ( - - ) are deployed in the circuit in Fig. 2. On the other hand, simple networks are sufficient to match the switch input to 50 since the bandwidth of the input matching has little effect on the switching time. The inductors (implemented using microstrip lines) and capacitors in Fig. 2 are also used as dc-feed inductances and dc-blocking capacitances, so that no additional external components are needed. Their values are given in Table I in conjunction with the transistors size. The switch is designed and implemented using an Infineon 0.35 m SiGe technology [9]. A high-speed (rather than ultrahigh speed) NPN transistor is chosen from the transistor set available from the foundry since it has a higher (1.4 V) and (5.8 V). The peak of , i.e., 170 GHz and , i.e., 250 GHz occur at a collector current density of 5 mA/ m . This

parameter was obtained from the measurements of the transistors with an emitter mask size of 0.35 2.8 m or the effective emitter size of m . The size of the core transistors is resulted from the optimization of the switch performance in the simulation that involves the trade-offs between insertion loss, isolation, and switching speed. For example, large devices typically have low ON-state resistance (hence low insertion loss) but rather high capacitance (hence poor isolation and slow switching response). In addition, devices with certain size may lead to very low or high input impedances that are not easy to match to the 50- system impedance. While optimizing the transistors size, was set accordingly so that the transistors are biased near the maximum . For example, for the optimum device size of 4 m, the bias current for each transistor is set to m mA/ m mA. The size of the transistors doubles that of in order to handle twice higher dc currents. Four metal layers (CU1–CU4) are available for the implementation of the passive components. The microstrip lines used in the design was realized using the top metal (CU4) with a thickness of 2.8 m and CU2 as the ground plane. The width of the ground plane is optimized to be at least three times larger than the width of the signal line. The parasitic shunt capacitance of the 68 68 m pad, i.e., 32 fF is resonated at the centre frequency 60 GHz using a shorted shunt stub with inductance value of 215 pH. This stub is 365 m long and 2.4 m wide. The return loss of this resonant structure combined in series with a 50- routing line (280 m long and 4.9 m wide) used to interconnect at the input is presented in Fig. 3. The same strategy is applied to the output ports. The broadband characteristic of this structure removes the need for the input and output pads de-embedding in the measurements. A current source that generates the tail current is implemented using a current mirror with emitter resistive degeneration so as to prevent sudden exponential increase of current caused by small fluctuations.

THIAN AND FUSCO: ULTRAFAST LOW-LOSS 42–70 GHz DIFFERENTIAL SPDT SWITCH IN 0.35 m SiGe TECHNOLOGY

Fig. 3. Simulated return loss of a 68 68 m pad in parallel with a shorted shunt stub and in series with a 280 m long and 4.9 m wide 50- routing line. Port 1 is connected to the pad and port 2 to the 50- routing line.

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Fig. 6. Simulated noise figure.

Fig. 4. Simulated output waveforms and control signal.

Fig. 7. Chip microphotograph of the SPDT switch (850

920 m ).

III. MEASURED RESULTS

Fig. 5. Simulated (a) return losses and (b) insertion loss and isolation (port 1–2: , port 3–4: , port 5–6: ).

The effectiveness of the broadband output matching strategy coupled with the current-steering technique to design a highspeed SPDT switch as described above was verified through transient simulations in RF Spectre with a 60 GHz carrier signal and 5 Gb/s pulse train. The simulated modulated output signal is depicted in Fig. 4. Fig. 5(a) shows that return losses of higher than 10 dB is obtained across 10 GHz bandwidth from 55 to 65 GHz at the input, across 23 GHz from 52 to 75 GHz at , and across 25 GHz from 48 to 73 GHz at . The simulated insertion loss and the isolation between input and output port as well as the isolation between the two output ports are given in Fig. 5(b). Simulated NF across 40 GHz bandwidth is lower than 9.8 dB and this is illustrated in Fig. 6.

The chip microphotograph of the SPDT switch is shown in Fig. 7. It occupies 850 920 m die area, including pads. The differential SPDT switch was characterized through on-chip measurements. GSGSG balun probes with 100 m pitch were used to probe the balanced input and output ports. For the S-parameter measurements, the circuit is switched ON and OFF by applying 0.5V dc at 15 mA and V dc at mA, respectively, through a GSG probe to the control port. The circuit was operated with V, V, V, V. was tuned to 20 mA so as to achieve the best compromised switch performances in terms of insertion loss, isolation, and operating bandwidth. The measured S-parameters obtained from the on-wafer probing are illustrated in Figs. 8 and 9. The insertion loss is lower than 1.25 dB across a 28-GHz bandwidth from 42 GHz to 70 GHz. Within this bandwidth, isolation higher than 18 dB and reverse transmission higher than 23 dB were measured. The measured insertion loss and isolation between the input port and the other output port , i.e., and respectively, are also plotted in Fig. 8 and they are similar to . The is better than the at low frequencies (below 50 GHz) but worse at high frequencies (above 65 GHz). Above 63 GHz, the is better than the . The isolation could further be improved by adopting cascode rather

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Fig. 8. Measured insertion loss, isolation, and reverse transmission (port 1: , port 2: , port 3: ).

Fig. 10. Measured transfer characteristic.

Fig. 11. Measured modulated output signal with 3.3 Gb/s pulse signal and 57 GHz carrier signal.

Fig. 9. Measured input and output return loss.

than CE configuration but this may result in increased insertion loss, poor NF [8], and reduced voltage swing headroom. Measured return loss in Fig. 9 is not as good as the simulation result in Fig. 5(a) due to the following: (i) for the calibration involving the balun probes, Cascade Microtech suggests a hybrid Line-Reflect-Reflect-Match (LRRM)/Short-Open-Load-Reciprocal (SOLR) available within WinCal XE to be used. However, due to limited software resources, LRRM alone available within WinCal v.3.2.2.6 was used in the calibration; (ii) the transmission line model used in the simulations for the input and output matching networks was verified through measurements provided by the foundry proved accurate only up to K-band; (iii) phase and amplitude imbalances are introduced by the balun probes. Under perfect balance assumption, the anti-phase signals would see the shared connection node of and , Fig. 2, as a virtual ground and therefore the routing line to the pad has no detrimental effects on the output matching. When amplitude and phase imbalances are present, the connection node would be no longer virtual ground and therefore the rather thin long routing line is expected to introduce some mismatch at the output. Nevertheless, in conformity with the theory described in Section II, absorptive characteristics at both the input and output ports are observed from the measurement results in Fig. 9. Once the input and output mismatches are compensated, the insertion loss is expected to improve. Fig. 10 presents the input-output transfer characteristic. The measured input referred 1 dB compression point at 55

Fig. 12. Measured modulated output signal with 2 Gb/s pulse signal and 60 GHz carrier signal.

and 60 GHz is about 1 dBm. This power handling, similar to that of the SiGe switch reported in [7], is lower than the PIN diode or FET switches but the specific applications for this switch require an input signal of only 5 dBm. For the time-domain envelope measurements, the input and output ports were connected to the Agilent E8257D signal generator and the Agilent 86100D Infiniium DCA-X sampling oscilloscope, respectively. The control port was connected to the Agilent E8403A pulse generator. Figs. 11 and 12 show the modulated output signal. As limited by the available test equipment, the narrowest pulse width that can be applied to the switch is 300 ps correspond to a bit rate of 3.3 Gb/s. The rise/fall time of 25 ps/50 ps, , can be determined from Fig. 11. On the other hand, from Fig. 13, the rise/fall time of the pulse signal coming out from the generator, , with the slope of 0.15 ps/mV is about 5–10 ps. The actual switching time of the circuit under test, , can be computed using (1). The total rise and fall time of 75 ps (neglecting the small rise time contribution of the pulse generator) suggests that the maximum switching rate is 13 Gb/s. The

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[3] M. Uzunkol and G. M. Rebeiz, “A low-loss 50–70 GHz SPDT switch in 90 nm CMOS,” IEEE J. Solid-State Circuits, vol. 45, no. 10, pp. 2003–2007, Oct. 2010. [4] M. Racanelli, S. Voinegescu, and P. Kempf, “High performance SiGe BiCMOS technology,” in Proc. IEEE/ACES Int. Conf. Wireless Communications and Applied Computational Electromagnetics, Honolulu, HI, Apr. 2005, pp. 430–434. [5] I. Gresham and A. Jenkins, “A fast switching, high isolation absorptive SPST SiGe switch for 24 GHz automotive applications,” in Proc. Eur. Microw. Conf., Munich, Germany, Oct. 2003, pp. 903–906. [6] T. M. Hancock, I. Gresham, and G. M. Rebeiz, “A differential subnanosecond high-isolation absorptive active SiGe 24 GHz switch for UWB applications,” in Proc. IEEE Radio Frequency Integrated Circuits Symp., Fort Worth, TX, Jun. 2004, pp. 497–500. [7] T. M. Hancock and G. M. Rebeiz, “Design and analysis of a 70-ps SiGe differential RF switch,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 7, pp. 2403–2410, Jul. 2005. [8] M. Gordon and S. P. Voinigescu, “An inductor-based 52-GHz 0.18 m SiGe HBT cascode LNA with 22 dB gain,” in Proc. ESSCIRC, Leuven, Belgium, Sep. 2004, pp. 287–290. [9] J. Böck, H. Schäfer, K. Aufinger, R. Stengl, S. Boguth, R. Schreiter, M. Rest, H. Knapp, M. Wurzer, W. Perndl, T. Böttner, and T. F. Meister, “SiGe bipolar technology for automotive radar applications,” in Proc. IEEE Bipolar/BiCMOS Circuits Technology Meeting, Montreal, QC, Canada, Sep. 2004, pp. 84–87.

Fig. 13. Measured control signal.

TABLE II COMPARISON WITH RECENTLY PUBLISHED SPDT SWITCHES

dynamic isolation of the switch that is the ratio between the ON and OFF amplitudes of the RF envelope can also be determined from the modulated output signals in Figs. 11 and 12 and their values are about 25 dB, slightly higher than the static isolation in Fig. 8. Performance comparison of the SPDT switch reported here with others is presented in Table II. (1)

Mury Thian received the B.Sc. degree from Atma Jaya Catholic University, Jakarta, Indonesia, the M.Sc. degree from Delft University of Technology, the Netherlands, and the Ph.D. degree from the Queen’s University of Belfast, U.K., all in electronic engineering. From 2003 to 2004, he was with Philips Semiconductors, Nijmegen, The Netherlands. In 2008, he worked with the University of Birmingham, U.K., as a Research Fellow. Since 2009, he has been with the Queen’s University of Belfast working on mm-wave high-speed radio technologies. In 2011, he was seconded to Infineon Technologies AG, Villach, Austria, as a Marie Curie Fellow. His current research interests include analogue and mixed-signal circuits, RFIC/MMIC design, wireless transceiver for high-speed data communication, and efficiency enhancement and linearization techniques for power amplifiers. Dr. Thian has authored 30 journal and conference papers. He was the 2008 finalist of the British Association for the Advancement of Science.

IV. CONCLUSION Design and characterization of an ultrafast wideband low-loss SPDT differential switch in 0.35 m SiGe technology have been presented. The switch exhibits excellent insertion loss lower than 1.25 dB and isolation higher than 18 dB from 42 to 70 GHz. The total measured switching time is 75 ps. The switch was characterized at 3.3 Gb/s but switching rates up to 13 Gb/s should be possible. ACKNOWLEDGMENT The authors would like to thank Dr. Franz Dielacher and Dr. Marc Tiebout (Infineon Technologies) for the technical discussion and Dr. Neil Buchanan (ECIT Institute, Queen’s University Belfast) for the measurement assistance. REFERENCES [1] C. Wang and V. F. Fusco, “Reduced architecture V-band transmitter,” IET Microw. Antennas Propag., vol. 4, no. 11, pp. 1948–1954, Nov. 2010. [2] S.-K. Yong, P. Xia, and A. V. Garcia, 60 GHz Technology for Gbps WLAN and WPAN: From Theory to Practice. Chichester, U.K.: Wiley, 2011.

Vincent Fusco (S’82–M’82–SM’96–F’04) received the Bachelor’s degree in electrical and electronic engineering (First Class Honours) and the Ph.D. degree in microwave electronics from the Queen’s University of Belfast, U.K. Since 1995, he has held a personal chair in High Frequency Electronic Engineering. His research interests include nonlinear microwave circuit design, and active and passive antenna techniques. The main focus for this research is in the area of wireless communications. At present he is technical director of the High Frequency Laboratories at ECIT (www.ecit.qub.ac.uk), where he is also director of the International Centre for Research for System on Chip and Advanced MicroWireless Integration (SoCaM). Prof. Fusco has published numerous scientific papers in major journals and in referred international conferences, and is the author of two text books. He holds several patents and has contributed invited chapters to books in the field of active antenna design and EM field computation. He is a Fellow of the Royal Academy of Engineering, a Fellow of the Institution of Engineering and Technology (IET), a Fellow of the Institute of Electrical and Electronic Engineers (IEEE), and of the Royal Irish Academy. In 1986, he was awarded a British Telecommunications Fellowship and in 1997 he was awarded the NI Engineering Federation Trophy for outstanding industrially relevant research.

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Broadband Millimeter-Wave Single Balanced Mixer and Its Applications to Substrate Integrated Wireless Systems Zhen-Yu Zhang, Ying Rao Wei, and Ke Wu, Fellow, IEEE

Abstract—This paper presents an innovative broadband millimeter-wave single balanced diode mixer that makes use of a substrate integrated waveguide (SIW)-based 180 hybrid. It has low conversion loss of less than 10 dB, excellent linearity, and high port-to-port isolations over a wide frequency range of 20 to 26 GHz. The proposed mixer has advantages over previously reported millimeter-wave mixer structures judging from a series of aspects such as cost, ease of fabrication, planar construction, and broadband performance. Furthermore, a receiver front-end that integrates a high-performance SIW slot-array antenna and our proposed mixer is introduced. Based on our proposed receiver front-end structure, a -band wireless communication system with M-ary quadrature amplitude modulation is developed and demonstrated for line-of-sight channels. Excellent overall error vector magnitude performance has been obtained. Index Terms—Balanced mixer, broadband, error vector magnitude (EVM), millimeter-wave, 180 hybrid, phase shifter, receiver front-end, substrate integrated waveguide (SIW).

I. INTRODUCTION

R

ECENTLY, millimeter-wave techniques have become prevalent in the development of high-speed communication and high-resolution imaging and advanced sensing applications [1]–[3]. Meanwhile, with the increase of operation frequency into the millimeter-wave region, low-cost wideband transmitters or receivers are required for the system design. A multi-antenna architecture due to short wavelength at millimeter-wave frequencies, as shown in Fig. 1, may be used in such a broadband system without sacrificing the required antenna performance. As one basic building block of communication systems, millimeter-wave mixers have widely been studied, especially with regard to the aspects of port isolation and spurious rejection. As has been well known, balanced-type mixers have the advantages of good isolation and undesired signal suppression and higher power-handling capabilities. Manuscript received May 22, 2011, revised September 24, 2011; accepted September 27, 2011. Date of publication November 18, 2011; date of current version March 02, 2012. This work was supported in part by the Natural Sciences and Engineering Research Council of Canada and Quebec FQRNT. Z.-Y. Zhang is with SDP Telecom, Montreal, QC, Canada H9P 1J1 (e-mail: [email protected]). Y. R. Wei is with SMSC Ottawa, ON, Canada K2K 0G7 (e-mail: [email protected]) K. Wu is with the Poly-Grames Research Center, Département de Génie Électrique, École Polytechnique de Montréal, Montreal, QC, Canada H3T 1J4 (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2172808

Typically, balanced mixers consist of nonlinear devices interconnected by single or multiple hybrids, transformers, or baluns. In particular, the fundamental types of single balanced mixers usually involve 180 or 90 hybrids. Compared with the 90 hybrid mixers [4], the 180 circuits generally exhibit superior electrical performance, such as better RF-to-LO isolation and less spurious products [5]. On the other hand, the development of a low-cost millimeter-wave wireless system truly presents a great technological and design challenge,even though a number of low-temperature co-fired ceramic/RF integrated circuits (LTCC/RFIC) based chip sets as well as monolithic microwave integrated circuits (MMICs) have already been demonstrated for the design of millimeter-wave transmitters and/or receivers [6]–[7]. The fundamental bottleneck lies in low-cost development, high-density integration and self-consistent packaging of complete transceivers in which high-gain antenna and other passive/active components should be completely integrated. This is because antennas and circuits should not be completely separated electromagnetically from the design point of view in the millimeter-wave frequency range. As an excellent and emerging scheme for realizing compact transceiver modules, the substrate integrated waveguide (SIW) technique has been widely studied and demonstrated. The fundamental concept of SIW is to synthesize the traditional non-planar hollow rectangular waveguide into planar substrate with metallised slots or trenches or even arrays of metallic via posts [8]–[10]. Compared with other transmission line techniques, the SIW design platform has attractive advantages of low-profile structure, high Q-factor, and low insertion loss. It has recently been demonstrated that SIW components could easily be realized up to 180 GHz and beyond using a thick-film ceramic fabrication technique [11]. In this paper, we present a broadband millimeter-wave single balanced mixer according to the circuit diagram shown in Fig. 2. Our proposed 180 hybrid consists of a standard -plane 3-dB coupler [12] and a novel 90 broadband SIW phase shifter. This phase shifter is designed on the basis of a nonradiating slot structure in SIW, namely, slotted SIW for simplicity. The proposed structure consists of two identical longitudinal slots that are placed symmetrically on different sides along the midline over the broad wall of the SIW. The fundamental mode of the slotted SIW line, which may be regarded as a specially arranged grounded coplanar waveguide (CPW) mixed with an SIW structure, is quasi-TEM mode , and its nearly zero-dispersive properties are instead of then used to design a broadband phase shifter.

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Fig. 1. Simplified illustration of a broadband millimeter-wave system.

Fig. 2. Circuit diagram of conventional single balanced diode mixer.

To demonstrate the design methodology and structural features, a -band prototype of the proposed broadband millimeter-wave single balanced mixer is designed and implemented with our printed-circuit-board (PCB) fabrication process and surface-mounted diodes. The proposed design methodology has been validated by simulated and measured results. In the past, various mixer topologies and techniques have been extensively studied. Compared with the conventional transmission line or monolithic microwave integrated circuit (MMIC)-based structures [13]–[15], our proposed mixer has its advantages of low-profile geometry, low insertion loss, broad bandwidth, excellent port-to-port isolation, and easy integration in SIW circuits. Our proposed mixer is also superior to the mixers recently reported using SIW techniques [4], [16]–[17] in terms of single-layer planar structure and electrical performance. In particular, mixers presented in [16]–[17] made use of multimetal-layer and quarter-wavelength structures, which are frequency-sensitive and only friendly to relatively lower band applications (i.e., -band). On the contrary, our proposed mixer can easily be used at millimeter-wave frequencies, and such a structure is favorable for the microwave IC applications. Moreover, our proposed receiver front-end structure, which integrates an SIW slot array antenna and our proposed mixer in a single-layer substrate, is developed as a particular effort to establish a geometry-compact, low-cost, and low-profile architecture. Experimental validation of a -band wireless communication system integrated with our proposed receiver front-end is then presented. Error vector magnitude (EVM) and signal-tonoise ratio (SNR) are studied for M-ary quadrature amplitude modulation (M-QAM) schemes. EVM is commonly used to

Fig. 3. Physical dimensions of the experimental prototype of the pro10.03 mm, 1.7 mm, 2.5 mm, posed 180 hybrid ( 1.34 mm, 7.36 mm, 6 mm, 1.55 mm, 0.2 mm, 5.1 mm). (a) Top view. (b) Cross-sectional view. and

measure the departure of signal constellation from its ideal reference in wireless communication standards [18]–[19]. In fact, the proposed mixer can also be employed in radar systems. II. 180 HYBRID IMPLEMENTED WITH BROADBAND SLOTTED SIW PHASE SHIFTER Fig. 3 illustrates our proposed 180 hybrid that consists of an -plane 3-dB coupler and a broadband 90 slotted SIW phase shifter. The substrate is RT6002 with a thickness of 0.254 mm and a dielectric constant . Copper cladding of the PCB laminate is 17 m, and plated copper thickness for the metallized trenches, as shown in Fig. 3, is 35 m. The so-called longitudinal slotted SIW transmission line (see the right-hand side of Fig. 3) is somewhat similar to a grounded CPW structure, as mentioned earlier. Herein, the fundamental transmission mode of the longitudinal slotted SIW is a quasi-TEM mode instead of a mode, and, thus, its nearly zero-dispersive properties can be used to design a broadband phase shifter [20]. The dominant mode of the slotted SIW line is compared with the grounded CPW mode. The circuit simulation is made with the aid of CST Microwave Studio 2009. Analysis is performed

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Fig. 6. Transverse electric field of the second normal mode at 40 GHz.

Fig. 7. Magnitude and evolution of the electric fields at the transition.

Fig. 4. Phase constants of the normal modes in the slotted SIW structure and of the isolated CPW and SIW modes.

arc. The proposed transition can be modeled using a simple impedance-transforming T network. By examining the real parts of the components, it can be verified that this transition works well and the radiation loss of this transition is negligible. Fig. 7 shows the magnitude of the electric field over the transition. It is observed that the energy in the SIW mode can be smoothly transformed into the grounded CPW mode of our slotted SIW structure. Again, in Fig. 3, it can be found that the conventional SIW works as a reference line, and the phase difference between these two lines is given by

(1)

Fig. 5. Transverse electric fields of the dominant mode (i.e., Fig. 3) at various frequencies.

’ plane in

by moving the SIW’s sidewalls close enough together so that the second higher mode cannot be supported. From Fig. 4, it can be observed that the phase constant of the dominant mode (Normal mode 1) exhibits an excellent agreement with that of the isolated grounded CPW mode. In Fig. 5, the transverse electric field of the dominant mode (i.e., Normal mode 1) is displayed at various frequencies, and the examined range is sufficiently broad to cover our frequency of interest. Once again, it reveals that the dominant mode is essentially a grounded CPW mode. It was mentioned in [21] that the proposed slotted SIW transmission line can also support waveguide modes. As a matter of fact, the second mode in this structure is observed as a half-mode SIW, and its cutoff frequency increases with a broader central line. As shown in Fig. 4, the cutoff frequency of the second mode (i.e., Normal mode 2) is clearly distinct from the SIW mode, which is analyzed by removing the slots in our structure. The transverse electric field of the second mode in Fig. 6 can further confirm our statement. It should also be noted that this second mode can be avoided by an appropriate excitation mechanism. For example, the second mode (half SIW mode) will not be generated in the proposed circuit since the signal is excited along the central conductor. In our circuit, the slotted SIW-to-SIW transition is designed in a tapered form, which is simply made in the form of a 90

where denotes the width of SIW sections, and represent lengths of the proposed slotted SIW line and the conventional SIW line, respectively, and and are the effective dielectric constants of the slotted SIW line and the conventional SIW line, respectively. The proposed broadband phase shifter is designed upon and , which can be obtained after working through some mathematical manipulation, as discussed in [20]. Given the desired phase difference , operation frequency , and SIW line width , the length of reference line and length of delay line can be calculated as follows:

(2a)

(2b) is determined by the where the effective dielectric constant dielectric constant of the substrate and geometries of the slotted SIW line, and it can be obtained easily with the aid of Ansoft’s High Frequency Structural Simulator (HFSS). For example, the effective dielectric constant corresponding to the geometries of the slotted SIW line shown in Fig. 3 is found to be 2.55. This phase shifter is theoretically compared with some of the well-known approaches, including a 90 meandered microstrip line, a 90 substrate integrated waveguide line, and the 90 phase shifter based on [22]. Since the bandwidth performance largely depends on the properties of the substrate, all of the comparison objects are designed on the same PCB substrate of

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Fig. 8. Comparison of the phase delays by using different approaches.

RT6002 with a thickness of 0.254 mm and and at the central frequency of 24 GHz. The comparison of the phase delays by using the different approaches mentioned above is described in Fig. 8. It can be found that our proposed approach is able to provide the broadest bandwidth with a specified phase tolerance (5 in Fig. 8). To comply with the fabrication condition based on our in-house PCB processing technique, a -band 180 hybrid is designed to verify the proposed design methodology and the above-discussed electrical performance. An experimental prototype is fabricated on substrate RT6002 with a thickness of 0.254 mm and dielectric constant . Physical dimensions of the designed broadband 180 hybrid are given in Fig. 3. Microstrip line feeders are used in the sum and difference input ports, and they are designed for 50- conditions. The transition between the SIW and microstrip line refers to a well-described tapered line structure given in [10]. The circuit simulation is made with the aid of Ansoft HFSS v12.0.1. The measurements are carried out by using an Anristu 37397 vector network analyzer. From Fig. 3, it should be noted that the output port impedance is set to be around 30 instead of 50 , considering a better matching to the diode impedance for the mixer design in Section III. For the convenience of experimental measurement, a quarter-wave microstrip impedance transformer is used at the output ports to convert the grounded CPW line to 50- microstrip line. Of course, the circuit performance degrades by doing this because of the discontinuities and limited bandwidth of the quarter-wave impedance transformer. Fig. 9(a) and (b) shows simulated and measured amplitude responses and phase balances of the -band 180 hybrid prototype, respectively. It can be observed that the measured amplitude and phase imbalance between output ports of the experimental prototype are within 1.5 dB and , respectively, across a broad bandwidth from 22 to 27 GHz. In addition, the input port isolation and return loss are both greater than 10 dB in the frequency range of interest. The discrepancy between the simulated and measured results is mainly attributed to effects of the impedance transformer. III. BROADBAND SINGLE BALANCED MIXER DESIGN A -band single balanced diode mixer is developed by employing the aforementioned 180 hybrid. Again, the mixer is

Fig. 9. Simulated and measured -parameters of the experimental prototype of the proposed 180 hybrid (a) amplitude responses and (b) phase balances.

Fig. 10. Photograph of the proposed broadband single balanced diode mixer.

fabricated on substrate RT6002 with 0.254-mm thickness and . Fig. 10 shows the photograph of our proposed broadband mixer. Diodes used in our circuit are a GaAs Schottky diode MGS901 from Aeroflex. Two butterfly stubs are used to prevent the LO and RF signals from leaking into the intermediate frequency (IF) port. In addition, a microstrip low-pass filter (LPF) with a cutoff frequency of 4 GHz is designed at the IF port to suppress the signals other than IF frequency. Since the diode resistance is approximately 30 at the RF and LO ports, the output impedance of the 180 hybrid is designed to

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Fig. 11. Simulated and measured conversion gains/losses of the proposed 13 dBm and mixer performed as up-converter and down-converter ( 1.45 GHz). Fig. 13. Mixing spectrum of the proposed single balanced mixer.

Fig. 12. Simulated and measured conversion gains/losses versus IF bandwidth 13 dBm at 21 GHz). ( Fig. 14. Measured LO–RF isolation.

be around 30 . Good output matching can be then achieved by designing the LPF properly. One of the significant benefits of the proposed structure is that the IF frequency is under the natural cutoff frequency of the SIW lines. Therefore, no specific design should be considered to prevent the IF signal from leaking into RF/LO ports. This results in a significant improvement of conversion efficiency and structure compactness. This developed -band single balanced mixer has been measured using a spectrum analyzer. The RF and LO signals are generated by microwave signal generators. The conversion gains/losses are plotted in Fig. 11, from which it can be observed that this mixer exhibits a fairly good performance as both down-converter and up-converter. The measurements are performed with LO power 13 dBm and IF frequency 1.45 GHz. Meanwhile, Fig. 12 shows the curves of the simulated and measured conversion gains/losses versus IF bandwidth, where the LO input power is 13 dBm at 21 GHz. The measured IF frequency is in the range of dc–4 GHz with a conversion gain/loss better than 10 dB. The IF bandwidth is actually broader considering effects of the LPF. For our circuit design, good LO–RF and LO–IF isolations can be guaranteed due to the implementation of our 180 hybrid.

Moreover, a high selectivity of the LPF yields a good performance of the RF–IF isolation. Fig. 13 displays the measured IF port spectrum of this mixer performed as a downconverter, with the RF input of 10 dBm and the LO input of 13 dBm, from which it can be found that the LO–IF and RF–IF isolations are about 55 dB and 45 dB, respectively. Measured LO leakage at the RF port is shown in Fig. 14, suggesting that the LO–RF isolation is about 20 dB. It is worth mentioning that the proposed mixer circuit also exhibits an excellent linearity property. As illustrated in Fig. 15, an input third-order intercept (IP3) measurement is carried out by using two tones separated by 2 MHz. Fig. 16 displays the measured input-IP3 and input compression point of the proposed mixer when it is performed as a down-converter, with an LO input of 13 dBm. It is observed that the input-IP3 and of our mixer is around 15 and 9 dBm, respectively. A. Our Proposed

-Band Receiver Front-End

Fig. 17 shows the layout of the prototyped -band receiver front-end, which is based on our first proposed low-profile structure [23], [24]. In this design, the RF signal is first received by an

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Fig. 15. Two-tone inter-modulation test of the proposed single balanced mixer 13 dBm at 25 GHz). (

Fig. 17. Layout of our proposed

-band receiver front-end.

Fig. 18. Longitudinal slot in the broad wall of an SIW.

Fig. 16. Measured input-IP3 and points of the proposed mixer performed 13 dBm and 1.45 GHz). as a down-converter (

SIW slot array and then fed into our -band mixer, which functions as a down-converter. The receive antenna in our system is a 2 8 slot array in order to achieve a high gain, and the center RF frequency is around 24 GHz. Again, the substrate used is Rogers RT6002 with a dielectric constant of 2.94 and thickness of 0.254 mm. The longitudinal slot in the broad wall of an SIW is the basic building element in the slot antenna structure. Such longitudinal slots are set to interrupt transverse conduction currents that cause the radiation of electromagnetic (EM) energy from the waveguide. Stevenson was the first to calculate the impedance of different types of slots in a rectangular waveguide [25]. According to his work, a longitudinal resonant slot (slot length is equal to ) in the broad wall of a rectangular waveguide can approximately be modelled as a pure normalized admittance, which is given by (3)

where and are interior dimensions of the rectangular waveguide, and are wavelengths in free space and in the waveguide, respectively, and is the displacement from the central line of the broad waveguide wall, as shown in Fig. 18. Although (3) is an approximate formula which comes from conventional air-filled waveguide structures, it can provide a sufficient accuracy for the SIW slot array antenna design when low-permittivity substrate is used. Fig. 19 shows simulated and measured input return losses of our designed 2 8 slot array antenna. It can be seen that the measured operating frequency slightly shifts towards an upper band due to the deviation of the dielectric constant. The 10 dB bandwidth is extended from 23.7 to 24.3 GHz. It should be noted that the ripple in the out-of-band of the antenna is mainly attributed to the microstrip-to-SIW transition that is used for measurements. The radiation patterns of our 2 8 slot array at 24 GHz are also plotted in Fig. 20. It is observed that the measured gain and side-lobe level of our receive antenna are about 13 dBi and 21 dB, respectively. With the aid of an Agilent N8975A noise figure analyzer, the noise figure of the receiver front-end is measured. As shown in Fig. 21, the measured single-sideband (SSB) noise figure is approximately 9 dB. Actually, the receiver noise figure can be improved by introducing low-noise amplifiers (LNAs) which can be placed in front of the diodes to establish a receiver front-end

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Fig. 22. System test setup for the

-band receiver front-end.

Fig. 19. Measured and simulated input return losses of the SIW slot array.

Fig. 23. Photograph of our test setup.

IV. EXPERIMENTAL MEASUREMENT OF -BAND WIRELESS COMMUNICATION SYSTEM A. System Test Setup for Line-of-Sight Channels

Fig. 20. Measured radiation patterns of the SIW slot array at 24 GHz.

Fig. 21. Measured SSB noise figure of the proposed receiver front-end.

with a balanced amplifier scheme. The LNAs are not applied in our receiver front-end for the consideration of a simplified demonstration.

To demonstrate the system performance of the proposed receiver front-end, a vector signal wireless communication system was set up. Fig. 22 depicts the block diagram of the proposed system measurement. At the transmitter end, a pseuby dorandom binary sequence is modulated to IF signal a vector signal generator (Agilent E4483C) in M-QAM form. Thereafter, the modulated signal is up-converted to a 24-GHz RF signal by a subharmonic mixer (HMC264 from Hittite). The Anritsu MG3694A provides a 4–dBm, 11.5-GHz carrier signal for the mixer. The RF signal is then fed into a standard horn antenna SGH (18–26.5 GHz, with a gain of 24 dBi) for transmission. At the receiver side, the received RF signal is down-converted to an IF signal using our proposed -band receiver front-end. A signal generator (Anritsu MG3694A) provides a 13-dBm carrier signal for our proposed single balanced mixer. The IF output signal is then amplified by a two-stage surface-mounted amplifier cascaded by using GALI-39 from Mini-Circuits. This output signal is sent to Agilent 89600 vector signal analyzer (VSA) (i.e., an Agilent DSO81204B oscilloscope with VSA software) for analog-to-digital conversion, demodulation, and synchronization. The noise generated from a noise source (HP346C) is combined with the modulated signal at the amplifier output (before demodulation) in order to control the SNR conditions. The photograph of our system test setup for line-of-sight (LOS) channels is shown in Fig. 23. The characteristic of 24-GHz propagation channel, power analysis, received SNR, and EVM are important aspects for wireless communication systems. First of all, the transmitter and receiver front-end modules are tested separately with respect to the RF performance. In

ZHANG et al.: BROADBAND MILLIMETER-WAVE SINGLE BALANCED MIXER AND ITS APPLICATIONS TO SUBSTRATE INTEGRATED WIRELESS SYSTEMS

Fig. 24. Measured constellation diagrams at receiver IF output with

20 dB,

the frequency range of interest between 23.7 and 24.3 GHz, the total gains of the transmitter front-end and receiver front-end are approximately 12 and 4 dB, respectively. In addition, the LOS path loss of the 24-GHz wireless channel is measured in our laboratory environment, using two standard horn antennas (SGH 18–26.5 GHz). Theoretically, propagation can be calculated by dB , where is the distance between the receiver and transmitter and is the free-space wavelength. It is observed that the theoretical and measured are very close. Thereafter, the overall system measurement is carried out with a distance of 1 to 3 m (i.e., 60 70 dB) between the transmitter and receiver. The IF frequency is set to 1 GHz. Various modulation schemes such as quaternary phase-shift keying (QPSK), eight-phase-shift keying (8PSK), 16–quaternary amplitude modulation (16QAM), and 32QAM are generated by Agilent E4438C VSG. The baseband modulation filter is set to be a square-root raised cosine (SRRC) filter with a roll-off factor of 0.35. At the receiver side, Agilent 89600 VSA is used to measure the transceiver system parameters such as received SNR and EVM. Due to the confined sensitivity of VSA, the received IF output signal is amplified by a two-stage amplifier with a gain of 26 dB. B. Constellation Diagram and EVM The signal constellation and root mean square (rms) EVM are extensively used to evaluate the quality of communication systems, particularly when digital modulation is employed. Fig. 24(a)–(d) shows the measured constellation diagrams of QPSK, 8PSK, 16QAM, and 32QAM, respectively, under the conditions of distance 3 m, 20 dB, and a

50 Msps,

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3 m. (a) QPSK. (b) 8PSK. (c) 16QAM. (d) 32QAM.

50 Msps. It can be seen that the output symbol rate of constellations are stable and clear. In [18], Mahmoud et al. derived an expression of relating EVM to SNR for QAM signals over additive white Gaussian noise (AWGN) channels, where the SNR is defined as , is the average symbol energy and is the noise power spectral density (PSD). Here, the SNR is a function of both the nonlinear distortion and the energy per bit to the noise PSD ratio. The signal degradation sources in our proposed wireless system such as thermal noise, antenna noise, and the noise of transceiver circuit are modeled as Gaussian noise. For an M-QAM signal of order , a modified EVM expression is obtained by replacing by for [18, eq. (49)]. Thus, the EVM relation to SNR is calculated by

(4) where , , is the number of bits per symbol for M-QAM, and is the complemen. tary error function, defined as EVM is usually expressed as a percentage (%). Fig. 25 plots the measured and calculated rms EVM versus SNR for QPSK, 16QAM, and 32 QAM, with 20 Msps. It can be seen that the measured EVM results are well matched to

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frequencies. In Fig. 26, a higher EVM at the upper IF band is caused by the noise figure variation of our proposed mixer. V. CONCLUSION

Fig. 25. Measured and calculated rms EVM versus SNR for QPSK, 16QAM, 20 Msps, 1 GHz, and 1 m. and 32 QAM,

A broadband millimeter-wave single balanced diode mixer that employs a novel structure of 180 SIW hybrid has been proposed and presented in this paper. This 180 hybrid consists of a conventional -plane 3-dB coupler and a broadband 90 phase shifter. A -band experimental prototype has been designed and measured. Measured results have demonstrated that the conversion loss of our experimental prototype is better than 10 dB across the entire LO/RF frequency range of 20–26 GHz performing as either an up-converter or down-converter. The measured IF frequency is from dc to 4 GHz. The proposed mixer exhibits an excellent linearity property with input IP3 and points about 15 and 9 dBm, respectively. In addition, it guarantees good spurious rejection and port-to-port isolations. It is worth mentioning that the proposed design concept would exhibit even more advantageous features at higher millimeter-wave frequency bands. In order to evaluate the system performance of this proposed mixer, our design is integrated directly with an SIW high-gain antenna to build up a very compact receiver front-end. Finally, a -band wireless communication system, using the receiver front-end as a building block, is demonstrated for LOS channels. Measured and analytical results show that the proposed system is able to provide a reliable communication. This paper has successfully demonstrated a possible application of the proposed mixer in millimeter-wave communication systems. ACKNOWLEDGMENT

Fig. 26. Measured rms EVM at various IF frequencies for QPSK.

The authors would like to thank technical personnel at PolyGrames Research Center for their PCB fabrications and technical support. REFERENCES

the EVM values calculated by (4), for various modulation orders such as 4, 16, and 32. In general, the rms EVM of different modulation schemes is within 5% when the received SNR is above 25 dB, and EVM is less than 19% when the received SNR is more than 15 dB. This indicates that our proposed transceiver system supports reliable communication. It should be noted that the minimum detectable SNR is limited by the dynamic range of measurement instruments such as Agilent DSO81204B. The measured maximum symbol rate is restricted by the baseband test bench such as VSG Agilent E4438C, and the bandwidth of our experimental -band wireless communication system can reach up to 600 MHz. It has been shown above that the relationship between EVM and SNR can be estimated by (4). From the system point of view, the conversion loss and noise figure of a mixer may affect EVM by decreasing the SNR. In order to evaluate the broadband performance of the proposed mixer, the rms EVM of the system has been measured by varying the LO frequency over 20–24 GHz. Fig. 26 shows the measured rms EVM for QPSK with symbol rate of 20 Msps, transmitter and receiver distance 1 m, and transmitted IF power 2 dBm. It is observed that the measured EVM is quite stable at different IF

[1] H. Daembkes, B. Adelseck, L. P. Schmidt, and J. Schroth, “GaAS MMIC based components and frontends for millimeterwave communication and sensor systems,” in Proc. IEEE Microw. Syst. Conf., Orlando, FL, May 1995, pp. 83–86. [2] H. Shigematsu, T. Hirose, F. Brewer, and M. Rodwell, “Millimeterwave CMOS circuit design,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 2, pp. 472–477, Feb. 2005. [3] M. Sato, T. Hirose, and K. Mizuno, “Advanced MMIC receiver for 94-GHz band passive millimeter-wave imager,” IEICE Trans. Electron., vol. E92-C, no. 9, pp. 1124–1129, Sep. 2009. [4] J. X. Chen, W. Hong, Z. C. Hao, H. Li, and K. Wu, “Development of a low cost microwave mixer using a broadband substrate integrated waveguide (SIW) coupler,” IEEE Microw. Wireless Compon. Lett., vol. 16, pp. 84–86, 2006. [5] S. A. Maas, Microwave Mixers, 2nd ed. Boston, MA: Artech House, 1993. [6] S. E. Gunnarsson, C. Karnfelt, H. Zirath, R. Kozhuharov, D. Kuylenstierna, C. Fager, M. Ferndahl, B. Hansson, A. Alping, and P. Hallbjorner, “60 GHz single-chip front-end MMICs and systems for multi-Gb/s wireless communication,” IEEE J. Solid-State Circuits, vol. 42, no. 5, pp. 1143–1157, May 2007. [7] S. E. Gunnarsson, C. Stoij, C. Karnfelt, H. Zirath, R. Kozhuharov, D. Kuylenstierna, R. Christoffersen, and E. Stoij, “A generic, multi-purpose, and small-size 60 GHz transmit/receive module used for secure WLAN communication,” in Proc. Asia–Pacific Microw. Conf., Dec. 2008, pp. 1–4. [8] D. Deslandes and K. Wu, “Single-substrate integration technique of planar circuits and waveguide components,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 2, pp. 593–596, Feb. 2003.

ZHANG et al.: BROADBAND MILLIMETER-WAVE SINGLE BALANCED MIXER AND ITS APPLICATIONS TO SUBSTRATE INTEGRATED WIRELESS SYSTEMS

[9] K. Wu, D. Deslandes, and Y. Cassivi, “The substrate integrated circuits—A new concept for high-frequency electronics and optoelectronics,” in Proc. TELSIKS, Nis, Yugoslavia, 2003, pp. P-III–P-X. [10] D. Deslandes and K. Wu, “Integrated microstrip and rectangular waveguide in planar form,” IEEE Microw. Wireless Compon. Lett., vol. 11, no. 1, pp. 68–70, Feb. 2001. [11] D. Stephens, P. R. Young, and I. D. Robertson, “Millimeter-wave substrate integrated waveguides and filters in photoimageable thick-film technology,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 12, pp. 3832–3838, Dec. 2005. [12] Z. C. Hao, W. Hong, J. X. Chen, H. X. Zhou, and K. Wu, “Singlelayer substrate integrated waveguide directional couplers,” Proc. Inst. Electr. Eng., vol. 153, no. 5, pp. 426–431, Oct. 2006. [13] C. H. Lien et al., “Analysis and design of reduced-size marchand ratrace hybrid for millimeter-wave compact balanced mixers in 130-nm CMOS process,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 8, pp. 1966–1977, Aug. 2009. [14] F. Ellinger, L. C. Rodoni, G. Sialm, C. Kromer, G. von Buren, M. L. Schmatz, C. Menolfi, T. Toifl, T. Morf, M. Kossel, and H. Jackel, “30–40-GHz drain-pumped passive-mixer MMIC fabricated on VLSI SOI CMOS technology,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 5, pp. 1382–1391, May 2004. [15] S. A. Maas and K. W. Chang, “A broadband planar, doubly balanced diode mixers,” IEEE Trans. Microw. Theory monolithic Tech., vol. 41, no. 12, pp. 2330–2335, Dec. 1993. [16] L. Han, K. Wu, and S. Winkler, “Singly balanced mixer using substrate integrated waveguide magic-T structure,” in Proc. Eur. Wireless Technol.Conf., 2008, pp. 9–12. [17] F. He, K. Wu, W. Hong, L. Han, and X. Chen, “A planar magic-T structure using substrate integrated circuits concept and its mixer applications,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 1, pp. 72–79, Jan. 2011. [18] H. Arslan and H. A. Mahmoud, “Error vector magnitude to SNR conversion for nondata aided receivers,” IEEE Trans. Wireless Commun., vol. 8, no. 5, pp. 2694–2704, May 2009. [19] Z. Q. Chen and F. F. Dai, “Effects of LO phase and amplitude imbalances and phase noise on M-QAM transceiver performance,” IEEE Trans. Ind. Electron., vol. 57, no. 5, pp. 1505–1517, May 2010. [20] Z. Y. Zhang, K. Wu, and Y. R. Wei, “Broadband delay compensation phase shifter using slotted substrate integrated waveguide structure,” in IEEE MTT-S Int. Microw. Symp. Dig., 2011, pp. 1–4. [21] A. Patrovsky, M. Daigle, and K. Wu, “Coupling mechanism in hybrid SIW-CPW forward couplers for millimeter wave substrate integrated circuits,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 11, pp. 2594–2601, Nov. 2008. [22] Y. J. Chen, W. Hong, and K. Wu, “Novel substrate integrated waveguide fixed phase shifter for 180-degree directional coupler,” in IEEE MTT-S Int. Microw. Symp. Dig., 2007, pp. 189–192. [23] Z. Y. Zhang, Y. R. Wei, and K. Wu, “Millimeter-wave wireless communication systems integrated with a novel receiver front-end,” in IEEE MTT-S Int. Microw. Symp. Dig., 2010, pp. 1612–1615. [24] Z. Y. Zhang, K. Wu, and N. Yang, “A millimeter-wave sub-harmonic self-oscillating mixer using dual-mode substratei ntegrated waveguide cavity,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 5, pp. 1151–1158, May 2010. [25] A. F. Stevenson, “Theory of slots in rectangular wave-guides,” J. Appl. Phys., vol. 19, pp. 24–38, Jan. 1948. Zhen-Yu Zhang received the B.Eng. degree in electronics and information engineering from HuaZhongUniversity of Science and Technology, Wuhan, China, in 2002, the M.Eng. degree in electrical engineering from the National University of Singapore, Singapore, in 2005, and the Ph.D. degree in electrical engineering from École Polytechnique de Montréal, Montréal, QC, Canada, in 2011. From 2003 to 2005, he was a Research Student , with the Institute for Infocomm Research Singapore, where he was with the Radio Systems

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Department, Communication and Devices Division. From 2006 to 2011, he was a Research Student with École Polytechnique de Montréal, Montréal, QC, Canada. Currently, he is an RF Engineer with SDP Telecom, Montréal. His research areas include RF circuit design, passive components design using the LTCC technique, active subsystems, and millimeter-wave short-range communication systems.

Ying Rao Wei received the M.A.Sc. degree in electrical and computer engineering from Concordia University, Montréal, QC, Canada, in 2001, and the Ph.D. degree in electronic and information engineering from The Hong Kong Polytechnic University. Hong Kong, in 2008. From 2009 to June 2010, she was a Research Associate with the Poly-Grames Research Center, École Polytechnique de Montréal, Montréal, QC, Canada. Since July 2010, she has been with the Wireless Product Group, SMSC Ottawa, Ottawa, ON, Canada. Her research interests are in the areas of wireless communications circuits and systems, multi-input multi-output (MIMO) systems, and multiple-access techniques.

Ke Wu (M’87–SM’92–F’01) is a Professor of electrical engineering and the Tier-I Canada Research Chair in RF and millimeter-wave engineering with the École Polytechnique de Montréal, Montréal, QC, Canada. He holds the first Cheung Kong endowed chair professorship (visiting) at Southeast University, the first Sir Yue-Kong Pao chair professorship (visiting) at Ningbo University, and an honorary professorship with the Nanjing University of Science and Technology, the Nanjing University of Post Telecommunication, and the City University of Hong Kong, China. He has been the Director of the Poly-Grames Research Center and the founding Director of the Center for Radiofrequency Electronics Research of Quebec (Regroupement stratégique of FRQNT). He has also held guest and visiting professorship with many universities around the world. He has authored or coauthored over 800 referred papers and a number of books/book chapters and patents. He has served on the editorial/review boards of many technical journals, transactions, and letters as well as scientific encyclopedia including as editor and guest editor. His current research interests involve substrate integrated circuits, antenna arrays, advanced computer-aided design and modeling techniques, wireless power transmission, and development of low-cost RF and millimeter-wave transceivers and sensors for wireless systems and biomedical applications. He is also interested in the modeling and design of microwave photonic circuits and systems. Dr. Wu is a Fellow of the Canadian Academy of Engineering (CAE) and a Fellow of the Royal Society of Canada (The Canadian Academy of the Sciences and Humanities) and a member of Electromagnetics Academy, Sigma Xi, and the URSI. He has held key positions in and has served on various panels and international committees including the chair of technical program committees, international steering committees and international conferences/symposia. In particular, he will be the general chair of the 2012 IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium. He is currently the chair of the joint IEEE chapters of MTTS/APS/LEOS in Montreal. He is an elected IEEE MTT-S AdCom member for 2006–2012 and served as Chair of the IEEE MTT-S Member and Geographic Activities (MGA) Committee. He was the recipient of many awards and prizes including the first IEEE MTT-S Outstanding Young Engineer Award, the 2004 Fessenden Medal of the IEEE Canada, and the 2009 Thomas W. Eadie Medal of the Royal Society of Canada. He is an IEEE MTT-S Distinguished Microwave Lecturer from January 2009 to December 2011.

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Design of 40–108-GHz Low-Power and High-Speed CMOS Up-/Down-Conversion Ring Mixers for Multistandard MMW Radio Applications Jeng-Han Tsai, Member, IEEE

Abstract—In this paper, a pair of broadband, low-LO-power, low-dc-power, and high-speed up/down-conversion ring mixers are presented for multistandard millimeter-wave (MMW) radio applications. By employing a weak inversion biasing technique, the ring mixer can operate at a low LO drive level and low dc power while maintaining reasonable conversion gain performance. In addition, an IF transimpedance amplifier (TIA) buffer and wideband RF design are introduced to increase the operation speed of the mixer for MMW wireless Gigabit transmission. Using a 90-nm CMOS low-power process, the up-/down-conversion ring mixers are designed and fabricated based on the presented topology. The downconversion ring mixer and up-conversion ring mixer exhibit flat measured conversion gain of 1 2 dB and 0 2 dB from 40 to 110 GHz and 40 to 108 GHz, respectively. After biasing the transistors of the ring mixer core at weak inversion region, the presented down-conversion and up-conversion ring mixers can operate at low LO drive power, 2 and 0 dBm, respectively, even up to 100 GHz. For MMW wireless gigabit communication, gigabit binary phase-shift keying modulation signal test is successfully performed through a direct-conversion system in this work. The presented ring mixers are suitable for 60-GHz wireless personal area network, -band (71–76 GHz, 81–86 GHz, and 92–95 GHz) wireless fiber, and 77-GHz anti-collision radar applications. Index Terms—CMOS, direct-conversion, gigabit, limeter-wave (MMW), ring mixer, weak inversion.

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I. INTRODUCTION OMMUNICATION systems at millimeter-wave (MMW) frequency bands have been used for a long time, but the applications were restricted to the military. Recently, the Federal Communications Commission (FCC) announced that frequency bands of 57–64 GHz, 71–76 GHz, 81–86 GHz, and 92–95 GHz are available for commercial ultrahigh-capacity wireless communications [1]–[3]. The allocation provides for new products and services, such as multigigabit wireless personal area networks (WPANs) at 60 GHz, wireless fiber for the “Entire Last Mile” at -band radio (71–76 GHz, 81–86 GHz, and 92–95 GHz), and anti-collision radars at 77 and 79–81 GHz. Therefore, the MMW frequency radio market starts to evolve for commercialization and what emerges is a strong demand for a low-cost, low-power, and highly integratable MMW transceiver. In the past, these researches were dominated by

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Manuscript received July 01, 2011; revised November 03, 2011; accepted November 17, 2011. Date of publication January 17, 2012; date of current version March 02, 2012. This work was supported by the National Science Council of Taiwan under Grant NSC 98-2221-E-003-024-MY2 and Grant NSC NSC 100-2221-E-003-027. The author is with the Department of Applied Electronics Technology, National Taiwan Normal University, Taipei 10610, Taiwan (e-mail: jhtsai@ntnu. edu.tw). Digital Object Identifier 10.1109/TMTT.2011.2178258

III–V semiconductors. With the continued scaling of modern CMOS technology, there are new opportunities for CMOS integrated circuits operating at 100 GHz and beyond [4]–[6]. The mixer is an important building block in MMW transceiver design to perform frequency conversion [7]. Tradeoffs between conversion gain, LO power, bandwidth, linearity, supply voltage, and power consumption have to be considered carefully in MMW mixer design. With good conversion gain, compact size, and superior spur rejection, the Gilbert-cell mixer is widely used in modern CMOS MMW integration circuits [8]–[14]. By adopting a subharmonic pumped technique, the subharmonic Gilbert-cell mixer can operate up to 100 GHz [6]. However, the standard Gilbert-cell mixer topology with three level transistors stacking requires high-voltage supply and high-power consumption, 58 mW and 93 mW in [6] and [10], respectively. Therefore, several low-voltage and low-power modified Gilbert-cell mixer topologies have been presented in [15]–[18]. Nevertheless, low -value of the spiral inductor and inferior performance of the pMOS transistor in MMW limit the operation frequency and bandwidth of these topologies. A passive resistive ring mixer with the advantages of broad bandwidth, zero dc power consumption, and high linearity is an alternative for mixer design [19], [20]. However, large conversion loss and large LO power requirement of the passive mixer are main disadvantages for MMW applications. To improve the conversion loss, an IF buffer amplifier is adopted in a passive ring mixer [21]. Nevertheless, the large LO drive requirement is the bottleneck of the passive mixer design at MMW frequencies. In this paper, a pair of broadband, low-LO-power, low-dc-power, and high-speed up-/down-conversion ring mixers are presented for multistandard MMW radio applications. The mixers are designed and fabricated on 90-nm CMOS low-power (LP) process. By introducing a dc path to bias the transistors of the ring mixer core at weak inversion biasing region, the ring mixer demonstrates improved conversion loss under low LO drive power condition. The extra dc consumption for weak inversion biasing is slight compared with other reported active MMW mixers. In addition, a broadband resistive-feedback inverter IF buffer and wideband RF design are introduced for both up- and down-conversion mixers to achieve high-speed capability. A significant improvement is achieved for the flatness of conversion gain over frequencies. Providing a 2-dBm LO power, the down-conversion ring mixer exhibits measured conversion gain of 1 2 dB from 40 to 110 GHz with 7.2-mW dc consumption from a 1.2-V supply voltage. To further investigate the performance of the weak inversion biasing ring mixer at low power, we lower the supply voltage

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TSAI: DESIGN OF LOW-POWER AND HIGH-SPEED CMOS UP-/DOWN-CONVERSION RING MIXERS FOR MMW RADIO APPLICATIONS

to 1 V. The mixer can operate at dc power of 2 mW from 1 V while maintaining the measured conversion gain of 3.5 2 dB from 40 to 108 GHz via 2-dBm LO power. The measured conversion gain of the up-conversion ring mixer is 0 2 dB from 40 to 108 GHz with dc power of 9.6 mW from 1.2 V via 0-dBm LO drive. After decreasing the supply voltage to 1 V, the up-conversion ring mixer still demonstrates measured conversion gain of 3 2 dB from 40 to 108 GHz with dc power of 6 mW. Furthermore, for MMW high-speed wireless transmission applications, gigabit digital modulation signal test is performed successfully for the up-/down-conversion ring mixers. The experimental results show that the monolithic microwave integrated circuits (MMICs) feature broadband and gigabit transmission capabilities which are suitable for multistandard MMW radio applications. II. PRESENTED BROADBAND, LOW-LO-POWER, LOW-DC-POWER, AND HIGH-SPEED WEAK INVERSION RING MIXERS

Fig. 1. (a) Characteristic of the drain current versus the gate source of the MOS transistor. (b) Mixing principle of the weak inversion voltage biasing MOS transistor.

current and conversion gain mixer are derived, respectively, in

A. Principle of Weak Inversion Mixer

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of the weak inversion

(2)

For low-power design, a weak inversion biasing technique has been used in CMOS analog circuits extensively. Compared with the strong inversion biasing region, the transistor biased at weak inversion has a superior transconductance-to-dc current , which is favorable for low voltage and lower ratio power applications [22]–[24]. However, the MOS transistors biasing in weak inversion region have inferior gain and the is lower than that in strong inversion, which are disadvantages for high-frequency IC design [24]. Recently, with continuously downscaling transistor dimension of the modern deep-submicrometer CMOS technology, a receiver and low-noise amplifier (LNA) using a weak inversion biasing technique are developed successfully in 0.18- and 0.13- m CMOS, respectively, under 3 GHz [23], [24] for low-voltage and low-power design. This paper provides further progress of the weak inversion biasing MMW mixer to 100 GHz and beyond using modern 90-nm CMOS with low LO power and low dc power operation. is a funcFig. 1(a) illustrates that the drain–source current in weak and strong inversion retion of gate–source voltage gions. Unlike the square law characteristic in a strong inversion of a MOS transistor operating in the weak inregion, the version region has an exponential characteristic dependence on . The characteristic can be formulated for an approximate of 0.2 V [24], [25] as (1) is a where the term is the weak inversion slope factor, process-dependent parameter, is the gate width, is the is the thermal voltage ( gate length, and 25 mV). The exponential device operation provides nonlinear characteristic for mixer design. Fig. 1(b) illustrates a weak inversion biasing MOS transistor with RF input signal and LO drive signal for mixer design. To analyze the weak inversion mixer, the second-order term from the Taylor series expansion of the exponential characteristic equation is used. The IF output

(3) is the dc drain current, and are the ampliwhere is the transconductance of tude of the LO and RF signals, , and and are the load the transistor of the IF and RF ports, respectively. As can be observed, the conversion gain of the mixer is proportional to the square of the transconductance of the weak inversion biasing transistor. For good isolation between ports and cancellation of the even-order harmonics, a double-balanced ring architecture composed of four weak inversion transistors is adopted for mixer design. Traditionally, the passive resistive ring mixer requires a sufficient LO signal swing to control the channel linear resistance of the transistor for frequency mixing. The weak inversion ring mixer introduces a dc biasing network to operate the transistor at is an exponential function of weak inversion region, which , inherently, at that dc biasing point. The LO signal swing requirement is relative low. In the weak inversion region, the and gate–source voltage is lower than threshold voltage the drain–source voltage and current is very slight, 150 mV and 0.1 mA from simulation in this work. Fig. 2 simulates the normalized conversion loss of the ring mixer with different transistor biasing conditions in MMW. As can be observed, the conventional passive resistive ring mixer without any bias requires large LO power (10 dBm) for reasonable conversion loss. By adopting a weak inversion biasing technique of the transistor, the ring mixer demonstrates improved conversion loss under low LO drive power condition. In addition, although the resisbiasing also improves the conversion loss at tive mixer with low LO power region, the weak inversion biasing would further improve the conversion loss, which is suitable for MMW frequency application since the LO power is a valuable resource at MMW. Finally, how to integrate the dc bias network for weak

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Fig. 2. Normalized conversion gain versus LO power at different biasing condition of the ring mixer.

inversion biasing transistor of the ring core without affect the RF characteristic would be discussed later in mixer design. B. Down-Conversion Ring Mixer The conventional passive resistive ring mixer with advantages of zero dc power consumption, broadband, and good linearity has been used in MMW applications. Due to the doublebalanced architecture, the ring mixer has good port-to-port isolation and good spur suppression. Since the LO power is an expensive resource in MMW frequencies, the large LO power requirement and conversion loss of the passive resistive ring mixer is the main issue for MMW application. To improve the conversion loss, an IF buffer amplifier is adopted in passive resistive ring mixer design [21]. However, the additional IF buffer amplifier requires a dc block capacitor series directly at the IF signal path for bias network of the amplifier as shown in [21]. The series capacitor limits the IF bandwidth of the mixer and is not suitable for direct-conversion application. In addition, the insufficient LO drive would degrade the conversion loss and linearity of the mixer. Typically, the 10-dBm LO drive power is required for good conversion loss of the passive mixer. Such high requirement of the LO power limits the RF operation frequency of the mixer especially at MMW frequency bands. To progress the CMOS mixer to 100 GHz and beyond, low-LO-power design is the key point. In this paper, a 40–110-GHz, low-LO-power, low-dc-power, and high-speed double-balanced ring mixer is presented for multistandard MMW radio application. The presented ring mixer based on weak inversion biasing of the MOS transistor can operate at low LO power and low dc power while providing reasonable conversion gain performance and wide bandwidth at MMW frequency. In addition, a broadband RF and LO on-chip Marchand baluns and resistive-feedback inverter IF buffer amplifier with wideband characteristic are adopted in the ring mixer design for high-speed operation. Fig. 3 shows the schematic of the presented down-conversion weak inversion ring mixer. The ring core of the mixer is composed of four transistors – . For a double-balanced ring structure, RF and LO on chip Marchand baluns, which have been validated for 180 baluns with broadband and excellent amplitude/phase match

Fig. 3. Schematic of the CMOS down-conversion ring mixer.

[14], are utilized to generate the differential RF input signal and LO drive signal. The size of the transistors of the ring core has been chosen for the good conversion loss and broad bandwidth. From (3), the wider size of the mixing MOS tranlowers the conversion sistor with higher transconductance loss. However, increasing the transistor width increases the parasitic capacitances, which will degrade the bandwidth, port-to-port isolation, and impedance matching. Therefore, tradeoffs between conversion loss and bandwidth have to be concerned when device size selection of the ring core. Compromising the conversion loss and bandwidth, a total gate width of 16 m with an eight-finger transistor is selected in this down-conversion ring mixer design. In addition, the gate length of the transistors is set to the minimum value allowed by the technology (90 nm in this work) in order to maximize . Furthermore, to compensate the parasitic capacitances of the transistors for wide and flat RF bandwidth, an inductance using high impedance transmission line is adopted as shown in Fig. 3. Although the ring mixer core has inherent wideband frequency translation characteristic, an incorporated inductance would extremely expand the operation bandwidth and improve the insertion loss at high frequency. To provide the sufficient gain, an IF buffer amplifier could be adopted in ring mixer design. However, an extra independent bias network for an IF buffer amplifier is utilized in the conventional passive resistive ring mixer [21]. The mixer in weak inversion biasing is not the pure passive resistive mixer. It requires a slight drain–source voltage and current and a . Theregate–source voltage lower than threshold voltage fore, the dc bias network is an important design issue. The presented mixer topology could integrate the dc bias networks of the weak inversion ring mixer core and IF buffer amplifier. The dc current path is illustrated in Fig. 3 by gray line. The resistive-feedback inverter amplifier is selected for IF buffer amplifier, which can be used as a transimpedance amplifier (TIA) that converts the IF current to an amplified IF voltage directly for the down-conversion mixer. The TIA buffer also provides a dc current path for the IF side to bleed the drain current of the mixing transistors of the ring core. The dc path for the RF side of the mixing transistors is provided by resistors and of 1 k , which isolate the RF input signal from the

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Fig. 5. Chip photograph of the CMOS down-conversion ring mixer with chip size of 0. 54 mm 0. 41 mm.

Fig. 4. Schematic of the CMOS up-conversion ring mixer.

dc ground. The resistors and of 1 k are added to isolate the LO input from the gate bias network. The down-conversion ring mixer is composed of the Marchand balun, the ring mixer core with high impedance compensation transmission line, and the resistive-feedback inverter IF buffer demonstrates wide and flat frequency response. To further extend the IF frequency response of the resistive-feedback inverter IF buffer, the peaking inductor technique at the gate of nMOS is utilized to resonate the parasitic capacitors effect of the CMOS transistors. C. Up-Conversion Ring Mixer To operate the MMW ring mixer at low LO power and low dc power while providing sufficient conversion gain and broad bandwidth, a weak inversion up-conversion ring mixer is presented in this section. The core of the ring mixer is bidirectional architecture, which is suitable for both up- and down-conversion scheme. Since, the operation principle of the up-conversion ring mixer resembles that of the down-conversion ring mixer, many of the design techniques become relevant. Fig. 4 shows the schematic of the presented up-conversion ring mixer. A double-balanced ring structure composed of transistors is selected for good isolation between ports and cancellation of the even-order harmonics. The size of the transistors of the ring core has been chosen for the good conversion loss and broad bandwidth. Like the down-conversion ring mixer design as discussed before, the tradeoffs between conversion loss and bandwidth have to be concerned when selecting device size. A total gate width of 24 m with a 12-finger transistor is selected in this up-conversion ring mixer design from simulation results. Furthermore, a high impedance transmission line is also adopted at the RF side, as shown in Fig. 4, to compensate the parasitic capacitances of the transistors for wide and flat RF bandwidth. The incorporated inductance would extremely expand the operation bandwidth and improve the insertion loss at high frequency. For double-balanced ring structure, RF and LO on-chip Marchand baluns are utilized to generate the differential RF signal and LO

drive signal. The IF stage is a resistive-feedback inverter ampli, a pMOS , and a shunt fier composed of a nMOS . The differential IF input signal and LO feedback resistor drive signal are directed to the transistor of the ring core, while the frequency mixing is provided by the weak inversion biasing – . The up-converted RF differential output curtransistor rent signals are directed to a Marchand balun for differential to single output. For low LO drive, a bias network has been integrated in the up-conversion ring mixer to operate the transistors of the ring core at weak inversion region. The dc current path is also illustrated in Fig. 4 by gray line. By adding the bypass capacitors, the RF Marchand balun would provide the dc supply voltage of the weak inversion biasing transistors without affect the RF characteristic. The IF resistive-feedback inverter amplifier provides a dc current path to bleed the drain current of the and of 1 k are added ring core to ground. The resistors to isolate the LO input from the gate bias network. The circuits were simulated with Agilent Advanced Design System (ADS) simulator. The passive components, including the discontinuities of the thin-film microstrip lines, inductors, capacitors, and Marchand balun, were simulated by a full-wave EM simulator. III. EXPERIMENTAL RESULTS The presented down-/up-conversion ring mixers are designed and fabricated on TSMC 90-nm 1P9M CMOS MS/RF low power (LP) process. The transistor of the 90-nm LP process is optimized for lower leakage currents and targeted at the markets of wireless communication and handheld device application. The process provides single poly layer for the gates of the MOS and nine metal layers for inter-connection. The transmission lines were implemented using thin-film microstrip (TFMS) lines. The TFMS consists of metal 1 (bottom layer) in the 1P9M CMOS process as ground plane and metal 9 (top layer) as the microstrip signal line with a thick SiO layer as substrate. A. Down-Conversion Mixer Characteristics The presented broadband, low-LO-power, low-dc-power, and high-speed, down-conversion ring mixer with weak inversion biasing technique has been implemented on 90-nm CMOS LP

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Fig. 6. Simulated and measured conversion gain versus the LO power of the down-conversion ring mixer.

Fig. 9. Simulated and measured conversion gain and IF output power versus RF input power of the down-conversion ring mixer at 60 GHz.

Fig. 7. Simulated and measured conversion gain versus the RF frequency of the down-conversion ring mixer with different supply voltage. Fig. 10. Measured conversion gain versus the IF frequency of the down-conversion ring mixer with different LO power.

Fig. 8. Measured time-domain differential IF output signals at 100 MHz of the down-conversion ring mixer.

process for multistandard MMW gigabit wireless communication applications. The microphotograph of the mixer is shown in Fig. 5. The overall chip size of the mixer is 0.41 mm 0.54 mm,

including all testing pad. The signal paths of the RF, LO, and IF are carefully drawn to make the layout as symmetric as possible. This is critical to the port-to-port isolation. The MMIC was measured via on-wafer probing. For conversion gain measurement of the double-balanced ring mixer, the differential RF and LO input signals are provided by an on-chip Marchand balun. To ensure the accuracy of the experimental results, especially at MMW, the loss accounted for the measurement setup was calibrated and deembedded in the presented data. Operating at a 1.2-V supply voltage, the total dc power consumption of the ring mixer is 7.2 mW, including weak inversion biasing transistors and TIA IF output buffers. The on-wafer measured characteristics of the MMIC are as follows. The simulated and measured down-conversion gain versus the LO power are shown in Fig. 6 with an RF input of 60 GHz and an LO frequency of 59.9 GHz. As can be observed, the conversion gain increases with the LO power. For low LO drive in MMW application, a 2-dBm LO power is selected in this work for the presenting measured data. Providing an LO power of 2 dBm, the simulated and measured

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TABLE I COMPARISONS OF DOWN-CONVERSION MIXERS IN VARIOUS TECHNOLOGIES AND TOPOLOGIES

down-conversion gains of the ring mixer versus RF frequencies are illustrated in Fig. 7. The mixer exhibits measured conversion gain of 1 2 dB from 40 to 110 GHz. The measured noise figure of the mixer is 12 1 dB from 58 to 62 GHz. To further investigate the performance of the weak inversion biasing ring mixer at a low supply voltage, we lower the supply voltage to 1 V. As shown in Fig. 7 also, the mixer can operate at a dc power of 2 mW from 1 V while maintaining the measured conversion gain of 3.5 2 dB from 40 to 108 GHz via 2-dBm LO power. In addition, the measured results agree well with the simulated results. The downconverted IF+ and IFtime-domain waveforms are plotted in Fig. 8, where the RF unmodulated carrier signal is 60 GHz and the downconverted IF signal is 100 MHz. The RF input power is 30 dBm with 50load, and the peak-to-peak output voltage swing is 70 mV. The LO-to-RF port and LO-to-IF port isolation are better than 42 and 46 dB, respectively, from 40 to 110 GHz. The measured input 1-dB compression point of the mixer is 10.5 dBm at RF of 60 GHz as shown in Fig. 9. For demodulation bandwidth, Fig. 10 plots the measured conversion gain versus the IF frequency from 10 MHz to 5 GHz with an LO frequency of 60 GHz for the down-conversion mixer. Providing an LO power of 2 dBm, the down-conversion mixer demonstrates a 3-dB demodulation bandwidth of 1.5 GHz. To further enhance the demodulation bandwidth, the larger LO power is provided. As can be observed, the 3-dB demodulation bandwidth would be improved form 1.5 GHz to 3.2 GHz after increasing the LO dBm to 4 dBm. power from Table I shows the comparison of previously reported broadband fundamental and subharmonic mixers in various technologies and topologies. As observed, the conventional passive ring mixers require large LO power (7 to 9 dBm in previous work), which is the bottleneck for MMW applications. In addition, large conversion loss is also the disadvantage for MMW system integration. The presented CMOS ring mixer using weak in-

Fig. 11. Chip photograph of the CMOS up-conversion ring mixer with chip size of 0.5 mm 0.45 mm.

version biasing demonstrates good conversion gain and broad bandwidth with low LO power and low dc power. Providing a 2-dBm LO power, the down-conversion ring mixer exhibits measured conversion gain of 1 2 dB from 40 to 110 GHz with 7.2-mW dc consumption. Further lowering the dc power to 2 mW from a 1-V supply voltage, the mixer still maintains the conversion gain of 3.5 2 dB from 40 to 108 GHz via 2–dBm LO power. To the best of our knowledge, the MMW mixer has the lowest LO power requirement even at 100 GHz compared with previous works. B. Up-Conversion Ring Mixer Characteristics The presented broadband, low-LO-power, low-dc-power, and high-speed up-conversion ring mixer with weak inversion

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Fig. 12. Simulated and measured conversion gain versus the LO power of the up-conversion ring mixer.

Fig. 14. Measured output spectrum of the up-conversion ring mixer.

Fig. 15. Measured conversion gain and RF output power versus IF input power of the up-conversion ring mixer with different LO power. Fig. 13. Simulated and measured conversion gain versus the RF frequency of the up-conversion ring mixer with different supply voltage.

biasing technique is also implemented using 90-nm LP CMOS technology. The microphotograph of the mixer is shown in Fig. 11 with a chip size of 0.5 mm 0.45 mm, including all testing pads. Operating at a 1.2-V supply voltage, the dc power consumption of the mixer is 9.6 mW, including IF amplifiers. The on-wafer measured results of the MMIC are as follows. The simulated and measured up-conversion gain versus the LO power is shown in Fig. 12 at an RF frequency of 60.005 GHz and an LO frequency of 60 GHz. Although the conversion gain increases with the LO power, a 0-dBm LO power is selected for low LO drive in MMW applications. Providing an LO power of 0 dBm, the simulated and measured up-conversion gain from 30 to 110 GHz of the mixer are illustrated in Fig. 13. At a fixed IF frequency of 5 MHz, the mixer demonstrates measured conversion gain of 0 2 dB from 40 to 108 GHz. The measured conversion gain results agree well with the simulated results. To further investigate the performance at low supply voltage, we lower the supply voltage to 1 V.As shown in Fig. 13, the mixer can operate at a dc power of 6 mW from 1 V while maintaining the measured conversion gain of 3 2 dB from 40 to 108 GHz. The output spectrum of the up-conversion ring mixer with a LO frequency of 60 GHz and

a baseband frequency of 5 MHz is shown in Fig. 14. Where the 60.005 GHz is the RF upper sideband (USB), 59.995 GHz is the RF lower sideband (LSB), and 60 GHz is the LO leakage signal. The measured LO leakage power is 37 dBm with the LO drive power of 0 dBm. Therefore, the LO-to-RF port isolation is 37 dB. The measured LO-to-RF port isolation and LO-to-IF port isolation are better than 35 and 40 dB, respectively, from 30 to 110 GHz. The measured output 1-dB compression point (OP ) of the up-conversion mixer is dBm at RF of 60.005 GHz as shown in Fig. 15. Since the is a significant performance of the up-conversion mixer OP of the transmitter the larger LO power is provided to further would be enhance the OP . As can be observed, the OP improved from 12 to 7 dBm after increasing the LO drive power from 0 to 6 dBm. Therefore, the up-conversion mixer can be applied to high-output-power and high-linearity systems with enhanced LO drive power mode. Table II shows the comparison of previously reported broadband fundamental and subharmonic up-conversion mixers in various technologies and topologies. Providing a 0-dBm LO power, the up-conversion ring mixer exhibits measured conversion gain of 0 2 dB from 40 to 108 GHz with 9.6-mW dc consumption. Further lowering the dc power to 6 mW from a 1-V supply voltage, the mixer still maintains the conversion gain of

TSAI: DESIGN OF LOW-POWER AND HIGH-SPEED CMOS UP-/DOWN-CONVERSION RING MIXERS FOR MMW RADIO APPLICATIONS

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TABLE II COMPARISONS OF UP-CONVERSION MIXERS IN VARIOUS TECHNOLOGIES AND TOPOLOGIES

Fig. 16. MMW digital modulation signal measurement system.

3 2 dB from 40 to 108 GHz via 0-dBm LO power. To the best of our knowledge, the MMW mixer is the highest and the widest up-conversion CMOS ring mixer with low LO power requirement.

Fig. 17. Measured BPSK output spectrum of the up-conversion ring mixer at 60 GHz.

C. Gigabit Digital Modulation Signal Characteristics The 40–108-GHz up/down-conversion ring mixer MMICs can be applied to MMW gigabit wireless communication applications. To verify the high data rates digital modulation signal quality of the up/down-conversion mixers, a MMW BPSK digital modulation signal measurement system has been established as shown in Fig. 16. The presented up/down-conversion ring mixers act as the BPSK modulator and demodulator, which modulate the baseband signals to and from RF signals directly. The gigabit BPSK baseband signals with pseudorandom bit stream (PRBS) are generated from a pattern generator and fed into the presented up-conversion mixer. The baseband signals are directly up-convert to MMW frequency band, 60 GHz in this work, by the up-conversion mixer. The measured output spectrum of the modulated BPSK signal with 1.0 and 2.0 Gb/s at 60 GHz is plotted in Fig. 17. The spectrum is spread out due to the unfiltered baseband signals, resulting in a sinc-like spectrum. An attenuator is added between up-conversion mixer and down-conversion mixer for simulation of the channel path loss. The 60-GHz gigabit BPSK modulation signal is fed into our down-conversion mixer for demodulation quality test. The measured eye diagram of the 1.0-Gb/s PRBS demodulation

Fig. 18. Measured eye diagram of the down-conversion ring mixer for BPSK demodulation applications.

signal is plotted in Fig. 18, while the 50- input of the oscilloscope is used as load. As observed, the clear eye opening is achieved for the satisfactory recovery of the baseband signal. The experimental results show that the presented up/down-conversion mixer is suitable for MMW gigabit transmission applications.

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IV. CONCLUSION A pair of broadband, low-LO-power, low-dc-power, and high-speed up/down-conversion ring mixers using 90-nm CMOS LP process for multistandard MMW radio applications are presented in this paper. Utilizing the weak inversion biasing technique, the ring mixer demonstrates improved conversion loss under low LO drive power condition. To achieve wideband and high-speed capability, a broadband Marchand balun with high impedance transmission line for broadband RF frequency and a TIA IF buffer amplifier for broadband IF frequency response is adopted in both up/down-conversion ring mixer design. A significant improvement can be achieved for the flatness of conversion gain over frequencies. Providing a LO power of 2 dBm, the down-conversion mixer exhibits measured conversion gain of 1 2 dB from 40 to 110 GHz with dc power of 7.2 mW. The up-conversion mixer exhibits measured conversion gain of 0 2dB from 40 to 108 GHz with dc power of 9.6 mW via an LO power of 0 dBm. Furthermore, gigabit digital modulation signal test, BPSK in this work, is performed for the up/down-conversion ring mixer. The experimental results show that the up/down-conversion mixer feature broadband and gigabit transmission capabilities. ACKNOWLEDGMENT The author would like to thank H.-D. Shih, National Taiwan Normal University, Taipei, Taiwan, for help with the chip layout. The chips were fabricated by TSMC Semiconductors Corporation through the Chip Implementation Center (CIC), Hsinchu, Taiwan. The chips were measured at the Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan. The probes for on-wafer testing were provided by GGB Inc., Naples, FL. REFERENCES [1] K. Ohata, K. Maruhashi, M. Ito, S. Kishimoto, K. Ikuina, T. Hashiguchi, K. Ikeda, and N. Takahashi, “1.25 Gbps wireless gigabit ethernet link at 60 GHz-band,” in IEEE MTT-S Int. Microw. Symp. Dig., 2003, pp. 373–376. [2] H. Ogawa, “Millimeter-wave wireless personal area network systems,” in IEEE RFIC Symp. Dig., Jun. 2006, pp. 11–13. [3] E. A. Monastyrev, O. Y. Malakhovskiy, S. L. Kevruh, and M. A. Korablin, “71–76 GHz wireless bridge for ethernet networks,” in Proc. 15th Int. Crimean Microw. Telecommun. Technol. Conf., Oct. 2005, pp. 78–79. [4] B. Heydari, M. Bohsali, E. Adabi, and A. M. Niknejad, “Low-power mm-wave components up to 104 GHz in 90 nm CMOS,” in IEEE Int. Solid-State Circuits Conf. Dig., Feb. 2007, pp. 200–201. [5] Y.-S. Jiang, Z.-M. Tsai, J.-H. Tsai, H.-T. Chen, and H. Wang, “A 86 to 108 GHz amplifier in 90 nm CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 2, pp. 124–126, Feb. 2008. [6] J.-H. Tsai, H.-Y. Yang, T.-W. Huang, and H. Wang, “A 30–100 GHz wideband sub-harmonic active mixer in 90 nm CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 8, pp. 554–556, Aug. 2008. [7] B. Razavi, RF and Microelectronics. Upper Saddle River, NJ: Prentice-Hall, 1998, ch. 6, pp. 180–200. [8] F. Zhang, E. Skafidas, and W. Shieh, “A 60-GHz double-balanced Gilbert cell down-conversion mixer on 130-nm CMOS,” in IEEE RFIC Symp. Dig., Jun. 2007, pp. 141–144.

[9] C.-S. Lin, P.-S. Wu, H.-Y. Chang, and H. Wang, “A 9–50-GHz Gilbertcell down-conversion mixer in 0.13- m CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 5, pp. 293–295, May 2006. [10] J.-H. Tsai, P.-S. Wu, C.-S. Lin, T.-W. Huang, J. G. J. Chern, W.-C. Huang, and H. Wang, “A 25–75-GHz broadband Gilbert-cell mixer using 90-nm CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 4, pp. 247–249, Apr. 2007. [11] F. Zhang, E. Skafidas, and W. Shieh, “60 GHz doublebalanced up-conversion mixer on 130 nm CMOS technology,” Electron. Lette., vol. 44, no. 10, pp. 633–634, May 2008. [12] I. C. H. Lai, Y. Kambayashi, and M. Fujishima, “50 GHz double-balanced up-conversion mixer using CMOS 90 nm process,” in Proc. IEEE Int. Circuits Syst. Symp., May 2007, pp. 2542–2545. [13] P.-C. Huang, R.-C. Liu, J.-H. Tsai, H.-Y. Chang, H. Wang, J. Yeh, C.-Y. Lee, and J. Chern, “A compact 35–65 GHz upconversion mixer with integrated broadband transformers in 0.18- m SiGe BiCMOS technology,” in IEEE RFIC Symp. Dig., Jun. 2006. [14] J.-H. Tsai and T.-W. Huang, “35–65-GHz CMOS broadband modulator and demodulator with sub-harmonic pumping for MMW wireless gigabit applications,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 10, pp. 2075–2085, Oct. 2007. [15] C.-C. Tang, W.-S. Lu, L.-D. Van, and W.-S. Feng, “A 2.4-GHz CMOS down-conversion doubly balanced mixer with low supply voltage,” in Proc. IEEE Int. Circuits Syst. Symp., May 2001, vol. 4, pp. 794–797. [16] H.-H. Hsieh and L.-H. Lu, “Design of ultra-low-voltage RF frontends with complementary current-reused architectures,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 7, pp. 1445–1458, Jul. 2007. [17] C. Hermann, M. Tiebout, and H. Klar, “A 0.6-V 1.6-mW trans-dB gain and former-based 2.5-GHz downconversion mixer with -dBm IIP3 in 0.13- m CMOS,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 2, pp. 488–495, Feb. 2005. [18] J.-H. Tsai, “Design of 1.2 V broadband, high data-rate MMW CMOS I/Q modulator and demodulator using modified Gilbert-cell mixer,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 5, pp. 1350–1360, May 2011. [19] J.-H. Chen, C.-C. Kuo, Y.-M. Hsin, and H. Wang, “A 15–50 GHz broadband resistive FET ring mixer using 0.18- m CMOS technology,” in IEEE MTT-S Int. Microw. Symp. Dig., 2010, pp. 784–787. [20] C.-C. Kuo, C.-L. Kuo, C.-J. Kuo, S.-A. Maas, and H. Wang, “Novel mInIature and broadband millimeter-wave monolithic star mixers,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 4, pp. 793–802, Apr. 2008. [21] T. Chang and J. Lin, “1–11 GHz ultra-wideband resistive ring mixer in 0.18- m CMOS technology,” in IEEE RFIC Symp. Dig., Jun. 2006. [22] M. Bucher, G. Diles, and N. Makris, “Analog performance of advanced CMOS in weak, moderate, and strong inversion,” in Proc. 17th Int. Conf. “Mixed Design of Integr. Circuits Syst.”, Jun. 2010, pp. 54–57. [23] H. Lee and S. Mohammadi, “A 3 GHz subthreshold CMOS low noise amplifier,” in IEEE RFIC Symp. Dig., Jun. 2006. [24] B. G. Perumana, R. Mukhopadhyay, S. Chakraborty, C.-H. Lee, and J. Laskar, “A low-power fully monolithic subthreshold CMOS receiver with integrated LO generation for 2.4 GHz wireless PAN applications,” IEEE J. Solid-State Circuits, vol. 43, no. 10, pp. 2229–2238, Oct. 2008. [25] B. Razavi, Design of Analog CMOS Integrated Circuits. New York: McGraw-Hill, 2001, ch. 2, p. 27. Jeng-Han Tsai (S’04–M’08) was born in Tainan, Taiwan, on December 20, 1980. He received the B.S. degree in electric engineering from National Central University, Taoyuan, Taiwan, in 2002, and the Ph.D. degree from the Graduate Institute of Communication Engineering from National Taiwan University, Taipei, Taiwan, in 2007. From February 2007 to January 2008, he was a Post-Doctoral Research Fellow with the Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan. From February 2008 to July 2009, he was with the Department of Communication Engineering, Yuan Ze University, Taoyuan, Taiwan. In August 2009, he joined the faculty of the Department of Applied Electronics Technology, National Taiwan Normal University, Taipei, where he is currently an Assistant Professor. His research interests include the design and analysis of RF/microwave integrated circuits and wireless communications.

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Low-Voltage, Wide-Locking-Range, Millimeter-Wave Divide-by-5 Injection-Locked Frequency Dividers Ming-Wei Li, Student Member, IEEE, Po-Chi Wang, Student Member, IEEE, Tzuen-Hsi Huang, Member, IEEE, and Huey-Ru Chuang, Senior Member, IEEE

Abstract—A new injector topology is proposed for the design of CMOS millimeter-wave divide-by-5 injection-locked frequency dividers (ILFDs). The topology is based on a distributed-element harmonic termination by an open-stub structure connected to the floating source end of the differential injection pair. ILFDs operating at 24 and 60 GHz are demonstrated in this study. The new topology combined with an N-MOS cross-coupled oscillator core can greatly reduce the supply voltage and power consumption requirement of the divider. The simulated results indicate that, by using the distributed-element harmonic termination, the locking range can be improved by over 40 and 72% for the 24and 60-GHz operations, respectively. The test circuits for the 24and 60-GHz ILFDs are implemented by a 0.18- m and 90-nm CMOS process, respectively. The power consumption is 7.4 and 3.75 mW at a supply voltage of 0.7 and 0.6 V, with a very wide locking range of 1.9 and 4.1 GHz, for the 24- and 60-GHz ILFDs, respectively. The proposed 24- and 60-GHz divide-by-5 ILFDs have the outstanding figure-of-merit (FOM) values of 6.4 and 69.4, respectively, compared with reported works. Index Terms—Divide-by-5, frequency divider, injection-locked frequency divider, low voltage, millimeter-wave, wide locking range.

I. INTRODUCTION

A

PRESCALER and a voltage-controlled oscillator (VCO) are essential components of phase locked loops (PLLs). As the operating frequency of the PLLs increases up to the millimeter-wave (MMW) regime, the design of the first frequency divider stage in a prescaler becomes challenging. It is due to that the MMW oscillation signal frequency from the VCO is very high and hence the divider has to scale it down to a lower frequency level for the programmable counter operation. In a traditional PLL design concept, the high-speed current-mode logic (CML) divide-by-2 dividers in cascode are usually proposed. However, this kind of design results in higher costs, circuit complexity, and high power consumption. A high-performance frequency divider with a high division ratio can possibly reduce the numbers of divider stages needed and save the total power Manuscript received July 01, 2011; revised November 30, 2011; accepted December 01, 2011. Date of publication January 24, 2012; date of current version March 02, 2012. The authors are with the Institute of Computer and Communication Engineering, Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan (e-mail: [email protected]; [email protected]. edu.tw; {thhuang, chuang_hr}@ee.ncku.edu.tw). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2180397

Fig. 1. Conventional differential-injection topologies. (a) Series-injection type[4]. (b) Parallel-injection type [6].

consumption of the PLL. Therefore, designing a low-voltage divider with a high division ratio and a wide locking range becomes an essential issue. The parameters to be considered while designing a frequency divider in a prescaler include the division ratio, locking range, and power consumption. Typical MMW frequency dividers utilize the topology of an injection-locked frequency divider (ILFD) [1]–[4] or a CML frequency divider. Usually, the ILFD has a smaller locking range than a CML frequency divider, but it can have lower power consumption. Conventional ILFDs, which are based on a differential LC oscillator topology, are widely used [1]–[4] for MMW applications. However, the division ratios of these dividers are less than four. becomes Designing a divider with a high division ratio a challenge since the power levels of high-order harmonic signals are inherently low and will result in a lower injection efficiency and limit the locking range of the divider. Fig. 1 shows the reported conventional differential injection topologies. A differential series injection topology [4] using an injection transistor cascoded with a cross-coupled pair of transistors has been proposed. To improve the injection efficiency of the ILFD at a [5] has been desired frequency, a shunt-peaking inductor adopted in [4]. However, the use of the inductor results in a larger area being occupied and causes difficulties in operation when the supply voltage is low. In contrast, the differential parallel injection topology [6] can be operated at a lower supply voltage. However, the division ratio in the differential parallel injection topology [6] is limited to three because the common source ends of the injector transistors are floating and the second harmonic dominates at the node X shown in Fig. 1(b).

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Fig. 2. Circuit schematic of the proposed divide-by-5 ILFD. (a) 24 GHz. (b) 60 GHz.

In this paper, a new injector topology is proposed for the design of CMOS MMW divide-by-5 ILFDs. We demonstrate the design cases of divide-by-5 ILFDs at 24 and 60 GHz, respectively, by a 0.18- m and a 90-nm CMOS process. The design methodology is based on the distributed-element harmonic termination scheme in which an open-stub-loaded floating-source injector is applied [7]. A more in-depth discussion on the abovementioned scheme for the division-by-5 operation and circuit design is also given. The measurement results show that, the 24- and 60-GHz divide-by-5 ILFDs can achieve a wide locking range, low power consumption, and excellent FOM values (for divide-by-5 operation). II. CIRCUIT DESIGN A. Divide-by-5 ILFD Design The schematic diagrams of the proposed wide-locking-range divide-by-5 ILFDs are shown in Fig. 2. The divider cores are the same as a conventional N-MOS cross-coupled oscillator core but there is no tuning varactor. The absence of the varactor significantly increases the frequency locking range [8] since the injection ratio can be enhanced. The input signal to the injector is configured by two N-MOS transistors whose source ends are connected together and left floating, as reported in [6]. However, in [6], the differential input signals are applied to the gates of the injection transistors to achieve frequency division by three. To increase the division ratio of a divider and to improve its performance with respect to power consumption and locking range, a floating source is adopted by directly connecting the source ends of the injection pair and together with distributed-element harmonic termination, which is implemented by using an extra open stub referred to the second harmonic of output frequency. No extra DC power is required because there is no DC path to GND for the injection pair; hence, less power is consumed. In addition, a higher power level of the needed fourth harmonic can be obtained at the common source end (i.e., the common node A shown in Fig. 2) because this end is floating. Thus, a larger locking range can be achieved by using the divide-by-5 ILFD. The 24-GHz ILFD is fabricated by a 0.18- m CMOS process. The circuit schematic is shown in Fig. 2(a). The transistor size for the cross-coupled pair ( and ) in the oscillator core is

with the aspect ratio (W/L) of m m; while, that for the injector pair ( and ) is m m. The load inductors ( and ) individually are 2.28 nH, which occupies a chip area of m m. The layout of the open stub is in a meander type and occupies an area of m m itself. To drive the equipment 50- load when doing the measurement, two stage self-biased output buffers are adopted. The circuit structure of the 60-GHz ILFD is similar to that of 24-GHz ILFD except of the last buffer stage, as shown in Fig. 2(b). The transistor size for the cross-coupled pair in the oscillator core is with the aspect ratio (W/L) of m m; while, that for the injector is m m. The load inductors individually for the 60-GHz case are only 0.7 nH, which occupies a chip area of m m. The open stub occupies an area of m m. The gate bias of the injector is an important factor for providing the transconductance to determine the injection ratio, which affects the locking range. In our design cases, the gate bias of the injectors for the 24-GHz and the 60-GHz injector are 1.4 V and 1.2 V, respectively. Fig. 3 shows the block diagram of the model illustrating the functioning of the circuit of the proposed divide-by-5 ILFD. The differential injection signals and mix with the fourth harmonic signal at node A. The frequencies of the output signals from the mixers, , , , and , are then filtered by the band-pass filter (BPF) to generate the output signals and . The harmonic signals are generated because of the nonlinear effect of the free running oscillator. The fundamental signal and other odd-order harmonics are cancelled out at node B shown in Fig. 3, due to the differential operation, while the even-order harmonics remain. The fourth harmonic signal is required to be fed back to mixer 1 and mixer 2 and then has to be mixed with the differential injection signals and to realize the divide-by-5 ILFD. The distributed-element harmonic termination is proposed to filter out the harmonic signals of and , while sustaining the signal level of . B. Distributed-Element Harmonic Termination Design , and so on) of the It is noted that even harmonics ( , free running frequency will be produced at the common node A, as shown in Fig. 2, when the ILFD is operated without input injection signals. In order to realize the function of

LI et al.: LOW-VOLTAGE, WIDE-LOCKING-RANGE, MILLIMETER-WAVE DIVIDE-BY-5 INJECTION-LOCKED FREQUENCY DIVIDERS

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Fig. 3. Block diagram illustrating the circuit functioning of the proposed divide-by-5 ILFD.

division-by-5, the injection signal mixes with the at node A and the signal will be generated within the vicinity of the free-running frequency . When , the function of division-by-5 will be achieved, where is the free-running frequency of the oscillator and is the single-side locking range of the divider. The relation between the locking range and the injection ratio had been derived in [9]–[11]. Fig. 4 shows an instantaneous output spectrum during the injection-locking. For simplicity, the harmonics with an order higher than six are ignored. At first, when considering the situation that the injection signal is higher than and let , the generated signals at the mixer output will contain the following three components , , as well as the free running frequency , as shown in Fig. 4(a), where and represent the frequency components resulted from the frequency mixing with and , respectively. Traditionally, the phenomenon of injection lock is interpreted as is pulled by and the final output frequency comes to be between and . However, based on the scenario we have established, the component will try to pull the locked signal away from the locking condition and toward to . Therefore, the traditional locking range will be reduced due to the pulling effect resulted by . Similarly, for the case that is lower than and , the following three components , , as well as the free running frequency will be generated, as shown in Fig. 4(b). The component will try to pull the locked signal away from the locking condition and toward to . Therefore, the traditional locking range is still reduced by . From Fig. 4, it is observed that the frequency component of is generated by the frequency mixing of and . Since the power of the second harmonic signal is much bigger than that of other harmonic signals , the component is too significant to be neglected. Meanwhile, the component is dependent on the input injection power, and it will cause the injection ratio degradation due to the strong non-linear behavior of the injector with a high injection power. From the abovementioned frequency components, we can conclude that the unwanted signals and degrade the locking range.

Fig. 4. Illustration the divider mixing frequency output spectrum when (a) , and (b) .

In this design, the distributed-element harmonic termination is adopted to minimize the adverse effect of harmonic signals and on the locking range. The distributed-element harmonic termination is implemented by a quarter-wavelength microstrip open stub due to its periodicity. Since the length of the open stub is , where is the guided wavelength at the resonant frequency , it will behave like a short circuit at the frequencies for On the other hand, the signal level of remains almost unchanged because of the open circuit. To verify the locking range was enhanced by using distributed-element harmonic termination, the sensitivity curves of the divide-by-5 ILFD was simulated and plotted in Fig. 5. The simulated locking range of the 60-GHz ILFD is 4.3 GHz (58 to 62.3 GHz) at an input injection power of 0 dBm, whereas it is 2.5 GHz (58.3 to 60.8 GHz) without the quarter-wavelength microstrip open stub (i.e., simply in floating source). Therefore, the locking range improves by over 72%. At the input power of 0 dBm, the locking ranges of the 24-GHz ILFD with and without the open stub are 3.1 GHz (23.1 to 26.2 GHz) and 2.2 GHz (23.4 to 25.6 GHz), respectively. Therefore, there is an increase of over 40% in the locking range. To verify the degradation of the locking range by the harmonic signal in the divide-by-5 ILFD, we simulated the power suppression characteristics of three different quarter-wavelength microstrip open stubs designed for the 24-GHz case. The results are plotted in Fig. 6. An open stub that can simultaneously suppress the power at a frequency of is enough to reduce the degradation in the locking range that is caused by the sixth harmonic signal . A stepped-impedance resonator (SIR) filter [12], which is widely used to control the periodicity response of a distributed-element component, can be used to suppress the power at the sixth harmonic. The open stubs in cases 1 and 2 (as sketched

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Fig. 6. Simulated results of power suppression capability for different quarterwavelength microstrip open stubs. Also shown in the figure (bottom) is the illustration of the structure of the proposed open stub and those in case 1 and case 2.

Fig. 5. Simulated curves of the input sensitivity with and without the quarterwavelength microstrip open stub (a) 60-GHz ILFD and (b) 24-GHz ILFD.

in Fig. 6) used for comparison has poor power suppression at the frequency . However, the stub can sustain the signal to a similar level at the frequencies and . The curve of the input sensitivity of the 24-GHz divide-by-5 ILFD with different quarter-wavelength microstrip open stubs is shown in Fig. 7. The simulated locking range of the 24-GHz ILFD with the proposed open stub is 3.1 GHz (23.1 to 26.2 GHz) at the input injection power of 0 dBm, whereas it is 2.3 GHz (22.6 to 24.9 GHz) and 2.2 GHz (24 to 26.2 GHz) with the open stubs used in cases 1 and 2, respectively. From the simulated results, we show that suppression of the sixth harmonic signal improves the locking range of the divide-by-5 ILFD. Although the simulation results shown in Figs. 6 and 7 are for the 24-GHz ILFD, the similar design methodology and simulation results can be obtained for the 60-GHz case. III. MEASUREMENT RESULTS Fig. 8 show the ILFD chip micrographs. The die sizes of the proposed ILFDs for the 60- and 24-GHz operations are 0.68 0.74 and , respectively. The on-wafer characteristics of these two ILFDs are measured. Losses due to the cables, adaptors, and probes have been accounted for. The operation of MMW divide-by-5 ILFDs that operate at 60 GHz

Fig. 7. Simulated results of input sensitivity of the 24-GHz ILFD for different quarter-wavelength microstrip open stubs.

(using a standard 90-nm CMOS process) and 24 GHz (using a 0.18- m CMOS process) is demonstrated. The measurement results of the 60-GHz ILFD are shown in Figs. 9–11. The power consumption of the divider core is 3.75 mW at a supply voltage of 0.6 V. The measured free-running frequency is approximately 11.8 GHz. The curves of the input sensitivity and output power at an input power of 0 dBm of the divider are plotted in Fig. 9. The locking range is 4.1 GHz, which covers the frequency range of 59.4 to 63.5 GHz at the input power of 0 dBm, without using the frequency tuning varactors. The output power is greater than at the input signal power level of 0 dBm over the entire input frequency range. The locked output spectrum is shown in Fig. 10. The output signal is 12 GHz due to the divide-by-5 function when the frequency divider is locked at the input frequency of 60 GHz. As shown in Fig. 11, the measured phase noise difference at 100 kHz frequency offset between the 60 GHz input signal and the phase noise of the 12 GHz output

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Fig. 10. Measured output spectrum with a 60-GHz input signal.

Fig. 11. Measured input and output phase noises versus the offset frequency when the input signal is 60 GHz.

Fig. 8. Chip micrograph of the proposed divide-by-5 dividers (a) The 60-GHz ILFD and (b) The 24-GHz ILFD.

Fig. 12. Measured input sensitivity curve and output power curve at 0 dBm input power of the 24-GHz divide-by-5 ILFD.

Fig. 9. Measured input sensitivity curve and output power curve at 0 dBm input power of the 60-GHz divide-by-5 ILFD.

signal is approximately 14 dB, that is, very close to the theoretical value for the division-by-5 as expected. Figs. 12–14 show the measurement results of the 24-GHz ILFD. For a 0.7-V supply and a power dissipation of 7.4 mW (for the divider core), the free-running frequency is measured to

be approximately 4.9 GHz. The curves of the input sensitivity and output power at an input power of 0 dBm of the divider are plotted in Fig. 12. A locking range of 1.9 GHz (22.85 to 24.78 GHz) is obtained at the input power of 0 dBm without the use of frequency tuning varactors. The output power is greater when the frequency divider is locked at the input frequency of 24 GHz, and the second and fifth harmonic suppressions are greater than 32 and 31 dBc, respectively. The locked output spectrum is shown in Fig. 13. As shown in Fig. 14, compared with the measured phase noise of the 24-GHz input signal,

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TABLE I PERFORMANCE COMPARISON WITH THE REPORTED MMW ILFDS.

Fig. 13. Measured output spectrum with a 24-GHz input signal.

The figure of merit (FOM) to evaluate a ILFD design can be cited from [15]. However, as mentioned in Section I, the key parameters for the ILFD design are the division ratio, locking range, and power consumption. Since the locking range is strongly dependant on the input injection power, therefore, a revised FOM cited from [7] containing the above-mentioned indices is more proper for a fair comparison. As shown in Table I, the calculated FOM values of the proposed 24- and 60-GHz dividers are 6.4 and 69.4, respectively, which are also outstanding compared with the other reported works. Also it is noted that the proposed divide-by-5 ILFD is much more efficient on frequency scaling compared with that of of divide-by-3. IV. CONCLUSION

Fig. 14. Measured input and output phase noise versus frequency offset when the input signal is 24 GHz.

the phase noise of the 4.8-GHz output signal at the offset frequency of 100 kHz is . Table I summarizes the performance and provides a comparison of the MMW ILFDs reported in [1]–[4] and [13], [14]. It is observed that the locking ranges of the proposed 24- and 60-GHz divide-by-5 ILFDs are 1.9 and 4.1 GHz, respectively, which are quite wide among the compared works.

A 24-GHz and a 60-GHz MMW divide-by-5 ILFDs based on an N-MOS cross-coupled oscillator core, fabricated by a 0.18- m 1P6M and a 90-nm 1P9M RF CMOS process, respectively, have been presented. The use of a new injector topology, which utilizes a open stub connected at the common source ends, enables the fabricated 24- and 60-GHz ILFDs to successfully operate according to the frequency divide-by-5 function at a low voltage, 0.7 V and 0.6 V, and with low power consumption, 7.4 and 3.75 mW, respectively. Simulation data indicate that the addition of the open stub greatly improves the frequency locking range of the designed ILFDs by over 40% and 72% for the 24- and 60-GHz operations, respectively. The proposed 24- and 60-GHz divide-by-5 ILFDs without extra tuning varactors have very wide locking ranges of 1.9 and 4.1 GHz, and outstanding FOM values of 6.4 and 69.4, respectively, compared with the reported works. ACKNOWLEDGMENT The authors would like to thank the Chip Implementation Center (CIC) of the National Science Council, Taiwan, for supporting the chip fabrication in TSMC’s RF CMOS process. The authors also thank Dr. Guo-Wei Huang of the Nano-Device Laboratory (NDL), Taiwan, for supporting the chip measurement.

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REFERENCES [1] H. K. Chen, H. J. Chen, D. C. Chang, Y. Z. Juang, Y. C. Yang, and S. S. Lu, “A mm-wave CMOS multimode frequency divider,” in IEEE ISSCC Dig. Tech. Papers, Feb. 2009, pp. 280–281, 281a. [2] T. N. Luo and Y. J. E. Chen, “A millimeter-wave 90-nm CMOS selfmixing frequency divider,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 8, pp. 563–565, Aug. 2008. [3] S. Rong and H. C. Luong, “A 1 V 1.7 mW 25 GHz transformer-feedback divide-by-3 frequency divider with quadrature outputs,” in IEEE Asian Solid-State Circuits Conf., Nov. 2007, pp. 328–331. [4] H. Wu and L. Zhang, “A 16-to-18 GHz 0.18 m Epi-CMOS divide-by-3 injection-locked frequency divider,” in IEEE ISSCC Dig. Tech. Papers, Feb. 2006, pp. 2482–2491. [5] H. Wu and A. Hajimiri, “A 19 GHz 0.5 mW 0.35 m CMOS frequency divider with shunt-peaking locking-range enhancement,” in IEEE ISSCC Dig. Tech. Papers, Feb. 2001, pp. 412–413, 471. [6] H. H. Hsieh et al., “A V-band divide-by-three differential direct injection-locked frequency divider in 65-nm CMOS,” in Proc. IEEE Custom Integrated Circuits Conf. (CICC), Sep. 24–2, 2010, pp. 1–4. [7] M.-W. Li, H.-C. Kuo, T.-H. Huang, and H.-R. Chuang, “60 GHz CMOS divide-by-5 injection-locked frequency divider with an open-stub-loaded floating-source injector,” in Proc. IEEE Radio Frequency Integrated Circuits Symp. (RFIC), Jun. 2011, pp. 1–4. [8] Y. T. Chen, M. W. Li, T. H. Huang, and H. R. Chuang, “A V-band CMOS direct injection-locked frequency divider using forward body bias technology,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 7, pp. 396–398, Jul. 2010. [9] M. Tiebout, “A CMOS direct injection-locked oscillator topology as high-frequency low-power frequency divider,” IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1170–1174, Jul. 2004. [10] C. Y. Wu and C. Y. Yu, “Design and analysis of a millimeter-wave direct injection-locked frequency divider with large frequency locking range,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 8, pp. 1649–1658, Aug. 2007. [11] T. N. Luo, S. Y. Bai, and Y. J. E. Chen, “A 60-GHz 0.13 m CMOS divide-by-three frequency divider,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 11, pp. 2409–2415, Nov. 2008. [12] J. T. Kuo and E. Shih, “A 60-GHz 0.13 m CMOS divide-by-three frequency divider,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 5, pp. 1554–1559, May 2003. [13] S. L. Jang, J. C. Luo, C. W. Chang, C. F. Lee, and J. F. Huang, “V-band high-order harmonic injection-locked frequency-divider MMICs with wide bandwidth and low-power dissipation,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 6, pp. 1891–1898, Jun. 2005. [14] C.-H. Wang, C.-C. Chen, M.-F. Lei, M.-C. Chuang, and H. Wang, “A 66–72 GHz divide-by-3 injection-locked frequency divider in 0.13-um CMOS technology,” in Proc. IEEE Asian Solid-State Circuits Conf. (ASSCC 2007), Nov. 12–14, 2007, pp. 344–347. [15] D. Grujic, M. Savic, and J. Popovic-Bozovic, “A power efficient frequency divider for 60 GHz band,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 3, pp. 148–150, Mar. 2011. Ming-Wei Li (S’10) received the B.S.E.E. degree from National Taiwan University of Science and Technology, Taipei, Taiwan, in 2006, and the M.S.E.E. degree from the Graduate Institute of Computer and Communication Engineering, National Cheng Kung University, Tainan, Taiwan, in 2009. Currently, he is with Etron Technology, Hsinchu, Taiwan, as a research engineer. His research interests include the millimeter-wave CMOS RFIC, PLL for wireless communication systems, and analogy integrated circuit design.

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Po-Chi Wang (S’11) received the B.S. degree from National University of Kaohsiung, Kaohsiung, Taiwan, in 2010. He is currently working toward the M.S. degree in the Institute of Computer and Communication Engineering, Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan. His research interests include and millimeter-wave CMOS RFIC and RF system design.

Tzuen-Hsi Huang (M’96) received the B.S. degree in electrical engineering from National Cheng Kung University, Tainan, Taiwan, in 1988, and the Ph.D. degree in solid-state electronics from National Chiao Tung University, Hsinchu, Taiwan, in 1995. From 1995 to 2001, he worked at ERSO/ITRI, Hsinchu, Taiwan. He was involved in high-speed poly-emitter bipolar technology development, device characterization/modeling, and RF circuit design. From 2001 to 2004, he was with AIROHA Technology, Hsinchu, where he was involved in GSM/WLAN front-end chip design. In August 2004, he joined the faculty of the Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan, where he is currently an Associate Professor. His research interests include CMOS RF and mm-wave integrated circuit designs.

Huey-Ru Chuang (SM’06) received the B.S.E.E. and M.S.E.E. degrees from the National Taiwan University, Taipei, Taiwan, in 1977 and 1980, respectively, and the Ph.D. degree in electrical engineering from Michigan State University, East Lansing, in 1987. From 1987 to 1988, he was a Post-Doctoral Research Associate with the Engineering Research Center, Michigan State University. From 1988 to 1990, he was with the Portable Communication Division, Motorola Inc., Ft. Lauderdale, FL. Since 1991, he has been with the Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan, and currently he is a Professor in the Institute of Computer and Communication Engineering, Department of Electrical Engineering, National Cheng Kung University. His research interests include microwave/millimeter-wave circuits and systems, RF integrated circuits (RFICs) and antenna design for wireless communications, electromagnetic computation and applications, and microwave/millimeter-wave communication and sensing systems.

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Millimeter-Wave Optoelectronic Mixers Based on Uni-Traveling Carrier Photodiodes Efthymios Rouvalis, Student Member, IEEE, Martyn J. Fice, Member, IEEE, Cyril C. Renaud, Member, IEEE, and Alwyn J. Seeds, Fellow, IEEE

Abstract—We present a novel technique for optoelectronic frequency down-conversion of millimeter-wave signals generated from photomixers. The mixing element proposed here is a uni-traveling carrier (UTC) photodiode employing a traveling wave design, originally fabricated for the generation of millimeter-wave signals. For fundamental mixing at a frequency of 100 GHz, a conversion gain of 32 dB was measured, representing a significant improvement on previously published results. When the device was operated as a subharmonic mixer, an additional loss of 20, 27, and 39 dB was measured for second-, third- and fourth-harmonic mixing, respectively, for the same level of RF input power (0 dBm). A nonlinear dependence of the IF signal on the optically generated signal was measured. From subharmonic mixing measurements, a flat intermediate frequency (IF) response was found over a wide range of frequencies, limited mainly by the IF electronic components. Index Terms—InP device, microwave photonics, millimeterwave mixers, optoelectronics, uni-traveling carrier (UTC) photodiode.

I. INTRODUCTION

A

LARGE variety of applications are emerging in the millimeter-wave and terahertz parts of the electromagnetic spectrum. Ultra-wideband communications using millimeter-wave carriers have received attention because of the potential for extremely high bit rates over a short distance [1], [2]. InP-based photomixing devices have been successfully developed to generate considerable levels of power at frequencies up to 1.5 THz and beyond [3]–[5]. Narrow-linewidth signal-generation techniques, such as injection and phase locking of the optical heterodyne signal, have to be employed for heterodyne coherent detection [6]. So far, many coherent millimeter-wave and terahertz systems utilize detectors based on Schottky diodes, superconductor–insulator–superconductor (SIS) mixers, and hot electron bolometers [7]. Coherent heterodyne detection, where a photomixing device was used to generate the local oscillator (LO), has already been demonstrated [8]–[10]. One of the main problems Manuscript received July 01, 2011; revised November 21, 2011; accepted November 25, 2011. Date of publication January 11, 2012; date of current version March 02, 2012. This work was supported in part by the Engineering and Physical Science Research Council under PORTRAIT Project, EP/D502233/1, the European Commission within the framework of the European project iPHOS under Grant 257539, and the Air Force Office of Scientific Research, Air Force Material Command, USAF, under Grant FA8655-09-1-3078. The authors are with the Department of Electronic and Electrical Engineering, University College London, London, WC1E 7JE, U.K (e-mail: e.rouvalis@ee. ucl.ac.uk; [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2178257

of these mixers is the limited range of frequencies of operation, typically within a rectangular waveguide band, which can make these devices unsuitable for systems that need to be operated over a wide frequency range. In addition, most of these mixers are not compatible with the established photonic InP technology that has enabled state-of-the-art photomixers [11]. The use of the same semiconductor device as an LO generator and a down-converting mixer at the same time is a promising approach [12]–[14], which is a technique known as optically pumped mixing (OPM). The LO is supplied photonically to the mixer and is generated through photomixing while the signal to be detected is applied directly at the terminals of the photomixer. The modulation of the bias voltage that in turn modulates the photocurrent is believed to be the main mixing mechanism in photodetectors. However, in a similar way, a high-power millimeter-wave signal can be applied to the photodetector in order to down-convert the optically generated signal. At millimeter-wave frequencies where power transfer between chips can be lossy, optoelectronic mixers can be monolithically integrated with other InP devices on the same InP substrate. The motivation for this work arises from the need for on-chip detection of the optically generated signal from a monolithically integrated millimeter-wave photomixing source so that the IF signal can be used as an input to an optical phase-locked loop (OPLL). Compared with a fundamental mixer, a subharmonic mixer can still use a high-power, low-frequency signal at the input. Here, we report the operation of an InP-based uni-traveling carrier (UTC) photodiode as an optoelectronic subharmonic mixer. An optical heterodyne signal of 100 GHz was applied to the photodiode. The conversion gain for fundamental mixing was defined as the ratio between the power of the intermediate frequency (IF) and the power of the radio frequency (RF) dB was obtained at signals. A conversion gain of about 100 GHz that is an improvement of almost 8 dB compared to previously published results [12]. An uniform IF frequency response was found limited by the electronic components processing the IF signal. The dependence of the IF signal on the photocurrent was also assessed. IF power levels of the order were obtained for 3rd and 4th harmonic mixing. of We anticipate this scheme would allow for efficient optoelectronic down-conversion of photonically generated signals from photomixers by using standard microwave equipment. II. INP-BASED UNI-TRAVELING CARRIER PHOTODIODES For the following experiments (Fig. 1) an uni-traveling carrier photodiode (UTC-PD) with a traveling wave design was used. Some of these antenna-integrated devices have demonstrated

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Fig. 1. Experimental arrangement for optoelectronic subharmonic mixing with ultrafast photodetectors in the millimeter-wave range. A narrow-linewidth 100-GHz signal is generated through an OHG system based on optical injection locking. The down-converting signal is fed into the device from a signal generator. The IF signal is measured with a spectrum analyzer.

record levels of terahertz output power [3]. In UTC-PDs, absorption takes place in the p-doped region where holes are majority carriers. Therefore, only electrons drift through the depletion region and can achieve overshoot velocity conditions [4]. For these reasons, the overall carrier transit time is substantially shorter than for p-i-n photodiodes, while overshoot velocity can lead to important nonlinear effects, making them suitable for optoelectronic mixing [15]. In addition to this, traveling wave effects can significantly improve the 3-dB bandwidth and the roll-off of the frequency response resulting in high levels of photonically generated power [16]. Coplanar waveguide (CPW)-integrated devices, such as those reported in [3], have achieved a 3-dB bandwidth of 110 GHz. Here, a device with an active area of 2 25 m was used, and a table showing the epitaxy details for this is given in [3]. A CPW transition was designed to be used with coplanar ground–signal–ground probes. The devices were also fabricated with a mode-converting dielectric optical waveguide in order to achieve efficient coupling from a lensed fiber, and a maximum responsivity of 0.3 A/W at 1.55 m was measured. The optical heterodyne generation (OHG) system was used to measure the frequency response of the device on a 50load. A 3-dB bandwidth of 89 GHz and a 4-dB bandwidth at 100 GHz measured for these devices is a considerable improvement on the values reported in [12] (3-dB bandwidth of 63 GHz and a drop of 8 dB at 100 GHz). III. EXPERIMENTAL ARRANGEMENT The performance of the UTC-PD as a mixer was assessed in terms of the conversion gain, the dependence of the IF power to the RF power and the photocurrent, and the relative conversion gain as a function of the IF frequency. In Fig. 1 the experimental arrangement used for subharmonic mixing is shown. All experiments were performed with an optical heterodyne signal of 100 GHz. The 100-GHz signal was generated by optical injection locking (OIL) two slave laser diodes to a master frequency comb generated by phase modulating the output of a DFB laser at 20 GHz. This technique has the capability of generating signals with linewidths of the order of less than 10 Hz [17]. The optical heterodyne signal was then amplified with an erbium-doped fiber amplifier (EDFA) and fed into the

Fig. 2. DC photocurrent as a function of the reverse bias for various levels of optical power. The measurements were taken with a 16 lensed fiber at a wavelength of 1.55 m.

UTC-PD through a lensed fiber. A DC-67 GHz coplanar probe with an external bias-tee was used for subharmonic mixing experiments allowing wide tuneability of the IF frequency. The RF signal from a signal generator was fed through a coaxial line and the coplanar probe into the UTC-PD. Some modifications were necessary for fundamental mixing experiments where the 100 GHz signal was generated from a -band (75–110 GHz) frequency multiplier driven by the same signal generator. In this case, a free-space arrangement that employed two 20-dBi gain horn antennas was used to feed the 100 GHz signal into the UTC-PD via a waveguide coplanar probe, to avoid applying excessive mechanical force to the UTC-PD via the probe. More details about this experimental arrangement can be found in [12]. Losses in the experimental arrangement for both the IF and the RF signals were measured carefully, and the results showing the conversion gain in Section III are calibrated using these measurements to give the actual power at the UTC-PD. IV. FUNDAMENTAL MIXING In order to obtain a better understanding of the nonlinearities in the UTC-PD, – measurements were taken initially at a wavelength of 1,55 m. The – characteristic of the device is

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Fig. 3. Conversion gain for fundamental mixing as a function of reverse bias for various levels of optical power ranging from 10 to 15.2 dBm. All measurements were taken at a 0-dBm input signal and an IF of 50 kHz.

shown in Fig. 2. The photocurrent showed an increasingly nonlinear response for high levels of optical power. For an optical input power of 10 dBm, the photocurrent did not show any significant change above 2 V. However, when the optical power was increased to 15.2 dBm, a slope in the – characteristic could be seen for reverse bias voltages up to 4 V. The maximum applied bias was limited to 4 V to limit the maximum dissipated power and to avoid thermal failure. Similar nonlinear effects in photodiodes and the associated physical mechanisms were previously studied in [18]. Initially, the device was assessed in terms of its output power characteristics, and an output power of 0 dBm delivered to a load was measured at a photocurrent of 10 mA under a reverse bias of 4 V. This was consistent with the previous measurements for the 3-dB bandwidth of the device and no sign of power saturation was seen at this level of photocurrent. To verify that these nonlinearities can be used to down-convert signals in the millimeter-wave range, a first set of fundamental mixing experiments was performed using the experimental arrangement described in [12]. For fundamental mixing, the input was 0 dBm, 100 GHz signal, and was only 50 kHz limited by the experimental arrangement [12]. The main limitation for this was that the IF was extracted through the dc port of the integrated bias-tee of the -band probe. The same values for the optical power and the reverse bias were used as in the previous dc measurements. The conversion gain after the appropriate corrections for losses in the RF and the IF paths is plotted in Fig. 3. For low-input optical power levels, the conversion gain has a maximum at 1.25 V. However, for optical input power levels higher than 12.6 dBm, the maximum conversion gain was found at the maximum applied reverse bias. A conversion gain of 32 dB was found at the reverse bias of 4 V and a DC photocurrent of 10 mA and the spectrum of the detected IF signal is given in Fig. 4. Behavior similar to that published previously [12], [13] was observed. The noise floor that was found to be approximately 105 dBm/Hz is associated with the beat signal between the amplified optical signal and the amplified spontaneous emission (ASE) noise from the EDFA. This noise floor remained the same when the incoming signal from the input port of the mixer was turned off, indicating that the IF noise floor was

Fig. 4. Detected calibrated signal at an IF of 50 kHz for fundamental mixing at an applied reverse bias of 4 V and an optical input power of 15.2 dBm.

caused by the photonic LO. In comparison with the conversion gain of 40 dB that was reported in [12], the value reported here 32 dB can be attributed to the increase in the photonically generated power for this experiment, which is about 8 dB. In general, the dependence of the conversion gain on the applied reverse bias can be explained as follows. For high levels of photocurrent, the largest relative change in the ac photocurrent is observed at a relatively low bias. However, this large relative change is located around a bias point where the overall power generated is generally low, since the applied field is not sufficient to accelerate electrons in the depletion region. When the reverse bias increases, a small but still considerable photocurrent change together with large photonically generated power provides the maximum conversion gain. The IF signal power increased by more than 40 dB at a 4-V reverse bias compared with 0 V. The higher optically generated power is obtained at a high reverse bias since the electric field causes carriers to drift faster across the depletion region, reducing the overall transit time across the device. V. SUBHARMONIC MIXING For subharmonic mixing measurements, the optical signal was kept the same and the IF signal was selected to be where is the harmonic order. To make a fair comparison, the same level of power was used (0 dBm) as the one applied for fundamental mixing. In Fig. 5, the conversion gain for second-, third-, and fourth-order subharmonic mixing is given as a function of the applied bias for an optical input power of 15.2 dBm. These measurements were taken at an IF of 50 MHz where the insertion loss of the IF signal was approximately 3 dB. The results for fundamental mixing are also given for comparison 50 kHz . Compared with fundamental mixing, at a reverse bias of 4 V, an additional conversion loss of about 20, 27, and 39 dB was observed for second-, third-, and fourth-harmonic mixing, respectively. Saturation in the conversion gain for third-harmonic mixing was also observed. To investigate the dependence of the IF power on the RF signal, the RF power was swept. The reverse bias was kept at 4 V, and the dc photocurrent was 10 mA. In Fig. 6, the detected IF power for fundamental and subharmonic mixing is shown. To explore the full dynamic range of the mixer, the resolution

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Fig. 5. Conversion gain versus applied reverse bias for fundamental (100 GHz) and subharmonic mixing (50, 33.3, and 25 GHz). All measurements were taken at the same level of optical power (15.2 dBm) and the same level of RF input power (0 dBm).

Fig. 7. IF power for fundamental mixing as a function of the square of the measured dc photocurrent for various optical power levels and a constant applied reverse bias of 4 V.

Fig. 6. IF power as a function of RF power for fundamental and harmonic 4V 10 mA . mixing

Fig. 8. Relative conversion gain as a function of the IF frequency, normalized 19 GHz where a maximum conversion gain of 50 dBm to the point was found.

bandwidth of the instrument was reduced to 10 Hz. For fundamental mixing, a linear relation between the RF and the IF power was obtained that is in good agreement with our previous experiments [12], [13]. For subharmonic mixing, by curve fitting, a dependence was found where was 1.98, 3.02, and 3.87 for second-, third-, and fourth-harmonic mixing. The maximum RF power is limited by the maximum power available from the signal generator and connection losses. Another device was damaged under illumination when the power of the 50-GHz signal reached 16 dBm. It is important to note that, from this measurement, a high-IF SNR is feasible even when a low-frequency signal is present at the input of the device. This result demonstrates the capability of the device as a down-converting mixer without the necessity for a high-frequency signal. The dependence of the power of the IF signal on the photocurrent was investigated by keeping the bias voltage constant and sweeping the optical power. In our previous work, we found that there was a nonlinear relationship between the optical input power and the dc photocurrent that in practice means that the dc responsivity depends on the optical input power level for a given bias voltage [12]. In order to avoid taking into account this nonlinearity, and since the power of the photogenerated signal has only been measured with a 50- load, in Fig. 7, the IF power is given as a function of the square of the dc photocurrent, . From Fig. 7, it can be seen that the IF power is not following a

linear relationship with the square of the photocurrent. A rather linear behavior has already been demonstrated for low levels of photocurrent [12]. When the photocurrent increases, the – characteristics were found to be nonlinear, which is believed to be beneficial to the mixing mechanism. Finally, the IF frequency response was assessed by sweeping the RF signal in the frequency domain. As previously shown, for fundamental mixing the optimum IF frequency was found to be 50 kHz and resulted in a very low IF bandwidth. This low IF bandwidth was the result of the combination of a low-pass and a high pass response at the IF output of the device [12]. In the case of sub-harmonic mixing, the DC-67 GHz probe that was used allowed for a broad sweep of the IF frequency. For this measurement, the second-harmonic IF signal was swept. The output power of the RF signal was calibrated at the input of the device to include frequency dependent losses in the connections and the coplanar probe. The relative conversion gain, normalized to the maximum level that was found at 19 GHz, is plotted in Fig. 8. Relatively flat IF frequency response was measured over a broad range from 5 to 26.5 GHz. From 1 to 5 GHz, a significant drop in the relative conversion gain was observed. From measurements on UTC-PDs, it was found that the high impedance of the device at these frequencies could result in a large mismatch with the external circuit. Therefore,

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this decreased relative conversion gain from 1 to 5 GHz is not believed to be due to a degradation of the incoming signal. VI. CONCLUSION In this paper, we have investigated the performance of a UTC-PD as a millimeter-wave fundamental and subharmonic mixer. For fundamental mixing, conversion gain was found to be 8 dB higher than previously published results. This significant improvement is attributed to the higher LO-generated power that is mainly due to the improved frequency response. For subharmonic mixing, a decrease in the conversion gain of 20, 27, and 39 dB was found for second-, third-, and fourth-harmonic mixing, respectively, at an input power of 0 dBm. For higher order harmonics, a high SNR was achieved when the RF input power was increased. The relationship between the IF signal power and the square of the dc photocurrent was also investigated. A nonlinear region was found for high photocurrent values. A flat IF frequency response was found for frequencies between 5 and 26.5 GHz while the poor performance around 3 GHz is attributed to the large impedance mismatch between the UTC-PD and the external circuit at these frequencies. It is anticipated that this mixing scheme will allow the use of the UTC-PD in a monolithically integrated InP-based photomixing millimeter-wave source not only as an efficient emitter but also as a detector. Subharmonic mixing allows the use of widely available microwave equipment without the necessity for hybrid integration of the InP chip with other external mixers such as GaAs-based Schottky diode mixers. This strong IF signal can be fed to external OPLL electronics directly further reducing the loop delay. REFERENCES [1] T. Kleine-Ostmann and T. Nagatsuma, “A review on terahertz communications research,” J. Infrared, Millimeter Terahertz Waves, vol. 32, no. 2, pp. 143–171, 2011. [2] A. Stöhr, S. Babiel, P. J. Cannard, B. Charbonnier, F. van Dijk, S. Fedderwitz, D. Moodie, L. Pavlovic, L. Ponnampalam, C. C. Renaud, D. Rogers, V. Rymanov, A. J. Seeds, A. G. Stefan, A. Umbach, and M. Weiss, “Millimeter-wave photonic components for broadband wireless systems,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 11, pp. 3071–3082, Nov. 2010. [3] E. Rouvalis, C. C. Renaud, D. G. Moodie, M. J. Robertson, and A. J. Seeds, “Travelling-wave uni-travelling carrier photodiodes for continuous wave THz generation,” Opt. Exp., vol. 18, no. 11, pp. 11105–11110, 2010. [4] H. Ito, S. Kodama, Y. Muramoto, T. Furuta, T. Nagatsuma, and T. Ishibashi, “High-speed and high-output InP-InGaAs unitraveling-carrier photodiodes,” IEEE J. Sel. Topics Quantum Electron., vol. 10, no. 4, pp. 709–727, Jul.–Aug. 2004. [5] S. Preu, G. H. Döhler, S. Malzer, L. J. Wang, and A. C. Gossard, “Tunable, continuous-wave terahertz photomixer sources and applications,” J. Appl. Phys., vol. 109, no. 6, 2011, Art. ID 061301. [6] R. J. Steed, L. Ponnampalam, M. J. Fice, C. C. Renaud, D. C. Rogers, D. G. Moodie, G. D. Maxwell, I. F. Lealman, M. J. Robertson, L. Pavlovic, L. Naglic, M. Vidmar, and A. J. Seeds, “Hybrid integrated optical phase-lock loops for photonic terahertz sources,” IEEE J. Sel. Topics Quantum Electron., vol. 17, no. 1, pp. 210–217, Jan.–Feb. 2011. [7] H.-W. Hübers, “Terahertz heterodyne receivers,” IEEE J. Sel. Topics Quantum Electron., vol. 14, no. 2, pp. 378–391, Mar.–Apr. 2008. [8] S. Verghese, E. K. Duerr, K. A. McIntosh, S. M. Duffy, S. D. Calawa, C.-Y. E. Tong, R. Kimberk, and R. Blundell, “A photomixer local oscillator for a 630-GHz heterodyne receiver,” IEEE Microw. Guided Wave Lett., vol. 9, no. 6, pp. 245–247, Jun. 1999.

[9] I. C. Mayorga, P. M. Pradas, M. Mikulics, A. Schmitz, P. van der Wal, C. Kasemann, R. Güsten, K. Jacobs, M. Marso, H. Lüth, and P. Kordoš, “Terahertz photonic mixers as local oscillators for hot electron bolometer and superconductor-insulator-superconductor astronomical receivers,” J. Appl. Phys., vol. 100, no. 4, 2006, Art. ID 043116. [10] S. Kohjiro, K. Kikuchi, M. Maezawa, T. Furuta, A. Wakatsuki, H. Ito, N. Shimizu, T. Nagatsuma, and Y. Kado, “A 0.2–0.5 THz single-band heterodyne receiver based on a photonic local oscillator and a superconductor-insulator-superconductor mixer,” Appl. Phys. Lett., vol. 93, no. 9, p. 093508, 2008. [11] M. J. Fice, E. Rouvalis, L. Ponnampalam, C. C. Renaud, and A. J. Seeds, “Telecommunications technology-based terahertz sources,” Electron. Lett., vol. 46, no. 26, pp. S28–S31, 2010. [12] E. Rouvalis, M. J. Fice, C. C. Renaud, and A. J. Seeds, “Optoelectronic detection of millimetre-wave signals with travelling-wave uni-travelling carrier photodiodes,” Opt. Exp., vol. 19, no. 3, pp. 2079–2084, 2011. [13] E. Rouvalis, M. J. Fice, C. C. Renaud, and A. J. Seeds, “Optically pumped mixing at 100 GHz with travelling-wave uni-travelling carrier photodiodes,” in Proc. Conf. Lasers Electro Opt., Baltimore, MD, 2011, paper JThB115. [14] C. C. Renaud, L. Ponnampalam, F. Pozzi, E. Rouvalis, D. Moodie, M. Robertson, and A. J. Seeds, “Photonically enabled communication systems beyond 1000 GHz,” in Proc. Int. Top. Meeting Microw. Photon., Gold Coast, Australia, 2008, pp. 55–58. [15] T. J. Maloney and J. Frey, “Transient and steady-state electron transport properties of GaAs and InP,” J. Appl. Phys., vol. 48, no. 2, pp. 781–787, 1977. [16] K. S. Giboney, J. W. Rodwell, and J. E. Bowers, “Traveling-wave photodetector theory,” IEEE Trans. Microw. Theory Tech., vol. 45, no. 8, pp. 1310–1319, Aug. 1997. [17] S. Fukushima, C. F. C. Silva, Y. Muramoto, and A. J. Seeds, “Optoelectronic millimeter-wave synthesis using an optical frequency comb generator, optically injection locked lasers, and a unitraveling-carrier photodiode,” J. Lightw. Technol., vol. 21, no. 11, pp. 3043–3051, 2003. [18] K. J. Williams, R. D. Esman, and M. Dagenais, “Nonlinearities in p-i-n microwave photodetectors,” J. Lightw. Technol., vol. 14, no. 1, pp. 84–96, 1996. Efthymios Rouvalis (S’08) was born in Athens, Greece, in 1985. He received the Diploma in electrical and computer engineering from the National Technical University of Athens, Athens, Greece, in 2007. He is currently working towards the Ph.D. degree with the Ultra-Fast Photonics Group, University College London, London, U.K. His current research interests include modeling and characterization of ultrafast photodetectors for continuous-wave terahertz generation and detection. Mr. Rouvalis is a student member of the Optical Society of America (OSA), the IEEE Microwave Theory and Techniques Society (MTT-S), and the IEEE Photonics Society. He has served as a reviewer for OSA and IEEE peer-reviewed journals and

Martyn J. Fice (S’86–M’87) received the B.A. degree in electrical sciences and Ph.D. degree in microelectronics from the University of Cambridge, Cambridge, U.K., in 1984 and 1989, respectively. In 1989, he joined STC Technology Ltd., Harlow, U.K. (later acquired by Nortel), where he was engaged for several years in the design and development of InP-based semiconductor lasers for undersea optical systems and other applications. Subsequent work at Nortel involved research into various aspects of optical communications systems and networks, including wavelength-division multiplexing, all-optical wavelength conversion, optical regeneration, and optical packet switching. Since 2005, he has been a Senior Research Fellow with the Photonics Group, Department of Electronic and Electrical Engineering, University College London, London, U.K. His current research interests include optical transmission systems, coherent optical detection, optical phase-lock-loop techniques, and millimeter and THz wave generation and detection. Dr. Fice is a member of the Institution of Engineering and Technology and a Chartered Engineer.

ROUVALIS et al.: MILLIMETER-WAVE OPTOELECTRONIC MIXERS BASED ON UNI-TRAVELING CARRIER PHOTODIODES

Cyril C. Renaud (M’09) was born in Paris, France, in 1973. He received the degree of engineering from the Ecole Supérieure d’Optique, Orsay, France, the Diplôme d’Etudes Approfondies (D.E.A.) in optics and photonics from the University Paris XI, Orsay, France, in 1996, and the Ph.D. degree from the University of Southampton, Southampton, U.K., in 2001. He spent one year as a Project Engineer with Sfim-ODS, working on the development of microchips lasers. He was then with the Optoelectronics Research Centre, University of Southampton, Southampton, U.K., working on diode0pumped high-power ytterbium-doped fiber-lasers, with particular interest on -switched system and 980-nm generation. He is currently a Lecturer and Site Director of a doctoral training center at University College London, London, U.K., where he is working on optoelectronic devices and systems. His current research includes works on uncooled WDM sources, agile tunable laser diode and monolithic optical frequency comb generator using quantum-confined Stark effect, high-frequency photodetectors (UTC, travelling wave), and optical frequency generation systems in the optical and millimeter wave domains (DWDM, THz).

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Alwyn J. Seeds (M’81–SM’92–F’97) received the Ph.D. and D.Sc. degrees from the University of London, London, U.K. From 1980 to 1983, he was a Staff Member with the Lincoln Laboratory, Massachusetts Institute of Technology (MIT), Lexington, where he was involved with GaAs monolithic millimeter-wave integrated circuits for use in phased-array radar. He returned to the U.K. in 1983 to take up a lectureship in telecommunications with Queen Mary College, University of London. In 1986, he joined University College London (UCL), London, U.K., where he is currently a Professor of optoelectronics and Head of the Department of Electronic and Electrical Engineering. He has authored or coauthored over 300 papers on microwave and optoelectronic devices and their systems applications. His current research interests include microwave bandwidth tunable semiconductor lasers, semiconductor optical modulators, mode-locked lasers, optical phase-locked loops, optical frequency synthesis, broadband wireless over fiber access systems, dense WDM networks, terahertz photonics, and nonlinear optical devices. Prof. Seeds is a Fellow of the Royal Academy of Engineering.

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-Band Amplifiers With 6-dB Noise Figure and Milliwatt-Level 170–200-GHz Doublers in 45-nm CMOS Berke Cetinoneri, Student Member, IEEE, Yusuf A. Atesal, Student Member, IEEE, Andy Fung, Member, IEEE, and Gabriel M. Rebeiz, Fellow, IEEE

Abstract—This paper presents low-noise -band amplifiers and milliwatt-level 170–200-GHz output doublers in 45-nm semiconductor-on-insulator (SOI) CMOS technology. The transistors are modeled using R/C extraction and full electromagnetic modeling. The measured of a 30 1- m transistor is 200–210 GHz -band at a bias current of 0.3–0.5 mA m. A three-stage amplifier shows a record noise figure of 6.0 dB and a saturated output power of 7.5–8.0 dBm with a power-added efficiency of 9%, all at 95 GHz. The -band balanced doubler results in an output power of 1 mW at 180 GHz. A -band amplifier/ -band doubler chip is also demonstrated, with a peak output power of 0.5–1 mW at 170–195 GHz and a conversion gain from 2 to 1 dB. This paper shows that 45-nm SOI CMOS, built for digital and mixed-signal applications, results in state-of-the-art - and -band. performance at Index Terms—CMOS, frequency doubler, -band, low-noise amplifiers, millimeter-wave integrated circuits, -band.

I. INTRODUCTION

M

ILLIMETER-WAVE and terahertz applications of SiGe and CMOS circuits have been an active research topic over the past few years with applications in passive and active imaging systems [1]–[3], short-distance high-data rate communications [4], and sensing. It is also possible to integrate an efficient antenna in the SiGe and CMOS backend above 100 GHz, thereby removing the need for transitions in and out of the wafer, which are very lossy. SiGe has led the way in this area due to the high and more mature millimeter-wave back-end [5]–[7], and CMOS circuits are currently being demonstrated at 100–200 GHz [8]. Some essential components

Manuscript received May 09, 2011; revised July 31, 2011; accepted August 09, 2011. Date of publication September 22, 2011; date of current version March 02, 2012. This work was supported by the C2S2 Focus Center, one of six research centers funded under the Focus Center Research Program (FCRP), a Semiconductor Research Corporation entity, and by the Director’s Research and Development Fund under a contract with the National Aeronautics and Space Administration (NASA). B. Cetinoneri and G. M. Rebeiz are with the Electrical and Computer Engineering Department, University of California at San Diego, La Jolla, CA 92093 USA (e-mail:[email protected]; [email protected]). Y. A. Atesal was with the Electrical and Computer Engineering Department, University of California at San Diego, La Jolla, CA 92093 USA. He is now with the Intel Corporation, Hillsboro, OR 97124 USA (e-mail:alperenatesal@gmail. com). A. Fung is with the Jet Propulsion Laboratory (JPL), California Institute of Technology, Pasadena, CA 91109 USA. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2165964

Fig. 1. Block diagram of

-to- -band multiplier chain.

are the low-noise amplifier for receive applications, and a medium power amplifier or a source that is capable of generating milliwatt-level power in the 200-GHz range. CMOS amplifiers at 90–150 GHz have been demonstrated using 90- and 65-nm technologies [9]–[11]. CMOS oscillators were also demonstrated at 200–600 GHz, but with very low power and poor phase noise [12], [13]. In fact, the phase noise of fundamental and harmonic CMOS oscillators is not quoted in all published papers. We believe that a better way to obtain RF power at 200–400 GHz is to use a low phase-noise millimeter-wave oscillator with a high-performance phase-locked loop (PLL) and an amplifier/multiplier chain (Fig. 1). The final phase noise increases by , but it is still much lower than oscillators that are operating close to . Recently, 45-nm semiconductor-on-insulator (SOI) CMOS, which was developed for digital and mixed-signal circuits with an of 485 GHz referenced to the transistor [14], was used to obtain low-noise amplifiers with a record noise figure (NF) of 3.3–5.7 dB at 45–85 GHz, respectively [15]. The 45-nm SOI CMOS technology therefore has a lot of potential for 90–200-GHz applications, and this paper presents a low-noise amplifier with record -band NF, and record output power at 170–200 GHz using balanced doublers. II. TECHNOLOGY The IBM 45-nm SOI CMOS process cross section is shown in Fig. 2. The transistor body is partially depleted and contained inside a 225-nm-thick buried oxide, which isolates the transistor from the 13.5 cm silicon bulk. There are 11 metal layers above the device layer built using copper, except the 2.2- m-thick aluminum top metal LB. The shielded coplanar waveguide (CPW) transmission line is designed using LB for the signal line and B3 for the ground plane, and the LB side grounds are connected to B3 using UA and UB metal layers. A signal linewidth of 8 m with 9- m spacing to the side grounds results in a 50- transmission line at millimeter-wave frequencies. The floating-body -type field-effect transistor (NFET) devices in the IBM model library are used in the amplifier and

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Fig. 2. 45-nm SOI CMOS process metal stack-up and 50- T-line cross section (not to scale). All metal layers are copper, except the aluminum top metal.

Fig. 4. Modeling of transition from top metal down to transistor level and simplified layout of a 30 1 m transistor.

Fig. 3. Measured calibration.

of a 30

1 m common-source transistor using a TRL

doubler designs. The SOI process offers a superior performance compared to the bulk CMOS technology due to reduced source/ drain junction capacitances and improved device isolation. IBM reports a peak of 485 GHz with a relaxed poly-pitch layout referenced to a 30- m device at the polysilicon layer [14]. However, the transistors in the available design kit have the minimum poly-pitch layout, which increases the terminal capacitances and lowers the peak to 340 GHz. Furthermore, the transitions from the transistor up to the top metal result in added via resistance and capacitance, which significantly deteriorate the transistor performance. A 30 1 m common-source transistor test cell is shown in Fig. 3 and is measured using a thru-reflect-line (TRL) calibration up to the reference planes. This measurement includes the transitions and associated parasitics from the top metal down to the transistor, and the measured is 200 GHz at 0.3-mA m current density. The physical layout of a 30 1 m transistor is shown in Fig. 4. The transistors have dummy polysilicon gates at the outer edges for better device matching. The default transistor model from the IBM library does not fully account for the metal resistances and metal–metal/metal–poly parasitic capacitances since the process is developed for digital and mixed-signal applications. In particular, accurate modeling of the gate resistance is critical for the transistor gain and stability. Therefore, all of the metal and polysilicon layers at the transistor gate and drain are extracted up to M2 using an R/C parasitic extraction tool (Calibre [16]). The source is also extracted up to the surrounding M1 ground plane. Since the source connections are not included in the electromagnetic (EM) model and the parasitic inductances

are not captured in the R/C extraction, extensive care is taken in the layout in order to establish a strong ground definition. Several blocks of stacked vias are used to connect the top level grounds (LB and B3 layers) to M1 and a wide M1 plane is used close to transistor source so as to minimize any undesired inductances that can degrade the device performance. The vertical transition between the LB and M2 metal layers is 8.7 m, and both gate and drain sections are simulated together to include the parasitic EM coupling between them using a 2.5-D EM solver (Sonnet [17]). The metal layers from LB down to B1 are modeled using the thick-metal model in Sonnet with multiple number of sheets. More than two sheets are used for the top metal layers, LB in particular, where the vertical thickness is comparable to the trace width. The metal and via resistances are taken into account as specified in the IBM process design manual. The transition from the top metal LB to M2 can also be represented using a lumped-element equivalent circuit [see Fig. 5(a)]. In this case, the RLC SPICE model is derived from the Sonnet -parameter simulations. The simulated insertion loss and isolation are shown in Fig. 5(b) and agree well with the full-wave -parameters at 80–120 GHz. The simulations also show that the coupling between the gate and drain becomes significant above 100 GHz due to the parasitic capacitance and the mutual inductance between the vertical lines. Fig. 6 shows the effect of the parasitics on the transistor and NF. The simulated peak of the IBM transistor model is 300–340 GHz and decreases to 200–220 GHz at a bias current of 0.3–0.6 mA m when all transitions are modeled [see Fig. 6(a) and (b)]. The minimum NF ( ) also shows a similar trend when the parasitics are included and the lowest is achieved at 0.1–0.3 mA m current density [see Fig. 6(c)]. The added parasitics slightly change away from the circle on the Smith chart. As seen in Fig. 6(b), there is not much improvement in once the current density exceeds 0.3 mA m

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Fig. 5. (a) Equivalent circuit of the transition. (b) Simulated insertion loss and isolation: -parameter model (solid) and lumped-element model (dashed). Fig. 7. (a) Measured

. (b) Effect of parasitics on the MAG at 90 GHz.

Fig. 8. Schematic of the

-band amplifier.

is calculated from the measured unilateral power gain ( ) curve and is 200 5 GHz for a current density of 0.2–0.5 mA m [18] [see Fig. 7(a)]. This is lower than the IBM model (referenced to the transistor itself), which predicts an of 460–480 GHz at this current density. The measured maximum available gain (MAG) and maximum stable gain (MSG) curves are also plotted showing that the transistor becomes unconditionally stable above 90 GHz. Fig. 7(b) presents the effect of parasitics on the MAG of the same transistor. The measured peak MAG is 9 dB with 0.3-mA m current density at 90 GHz, and agrees well with simulations. III.

-BAND AMPLIFIER

A. Design

Fig. 6. (a) Transistor-level modeling of interconnect parasitics. The effect of and (30 1 m transistor used). parasitics (b) on and (c) on

so the transistor can be biased close to 0.3 mA m as a tradeoff between high and low NF. The measured of the 30 1 m common-source test cell at 0.2–0.5-mA m current density is consistent with simulations.

The -band amplifier is shown in Fig. 8 and is based on a three-stage common-source design using floating-body transistors. The first two stages are designed with 30 1 m transistors and the device size is increased to 40 1 m at the third stage for high output power. The current density is set to be 0.3 mA m for all stages under nominal bias conditions (discussed in Section II). All transmission lines and stubs are implemented using the 9-8-9- m (50 ) grounded CPW lines with a loss of 1.1 dB/mm and a of 15 at 90–100 GHz according to Sonnet simulations.

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Shunt 440-fF capacitors, which are close to self-resonance at 90 GHz, are placed at the end of the matching stubs and provide a low impedance to ground at 80–100 GHz. Wideband on-chip bypass networks, composed of a 4- polysilicon resistor in series with 0.3–2-pF-thick-oxide capacitor banks, are implemented and connected to the power supply lines to prevent any oscillations due to interstage coupling. Also, 10- resistors are placed in series with the drain matching stubs to further improve the stability at an expense of 0.1 V at the drain node. These resistors are used as a conservative design measure since this was the first implementation of this process at 90–200 GHz. The gate biasing is done by using a 3-k resistor, and a simple voltage divider is used at the bias pad to provide a high-impedance path to ground and also decrease the sensitivity to the applied voltage (not shown). A shorted stub is used at the source of the first-stage transistor and acts as a degeneration inductor, which increases the real part of the impedance seen at the gate. This results in two beneficial effects on the amplifier’s RF performance. First, a wideband input impedance is achieved when combined with the lowmatching sections at the input ( dB at 84–103 GHz). Second, at the input of the first stage moves toward the 50- region on the Smith chart and results in a simultaneous gain and NF match after the input matching network. The high-pass interstage matching networks are composed of transmission lines at the paths and interstage capacitors. All of the capacitors are implemented using the vertical natural capacitor (vncap) model found in the IBM design kit. The capacitance is formed between the inter-digitated metal fingers composed of C1 to B3 metal layers. The lower metal layers are not used since they result in higher parasitic shunt capacitance per 1 fF of series capacitance, which degrades the performance at millimeter-wave frequencies. The simulated gain of the amplifier is 13.5 dB at 90 GHz with a 3-dB bandwidth of 85–101 GHz. The input and output return losses are wideband due to low- matching networks ( dB at 82– 110 GHz). The simulated NF is 5.3–4.6 dB at 90–100 GHz. The simulated saturated output power ( ) and compression point ( ) at 90 GHz are 8.0 and 5.5 dBm, respectively, with a peak power-added efficiency (PAE) of 12% and a 1.4-V supply. B. Measurements The chip microphotograph with an expanded view around the transistors is shown in Fig. 9(a). The vertical dimension is determined by the input and output 100- m pitch ground–signal–ground (GSG) pads; hence, the transmission lines and stubs are not meandered. The resulting chip size is 0.58 0.55 mm including the pads. The small-signal measurements of the -band amplifier is performed using an Agilent network analyzer (PNA E8361A) with 75–110-GHz frequency extenders and 1-mm coaxial cables. The calibration is done up to the probe tips using a short-open-load-thru (SOLT) calibration substrate. The measured -parameters with 1.4-V supply are shown in Fig. 9(b). The -band amplifier has 10.7-dB gain at 95 GHz and a 3-dB bandwidth of 89–107 GHz for three different samples. Both input and output return losses are 10 dB at 87–110 GHz

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Fig. 9. (a) Microphotograph of the -band CMOS amplifier (0.58 0.55 mm ) and (b) measured -parameters on three different samples is shown for the three samples). (only

and the measured reverse isolation ( ) is 35 dB up to 110 GHz (not shown). The NF is measured using an Agilent E4448A spectrum analyzer with a -band noise source at the device-under-test (DUT) input, and a waveguide amplifier/mixer down-conversion setup at the output port. The measured NF is 6.0 dB at 95 GHz, as shown in Fig. 10 with nominal biasing (0.3 mA m) and is 5.9–6.1 dB over a wide range of bias current. NF measurements at 100 GHz could not be done since the -band waveguide amplifier operated up to 96 GHz. The large-signal measurements are done with WR-10 waveguide components and a 1-mm coaxial setup. An Agilent E8257D signal generator was used with a tripler to generate a -band signal and a waveguide variable attenuator was used at the input for power sweeps. The measured output and at 95 GHz are 5.2 and 7.5 dBm, respectively with a 1.4-V supply and the measured peak PAE is 9.0% at 95 GHz (Fig. 11). At , the current is 15 mA in the last stage, which results in 0.15-V drop across the 10- resistor and a drain voltage of 1.25 V. The measured versus frequency is shown in Fig. 12(a) and is 6 dBm at 90–100 GHz with nominal bias conditions. was also measured by varying the supply voltage at 95 GHz [see Fig. 12(b)] and it can be increased up to 8 dBm with a 1.4-V supply by optimizing the gate bias points. Two other amplifiers from different dies were also measured and they yielded a above 7.6 dBm with a 1.4-V supply at 95 GHz, showing that

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Fig. 10. Measured NF of the amplifier versus frequency and current density. Fig. 13. Schematic of the

-to- -band balanced doubler.

Fig. 11. Measured output power and PAE versus input power at 95 GHz.

Fig. 14. Simulations showing: (a) output power and conversion gain of the doubler versus finger width (30- m-wide transistors). (b) Effect of reflector on the output power of the doubler. (c) Output power contours for different gate bias voltages and input power levels.

Fig. 12. Measured: (a) supply voltage.

and

versus frequency and (b)

versus

the amplifier can generate high output power even with standard process variations. IV.

-TO- -BAND DOUBLER

A. Design The doubler is an active balanced design, as shown in Fig. 13. The single-ended input is converted to a differential

signal using a passive balun and fed into the balanced transistor pair. The drain nodes are connected together, which creates a broadband short circuit for the fundamental and odd harmonics, but the even harmonics are combined in phase. As the transistor size is increased, the doubler can yield more power, but a higher input power is required. The input power to the doubler is 6–7 dBm (see Section III) and a 30 1 m transistor is simulated to achieve maximum conversion gain at this input power. Although a smaller finger width can achieve slightly more conversion gain, the finger width of 1 m is chosen due to stability concerns [see Fig. 14(a)]. When the finger width is chosen to be less than 1 m, the simulated and become positive over a wide bandwidth when the IBM model is used (without R/C extraction and Sonnet transition model). The R/C extraction adds extra gate resistance and stabilizes the transistor, but in this case, a conservative approach was taken

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Fig. 15. 3-D view of the doubler input balun and simulated phase/amplitude imbalance between the differential ports.

and the finger width is limited to 1 m since this was the first design trial in the 45-nm process. Second harmonic reflectors are used at the transistor inputs to further improve the doubler conversion gain [19], [20]. The 220-fF capacitors at the reflector end operate close to self-resonance, thus providing a very low impedance (0.6 ) for the second harmonic at 180 GHz. The position and length of the reflectors are adjusted using EM simulations (Sonnet) to ensure a simultaneous short circuit for the second harmonic and a high impedance for the fundamental tone at 90 GHz. Simulations show that the reflectors result in a 2-dB increase in the output power at 170–185 GHz [see Fig. 14(b)]. The transistor bias condition is crucial for doubler efficiency since the conduction angle should be set correctly to maximize the second harmonic tone at the output [21]. If the drain current waveform is assumed to be a rectified cosine pulse, it can be represented by Fourier series expansion as (1) and the coefficients for

are

Fig. 16. (a) CPW transmission line with ground plane meshing. (b) Measured (solid) and simulated (dashed) line loss/mm for a 50- T-line. A 600- m line and GSG thru pads are used for line-loss measurements.

the B3 ground plane under the transmission lines needs to be extensively meshed. Fig. 16(a) shows a shielded CPW line with a ground plane mesh designed for 75% maximum metal density. This effect can be captured in EM simulations and results in 0.1-dB increase in line loss per millimeter and a drop of 10% at 180 GHz. A 600- m-long line was measured at 160–200 GHz, and the effect of the pads and the CPW transition were de-embedded using a GSG thru section. The measured line loss is 2.2 dB/mm at 180 GHz, which is 0.7 dB higher than simulations (1.5 dB/mm) [see Fig. 16(b)]. The increase in line loss over simulations has been measured by several groups [10], [22] and is perhaps due to the thin Ta and W adhesion layers used in the fabrication process [23]. B. Measurements

(2) where is the maximum drain current, is the duration of the pulse, and is the period of fundamental frequency. When (2) is solved to maximize , , which corresponds to a conduction angle of 125 . Therefore, the transistor gates need to be biased below the threshold voltage ( mV) for optimum doubler operation, and this is shown by the largesignal simulations in Fig. 14(c). The input balun is designed using Sonnet (Fig. 15). The magnetic coupling occurs vertically between the primary coil designed using the top metal LB and the secondary coil composed of stacked UB and UA metals. The distance to the ground plane is 20 m on each side and the trace width is 5 m. A 23-fF series capacitor at the input, the balun, and a 16-fF capacitor at the balun output form a multistage matching network and provide a wideband match at the doubler input ( dB at 84–100 GHz). The simulated phase and amplitude imbalance between the differential ports is 5 and 1.5 dB at 80–100 GHz, respectively. All the transmission lines and interconnects at the input and output of the doubler are modeled using Sonnet. Due to maximum metal density requirement for the lower metals,

The chip microphotograph is shown in Fig. 17(a) and the dc bias for the gate and drain nodes is supplied using the top pads. The input and output pads are compatible with both 100- and 80- m-pitch GSG probes. The section after the input balun is designed symmetrically to maintain balanced operation and the transistors in the doubler core are placed in close proximity to each other so as to minimize the distance to the common drain node. The second harmonic reflectors are meandered to reduce the chip area and the total size is 0.69 0.49 mm including the pads. The -parameter measurements of the doubler requires two different setups since the input and output are at different frequencies. The input return loss is measured with the same setup as the -band amplifier and is 10 dB at 86–108 GHz. The output return loss is measured using a 140–220 GHz ( -band) frequency extension setup and is 10 dB at 153–175 GHz [see Fig. 17(b)]. The large-signal characterization is performed using a complete waveguide setup with WR-10 and WR-5 sections at the input and output, respectively (Fig. 18). All measurements are referenced to the GSG input and output pads. A mechanically tuned Gunn-diode oscillator is used at the input and is followed by a variable attenuator for controlling the input power. The input power is monitored using a 10-dB coupler and an Agilent

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Fig. 17. (a) Microphotograph of the doubler (0.69 -parameters.

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0.49 mm ). (b) measured

Fig. 18. Measurement setup for doubler output power and gain characterization. An all-waveguide setup is used for accurate power measurements.

E4417A power meter, and the output port is connected directly to an Erickson power meter1 using a WR-5 probe and a WR-5 to WR-10 taper. The loss of the WR-10 and WR-5 GSG probes were measured using a thru line on CS-15 calibration substrate. The input WR-10 probe has a measured loss of 1.25–1.40 dB at 85–100 GHz and the output WR-5 probe has a loss of 2.3–3.0 dB at 170–200 GHz. The WR-5 to WR-10 transition has a measured loss of 0.2 dB. These losses are calibrated out of the measurements to obtain the conversion gain referenced to the GSG pads on the 45-nm doubler chip. The measured peak output power is 0.8 dBm at an input power of 6–7 dBm with 8.0-dB conversion gain at 180 GHz with a constant gate bias ( ) of 0.24 V for all input power levels [see Fig. 19(a)]. Fig. 19(b) presents the measured output power at 170–190 GHz at two gate bias points. As the input power is increased, the gate bias needs to be reduced to maintain optimum 1Erickson Power Meter, PM4, Virginia Diodes Inc., Charlottesville, VA, 2009.

Fig. 19. Measured: (a) output power and gain of the doubler versus input power at 180 GHz, (b) output power versus frequency, and (c) dc current versus input power.

Fig. 20. Measured peak output power of the for different doubler designs.

-band doubler versus frequency

conduction angle that maximizes the second harmonic generation ( 125 ). The output power can be increased to 0 dBm by decreasing the gate bias to 0 V at 180 GHz with 3.0% drain efficiency. The dc current of the doubler is also monitored and is in good agreement with the simulations up to 7-dBm input power [see Fig. 19(c)]. Note that the 10- resistor in Fig. 13 results in 0.2–0.3-V drop for dBm, and the drain voltage is 1.1 V at the peak output power. Apart from this doubler, two other doubler versions were designed and measured in order to verify the effect of finger width and the second harmonic reflector. Fig. 20 shows the measured peak output power versus frequency for the three different designs. The main doubler design, which has 30 1 m transistors and an input reflector, yields the highest output power. The second version has 15 2 m transistors and results in 2.5-dB less output power due to increased gate resistance. The third version also uses 15 2 m transistors, but without the second

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Fig. 23. Measured conversion gain and output power of the amplifier/doubler at 180 and 190 GHz. Standalone doubler output power is also plotted for comparison.

Fig. 21. (a) Microphotograph of the amplifier/doubler (1.0 (b) Measured output return loss.

0.56 mm ).

Fig. 22. Down-converted 180-GHz signal at the output of the amplifier/doubler measured using a spectrum analyzer.

harmonic reflector. As predicted, the input reflector improves the output power by dB. V.

-BAND DOUBLER WITH INTEGRATED

-BAND DRIVER

The amplifier/doubler is a cascade of the same amplifier and doubler designs discussed in the previous sections. The chip microphotograph is shown in Fig. 21(a) and the total size is 1.0 0.56 mm including the pads. A single and a single ground is used for the entire chip. The -parameter measurement setup is the same as in the case of the doubler. The input return loss is wideband and is the same as the amplifier [see Fig. 9(b)]. The output return loss is well matched at 160–185 GHz [see Fig. 21(b)], and shows a better performance than the doubler [see Fig. 17(b)]. The -band amplifier has an effect on the doubler output impedance since it is not a wideband 50- load. The same measurement setup of Fig. 18 is used for largesignal amplifier/doubler measurements. The mixer down-conversion setup is also used for verifying the results obtained by

Fig. 24. (a) Measured peak output power and (b) conversion gain of the amplifier/doubler versus frequency. Measurements done using a power meter and a mixer down-conversion setup.

the power meter. The down-converted 180-GHz signal is shown in Fig. 22 with an output spectrum up to 12 GHz. The measured output power is 1.4 dBm after de-embedding the losses due to output probe, mixer, and output cable. The highest undesired tone is 46 dB lower with respect to the output signal and is due to the subharmonic mixer setup. Fig. 23 presents the measured conversion gain and output power of the amplifier/doubler versus input power at 180 and 190 GHz ( V). The peak conversion gain is 2–3 dB when the input power is at 7 2 dBm and drops as the input power is increased. The amplifier/doubler saturates at an input power of 2 dBm since the -band amplifier is saturated. As a

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TABLE I PERFORMANCE SUMMARY OF -BAND CMOS AMPLIFIERS

TABLE II PERFORMANCE SUMMARY OF DOUBLERS

comparison, the output power of the standalone doubler is also shown in Fig. 23. The standalone doubler saturates at a higher input power and the difference between the doubler and amplifier/doubler curves at low input powers is equal to the amplifier gain. The maximum output power generated by both the doubler and amplifier/doubler is nearly identical, indicating that the -band amplifier is providing at least 6–7 dBm and saturating the doubler sufficiently. The output power is also measured versus frequency from 170 to 200 GHz with the power meter and mixer setups [see Fig. 24(a)]. The measured peak output power is from 0.0 to 1.2 dBm at 180–190 GHz when V. Fig. 24(b) shows the measured conversion gain versus frequency at different input power levels. A peak conversion gain of 3.4–5.0 dB with 8-dBm input power is achieved at 190 GHz due to the gain response of the driver amplifier. As the input power is increased, the amplifier saturates and the overall conversion gain decreases. At an input power of 0 dBm, the conversion gain drops from 2 to 1 dB at 180–190 GHz. The amplifier/doubler results in 0.5–1 mW of output power at 170–195 GHz and shows, to our knowledge, the highest power achieved from a CMOS source above 150 GHz. Table I presents a summary of -band CMOS amplifiers. It is seen that the 45-nm SOI CMOS technology results in the lowest NF and with high values. Table II presents a summary of doublers above 130 GHz. It is seen that the 170–200-GHz CMOS doubler is competitive with the best SiGe results. VI. CONCLUSION This paper has demonstrated the first use of 45-nm SOI CMOS at - and -band. A significant finding is the reduction of the transistor from 340 to 200 GHz when all the interconnect parasitics are taken into account. Still, 45-nm

130 GHz

CMOS is an excellent candidate for millimeter-wave low-noise amplifiers and submillimeter-wave sources. The technology allows for efficient antennas due to its thick back-end metal layers, and a higher output power can be obtained, both at -band and at 200 GHz, using free-space combining techniques, as demonstrated in [5]. ACKNOWLEDGMENT The authors thank O. Inac and M. Uzunkol, both with the University of California at San Diego, La Jolla, for technical discussions and for helping in the measurements. The authors thank Prof. S. Weinreb, California Institute of Technology, Pasadena, for his advice on 100-GHz amplifier design. Access to the IBM 45-nm 12SOI process was provided by the Defense Advanced Research Projects Agency (DARPA) Microsystems Technology Office (MTO) Leading Edge Access Program (LEAP). This research was carried out in part at the Jet Propulsion Laboratory, California Institute of Technology, Pasadena. REFERENCES [1] J. W. May and G. M. Rebeiz, “Design and characterization of -band SiGe RFICs for passive millimeter-wave imaging,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 5, pp. 1420–1430, May 2010. [2] L. Zhou, C.-C. Wang, Z. Chen, and P. Heydari, “A -band CMOS receiver chipset for millimeter-wave radiometer systems,” IEEE J. SolidState Circuits, vol. 46, no. 2, pp. 378–391, Feb. 2011. -band [3] A. Tomkins, P. Garcia, and S. P. Voinigescu, “A passive imaging receiver in 65-nm bulk CMOS,” IEEE J. Solid-State Circuits, vol. 45, no. 10, pp. 1981–1991, Oct. 2010. [4] J. W. May, R. A. Alhalabi, and G. M. Rebeiz, “A 3 G-bit/s -band SiGe ASK receiver with a high-efficiency on-chip electromagneticallycoupled antenna,” in IEEE Radio Freq. Integr. Circuits Symp. Dig., Jun. 2010, pp. 87–90. [5] Y. A. Atesal, B. Cetinoneri, M. Chang, R. A. Alhalabi, and G. M. Rebeiz, “Millimeter-wave wafer-scale silicon BiCMOS power amplifiers using free-space power combining,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 4, pp. 954–965, Apr. 2011.

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[6] U. R. Pfeifer, E. Ojefors, and Y. Zhao, “A SiGe quadrature transmitter and receiver chipset for emerging high-frequency applications at 160 GHz,” in IEEE Int. Solid-State Circuits Conf. Dig., Feb. 2010, pp. 416–417. [7] E. Laskin, P. Chevalier, A. Chantre, B. Sautreuil, and S. P. Voinigescu, “165-GHz transceiver in SiGe technology,” IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1087–1100, May 2008. [8] E. Laskin, M. Khanpour, S. T. Nicolson, A. Tomkins, P. Garcia, A. Cathelin, D. Belot, and S. P. Voinigescu, “Nanoscale CMOS transceiver design in the 90–170-GHz range,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 12, pp. 3477–3490, Dec. 2009. [9] Y.-S. Jiang, J.-H. Tsai, and H. Wang, “A -band medium power amplifier in 90 nm CMOS,” IEEE Microw. Wireless Compon. Letters, vol. 18, no. 12, pp. 818–820, Dec. 2008. [10] M. Seo, B. Jagannathan, C. Carta, J. Pekarik, L. Chen, C. P. Yue, and M. Rodwell, “A 1.1 V 150 GHz amplifier with 8 dB gain and 6 dBm saturated output power in standard digital 65 nm CMOS using dummyprefilled microstrip lines,” in IEEE Int. Solid-State Circuits Conf. Dig., Feb. 2009, pp. 484–485. [11] D. Sandstrom, M. Varonen, M. Karkkainen, and K. A. I. Halonen, “ -band CMOS amplifiers achieving 10 dBm saturated output power and 7.5 dB NF,” IEEE J. Solid-State Circuits, vol. 44, no. 12, pp. 3403–3409, Dec. 2009. [12] O. Momeni and E. Afshari, “High power terahertz and millimeter-wave oscillator design: A systematic approach,” IEEE J. Solid-State Circuits, vol. 46, no. 3, pp. 583–597, Mar. 2011. [13] E. Seok, C. Cao, D. Shim, D. J. Arenas, D. B. Tanner, C.-M. Hung, and K. K. O, “A 410 GHz CMOS push–push oscillator with an on-chip patch antenna,” in IEEE Int. Solid-State Circuits Conf. Dig., Feb. 2008, pp. 472–473. [14] S. Lee, B. Jagannathan, S. Narasimha, A. Chou, N. Zamdmer, J. Johnson, R. Williams, L. Wagner, J. Kim, J.-O. Plouchart, J. Pekarik, S. Springer, and G. Freeman, “Record RF performance of 45-nm SOI CMOS technology,” in IEEE Int. Electron Devices Meeting, Dec. 2007, pp. 255–258. [15] O. Inac, B. Cetinoneri, M. Uzunkol, Y. A. Atesal, and G. M. Rebeiz, “Millimeter-wave and THz circuits in 45-nm SOI CMOS,” in IEEE Compound Semicond. IC Symp. Dig., Oct. 2011, accepted for publication. [16] Calibre. ver. 9.3.1.1, Mentor Graphics Corporation, Wilsonville, OR, 2004. [17] SONNET. ver. 12.52, Sonnet Softw. Inc., Syracuse, NY, 2009. [18] G. D. Vendelin, A. M. Pavio, and U. L. Rohde, Microwave Circuit Design Using Linear and Nonlinear Techniques, 2nd ed. Hoboken, NJ: Wiley, 2005. [19] D. G. Thomas and G. R. Branner, “Single-ended HEMT multiplier design using reflector networks,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 5, pp. 990–993, May 2001. [20] J.-J. Hung, T. M. Hancock, and G. M. Rebeiz, “High-power high-effi- and -band balanced frequency doublers,” IEEE ciency SiGe Trans. Microw. Theory Tech., vol. 53, no. 2, pp. 754–761, Feb. 2005. [21] S. A. Maas, Nonlinear Microwave and RF Circuits, 2nd ed. Boston, MA: Artech House, 2003. [22] K. Yau, I. Sarkas, A. Tomkins, P. Chevalier, and S. P. Voinigescu, “Onwafer -parameter de-embedding of silicon active and passive devices up to 170 GHz,” in IEEE MTT-S Int. Microw. Symp. Dig., May 2010, pp. 600–603. [23] “CMOS 12S0 (SOI12S0) Technology Design Manual,” IBM Corporation, Hopewell Junction, NY, 2009. [24] E. Ojefors, B. Heinemann, and U. R. Pfeiffer, “Active 220- and 325-GHz frequency multiplier chains in an SiGe HBT technology,” IEEE Trans. Microw. Theory Tech., to be published. [25] L. Wang, Y.-Z. Xiong, B. Zhang, S.-M. Hu, and T.-G. Lim, “Millimeter-wave frequency doubler with transistor grounded-shielding structure in 0.13- m SiGe BiCMOS technology,” IEEE Trans. Microw. Theory Tech, to be published.

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Berke Cetinoneri (S’04) received the B.S. degree in microelectronics from Sabanci University, Istanbul, Turkey, in 2006, the M.S. degree in electrical engineering from the University of California at San Diego (UCSD), La Jolla, in 2008, and is currently working toward the Ph.D. degree in electrical engineering at UCSD. His doctoral research concerns RF and millimeter-wave integrated circuits in silicon technologies. Yusuf A. Atesal (S’04) received the B.S. degree in microelectronics from Sabanci University, Istanbul, Turkey, in 2006, and the M.S. and Ph.D. degrees in electrical engineering from the University of California at San Diego (UCSD), La Jolla, in 2008 and 2011. He is currently with the Intel Corporation, Hillsboro, OR, where he is involved in RF circuit design. His research interests are RF and millimeter-wave integrated circuits in silicon technologies. Andy Fung (S’97–M’99) received the B.E.E., M.S.E.E., and Ph.D. degrees in electrical engineering from the University of Minnesota at Minneapolis–St. Paul, in 1993, 1995 and 1999, respectively. In 1999, he joined the Jet Propulsion Laboratory (JPL), California Institute of Technology, Pasadena. His research activities have concerned the development of InP HBTs and GaAs Schottky diodes for millimeter- to submillimeter-wave applications. His current efforts are in the area of high-frequency test methods. Gabriel M. Rebeiz (S’86–M’88–SM’93–F’97) received the Ph.D. degree from the California Institute of Technology, Pasadena. He is currently a Professor of electrical and computer engineering with the University of California at San Diego (UCSD), La Jolla. Prior to this appointment, he was with The University of Michigan at Ann Arbor, from 1988 to 2004. He has contributed to planar millimeter-wave and terahertz antennas and imaging arrays from 1988 to 1996, and his group has optimized the dielectric-lens antennas, which is the most widely used antenna at millimeter-wave and terahertz frequencies. His group also developed 6–18- and 40–50-GHz eight- and 16-element phased arrays on a single silicon chip, and the first millimeter-wave silicon passive imager chip at 85–105 GHz. His group also demonstrated high- RF microelectromechanical systems (RF-MEMS) tunable filters at 1–6 GHz and the new angular-based RF-MEMS capacitive and metal-contact switches. As a consultant, he helped develop the USM/ViaSat 24-GHz single-chip -, and -band SiGe automotive radar, phased arrays operating at -, for defense and commercial applications, the RFMD RF-MEMS switch, and the Agilent RF-MEMS switch. He has graduated 42 Ph.D. students. He is the Director of the UCSD/Defense Advanced Research Projects Agency (DARPA) Center on RF MEMS Reliability and Design Fundamentals. He currently leads a group of 20 Ph.D. students and three Post-Doctoral Fellows in the area of millimeter-wave RF integrated circuits (RFICs), microwaves circuits, RF-MEMS, planar millimeter-wave antennas, and terahertz systems. He authored RF MEMS: Theory, Design and Technology (Wiley, 2003). Prof. Rebeiz has been an associate editor for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. He has been a Distinguished Lecturer for the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) and the IEEE Antennas and Propagation Society (IEEE AP-S). He is a National Science Foundation (NSF) Presidential Young Investigator, an URSI Koga Gold Medal Recipient, the 2003 IEEE MTT-S Distinguished Young Engineer, the 2000 IEEE MTT-S Microwave Prize, the 2010 IEEE MTT-S Distinguished Educator Award, the 2011 IEEE AP-S John D. Kraus Award, the 1998 Eta Kappa Nu Professor of the Year Award, the 1998 Amoco Teaching Award given to the best undergraduate teacher at The University of Michigan at Ann Arbor, and the 2008 Teacher of the Year Award of the Jacobs School of Engineering, UCSD. His students have also been the recipients of a total of 19 Best Paper Awards of IEEE MTT-S, RFIC, and AP-S conferences.

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Analysis and Design of a 60 GHz Wideband Voltage-Voltage Transformer Feedback LNA Pooyan Sakian, Erwin Janssen, Arthur H. M. van Roermund, Senior Member, IEEE, and Reza Mahmoudi

Abstract—To cope with the problem of instability and imperfect reverse isolation, a millimeter-wave voltage-voltage transformer feedback low noise amplifier has been analyzed, designed, and measured in CMOS 65 nm technology. Analytical formulae are derived for describing the stability, gain, and noise in this circuit topology. An analogy with the classic concept of Masons’s invariant is used to illustrate how the transformer feedback provides the required reverse isolation in the LNA. Based on the developed theoretical analysis, the circuit is implemented as a fully integrated 60 GHz two-stage differential low noise amplifier in 65 nm CMOS technology. A flat gain of 10 dB is achieved over the entire 6 GHz bandwidth. The measured noise figure is 3.8 dB.

this LNA topology. Furthermore, extensive measurements have been performed on the VVTF LNA fabricated in [7]. In Section II, different LNA topologies are briefly reviewed and the voltage-voltage transformer feedback LNA topology is introduced. In Section III, a stability analysis is performed based on the concept of Mason’s invariant. In Section IV, a noise analysis is performed on an LNA circuit with voltage-voltage transformer feedback. In Section V, the design and layout of the LNA and its transformers are discussed. In Section VI, the experimental results are presented.

Index Terms—Low-noise amplifier, millimeter wave, receiver, transformer, wideband.

II. TOPOLOGY SELECTION Apart from the responsibility for amplification of the signal with minimum added noise, the LNA must be stable to prevent self-oscillation. There are various LNA circuit topologies. One of the most commonly used LNA topologies is the inductivelydegenerated common-source LNA, shown in Fig. 1 [1]. The inductors and provide the required input matching. The produces the real part of the input impedance and inductor nullifies the imaginary part. One of the main advanatages of this topology is the implementation of the real part of the input impedance without having to use a lossy resistor in the signal path. The input-referred noise voltage of the LNA and its input impedance are described by (1) and (2), respectively, shown at the bottom of the next page, where is the Boltzmann constant, is the temperature, is the channel noise coefficient, is the channel conductance when the drain-source voltage is zero, is the source resistance, is the transconductance of the transistor, is the gate-source capacitance, and is the angular frequency. In a good design, is adjusted in such a way is matched with , and is selected that the real part of in a way that the imaginary part of is nullified. The multiple influential design parameters provide a desirable decoupling between different performance requirements. For instance, the real part of the input impedance can be adjusted independently while achieving the required noise performance. In order to investigate the stability, a simplifying assumption that is made in the above calculations must be discarded; the gate-drain capacitance, , must be taken into consideration. This capacitance constitutes a reverse path between the input and output which endangers the stability. Several solutions have been proposed to overcome this problem. Using cascode architecture is one way to implement isolation between the output and input [2]. However at high frequencies the additional parasitics due to the cascode device deteriorate the performance. This has motivated the designers to adopt more complicated cascode architectures using additional inductors [3]. Using a common-gate topology is another way to provide the required isolation. However the common-gate LNAs suffer

I. INTRODUCTION

T

HE 7 GHz unlicensed bandwidth around 60 GHz provides new possibilities for realization of short-range highdata-rate communication links. Modern CMOS technology is a promising candidate for implementing the required hardware due to its potential of integration of digital baseband with the RF front end. As the first stage of the receiver frontend after the signal source or the antenna, the LNA is responsible for amplification of the signal from the antenna with minimum added noise and distortion. Therefore, noise figure, gain, and linearity are among the main design concerns. Many of the conventional topologies of the LNA, such as those based on the common-source topology, suffer from stability problems, particularly at high frequencies as a result of the pronounced impact of the Miller capacitance. Various solutions have been proposed and implemented for addressing the stability problems, which mainly focus on providing reverse isolation between the input and the output. Voltage-voltage transformer feedback (VVTF) technique is one of these methods and has been successfully used at lower frequencies [8]. The applicability of this technique to mm-wave regime has been verified in [7]. This paper deals with the analysis and implementation of a voltage-voltage transformer feedback technique, as a method of providing reverse isolation and stability in the LNA. The analysis for stability is performed using an analogy with Mason’s invariant concept [9]. Besides, an insightful noise analysis is done on Manuscript received June 30, 2011; revised November 04, 2011; accepted November 17, 2011. Date of publication January 13, 2012; date of current version March 02, 2012. This work was supported in part by the Technology Foundation, STW, The Netherlands and NXP Eindhoven, The Netherlands. The authors are with Eindhoven University of Technology, Eindhoven 5612 AZ, The Netherlands (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2011.2178426

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unilateralization, or providing reverse isolation between the output and the input, is a widely used technique to ensure the stability of amplifiers. For every linear two-port device, a property can be defined that is invariant with respect to certain types of transformations [9], [10] implemented by linear lossless reciprocal embedding four-ports, shown in Fig. 3

(3)

Fig. 1. An inductively degenerated common-source LNA.

where is the open-circuit impedance matrix of the two-port, denotes the transposition and * denotes the complex conjugate. Interestingly, this invariant property predicts the maximum gain after unilateralization; i.e., if the original linear two-port is unilateralized by the embedding network, the value of the maximum gain can be obtained from [10]. Since is invariant to the transformation done by the linear lossless reciprocal embedding network, the maximum gain can also be calculated by the z-parameters of the unilateralized device (4)

Fig. 2. Voltage-voltage transformer feedback LNA.

from a tradeoff between the input matching and the noise figure [4]–[6]. In this work the isolation is implemented by equipping and with mutual magnetic coupling [7], [8]. The resulting topology is called voltage-voltage transformer feedback LNA and is shown in Fig. 2. Another potential benefit of using this topology, as compared to other solutions which entail stacking transistors on top of each other, is that it is more suited to low-voltage circuit design and hence consumes less power. III. STABILITY ANALYSIS Stability is one of the main concerns in radio frequency amplifier design. Any reverse signal path from the output to the input can make the amplifier potentially instable. Therefore,

It is worth noting that is not the maximum gain obtainable from the two-port with an arbitrary four-port embedding. In fact the maximum obtainable gain is infinite, for instance when the two-port is used in an oscillator circuit. Therefore, it is important to note that is the maximum gain only when the two-port is unilateralized; i.e., when there is no feedback between the input and output. If the condition of unilateralization is changed to stability, it can be shown that the maximum stable gain of a two-port can be as large as 4U for large values of U [11]. The LNA of Fig. 2 is visualized in Fig. 4 by an analogy with the embedding scenario of Fig. 3. The transistor is regarded as a linear two-port device, whereas the coupled inductors, or the transformers, form the embedding four-port. The z-parameters of the transistor are calculated

(5) After embedding, the z-parameters of the transformed network can be obtained from

(6)

(1)

(2)

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Fig. 3. Linear two-port device embedded within a linear lossless reciprocal four-port.

where effect of

, and are calculated from (7)–(10). The is then just a series reactance added to

(7)

(8)

(9)

Fig. 4. LNA of Fig. 2 illustrated as a two-port device (a single transistor) embedded in a linear reciprocal four-port (transformer).

(10)

impedance is zero (in fact limited to the gate resistance of the transistor) and the imaginary part can be made zero by properly adjusting the value of

Defining the coupling factor, , and the turn ratio in (11) and (12), is converted to (13), after substitution of z-parameters from (4) in (8) and some manipulation. From (13) it is clear that can be made zero if the conditions of (14) are satisfied. By making zero, the required unilateralization is achieved (11) (12)

(15) In case of unilateralization, if (the gate resistance of the transistor) is not neglected and when is in resonance with the and , the parameters of the circuits of capacitive part of Fig. 4 are derived from the following: (16) (17)

(13) (14) The conditions of (14) are the only solution to providing isolation at all frequencies. If is not equal to one, the isolation can only be achieved if the circuit is modified, for instance by which can neutralize adding an inductor in parallel with the reactance between the source and the drain at a certain frequency. Therefore, without meeting the conditions of (14), it is not possible to obtain a frequency-independent isolation. In this work our attempt is to make as close to one as possible. In case of unilateralization which is obtained by meeting the conditions of (14), the input impedance of the LNA of Fig. 4 is derived from (15) which shows that the real part of the input

(18)

(19) , and parameters are It is worth mentioning that the and , and describing the transistor, the two-port seen from the two-port seen from and , respectively (See Fig. 4). The value of can be calculated in two ways: the parameters from (16)–(19) can be substituted in (3) or (4); or the parameters from (5) can be substituted in (3) after adding to

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to include the transistor gate series resistance. As expected and as evidence to the invariability of under the transformation of Fig. 4, both approaches yield the same result (20) To confirm the predictions made by the above formulae, and of a voltage-voltage transformer feedback amplifier are simulated as a function of the turn ratio (n). The simulation is done by SPECTRE-RF periodic-scattering-parameter analysis at 60 GHz. The transistor width and transistor length are 32 m and 65 nm, respectively. The biasing voltage of the gate of the are 0.7 and 1.2 V, respectively. The biasing transistor and is kept constant at 500 current of the transistor is 4.9 mA. and hence are swept from 0.1 to 5 and from pH while 5 pH to 12.5 nH, respectively. The coupling factor between and is one. is 207 pH to nullify the imaginary part of the and are 21.8 input impedance. The extracted values for and 11.5 fF, respectively. According to (14), perfect reverse isoreaches 3.6. In Fig. 5(a), it is seen lation is obtained when is minimized at around 3.1, whereas the that the simulated calculated is minimized at around 3.6. This difference between the prediction and simulation is due to the series source of the transistor which is not taken into account resistance by a in our simple model and in fact shifts the real part of beconstant amount equal to . As a result the real part of comes zero at a different turn ratio than expected. However, the , as can be seen in Fig. 5(a), becomes zero imaginary part of precisely at the point predicted by calculations. Fig. 5(b) shows , illustrating that the simulated and calculated values of increases monotonically with n. Therefore, the reverse isolation can be achieved without sacrificing the gain. The discrepancy and embetween the simulated and calculated values of anates mostly from the drain-bulk capacitance and also which are not taken into from the source-bulk capacitance account in the simple transistor model used in our calculations. and for different values of Fig. 5(c) shows the simulated (1, 0.9, 0.8, and 0.7) indicating that the proper choice of turn only if the coupling is equal to one. ratio can minimize It can be shown (see Appendix) that the electric coupling between the primary and secondary windings of the transformer ps , which is ignored in our simple model, does not influence the required condition of (14) for isolation, although it changes the values of predicted Z-parameters. The same is true about and ). source-bulk and drain-bulk capacitances ( Furthermore, as shown in the Appendix, even the losses of the transformer do not change the requirements of (14) for isolation.

IV. NOISE ANALYSIS In order to perform a noise analysis, the circuit schematic of the LNA including the transistor channel noise and the source noise is shown in Fig. 6(a). Considering the transistor as a linear two-port, the channel noise can be transferred back to its gate, as shown in Fig. 6(b), using the T-parameters of the transistor.

Fig. 5. and of the amplifier versus the square of turn ratio of the transby proper choice of turn ratio and couformer showing the minimization of and simulated imagpling factor. (a) Simulated and calculated magnitude of for . (b) Simulated and calculated magnitude of for inary part of . (c) Simulated magnitude of and for values of 1, 0.9, 0.8, and 0.7.

Then the resultant noise current source between the gate and the source of the transistor can be split into two, as shown in Fig. 6(c). Considering the whole circuit as a two-port, with one port between the gate of the transistor and the ground and the other port between the source of the transistor and the ground,

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Fig. 7. Simulated imaginary part of the input impedance of the LNA of Fig. 2 . and simulated noise figure of the same LNA versus

The total noise contribution referred to the input of the circuit is then obtained from Fig. 6. Manipulating the internal noise source of the transistor to refer it to the input. (a) Original circuit schematic with the channel noise current source. (b) Using T-parameters of the transistor to refer the channel noise to the gate of the transistor. (c) Splitting the floating noise current source between gate and source. (d) Using T-parameters of the whole circuit to refer the remaining current source to the input.

and calculating the T-parameters of this two-port, the noise current source in parallel with can be transferred back to the input, as shown in Fig. 6(d). According to Fig. 6, only the B and D elements of the T matrices are needed. Therefore, the B and D elements of the T-matrix of the transistor are obtained from (21) (22) is the gate resistance of the transistor. The B and where D elements of the T-matrix of the other two-port, represented by the transistor gate as the input and the transistor source as the output with the ground considered as the common node, are derived from (23) and (24), shown at the bottom of the page, which in case of unilateralization and meeting the conditions of (14) are simplified to (25) (26)

(27) The noise figure is then calculated from the following:

(28) is the real part of the source impedance. According where to (28), the NF can be minimized if the reactive part of the source impedance resonates with the gate-source and gate-drain capacitances ( and ). It is also deduced from (15) that the imaginary part of the input impedance is cancelled out when resonates with and . The imaginary part of the input impedance and the are shown in Fig. 7, showing that the simulated NF versus minimum noise figure is achieved when the imaginary part of the input impedance is zero. Fig. 8 shows the simulated noise figure showing sharp increase in NF for small values of and a relatively flat curve for larger values of . The simulation conditions are the same as Section III. In fact, because is in the denominator of the second and third term of (28), the NF shows strong dependence on for small values of . However, for moderate and larger values in the numerator of the third term becomes more of influential, resulting in a pretty flat curve for NF (See Fig. 8). In this analysis, for simplicity, the thermal channel noise of the transistor and the gate resistance of the transistor have been

(23) (24)

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Fig. 8. Simulated noise figure of the LNA versus source resistance.

considered as the dominant noise sources in the circuit. However, the loss in other elements such as the losses of the transformer can appear as additional noisy elements in the circuit. Quantitative analysis of the impact of the transformer loss on the noise figure would require dealing with a more complicated circuit model. V. CIRCUIT DESIGN A two-stage differential variant of the circuit topology discussed in the previous sections has been designed, as shown in Fig. 9, in 65 nm LP bulk CMOS technology with 7 metal layers and an aluminum layer on top. The thickness of aluminum layer, metal 7, metal 6, and metal 5 is 1.45 m, 0.9 m, 0.9 m, and 0.22 m, respectively. The dielectric height between metal 7 and aluminum, between metal 6 and metal 7, between metal 5 and metal 6, and between silicon and metal 5 is 0.8 m, 0.595 m, 0.595 m, and 2.13 m, respectively. The main design objectives, aside from stability discussed in Section III, are low noise figure and high gain. Both are functions of the transistor biasing and width, passives choices, and source impedance . The transducer power gain of the LNA after unilateralization is obtained from (29), shown at the bottom of the page, where is the load resistance (not shown in Fig. 9). From the last term of (29) it is clear that the resonance between and maximizes the transducer gain, a condition identical to the one required for noise figure optimization and canceling the imaginary part of the input impedance. The losses in the transformer can be modeled by two resistances, one in parallel with and one in parallel with , as shown in Appendix. These losses reduce the amount of power delivered to the load and thereby decrease the gain.

Fig. 9. Circuit schematic of the two-stage differential voltage-voltage transformer-feedback LNA: finger width of transistors is 1 m, simulated values for and are 137 pH and 42 pH, respectively. and are 110 pH and 150 pH, respectively. Each transistor in the first stage draws 8.65 mA. Each transistor in the second stage draws 6.25 mA.

The transformer used in the LNA is designed using EM simulations with ADS Momentum. The resulting structure is shown in Fig. 10. The top inductor consists of two metal lines in parallel to lower the inductance and increase the Q-factor. The bottom inductor has two turns, connected through vias which are distributed all along the metal lines. Both inductors are placed exactly on top of each other to achieve the highest possible coupling . The width of the metal lines is chosen to be 3 m. This decision constitutes a trade-off between -factor and self-resonance frequency (SRF) [12]. The simulated SRF of the transformer is 98 GHz. To satisfy (14) for isolation, a turn ratio n of 1.8 is chosen. While a coupling factor of 1 is needed for satisfying (14), the best we could achieve was 0.76. The simulated Q-factors of the inductors are higher than 10 at the frequency of interest. Simulated values for and are 137 pH and 42 pH, respectively. A patterned shield is placed underneath the transformers to reduce substrate coupling. Two stages are cascaded together, as shown in Fig. 9, to achieve an acceptable gain, as compared to state-of-the-art LNAs. The layout of the core of the LNA is shown in Fig. 11. The differential input of the first stage is shown on the left and the differential output of the second stage is on the right. The two stages are connected to each other with a DC-blocking capacitor between the output of TF1 and the input of . All

(29)

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Fig. 10. Transformer structure. For clarity the vias connecting the two bottom metals are only shown at the beginning and the end of the metal strips.

Fig. 12. Die photo including the whole LNA with bondpads on the left and one de-embedding structure on the right. Size of the die is 960 980 m, size of the LNA is 330 170 m.

Fig. 11. Layout of the LNA (330 170 m). Only the top metal layers shown to clarify the structure. Patterned shields not shown. The input and output reference planes are indicated by dashed lines.

the RF interconnects longer than 10 m are simulated in ADS Momentum to account for their parasitic inductances, their parasitic capacitances, and their losses. The rest of the layout is simulated after RC-extraction. The parasitic inductances in the signal path are either included in the input transmission line or the gate inductance . The parasitic inductances in the ground and supply routing are minimized by meshing the ground and supply interconnects. and are approximately 110 pH and 150 pH, respectively. The transistors are indicated in Fig. 11 and are situated underneath the metal lines connecting the transformer structures. Transistor width is 35 m and 25 m in stage 1 and stage 2, respectively. The finger width is 1 m. The vertical lines surrounding the transformers are the DC power lines and biasing of the LNA. Coplanar waveguides (CPW) with shielding are used to connect different components to each other. This results in low coupling to the substrate and between components. Special attention is paid to keeping the connections between transistors and inductors as short as possible to avoid increasing the parasitic capacitances. For instance the drain and source inductors are placed so close to the transistors that they are just connected through vias. The input and output of the LNA are connected to bondpads using CPWs (see Fig. 12) which result in losses and an impedance shift. The resulting source and load impedance of the circuit at the input and output indicated in Fig. 11 is approximately . Open, short, and load structures are added to de-embed the circuit. Differential coplanar waveguide

Fig. 13. LNA noise figure measurement setup.

used in the layout are chosen to have a characteristic impedance differential, because the measurement equipof ment are 50 single-ended. The signal lines are made with the top metal layer (metal 7) with 4 m width. Two ground planes are placed at both sides of the signal line by stacking all metal layers. The spacing between the lines is also 4 m. The bottom patterned shielding metal (metal 1) below the signal

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Fig. 14. Noise figure calibration for the LNA.

Fig. 17. Simulated and measured impedance.

and

for 100

differential reference

Fig. 18. Simulated and measured impedance.

and

for 100

differential reference

Fig. 15. Measured and simulated differential gain and noise figure.

Fig. 16. NF and variation as a function of . The star in the figure indicates the measurement result without use of the load-pull setup.

line is also defined as ground to reduce substrate effects. Simulations show a loss of 1.18 dB/mm. A special effort has been put into making the design as symmetric as possible to reduce the common mode. VI. EXPERIMENTAL RESULTS The LNA, fabricated in CMOS 65 nm technology, is measured using a differential measurement setup [13]. The DC

Fig. 19. Simulated and measured and for 30 differential reference impedance at the input (representing the anticipated on-chip antenna) and fF) differential reference impedance at the output (representing ( the following stage which has a capacitive input.

power consumption is observed to be equal to the simulated value of 35 mW. The S-parameters are measured using the Agilent E8361A power network analyzer. Calibrations are verified using WinCal XE software. After de-embedding the measured with is 10 dB at 61 GHz (Fig. 13). The measured in-band deviadB. The output-to-input isolation indicated by tion is

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TABLE I COMPARISON WITH OTHER WORKS

Fig. 20. Simulated and measured impedance at the input and ( the output.

and for 30 differential reference fF) differential reference impedance at

Fig. 22. Simulated and measured 1 dB compression point curves.

Fig. 23 Modified circuit schematic of Fig. 4 used to analyze the impact of ps , and .

Fig. 21. Simulated and measured IP3 curves.

is below 47 dB over the entire measured band of 55–67 GHz and the group delay is close to 20 ps over the entire band of interest. The differential stability factor (K-factor) remains above 30 in the measured band. The common mode maximum transducer gain is equal to is below dB, dB resulting in a CMRR of 12 dB. The and the K-factor remains above 70.

The noise figure measurement of the 60 GHz LNA is impeded by the fact that the output of the LNA is at a higher frequency than supported by the spectrum analyzer. A passive mm-wave mixer is used in the noise measurement setup to downconvert the output of the LNA to the range of the spectrum analyzer. The noise figure measurement setup is illustrated in Fig. 13. The passive mixer can be included in the calibration setup obviating the need for its inclusion in post-measurement calculations, as shown in Fig. 14. The loss of the interface waveguides

SAKIAN et al.: 60 GHZ WIDEBAND VOLTAGE-VOLTAGE TRANSFORMER

Fig. 24 Modified circuit schematic of Fig. 4 used to analyze the impact of ps

and probe at the input of the DUT are measured separately and de-embedded from the measurement results manually. The noise figure is measured in the band 59.5–66 GHz (Fig. 15). , looking from the input of the LNA towards , the source, during this measurement is equal to as a result of impedance transformation made by the input transmission lines and bondpads which are de-embedded from the measurement results. The input reflection coefficient seen by the noise source is below dB. The average measured NF in this band is equal to 3.8 dB. Fig. 16 shows the variations of NF and for different values of source impedance using a source-pull measurement setup. This measurement is done by modifying the measurement setup of Fig. 13 through adding a source-pull between the noise source and the DUT [18]. The of the circuit is found to be 3.7 dB. Figs. 17 and 18 show the simulated and measured s-parameters of the LNA for 100 differential reference impedance at both input and output. However, the LNA is not designed for 100 antenna and mixer. The on-chip differential antenna is expected to provide a 30 impedance whereas the mixer following the LNA is expected to have a capacitive input of 30 fF in parallel with a 100 . Therefore, is optimized for such a configuration as illustrated in the simulated and measured s-parameters of Figs. 19 and 20. The measured IIP3 is equal to 5 dBm at 57.5 GHz and 4 dBm at 60 GHz. Fig. 21 shows the IP3 curve for a two-tone input at 60 GHz with 1 MHz spacing. The measured 1 dB compression point is dBm, as shown in Fig. 22. The performance of the existing 60 GHz LNAs is compared with this work in Table I. The LNAs presented in [14], [15], [3], and [16] are single ended, and [17] has a differential output. The work presented here shows one of the lowest noise figures and the highest bandwidth. The relatively low gain is due to using only two cascaded stages. The reported gain is from the differential input to the differential output.

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, and the losses of the transformer.

VII. CONCLUSION A noise and isolation analysis is done on a voltage-voltage transformer feedback LNA topology providing design insight for lowering the noise figure and preserving stability in such circuits. It has been shown that a close analogy prevails between the classic concept of Masons’s invariant and the isolation in this type of LNAs. Furthermore, the presented noise analysis provides closed-form equations which can capture the variation trends of the LNA noise figure as a function of the transistor and passives parameters. Using the analysis results, a two-stage fully integrated 60 GHz differential low noise amplifier is implemented in a CMOS 65 nm technology. Utilizing a voltage-voltage transformer feedback enables the neutralization of the Miller capacitance and the achievement of a flat 10 dB gain over the entire 6 GHz bandwidth. A noise figure of 3.8 dB is obtained. APPENDIX I We investigate the impact of ps (representing the electric coupling between the primary and the secondary), , and on the stability analysis performed in Section III. Afterwards we also investigate the impact of the transformer loss on the stability analysis. Solving the circuit of Fig. 23 for results , in (A-1), shown at the bottom of the page, where and are the z-parameters of the transistor as defined in (5). Forcing the numerator of (A-1) to zero and writing and in terms of and from (11)–(12), we obtain

(A-2) Further simplification yields

(A-3)

(A-1)

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ps

ps

(A-5)

According to (A-3) for a frequency-independent nullification of , we need (A-4) and from (5), results in the same which after substituting conditions specified in (14). For considering the impact of the transformer loss on the stability analysis, we have to solve the circuit of Fig. 24 for which results in (A-5), shown at the top of the page. Forcing the and in terms of numerator of (A-5) to zero and writing and from (11)–(12), we obtain

(A-6) Once again for a frequency-independent nullification of the conditions of (A-4) and consequently (14) must hold without any influence by and .

REFERENCES [1] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits. Cambridge, U.K.: Cambridge Univ. Press, 2004. [2] D. K. Shaeffer and T. H. Lee, “A 1.5-V, 1.5-GHz CMOS low noise amplifier,” IEEE J. Solid-State Circuits, vol. 32, no. 5, pp. 745–759, May 1997. [3] T. Yao, M. Q. Gordon, K. K. W. Tang, K. H. K. Yau, M.-T. Yang, P. Schvan, and S. P. Voinigescu, “Algorithmic design of CMOS LNAs and PAs for 60-GHz radio,” IEEE J. Solid-State Circuits, vol. 42, no. 5, pp. 1044–1057, May 2007. [4] W. Zhuo, S. Embabi, J. P. de Gyvez, and E. Sanchez-Sinencio, “Using capacitive cross-coupling technique in RF low noise amplifiers and down-conversion mixer design,” in Proc. Eur. Solid State Circuits Conf., Sep. 2000, pp. 116–119. [5] F. Bruccoleri, E. A. M. Klumperink, and B. Nauta, “Generating all 2-MOS transistors amplifiers leads to new wideband LNAs,” IEEE J. Solid-State Circuits, vol. 36, no. 7, pp. 1032–1040, Jul. 2001. [6] F. Bruccoleri, E. A. M. Klumperink, and B. Nauta, “Wide-band CMOS low-noise amplifier exploiting thermal noise canceling,” IEEE J. SolidState Circuits, vol. 39, no. 2, pp. 275–282, Feb. 2004. [7] E. Janssen, R. Mahmoudi, E. van der Heijden, P. Sakian, A. de Graauw, R. Pijper, and A. van Roermund, “Fully balanced 60 GHz LNA with 37% bandwidth, 3.8 dB NF, 10 dB gain and constant group delay over 6 GHz bandwidth,” in Proc. 10th Topical Meeting Silicon Monolithic Integr. Circuits RF Syst., Jan. 2010, pp. 124–127. [8] D. J. Cassan and J. R. Long, “A 1-V transformer-feedback low-noise amplifier for 5-GHz wireless LAN in 0.18- m CMOS,” IEEE J. SolidState Circuits, vol. 38, no. 3, pp. 427–435, Mar. 2003. [9] S. J. Mason, “Power gain in feedback amplifiers,” Trans. IRE Prof. Group Circuit Theory, vol. CT-1, no. 2, pp. 20–25, Jun. 1954. [10] M. S. Gupta, “Power gain in feedback amplifiers, a classic revisited,” IEEE Trans. Microw. Theory Tech., vol. 40, no. 5, pp. 864–879, May 1992.

[11] A. Singhakowinta and A. R. Boothroyd, “On linear twoport amplifiers,” IEEE Trans. Circuit Theory, vol. CT-11, no. 1, p. 169, Mar. 1964. [12] H. M. Cheema, P. Sakian, E. Janssen, R. Mahmoudi, and A. van Roermund, “Monolithic transformers for high frequency bulk CMOS circuits,” in Proc. IEEE Topical Meeting Silicon Monolithic Integr. Circuits RF Systems., Jan. 2009, pp. 112–115. [13] P. Sakian, E. Janssen, J. Essing, R. Mahmoudi, and A. van Roermund, “Noise figure and S-parameter measurement setups for on-wafer differential 60 GHz circuits,” in Proc. 76th ARFTG Microw. Meas. Symp., Clearwater Beach, FL, Dec. 2–5, 2010, pp. 69–72. [14] E. Cohen, S. Ravid, and D. Ritter, “An ultra low power LNA with 15 dB gain and 4.4 dB NF in 90 nm CMOS process for 60 GHz phase array radio,” in Proc. IEEE Radio Freq. Integr. Circuits Symp., Jun. 2008, pp. 61–64. [15] A. Siligaris, C. Mounet, B. Reig, P. Vincent, and A. Michel, “CMOS SOI technology for WPAN. application to 60 GHz LNA,” in Proc. IEEE Int. Conf. Integr. Circuit Des. Technol. Tutorial, Jun. 2008, pp. 17–20. [16] J. Borremans, K. Raczkowski, and P. Wambacq, “A digitally controlled compact 57-to-66 GHz front-end in 45 nm digital CMOS,” in Proc. IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2009, pp. 492–493. [17] C. Weyers, P. Mayr, J. W. Kunze, and U. Langmann, “A 22.3 dB voltage gain 6.1 dB NF 60 GHz LNA in 65 nm CMOS with differential output,” in Proc. IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2008, pp. 192–606. [18] L. F. Tiemeijer, R. M. T. Pijper, and E. van der Heijden, “Complete on-wafer noise-figure characterization of 60-GHz differential amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 6, pp. 1599–1608, Jun. 2010.

Pooyan Sakian was born in Ghom, Iran, in 1981. He received the B.Sc. and M.Sc. degrees in electrical engineering from Sharif University of Technology, Tehran, Iran, and the Ph.D. degree in electrical engineering from Eindhoven University of Technology, Eindhoven, the Netherlands in 2003, 2006, and 2011, respectively. His research interests include analog and RF IC design for wireless communications.

Erwin Janssen was born in Deurne, The Netherlands, on July 20 1982. He received the B.S. degree in electrical engineering from Fontys Hogescholen, Eindhoven, The Netherlands, in 2004, and the M.S. degree in electrical engineering from Eindhoven University of Technology, Eindhoven, The Netherlands, in 2008, where he is currently working toward the Ph.D. degree. His main research interests are concerned with the digital compensation of nonlinear distortion in RF receivers.

SAKIAN et al.: 60 GHZ WIDEBAND VOLTAGE-VOLTAGE TRANSFORMER

Arthur H. M. van Roermund (SM’95) was born in Delft, The Netherlands, in 1951. He received the M.Sc. degree in electrical engineering in 1975 from the Delft University of Technology, Delft, The Netherlands, and the Ph.D. degree in applied sciences from the K.U. Leuven, Belgium, in 1987. From 1975 to 1992, he was with Philips Research Laboratories, Eindhoven. From 1992 to 1999 he was a Full Professor at the Electrical Engineering Department, Delft University of Technology, where he was Chairman of the Electronics Research Group and Member of the management team of DIMES. From 1992 to 1999 he was Chairman of a two-years post-graduate school for “chartered designer”. From 1992 to 1997 he was a consultant for Philips. In October 1999 he joined Eindhoven University of Technology as a Full Professor, chairing the Mixed-signal Microelectronics Group. Since September 2002, he has been Director of Research of the Department of Electrical Engineering. Until 2009, he was a member of the supervisory board of the NRC Photonics Research Centre. He is chairman of the board of ProRISC, the microelectronics platform in the Netherlands, and Vice Chair of the ICT-research platform for the Netherlands (IPN). Since 2001, he has been one of the three organizers of the yearly workshop on Advanced Analog Circuit Design (AACD). He authored/co-authored 470 articles and 29 books. Dr. van Roermund received the Simon Stevin Meester award in 2004 for his scientific and technological achievements. In 2007 he was member of an international assessment panel for the Department of Electronics and Information of Politecnico di Milano, and in 2009 for Electronics and Electrical Engineering for the merged Aalto University Finland.

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Reza Mahmoudi received the M.Sc. degree in electrical engineering with a thesis entitled “A Measurement System for Noise Parameters” from the Delft University of Technology, Delft, the Netherlands, in 1993 where he joined the Microwave Component Group until 1999, and the Designers Certificate from Delft in 1996 with a thesis entitled “A Systematic Design Method for a Feed-Forward Error Control System.” This work was the initial step leading to his Ph.D. thesis. He has worked for Philips Discrete Semiconductors in Nijmegen, the Netherlands, and Advanced Wave Research in El Segundo, CA. Since April 2003, he has been with the Department of Electrical Engineering at Eindhoven University of Technology/Eindhoven, The Netherlands. He is currently an Associate Professor in the field of “ultra-high frequency front-end electronics” and ultrahigh speed communication as well as high resolution imaging systems are forming his research areas. He has participated with 76 academic publications.

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ESD Protection Design for 60-GHz LNA With Inductor-Triggered SCR in 65-nm CMOS Process Chun-Yu Lin, Member, IEEE, Li-Wei Chu, Student Member, IEEE, and Ming-Dou Ker, Fellow, IEEE

Abstract—To effectively protect the radio-frequency (RF) circuits in nanoscale CMOS technology from electrostatic discharge (ESD) damages, the silicon-controlled rectifier (SCR) devices have been used as main on-chip ESD protection devices due to their high ESD robustness and low parasitic capacitance. In this paper, an SCR device assisted with an inductor is proposed to improve the turn-on efficiency for ESD protection. Besides, the inductor can be also designed to resonate with the parasitic capacitance of the SCR device at the selected frequency band for RF performance fine tuning. Experimental results of the ESD protection design with inductor-triggered SCR in a nanoscale CMOS process have been successfully verified at 60-GHz frequency. The ESD protection design with inductor-triggered SCR has been implemented in cell configuration with compact size, which can be directly used in the RF receiver circuits. To verify the RF characteristics and ESD robustness in the RF receiver, the inductor-triggered SCR has been applied to a 60-GHz low-noise amplifier (LNA). Verified in a silicon chip, the 60-GHz LNA with the inductor-triggered SCR can achieve good RF performances and high ESD robustness. Index Terms—Electrostatic discharge (ESD), low-noise amplifier (LNA), silicon-controlled rectifier (SCR), 60 GHz.

I. INTRODUCTION

T

HE 60-GHz frequency band has been allocated for unlicensed usage in the next-generation wireless communications [1]. The radio-frequency (RF) circuits operating at this 60-GHz frequency have the benefits of excellent interference immunity, high security, multi-gigabit speed, and frequency re-usable, due to short transmission distance [2]. Several RF transceivers operated at this frequency had been realized in CMOS technologies [3], [4]. Nanoscale CMOS technologies have been used to implement RF circuits with the advantages of scaling-down feature size, improving high-frequency characteristics, low power consumption, high integration capability, and low cost for mass production. However, the thinner gate oxide in nanoscale CMOS technology seriously degrades the electrostatic discharge (ESD) robustness of IC products [5]. The general requirement for a commercial IC product is to pass

Manuscript received May 24, 2011; revised November 20, 2011; accepted November 27, 2011. Date of publication January 12, 2012; date of current version March 02, 2012. This work was supported by Taiwan Semiconductor Manufacturing Company (TSMC), by National Science Council, Taiwan, under Contract NSC 100-2221-E-009-048, and by the “Aim for the Top University Plan” of National Chiao-Tung University and Ministry of Education, Taiwan. C.-Y. Lin and M.-D. Ker are with the Institute of Electronics, National ChiaoTung University, Hsinchu, Taiwan (e-mail: [email protected]; [email protected]). L.-W. Chu is with the Department of Photonics and Display Institute, National Chiao-Tung University, Hsinchu, Taiwan. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2178425

Fig. 1. ESD protection circuit added to the input ESD damages.

pad of LNA against

2-kV human-body-model (HBM) ESD tests [6]. Therefore, an on-chip ESD protection circuit must be added at the first stage of the RF receiver. As shown in Fig. 1, the ESD protection cirpad of the low-noise amplifier cuit is added to the input (LNA) against ESD damages. Several ESD protection designs have been reported for RF circuits [7], [8]. Some ESD protection designs used for 60-GHz RF LNA were also presented [9]–[12]. To minimize the impacts from the ESD protection circuit on RF performances, the ESD protection circuit at the input pads must be carefully designed. ESD protection devices cause RF performance degradation with several undesired effects [13], [14]. The parasitic capacitance of the ESD protection device is one of the most important design considerations for RF circuits. Conventional ESD protection devices with large dimensions have large parasitic capacitances, which are difficult to be well tolerated in the RF front-end circuits. The parasitic capacitance will cause signal loss from the pad to ground. Moreover, the parasitic capacitance will change the input matching condition. Besides, adding an ESD protection device to the RF receiver will degrade the noise figure. As the operating frequencies of RF circuits are further increased, on-chip ESD protection designs for RF applications are more challenging. Among the ESD protection devices, such as the diode, MOS, BJT, or field-oxide device, the silicon-controlled rectifier (SCR) device has been reported to be useful for RF ESD protection design due to its higher ESD robustness within a smaller layout area and lower parasitic capacitance [15]. Besides, the SCR device can be safely used without latchup danger in advanced CMOS technologies with low supply voltage [16]. The device structure of the SCR device used in RF input pad is illustrated

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LIN et al.: ESD PROTECTION DESIGN FOR 60-GHz LNA WITH INDUCTOR-TRIGGERED SCR IN 65-nm CMOS PROCESS

in Fig. 2(a). The pad is connected to the first P+, which is formed in the N-well. The pad is connected to the pickup N+, which is formed in the same N-well. The pad is connected to the second N+ and the pickup P+, which are formed in the nearby P-well. The trigger port is connected to the third P+, which is formed in the same P-well. The SCR path between and consists of P+, N-well, P-well, and N+. Besides, the parasitic diode path between and consists of P+ and N-well/N+. The equivalent circuit of the SCR consists of a PNP BJT and an NPN BJT , as shown in Fig. 2(b). The is formed by the P+, N-well, and P-well, and the is formed by the N-well, P-well, and N+. As ESD zapping from to , the positive-feedback regenerative mechanism of and results in the SCR device highly conductive to make SCR very robust against ESD stresses. Under RF circuit operating conditions, the diode and SCR paths remain off to prevent from leakage. However, SCR has some drawbacks, such as higher trigger voltage and slower turn-on speed. To reduce the trigger voltage of an SCR device, the trigger signal can be sent into the base terminal of to enhance the turn-on speed. The voltage level of the trigger port is in reverse proportion to the trigger voltage of the SCR device. Therefore, some circuit design techniques are reported to enhance the turn-on efficiency of SCR devices, such as the gate-coupled, substrate-triggered, and gate-grounded-NMOStriggered (GGNMOS-triggered) techniques [16]. Besides, some SCR devices with lower trigger voltage for RF applications are also presented, such as the diode-triggered SCR (DTSCR) [17]. However, adding a trigger circuit to SCR device also increases the parasitic capacitance seen at the pad, which is hard to tolerate for RF circuits, especially in the 60-GHz operating frequency. In this work, a novel inductor-triggered SCR design is proposed for effective on-chip RF ESD protection for 60-GHz frequency. The inductor acts as a conductive path to trigger the SCR device under ESD stress conditions. Besides, the inductor is used to compensate the parasitic capacitance of ESD protection device under normal RF circuit operating conditions [18], [19]. This design can achieve low trigger voltage, fast turn-on speed, high ESD robustness, and low RF performance degradation. Without additional process modification, this inductor-triggered SCR design is realized by circuit and layout skills in a 65-nm CMOS process. II. REALIZATION OF INDUCTOR-TRIGGERED SCR A. Implementation of the Inductor-Triggered SCR The new proposed inductor-triggered SCR is shown in Fig. 3, , a MOS which consists of an SCR device, an inductor transistor , and the RC-based ESD detection circuit. The PMOS transistor is selected for since it exhibits the initial-on function for ESD protection, which can quickly pass the trigger signal to SCR device [20]. The inductor is used to provide the trigger path between the pad and the trigger port of the SCR device under ESD stress conditions. The PMOS transistor at the trigger path, which is controlled by the ESD detection circuit, is also turned on under ESD stress conditions. When the trigger signal passes from the pad to the trigger port

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Fig. 2. (a) Device cross-sectional view, and (b) equivalent circuit, of SCR device used in RF input pad.

Fig. 3. Proposed inductor-triggered SCR for RF ESD protection.

of the SCR device, the SCR device can be quickly turned on to discharge the ESD current. The RC-based ESD detection circuit is used to distinguish the ESD-stress conditions from the normal circuit operating conditions. Therefore, under normal power-on conditions, the PMOS transistor is turned off to block the steady leakage current path from the pad to the trigger port of SCR device. Under normal RF circuit operating conditions, the inductor in series with the PMOS is used to compensate the parasitic capacitance of the SCR device . Fig. 4 shows the proposed ESD protection scheme for an RF receiver, including the inductor-triggered SCR, the diode , and the power-rail ESD clamp circuit. The inductor-triggered

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Fig. 4. Proposed ESD protection scheme for , and power-rail ESD clamp circuit. SCR,

pad with inductor-triggered

SCR assisted with the diode and the power-rail ESD clamp circuit is used to provide the ESD current discharging paths for the pad. The power-rail ESD clamp circuit, which consists of the RC-inverter-triggered NMOS, is used to provide ESD current paths between and under ESD stress conditions. The R ( ) and C ( 10 pF) with the time constant of can distinguish the ESD transients from the normal circuit operating conditions. Under normal circuit operating conditions, the node between R and C is charged to the high potential . Under ESD stress conditions, the ESD voltage at has the fast rise time in the order of 10 ns. With the RC delay, the power-rail ESD clamp circuit is turned on to provide ESD current path from to . Since the power-rail ESD clamp circuit is placed between and , the impact on pad is minor. The RC used in the power-rail ESD clamp circuit can also be used to control the PMOS in the inductor-triggered SCR. With such a configuration, the resistor for ESD detection circuit in the original inductor-triggered SCR can be merged into the power-rail ESD clamp circuit. In the ESD protection design with the inductor-triggered SCR, the dimensions of the inductor , PMOS transistor , SCR device, and diode can be designed to minimize the RF performance degradation. Since the capacitor used in power-rail ESD clamp circuit is large enough ( 10 pF) to keep the node between R and C at ac ground under normal RF circuit operating conditions, the impedance of the trigger path seen at the pad to ground can be calculated as (1) where the pressed as

is the angular frequency and the

can be ex(2)

The , , and denote the gate-to-source capacitance, gate-to-body capacitance, and drain-to-body capacitance of the PMOS transistor , respectively. The resonance angular frequency , which is designed to be the operating frequency of RF signal, can be obtained by (3)

where the is the parasitic capacitance contributed by the SCR and diode . The sizes of SCR and depend on the required ESD robustness, while the size of transistor depends on the required trigger current. Once the sizes of transistor, SCR, and have been chosen, the required inductance can be determined. Fig. 4 also shows the ESD current paths under positive-to(PS), positive-to(PD), negative-to(NS), and negative-to(ND) ESD stress conditions. During positive-toESD stress, ESD current will first pass through the inductor and PMOS to trigger the SCR device. The major ESD current will be discharged by the SCR device from the pad to . Under positive-toESD stress, the ESD current will be discharged by the parasitic diode path embedded in the SCR device from the pad to . During negative-toESD stress, the ESD current will be discharged by the forward-biased from the to pad. Under negative-toESD stress, the ESD current will be discharged by the power-rail ESD clamp circuit and the from to pad. The proposed ESD protection scheme in Fig. 4 can provide the corresponding current discharging paths with good ESD robustness. The device dimensions of the test circuits with the inductortriggered SCR are listed in Table I. A commercial 65-nm CMOS technology is used in this work. The ESD protection circuit with the inductor-triggered SCR is designed for 60-GHz RF applications. The test patterns include the test circuits A, B, C, and D. The size of SCR device used in the test circuits A, B, C, and D are split as 8 , 15 , 23 , and 30 , respectively. The size of in test circuits A, B, C, and D are split as also 8 , 15 , 23 , and 30 , respectively. The parasitic capacitance of ESD protection devices in test circuits A, B, C, and D at 60 GHz are estimated as 25 fF, 50 fF, 75 fF, and 100 fF, respectively. The width/length of PMOS in each test circuit is kept at , and the equivalent is 50 fF at 60 GHz. Therefore, the required inductors , including the parasitic inductance of metal connections, are 0.38 nH, 0.27 nH, 0.23 nH, and 0.2 nH for the test circuits A, B, C, and D. B. Simulation Under 60-GHz Frequency The RF characteristics of the test circuits are simulated by using the microwave circuit simulator ADS with the selected device dimensions. Since the SCR model is not provided in the given CMOS process, diodes with P+/N-well, N+/P-well, and N-well/P-well junctions are used to simulate the SCR devices. A signal source with 50- impedance drives the port 1 ( pad) of the test circuit, and a 50- load is connected to the port 2 to simulate the RF receiver. The voltage supply of is 1 V (0 V), and the dc bias of is 0.5 V. The simulated reflection parameters are shown in Fig. 5(a). These ESD protection circuits exhibit good input matching around 60 GHz. The transmission parameters are compared in Fig. 5(b). At 60-GHz frequency, the test circuits A, B, C, and D have about 0.5-dB, 0.8-dB, 1.2-dB, and 1.5-dB power loss, respectively. Although the parasitic capacitance of the ESD protection devices can be resonated out, the losses are still contributed by the parasitic resistance of the SCR

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TABLE I DEVICE DIMENSIONS AND MEASUREMENTS RESULTS ESD PROTECTION DESIGNS WITH INDUCTOR-TRIGGERRED SCR

C. Simulation Under Normal Power-On Conditions The test circuits under normal power-on conditions and ESD transient events are simulated by using HSPICE. Under the normal power-on condition, the dc bias of is raised from 0 V to 1 V with 1-ms rise time. The gate voltage of PMOS is biased at 1 V through the resistor of power-rail ESD clamp circuit, so can be kept off and no trigger signal is generated from the pad to the SCR device. Fig. 6(a) shows the HSPICE-simulated voltage waveforms of the test circuit D under the normal power-on condition. The trigger signal remains at 0 V, so the SCR device is kept in off state. D. Simulation Under ESD Transient Events

Fig. 5. Simulation results of proposed ESD protection scheme on (a) -parameter. rameter and (b)

-pa-

and . Since these test circuits exhibit good RF performances between 57 65 GHz, they can be operated at 60 GHz even if some variation happens on device values.

When a positive fast-transient ESD voltage is applied to with grounded, the RC delay in the ESD detection circuit keeps the gate of at a relatively low voltage level compared to the fast rising voltage level at . The can be quickly turned on by the ESD energy to generate the trigger signal into the trigger port of the SCR device. Finally, the SCR device can be fully turned on to discharge ESD current from to . Fig. 6(b) shows the simulated voltage waveforms of the test circuit D under the ESD transition, where a 0-to-5 V voltage pulse with 10-ns rise time is applied to to simulate the fast transient voltage of human-body-model (HBM) ESD event [6]. With the limited voltage height of 5 V in the voltage pulse, the simulation results can check the desired trigger function before the RF circuit breakdown. Fig. 6(c) shows the simulated voltage waveforms of the test circuit D under the other ESD transition, where a 0-to-5 V voltage pulse with 0.1-ns rise time is applied to to simulate the faster transient voltage of charged-device-model (CDM) ESD event [6]. With the large enough trigger signal,

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Fig. 7. Chip micrograph of test circuit D.

to simulate the RF receiver under ESD stress condition. The ESD robustness of the test circuits can be estimated by the test patterns with the RF-NMOS emulators. Except the RF-NMOS emulator, the device sizes of test circuits A, B, C, and D are equal to those of test circuits , , , and , respectively. The chip micrograph of the test circuit D is shown in Fig. 7. A. RF Performances

Fig. 6. HSPICE-simulated results of proposed ESD protection scheme under (a) normal power-on condition, (b) ESD-like transition with 10-ns rise time, and (c) ESD-like transition with 0.1-ns rise time.

the SCR device should be triggered on before RF circuit breakdown during ESD stress condition. III. EXPERIMENTAL RESULTS OF INDUCTOR-TRIGGERED SCR The test circuits of inductor-triggered SCR have been fabricated in a 65-nm salicided CMOS process without using the silicide-blocking mask. One set of the test circuits are implemented with ground-signal-ground (G-S-G) pads to facilitate on-wafer two-port S-parameters measurement, which are labeled as test circuits A, B, C, and D. The other set of the test circuits are implemented with the RF-NMOS emulators [12] for ESD tests, which are labeled as test circuits , , , and , as listed in Table I. The RF-NMOS emulator, which consisted of one RF NMOS with gate terminal connected to the pad, and the drain, source, and body terminals connected to pad, is used

In order to extract the intrinsic characteristics of the test circuits in high frequencies, the parasitic effects of the G-S-G pads have been removed by using the L2L de-embedding technique [21]. With the on-wafer RF measurement, the S-parameters of these four test circuits have been extracted from 0 to 67 GHz. The voltage supply of is 1 V (0 V), and the dc bias of is 0.5 V . The source and load resistances to the test circuits are kept at 50 . The measured -parameters and -parameters versus frequencies among the four test circuits are shown in Fig. 8(a) and (b), respectively. As shown in Fig. 8(a), these ESD protection circuits exhibit good input matching around 60 GHz. At 60-GHz frequency, the test circuits A, B, C, and D have about 1.2-dB, 1.4-dB, 1.6-dB, and 1.8-dB power loss, respectively. B. ESD Robustness The human-body-model (HBM) ESD pulses are stressed to each test circuit under positive-to(PS), positive-to(PD), negative-to(NS), and negative-to(ND) ESD stress conditions. The failure criterion is defined as the I-V characteristics seen at shifting over 30% from its original curve after ESD stressed at every ESD test level. In other words, the leakage current under 1-V bias at will not increase over 30% if the test circuit is not failed after ESD stresses. The HBM ESD robustness among the four test circuits with the proposed ESD protection designs are listed in Table I. The HBM ESD levels of the proposed ESD protection circuits , , , and can achieve 0.75 kV, 1.5 kV, 2.25 kV, and 2.75 kV, respectively, which are obtained from the lowest levels among PS, PD, NS, and ND ESD tests. The HBM ESD robustness of the

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Fig. 9. TLP-measured I-V characteristics among the four test circuits with the proposed ESD protection scheme of different device dimensions under positests. tive-to-

Fig. 8. Measurement results of (a) -parameters and (b) -parameters among the four test circuits with the proposed ESD protection scheme under different device dimensions.

test circuits is almost proportional to the sizes of ESD protection devices (SCR and ). To investigate the turn-on behavior and the I-V characteristics in high-current regions of the inductor-triggered SCR, the transmission line pulsing (TLP) system with a 10-ns rise time and a 100-ns pulse width is used [22]. The TLP-measured I-V curves of the ESD protection circuits , , , and under positive-tostress conditions are shown in Fig. 9. Once ESD pulses stressed to the test circuits, all SCR devices can be quickly triggered on to discharge ESD currents. The secondary breakdown current , which indicated the current-handling ability of ESD protection circuit, can also be obtained from the TLP-measured I-V curve. The test circuits , , , and can achieve of 0.37 A, 0.72 A, 1.39 A, and 1.78 A, respectively. These second breakdown currents measured by TLP system are summarized in Table I. The turn-on behavior and the values of the ESD protection circuits can ensure the effective ESD protection capability of the proposed inductor-triggered SCR. To evaluate the effectiveness of the proposed ESD protection circuits in faster ESD-transient events, another very fast TLP (VF-TLP) system with 0.2-ns rise time and 1-ns pulse width is also used in this study. The VF-TLP system can be used to capture the transient behavior of ESD protection circuits in the time domain of charged-device-model (CDM) ESD event [23]. The VF-TLP-measured of the ESD protection circuits are also listed in Table I. The tests circuits , , , and with the

Fig. 10. Circuit schematic of 60-GHz LNA with ESD protection circuit.

RF-NMOS emulator can achieve VF-TLP-measured of 0.96 A, 1.72 A, 2.14 A, and 2.21 A, respectively. For comparison purpose, the tests circuits A, B, C, and D without the RF-NMOS emulator are also tested by VF-TLP system. They can achieve VF-TLP-measured of 1.98 A, 2.72 A, 3.08 A, and 3.71 A, respectively. The proposed inductor-triggered SCR is fast enough to be turned on under such a fast-transient pulse. IV. APPLICATION TO 60-GHZ LNA A. 60-GHz LNA Design One 60-GHz LNA is designed in a commercial 65-nm CMOS technology for verification purpose. The metal-insulator-metal (MIM) capacitors and polysilicon resistors are available in this process. Fig. 10 shows the schematic of the 60-GHz LNA with ESD protection circuit of inductor-triggered SCR. In the two-stage LNA design, the cascode configuration is utilized to achieve high gain performance. The common-source and common-gate NMOS transistors are all with 36gate width and 0.06gate length. The input matching is designed for the minimum noise figure. The output matching network is conjugately matched for the maximum gain.

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Fig. 11. Chip micrograph of 60-GHz LNA with ESD protection circuit D.

Fig. 12. Measurement results of (a)

-parameters and (b)

-parameters on 60-GHz LNA with and without ESD protection circuits.

The 60-GHz LNA circuits with ESD protection circuits A and D are included in silicon chip. Fig. 11 shows a chip photograph of the 60-GHz LNA with the ESD protection circuit D. The layout size of this circuit is , including all testing pads and dummy layers. The dummy layers are kept away from the signal paths, so they will not influence the RF signals. In order to verify the RF characteristics and ESD robustness, the stand-alone LNA without RF ESD protection is also fabricated for comparison. All the LNA circuits with and without ESD protection circuits are fabricated on the same wafer for comparison. B. Experimental Results The RF characteristics are measured on wafer through G-S-G microwave probes with 100pitch. The S-parameters are measured by using the Agilent E8361A PNA network analyzer. The short-open-load-thru calibration has been done before the measurements. Each LNA circuit operates with the 1-V supply and draws a total current of 30 mA. The used bias voltages and are all 0.7 V. The measured -parameters and -parameters of the LNA circuits are shown in Fig. 12(a) and (b), respectively. With the ESD protection

circuits, the peak power-gain frequencies of all LNA circuits are at 60 GHz. The input return losses for all test circuits are greater than 10 dB at 60 GHz. The power gains at 60 GHz are 11.1 dB and 10.2 dB for two ESD-protected LNA circuits, respectively, which reduced by 1.1 dB and 2 dB, as compared with the stand-alone LNA of 12.2 dB. Under the same bias condition, the noise figures and the output power versus input power of the LNA with and without ESD protection circuits are shown in Figs. 13 and 14, respectively. The measured noise figures at 60 GHz of two ESD-protected LNA circuits are 7.5 dB and 8.6 dB, respectively, and that of the stand-alone LNA is 6.5 dB, as shown in Table II. The input 1-dB compression point of two ESD-protected LNA circuits are 11 dBm, and that of the stand-alone LNA is 12 dBm. To compare the ESD protection capability among the LNA with and without ESD protection circuits, the RF performances of all LNA circuits after ESD stresses are re-measured. All positive-to, positive-to, negative-to, and negative-toHBM ESD stresses are zapped to pad of each test circuit. The -parameters of three LNA circuits after various ESD stresses are shown in Fig. 15(a)–(c). The power gain of the stand-alone LNA is severely degraded after 100-V HBM ESD stresses, as seen in Fig. 15(a). In contrast,

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TABLE II COMPARISON AMONG 60-GHz LNA WITH AND WITHOUT ESD PROTECTION DESIGNS IN CMOS TECHNOLOGIES

Fig. 13. Measurement results of noise figures on 60-GHz LNA with and without ESD protection circuits.

Fig. 14. Measurement results of output power versus input power on 60-GHz LNA with and without ESD protection circuits.

the power gains of the LNA with ESD protection circuit A and that with ESD protection circuit D are still excellent matching after 500-V and 3-kV HBM ESD stresses, respectively, as seen in Fig. 15(b) and (c). C. Comparison Table II summarizes and compares the previously reported 60-GHz ESD-protected LNA [9]–[11] and the circuits of this work. The ESD protection circuit D can provide the required

Fig. 15. Measurement results on -parameters of (a) LNA without ESD protection, (b) LNA with ESD protection circuit A, and (c) LNA with ESD protection circuit D, after PS, PD, NS, and ND HBM ESD stresses.

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2-kV HBM ESD robustness with layout area and little RF performance degradation. Moreover, the proposed design has been implemented in cell configuration, which can be directly applied to the 60-GHz RF LNA. Therefore, the proposed ESD protection design in this paper is more suitable for RF circuit designer for them to easily apply ESD protection in the 60-GHz RF LNA. V. CONCLUSION The new ESD protection scheme with inductor-triggered SCR has been designed, fabricated, and characterized in a 65-nm CMOS process. The inductor-triggered SCR is designed to achieve low trigger voltage and high turn-on speed. Moreover, these inductor-triggered SCR can reach the input/output matching with low -parameters and high -parameters. These ESD protection circuits are developed to support RF circuit designers for them to easily apply ESD protection in the 60-GHz RF receiver circuits. Verified in a commercial 65-nm CMOS process, the test circuits A, B, C, and D have about 1.2-dB, 1.4-dB, 1.6-dB, and 1.8-dB power loss at 60-GHz frequency, respectively. Besides, they can sustain 0.75-kV, 1.5-kV, 2.25-kV, and 2.75-kV HBM ESD tests, respectively. The VF-TLP-measured of these test circuits are also provided, which are 0.96 A, 1.72 A, 2.14 A, and 2.21 A, respectively. The test circuits with inductor-triggered SCR have been applied to the 60-GHz LNA to confirm the ESD protection ability and to verify the RF performances. The RF performances of the LNA with ESD protection circuit A and that with ESD protection circuit D are still maintained after 500-V and 3-kV HBM ESD tests are performed, respectively. The inductor-triggered SCR can be further applied to other circuit blocks in the RF transceiver without dc blocking capacitor. Therefore, the proposed ESD protection scheme can be widely used to achieve good RF performance and high ESD robustness simultaneously. ACKNOWLEDGMENT The authors would like to thank Mr. T.-H. Lu, Mr. T.-L. Hsu, Mr. P.-F. Hung, Ms. H.-C. Li, Mr. M.-H. Song, Mr. J.-C. Tseng, Mr. T.-H. Chang, Mr. C.-P. Jou, and Mr. M.-H. Tsai of Taiwan Semiconductor Manufacturing Company (TSMC) for their valuable suggestions during RF design and measurement. REFERENCES [1] B. Razavi, “A 60-GHz CMOS receiver front-end,” IEEE J. Solid-State Circuits, vol. 41, no. 1, pp. 17–22, Jan. 2006. [2] Y. Mimino, K. Nakamura, Y. Hasegawa, Y. Aoki, S. Kuroda, and T. Tokumitsu, “A 60 GHz millimeter-wave MMIC chipset for broadband wireless access system front-end,” in Proc. IEEE Int. Microwave Symp., 2002, pp. 1721–1724. [3] J. Tsai, “A 55–64 GHz fully-integrated sub-harmonic wideband transceiver in 130 nm CMOS process,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 11, pp. 758–760, Nov. 2009. [4] T. Mitomo, R. Fujimoto, N. Ono, R. Tachibana, H. Hoshino, Y. Yoshihara, Y. Tsutsumi, and I. Seto, “A 60-GHz CMOS receiver front-end with frequency synthesizer,” IEEE J. Solid-State Circuits, vol. 43, no. 4, pp. 1030–1037, Apr. 2008. [5] S. Voldman, ESD: RF Technology and Circuits. New York: Wiley, 2006. [6] M.-D. Ker, J.-J. Peng, and H.-C. Jiang, “ESD test methods on integrated circuits: An overview,” in Proc. IEEE Int. Conf. Electronics, Circuits and Systems, 2001, pp. 1011–1014.

[7] A. Wang, H. Feng, R. Zhan, H. Xie, G. Chen, Q. Wu, X. Guan, Z. Wang, and C. Zhang, “A review on RF ESD protection design,” IEEE Trans. Electron Devices, vol. 52, no. 7, pp. 1304–1311, Jul. 2005. [8] M.-D. Ker, C.-Y. Lin, and Y.-W. Hsiao, “Overview on ESD protection designs of low parasitic capacitance for RF ICs in CMOS technologies,” IEEE Trans. Device Mater. Reliab., vol. 11, no. 2, pp. 207–218, Jun. 2011. [9] B. Huang, C. Wang, C. Chen, M. Lei, P. Huang, K. Lin, and H. Wang, “Design and analysis for a 60-GHz low-noise amplifier with RF ESD protection,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 2, pp. 298–305, Feb. 2009. [10] J. Borremans, K. Raczkowski, and P. Wambacq, “A digitally controlled compact 57-to-66 GHz front-end in 45 nm digital CMOS,” in Proc. IEEE Int. Solid-State Circuits Conf., 2009, pp. 492–493. [11] S. Thijs, K. Raczkowski, D. Linten, J. Tseng, T. Chang, M. Song, and G. Groeseneken, “CDM protection for millimeter-wave circuits,” in Proc. EOS/ESD Symp., 2011, pp. 116–122. [12] C.-Y. Lin, L.-W. Chu, and M.-D. Ker, “Design and implementation of configurable ESD protection cell for 60-GHz RF circuits in a 65-nm CMOS process,” Microelectron. Reliab., vol. 51, no. 8, pp. 1315–1324, Aug. 2011. [13] K. Gong, H. Feng, R. Zhan, and A. Wang, “A study of parasitic effects of ESD protection on RF ICs,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 393–402, Jan. 2002. [14] C. Richier, P. Salome, G. Mabboux, I. Zaza, A. Juge, and P. Mortini, “Investigation on different ESD protection strategies devoted to 3.3 V CMOS process,” J. ElectroRF applications (2 GHz) in a 0.18 statics, vol. 54, no. 1, pp. 55–71, Jan. 2002. [15] M.-D. Ker and C.-Y. Lin, “Low-capacitance SCR with waffle layout structure for on-chip ESD protection in RF ICs,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 5, pp. 1286–1294, May 2008. [16] M.-D. Ker and K.-C. Hsu, “Overview of on-chip electrostatic discharge protection design with SCR-based devices in CMOS integrated circuits,” IEEE Trans. Device Mater. Reliab., vol. 5, no. 2, pp. 235–249, Jun. 2005. [17] M. Mergens, C. Russ, K. Verhaege, J. Armer, P. Jozwiak, R. Mohn, B. Keppens, and C. Trinh, “Speed optimized diode-triggered SCR (DTSCR) for RF ESD protection of ultra-sensitive IC nodes in advanced technologies,” IEEE Trans. Device Mater. Reliab., vol. 5, no. 3, pp. 532–542, Sep. 2005. [18] P. Leroux and M. Steyaert, “High-performance 5.2 GHz LNA with on-chip inductor to provide ESD protection,” Electron. Lett., vol. 37, no. 7, pp. 467–469, Mar. 2001. [19] S. Hyvonen, S. Joshi, and E. Rosenbaum, “Cancellation technique to provide ESD protection for multi-GHz RF inputs,” Electron. Lett., vol. 39, no. 3, pp. 284–286, Feb. 2003. [20] M.-D. Ker and S.-H. Chen, “Implementation of initial-on ESD protection concept with PMOS-triggered SCR devices in deep-submicron CMOS technology,” IEEE J. Solid-State Circuits, vol. 42, no. 5, pp. 1158–1168, May 2007. [21] H. Yen, T. Yeh, and S. Liu, “A physical de-embedding method for silicon-based device applications,” PIERS Online, vol. 5, no. 4, pp. 301–305, 2009. [22] S. Voldman, R. Ashton, J. Barth, D. Bennett, J. Bernier, M. Chaine, J. Daughton, E. Grund, M. Farris, H. Gieser, L. Henry, M. Hopkins, H. Hyatt, M. Natarajan, P. Juliano, T. Maloney, B. McCaffrey, L. Ting, and E. Worley, “Standardization of the transmission line pulse (TLP) methodology for electrostatic discharge (ESD),” in Proc. EOS/ESD Symp., 2003, pp. 372–381. [23] C. Chu, A. Gallerano, J. Watt, T. Hoang, T. Tran, D. Chan, W. Wong, J. Barth, and M. Johnson, “Using VFTLP data to design for CDM robustness,” in Proc. EOS/ESD Symp., 2009, pp. 286–291.

Chun-Yu Lin (S’06–M’09) was born in Taiwan in 1984. He received the B.S. degree from the Department of Electronics Engineering and the Ph.D. degree from the Institute of Electronics, National Chiao-Tung University, Hsinchu, Taiwan, in 2006 and 2009, respectively. Since 2009, he has been a Postdoctoral Researcher of the National Chiao-Tung University. His current research interests include ESD protection designs and biomimetic circuit designs. Since 2010, he has also served as the Secretary-General of Taiwan ESD Association.

LIN et al.: ESD PROTECTION DESIGN FOR 60-GHz LNA WITH INDUCTOR-TRIGGERED SCR IN 65-nm CMOS PROCESS

Li-Wei Chu (S’10) received the B.S. degree from the Department of Electrical Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan, in 2006, and the M.S. degree from the Institute of ElectroOptical Engineering, National Chiao-Tung University, Hsinchu, Taiwan, in 2008. Since August 2008, he has been working toward the Ph.D. degree at the Department of Photonics and Display Institute, National Chiao-Tung University. His current research interests include the peripheral circuits integrated on panel for flat panel display applications and the design of 60-GHz ESD protection circuits in CMOS process.

Ming-Dou Ker (S’92–M’94–SM’97–F’08) received the Ph.D. degree from the Institute of Electronics, National Chiao-Tung University, Hsinchu, Taiwan, in 1993. He worked as the Department Manager with the VLSI Design Division, Computer and Communication Research Laboratories, Industrial Technology Research Institute (ITRI), Hsinchu, Taiwan. Since 2004, he has been a Full Professor with the Department of Electronics Engineering, National Chiao-Tung University. During 2008–2011, he

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was rotated to be Chair Professor and Vice President of I-Shou University, Kaohsiung, Taiwan. Now, he has been the Distinguished Professor in the Department of Electronics Engineering, National Chiao-Tung University. He served as the Executive Director of National Science and Technology Program on System-on-Chip (NSoC) in Taiwan during 2010–2011; and currently as the Executive Director of National Science and Technology Program on Nano Technology (NPNT) in Taiwan (2011–2014). In the technical field of reliability and quality design for microelectronic circuits and systems, he has published over 450 technical papers in international journals and conferences. He has proposed many solutions to improve the reliability and quality of integrated circuits, which have been granted with 188 U.S. patents and 163 Taiwan patents. He had been invited to teach and/or to consult the reliability and quality design for integrated circuits by hundreds of design houses and semiconductor companies in the worldwide IC industry. His current research interests include reliability and quality design for nanoelectronics and gigascale systems, high-speed and mixed-voltage I/O interface circuits, on-glass circuits for system-on-panel applications, and biomimetic circuits and systems for intelligent prosthesis. Prof. Ker has served as a member of the Technical Program Committee and the Session Chair of numerous international conferences for many years. He ever served as the Associate Editor for the IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION SYSTEMS, 2006–2007. He was selected as the Distinguished Lecturer in the IEEE Circuits and Systems Society (2006–2007) and in the IEEE Electron Devices Society (2008–present). He was the President of Foundation in Taiwan ESD Association. In 2009, he was awarded as one of the top ten Distinguished Inventors in Taiwan.

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Power Amplification at 0.65 THz Using InP HEMTs Vesna Radisic, Senior Member, IEEE, Kevin M. K. H. Leong, Member, IEEE, Xiaobing Mei, Member, IEEE, Stephen Sarkozy, Member, IEEE, Wayne Yoshida, and William R. Deal, Senior Member, IEEE

Abstract—In this paper, progress toward developing solid-state power-amplifier modules at 0.65 THz is reported. This work is enInP HEMT transistor with a 30-nm gate abled by a 1 THz and an integrated circuit process specifically tailored for circuits operating at frequencies approaching 1 THz. The building block of the reported amplifier modules is an eight-stage terahertz monolithic integrated circuit (TMIC) amplifier. The first six stages of the TMIC use 20- m transistors, while the final two output stages rely on two power-combined 20- m transistors to increase the output power. For operation at 0.65 THz, the TMIC also relies on integrated electromagnetic transitions for direct coupling with the WR1.5 waveguide of the amplifier package. Two modules are reported, with the first module containing a single TMIC and demonstrating a peak saturated output power of 1.7 mW at 640 GHz with a measured small-signal gain 10 dB from 629 to 638 GHz. The second module features two power-combined TMICs to increase output power. This is done using a waveguide Y-junction as both the combiner and splitter. In test, this power-combined module reached a peak output power of 3 mW at 650 GHz and measured small-signal gain 10 dB from 625 to 640 GHz. Index Terms—HEMT, millimeter wave, power amplifier, solid-state power amplifier (SSPA), sub-millimeter wave, terahertz monolithic integrated circuit (TMIC).

I. INTRODUCTION

O

VER THE past few years, the operating frequency of solid-state amplifiers has pushed well into the sub-millimeter-wave frequency range [1]. Historically, the primary driver for this push has come from the receive side, and it has been driven by the need for high-sensitivity millimeter-wave radiometers and all-weather imaging systems [2]. However, improvements in transistor technologies have pushed signal amplification to as high as 670 GHz [3]. When properly leveraged, this technology advance should have far reaching impact in improving power generation at these frequencies. Traditionally, terahertz sources have used diode based multiplier chains where the signal is successively multiplied from a significantly lower frequency where solid-state power amplification is readily available. The overall chain efficiency is quite low due to the successive multiplications. Therefore, high input drive and dc power is required to achieve output power at the operating frequency. For instance, a 540–640-GHz balanced Manuscript received July 14, 2011; revised October 12, 2011; accepted October 21, 2011. Date of publication December 16, 2011; date of current version March 02, 2012. This work was supported by the Defense Advanced Research Projects Agency (DARPA) under the Terahertz Electronics Program and by the Army Research Laboratory (ARL) under DARPA Contract HR0011-09-C0062. The authors are with Northrop Grumman Aerospace Systems, Redondo Beach, CA 90278 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2176503

tripler chip driven by a doubler and -band amplifier reaches a peak output power of 1.8 mW when driven with an RF drive of 100 mW at -band [4]. Direct power amplification at the output frequency has the potential to significantly improve source efficiency and could therefore fundamentally transform terahertz source architectures. Recently, significant new benchmarks have been made for power amplification in the frequency range of 220–670 GHz [3], [5]–[10]. The first report of power amplification at 670 GHz was using a low-noise amplifier module with demonstrated 0.6-mW output power [3]. Other notable high-frequency benchmarks include a 50-mW module at 220 GHz using eight-way on-chip power combining [6] and a 10-mW module at 338 GHz using four-way on-chip power combining [7], all using indium phosphide (InP) high electron mobility transistor (HEMT). Power amplification has also been demonstrated with InP heterojunction bipolar transistors (HBTs) on-wafer to 325 GHz [8]. Metamorphic HEMTs (mHEMTs) have been used to demonstrate a 300-GHz amplifier module [9] and a 460-GHz sub-millimeter-wave monolithic integrated circuit (S-MMIC) measured on wafer with 16.1-dB gain [10]. Significant challenge in designing power amplifiers at these frequencies is to maintain usable power gain with transistors of adequate periphery to generate a significant amount of output power. In this paper, we report on an eight-stage power-amplifier terahertz monolithic integrated circuit (TMIC) using InP HEMT devices. Two solid-state power-amplifier (SSPA) modules are reported, including a module containing a single TMIC and a two-way power combined module. The single TMIC module achieves a peak saturated output power of 1.7 mW measured at 640 GHz, with the measurement referenced to the waveguide flange. The power combined module achieves a 3-mW peak output power at 650 GHz, with the measurement also referenced to the waveguide flange. II. InP HEMT TECHNOLOGY Due to the extremely high target circuit operating frequency 0.6 THz, a transistor with a usable level of gain at that frequency is necessary. This work relies on an advanced InP HEMT, fabricated with an epitaxial profile featuring a composite InGaAs/InAs channel and a 30-nm electron beam lithography (EBL) gate. The device is passivated with SiN. This process has produced HEMTs with transconductance 2300 mS/mm, maximum channel current 900 mA/mm, maximum available gain (MAG)/maximum stable gain (MSG) of 1.2 THz and values as high as 14.5 dB at 110 GHz, THz. The monolithic-microwave integrated-circuit (MMIC) process employs two metal interconnect layers with a second layer air-bridge, precision thin-film resistors, and metal–insulator–metal (MIM) capacitors. The 3 InP wafers

0018-9480/$26.00 © 2011 IEEE

RADISIC et al.: POWER AMPLIFICATION AT 0.65 THz USING InP HEMTs

Fig. 1. Measured MAG/MSG and of 20- m InP HEMT transistor at a extrapolation with a 20-dB/ drain bias of 1 V and 6 mA. The dashed line is decade roll off.

are thinned to 25 m in order to reduce parasitic substrate mode effects and enable high density of slot vias, which are reactive ion etched with a plated Ti/Au back metal. A 25- m-thick substrate also allows direct integration of an electromagnetic transition to the rectangular waveguide of the split block housing at the target operating frequency. Transistors have been characterized using on-wafer extended reference plane calibration structures from 5 to 110 GHz on thinned wafers. The TMIC uses 20- m-periphery transistors, distributed over four gate fingers, which have been characterized and modeled. Fig. 1 shows the measured MAG or MSG and current gain for a four-finger 20- m-periphery transistor under a drain voltage of 1 V and drain current of 12 mA. Based on calculated Mason’s unilateral gain (U), MAG/MSG, and an extracted equivalent-circuit model, the transistor demonstrates an extrapolated maximum oscillation frequency THz and a cutoff frequency of 0.56 GHz. III. POWER-AMPLIFIER DESIGN Given the high conductor losses and limited transistor gain at the design frequency, the TMIC amplifier uses an eight-stage topology to obtain a usable amount of power gain. This is illustrated in the simplified amplifier schematic shown in Fig. 2. The first six stages utilize a four-finger 20- m-periphery transistor. The 20- m transistor uses four 5- m fingers, which corresponds to 9 electrical length at 650 GHz. Based on our experiences in scaling power amplifiers to both 220 and 340 GHz, this was estimated to be the longest finger width that could be used without compromising available gain at the design frequency. Four-finger transistors have been chosen to maximize transistor periphery in order to increase output power while minimizing phase imbalance between gate fingers. A microphotograph of the fabricated TMIC amplifier after being mounted in the amplifier module is shown in Fig. 3. The total die size measures 655 m 375 m. All matching is done using a coplanar waveguide (CPW), which is implemented in a two-metal process with an air-bridge. The primary advantage of this transmission line configuration at high frequencies

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Fig. 2. Simplified schematic of the eight-stage 640-GHz amplifier. The first six stages feature a single transistor, while the last two stages have two powercombined transistors.

Fig. 3. Microphotograph of 643-GHz TMIC amplifier mounted in the module. Die size is 655 m 375 m.

is low inductance access to ground for bypassing and source grounding. The first six stages use shunt short-circuited stubs for matching, followed by an RC network for out-of-band stability in the bypassing network. The stage-to-stage physical separation between transistors is kept small 25 m by necessity due to short wavelength and the desire to keep matching electrically short to maximize bandwidth and minimize conductor losses. Additionally, small MIM capacitors of 25 fF are used for dc blocking. The final two stages use identical topologies consisting of two power combined 20- m transistors. Shunt 100- resistors were placed between parallel transistors at both input and output combining networks to ensure stability of the two parallel transistors. A reactive CPW network is used for power combining and matching of the two HEMT transistors. The bias for the two parallel transistors is provided through a single pad, but the drain bias layout has been kept symmetric by placing shunt stub and RC network on both sides, as shown in Figs. 2 and 3 so as

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Fig. 5. Microphotograph of 640-GHz power-amplifier module.

Fig. 4. Measured and simulated: (a) module with a thru-line MMIC chip.

and (b)

and

of the single

not to upset the balance of the circuit. The gate bias is provided through a large resistor (500 ) so layout symmetry was not as critical as on the drain. The reported design combines the bias lines for the first six stages and the last two stages to minimize the amount of chip area occupied by dc bond pads, which are large compared to circuit features at the design frequency, as seen in Fig. 3. IV. SINGLE AND POWER-COMBINED MODULE DESIGN The electromagnetic transition to waveguide is placed on chip, and is of similar design to the ones described in [11] and [12]. The chip cannot be made electrically wide near the electromagnetic transition because higher order modes in the waveguide cavity would not be fully cut off. Therefore, the substrate of the MMIC chip has been etched away in the region near to the electromagnetic transition to allow for an electrically narrow chip width in the transition to waveguide area and a wider chip in the region containing circuitry. This transition has been verified using a thru line, as described in [12]. Measured and simulated -parameters of the thru line in a single module are shown in Fig. 4. The simulation was performed using a 3-D full-wave electromagnetic simulator (HFSS). This measurement verifies the dipole transition to waveguide and shows the operating bandwidth from 580 to 700 GHz. Based on measured -parameter data and by de-embedding the thru line loss, we have estimated that loss from 625- to 700-GHz ranges from 1.5 to 2 dB [12].

Fig. 6. Microphotograph of the dual TMIC module.

Fig. 5 shows a photograph of the WR1.5 split block housing, which contains the MMIC power amplifier. The tests described in Section V have been performed on this module with the measurement referenced to the waveguide flange. A two-way power-combined version of the amplifier module has also been developed and is shown in Fig. 6. Power combining and power splitting are both accomplished using a waveguide Y-junction splitter. The Y-junction is designed using a four-section step in a width matching section to achieve broadband matching across the entire WR1.5 waveguide band. Although physically large compared to the MMIC, rectangular waveguide losses are significantly lower per unit length compared to CPW losses. Therefore, waveguide power combining

RADISIC et al.: POWER AMPLIFICATION AT 0.65 THz USING InP HEMTs

Fig. 7. Measured

of the two WR-1.5 2.5-cm waveguide straight sections.

at this frequency should achieve better performance than by increasing the number of power-combined transistors on-chip. Another critical component for designing a two-way powercombined module is the loss of the machined waveguide. Per unit length waveguide loss has been measured using a 2.5-cm-long machined straight waveguide section, and it is shown in Fig. 7 for two waveguide samples. Note that the waveguide was manufactured using the same machining equipment and gold-plating process to make the comparison as valid as possible. Based on this measurement, the waveguide loss has been determined to be 1 dB/cm at 650 GHz. Therefore, in order to minimize all unwanted losses and achieve maximum output power, the dual amplifier module has been designed in such a way as to minimize the waveguide lengths between TMICs and from the power combiner to the output flange. Furthermore, the size of the dc cavity in between the two TMICs has been designed to be as compact as possible to help keep the space between TMICs tight to keep interconnecting waveguide losses down. The two-way power-combining losses have been studied by measuring the -parameter of the module with passive CPW thru lines instead of amplifiers mounted in the module. The resulting measurement is shown in Fig. 8 and shows that wide bandwidth from 600 to 700 GHz has been achieved using the reported structure. When compared to a single-chip module measured with a thru-line TMIC (Fig. 4), the dual-module measurement has 0.6 dB higher loss at 650 GHz. From this comparison, it can be concluded that the Y-junction splitters contribute 0.3 dB of loss. This corresponds well with the simulated loss per splitter from HFSS. V. SINGLE SSPA MODULE RESULTS The -parameters for the WR1.5 amplifier module have been measured using WR-1.5 Virginia Diode Inc. (VDI) frequency extenders with a Rohde & Schwarz ZVA40 vector network analyzer. The system was calibrated with a waveguide thru-reflect-line (TRL) calibration kit to place the measurement reference plane at the waveguide flange. The same setup and calibration was used for straight waveguide sections measurement shown in Fig. 7. Fig. 9 shows measured and modeled -parameters for the single TMIC module at bias of V, mA, V, and mA. The simulation is based on a circuit-level simulation of the TMIC and

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Fig. 8. Measured -parameters of the dual module with thru-line MMIC chips.

Fig. 9. Measured and modeled module.

-parameters of 640-GHz power-amplifier

HFSS simulation of the transition from the integrated circuit to the waveguide flange. The measured module gain is 4.5 dB from 606 to 687 GHz. The peak small-signal gain is 10 dB from 629 to 638 GHz. Note that all of these measurements are taken at room temperature and gain is expected to increase if the module is operated at a cooler temperature. Next, output power was measured using the setup shown in Fig. 10. The input signal from an Agilent synthesizer is unconverted with a 36 multiplier chain produced by VDI. The multiplier chain is comprised of several amplifier- and diodebased multiplier modules to reach the required WR1.5 output frequency. This source also has an adjustment port for varying output power of one of the internal driver amplifiers, which controls the output power from the multiplier chain and therefore the input power to the device-under-test (DUT). The amplifier module output is connected to a VDI’s PM4 calorimeter using a WR-1.5 to WR-10 transition. Fig. 11 shows the power performance versus input power at 643.2 GHz. The module bias before applying the RF signal is V, mA, V, and mA. The measured saturated output power is 1.7 mW and the corresponding bias is V, mA, V, and mA. The output power shown

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Fig. 10. Test setup for WR1.5 output power measurements.

Fig. 12. Measured

-parameters of the dual module.

Fig. 11. Measured power-amplifier module’s output power and power gain at 643.2 GHz.

in Fig. 11 has been adjusted for the WR1.5 to WR10 taper loss of 0.6 dB. We have estimated the loss of the transition to waveguide to 1.7 dB and the loss of the output waveguide piece to 0.7 dB. This means that the estimated MMIC output power, with the reference plane at the transition, is 3 mW, which corresponds to a transistor output power density of 74.5 mW/mm.

VI. POWER-COMBINED MODULE RESULTS The -parameters for the two-way power-combined module have been measured using the same setup described in Section V and are shown in Fig. 12. The top and bottom amplifiers are both biased at V, mA, V, and mA. Note that the two-way power-combined module gain is slightly different than the single module gain. This is attributed to differences in individual amplifier chip performance. Measured module small-signal gain was 5 dB from 610 to 687 GHz and 10 dB from 624.5 to 640 GHz. The output power and gain have been measured for the dual module using the setup in Fig. 10. The only difference is that the multiplier did not provide sufficient drive power for the dual module so a single module was used after the multiplier to drive the dual module. Fig. 13 shows the measured output power and gain at 653.5 GHz for the dual module. Bias without RF drive is V, mA, and mA for both top and bottom amplifiers. Measured saturated output power is 3 mW with corresponding power gain of 4.1 dB. Bias for this output power is V, mA, and mA for both top and bottom amplifiers. This corresponds to 0.7% power-added efficiency (PAE). The power gain at the maximum measured output power for the dual module is higher than for the single module. This is mainly

Fig. 13. Measured output power and power gain at 653.5 GHz of the dual module.

due to differences in performance of the individual die placed in these modules. We expect that a better performing die could be found for the single amplifier module, but most of our effort was on producing the best performing two-way power combined amplifier. VII. CONCLUSION A 0.65-THz eight-stage power amplifier TMIC with on-wafer transition to waveguide has been reported. The design utilizes 30-nm InP HEMT technology. The total periphery of the last stage is 40 m. The module with a single TMIC demonstrates small-signal gain 4.5 dB from 606 to 687 GHz and saturated output power at the waveguide flange of 1.7 mW at 643.2 GHz. The dual TMIC module, in which two TMICs are power combined, demonstrated 3 mW of output power at 653.5 GHz, referenced to waveguide flange. These SSPAs can be integrated with other packaged components, such as mixers, multipliers, and driver amplifiers, for significantly increased system output power, which should enable new transmit and receive systems at terahertz frequencies. ACKNOWLEDGMENT The authors would like to thank Dr. J. Albrecht, Defense Advanced Research Projects Agency (DARPA), Arlington, VA,

RADISIC et al.: POWER AMPLIFICATION AT 0.65 THz USING InP HEMTs

and Dr. A. Hung, Army Research Laboratory (ARL), Adelphi, MD, and members of Northrop Grumman Aerospace Systems, Redondo Beach, CA: B. Gorospe for test, J. Lee and Z. Zhou for fabrication support, M. Lange for MBE material growth, R. Lyons for packaging support, P.-H. Liu for EBL guidance, and A. Oki, R. Lai, and R. Kagiwada for project oversight. The views, opinions, and/or findings contained in this paper/ presentation are those of the author/presenter and should not be interpreted as representing the official views or policies, either expressed or implied, of DARPA or the Department of Defense. Approved for Public Release, Distribution Unlimited. REFERENCES [1] J. D. Albrecht, M. J. Rosker, H. B. Wallace, and T.-H. Chang, “THz electronics projects at DARPA: Transistors, TMICs, and amplifiers,” in IEEE MTT-S Int. Microw. Symp. Dig., May 2010, pp. 1118–1121. [2] P. Siegel, “Terahertz technology,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 3, pp. 910–928, Mar. 2002. [3] W. R. Deal, K. M. K. H. Leong, V. Radisic, S. Sarkozy, B. Gorospe, J. Lee, P. H. Liu, W. Yoshida, J. Zhou, M. Lange, R. Lai, and X. B. Mei, “Low noise amplification at 0.67 THz using 30 nm InP HEMTs,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 7, pp. 368–370, Jul. 2011. [4] A. Maestrini, J. S. Ward, J. J. Gill, H. S. Javadi, E. Schlecht, C. TriponCanseliet, G. Chattopadhyay, and I. Mehdi, “A 540–640 GHz high efficiency four anode frequency tripler,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 9, pp. 2835–2843, Sep. 2005. [5] W. R. Deal, X. B. Mei, V. Radisic, K. Leong, S. Sarkozy, B. Gorospe, J. Lee, P. H. Liu, W. Yoshida, J. Zhou, M. Lange, J. Uyeda, and R. Lai, “Demonstration of a 0.48 THz amplifier module using InP HEMT transistors,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 5, pp. 289–291, May 2010. [6] V. Radisic, K. M. K. H. Leong, X. B. Mei, S. Sarkozy, W. Yoshida, P.-H. Liu, J. Uyeda, R. Lai, and W. R. Deal, “A 50 mW 220 GHz power amplifier module,” in IEEE MTT-S Int. Microw. Symp. Dig., May 2010, pp. 45–48. [7] V. Radisic, W. R. Deal, K. M. K. H. Leong, X. B. Mei, W. Yoshida, P.-H. Liu, J. Uyeda, A. Fung, L. Samoska, T. Gaier, and R. Lai, “A 10 mW submillimeter wave solid state power amplifier module,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 7, pp. 1903–1909, Oct. 2010. [8] J. Hacker, M. Urteaga, D. Mensa, R. Pierson, M. Jones, Z. Griffith, and M. Rodwell, “250 nm InP DHBT monolithic amplifiers with 4.8 dB gain at 324 GHz,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2008, pp. 403–406. [9] A. Tessmann, A. Leuther, V. Hurm, H. Massler, M. Zink, M. Kuri, M. Riessle, R. Losch, M. Schlechtweg, and O. Ambacher, “A 300 GHz mHEMT amplifier module,” in IEEE IRPM Conf. Dig., May 2009, pp. 196–199. [10] A. Tessmann, A. Leuther, R. Loesch, M. Seelmann-Eggbert, and H. Massler, “A metamorphic HEMT S-MMIC amplifier with 16.1 dB gain at 460 GHz,” in IEEE CSIC Conf. Dig., Oct. 2010, pp. 245–248. [11] K. M. K. H. Leong, W. R. Deal, V. Radisic, X. B. Mei, J. Uyeda, L. Samoska, A. Fung, T. Gaier, and R. Lai, “A 340–380 GHz integrated CB-CPW-to-waveguide transition for sub millimeter-wave MMIC packaging,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 6, pp. 413–415, Jun. 2009. [12] W. R. Deal, X. B. Mei, K. Leong, V. Radisic, S. Sarkozy, and R. Lai, “THz monolithic integrated circuits using InP high electron mobility transistors,” IEEE Trans. Terahertz Technol., vol. 1, no. 1, pp. 25–32, Sep. 2011. Vesna Radisic (M’92–SM’04) received the B. S. degree from the University of Belgrade, Belgrade, Serbia, in 1991, the M.S. degree from the University of Colorado at Boulder, in 1993, and the Ph.D. degree from the University of California at Los Angeles (UCLA), in 1998, all in electrical engineering. She is currently a Senior Section Head with the RF Product Center, Northrop Grumman Aerospace Systems, Redondo Beach, CA. She mentors a team of MMIC design engineers, and pursues her own development efforts in millimeter-wave MMIC design. Her research interests include high-frequency circuits, wideband amplifiers, and passive components. Dr. Radisic was the recipient of the 2007 Outstanding Young Engineer Award.

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Kevin M. K. H. Leong (S’99–M’04) received the B.S. degree in electrical engineering from the University of Hawaii at Manoa, in 1999, and the M.S. and Ph.D. degrees in electrical engineering from the University of California at Los Angeles (UCLA), in 2001 and 2004, respectively. From 2004 to 2007, he was a Postdoctoral Researcher with UCLA. He is currently with Northrop Grumman Aerospace Systems, Redondo Beach, CA. Dr. Leong was the recipient of the Microwave Prize of the 2006 Asia–Pacific Microwave Conference.

Xiaobing (Gerry) Mei (M’08) received the B.S. degree in physics from the University of Science and Technology of China, Hefei, China, in 1987, and the Ph.D. degree in electrical engineering from the University of California at San Diego, La Jolla, in 1997. He is currently a Senior Staff Engineer with the Micro Electronics Center, Northrop Grumman Aerospace Systems, Redondo Beach, CA, where he leads advanced InP HEMT technology development. He was previously a Senior Molecular Beam Epitaxy (MBE) Engineer with Hewlett-Packard/Agilent Technologies, and later an Integration Engineer. He was then a Senior Member of Technical Staff with Celeritek, during which time he lead the GaAs pseudomorphic HEMT (pHEMT) development.

Stephen Sarkozy (M’11) received the B.S. degrees in both physics and mathematics from the University of California at Santa Barbara, in 2004, and the Ph.D. degree in natural sciences (semiconductor physics) from the Cavendish Laboratory, University of Cambridge, Cambridge, U.K., in 2008. While working toward the Ph.D. degree he was a Northrop Grumman Space Technology Doctoral Fellow. He is currently with Northrop Grumman Aerospace Systems, Redondo Beach, CA, where he is involved in advanced InP and GaAs HEMT technologies for academic, commercial, and military applications.

Wayne Yoshida received the B.S. degree in chemical engineering from the California Institute of Technology, Pasadena, in 1996, and the Ph.D. degree in chemical engineering from the University of California at Los Angeles (UCLA), in 2003. He is currently a Staff Engineer with Electron Beam Lithography, Northrop Grumman Aerospace Systems, Redondo Beach, CA. His research interests include advanced lithography, surface science, and applications in nanoscale structures.

William R. Deal (M’96–SM’06) received the B.S. eegree in electrical engineering from the University of Virginia, Charlottesville, in 1996, and the M.S. and Ph.D. degrees from the University of California at Los Angeles (UCLA), in 1998 and 2000, respectively. He is currently a Senior Department Staff Engineer with the RF Product Center, Northrop Grumman, Redondo Beach, CA, where he leads several MMIC development efforts, including Northrop Grumman’s contract for the Defense Advanced Research Projects Agency (DARPA) Terahertz Electronics Program, as well as developing his own microwave and millimeter-wave designs. He has authored or coauthored over 75 journal and conference papers, as well as five book chapters. Dr. Deal was the recipient of the 2009 Outstanding Young Engineer Award.

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A 44–46-GHz 16-Element SiGe BiCMOS High-Linearity Transmit/Receive Phased Array Choul-Young Kim, Associate Member, IEEE, Dong-Woo Kang, Associate Member, IEEE, and Gabriel M. Rebeiz, Fellow, IEEE

Abstract—This paper presents a 16-element -band transmit/ receive phased array with high receive linearity and low power consumption. The design is based on the all-RF architecture with passive phase shifters and a 1:16 Wilkinson network. An input from 9 to 10 dBm and a noise figure of 10–11.5 dB at 44–46 GHz is achieved in the receive mode with a power consumption of 0.95 W. In the transmit mode, each channel has an output of 3–2 dBm and of 6–4 dBm at 44–46 GHz with a power consumption of 1.16 W. The design results in a low root mean square (rms) gain error due to a high-resolution variable gain amplifier in each channel. Measurements on multiple channels show near-identical gain and phase response in both the transmit and receive mode due to the use of a symmetrical passive combiner. The measured on-chip coupling is 40 dB and results in insignificant additional rms and phase error. Index Terms—Millimeter-wave integrated circuits, phase shifters, phased arrays, silicon germanium.

I. INTRODUCTION

S

ILICON-BASED phased arrays based on the all-RF architecture have been demonstrated in transmit and receive modes for microwave and millimeter-wave applications with 4–32 elements [1]–[8]. The silicon designs allow the integration of many elements on the same chip, together with the powercombining network and all the necessary digital control electronics. This results in a significant advantage over GaAs- or InP-based phased arrays due to the small space available per unit cell in a phased array, especially at millimeter-wave frequencies The silicon designs also result in nearly identical response between the channels due to the high yield and relatively low transistor count (hundreds to thousands of RF transistors) in these chips. At millimeter-wave frequencies, passive power combiners (or dividers) can be used such as Wilkinson couplers, Manuscript received July 31, 2011; revised December 01, 2011; accepted December 13, 2011. Date of publication February 06, 2012; date of current version March 02, 2012. This work was supported by the Defense Advanced Research Projects Agency (DARPA) under the Scalable Millimeter-Wave Array Technology (SMART) program, under a sub-contract from Teledyne Scientific. C.-Y. Kim was with the Electrical and Computer Engineering Department, University of California at San Diego, La Jolla, CA 92093 USA. He is now with the Department of Electronics Engineering, Chungnam National University, Daejeon 305-764 Korea (e-mail: [email protected]). D.-W. Kang was with the Electrical and Computer Engineering Department, University of California at San Diego, La Jolla, CA 92093 USA. He is now with Samsung Electronics, Suwon 443-742 Korea (e-mail: [email protected]). G. M. Rebeiz is with the Electrical and Computer Engineering Department, University of California at San Diego, La Jolla, CA 92093 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2184130

and these occupy a small chip area and have low loss per stage (0.7–0.8 dB). Silicon millimeter-wave phased array chips have relatively low linearity in the receive mode with a from 16 to 25 dBm and a noise figure (NF) of 7–11 dB [1]–[8]. This is acceptable for several consumer applications, but if the phasedarray requires a system NF of 3 dB, then it must be preceded by a 20-dB gain InP low-noise amplifier (LNA), and this reduces its input to 37 to 45 dBm, which is not acceptable for many defense and satellite applications. A 20-dB gain is required so as to reduce the noise contribution from the silicon chip. For these applications, it is imperative to build relatively high-linearity receive phased-array chips with a of 10 dBm, while maintaining a relatively low NF (10–12 dB) and power consumption. The silicon chip gain in the receive mode can be 0–5 dB per channel since the front-end gain is given primarily by the InP LNA. In the Tx mode, and for highpower phased arrays (25–50 mW per element, 2000–4000 elements), the silicon phased-array chip should have an output power of 0–3 dBm per element so as to be able to drive a millimeter-wave InP medium power amplifier (MPA). This paper expands the work done in [1] and demonstrates a 44–46-GHz transmit/receive 16-element phased array, as shown in Fig. 1, with high linearity in the receive mode, while consuming only 0.9 W. In the transmit mode, the output power per channel is 0–3 dBm at 44–46 GHz with a power consumption of 1.1 W. The chip architecture is similar to [1], but with improved linearity and power consumption using a careful system-level optimization and full electromagnetic (EM) simulations. The application areas are in -band satellite communication systems with a large number of phased-array elements (256–4048). Therefore, the transceiver is not integrated on-chip, and is placed at the sum port of the entire phased array. II. SYSTEM-LEVEL ANALYSIS: TRANSMIT PHASED ARRAY

AND

RECEIVE

A. Linearity The key issue in high-linearity phased arrays is the linearity of the phase shifter. This is because silicon millimeter-wave phase shifters are generally lossy ( 3 dB for active vector modulators, to 14 dB for passive implementations) and an NF of 13–16 dB [2], [5], [10]. In order to achieve a reasonable NF at the input of the silicon chip, the phase shifter must be preceded by an on-chip silicon LNA with a gain of 15–20 dB and an NF of on the silicon chip trans4–5 dB. Therefore, a high input lates to a high power at the output of the silicon LNA, and active

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Fig. 2. Comparison of the different RF phase-shifter topologies.

Fig. 1. Block diagram of the 16-element phased array: Silicon chip (top) and channel topology (bottom).

silicon phase shifters cannot handle a lot of RF power unless a high voltage/current bias is used. Fig. 2 presents a system analysis based on the three most common phase shifters used to-date, which are: A) vector modulators [2]; B) switched-LC networks [10]; and C) reflective-type phase shifters [5], all using the IBM8HP SiGe BiCMOS technology (0.12- m SiGe transistors with of 200 GHz, 0.12- m CMOS transistors with of 110 GHz). The vector modulator phase shifter is based on an in-phase/ quadrature (I/Q) network and two variable gain amplifiers, and therefore it can only achieve high linearity with a high bias current. It results in a gain from 0 to 3 dB, but has a high NF (13–15 dB) and a low dBm for a current consumption of 5 mA. It is a good choice for wideband systems requiring relatively low linearity. Based on simulations, increasing the overall channel linearity to 10 dBm requires that the vector modulator handles at least 3 dBm of power, and this will consume an additional 20 mA of power in the phase shifter itself (the LNA will also require additional current for an output power of 3 dBm). The reflective design is based on the traditional design of a hybrid (90 ) coupler and SiGe varactors to obtain a 0 –90 phase shift (two of them are used to achieve from 0 to 180 phase shift) and a differential phase inverting amplifier to achieve a 0 /180 phase selection. This design cannot handle a lot of power since the varactor self-biases at high RF power and

changes the insertion phase. The phase inverting amplifier also requires a lot of current to handle a high RF power. This design can also have a gain of 0 dB for a current consumption of 4 mA, but with a high NF (15 dB) and a low dBm . It is also a good choice for systems requiring relatively low linearity at low power consumption. Again, increasing the overall channel linearity to 10 dBm requires that the reflective phase shifter handles at least 3 dBm of power and this may not be possible due to the varactors used (the LNA will also require additional current for an output power of 3 dBm). On the other hand, the switched-LC phase shifter is based on CMOS switches and has a of 11–12 dBm, a third-order intermodulation intercept point (IIP3) of 25–27 dBm (typical of CMOS switches [11]), and permits high linearity at zero power consumption. The phase shifter loss is 14 dB at 45 GHz with an NF of 14 dB. The high power handling of the switched-LC phase shifter allows the use of a high-gain high-linearity LNA so as to achieve a high system linearity. The phase shifter must also be followed by another amplifier so as to achieve a channel gain of 14 dB. To our knowledge, this is a competitive topology, which allows for a high-linearity receive phased-array channel and with relatively low power consumption. B. Optimization of Gain/Phased Shifter Blocks The amplifier/phase shifter gain blocks are then optimized in order to achieve a 16-element high-linearity phased array with the lowest amount of dc power (Fig. 3). A passive 1:16 Wilkinson combiner/divider is employed since it allows for high-level power combining with no dc power consumption. Two key questions are: Should a single phase shifter be used in the Tx and Rx mode or two different phase shifters, one for Tx and one for Rx? And where should the gain blocks be placed? The choice of two phase shifters results in the omission of two single-pole double-throw (SPDT) switches and is preferable for all designs because the SPDT switches have a simulated loss of 2.7 dB each (5.4 dB for a pair) and a detrimental effect on the system. Also, amplifiers inside the 1:16 combiner necessitate two SPDT switches (for the Tx and Rx operation) and must have high linearity amplifiers so as to handle the summed RF power

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added amplifier gain in each phased-array element (Rx case), or using 5 dB more input power (Tx case). It is clear from Fig. 3 that topologies A–C all result in competitive designs in terms of power consumption, but topology A is chosen since it has the lowest NF and a passive combiner. C. Single Ended Versus Differential Circuits Both single-ended and differential phased arrays have been demonstrated at millimeter-wave frequencies [1]–[8]. The single-ended design results in slightly lower NF, reduced power consumption and less wafer area, while the differential design is not affected by ground and supply inductance and is more robust when packaged using bond-wires. In this study, the 16-element phased array will be packaged using polyimide redistribution layers spun on top of the silicon chip [9]. This results in a very low ground inductance, and therefore, a single-ended design is chosen for this study. D. System-Level Linearity A 16-element silicon phased array with an input of 10 dB and a 0-dB gain results in an output of 2 dBm with no combining loss and is a high drive for a receive mixer. For the case of a 1024-element array (adding 64 of these chips together), the output from the phased array could be as high as 20 dBm with no combining losses. One line of thought is that the linearity will be limited by the receive mixer, and therefore, the effective input is much lower than 10 dBm per channel. This is incorrect since, in a real system, the interferers are not spatially located in the main beam direction, but in a wide range of angles, and the phased-array pattern results in coherent cancellation of the interferers at the sum point (from 17 to 26 dB, depending on the sidelobe levels). A standard mixer can also be used in the receiver. There are therefore two definitions of linearity in large phased-arrays: main beam linearity, which is limited by the receiver and can be quite low due to the array factor gain and finite mixer linearity, and wide-angle (interferer) linearity, which is generally limited by the phased-array channel linearity. The wide-angle linearity (i.e., channel linearity) is the important metric in large phased-array systems since the required signal is very low especially in satellite communications. III. DESIGN A. Receive Chain

Fig. 3. Comparison of different channel and combiner architectures in the 16-element phased array. The phase shifter loss is 14 dB.

from the different phased-array channels or to handle the drive power for many channels in case of a Tx signal, and are therefore not preferable. A 1:16 Wilkinson combiner has a simulated loss of only 4.5 dB at 44–46 GHz and this can be mitigated with

The IBM 8HP has a versatile RF metal stack that allows , for low-loss coplanar waveguide (CPW) lines ( gap/signal/gap of 11/12/11 m, , dB/mm at 44 GHz), variable ground plane heights (MQ or M1 are used), high100 metal–insulator–metal (MIM) capacitors and low5 nMOS capacitors (Fig. 4). The design is based on topology A in Fig. 3, and a detail of the power levels for high linearity are shown in Fig. 5(a). In both the transmit and receive paths, an interstage and systemlevel impedance of 50 is used. This is due to two reasons, which are: 1) the relatively high power levels in the phased-

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Fig. 4. IBM8HP metal stack-up.

array channel necessitate large transistors and high bias currents, and this is more congruent with a low impedance system and 2) the Wilkinson coupling network requires a 70- quarterwave line (in a 50- system), which is doable in the IBM8HP technology. A 0.12- m CMOS SPDT series-shunt switch is first used in the Tx/Rx phased array [see Fig. 5(a)] [1]. The switch shows a simulated insertion loss of 2.7 dB, an isolation of 35 dB, and an input of 11 dBm. The switches use standard CMOS transistors and the CMOS device size is optimized using Cadence to result in the lowest insertion loss and high isolation with reasonable inductor values. The SiGe LNA is based on a two-stage cascode design with emitter inductor degeneration for low noise [see Fig. 5(b)]. A large bias current is used to result in an input of 12 dBm and an output of dBm Gain dB . The biasing conditions are at the minimum NF point (0.4 mA m) in order to result in the lowest overall NF. The second stage also acts as a variable gain amplifier (VGA) using current steering with a 3-bit control. However, a gain control of only 6 dB is used so as not to affect the LNA linearity ( dBm at Gain dB). The inductive loads have a shunt resistor (70–200 ) in order to widen the frequency response. All biasing is done using standard current mirrors attached to be transistor base nodes using 3–5-k resistors. The simulated gain and NF are 14.5 and 4.3 dB at 44 GHz, respectively, with a 3-dB bandwidth of 15 GHz at the maximum gain setting. The NF increases to 5.3 and 6.3 dB when the gain is reduced to 11.5 and 8.5 dB, respectively, at 44 GHz. The input and output impedance match are 10 dB at 36–100 GHz. The cascode amplifier is stable with dB and at 42–50 GHz and consumes 16 mA from a 1.8-V supply. In this design and for modeling, the entire stack was placed in Sonnet [12] and accurate EM analysis was done on the SPDT, amplifiers, and phase-shifter blocks. Fig. 6 presents the Sonnet model used for the SPDT and LNA with input and output 50ports in the AM/MQ layers. The transistors are removed from the simulation with the base, collector, and emitter nodes treated as internal Sonnet ports, and the entire EM model is then ported into Cadence and used with the IBM transistor models. The IBM MIM capacitors (46–92 fF) are also modeled and the 46 fF is composed of two 92 fF in series. The 150–230-pH inductors result in a of 16–20 at 44 GHz, and the EM coupling between the inductors and all structures are automatically taken into account. The full EM method is time consuming in the design stage (2 h for LNA simulations from 1 to 100 GHz using a modern desktop), but as seen in Section IV, it results in good agreement between simulations and measurements.

Fig. 5. (a) System-level block diagram with nominal power levels, and schematics of the: (b) SPDT, (c) LNA, (d) Rx Amp, Tx Amp, and (e) MPA, designed for 44–46-GHz operation.

The phase shifter is based on switched LC-networks and is a scaled version of an earlier design [1] (Fig. 7). The transistor

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Fig. 6. EM simulation environment and microphotographs of the LNA and SPDT switch.

sizes and LC values are chosen to match each cell to 50 in the bypass and phase-delay state. Again, EM simulations are used to ensure that any coupling between and is taken into account (mutual coupling, at 44–46 GHz) and the MIM capacitors are modeled and connected in series for smaller value with EM simulation. Standard IBM models are used for the CMOS transistors. As seen in Fig. 8, the 22 and 45 phase shifter cells have an amplitude variation of 0.5–1 dB at 44–46 GHz between the bypass and phase-delay state. The 4-bit phase shifter is a concatenation of the different bits, as shown in Fig. 9, and the phase shifter bit placement was chosen using Cadence to achieve the lowest gain variation versus phase state and an rms phase error 10 at 44–46 GHz. The ( ) setting with the T1 transistors turned-on results in the 0 phase state and shows the highest loss (14.4 dB) since the CMOS transistors are in series with the RF transmission line, while the lowest loss (12.6 dB) occurs in the 335 phase state when the T2 transistors are turned-on ( state). The simulated phase-shifter gain variation is 0.9 dB at 44 GHz over the 16 states, and is lower than what was achieved using a millimeter-wave vector modulator [2] (Fig. 9). The VGA can be used to equalize the gain versus phase state if needed. The simulated phase shifter and IIP3 are 10 and 26 dBm, respectively, at 44–46 GHz, and therefore do not limit the system linearity. The CMOS transistors are biased using 20-k resistors at the gate nodes, which sets the switching time to 0.5 ns [11], [13]. An amplifier (Rx Amp) with 14.5-dB gain is placed after the phase shifter to compensate for the SPDT (2.7 dB) and the phase-shifter loss. It also provides enough gain to overcome the 1:16 Wilkinson combiner network loss (4.5 dB at 44–46 GHz). This amplifier must also have a high linearity, and is designed

Fig. 7. (a) Schematics and (b) EM simulation environment of the switched LC phase shifters.

Fig. 8. Simulated insertion loss and phase of the switched LC phase shifters versus frequency.

with an output of 4.3 dBm (17 mA, 1.8 V). The design is similar to the LNA, but without any gain control. The total gain of the receive chain is simulated to be 10–9 dB at 44–46 GHz (not including the 4.5-dB Wilkinson loss), an NF of 9.5–10.5 dB, a of 10 dBm, respectively, and with a power consumption of 59 mW per channel (33 mA, 1.8 V). B. Transmit Chain The transmit chain employs an amplifier (Tx Amp), a phase shifter, and an MPA, together with two SPDT switches. The input power to the 16-element array is 7 dBm at 44 GHz, resulting in a power of 12.2 dBm at the input of the Tx amplifier (12-dB Wilkinson division, 4.5-dB Wilkinson loss, 2.7-dB SPDT loss). The Tx amplifier is a two-stage cascode with a gain

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Fig. 10. (a) Photograph of a single Wilkinson combiner with connecting 50transmission line. (b) Simulated -parameters of the 1:16 Wilkinson combiner.

Fig. 9. Schematic, microphotograph, and simulated gain of the 4-bit phase shifter at 44 GHz.

of 14 dB and an output power of 1.8 dBm and does not use any emitter inductors (Fig. 5). A 5-dB gain control is built into the Tx amplifier using 3-bit current steering. After passing by the phase shifter with 12.6–14.4-dB loss (same design as above), the signal is then amplified using a two-stage cascode amplifier (MPA) with a gain of 20 dB and an output of 7.4 dBm at 44 GHz. Again, no inductors are used in the emitters for increased gain, and a gain control of 5 dB is also included in the MPA (Fig. 5). The MPA is biased using current mirrors in a standard class A configuration with a simulated power-added efficiency (PAE) of 10% at 44 GHz. It is stable with dB, at 42–50 GHz, and consumes 24 mA from a 1.8-V supply. The Tx signal passes by the SPDT switch and the output power is 4 dBm per channel. EM analysis is done on the transmit chain amplifiers (not shown for brevity) and the transistor sizes and inductor values are optimized for best performance using several iterations between Sonnet and Cadence. The simulated transmit channel gain is 15 dB at 44–46 GHz (not including the 4.5-dB Wilkinson loss), with an output of 4.7 dBm, and a power consumption of 70 mW per channel (39 mA, 1.8 V). C. EM Simulation of the Phased-Array Transmit-Receive Chain Due to the size of the circuits and the seven metal layers, it is virtually impossible to electromagnetically model the entire transmit or receive chain all together. Sonnet simulations done up to 100 GHz on an equivalent ground-plane section for a

Fig. 11. EM simulation environment for the GSG transition. Note the ground plane MQ is placed 28 m from the edge of the 80 70 m pad.

single-channel indicate the presence of a finite, but small, inductance due to the ground current return (using -parameters), and an approximate value of 7 pH is taken (4 pH for the amplifiers close the ground–signal–ground (GSG) pad, and 10 pH for the amplifiers far from the GSG pad). This introduces an additional series impedance ( at 44 GHz), which is present at the emitter grounds in Fig. 5. A pH inductance is hard to model accurately, and therefore, the Sonnet simulation is taken as an estimate. D. 1:16 Wilkinson Network A 1:16 Wilkinson network is used for power combining and distribution [14]. The Wilkinson couplers are built using 70transmission lines (gap/signal/gap of 11/6/11 m) with a loss of 0.55 dB/mm at 44 GHz, and the simulated single-stage Wilkinson loss is 0.7 dB at 44 GHz [see Fig. 10(a)]. The connecting 50- transmission lines have a simulated loss of 0.45 dB/mm at 44 GHz. The entire 1:16 Wilkinson network is simulated in Sonnet and results in a total loss of 4.5 dB at 44 GHz (4 0.7 dB 1.7 dB connecting lines), a wideband impedance match, and an isolation 22 dB at 42–50 GHz [see Fig. 10(b)]. The 1:16 Wilkinson network has no effect on the phased-array performance, except for the additional loss. E. GSG Pad Design Fig. 11 presents the optimized 150- m-pitch GSG pad layout for the phased-array chip. The GSG transition is simulated using Sonnet and the taper and ground plane (MQ) location is chosen to result in a wideband impedance match at 40–50 GHz. The

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Fig. 12. Microphotographs of the: (a) single-element (1.8

transition results in 44–46 GHz.

dB and

0.9 mm ) and (b) 16-element phased-array transmit/receive chip (4.9

dB at

F. Digital Control Section The control logic in the array decoder is designed with 0.12- m CMOS and is controlled using a 1.5-V supply. The output from a 4:16 address decoder loads a 10-bit parallel data stream 4 bits for phase, 6 bits for gain (three per amplifier block) into a register when the enable signal is set to high. There are two registers per channel selected by the transmit/receive control voltage: one for transmit and one for receive, thus allowing the array to transmit in one direction and receive in

5.1 mm ).

another direction if needed. The 10-bit registers (32 of them) are composed of level-triggered D-flip-flops with a delay of 20 ns. The transmit/receive control voltage also selects the SPDT polarity and disconnects the biasing current mirrors in either the Tx (when Rx is selected) or Rx (when transmit is selected). Metals M2 and M3 are used for the digital signal distribution with M1 as ground plane so as not to couple the digital transients to the silicon wafer. The longest transmission line length is 5 mm and the estimated RC delay of the interconnection lines is 110 ps. The main delay is set by the D-flip-flops and is 20 ns with a maximum control frequency of 50 MHz.

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Fig. 14. Measured and simulated NF for the single-element chip.

Fig. 13. Measured and simulated receive and transmit gain for the single element chip for 16 different phase states. The solid blue line (in online version) is the average gain over 16 phase states.

G. Other Single-ended designs require excellent decoupling of the bias lines. Therefore, each amplifier block uses 3 pF of bias decoupling capacitors ( at 44 GHz) composed of an array of 100–200-fF MIM capacitors with a series-resonant frequency 50 GHz, and n-CMOS capacitors with low5 for added stability. The total de-coupling capacitor value between and ground is 40 pF for each transmit/receive channel. Additional bias supply de-coupling capacitors are placed all around the Wilkinson couplers and close to the pins. Via walls are used between the channels from the top AM metal to the substrate to reduce any coupling between the channels. The IBM 8HP process also offers 5–10- m-deep trenches in the silicon substrate, and these are used between the different channels for breaking the RF currents in the substrate and for added isolation. To our knowledge, careful studies have not yet been done to establish if the via-walls or the deep trench help the isolation between the channels, but they are “free,” do not take additional space, and are used throughout the chip. All low-current bias and digital control lines are routed under the MQ ground plane using M1–M4 and have no effect on the RF performance. The NF and output power are degraded by the SPDT loss of 2.7 dB. In hindsight, and due to the relatively narrowband design of 42–50 GHz, a series-resonant switch design could be used with a loss of 1.5 dB [11]. A power amplifier (PA)-LNA circuit with no switches may also be an excellent choice for this application [15]. Both of these could result in better gain and NF than the conservative series-shunt SPDT design.

Fig. 15. Measured and simulated input and IP3 (Rx mode) and , and OIP3 (transmit mode) for the single-element chip. These values are 0.5 dB for all 16 phase states. within

H. Final Chips Both a single- and 16-element phased array were fabricated (Fig. 12). The single-element chip is 1.8 0.9 mm . The 16-element array is 4.9 5.1 mm and consumes 640 mA (Tx) and 530 mA (Rx) from a V supply, and virtually no current from the 1.5-V CMOS supply (in hindsight, 1.2 V would have been better for the long-term reliability in 0.12- m CMOS, but the chip operated well at 1.5 V). Several supply voltage nodes are used to result in a low voltage drop across the chip and to allow for a multitude of off-chip capacitors for added stability at RF/microwave frequencies. The current references can also be individually controlled using an external bias voltage, but they are generally tied to a 1.5-V analog supply. The 16-element chip has 656 inductors, 608 SiGe transistors, and 4632 CMOS transistors. There is no electrostatic discharge (ESD) protection on the RF pads. IV. MEASUREMENTS A. Single-Element Phased-Array Chip The single-channel transmit/receive chip was measured on-chip using a vector signal network analyzer (Agilent, PNA-E8364B) after a standard short-open-load-thru (SOLT)

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Fig. 16. Photograph of the 16-element phased array mounted on a Teflon board with bias de-coupling capacitors. The chip is still probed using 150- m-pitch GSG probes. Inputs are East and West, Output is center South, and Bias is North and South.

Fig. 18. Measured and simulated receive and transmit gain for a single channel in the 16-element array for 16 different phase states. The solid blue line (in online version) is the average gain over 16 phase states.

intercept point (IP3) are from 10 to 9 dBm and from 1.5 to 0 dBm at 44–46 GHz, respectively, which is the highest achieved in a receive millimeter-wave phased array (Fig. 15). In the transmit mode, the measured output and and output third-order intercept point (OIP3) are 3–1.5, 5.5–4.5, 10–9 dBm at 44–46 GHz, respectively (Fig. 15). These values were maintained across all phase states showing that the phase shifter does not limit the linearity or output power of the phased-array channel. Additional measurements that apply to both the single- and 16-element phased array are presented in Section V. Fig. 17. Measured and simulated input and output reflection coefficients in the receive and transmit modes for 16 different phase states.

calibration to the GSG probe tips. The measurements are done without any trimming. The chip consumes 36 mA (Rx) and 42 mA (Tx) from a 1.8-V supply, which is similar to simulations. The measured Tx and Rx gain agrees well with simulations and are bounded by pH and pH (added inductance on the emitter nodes) (Fig. 13). The transmit chain is affected more than the receive chain by the value since emitter degeneration was not used in the MPA and the Tx Amp. The measured average Tx and Rx gains over the 16 phase states are 11.2–11.4 and 8.0–6.5 dB at 44–46 GHz, respectively, both with an root mean square (rms) gain error of 0.7 dB. The measured reverse isolation, , is 50 dB for both Tx and Rx modes and is not shown. Phase measurements will be presented in Section V. In the receive mode, the measured NF is 10–11.5 dB at 44–46 GHz (Fig. 14). The measured input and third-order

B. 16-Element Phased-Array Chip The 16-element array was first assembled on a Teflon board with off-chip bias de-coupling capacitors (110 pF each) placed very close to the chip on the 1.8-V and 1.5-V reference current pads (Fig. 16). The supply pins, located at the four chip corners, are all connected to , which results in an insignificant voltage drop to the center channels. Additional 10–100-nF capacitors are also placed far away from the chip, together with commercial ESD protection diodes for the digital control lines. The chip consumes 530 mA (Rx) and 680 mA (Tx) from the 1.8-V supply, which is close to simulations. The phased-array chip is measured using GSG probes, and the -parameters are obtained after a standard SOLT probe-tip calibration. A single channel is measured at a time with all other channels left open circuited. This results in 12 dB of additional loss in the Wilkinson combiner since the isolation resistors in the Wilkinson stages absorb 3 dB of the power per stage. Therefore, 12 dB are numerically added to the measured gain for accurate comparison to simulations.

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Fig. 20. (a) Measured VGA gain control and insertion phase at 46 GHz. (b) Measured channel gain versus 16 phase states with VGA control. The solid blue line (in online version) is the average gain over 16 phase states.

Fig. 19. (a) Measured insertion phase for a single channel in the 16-element array: shown are linear phase response, and phase difference with 0 state as a reference. (b) Measured phase for four different channels in the transmit and receive modes. (c) Measured and simulated normalized phase shifter gain in the transmit and receive modes at 46 GHz.

Fig. 17 presents the measured reflection coefficients in the Tx and Rx modes and with good agreement with simulations at the common port (Port 17). The channel port shows a measured dB in both the Tx and Rx modes. The gain of a single channel in the 16-element array is shown in Fig. 18,

and it is 5.2–5.3 dB lower than an equivalent channel on the single-element phased-array chip in both the Tx and Rx modes, which is due to the ohmic loss of the 1:16 Wilkinson network (simulation is 4.5 dB at 44 GHz, measurement is 5.2 dB). The measured average Tx and Rx gains over 16 phase states are 5.8 and 2.8–1.3 dB at 44–46 GHz, respectively. The measured rms gain error in the Tx path is 0.5 dB at 44–46 GHz. The measured phase in the Tx mode is shown in Fig. 19 and the lowest rms phase error shifted from the design frequency of 44–50 GHz. We believe that this is due to the CMOS model, which is not accurate enough for high- switched resonant-LC circuits. The CMOS switch in the LC phase shifter is either turned off, resulting in a high- LC-network with no resistors, or turned on with a low Ron and also resulting in another highLC network. The Tx and Rx phase shifters result in virtually identical performance over all states, as shown in Fig. 19. In this case, four channels are shown each for Tx and Rx settings of 22 , 45 , 90 , and 180 states. The four channels have essentially the same phase response since they all pass by a symmetrical 1:16 Wilkinson network. The measured gain variation due to the phase shifter is 2.7–3.5 dB at 46 GHz (simulation is 1.8–2.0 dB) [see Fig. 19(c)]. The comparison is done at 46 GHz since the measured optimal phase shifter response shifted to 48–50 GHz. The 16-element phased array results in a large output in the receive mode. For an input of 10 dBm and a small-signal gain of 2.8 dB at 44 GHz, the output power at the sum port for a single channel is 7.2 dBm at port 17, and is 4.8 dBm when all 16 channels are adding in phase. Therefore, it is essential that

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Fig. 23. Measured rms gain and phase error present in channel 1 when the phase of channel 2 (and other channels) is changed from 0 to 335 . The effect of channel 2 is negligible.

Fig. 21. Measured gain in the: (a) receive and (b) transmit modes for four different channels. Near identical results are achieved due to the symmetrical 1:16 Wilkinson combiner.

Fig. 24. Measured average gain and rms errors versus temperature for a single channel in the 16-element array. The average gain is obtained by averaging the gain over the 16 phase states.

Fig. 22. Measured isolation between different channels in the receive and transmit modes for the 16-element array. Only the neighboring channel has a measurable value.

a passive Wilkinson network is used as the summing network for low power operation. The VGAs can be controlled over a 5.4-dB range with only 3 phase variation, which is necessary for obtaining a low rms gain error without introducing any additional phase error [see Fig. 20(a)]. Fig. 20(b) presents the results of VGA employed in the Tx path to reduce the rms gain error from 0.7 dB

to 0.3 dB at 45–46 GHz. This is important for low-sidelobe phased arrays. Fig. 21 presents the Tx and Rx gain versus frequency for four different channels in the array at various phase settings, and with near identical response. We have also measured the entire array and found similar results. In general, the error is limited by drift and calibration and not by the silicon chip, and shows that silicon-based phased arrays require minimal calibration on a channel-to-channel basis. Isolation measurements were done in two different ways; First, and ( is the channel number, – ) were measured in the Tx and Rx modes with all other channels left

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open circuited, and show 40 dB coupling (Fig. 22). Second, the amplitude and phase of channel 1 was measured at a fixed phase state, while the phase of channel 2 (and other channels) was changed from 0 to 335 , as shown in Fig. 23. In all cases, the resulting rms gain and phase error in channel 1 is 0.06 dB and 0.6 at 42–50 GHz. Both values are truly negligible and show very low on-chip coupling. Finally, the -parameters were measured over temperature and a gain drop of 7–8 dB is seen from 25 C–100 C, as shown in Fig. 24. In this case, a PTAT was not used, and in the future, optimized biasing circuits could alleviate some of the gain drop [16]. On the other hand, the rms gain and phase error remain essential constant over temperature, as expected from switchedLC phase shifters [1]. Table I compares the performance of this array with published work. It is seen that this work results in higher receive linearity than any other millimeter-wave phased array. The same design can also be built without the two SPDT switches, each with 2.7-dB insertion loss, resulting in either a standalone Tx or a Rx array with state-of-the-art NF, linearity, and output power for low dc power consumption. V. CONCLUSION This paper has presented a 16-element high-linearity 44–46-GHz silicon BiCMOS phased array with 4-bit phase control. A single-ended topology was employed with a passive phase shifter and a perfectly symmetrical 1:16 Wilkinson

combiner network. Full EM modeling was done to predict the array performance, and the measurements agree well with simulations. It was found that, due to the single-ended design, the simulated ground inductance can have an effect on the transmit channel due to the absence of any emitter degeneration (in the Tx path). An expected, but still surprising, finding is the near-perfect on-chip gain and phase uniformity between the channels in the Tx and Rx modes. This means that silicon-based arrays may allow for a single calibration per chip, which will lower the cost of chip-level testing. ACKNOWLEDGMENT The authors thank Dr. J. Hacker and C. Hillman, both with Teledyne Scientific, Thousand Oaks, CA, for technical support and discussions. Author C.-Y. Kim thanks S. Y. Kim, University of California at San Diego (UCSD), La Jolla, for his help in the preparation of this paper’s manuscript. REFERENCES [1] D. W. Kang, J. G. Kim, B. Min, and G. M. Rebeiz, “Single and four-ele-band transmit/receive phased-array silicon RFICs with 5-bit ment amplitude and phase control,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 12, pp. 3534–3543, Dec. 2009. [2] K. Koh, J. W. May, and G. M. Rebeiz, “A millimeter-wave (40–45 GHz) 16-element phased-array transmitter in 0.18- m SiGe BiCMOS technology,” IEEE J. Solid-State Circuits, vol. 44, no. 5, pp. 1498–1509, May 2009. [3] K. Kim, K. Ahn, T. Lim, H. Park, and J. Yu, “A 60 GHz wideband phased-array LNA with short-stub passive vector generator,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 11, pp. 628–630, Nov. 2010.

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[4] E. Cohen, C. Jakobson, S. Ravid, and D. Ritter, “A thirty two element phased-array transceiver at 60 GHz with RF-IF conversion block in 90 nm flip chip CMOS process,” in IEEE Radio Freq. Integr. Circuits Symp., May 2010, pp. 457–460. [5] A. Valdes-Garcia, S. T. Nicolson, J. Lai, A. Natarajan, P. Chen, S. K. Reynolds, J. C. Zhan, D. Kam, D. Liu, and B. Floyd, “A fully integrated 16-element phased-array transmitter in SiGe BiCMOS for 60-GHz communications,” IEEE J. Solid-State Circuits, vol. 45, no. 12, pp. 2757–2773, Dec. 2010. [6] S. K. Reynolds, A. S. Natarajan, M. Tsai, S. Nicolson, J. C. Zhan, L. Duixian, D. G. Kam, O. Huang, A. Valdes-Garcia, and B. A. Floyd, “A 16-element phased-array receiver IC for 60-GHz communications in SiGe BiCMOS,” in IEEE Radio Freq. Integr. Circuits Symp., May 2010, pp. 461–464. [7] Y. Yu, P. G. M. Baltus, A. Graauw, E. Heijden, C. S. Vaucher, and A. H. M. Roermund, “A 60 GHz phase shifter integrated with LNA and PA in 65 nm CMOS for phased array systems,” IEEE J. Solid-State Circuits, vol. 45, no. 9, pp. 1697–1709, Sep. 2010. [8] T. Yu and G. M. Rebeiz, “A 4-channel 24–27 GHz CMOS differential phased-array receiver,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 455–458. [9] A. Fischer, Z. Tong, A. Hamidipour, L. Maurer, and A. Stelzer, “A 77-GHz antenna in package,” in IEEE Eur. Microw. Conf., Oct. 2011, pp. 1316–1319. -band [10] B. Min and G. M. Rebeiz, “Single-ended and differential BiCMOS phased array front-ends,” IEEE J. Solid-State Circuits, vol. 43, no. 10, pp. 2239–2250, Oct. 2008. -band low loss and high isolation [11] B. Min and G. M. Rebeiz, “ switches in 0.13 m CMOS,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 6, pp. 1364–1371, Jun. 2008. [12] Sonnet. ver. 12.56, Sonnet Softw. Inc., Syracuse, NY, 1986–2011. [13] B. Cetinoneri, Y. Atesal, and G. M. Rebeiz, “A miniature DC-70 GHz SP4T switch in 0.13 m CMOS,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2009, pp. 1093–1096. [14] D. M. Pozar, Microwave Engineering, 3rd ed. New York: Wiley, 2004. [15] J. Kim and J. F. Buckwalter, “A fully integrated -band bidirectional transceiver in 0.12- m SiGe BiCMOS technology,” in IEEE Bipolar/ BiCMOS Circuits Technol. Meeting, Oct. 2010, pp. 57–60. [16] S. Kim and G. M. Rebeiz, “A low-power BiCMOS 4-element phased array receiver for 76–84 GHz radars and communication systems,” IEEE J. Solid State Circuits, vol. 47, no. 2, pp. 359–367, Feb. 2012. Choul-Young Kim (S’04–A’07) received the B.S. degree in electrical engineering from Chungnam National University (CNU), Daejeon, Korea, in 2002, and M.S. and Ph.D. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2004 and 2008, respectively. From March 2009 to February 2011, he was a Postdoctoral Research Fellow with the Department of Electrical and Computer Engineering, University of California at San Diego (UCSD), La Jolla. He is currently an Assistant Professor of electronics engineering with Chungnam National University, Daejeon, Korea. His research interests include millimeter-wave integrated circuits and systems for short-range radar and phased-array antenna applications.

Dong-Woo Kang (A’07) received the B.S., M.S., and Ph.D. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2001, 2003, and 2007, respectively. From September 2007 to September 2010, he was a Postdoctoral Research Fellow with the Department of Electrical and Computer Engineering, University of California at San Diego (UCSD), La Jolla. He is currently with Samsung Electronics, Suwon, Korea. His research interests include CMOS/SiGe integrated circuits (ICs) for microwave and millimeter-wave phased-array systems.

Gabriel M. Rebeiz (S’86–M’88–SM’93–F’97) received the Ph.D. degree from the California Institute of Technology, Pasadena. He is the Wireless Communications Industry Chair Professor of electrical and computer engineering with the University of California at San Diego (UCSD), La Jolla. From 1988 to 2004, he was with The University of Michigan at Ann Arbor. He has contributed to planar millimeter-wave and terahertz antennas and imaging arrays from 1988 to 1996, and his group has optimized the dielectric-lens antennas, which is the most widely used antenna at millimeter-wave and terahertz frequencies. His group also developed 6–18- and 40–50-GHz eight- and 16-element phased arrays on a single silicon chip, and the first millimeter-wave silicon passive imager chip at 85–105 GHz. His group also demonstrated high- RF microelectromeand the new chanical systems (MEMS) tunable filters at 1–6 GHz angular-based RF MEMS capacitive and metal-contact switches. As a consultant, he helped develop the USM/ViaSat 24-GHz single-chip SiGe automotive -, and -band for defense and comradar, phased arrays operating at -, mercial applications, the RFMD RF MEMS switch, and the Agilent RF MEMS switch. He is the Director of the UCSD/Defense Advanced Research Projects Agency (DARPA) Center on RF MEMS Reliability and Design Fundamentals. He has graduated 42 Ph.D. students and 15 post-doctoral fellows, and currently leads a group of 21 Ph.D. students and post-doctoral fellows in the area of millimeter-wave RF integrated circuits (RFICs), tunable microwaves circuits, RF MEMS, planar millimeter-wave antennas, and terahertz systems. He authored RF MEMS: Theory, Design and Technology (Wiley, 2003). Prof. Rebeiz is a National Science Foundation (NSF) Presidential Young Investigator. He has been an associate editor of the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES and a Distinguished Lecturer for the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) and the IEEE Antennas and Propagation Society (IEEE AP-S). He was a recipient of the URSI Koga Gold Medal Recipient, the IEEE MTT-S 2003 Distinguished Young Engineer, the IEEE MTT-S 2000 Microwave Prize, the IEEE MTT-S 2010 Distinguished Educator Award, and the IEEE AP-S 2011 John D. Kraus Award. He was also the recipient of the 1998 Eta Kappa Nu Professor of the Year Award and the 1998 Amoco Teaching Award given to the best undergraduate teacher at The University of Michigan at Ann Arbor, and the 2008 Teacher of the Year Award of the Jacobs School of Engineering, UCSD. His students have been the recipients of a total of 19 Best Paper Awards presented at IEEE MTT-S, RFIC, and AP-S conferences.

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60-GHz Four-Element Phased-Array Transmit/Receive System-in-Package Using Phase Compensation Techniques in 65-nm Flip-Chip CMOS Process Jing-Lin Kuo, Student Member, IEEE, Yi-Fong Lu, Student Member, IEEE, Ting-Yi Huang, Member, IEEE, Yi-Long Chang, Student Member, IEEE, Yi-Keng Hsieh, Pen-Jui Peng, Student Member, IEEE, I.-Chih Chang, Tzung-Chuen Tsai, Student Member, IEEE, Kun-Yao Kao, Student Member, IEEE, Wei-Yuan Hsiung, James Wang, Yungping Alvin Hsu, Kun-You Lin, Member, IEEE, Hsin-Chia Lu, Member, IEEE, Yi-Cheng Lin, Senior Member, IEEE, Liang-Hung Lu, Member, IEEE, Tian-Wei Huang, Senior Member, IEEE, Ruey-Beei Wu, Fellow, IEEE, and Huei Wang, Fellow, IEEE Abstract—AThe 60-GHz four-element phased-array transmit/ receive (TX/RX) system-in-package antenna modules with phase-compensated techniques in 65-nm CMOS technology are presented. The design is based on the all-RF architecture with 4-bit RF switched LC phase shifters, phase compensated variable gain amplifier (VGA), 4:1 Wilkinson power combining/dividing network, variable-gain low-noise amplifier, power amplifier, 6-bit unary digital-to-analog converter, bias circuit, electrostatic discharge protection, and digital control interface (DCI). The 2 2 TX/RX phased arrays have been packaged with four antennas in low-temperature co-fired ceramic modules through flip-chip bonding and underfill process, and phased-array beam steering have been demonstrated. The entire beam-steering functions are digitally controllable, and individual registers are integrated at each front-end to enable beam steering through the DCI. The of 5 dBm per four-element TX array results in an output channel. The four-element RX array results in an average gain of 25 dB per channel. The four-element array consumes 400 mW in TX and 180 mW in RX and occupies an area of 3.74 mm in the TX integrated circuit (IC) and 4.18 mm in the RX IC. The beam-steering measurement results show acceptable agreement of the synthesized and measured array pattern. Index Terms—Beamforming, CMOS, flip-chip, phased array, phase-compensated techniques, 60 GHz, system-in-package (SiP), variable gain amplifier (VGA), wireless communication.

I. INTRODUCTION

P

HASED-ARRAY systems play an important role in 60-GHz wireless applications, such as WirelessHD, WiGig (The Wireless Gigabit Alliance Website. [Online]. Available: http://wirelessgigabitalliance.org/), IEEE 802.15.3c,

Manuscript received October 18, 2011; accepted October 27, 2011. Date of publication January 17, 2012; date of current version March 02, 2012. This work was supported in part by the National Science Council of Taiwan under Contract NSC 99-2219-E-002-005, Contract NSC 99-2219-E-002-010, and Contract NSC 98-2221-E-002-059-MY3, under Excellent Research Projects of National Taiwan University (99R80302), and under the MediaTek-NTU 60-GHz Project (98-S-C12). J.-L. Kuo, Y.-F. Lu, T.-Y. Huang, Y.-L. Chang, Y.-K. Hsieh, P.-J. Peng, I.-C. Chang, T.-C. Tsai, K.-Y. Kao, K.-Y. Lin, H.-C. Lu, Y.-C. Lin, L.-H. Lu, T.-W. Huang, R.-B. Wu, and H. Wang are with the Department of Electrical Engineering and Graduate Institute of Communication Engineering, National Taiwan University, Taipei 106, Taiwan (e-mail: [email protected]). W.-Y. Hsiung, J. Wang, and Y. A. Hsu are with the Wireless Local Area Network Division, MediaTek Inc., Hsinchu 300, Taiwan. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2176508

Fig. 1. Classification of scanning techniques. (a) Time-domain beamformer. (b) Frequency-domain beamformer. (c) Spatial-domain beamformer.

and IEEE 802.11ad standards [1]–[3] due to the benefits of improvement in signal-to-noise ratio (SNR), equivalent isotropically radiated power (EIRP), spatial interference cancellation, and wider channel bandwidth. There are several different types of phased arrays, also called beamformers, which can be classified into time, frequency, and spatial domains, as shown in Fig. 1. Each of them has distinct features. Time-domain beamformers perform the desired functions by time-based operations [4]–[10]. In narrowband systems, the “phase shift” is equivalent to a time delay, but unfortunately phase scanned arrays are not suitable for broadband operation. At different frequencies, the same phase shift corresponds to different time delays and causes different angles of wave propagation. Therefore, the same phase shift across the desired frequency band results in the beam direction to vary with frequency. between array elements also The electrical spacing increases with frequency, and therefore, phase scanning is frequency sensitive. In order to keep the group delay over such a wide bandwidth, the phase compensated variable gain amplifier (VGA) can be used to compensate this phenomenon. Frequency-domain beamformers steer the beam directions by controlling the frequency [11]. At one particular frequency, the radiated waves of all sub-elements are in phase at the desired direction. Such frequency-scanning systems are relatively simple and inexpensive to implement. The frequency, rather than the phase, may be adjusted by the control circuits to bring the frequency-sensitive characteristics of phase scanning. The frequency is very important in scanning. Spatially orthogonal

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Fig. 2. Four-element phased-array transmitter/receiver module architecture. (a) Transmitter. (b) Receiver.

beamforming techniques generate multiple fixed directional beams by using the Butler matrix [12]–[14]. The Butler matrix is generally composed of passive components such that it consumes zero dc power consumption, but it suffers from the low spatial resolution due to only discrete beams generated by the Butler matrix. In this paper, we develop a pair of wideband phased-array transmit/receive (TX/RX) SiP antenna modules. The mechanism of the phase compensated technique is described in detail. The system-level design considerations and the overall TX/RX architecture are also addressed. To the authors’ knowledge, this is the first -band phased-array TX/RX SiP antenna modules with phase compensated VGA technique. Using the switched LC phase shifter and phase compensated VGA, the beam direction of the phased array can be controlled. The beam-steering measurement results show acceptable agreement of synthesized and measured array pattern. II. SYSTEM-LEVEL DESIGN CONSIDERATIONS Fig. 2 shows the block diagram of the proposed 60-GHz four-element phased-array TX/RX SiP antenna modules with phase-compensated techniques. The TX/RX SiP modules were designed and implemented in TSMC 65-nm 1P9M CMOS technology [15]. The Wilkinson power divider/combiner is used to divide/combine signals to/from one/four paths, but it suffers from the high loss of the CMOS substrate. Therefore, buffer amplifiers (BAs) are added to provide enough gain and power. However, more paths of digital control lines and dc bias are required in larger phased-array systems, which are complicated, and more metal layers are needed. The reported Wilkinson power divider/combiners consist of lumped-element [16], which is used to replace the quarter-wavelength for reducing chip size, but suffers from dc and digital control line routing. Therefore, we have modified the traditional design in our work. Fig. 3 shows the metal-stack layers of the TSMC 65-nm 1P9M CMOS process that is used for the Wilkinson power divider/combiner. Because of using the thin-film microstrip (TFMS) lines, it is easier to modify the ground plane

Fig. 3. Metal-stack layers of the TSMC 65-nm 1P9M CMOS process, which is used in a Wilkinson power divider/combiner.

from metal 1 to metal 5. The metal layers 1 to 4 can be used in the dc routes and digital control, and thus the complicated routes of dc bias and digital control can be simplified. The TFMS line loss (500- m long) is below 0.5 dB at 60 GHz, and the quality factor is about 10 at 60 GHz. The switched LC phase shifter is frequently used in a phasedarray system due to the advantage of digital control [17]. Since the switch on/off is controlled by digital voltage 1/0 V, it does not need a digital-to-analog converter (DAC). Moreover, it has a wider frequency range of constant phase shift than other passive phase shifters, such as reflection-type phase shifter and tunable artificial transmission line phase shifter. However, the switched LC phase shifter suffers from large switching loss at high frequencies. The losses in different phase states are not the same, and thus cause the amplitude imbalance. To minimize the amplitude imbalance of the switched LC phase shifter, a VGA can be cascaded with the phase shifter to compensate the different loss in each state. When the VGA provides different gain to compensate for the loss, the insertion phases of the VGA will also be changed. Therefore, it is difficult to achieve low root-mean-square (rms) phase error and low rms gain error simultaneously. In this design, a switched LC phase shifter using a VGA with a new phase compensation technique is presented.

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Fig. 4. Layer profile for the 60-GHz LTCC SiP module.

Fig. 7. Schematic of the VGLNA.

Fig. 5. Block diagram of the switched LC phase shifter with VGA. (a) Switched LC phase shifter and VGA in transmitter. (b) Switched LC phase shifter and VGA in receiver.

Fig. 8. Measured NF of the VGLNA.

Fig. 6. Schematic of the PA.

Six-bit unary DACs are used to control the gain setting of the VGA. The bias circuits are partitioned into global and local bias, which is to minimize the number of interconnected nets between the bias circuits and circuit blocks in the chip. The digital control interface (DCI) is used to control the bias, DAC, gain setting of variable gain low noise amplifier (VGLNA), and the state of the phase shifter for all circuits in the array. Even the power-down controls at each element are also controlled by the DCI. The DCI provides configuration and control of the chip operation through a set of registers. The external access (reset, writing, and reading) of these registers are through a serial to parallel bus. Fig. 4 shows the layer profile for the 60-GHz LTCC SiP module. An integrated circuit (IC) and antenna are placed on the opposite sides of the LTCC substrate. The RF signal is transmitted from the IC through the LTCC substrate to the antenna. The chip is first bonded to a multilayer LTCC substrate through flip-chip bonding. Liquid underfill is then dispensed

Fig. 9. Topologies of Wilkinson power distribution network. (a) Three of 1-to-2 Wilkinson power dividers are used and cascaded. (b) Directly 1-to-4 Wilkinson power divider.

into the gap among the solder bumps. As the dispensed underfill is cured, the solder bumps can be protected from being overstressed during thermal loading, thus increasing solder bump reliability [18]. A. Transmitter Module As shown in Fig. 2(a), the four-element 60-GHz CMOS phased-array transmitter consists of a 1:4 Wilkinson power

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Fig. 10. Schematic of the Wilkinson power distribution network. (a) Transmitter. (b) Receiver.

Fig. 11. Schematic of the 4-b switched LC phase shifter.

Fig. 12. Schematic of the phase-compensated VGA1.

Fig. 13. Schematic of the VGA2.

dividing network, 4-bit RF switched LC phase shifter, phase compensated VGA, power amplifier (PA), 6-bit unary DAC, bias circuit, and DCI. They have been packaged through the

flip-chip technique with four antennas in a low-temperature co-fired ceramic (LTCC) module. Fig. 5(a) shows the block diagram of the switched LC phase shifter with VGA. Due to

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Fig. 14. Gain and phase performance of the phase-compensated VGA. (a) In current steering stage versus (c) Measured gain in different gain state. (d) Measured relative phase and rms phase error in different gain state.

. (b) In bias adjusting stage versus

.

the RF phase-shifting architecture, the loss is high for each RF path. Therefore, four BAs, which are located between the Wilkinson power divider and phase shifter, are used to provide enough gain and output power. The four BAs and Wilkinson power splitter are co-designed together since the BAs are cascaded to the output of the power divider. After adjusting the phase in each path with the phase shifters, the four signal paths are combined at RF frequency. This architecture takes advantage of low power consumption and small chip size since the RF phase-shifting phased array has a minimum number of components. A VGA cascaded with the phase shifter to compensate the different loss in each state is also co-designed. The PA is placed as the last stage of the front-end in the transmitter. Using the phased-array system can improve EIRP and reduce the output power requirement in the transmitter [19].

has enough gain, the switched LC phase shifter and VGA are swapped to enhance the RX linearity without degrading the noise performance. A BA at the output of Wilkinson power combiner is added to provide enough gain and output power.

B. Receiver Module

A. TX PA

As shown in Fig. 2(b), the phase shifting circuit of the receiver is the same in the transmitter. The RX chip consists of a VGLNA, 4-bit RF switched LC phase shifter, phase compensated VGA, 4:1 Wilkinson power combining network, 6-bit unary DAC, bias circuit, and DCI. They are also packaged using flip-chip techniques with four antennas in an LTCC module. A low-noise amplifier (LNA) incorporated with a variable gain stage is used in the receiver system to improve the sensitivity and dynamic range of the receiver, and thus the total chip size and power consumption can be minimized at the same time. A switched LC phase shifter and phase compensated VGA are also used in the RX design. Fig. 5(b) shows the block diagram of the switched LC phase shifter with the VGA. Since the VGLNA

Fig. 6 shows the schematic diagram of the PA, which is designed to deliver the maximum power from the device with a power consumption of 50 mW [23]. The amplifier consists of two stages of common source devices with input, output, and inter-stage matching networks. In order to achieve maximum output power, the transistors (M2, M3) directly combined in the second stage are selected as 24 fingers with each finger length of 2 m. In order to achieve higher power-added efficiency (PAE), the transistors (M1) in the first stage are ten fingers with each finger width of 3 m. Since the CMOS PA operates in a high voltage swing, the output matching network is designed for maximum output power, and the inter-stage and input matching networks are designed for gain and input return loss. All of the

III. INDIVIDUAL FUNCTIONAL BLOCK DESIGN In the TX/RX SiP modules, all of the on-chip matching networks, including the metal–insulator–metal (MIM) capacitors, pad parasitic capacitance, and TFMS lines were simulated using a full-wave electromagnetic (EM) simulator (Sonnet 11.52) [20]. The via transition, flip-chip compensation, and four-element antenna array on LTCC were simulated using the High-Frequency Structure Simulator (HFSS) [21]. The complete circuit was then simulated using the Advanced Design System (ADS 2010) [22].

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Fig. 15. Die photograph of the four-element CMOS phased array IC. (a) Transmitter (area

3.74 mm ). (b) Receiver (area

4.18 mm ).

Fig. 16. Photograph of the LTCC SiP module with TX/RX IC and four antennas. (a) For single-channel TX measurement. (b) For single-channel RX measurement. (c) For TX array pattern measurement. (d) For RX array pattern measurement.

Fig. 17. Experimental setup. (a) Single-channel and (b) array pattern measurement of the TX/RX module.

gates are biased via local bias circuit. This PA is operated at class-A to compromise with output power and linearity. The PA consumes 50 mA from 1-V supply. B. RX VGLNA Fig. 7 shows the schematic of the VGLNA circuit. The design methodology of the CMOS VGLNA in [24] is applied here. In the high gain mode, the noise figure (NF) and power consumption are as low as possible. It also needs acceptable NF, better third-order intermodulation intercept point (IIP3), and return

loss for the dynamic-range specification in the low gain mode operation. To achieve a higher gain with a minimum NF for the cascaded LNA, a cascode amplifier with a positive feedback [25] is employed as the first stage in this design. In order not to degrade the noise performance, two identical attenuator cells with two digital control bits are incorporated in the matching network between the first and the second stage rather than in the input of the VGLNA. On the other hand, the attenuators effectively suppress the incident power level for the second and the third stages, leading to the improvement of linearity in the

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Fig. 18. Simulated (dashed lines) and measured (solid lines) TX/RX single path (CH-1) characteristics for the 16 states. (a) (c) RMS gain/phase error (reference: 0 -bit phase state).

medium- and low-gain mode. The matching networks are also realized by the thin-film microstrip (TFMS) lines, which are routed compactly to minimize the chip area. The measured NF is shown in Fig. 8. In the high-gain mode, the LNA exhibits a measured minimum NF of 6 dB at 61 GHz. The VGLNA consumes 20 mA from 1.8-V supply. C. Four-Way Wilkinson Power Dividers/Combiners and BA Fig. 9 shows two topologies that can be used to implement the Wilkinson power distribution network [26]. One is cas-

-parameters. (b) Relative phases.

cading three 1-to-2 Wilkinson power dividers [see Fig. 9(a)]. The other directly implements a 1-to-4 Wilkinson power divider [see Fig. 9(b)]. When characteristic impedance is 50 is equal to 100 . However, according to design rules of the minimum 2- m-wide line, the maximum available characteristic impedance is 72 . Hence, the directly 1-to-4 Wilkinson power divider cannot be implemented in the 65-nm CMOS process. Although the characteristic impedance with 72 can be implemented with a 2- m-wide line, the minimum line width should be avoided in the design. Therefore, 4- m-wide TFMS line is

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Fig. 19. Measured TX and RX single path power performance (CH1-CH4).

selected for the quarter-wavelength lines. The Wilkinson power divider/combiner is designed for the 42- system in order that the characteristic impedance of the quarter-wavelength line is 60 . Since the system impedance of RF circuits is usually 50 , a simple matching network is used to transform 42 to 50 . Besides, the size of the Wilkinson power divider can be reduced by using capacitive loading. Therefore, the matching network utilizes an open stub to reduce the size and insertion loss of the power divider/combiner. Fig. 10(a) shows the schematic of 1-to-4 Wilkinson power divider with a buffer. The 1-to-4 power divider with a two-stage common source amplifier operates across a wide frequency range from 57 to 66 GHz. The simulated gain of each RF path of the 1-to-4 power distribution network is higher than 3 dB, and the simulated isolation between two adjacent output ports is better than 35 dB. The 1-to-4 power distribution network consumes 40 mA from a 1-V supply voltage. Fig. 10(b) shows the schematic of 4-to-1 Wilkinson power combiner with a buffer. The 4-to-1 power combiner with a three-stage BA has a bandwidth of 57–66 GHz. The simulated gain of each RF path of the power distribution network is better than 11 dB, and the simulated isolation between the two adjacent input ports is better than 24 dB. The 4-to-1 power distribution network consumes 20 mA from 1-V supply.

Fig. 20. Measured power performance of the CH-1 RX at four different modes of VGLNA. (“10”: medium gain, “00”: high gain, “01”: medium gain, “11”: low gain).

D. 4-bit Switched LC Phase Shifter and Phase-Compensated VGA Fig. 11 is the block diagram of switched LC phase shifter, which can be controlled by digital signals and has been often used in phased-array systems. A 4-bit switched LC phase shifter contains four stages since the switch on/off can be controlled by the DCI. Switching the high- and low-pass networks by the switch pair can accomplish phase shift; however, the area will be large due to the high- and low-pass networks. In addition, the on resistance of the switching pair will cause high loss. In order to reduce the area, the high-/low-pass networks are combined together. Since the four stages are cascaded, the impedance mismatch may result in the reflection between each stage, and thus the phase variation. In order to prevent the impedance mismatch from each other, all stages are matched to . Fig. 12 shows the proposed phase compensated VGA1. The 6-bit unary DAC is used to control the gain setting ( and ) of the VGA. Fig. 13 shows the schematic of VGA2. Again, VGA2 is added to provide enough gain and output power. The current steering

Fig. 21. Photograph of pattern measurements.

circuit [27] is composed of a cascode device (M1, M2) and a current steering device (M3). In the highest gain operation, is set to 0 V, so M3 is turned off, so that the current in M3 is zero and in M2 is maximum. When is increased, the current of M3 increases and the current of M2 decreases. The in the cascode device decreases accordingly, and thus causes an increase in phase. The bias adjusting circuit [28] includes another cascode device (M4, M5). When is decreased, the current of M4 and M5 drop. The gain will decrease and result in a decreasing phase. Using the proposed phase-compensated VGA, the gain imbalance of the switched LC phase shifter can be minimized without increasing the phase error.

KUO et al.: 60-GHz FOUR-ELEMENT PHASED-ARRAY TX/RX SiP

Fig. 22. Measured and synthesized beam patterns at 61 GHz. (a)

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–

-plane. (b)

Fig. 14 presents the mechanism of the phase-compensation VGA. Fig. 14(a) and (b) shows the simulated and measured gain and phase of the VGA at 60 GHz versus and , respectively. From the measurement results, the phase change by sweeping and will cancel each other unless is larger than 0.7 V since the phase will be decreased, as shown in Fig. 14(b). It is observed that the phase of the current steering stage and bias adjusting stage are varying oppositely when the gain is decreased. Therefore, the phase compensation is achieved by the current steering and bias adjusting technique simultaneously. Fig. 14(c) shows the measured gain of the phase-compensated VGA in different gain state and Fig. 14(d) shows the corresponding phase response and the rms phase error. The measured gain in the highest gain state is 7 dB from 60 to 65 GHz. The measured gain variation range is from 15 to 7 dB at 60 GHz with the absolute phase error is under 7.5 , and the rms phase

–

-plane. (c)

–

-plane. (d)

–

-plane.

error is less than 3.5 . Therefore, the phase-compensated VGA can achieve low phase variation in different gain state. IV. EXPERIMENTAL SETUP AND BEAM-STEERING MEASUREMENT The phased-array TX/RX IC is realized in TSMC 65-nm 1P9M flip-chip CMOS technology. It has an area of 3.74 mm for TX and 4.18 mm for RX, and the photographs of the ICs are shown in Fig. 15. The ground–signal–ground (GSG) dimensions for RF I/O is 200 m. The bump height after flip-chip bonding is 55 m and the dielectric constant of the underfill is 3.5. A flip-chip interface and underfill process are used to reduce the loss and variation compared with wire bondings. Four cavity-backed rectangular slot loop antenna are implemented on an LTCC process. Fig. 16(a) and (b) are the TX and RX SiP modules with additional testing pads to investigate the single-channel TX and RX performance. We also added

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TABLE I CURRENT STATE OF THE ART PHASED-ARRAY TRANSMITTER AND RECEIVER AROUND 60 GHz

off-chip decoupling capacitors to improve the stability of the circuit. Note that the TX and RX flip-chip IC and antenna array are designed on the opposite sides of the LTCC substrate. Fig. 16(c) and (d) are the TX/RX SiP modules for TX and RX pattern measurement, and the RF signal is transmitted from the IC through the LTCC substrate to the antenna radiators on the other side. The interconnect lines are realized with 50microstrip lines to the probe pads on the LTCC substrate. The design and characterization details of this package and antenna will be reported in [18] and [30]. The four-element array consumes 400 mW (100 mW per array element) in the TX from 1-V supply and 180 mW (45 mW per array element) in the RX from 1.8-V and 1-V supply. A. Single-Channel TX/RX Module Characterizations Fig. 17(a) shows the single-channel experimental setup of the TX/RX module, with a module size of 2 2 cm , including all of the testing pads. The single-channel beamformer characterization is measured on a testing LTCC module after a standard short-open-load-thru (SOLT) calibration with a vector network analyzer (Agilent Technologies, PNA-E8361C) and 200- m ground-signal-ground probes. Fig. 18(a) presents the simulated and measured TX/RX single path (CH-1) scattering parameters. The dashed lines show the simulated results, which are the average value calculated from all 16 phase states. The solid lines show the measured TX/RX small-signal scattering parameter of all 16 phase states. The measured TX average gain per channel is 0 dB from 57 to 66 GHz. The measured RX small-signal gains for all 16 phase states are also presented and the average gain per channel is about 25 dB at 61 GHz. Fig. 18(a) also shows the simulated and measured I/O return loss. The simulated and measured I/O return losses are all better than 6 dB from 57 to 66 GHz and are independent of the different phase states. Fig. 18(b) shows TX/RX relative phases

versus frequency, which achieve full 360 phase range with 22.5 resolution from 57 to 66 GHz. The measured rms gain error was calculated from the average gain of each frequency. The measured TX rms gain/phase error is below 1.5 dB/9 on 4-bit performance at 59 GHz, while the measured RX rms gain/phase error is below 1 dB/9 at 60 GHz [see Fig. 18(c)]. The calculated TX and RX group delay from the measured phase are 220 20 ps and 255 30 ps, respectively, over 57–66 GHz for all phase states. The power performance of the TX is evaluated by a 60-GHz one-tone test, as shown in Fig. 19. This TX achieves a measured of 5 dBm from all four channels. The power performance of the RX is shown in Figs. 19 and 20. The linearity improves as the gain decreases and the highest input 1-dB compression point is 21.5 dBm as the RX is operated in its low-gain mode. B. TX/RX Array Beam-Steering Characterizations Fig. 17(b) shows the probe-based measurement setup for the realized gain measurements. The TX/RX array beam-steering characterizations are also measured on an LTCC module. The TX/RX IC has been packaged with four antennas in an LTCC package and placed on an printed circuit board (PCB). The photograph of the measurement setup for the pattern measurements is shown in Fig. 21. The transmitted and received standard gain horn antenna is placed on a sliding track, which covers an azimuthal a range of only 25 for the broadside gain measurement. The TX/RX antenna module is placed on a probe station and a probe contacts to a GSG pad apart from antennas to prevent the interference. The probe and a standard gain horn antenna are connected to a vector network analyzer Agilent E8361A for measurement. A Friis transmission equation is employed to obtain the realized gain. Fig. 22 shows the normalized TX/RX

KUO et al.: 60-GHz FOUR-ELEMENT PHASED-ARRAY TX/RX SiP

array gains as a function of signal incident angles at four different RF phase settings (CH-1 to CH-4), which demonstrates the beam scanned to different angles of 25 , 12 , and 0 . The synthesized array pattern for a four-element array is based on the simulated scattering parameter including all RF signal traces from IC to antenna array on an LTCC. The measured array patterns at different angles (No. 1–No. 5) are plotted by the dotted lines for comparison. Fig. 22 also shows that 2-D beam-steering patterns are achieved by this 2 2 array through the measured TX/RX -plane and -plane normalized gain patterns. It clearly demonstrates the programmable spatial selectivity of the TX and RX SiP modules. Using the switched LC phase shifter and phase-compensated VGA, the deviation of radiated beam versus frequency can be easily corrected in free space. Moreover, the beam-steering measurement results show acceptable agreement of synthesized and measured array pattern. V. CONCLUSION The 60-GHz four-element phased-array transmitter and receiver SiP antenna modules with phase-compensated techniques in 65-nm CMOS technology have been presented. Table I summarizes the current state-of-the-art phased-array transmitters and receivers at 60 GHz. The 60-GHz four-element phased-array TX and RX SiP modules can achieve wide-bandwidth 2-D beam steering and low power consumption. Based on phase-compensation techniques, the change of radiated beam versus frequency can be corrected in free space. Acceptable agreement between the synthesized and measured beam-steering pattern is demonstrated with a packaged IC. ACKNOWLEDGMENT The authors would like to thank A. Chiou, H.-C. Chen, R. Wu, J.-H. C. Zhan, Y. C. Lin, C. L. Tsai, O. Huang, S. Chuang, S. B. Chen, J. Chen, C.-H. Lien, C.-S. Lin, Y.-C. Hsu, M.-C. Chuang, K.-J. Tsai, C.-C. Hung, J.-F. Yeh, W.-T. Li, T.-Y. Ho, B.-J. Huang, D.-J. Haung, Z.-M. Tsai, J.-H. Tsai, P.-C. Huang, J.-J. Kuo, P.-H. Chiang, and C.-C. Kuo for their helpful suggestions. REFERENCES [1] WirelessHD Specification, Revision 1.0, Jan. 3, 2008. [Online]. Available: www.wirelessHD.org [2] Standard for Information Technology—Telecommunications and Information Exchange Between Systems—Local and Metropolitan Area Networks—Specific Requirements. Part 15.3: Wireless Medium Access Control (MAC) and Physical Layer (PHY) Specifications for High Rate Wireless Personal Area Networks (WPANs). Amendment 2: Millimeter-Wave-Based Alternative Physical Layer Extension, IEEE Standard 802.15.3c-2009, 2009. [3] Draft Standard for Information Technology—Telecommunications and Information Exchange Between Systems—Local and Metropolitan Area Networks—Specific Requirements, Part 11: Wireless LAN Medium Access Control 5 (MAC) and Physical Layer (PHY) Specifications. Amendment 6: Enhancements for Very High Throughput in the 60 GHz Band, IEEE Standard P802.11ad™/D0.1, 2010. [4] S. Emami, R. F. Wiser, E. Ali, M. G. Forbes, M. Q. Gordon, X. Guan, S. Lo, P. T. McElwee, J. Parker, J. R. Tani, J. M. Gilbert, and C. H. Doan, “A 60 GHz CMOS phased array transceiver pair for multi-Gb/s wireless communications,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2011, pp. 164–166.

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[5] M. Tabesh, J. Chen, C. Marcu, L. Kong, S. Kang, E. Alon, and A. Niknejad, “A 65 nm CMOS 4-element sub-34 mW/element 60 GHz phased-array transceiver,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2011, pp. 166–168. [6] T.-S. Chu and H. Hashemi, “A true time-delay-based bandpass multi-beam array at mm-waves supporting instantaneously wide bandwidths,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2010, pp. 38–39. [7] S. Kim and L. E. Larson, “A 44-GHz SiGe BiCMOS phase-shifting sub-harmonic up-converter for phased-array transmitters,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 5, pp. 1089–1099, May 2010. [8] E. Cohen, C. G. Jakobson, S. Ravid, and D. Ritter, “A bidirectional TX/RX four-element phased array at 60 GHz with RF-IF conversion block in 90-nm CMOS process,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 5, pp. 1438–1446, May 2010. [9] A. Natarajan, S. K. Reynolds, M.-D. Tsai, S. T. Nicolson, J.-H. C. Zhan, D. G. Kam, D. Liu, Y.-L. O. Huang, A. Valdes-Garcia, and B. A. Floyd, “A dully integrated 16-element phased-array receiver in SiGe BiCMOS for 60-GHz communications,” IEEE J. Solid-State Circuits, vol. 46, no. 5, pp. 1059–1075, May 2011. [10] K.-J. Koh, J. W. May, and G. M. Rebeiz, “A millimeter-wave (40–45 GHz) 16-element phased-array transmitter in 0.18 m SiGe BiCMOS technology,” IEEE J. Solid-State Circuits, vol. 44, no. 5, pp. 1498–1509, May 2009. [11] M. I. Skolnik, Radar Handbook. New York: McGraw-Hill, 2010. [12] H. Krishnaswamy and H. Hashemi, “A 4-channel 4-beam 24-to-26 GHz spatio-temporal RAKE radar transceiver in 90 nm CMOS for vehicular radar applications,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2010, pp. 214–215. [13] T.-Y. Chin, S.-F. Chang, J.-C. Wu, and C.-C. Chang, “A 25-GHz compact low-power phased-array receiver with continuous beam steering in CMOS technology,” IEEE J. Solid-State Circuits, vol. 45, no. 11, pp. 2273–2282, Nov. 2010. [14] B. Cetinoneri, Y. A. Atesal, and G. M. Rebeiz, “An 8 8 Butler matrix in 0.13 m CMOS for 5–6-GHz multibeam applications,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 2, pp. 295–301, Feb. 2011. [15] “TSMC 65 nm CMOS datasheet,” Taiwan Semiconduct. Manuf. Company Ltd., Hsinchu, Taiwan, 2007. [16] J.-G. Kim and G. M. Rebeiz, “Miniature four-way and two-way 24 GHz Wilkinson power dividers in 0.13- m CMOS,” IEEE Microw IEEE Wireless Compon. Lett., vol. 17, no. 9, pp. 658–660, Sep. 2007. [17] D.-W. Kang, J.-G. Kim, B.-W. Min, and G. M. Rebeiz, “Single and -band transmit/receive phased-array silicon RFICs four-element with 5-bit amplitude and phase control,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 12, pp. 3534–3543, Dec. 2009. [18] T.-Y. Huang, H.-C. Cheng, H.-C. Lu, W.-R. Ciou, W.-H. Chen, Y.-L. Chang, Y. A. Hsu, and R.-B. Wu, “Development of 60 GHz frontend phased array system in package module with electrical and thermal analysis,” IEEE Trans. Compon. Pkg. Manuf. Technol., submitted for publication. [19] A. Valdes-Garcia, S. T. Nicolson, J.-W. Lei, A. Natarajan, P.-Y. Chen, S. K. Reynolds, J.-H. C. Zhan, D. G. Kam, D. Liu, and B. Floyd, “A dully integrated 16-element phased-array transmitter in SiGe BiCMOS for 60-GHz communications,” IEEE J. Solid-State Circuits, vol. 45, no. 12, pp. 2757–2773, Dec. 2010. [20] “Sonnet User’s Manual, Release 11.52,” Sonnet Softw. Inc., Syracuse, NY, 2007. [21] Ansoft HFSS. ver. 11, ANSYS Inc., San Jose, CA, 2010. [Online]. Available: http://ansoft.com [22] “Agilent EEsof ADS’s Manual,” Agilent Technol. Inc., Santa Rosa, CA, 2010. [23] J.-L. Kuo, Z.-M. Tsai, K.-Y. Lin, and H. Wang, “A 50 to 70 GHz power amplifier using 90 nm CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 1, pp. 45–47, Jan. 2009. [24] Y.-K. Hsieh, J.-L. Kuo, H. Wang, and L.-H. Lu, “A 60-GHz broadband low-noise amplifier with variable-gain control in 65 nm CMOS,” IEEE Microw. Wireless Compon. Lett., accepted for publication. [25] H.-H. Hsieh and L.-H. Lu, “A 40-GHz low-noise amplifier with a positive-feedback network in 0.18- m CMOS,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 8, pp. 1895–1902, Aug. 2009. [26] D. M. Pozar, Microwave Engineering, 3rd ed. Hoboken, NJ: Wiley, 2005. [27] C.-C. Kuo, Z.-M. Tsai, J.-H. Tsai, and H. Wang, “A 71–76 GHz CMOS variable gain amplifier using current steering technique,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2008, pp. 609–612.

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[28] Z.-M. Tsai, J.-C. Kao, K.-Y. Lin, and H. Wang, “A compact low DC consumption 24-GHz cascode HEMT VGA,” in IEEE Asia–Pacific Microw. Conf., Dec. 2008, pp. 1625–1627. [29] Y.-F. Lu, K.-F. Hung, and Y.-C. Lin, “Low-coupling design of 16-element cavity-backed slot loop antenna arrays in LTCC for 60-GHz phased-array transceiver,” IEEE Trans. Antennas Propag., submitted for publication. [30] W. L. Chan, J. R. Long, M. Spirito, and J. J. Pekarik, “A 60 GHz-band 2 2 phased-array transmitter in 65 nm CMOS,” in IEEE Int. SolidState Circuits Conf. Tech. Dig., Feb. 2010, pp. 42–43. [31] K. Raczkowski, W. D. Raedt, B. Nauwelaers, and P. Wambacq, “A wideband beamformer for a phased-array receiver in 40 nm digital CMOS,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2010, pp. 40–41. [32] S. Kishomoto, N. Orihashi, Y. Hamada, M. Ito, and K. Maruhashi, “A 60-GHz band CMOS phased array transmitter utilizing compact baseband phase shifters,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 215–218.

Jing-Lin Kuo (S’06) was born in Taipei, Taiwan, on November 6, 1983. He received the B.S. degree in electrical engineering from National Sun Yat-Sen University, Kaohsiung, Taiwan, in 2006, the M.S. degree from the Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan, in 2008, and is currently working toward the Ph.D. degree in communication engineering at National Taiwan University. His research interests include millimeter-wave wireless transceivers and phased-array system designs.

Yi-Fong Lu (S’09) was born in Taipei, Taiwan, in 1981. He received the B.S. degree in electrical engineering from the National Taiwan University of Science and Technology, Taipei, Taiwan, in 2003, the M.S. degree in electrical engineering from National Taiwan University, Taipei, Taiwan, in 2005, and is currently working toward the Ph.D. degree at National Taiwan University. His research interests are the design and measurement of printed antennas, cell-phone antennas, millimeter-wave antennas, and high gain partially reflec-

Research and Development Engineer of antenna design with Compal Communications Inc., Taipei, Taiwan. From 2009 to 2010, he was a Full-Time Research Assistant with the Graduate Institute of Electronics Engineering, National Taiwan University. His research interests include microwave circuit design and antenna design.

Yi-Keng Hsieh was born in Taipei, Taiwan, in 1983. He received the B.S. and M.S. degrees in electrical and control engineering and electronics engineering from National Chiao-Tung University, Hsinchu, Taiwan, in 2006 and 2008, respectively, and is currently working toward the Ph.D. degree in electronics engineering at National Taiwan University, Taipei, Taiwan. His research interests include RF ICs and monolithic microwave integrated circuit (MMIC) designs.

Pen-Jui Peng (S’08) was born in Taipei, Taiwan, in 1986. He received the B.S. degree in electrical engineering and M.S. degree in communication engineering from National Taiwan University, Taipei, Taiwan, in 2008 and 2010, respectively, and is currently working toward the Ph.D. degree at National Taiwan University. His research interests focus on millimeter-wave wireless transceivers.

I.-Chih Chang was born in Kaohsiung, Taiwan, in 1986. He received the M.S. degree in communication engineering from National Taiwan University, Taipei, Taiwan, in 2010. His research interests include PAs and power distributed network circuits.

tive surface antennas.

Ting-Yi Huang (M’08) was born in Hualien, Taiwan, on November 12, 1977. He received the B.S. degree in electrical engineering and M.S. and Ph.D. degrees in communication engineering from National Taiwan University, Taipei, Taiwan, in 2000, 2002, and 2008, respectively. He is currently a Post-Doctoral Research Fellow with the Graduate Institute of Communication Engineering, National Taiwan University. His research interests include computational electromagnetics, the design of microwave filters, transitions, and associated RF modules for microwave and millimeter-wave applications.

Yi-Long Chang (S’10) received the B.S. degree in aeronautical engineering from National Formosa University, Yunlin, Taiwan, in 2003, the M.S. degree in electronics engineering from National Taiwan University, Taipei, Taiwan, in 2007, and is currently working toward the Ph.D. degree at the Graduate Institute of Communication Engineering, National Taiwan University. From 2004 to 2005, he was a Research and Development Engineer with the HTC Corporation, Taoyuan, Taiwan. From 2007 to 2008, he was a

Tzung-Chuen Tsai (S’09) was born in Kaohsiung, Taiwan, in 1986. He received the B.S. degree in electrical and control engineering from National Chiao Tung University, Hsinchu, Taiwan, in 2009, and the M.S. degree from the Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan, in 2011. His research interests include the design and analysis of microwave/RF circuits.

Kun-Yao Kao (S’08) was born in Taipei, Taiwan, in 1983. He received the B.S. degree in civil engineering from National Taiwan University, Taipei, Taiwan, in 2007, and is currently working toward the Ph.D. degree in communication engineering at National Taiwan University. His current research interests include frequency synthesizers and mixed-signal and RF circuit design.

KUO et al.: 60-GHz FOUR-ELEMENT PHASED-ARRAY TX/RX SiP

Wei-Yuan Hsiung was born in ChiaYi, Taiwan, in 1973. He received the B.S. degree in electrical and control engineering from National Chiao Tung University, Hsinchu, Taiwan, in 1996, and the M.S. degree from the Graduate Institute of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan, in 2001. He is currently involved with wireless according application-specific integrated circuit (ASIC) design with Mediatek Inc., Hsinchu, Taiwan.

James Wang received the B.S.E.E. degree from National Taiwan University, Taipei, Taiwan, and the M.S.E.E. and Ph.D. degrees from the University of Southern California, Los Angeles. He has been a Corporate Engineer/Assistant Vice President with the LinCom Corporation, the Chief Technical Officer (CTO) with Fastrack Information Inc., and the CTO with Motia Inc. He has been a consultant to a number of companies within the semiconductor, and telecommunications, and satellite industries.

Yungping Alvin Hsu received the B.S. degree in electrical engineering from National Taiwan University, Taipei, Taiwan in 1991, and the M.S. degree in electrical engineering and computer science from The University of Michigan at Ann Arbor, in 1994. From 1995 to 1997, he was with Philips Semiconductors, Sunnyvale, CA as a Design Engineer involved with high-speed circuits for hard disk drive read channel processors. In 1997, he joined Marvell Semiconductor Inc., Santa Clara, CA, as a Senior Design Engineer and later the Design Manager and Engineering Director of the Wireless Baseband Group. Since 2008, he has been with MediaTek Inc., Hsinchu, Taiwan, as the Director of the Wireless Local Area Network (WLAN) Division, leading the millimeter-wave and 802.11n/ac system development. He holds 26 U.S. patents. His research has included product development in HDD read channels, 10/100/1000-BaseT Ethernet PHY, and 802.11b/g/n WLAN baseband processors. His research interest is the signal processing algorithm and architecture for wireless communications.

Kun-You Lin (S’00–M’04) was born in Taipei, Taiwan, in 1975. He received the B.S. degree in communication engineering from National Chiao Tung University, Hsinchu, Taiwan, in 1998, and the Ph.D. degree in communication engineering from National Taiwan University, Taipei, Taiwan, in 2003. From August 2003 to March 2005, he was a Postdoctoral Research Fellow with the Graduate Institute of Communication Engineering, National Taiwan University. From May 2005 to July 2006, he was an Advanced Engineer with the Sunplus Technology Company Ltd., Hsin-Chu, Taiwan. Since July 2006, he has been a faculty member of the Department of Electrical Engineering and Graduate Institute of Communication Engineering, National Taiwan University, where he is currently an Associate Professor. His research interests include the design and analysis of microwave/RF circuits. Dr. Lin is a member of Phi Tau Phi.

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Hsin-Chia Lu (S’93–M’99) received the Ph.D. degree in electrical engineering from National Taiwan University, Taipei, Taiwan, in 1999. From 1999 to 2004, he was a Postdoctoral Research Fellow with the Graduate Institute of Communication Engineering, National Taiwan University. Since 2004, he has been with the Graduate Institute of Electronics Engineering, National Taiwan University. His research interests include RF/millimeter-wave (MMW) SiP design, low-temperature cofired ceramic (LTCC), and integrated passive device (IPD) circuit design and synthesis, microwave measurement techniques, and LTCC embedded antennas/arrays.

Yi-Cheng Lin (S’92–M’98–SM’10) received the B.S. degree in nuclear engineering from National Tsing-Hua University, Hsingchu, Taiwan, in 1987, the M.S. degree in electrical engineering from National Taiwan University, Taipei, Taiwan, in 1989, and the Ph.D. degree in electrical engineering from The University of Michigan at Ann Arbor, in 1997. From 1997 to 2003, he was with Qualcomm Inc., San Diego, CA, where he was responsible for the design and development of various antennas for satellites and terrestrial communication systems. Since 2003, he has been a faculty member with the Department of Electrical Engineering and the Graduate Institute of Communication Engineering, National Taiwan University, where he is currently an Associate Professor. His research interests include antenna miniaturization, ultra-wideband and multiband antennas, millimeter-wave antennas, and diversity antennas for multiple-input multiple-output (MIMO) systems.

Liang-Hung Lu (M’02) was born in Taipei, Taiwan, in 1968. He received the B.S. and M.S. degrees in electronics engineering from National Chiao-Tung University, Hsinchu, Taiwan, in 1991 and 1993, respectively, and the Ph.D. degree in electrical engineering from The University of Michigan at Ann Arbor, in 2001. During his graduate study, he was involved in SiGe HBT technology and MMIC design. From 2001 to 2002, he was with IBM, where he was involved with low-power and RF ICs for silicon-on-insulator (SOI) technology. In August 002, he joined the faculty of the Graduate Institute of Electronics Engineering and the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, where he is currently a Professor. His research interests include CMOS/BiCMOS RF and mixed-signal integrated-circuit designs.

Tian-Wei Huang (S’91–M’98–SM’02) received the B.S. degree in electrical engineering from National Cheng Kung University, Tainan, Taiwan, in 1987, and the M.S. and Ph.D. degree in electrical engineering from the University of California at Los Angeles (UCLA), in 1990 and 1993, respectively. In 1993, he joined the TRW RF Product Center, Redondo Beach, CA, where he designed RF integrated circuits (RFICs) up to 190 GHz. From 1998 to 2002, he was with Lucent Technologies and Cisco Systems, where he developed high-speed wireless systems. In August 2002, he joined the faculty of the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan. His research interests include millimeter-wave RF-CMOS design and gigabit wireless systems.

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Ruey-Beei Wu (M’91–SM’97–F’10) was born in Tainan, Taiwan. He received the B.S.E.E. and Ph.D. degrees from National Taiwan University, Taipei, in 1979 and 1985, respectively. In 1982, he joined the faculty of the Department of Electrical Engineering, National Taiwan University, where he is currently a Professor and served as the Chairman from 2004 to 2007. He is also with the Graduate Institute of Communications Engineering, National Taiwan University, since its establishment in 1997. He was a Post-Doctoral Researcher for one year with IBM, East Fishkill, NY. From March 1986 to March 1987, he was a Visiting Scholar with the Electrical Engineering Department, University of California at Los Angeles. From March 2009 to March 2010, he was a Visiting Professor with the Department of Information Technology, Gent University. From May 1998 to April 2000, he was the Director of the National Center for High-Performance Computing, and from November 2002 to July 2004, he was the Directorate General of Planning and Evaluation Department, both under the National Science Council. In 1996, he was an Associate Editor of the Journal of Chinese Institute of Electrical Engineering. His areas of interest include computational electromagnetics, transmission line and waveguide discontinuities, microwave and millimeter-wave passive components, and EM design for advanced packaging and systems. Dr. Wu was an associate editor for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES (2005–2008). He has been an associate editor for the IEEE TRANSACTIONS ON ADVANCED PACKAGING since May 2009. He was chair of the IEEE Taipei Section (2007–2009). He was the recipient of the R10 Outstanding Volunteer Award, the R10 Distinguished Large Section Award, and the MGA Outstanding Large Section Award in 2009. He was also the recipient of the Distinguished Research Award of the National Science Council (1990, 1993, 1995, and 1997), the Outstanding Electrical Engineering Professor Award of the Chinese Institute of Electrical Engineers (1999), and the Best Paper Award of the IEEE TRANSACTIONS ON ADVANCED PACKAGING (2009).

Huei Wang (S’83–M’87–SM’95–F’06) was born in Tainan, Taiwan, on March 9, 1958. He received the B.S. degree in electrical engineering from National Taiwan University, Taipei, Taiwan, in 1980, and the M.S. and Ph.D. degrees in electrical engineering from Michigan State University, East Lansing, in 1984 and 1987, respectively. During his graduate study, he was engaged in research on theoretical and numerical analysis of EM radiation and scattering problems. He was also involved in the development of microwave remote detecting/sensing systems. In 1987, he joined the Electronic Systems and Technology Division, TRW Inc. He has been a Member of Technical Staff and Staff Engineer responsible for MMIC modeling of computer-aided design (CAD) tools, MMIC testing evaluation, and design, and became the Senior Section Manager of the MMW Sensor Product Section, RF Product Center. In 1993, he visited the Institute of Electronics, National Chiao-Tung University, Hsinchu, Taiwan, to teach MMIC-related topics. In 1994, he returned to TRW Inc. In February 1998, he joined the faculty of the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, as a Professor. From 2005 to 2007, he was the Richard M. Hong Endowed Chair Professor of National Taiwan University. Dr. Wang is a member of Phi Kappa Phi and Tau Beta Pi. He was an IEEE Distinguished Microwave Lecturer (2007–2009). He was the recipient of the 2003 Distinguished Research Award presented by the National Science Council, the 2007 Academic Achievement Award presented by the Republic of China Ministry of Education, the 2008 Distinguished Research Award presented by the Pan Wen-Yuan Foundation, and the 2010 National Professorship presented by the R.O.C. Ministry of Education.

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An Ultra-Wideband 80 GHz FMCW Radar System Using a SiGe Bipolar Transceiver Chip Stabilized by a Fractional-N PLL Synthesizer Nils Pohl, Member, IEEE, Timo Jaeschke, Student Member, IEEE, and Klaus Aufinger, Member, IEEE

Abstract—A radar system with an ultra-wide FMCW ramp bandwidth of 25.6 GHz ( 32%) around a center frequency of 80 GHz is presented. The system is based on a monostatic fully integrated SiGe transceiver chip, which is stabilized using conventional fractional-N PLL chips at a reference frequency of 100 MHz. The achieved in-loop phase noise is 88 dBc/Hz (10 kHz offset frequency) for the center frequency and below 80 dBc/Hz in the wide frequency band of 25.6 GHz for all offset frequencies 1 kHz. The ultra-wide PLL-stabilization was achieved using a reverse frequency position mixer in the PLL (offset-PLL) resulting in a compensation of the variation of the oscillators tuning sensitivity with the variation of the -divider in the PLL. The output power of the transceiver chip, as well as of the mm-wave module (containing a waveguide transition), is sufficiently flat versus the output frequency (variation 3 dB). In radar measurements using the full bandwidth an ultra-high spatial resolution of 7.12 mm was achieved. The standard deviation between repeated measurements of the same target is 0.36 m. Index Terms—FMCW, fractional-N synthesizer, millimeter wave, radar system, SiGe bipolar ICs, ultra-wideband.

I. INTRODUCTION

F

OR MANY applications, radar is a cheap and accurate measurement technique. Especially the measurement of distances up to a few 100 m can be performed with a moderate transmit power, which can be generated with integrated circuits. The continuous improvement of silicon technologies enables the integration of various radar components as well as complete transceivers even at mm-waves around 80 GHz. Several mm-wave radar systems consisting of (multiple) chips in III-V compound semiconductors were published (e.g. [1]–[4]) and demonstrated the suitability for several applications. Recently, the first transceiver chips fully integrated in silicon technologies were demonstrated (e.g. [5]–[9]), and even fully integrated radar systems in silicon were shown (see [10]–[14]).

Manuscript received July 04, 2011; revised November 30, 2011; accepted December 01, 2011. Date of publication January 26, 2012; date of current version March 02, 2012. Parts of this work have been supported by the Ministry of Economic Affairs and Energy of the State of North Rhine-Westphalia (Grant 315-43-02/2-005-WFBO-009) and the German Federal Ministry of Education and Research within the project RoCC (FKZ 13N9822). N. Pohl and T. Jaeschke are with Ruhr-Universität Bochum, D-44780 Bochum, Germany (e-mail: [email protected]). K. Aufinger is with Infineon Technologies AG, D-85579 Neubiberg, Germany. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2180398

With these high frequencies around 80 GHz, good antenna focusing can be achieved with compact measurement systems, e.g. for automotive, industrial, or commercial applications. This paper aims at substantial improvements of the resolution and accuracy of radar systems fabricated in mass market technologies to open up new applications and markets. Although a higher azimuthal resolution can be obtained by increasing the carrier frequency, the antenna size, using an array or using SAR techniques, the spatial resolution is directly limited by the bandwidth of the transmitted radar signal: (1) where is the speed of light. The resolution is defined by the theoretical minimum distance for separating two adjacent targets of the same amplitude, corresponding to the 6-dB width of the time signal.1 For example, for the bandwidth GHz of automotive long range radar systems (LRR), this leads to a resolution of 15 cm, and for short range radars (SRR) with GHz, an even higher resolution of cm can be achieved (cp. [16]). It has to be mentioned that for a robust separation of real targets with different amplitudes (e.g. target of different size close to each other), much larger distances of the adjacent targets than are necessary. Additionally, the resolution is further degraded by using window functions (other than a rect/si-pulse) in the radar signal processing, which are typically necessary to be able to detect far targets with substantially smaller amplitudes. The accuracy and reproducibility of radar measurements with single targets is typically several decades better than the achieved resolution. Most of the recently published radar systems with frequencies around 80 GHz are for the automotive frequency band (e.g. [5], [9], [12]–[14]), and thus have a limited bandwidth of up to 4 GHz. In [4] an experimental radar system, based on waveguide components, with 8 GHz bandwidth and a resolution of 18 mm is described, whereas in [10] the record bandwidth of 10 GHz is presented. In this paper an even higher bandwidth of 20 GHz is achieved. II. SYSTEM CONCEPT The block diagram of the proposed radar system is shown in Fig. 1. The high frequency part is fully integrated in a low1For this theoretical resolution limit a rectangular-pulse in the time domain is assumed, which results in a si-pulse in the frequency domain, whereas an FMCW radar system is hard limited in the frequency domain (rectangular window) resulting in a si-pulse in the time domain. If the 6-dB width in the must be multiplied by 1.205 for an FMCW system time domain is used, (cp. [15]).

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Fig. 1. Block diagram of the radar system under investigation: The 80 GHz VCO is stabilized by a fractional-N offset-PLL (PLL1). The frequency of the local oscillator for the offset generation is above the divided 80 GHz VCO (reverse frequency position) and is stabilized by a second PLL (PLL2). Differential signal paths are marked with double lines.

power SiGe monolithic microwave integrated circuit (MMIC). It is mounted in a mm-wave substrate and wire-bonded for connecting the antenna and the additional PLL board. The ultrawideband 80 GHz oscillator is the main signal source of this radar system and is discussed in Section II-A. Adapted to its nonlinear and wide tuning characteristic, a special PLL concept for stabilization and FMCW ramp generation in the complete tuning range of the oscillator is used. It consists of two PLLs and a reverse frequency position downconversion mixer at 24 GHz, which is discussed in Section II-C. The ultra-wideband radar transmit signal around 80 GHz is then fed to the integrated receiver mixer and to the chip output via on-chip Wilkinson dividers. The transceiver chip is presented in Section III. Due to the monostatic configuration, only one mm-wave output using short bond wires and an on-chip matching network has to be realized. The differential output is then combined to a single-ended signal with a rat-race coupler on the mm-wave substrate. Finally a microstrip to waveguide transition (integrated in the mm-wave substrate) is used as a wideband interface to the antenna. The implementation of the radar system is presented in Section IV and its measurement results in Section V. The transceiver chip was fabricated in Infineon’s production technology B7HF200 [17]. At optimum current density, the transistor cutoff frequencies are GHz and GHz. Additionally, this technology offers a varactor diode ( , ) with a special hyperabrupt pn-junction, which is mandatory for an ultra-wideband oscillator with the used PLL concept.2 For a robust operation and reduced parasitic coupling effects, all circuits and interfaces are realized fully differential (cp. [18]). A. 80 GHz Oscillator The 80 GHz VCO used is based on [19] and the schematic is given in Fig. 2. It consists of a differential topology based on a well known concept for mm-wave oscillators [20], [21]. For an ultra-wideband tuning range, two varactor pairs are used at 2As discussed in Section II-C, the non-linear tuning characteristic of a pn-varactor can be excellently compensated using this PLL concept, which would not work with a MOS varactor due to its non-monotonic tuning sensitivity (non). monotonic

Fig. 2. Schematic of the 80 GHz VCO. All high frequency lines are imple) with inductive mented using on-chip transmission lines (microstrip, behavior.

the base and emitters nodes of the main transistors , respectively. Both varactor pairs are simultaneously driven by a single tuning voltage, which simplifies the PLL. The phase noise requirements determine the used tail current of mA. The integrated mixer (see Section III) allows for moderate requirements with respect to the output power of the VCO, so a simple cascode stage is used for the output buffer. In contrast to [19], here no additional bias current (cp. in [19]) is necessary for linearization of the cascode stage, resulting in a total power consumption of 165 mW from a 5 V supply voltage (reduced by 31%), at a sufficiently high output power ( 6 dBm, see Fig. 9 in Section IV) for driving the integrated receive mixer. The oscillator achieves an ultra-wideband measured tuning range (Fig. 3) of GHz at room temperature and GHz even at an ambient temperature of 90 C. This record tuning range is even slightly increased (by 2 GHz) compared to [19]. The smooth nonlinear shape of the tuning characteristic is well-suited for the used PLL loop gain linearization technique presented in Section II-C.

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The variation of a fractional-N frequency divider with a constant reference frequency is commonly used for FMCW ramp generation with high linearity and low phase noise (e.g. [23], [24]). In this concept, a clean XCO can be used directly as the reference frequency.5 Furthermore, with an adequate loop filter, all additional fractional noise can be filtered. C. PLL Concept for Loop Gain Linearization

Fig. 3. Measured tuning characteristic of the 80 GHz VCO at various am. The results were obtained from a chip mounted in bient temperatures the mm-wave substrate.

For the choice of parameters of the PLL loop filter, the loop gain of the complete PLL is an important factor. However, the tuning sensitivity of the VCO as well as the -divider values depend on the current frequency of the FMCW-ramp. Both influence the loop gain: (3)

It is worthwhile to mention that despite the ultra-wide tuning range, the oscillator has a nearly constant performance over the full tuning range. The measured phase noise is as low as 97 dBc/Hz (at 1 MHz offset frequency) at the center frequency of 80 GHz and below 90 dBc/Hz in the full tuning range (cp. Fig. 11 in [19], nearly unchanged in this paper). The differential output power (Fig. 9) is 7 dBm at center frequency and decays only by 1 dB towards the band edges. This constant performance predestines this oscillator for ultra-wideband radar systems with record resolution. B. PLL Design Aspects Generally the overall division factor in the feedback path of a PLL increases the input referred noise floor of the phase-frequency detector (PFD) by a factor of to the in-loop phase noise of the stabilized VCO, therefore the use of a small division factor is an important design goal. For stabilization of mm-wave frequencies, the use of an auxiliary oscillator and a mixer in the PLL (offset-PLL) is therefore a well-known technique. Here, a second PLL-stabilized VCO3 at 24 GHz is used for mixing down the VCO signal after passing a divide-byfour prescaler, which reduces the overall division factor in the main PLL (PLL1 in Fig. 1) considerably.4 With this concept the overall phase noise is typically limited by the second PLL, but as this PLL is working in fixed-frequency mode, it is possible to use a high reference frequency for good phase noise. Furthermore, in a fractional-N PLL a low constant prescaler in the loop is necessary, because it multiplies the variation of the -Divider and thus the pseudo-random fractional noise at the VCO. The output frequency of the 80 GHz VCO is given by (cp. Fig. 2) (2) 3In contrast to other concepts (e.g. [22]), where the local oscillator is based on

a dielectric resonator (DRO), here a PLL is used for less mechanical production effort (placing and aligning the DRO) and better noise performance close to the carrier, thus increasing the long-term stability. 4Here, only the division factor of 4 of the prescaler appears in the main PLL, without the offset mixing a constant prescaler of 12 would have to be used for dividing the frequency of 80 GHz below 7 GHz, which can be handled by conventional fully programmable fractional-N PLL chips.

In the presented offset-PLL concept with reverse frequency position mixing, both dependencies compensate each other (Fig. 4). The tuning characteristic of the 80 GHz VCO under investigation (Fig. 3) has a variation of the tuning sensitivity [see Fig. 4(a)] between 9 GHz/V at the lower end and 1 GHz/V at the upper end. After the 4-prescaler and mixing in reverse frequency position (with 24 GHz), the highest tuning sensitivity appears for the upper end of the frequency range and vice versa [see Fig. 4(b)]. But as the -divider is the highest for high frequencies, in the resulting PLL loop gain (which is proportional to the quotient of both quantities) the highest tuning sensitivity is divided by the highest -value [see Fig. 4(c)], which leads to an excellent linearization of the PLL. With the 80 GHz VCO under investigation the resulting variation of the VCO loop gain is as low as 1:1.2 in an ultra-wide frequency band of 24 GHz, thus the loop filter can be designed for optimal filter characteristic and the gain variation can be neglected, which enables ultra-wideband FMCW frequency ramps. Compared to this, a straight PLL without offset mixing would result in a variation of 10:1 and even more if an offset-PLL with normal frequency position is used. It has to be considered, that some effects in the PLL, which are only influenced by one of both quantities in the loop gain, still vary over the frequency ramp. For example modulation effects of the VCO (especially due to thermal supply noise or noise on the tuning voltage) are still stronger for a higher sensitivity at lower VCO frequencies. Otherwise, the fractional noise is stronger for smaller -values (due to the larger relative -variation), which would dominate at high VCO frequencies. But there the tuning sensitivity and thus the noise modulation is low resulting in constant fractional noise during the frequency ramp. III. TRANSCEIVER CHIP IMPLEMENTATION For a low-power implementation, a single-chip SiGe radar transceiver is used with the block diagram in Fig. 1. The transmitter part of this chip is based on [8]. The main oscillator 5Especially in a PLL with a fixed -Divider and varied reference frequency (e.g. generated from a direct digital synthesizer (DDS)) the suppression of unwanted spurious frequencies within the loop bandwidth can be challenging.

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was obtained. The Gilbert-Cell do not use any LC-resonance circuits. Therefore, the behavior of the noise figure, gain, and compression point is ultra-wideband with less than 3 dB variation in the full frequency band. The conversion gain of 12 dB of the mixer is further increased using an external dc-blocked to 150, depending on IF amplifier with adjustable gain ( the radar scenario and antenna gain). For on-chip matching of the mixer inputs, short series transmission lines with inductive behavior in combination with series DC-block capacitances are used, resulting in an RF-matching below 20 dB and a sufficient LO-matching below 10 dB (simulated, in the full frequency band of interest). B. Receive/Transmit Coupler Structure

Fig. 4. Schematic diagrams for illustration of the PLL linearization technique. The tuning sensitivity of the VCO itself is given in (a). In (b) the tuning sensitivity after 4 and mixing is compared to the necessary frequency divider for reaching the reference frequency of e.g. 25 MHz. Finally, the quotient of the downconverted tuning sensitivity and the -Divider (c) shows a very flat behavior along the full tuning range.

output at 80 GHz is divided by four (dynamic divider) and afterwards mixed down using a second integrated local oscillator (VCO) around 24 GHz (offset-PLL). Additionally, a static 8 frequency divider is used for stabilization of the local oscillator (PLL2). Both control signals for the PLLs are below 7 GHz, which simplifies the interfaces and enables the use of conventional PLL chips. Compared to [8], this 80 GHz oscillator has lower power dissipation at lower output power. All circuits are designed for a single common supply voltage of 5 V (given by the 80 GHz VCO). In the following sections, the receive mixer (Section III-A), coupler structures (Section III-B), mm-wave bond interface (Section III-C) and finally some overall results (Section III-D) are discussed. For further details on the transmitter components see [8]. The development of wideband components, which can utilize the full frequency band of the oscillator with a good overall performance was the main design goal in this work. A. Receive Mixer The receive mixer determines the dynamic range and the transmit/receive power level in a monostatic FMCW radar system. Thus, a wide dynamic range is an important design criterion. Therefore, a fully differential Gilbert-Cell is used. The dynamic range was improved by inductive degeneration in the RF input stage (for details see [25]). This enables a wide dynamic range with a moderate tail current of 9 mA (overall current consumption including bias networks: 13 mA). A noise figure of 12 dB only and a high input referred 1 dB compression point of 1.2 dBm at a LO drive power around 0 dBm (which can easily be generated using the on-chip 80 GHz VCO)

For monostatic radar operation, a passive integrated differential transmit/receive coupler structure is used. Commonly, an integrated rat-race coupler is the concept of choice (e.g. [5], [9]). However, here a combination of Wilkinson dividers is used. This separates the transmit and receive coupler and offers the opportunity to integrate attenuators6 into the transmit path between both Wilkinson dividers in order to prevent compression of the mixer due to strong reflecting targets. The conceptual additional loss of 3 dB of transmit power compared to a single rat-race coupler [5] is acceptable and further reduces possible compression of the mixer and decreases reflections. A transmission line-based Wilkinson divider (e.g. [26]) m with would result in a very large structure high losses. Here, a compact lumped element implementation is realized as a planar is used [Fig. 5(a)]. The inductor spiral inductor [see Fig. 5(b)] with approx. the ideal value pH. The capacitances have to be fF consmaller than the ideal value sidering the substrate capacitances of the spiral inductor. The overall size of the realized structure, including a bounding box, m m. is This results in the EM-simulated S-parameters in Fig. 5(c).7 The loss of the Wilkinson divider is approx. 0.3 dB (additionally to the ideal insertion loss of 3 dB). The matching at all three ports and the decoupling between them is below 17 dB in the full frequency band of interest (68 GHz to 93.6 GHz). C. mm-Wave Bond Matching The realization of an ultra-wideband well matched bond interface considering possible mass production constraints is a challenging design goal. Therefore, the chip (185 m thick) is placed inside a cavity in the mm-wave substrate for short differential bond wires.8 Using these optimized short bond wires 4 dB. Therefore, on-chip two planar results in a matching of spiral inductors, a series capacitance and a transmission line [see Fig. 6(a)] are used for matching the bond inductance and the pad capacitance to a 50 interface on both ports. Additionally, 6Different values of attenuation can be chosen by cutting fuses after fabrication. With this concept it is even possible to integrate an additional amplifier in the transmit path for higher transmit power. 7Simulations of the full divider were performed using the 2.5D EM simulator for the silicon dioxide and a from Sonnet Software Inc. with . copper conductivity of 8The use of differential bond wires drastically reduces its inductive effects due to the resulting symmetry plane (that acts as an electric wall and increases the mutual inductance, cp. [18]).

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Fig. 6. Broadband matching network for bond wire and pad capacitance. (a) Schematic. (b) Simulated S-Parameters. The bond wire and its environment were simulated using a full 3D EM-Solver (CST Microwave Studio) with different wire lengths.

Fig. 5. Compact Wilkinson divider consisting of lumped elements. (a) Simplified schematic. (b) Realization with compact spiral inductors. (c) Simulated S-parameters (due to symmetry only four of the nine curves are plotted).

the inductance to ground can be used for biasing or—as done here—for ESD protection of the sensitive mm-wave interface. The structure is optimized for various bond wire lengths using numerical Monte-Carlo techniques. The resulting values for matching in Fig. 6(b) are excellent, with an insertion loss of 1.2 dB, for the intended bond wire length of 300 m 15 dB in the full band) and stays below 10 dB for a wide ( variation of bond wires length between 200 m and 400 m.

Fig. 7. Photograph of the realized 80 GHz transceiver chip. The overall chip size is 1.9 mm 1.6 mm (given by the number of pads).

D. Results A photograph of the complete transceiver chip is given in Fig. 7. It occupies 3 mm , defined by the necessary padframe. Additional to the necessary RF-interfaces (cp. Fig. 1) and bias pads, many additional pads for testing are included. The largest circuits are both oscillators and the receive mixer, whereas the area occupied by the frequency dividers, PLL-mixers, Wilkinson dividers and matching is nearly negligible. Due to the low power implementation, the complete power consumption of the transceiver chip is below 0.5 W (Table I)—a quite low value for a radar transceiver at frequencies around 80 GHz.

IV. IMPLEMENTATION OF THE RADAR SYSTEM The transceiver chip is placed in a mm-wave substrate (Rogers RT/duroid 5880, 127 m thick, Fig. 8), which is mounted on a brass block for enhanced mechanical stability and thermal conductivity. The differential 80 GHz interface of the transceiver is combined using a rat-race coupler and is finally fed to a waveguide port (WR10), which is realized using the mm-wave substrate and brass block with an aluminum lid placed above the waveguide (upper left corner of Fig. 8). For radar measurements, various standard horn antennas can be

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TABLE I OVERVIEW OF THE CURRENT CONSUMPTION AND POWER DISSIPATION OF THE COMPONENTS ON THE TRANSCEIVER CHIP

Fig. 9. Output power of the VCO, transceiver-chip and the complete radar system at the waveguide port (WR-10). VCO and chip outputs were measured on-wafer, whereas the waveguide output was measured using the mounted chip in the mm-wave substrate.

Fig. 10. Photograph of the PLL board. Connectors on the backside are used for connecting the mm-wave module. Fig. 8. Photograph of the mm-wave module. The chip and the mm-wave substrate are mounted on a brass block.

connected to the mm-wave module. Additionally, a low-noise IF-amplifier and PLL-connectors are mounted on the substrate. For characterization of the realized mm-wave module the output power at the waveguide port was measured and compared with the output power of the VCO and the transceiver chip (see Fig. 9).9 The VCO delivers a quite high and flat output power between 6 and 7 dBm in the full frequency range. Due to the losses of two Wilkinson dividers, transmission lines, and the interface matching, the output power of the transceiver chip is attenuated by 8 dB and varies between 3 and 1 dBm. Finally, the output power at the waveguide port is around 4 dBm and varies only by 3 dB in the complete ultra-wide frequency band of 26.5 GHz. The implementation of the PLL is based on conventional PLL chips on an additional FR4 board (see Fig. 10). For the 80 GHz PLL and the 24 GHz PLL, the Hittite ICs HMC701 and HMC704 were used, respectively. They consist of a fractional frequency divider, a low noise phase frequency detector, control blocks and (in case of the HMC701) an integrated fractional sweep generator. Both PLLs use a higher order active loop filter based on a low noise operational amplifier (LT6202).10 The 24 bit fractional-N architecture allows for frequency steps as fine as 8 Hz and almost any desired frequency ramp duration from less than 1 ms up to more than 1 s. 9The frequency ranges of the curves differ, due to higher self heating in the on-chip measurements (VCO, Chip). Additionally, the matching network for the on-chip measurements had to be adjusted, which makes a complete comparison difficult. 10This

filter uses an additional supply voltage (9.5 V) for generating the necessary high tuning voltage for the VCO.

The 24 GHz PLL limits the overall phase noise performance. To minimize its influence, we applied the maximum possible full XCO frequency of 100 MHz in an integer-N fixed frequency PLL. Its 4th order loop filter is chosen for optimal noise performance with a loop bandwidth of 740 kHz at 4th order. For the demanding 80 GHz PLL, a 5th order RLC loop filter with a loop bandwidth of 430 kHz and a reference frequency of 33 MHz was used.11 The simulated12 phase noise of the 80 GHz VCO at center and its noise contributions are plotted in Fig. 11. Close to the carrier (below 100 kHz), the phase noise is limited by the 24 GHz VCO.13 For higher offset frequencies, the phase noise is dominated by the phase noise of the 80 GHz VCO itself. A slight influence of the fractional noise ( ) can be seen for offset frequencies around 2 MHz, as the suppression of the loop filter is not strong enough in this region. All other noise contributions can be neglected. The overall phase noise is below 80 dBc/Hz for all offset frequencies 1 kHz. For a perfectly constant open loop transfer function (cp. Section II-C), the three dominating curves in this diagram stay constant during the frequency ramp. However, for the real oscillator described in Section II-A the increased phase noise especially at lower oscillation frequency (approx. by 7 dBc/Hz) has to be considered. Additionally, the thermal noise of the loop 11A higher reference frequency is advantageous for reducing the phase noise but limits the frequency bandwidth of the PLL using the minimum possible -divider value (cp. (2)). 12The noise simulations were done using the phase noise simulator provided by Hittite Microwave Corporation. 13Further noise improvement can thus be achieved, if for the fixed frequency 24 GHz PLL, a much higher reference frequency is used (e.g. 1 GHz), resulting in higher effort and current consumption.

POHL et al.: AN ULTRA-WIDEBAND 80 GHz FMCW RADAR SYSTEM USING A SiGe BIPOLAR TRANSCEIVER CHIP

Fig. 11. Simulation of the phase noise contributions of the 80 GHz oscillator and the total noise. TABLE II OVERVIEW OF THE POWER DISSIPATION OF THE RADAR SYNTHESIZER

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Fig. 13. Measured spectrum at the mm-wave output around the center fre. The measurements were perquency in fractional mode formed using a spectrum analyzer (Agilent 8565E) with an external downconversion mixer (Agilent 11970W).

Fig. 14. Phase noise measurements of the stabilized VCO in the fractional-N PLL. The phase noise was measured using a spectrum analyzer at the 4 output by adding 12 dB. For each point of the curve four measurements are averaged.

Fig. 12. Photograph of the complete radar system using a standard horn antenna at the waveguide port.

filter is increased for higher tuning sensitivity (low oscillation frequencies) and the PFD noise increases with high -divider values (also low oscillation frequencies). Furthermore, there is a 16 bit analog-to-digital converter with 1 MSample/s (ADS8329) for digitizing the received signals, some control logic, an USB interface to a computer and power supply circuits on the PLL-board. The signal processing is done in the computer. In Table II the power dissipation of the components of the radar system is given. The total power dissipation is below 1.5 W for the complete radar system. Here, only the power dissipation of the components shown in Fig. 1 is considered excluding overhead for the supply voltage generation. A photograph of the complete system including the mm-wave module, the PLL board and a horn antenna is shown in Fig. 12. V. SYSTEM RESULTS For the results presented in this section the frequency of the offset-VCO is chosen as 24.8 GHz, allowing for a frequency range of 25.6 GHz. Compared to Fig. 4 the frequency range is

further increased at the cost of a moderately increased variation of the PLLs loop gain. However, it is still below 2:1. The frequency ramp duration was chosen to be 4 ms, which results in a high ramp slope of 6.6 GHz/ms. Fig. 13 shows a measured spectrum of the 80 GHz output without any spurious signals or disturbances. The measured phase noise of the PLL-stabilized 80 GHz VCO is given in Fig. 14 for various frequencies. The in-loop phase noise is between 90 and 85 dBc/Hz for the center frequency, which matches well to the simulations (cp. Fig. 11), and is nearly unchanged for high output frequencies of 90 GHz and even 93.6 GHz. For low output frequencies, the in-loop phase noise is slightly increased14 with a small rise around the loop bandwidth due to reduced phase margin, but it still stays below 80 dBc/Hz.15 All together, the phase noise is very low and constant in the full frequency range of the VCO (cp. [11], [14]). Only in [13] a comparable phase noise was achieved using a much higher reference frequency of 700 MHz. Thus, this radar system is well suited for stable radar measurements with a high dynamic range even with very fast frequency ramps. In Fig. 15, the received IF signal of a measurement setup with one corner reflector as a strong target is given. A fast monotone oscillation can be surmised, as expected for this scenario. The 14The increased phase noise results partially from the increased filter noise due to the higher tuning sensitivity of the VCO. 15Due to divider value limitations of the used PLL synthesizers, for full bandwidth operation, the auxiliary oscillator was chosen as 24.8 GHz, which is not the optimum for PLL linearization (see Section II-C). This increases the loop gain variation from 1:1.2 (as in Section II-C) to 1:1.7, resulting in a reduced phase margin at lower frequencies.

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Fig. 15. Measured IF signal using the full 25.6 GHz bandwidth.

Fig. 17. Deviation of multiple distance measurements (compared to the mean value). A simple pulse center algorithm was used for signal processing.

outperforms the state of the art [3], [4], [10] and shows that the ultra-wide bandwidth of the presented radar system is almost completely usable. To increase the dynamic range (especially better detection of small targets in the vicinity of large targets), typically window functions (e.g. Hann, Blackmann window) are used, which reduce the resolution. However, even with a Hann window the resolution is still 11.69 mm. Typically the repeatability of mono target radar measurements is much better than the resolution, as it mainly depends on the achieved phase noise. One hundred distance measurements of the same target were performed (Fig. 17), determining the position of the target with a simple pulse center algorithm. The deviation of the measured distance to the average distance is plotted. The maximum deviation is below 1 m with an excellent standard deviation of 0.36 m.

Fig. 16. Spectrum of the measured IF signal (Fig. 15) in the range up to 3 m (a) and a detailed view of the target (b). No window function or amplitude correction is applied. A corner reflector is placed 2 m behind the antenna. The achieved resolution (6 dB-width) of 7.12 mm is close to the ideal value of 7.05 mm.

envelope of the IF signal varies due to interfering reflections of the antenna, but it is very flat in the frequency range, which corresponds to the low variation of output power and conversion gain. Only after the spectrum [Fig. 16(a)] of this signal is derived from a simple discrete Fourier transformation (no window function or amplitude correction is used) it reveals the radar scenario. In close distance (below 0.1 m) the reflections of the used horn antenna can be seen. A strong and narrow target is located approximately 2 m behind the antenna. The detailed view of the target [Fig. 16(b)] shows a good agreement of the main lobe with the ideal si-pulse, which let expect a sufficiently high ramp linearity. The 6-dB width, defined as the spacial resolution of the system, is 7.12 mm, which is very close to the theoretical value of 7.05 mm for this bandwidth using a rectangular window in the frequency domain. Ringing after the main lobe is caused by a non-ideal corner reflector. This ultra high resolution clearly

VI. CONCLUSION In this paper, several techniques of radar systems with an ultra-wide bandwidth are discussed. Especially the use of an offset-PLL with a mixer in reverse frequency position enables to compensate the variation of the oscillators loop gain with the variation of the -divider for fractional frequency ramps. The mm-wave transceiver components of the 80 GHz radar system are full integrated on a SiGe chip, achieving an ultra-wide frequency bandwidth of 26.5 GHz, whereof 25.6 GHz can be stabilized in the PLL. A very constant performance of phase noise and output power was reached in the full system bandwidth due to carefully optimized ultra-wideband components. Overall, the radar system achieves an outstanding spatial resolution of 7.12 mm, which is in the region formerly only achievable using laser or ultrasonic techniques. The stability of the measured distance shows an excellent standard deviation as low as 0.36 m. ACKNOWLEDGMENT The authors would like to thank Infineon Technologies AG and its staff members for fabricating the chips, and H.-M. Rein and T. Musch for their helpful discussion regarding the realization of the integrated circuits and the PLL. REFERENCES [1] C. Metz, J. Grubert, J. Heyen, A. F. Jacob, S. Janot, E. Lissel, G. Oberschmidt, and L. C. Stange, “Fully integrated automotive radar sensor with versatile resolution,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 12, pp. 2560–2566, 2001.

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[2] A. Tessmann, S. Kudszus, T. Feltgen, M. Riessle, C. Sklarczyk, and W. H. Haydl, “Compact single-chip W-band FMCW radar modules for commercial high-resolution sensor applications,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 12, pp. 2995–3001, 2002. [3] H. Essen, O. Konrad, A. Wahlen, and R. Sommer, “COBRA 94—Ultra broadband experimental radar for ISAR applications,” in Proc. Joint 30th Int. Conf. Infrared and Millimeter Waves and 13th Int. Conf. Terahertz Electronics IRMMW-THz 2005, 2005, vol. 2, pp. 355–356. [4] H. Essen, G. Biegel, R. Sommer, A. Wahlen, W. Johannes, and J. Wilcke, “High resolution tower-turntable ISAR with the millimetre wave radar COBRA (35/94/220 GHz),” in Proc. 7th European Conference on Synthetic Aperture Radar (EUSAR), 2008. [5] H. P. Forstner, H. Knapp, H. Jäger, E. Kolmhofer, J. Platz, F. Starzer, M. Treml, A. Schinko, G. Birschkus, J. Böck, K. Aufinger, R. Lachner, T. Meister, H. Schäfer, D. Lukashevich, S. Boguth, A. Fischer, F. Reininger, L. Maurer, J. Minichshofer, and D. Steinbuch, “A 77 GHz 4-channel automotive radar transceiver in SiGe,” in Proc. IEEE Radio Frequency Integrated Circuits Symp. RFIC 2008, 2008, pp. 233–236. [6] S. T. Nicolson, K. H. K. Yau, S. Pruvost, V. Danelon, P. Chevalier, P. Garcia, A. Chantre, B. Sautreuil, and S. P. Voinigescu, “A low-voltage SiGe BiCMOS 77-GHz automotive radar chipset,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 5, pp. 1092–1104, 2008. [7] F. Starzer, A. Fischer, H. P. Forstner, H. Knapp, F. Wiesinger, and A. Stelzer, “A fully integrated 77-GHz radar transmitter based on a low phase-noise 19.25-GHz fundamental VCO,” in Proc. IEEE Bipolar/ BiCMOS Circuits and Technology Meeting (BCTM), 2010, pp. 65–68. [8] N. Pohl, T. Klein, K. Aufinger, and H.-M. Rein, “A low-power 80 GHz FMCW radar transmitter with integrated 23 GHz downconverter VCO,” in Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 2011. [9] R. Feger, C. Wagner, S. Schuster, S. Scheiblhofer, H. Jager, and A. Stelzer, “A 77-GHz FMCW MIMO radar based on an SiGe single-chip transceiver,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 5, pp. 1020–1035, 2009. [10] S. T. Nicolson, P. Chevalier, B. Sautreuil, and S. P. Voinigescu, “Single-chip W-band SiGe HBT transceivers and receivers for doppler radar and millimeter-wave imaging,” IEEE J. Solid-State Circuits, vol. 43, no. 10, pp. 2206–2217, 2008. [11] D. Salle, C. Landez, P. Savary, G. Montoriol, R. Gach, H. Li, and A. Ghazinour, “A fully integrated 77 GHz FMCW radar transmitter using a fractional-N frequency synthesizer,” in Proc. European Radar Conf. EuRAD 2009, 2009, pp. 149–152. [12] S. Trotta, B. Dehlink, A. Ghazinour, D. Morgan, and J. John, “A 77 GHz 3.3 V 4-channel transceiver in SiGe BiCMOS technology,” in Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting BCTM 2009, 2009, pp. 186–189. [13] J. Lee, Y.-A. Li, M.-H. Hung, and S.-J. Huang, “A fully-integrated 77-GHz FMCW radar transceiver in 65-nm CMOS technology,” IEEE J. Solid-State Circuits, vol. 45, no. 12, pp. 2746–2756, 2010. [14] T. Mitomo, N. Ono, H. Hoshino, Y. Yoshihara, O. Watanabe, and I. Seto, “A 77 GHz 90 nm CMOS transceiver for FMCW radar applications,” IEEE J. Solid-State Circuits, vol. 45, no. 4, pp. 928–937, 2010. [15] F. J. Harris, “On the use of windows for harmonic analysis with the discrete Fourier transform,” Proc. IEEE, vol. 66, no. 1, pp. 51–83, 1978. [16] H. L. Bloecher, J. Dickmann, and M. Andres, “Automotive active safety & comfort functions using radar,” in Proc. IEEE Int. Conf. Ultra-Wideband ICUWB 2009, 2009, pp. 490–494. [17] R. Vytla, T. Meister, K. Aufinger, D. Lukashevich, S. Boguth, H. Knapp, J. Böck, H. Schäfer, and R. Lachner, “Simultaneous integration of SiGe high speed transistors and high voltage transistors,” in Proc. IEEE BCTM, Amsterdam, The Netherlands, Oct. 2006, pp. 61–64. [18] H.-M. Rein and M. Möller, “Design considerations for very-high-speed Si-bipolar IC’s operating up to 50 Gb/s,” IEEE J. Solid-State Circuits, vol. 31, no. 8, pp. 1076–1090, 1996. [19] N. Pohl, H.-M. Rein, T. Musch, K. Aufinger, and J. Hausner, “SiGe bipolar VCO with ultra-wide tuning range at 80 GHz center frequency,” IEEE J. Solid-State Circuits, vol. 44, no. 10, pp. 2655–2662, Oct. 2009. [20] H. Li, H.-M. Rein, T. Suttorp, and J. Böck, “Fully integrated SiGe VCOs with powerful output buffer for 77-GHz automotive radar systems and applications around 100 GHz,” IEEE J. Solid-State Circuits, vol. 39, no. 10, pp. 1650–1658, 2004.

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[21] N. Pohl, H.-M. Rein, T. Musch, K. Aufinger, and J. Hausner, “Investigation and reduction of frequency pulling in SiGe mm-wave VCOs at limited power consumption,” in Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 2010, pp. 69–72. [22] H. P. Forstner, H. D. Wohlmuth, H. Knapp, C. Gamsjäger, J. Böck, T. Meister, and K. Aufinger, “A 19 GHz DRO downconverter MMIC for 77 GHz automotive radar frontends in a SiGe bipolar production technology,” in Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting BCTM 2008, 2008, pp. 117–120. [23] T. Musch, I. Rolfes, and B. Schiek, “A highly linear frequency ramp generator based on a fractional divider phase-locked-loop,” IEEE Trans. Instrum. Meas., vol. 48, no. 2, pp. 634–637, 1999. [24] T. Musch and B. Schiek, “Measurement of the ramp linearity of extremely linear frequency ramps using a fractional dual loop structure,” IEEE Trans. Instrum. Meas., vol. 50, no. 2, pp. 389–392, 2001. [25] C. Bredendiek, N. Pohl, T. Jaeschke, K. Aufinger, and A. Bilgic, “A highly-linear low-power down-conversion mixer for monostatic broadband 80 GHz FMCW-radar transceivers,” in Progress In Electromagnetics Research Symposium (PIERS), 2012, accepted for publication. [26] S. Horst, R. Bairavasubramanian, M. M. Tentzeris, and J. Papapolymerou, “Modified Wilkinson power dividers for millimeter-wave integrated circuits,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 11, pp. 2439–2446, 2007.

Nils Pohl (S’07–M’11) was born in Aachen, Germany, in 1980. He studied electrical engineering at the Ruhr-University Bochum, where he received the Dipl.-Ing. and Dr.-Ing. degrees in 2005 and 2010, respectively. From 2006 to 2011, he was a Research Assistant with the Institute of Integrated Systems, Ruhr-University Bochum working on system concepts and integrated circuits for mm-wave radar applications and antenna design. In 2011 he became assitant professor for Integrated Systems at the Ruhr-University Bochum. His current fields of research are concerned with frequency synthesis, millimeter wave radar systems around 80 GHz and above. Prof. Pohl is a member of the VDE and ITG. Timo Jaeschke (S’07) was born in Hattingen, Germany, in 1984. He received the Dipl.-Ing degree in electrical engineering at the Ruhr-University Bochum in April 2011. Since May 2011, he has been a Research Assistant with the Institute of Integrated Systems, Ruhr-University Bochum. His current fields of research are concerned with frequency synthesis, fractional-N PLLs, integrated ultra wideband radar systems, high resolution SAR imaging and antenna arrays for various applications. Dipl.-Ing. Jaeschke is a member of VDE, ITG, and DGON. Klaus Aufinger (M’10) was born in Kirchbichl, Austria, in 1966. He received the diploma and the Ph.D. degrees in physics from the University of Innsbruck, Austria, in 1990 and 2001, respectively. From 1990 to 1991, he was a Teaching Assistant with the Institute of Theoretical Physics, University of Innsbruck. In 1991, he joined the Corporate Research and Development of Siemens AG, Munich, Germany, where he investigated noise in submicron bipolar transistors. Now he is with Infineon Technologies, the former semiconductor group of Siemens, Munich, working in the field of device physics, technology development and modeling of advanced SiGe technologies for high-speed digital and analog circuits.

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Flip-Chip-Assembled -Band CMOS Chip Modules on Ceramic Integrated Passive Device With Transition Compensation for Millimeter-Wave System-in-Package Integration Hsin-Chia Lu, Member, IEEE, Che-Chung Kuo, Student Member, IEEE, Po-An Lin, Student Member, IEEE, Chen-Fang Tai, Yi-Long Chang, Student Member, IEEE, Yu-Sian Jiang, Jeng-Han Tsai, Member, IEEE, Yue-Ming Hsin, Senior Member, IEEE, and Huei Wang, Fellow, IEEE Abstract—In this paper, -band flip-chip-assembled CMOS chip modules with transition compensation are presented, a three-stage amplifier, a balanced amplifier, and a down-converted Gilbert-cell subharmonic mixer are included in the chip set. The flip-chip process on ceramic integrated passive devices (CIPD) 30 m 27 m is developed for with a bump size of 30 m millimeter-wave applications. Without the flip-chip transition compensation, the frequency of the return loss of each chip is shifted, which deviates from the bare die measurement results. By applying the compensation network in the transition, the dips of the return loss are tuned back closer to the bare die measure-band amplifier flip-chip-assembled ment results. Moreover, a -band with a CPW-fed Yagi–Uda antenna on a CIPD and a flip-chip-assembled receiver are presented for SiP integration. The effect of dicing edge variation is also included in the flip-chip model to achieve reasonable agreement between simulated and measured scattering parameters. To the best of our knowledge, this is the first demonstration of a CMOS chip set with flip-chip -band for a system-in-package. interconnects in the Index Terms—CMOS, flip-chip, millimeter wave,

-band.

I. INTRODUCTION YSTEM-IN-PACKAGE (SiP) is an important topic for low-cost and heterogeneous process integration besides the SoC. Flip-chip interconnects are an attractive solution to

S

Manuscript received July 02, 2011; revised October 23, 2011; accepted October 26, 2011. Date of publication January 12, 2012; date of current version March 02, 2012. This work was supported in part by the National Science Council of Taiwan, R.O.C., under Contract NSC 98-2219-E-002-005, Contract NSC 98-2219-E-002-010, Contract NSC 98-2221-E-008-112-MY2, and Contract NSC 98-2221-E-002-059-MY3, National Taiwan University under Excellent Research Project 98R0062-01 and Project 98R0062-03. P.-A. Lin and Y.-M. Hsin are with Department of Electrical Engineering, National Central University, 32001 Jhong-li, Taiwan. H.-C. Lu is with the Department of Electrical Engineering, Graduate Institute of Electronics Engineering and Graduate Institute of Communication Engineering, National Taiwan University, Taipei 106, Taiwan (e-mail: [email protected]). C.-C. Kuo, Y.-L. Chang, Y.-S. Jiang and H. Wang are with the Department of Electrical Engineering and Graduate Institute of Communication Engineering, National Taiwan University, Taipei 106, Taiwan (e-mail: [email protected]. tw). C.-F. Tai was with the Department of Electrical Engineering and Graduate Institute of Communication Engineering, National Taiwan University, 106 Taipei, Taiwan. He is now with High Tech Computer (HTC) Corporation, Taoyuan 330, Taiwan. J.-H. Tsai is with the Department of Applied Electronics Technology, National Taiwan Normal University, 10617 Taipei, Taiwan. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2176747

connect monolithic microwave integrated circuits (MMICs) on the packaging substrate with good electrical performance and low cost compared with a conventional wire-bond technique. However, while the operating frequencies move into the millimeter-wave regime, the parasitic effects from the flip-chip bumps may degrade circuit performance. Suitable compensation networks can be utilized to improve the input and output matching. The simulated return loss was improved with compensation network up to 70 GHz [1]. Another approach is to design a flip-chip interconnect as part of the amplifiers, such as the 60- and 79-GHz GaAs high-electron mobility transistor (HEMT) amplifiers reported in [2] and [3]. Unfortunately, on-wafer measurement cannot be used to characterize these amplifiers directly since the matching conditions are changed at the IC pads. Optimized compensation networks for flip-chip interconnects from thin-film microstrip line on ceramic to thru line were implemented on a GaAs chip in [4]. A flip-chip-assembled 38-GHz amplifier with a compensation network is close to its on-wafer measurement results [4]. The compensation networks were also utilized for a 60-GHz pHEMT power amplifier (PA) [5]. However, only few flip-chip-assembled CMOS amplifiers in the -band are reported. The -band compensation network using coplanar waveguides (CPWs) can provide a performance similar to that of the on-wafer measurement. A flip-chip process with a small bump size of 30 m 30 m 27 m for millimeter-wave applications and postprocessing of CMOS pads for flip-chip assembly are developed in [6]. The flip-chip-assembled CMOS -band chip set using transition compensation networks are demonstrated in this paper. A single-ended amplifier, a balanced amplifier, and a down-conversion Gilbert-cell mixer are included in the chip set. Moreover, transmitters and receivers with antennas on a ceramic integrated passive device (CIPD) using flip-chip interconnect are also presented. Because there is variation on the dicing edge, its effect is included in the flip-chip model to achieve reasonable agreement between simulated and measured scattering parameters. To the best of our knowledge, this is the first demonstration of a CMOS chip set using flip-chip interconnect in millimeter-wave frequencies. This paper is organized as follows. The introduction of the flip-chip process and the postprocess of a CMOS chip are given in Section II. The equivalent circuit model extraction is described in Section III, the measurement and modeling results of CMOS flip-chip assembled chip set are reported

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LU et al.: FLIP-CHIP-ASSEMBLED

-BAND CMOS CHIP MODULES ON CIPD WITH TRANSITION COMPENSATION

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Fig. 2. Photographs and vertical structure of flip-chip bump (not to scale).

Fig. 1. Process flow of CIPD for flip-chip bump formation (not to scale).

in Section IV, and CMOS chips flip-chip-assembled with -band transmitter and a CPW-fed Yagi–Uda antenna for receiver application are demonstrated. Finally, Section V concludes this paper. II. DESCRIPTION OF FLIP-CHIP PROCESS POSTPROCESS OF CMOS CHIPS [6]

AND

A. Flip-Chip Bump Formation Process The flip-chip bumps can be developed on either the chip side or the carrier substrate side. Some flip-chip processes use the gold stub derived from ball bond. This formation method suffers in the serial process, and the size of the stub still causes parasitic electrical effect in the MMW region. For the millimeter-wave applications, the size of the flip-chip bump is suggested to be smaller than 50 50 m in [7], however, the flip-chip bump in this scale is not reported for the CMOS circuits package application. The photoresist lithography is an effective fabrication method for bump formation in this scale. The electro-plating method is adopted in this work due to the compatibility with the thin film process. The material of bump is Cu, since Cu electro-plating is commonly used in printed circuit board (PCB) manufacturing, and Cu is relatively low in cost compared with Au. The CIPD process flow is shown in Fig. 1. The ceramic with thickness of 350 m is cleaned first, and Ti/Au is evaporated on the ceramic for the layout. The BCB polymer is then grown by spin coater for passivation. Ti/Au is evaporated again to be the seed layer for electro-plating, and the thick photoresist AZ4620 is developed and lithography for the bump definition. The thin-film resistor and MDM capacitor are also provided. The Cu is electro-plated for the bump, and Sn is also grown by plating on the top surface of the bump. The Sn is used for adhesion during the flip-chip assembly process. In the last step, photoresist has been stripped and the seed layer is wet etched by using hydrofluoric acid. The photographs and detailed side-view

Fig. 3. (a) Illustration of gap or bad contact. (b) Ti-Au is evaporated to increase pad metal thickness for better flip-chip assembly (not to scale).

structure of the flip-chip bump are shown in Fig. 2. Since we use 50 m 50 m pad size on chip, we select a bump size of 30 m 30 m. The height of the bump is limited by the thickness of the photoresist. Thus, we choose 27 m in height. We can see in Section II-B that this bump with compensation network can achieve good performance at 94 GHz. B. Postprocess of CMOS Chips Since the surface of the top metal is lower than the passivation, due to the misalignment or vibration during flip-chip bonding, there might occur a gap or bad contact, as shown in Fig. 3(a). This gap or bad contact will degrade the circuit performance. Moreover, the Al in CMOS may be oxidized, which will block the dc signal. To resolve these issues, the thickness of the top metal of the CMOS chip is increased by evaporation until the surface of the top metal is higher than the passivation. Before the metal evaporation, nitric acid is used for the pads cleaning or de-oxidation. Since the surface of the CMOS top metal is higher than the passivation, the flip-chip bumps are more reliably adhered to pads, as shown in Fig. 3(b). The type of flip-chip bonding is thermal compression. The flip-chip bonding temperature is 280 C with 1-N downward force and 30 s of bonding time.

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Fig. 4. (a) Top view and side view of flip-chip-mounted GaAs CPW line on CIPD. (b) Chip photograph of flip-chip-assembled CPW line. (c) Diagram of the -parameters comparison for model extraction.

Fig. 5. Equivalent circuit of flip-chip interconnection.

TABLE I EXTRACTED COMPONENT VALUE FOR FLIP-CHIP INTERCONNECTION

Fig. 6. Measured and simulated (a) tracted bump model.

III. EQUIVALENT CIRCUIT OF FLIP-CHIP BUMP [6] For the bump model extraction, a 500- m-long 50- test CPW thru line on GaAs is used, and this thru line is flip-chip assembled to the CIPD for the model extraction, as shown in Fig. 4(a)–(b). The flip-chip bump is extracted by using -parameters comparison between a measured thru line on GaAs with equivalent circuit model and measured flip-chip GaAs line assembled to CIPD, as shown in Fig. 4(c). The two-port -parameters are measured by Agilent E8361C PNA with N5260A millimeter-wave controller. For the chip die on-wafer measurement, the 100- m pitch GSG is used; while 150- m pitch probe is used for measurement on the CIPD. Standard SOLT calibration with CS-5 cal-substrate from Cascade Microtech is adopted for calibration. The extracted model is shown in Fig. 5. The initial values of parameters are found from [8], and the final extracted values of model are obtained by -parameters fitting, which are listed in Table I. Fig. 6 shows the measured and simulated results of the flip-chip assembled CPW line. These curves in Fig. 6 show good match of insertion loss and return loss. The flip-chip-assembled thru line has about 1.4-dB loss at 94 GHz.

and (b)

of thru line using the ex-

IV. FLIP-CHIP MODEL AND TRANSITION ANALYSIS -BAND APPLICATION

FOR

In this paper, the flip-chip interconnections are adopted for the CMOS -band chip set demonstration. The interconnection will cause the frequency shift at -band region, therefore the compensation is required to improve the electrical performance. The high impedance compensation is adopted for the transition compensation. The requirement of high impedance compensation is briefly explained in Fig. 7. The impedance trace of input port is plotted in Smith chart. When the transition equivalent circuit model in Fig. 5 is terminated by 50 at 94 GHz, the input impedance is shifted from point A to point B, C, and D. Therefore, inductive or high-impedance transmission line is required for impedance match from point D back to point A. The total effective impedance of the transition from point D to the transition in Fig. 7 can be roughly estimated by [10]

(1)

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-BAND CMOS CHIP MODULES ON CIPD WITH TRANSITION COMPENSATION

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Fig. 9. Modified model of the flip-chip transition.

Fig. 7. Impedance traces for high-impedance compensation at 94 GHz.

Fig. 10. (a) Schematic for S11 simulation using modified model and (b) the with different C in the range from to 10 fF that account simulated for the chip dicing variation. The dip frequency variation is also about 10 GHz.

Fig. 8. (a) Dicing space of the chip and (b) simulation results of a flip-chip CPW line by dicing space variation .

The transition presents a capacitance, and therefore a high-impedance transmission line is required for impedance match. The required length of the high-impedance transmission can be obtained by line (2) where is the phase velocity, of the phase number, is the characteristic impedance of the high-impedance transmisis the system impedance and effective extra sion line, and capacitance of the transition is calculated by (3) is about 31 fF, and is calculated to be 62 Here, at 94 GHz by at 70 . Finally, the initial length of the compensation CPW line is around 220 m on CIPD.

The dicing edge of the chip influences the transition electrical property as proposed in [7] from simulation. Unfortunately, the return loss performance is sensitive to the dicing of the chip in such a high frequency as 94 GHz. This phenomenon is verified by 3-D electromagnetic (EM) full-wave simulator ANSYS High Frequency Structural Simulator (HFSS) [11]. The simulation results of a flip-chip CPW line are shown in Fig. 8. The curves are varied by the dicing space of the chip . It is obvious that a frequency shifting of in the range of 10 GHz is caused by 20 m of . For this range of frequency shifting, the original flip-chip model can be modified to Fig. 9 by adding an additional shunt capacitor C at substrate side. The calculated results by using the modified model with a flip-chip CPW line are shown in Fig. 10. The frequency shifting from 82 to with a range of to 10 fF. 93 GHz can be predicted by can Since the dicing space variation is inevitable, therefore be used to fit measured and simulated results. On the other hand, the dicing spacing should be included in the flip-chip interconnect design and good repeatability at dicing edge is required to maintain a stable matching frequency response.

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Fig. 11. Block diagram of the flip-chip-assembled -band CMOS amplifier with the bump compensation network and equivalent circuit for the bump.

Fig. 13. On-wafer measured scattering parameters of the bare die CMOS amplifier from 75 to 100 GHz.

-band

Fig. 12. Top view and side view of the flip-chip-assembled -band CMOS and equal to zero amplifier on a CIPD with compensation network. when CPW is directly connected to a CMOS chip without compensation network.

V. EXPERIMENT RESULTS OF FLIP-CHIP-ASSEMBLED CMOS CHIP SET The -band CMOS chip set for this flip-chip-assembled demonstration is fabricated in a commercial standard bulk 90-nm 1P9M CMOS process that supports the RF-device, -band circuits ultrathick metal, and MiM capacitor. Three are demonstrated in this section, including measured results of the bare die; the flip-chip assembled without compensation and the flip-chip assembled with compensation are reported. Moreover, the simulated results by using original and modified model that includes the effect of dicing space variation are also presented with the measured results for comparison. A. Performance of Flip-Chip-Assembled Amplifier [6]

-Band CMOS

The first circuit is a three-stage cascode amplifier [12]. Fig. 11 shows the block diagram of CMOS flip-chip assembled on a CIPD. A simple compensation network is implemented in the CPW G-S-G pad on the ceramic, and the equivalent circuit of the bump is illustrated in the dotted line box. Fig. 12 shows the CMOS amplifier with the flip-chip bump connected to ceramic. of 50 m and the gap of 25 m in The signal line width the CPW shown in Fig. 12 are selected to achieve 50 on CIPD, while and are the gap and length of the high-impedance compensation network. The on-wafer measured scattering parameters of the -band 2V CMOS amplifier bare die with the bias condition of

Fig. 14. Measured and simulated scattering parameters of the flip-chip-assembled amplifier without transition compensation. Measured and simulated results by using original transition model are represented by black and gray lines, respectively.

and 7-mA current for each stage are shown in Fig. 13. The return losses are greater than 10 dB and small-signal gain is 12.5 dB at 94 GHz. The measured -parameters presented here are consistent with the results published in [12] for the low biasing voltage condition. Direct connection of CPW on ceramic to a CMOS amplifier with flip-chip bumps resulted in frequency shifting under the same bias condition due to the parasitic effect of the bump in such a high frequency. Fig. 14 shows the simulated (with original model) and measured -parameters of the flip-chip-assembled -band CMOS amplifier without the compensation network. The dip of the input return loss curve is shifted from 95 to 85 GHz. Also, the small-signal gain over 90 GHz is degraded by about 3 dB, with more degradation at higher frequencies. Simulated results are obtained by using the modified bump model connected with the measured -parameters of the bare die in Fig. 15. A similar frequency response and the gain reduction can also be observed in simulation by modified input 5 fF. transition model with

LU et al.: FLIP-CHIP-ASSEMBLED

-BAND CMOS CHIP MODULES ON CIPD WITH TRANSITION COMPENSATION

Fig. 15. Measured and simulated scattering parameters of the flip-chip assembled amplifier without transition compensation. Measured and simulated results 5 fF are represented by black by using modified input transition with and gray lines, respectively.

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Fig. 18. Measured and simulated scattering parameters of the flip-chip-assembled amplifier with transition compensation. Measured and simulated results by 10 fF are repusing input and output modified transition model with resented by black and gray lines, respectively.

Fig. 16. Photograph of the bare die -band CMOS amplifier (left) and the CIPD with flip-chip bumps and transition compensation networks (right).

Fig. 19. Measured die amplifier.

Fig. 17. The measured and simulated scattering parameters of the flip-chip assembled amplifier with transition compensation. Measured and simulated results by using original transition model are represented by black and gray lines respectively.

Transition compensation networks are adopted in CPW on CIPD to make the amplifier performance back to 94 GHz with 125 m and 150 m. the optimized dimensions as The photographs of the bare die and the flip-chip carrier on the CIPD with bump pad and compensation networks are

of the flip-chip-assembled amplifier and bare

shown in Fig. 16. The die size of the CMOS amplifier is 660 m 636 m while the size of the CIPD is 1200 m 1200 m. The measured and simulated results of the CMOS amplifier with compensation are shown in Fig. 17. The performance is shifted back to 94 GHz, as the bare die on-wafer measured results. The small-signal gain at 94 GHz is improved from 5 dB (without compensation) to 10 dB. The input return loss is also improved to better than 10 dB. The flip-chip transitions with compensation networks show about 2.9 dB of degradation in at 94 GHz. Agreement between the measured and simulated results is observed for small-signal gain, but there are discrepancies for the input and output return losses. The measured and simulated results of return loss are in reasonable agreement by using modified model with input and output transition with 10 fF in Fig. 18. The measured and are shown in Fig. 19, the output power of the flip-chip amplifier is 0.2 dBm, and it is about 1.4 dB of degradation as compared with the measurement result of bare die.

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Fig. 20. On-wafer measured scattering parameters of the bare die CMOS balanced amplifier from 75 to 100 GHz.

-band

Fig. 22. Measured and simulated scattering parameters of the flip-chip-assembled amplifier with transition compensation. Measured and simulated results by 3 fF are represented by using modified input transition model with black and gray lines, respectively.

Fig. 23. Photograph of the bare die -band CMOS balanced amplifier (left) and the CIPD with flip-chip bumps and transition compensation networks (right).

Fig. 21. Measured and simulated scattering parameters of the flip-chip-assembled balanced amplifier without transition compensation. Measured and simulated results by using original transition model are represented by black and gray lines, respectively.

B. Performance of Flip-Chip-Assembled Balanced Amplifier

-Band CMOS

The second circuit is a -band CMOS medium power balanced amplifier [13]. The on-wafer measured small-signal gain and return losses of the -band CMOS amplifier bare die with 2.4 V and 30-mA current for each the bias condition of stage are shown in Fig. 20. The return losses are greater than 10 dB and the small-signal gain is 15 dB at 94 GHz. The measured -parameters presented here are consistent with the results published in [13] for the same voltage condition. Direct connection of CPW on ceramic to the CMOS amplifier with flip-chip bumps results in a frequency shift under the same bias condition due to the parasitic effect of the transition. Fig. 21 shows the simulated results using the original model and measured -parameters of this amplifier without the compensation network. The dip of the input return loss curve is shifted

from 95 to 80 GHz. The small-signal gain over 90 GHz is 6 dB (degraded by about 8 dB). The simulated results by using mod3 fF are shown in ified input transition model with Fig. 22, the simulated results are getting closer to the measured results. The photographs of the bare die and the flip-chip carrier on the CIPD with bump pad and compensation networks are shown in Fig. 23. The die size of the CMOS amplifier is 740 m 540 m while the size of the CIPD is 2000 m 1500 m. The measured and simulated results of CMOS amplifier with compensation are shown in Figs. 24 and 25. The performance is shifted back to 94 GHz, as the bare die on-wafer measurement results. The input return loss is also improved to better than 10 dB. The flip-chip transitions with compensation networks at 94 GHz compared with show about 2-dB degradation in the bare die measurement results. Reasonable agreement between the measured and simulated results is again observed for small signal gain by using modified 3 fF, as shown in Fig. 25. As input transition model with the dicing in this experiment is not an automatic process, the edge space is not identical from die to die. We can see we have a instead of negative in the previous subsection. positive versus is shown in Fig. 26. The output The measured power of flip-chip amplifier is 8 dBm, and it is about 1.2 dB of degradation as compared with the measurement result of bare die amplifier.

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-BAND CMOS CHIP MODULES ON CIPD WITH TRANSITION COMPENSATION

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Fig. 27. Block diagram of the flip-chip-assembled -band CMOS subharmonic mixer. The RF path includes the bump compensation network and one of IF output is terminated by a 50- load. Fig. 24. Measured and simulated scattering parameters of the flip-chip-assembled amplifier with transition compensation. Measured and simulated results by using original transition model are represented by black and gray lines, respectively.

Fig. 28. Chip photograph of the bare die -band CMOS subharmonic mixer (left) and the CIPD with flip-chip bumps and RF transition compensation networks (right).

C. Performance of Flip-Chip-Assembled -Band CMOS Down Convert Subharmonic Gilbert-Cell Mixer

Fig. 25. Measured and simulated scattering parameters of the flip-chip-assembled amplifier with transition compensation. Measured and simulated results by 3 fF are represented by black using modified input transition model with and gray lines, respectively.

The third circuit is a -band subharmonic mixer [14]. The mixer consists of a Marchand balun, a broad-side coupler, and a Gilbert-cell mixer core. The schematic of the flip-chip mixer is shown in Fig. 27. The transition compensation network is implemented in the RF path, and the IF port is terminated by a 50- resistor in CIPD. The photographs of the mixer and carrier are shown in Fig. 28. The bare die and flip-chip conversion losses are shown in Fig. 29. The conversion loss of flip-chip assembled mixer without compensation shows 6-dB degradation and conversion loss of flip-chip assembled mixer with compensation shows 2 dB of degradation compared with the conversion loss of bare die mixer. The measured RF return losses by flip-chip assembly without compensation and simulation using original and modified models are shown in Fig. 30. The RF return loss of flip-chip assembled mixer without compensation is shifted. 5 fF The simulated result using modified model with has better agreement to the measured results. All of the above results are in the same bias condition at dc power of 60 mW. The measured and simulated RF return losses with compensation network are also shown in Fig. 31 The simulation result by 4 fF has better agreement using modified model with again. D. -Band Flip-Chip-Assembled Antenna and -Band Transmitter and Receiver With CPW-Fed Yagi–Uda on CIPD

Fig. 26. Measured amplifier.

-

of the flip-chip-assembled amplifier and bare die

For the SiP integration, active devices could be flip-chip assembled with passive elements such as filter, diplexer, and an-

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Fig. 29. Measured conversion losses of bare die and flip-chip-assembled subharmonic mixer.

Fig. 32. Structure of CPW-fed Yagi–Uda antenna on ceramic with its design parameters.

Fig. 30. Simulated and measured at RF port of bare die and flip-chip assembled without compensation subharmonic mixer (by using modified transi5 fF). tion model with

Fig. 33. Measured

of the CPW-fed Yagi–Uda antenna.

Fig. 34. Block diagram of the flip-chip-assembled integrated with CPW-fed Yagi–Uda antenna.

Fig. 31. Simulated and measured at RF port of flip-chip assembled with compensation sub-harmonic mixer (by using modified transition model with 4 fF).

tenna. Here, a CPW-fed Yagi–Uda antenna integrated with a -band amplifier and receiver on CIPD are demonstrated. The

-band CMOS amplifier

structure of the CPW-fed antenna is shown in Fig. 32 which is similar to that reported in [15]. The antenna is fed by CPW for direct integration with amplifier in Section IV-A. Since we have only one metal layer on CIPD as compared with GaAs and dual metal surface in [15], the shape of the ground planes to adjust the pattern and input impedance. The CPW-dipole transition is designed for impedance matching, and the director is designed for antenna gain and diof CPW-fed antenna rectivity enhancement. The measured is shown in Fig. 33. It is lower than 10 dB for 94 GHz.

LU et al.: FLIP-CHIP-ASSEMBLED

-BAND CMOS CHIP MODULES ON CIPD WITH TRANSITION COMPENSATION

Fig. 35. Photograph of the bare die -band CMOS amplifier (left) and the CIPD with flip-chip bumps, RF transition compensation networks and Yagi–Uda antenna (right).

Fig. 36. Measured and simulated far-field E-plane radiation pattern at 94 GHz for antenna integrated with amplifier.

Fig. 37. Block diagram of the flip-chip-assembled -band CMOS receiver integrated with amplifiers, a down-converter mixer, and a CPW-fed Yagi–Uda antenna.

The CPW-fed antenna is now connected at the output port of Fig. 11. The overall schematic of the amplifier integrated with antenna is shown in Fig. 34 and photos of the amplifier and carrier with the antenna are shown in the Fig. 35. This integrated antenna is fixed in a rotatable probe platform for the pattern measurement. The receiver for antenna pattern

Fig. 38. Chip photograph of the

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-band CMOS receiver.

Fig. 39. Measured and calculated conversion gain of the receiver.

measurement consists of a horn antenna, a -band LNA and a spectrum analyzer with harmonic mixer. It is about 0.5 m away from the integrated antenna. The simulated and measurement antenna patterns are shown in the Fig. 36. These pattern curves show good agreements between measurement and simulation. The measured maximum gain of the integrated antenna is about 2 dBi by using Friis transmission equation. Moreover, a -band receiver is also demonstrated for SiP integration. The receiver consists of a CPW-fed antenna, gain stage of two flip-chip assembled amplifiers, and a down convert mixer. The block diagram of the receiver is shown in Fig. 37, and a photograph of the receiver is shown in Fig. 38. The measurement setup is similar to the measurement setup of antenna. The signal generator with horn antenna is used for the signal transmitting. The receiver is placed on a rotatable probe platform. Fig. 39 shows the measured and calculated receiver gain. The measured receiver gain is obtained by measured IF power and antenna gain. The calculated receiver gain is obtained by adding cascade measured gain of the each sub circuits. The measured and calculated receiver gain agrees reasonably with about 1-dB difference. VI. CONCLUSION The -band chip modules using flip-chip interconnects are presented for the first time in this paper. With the transition compensation network, the performance of the modules can be optimized. Moreover, the simulated results by using modified transition model that accounts for the effect of dicing space variation show reasonable agreement with measurement. For -band CMOS MMICs assembled the SiP application, The

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with Yagi–Uda antenna are also demonstrated. Also, a consistent dicing space from die to die is required to achieve stable flip-chip interconnect at millimeter-wave range. These experiment results show that, with compensation network, flip-chip interconnect is an effective method to connect active CMOS devices to substrate for millimeter-wave SiP integration. ACKNOWLEDGMENT The authors would like to thank Prof. K.-Y. Lin and Dr. Z.-M. Tsai, National Taiwan University, Taipei, Taiwan, for useful suggestions, F.-M. Kuo, National Central University, Jhongli, Taiwan, for -band measurement assistance, and C.-M. Chang, C.-J. Wang, and C.-T. Pen, National Central University, for the process equipment management and maintenance. The CMOS devices were fabricated by Taiwan Semiconductor Manufactory Company (TSMC), Taiwan, R.O.C.

Hsin-Chia Lu (S’93–M’99) received the Ph.D. degree in electrical engineering from National Taiwan University, Taipei, Taiwan, in 1999. He was a Postdoctoral Research Fellow with the Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan, from 1999 to 2004. He has been with the Graduate Institute of Electronics Engineering, National Taiwan University, since 2004. His research interests include RF/millimeter-wave system-in-package, low-temperature cofired ceramic (LTCC) and integrated passive device circuit design and synthesis, microwave measurement techniques, RFIC design, and LTCC embedded antenna/array.

Che-Chung Kuo (S’08) received M.S. degree in electrical engineering from National Central University, Jhongli, Taiwan. He is currently working toward the Ph.D. degree in communication engineering at National Taiwan University, Taipei, Taiwan. His research interests include the RF/millimeter-wave system-in-package, low-temperature cofired ceramic (LTCC) and integrated passive device circuit design, RFIC and monolithic microwave integrated circuit design, and LTCC embedded antenna.

REFERENCES [1] A. Jentzsch and W. Heinrich, “Optimization of flip chip interconnects for millimeter wave frequencies,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 1999, pp. 637–640. [2] Y. Arai, M. Sato, H. T. Yamada, T. Hamada, K. Nagai, and H. I. Fujishiro, “60 GHz flip chip assembled MIC design considering chip-substrate effect,” IEEE Trans. Microw. Theory Tech., vol. 45, no. 12, pp. 2261–2266, Dec. 1997. [3] T. Hirose, K. Makiyama, K. Ono, T. M. Shimura, S. Aoki, Y. Ohashi, S. Yokokawa, and Y. Watanabe, “A flip chip MMIC design with CPW technology in the W-band,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 1998, pp. 525–528. [4] N.-H. Huynh, W. Heinrich, K. Hirche, W. Scholz, M. Warth, and W. Ehrlinger, “Optimized flip chip interconnect for 38 GHz thin-film microstrip multichip modules,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2004, pp. 69–72. [5] S. Song, Y. Kim, J. Maeng, H. Lee, Y. Kwon, and K.-S. Seo, “A millimeter-wave system-on-package technology using a thin-film substrate with a flip chip interconnection,” IEEE Trans. Adv. Packaging, vol. 32, pp. 101–108, Feb. 2009. [6] C.-C. Kuo, P.-A. Lin, H.-C. Lu, Y.-S. Jiang, C.-M. Liu, Y.-M. Hsin, and H. Wang, “W-band flip chip assembled CMOS amplifier with transition compensation network for SiP integration,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2010, pp. 465–468. [7] A. Jentzsch and W. Heinrich, “Theory and measurements of flip-chip interconnects for frequencies up to 100 GHz,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 5, pp. 871–878, May 2001. [8] D. Staiculescu, A. Sutono, and J. Laskar, “Wideband scalable electrical model for microwave/millimeter wave flip-chip interconnects,” IEEE Trans. Microw. Theory Tech., vol. 24, no. 3, pp. 255–259, Mar. 2001. [9] S. Gao and A. S. Holmes, “Thermosonic flip-chip using electroplated copper column arrays,” IEEE Trans. Adv. Packaging, vol. 29, no. 2, pp. 725–734, Feb. 2006. [10] C.-L. Wang and R.-B. Wu, “Modeling and design for electrical performance of wideband flip-chip transition,” IEEE Trans. Adv. Packaging, vol. 26, no. 4, pp. 385–391, Apr. 2003. [11] “ANSYS software and manuals,” ANSYST [Online]. Available: http:// www.ansys.com [12] Y.-S. Jiang, J.-H. Tsai, and H. Wang, “A 86 to 108 GHz amplifier in 90 nm CMOS,” IEEE Microw. Wireless Compon. Let., vol. 18, no. 2, pp. 124–126, Feb. 2008. [13] Y.-S. Jiang, J.-H. Tsai, and H. Wang, “A -band medium power amplifier in 90 nm CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 12, pp. 818–820, Dec. 2008. [14] J.-H. Tsai, H.-Y. Yang, T.-W. Huang, and H. Wang, “A 30–100 GHz wideband sub-harmonic active mixer in 90 nm CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 8, pp. 554–556, Aug. 2008. [15] L. H. Truong, Y.-H. Baek, M.-K. Lee, S.-W. Park, S.-J. Lee, and J.-K. Rhee, “High performance 94 GHz planar quasi-Yagi antenna on GaAs substrate,” Microw. Opt. Technol. Lett., vol. 51, no. 10, pp. 2396–2400, Oct. 2009.

Po-An Lin (S’10) received the B.S. degree in electrical engineering from National Sun Yat-Sen University, Kaohsiung, Taiwan, in 2008, and the M.S. degree in electrical engineering from National Central University, Jhongli, Taiwan, in 2010. His research interests include microwave packaging technology with flip-chip interconnects and power amplifier design. He is now serving in the military.

Chen-Fang Tai received the B.S. degree in electrical engineering from National Central University, Jhongli, Taiwan, in 2008, and the M.S. degree from the Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan, in 2010. His research interests include the -band antenna design and passive circuit design of millimeter waves. He is currently with High Tech Computer Corporation (HTC), Taoyuan, Taiwan, where he is engaged in the development of the antenna for smart phone applications.

Yi-Long Chang (S’10) received the B.S. degree in aeronautical engineering from National Formosa University, Yunlin, Taiwan, 2003, and the M.S. degree in electronics engineering from National Taiwan University, Taipei, Taiwan, in 2007, where he is currently working toward the Ph.D. degree at the Graduate Institute of Communication Engineering. His research interests include microwave circuit design and antenna design.

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-BAND CMOS CHIP MODULES ON CIPD WITH TRANSITION COMPENSATION

Yu-Sian Jiang was born in Kaoshiung, Taiwan, in 1984. She received the B.S. and M.S. degrees in electrical engineering from National Taiwan University, Taipei, Taiwan, in 2006 and 2008, respectively. She is currently with Taiwan Semiconductor Manufacturing Company (TSMC). Her technical interests include monolithic microwave millimeter-wave circuit design.

Jeng-Han Tsai (S’04–M’08) received the B.S. degree in electric engineering from National Central University, Taoyuan, Taiwan, in 2002, and the Ph.D. degree from the Graduate Institute of Communication Engineering from National Taiwan University, Taipei, Taiwan, in 2007. From February 2007 to January 2008, he was a Post-Doctoral Research Fellow with the Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan. From February 2008 to July 2009, he was with the Department of Communication Engineering, Yuan Ze University, Taoyuan, Taiwan. In August 2009, he joined the faculty of the Department of Applied Electronics Technology, National Taiwan Normal University, Taipei, where he is currently an Assistant Professor. His research interests include the design and analysis of RF/microwave integrated circuits and wireless communications.

Yue-Ming Hsin (S’91–M’92–SM’05) was born in Tainan, Taiwan, in 1965. He received the Ph.D. degree in electrical engineering from the University of California at San Diego, La Jolla, in 1997. He is currently the Distinguished Professor with the Department of Electrical Engineering, National Central University, Jhongli, Taiwan. In 1997, he joined Anadigics, Warren, NJ, where he was involved with the development of MESFETs and pHEMTs for wireless and optical fiber communications. In 1998, he joined the Department of Electrical Engineering, National Central University. From 2004 to 2005, he was a Visiting Associate Professor with the University of Illinois, Urbana-Champaign. His research interests include the development of devices and circuits based on Si/SiGe, III-V compounds, and heterostructure semiconductors.

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Huei Wang (S’83–M’87–SM’95–F’06) was born in Tainan, Taiwan, on March 9, 1958. He received the B.S. degree from National Taiwan University, Taipei, Taiwan, in 1980, and the M.S. and Ph.D. degrees from Michigan State University, East Lansing, in 1984 and 1987, respectively, all in electrical engineering. During his graduate studies, he was engaged in research on theoretical and numerical analysis of electromagnetic radiation and scattering problems. He was also involved with the development of microwave remote detecting/sensing systems. He joined the Electronic Systems and Technology Division of TRW Inc. in 1987. He has been an MTS and Staff Engineer responsible for MMIC modeling of CAD tools, MMIC testing evaluation and design and became the Senior Section Manager of MMW Sensor Product Section in RF Product Center. He visited the Institute of Electronics, National Chiao-Tung University, Hsin-Chu, Taiwan, in 1993 to teach MMI-related topics and returned to TRW in 1994. He joined the faculty of the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, as a Professor in February 1998. He served as the Director of Graduate Institute of Communication Engineering, National Taiwan University from August 2006 to July 2009. Dr. Wang is a member of Phi Kappa Phi and Tau Beta Pi. He received the Distinguished Research Award of National Science Council, Taiwan, in 2003. He was the Richard M. Hong Endowed Chair Professor of National Taiwan University in 2005–2007. He was appointed as an IEEE Distinguished Microwave Lecturer for the term of 2007–2009. He received the Academic Achievement Award from Ministry of Education, Taiwan, in 2007, and the Distinguished Research Award from Pan Wen-Yuan’s Foundation in 2008. He was elected as a National Chair Professor by Ministry of Education, Taiwan, China, in 2010.

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An RCP Packaged Transceiver Chipset for Automotive LRR and SRR Systems in SiGe BiCMOS Technology Saverio Trotta, Markus Wintermantel, John Dixon, Ulrich Moeller, Richard Jammers, Torsten Hauck, Andrzej Samulak, Bernhard Dehlink, Kuo Shun-Meen, Hao Li, Akbar Ghazinour, Yi Yin, Sergio Pacheco, Ralf Reuter, Soran Majied, Daniel Moline, Tang Aaron, Vishal P. Trivedi, Dave J. Morgan, and Jay John

Abstract—We present a transceiver chipset consisting of a four channel receiver (Rx) and a single-channel transmitter (Tx) SiGe BiCMOS technology. Each Rx designed in a 200-GHz channel has a conversion gain of 19 dB with a typical single sideband noise figure of 10 dB at 1-MHz offset. The Tx includes two exclusively-enabled voltage-controlled oscillators on the same die to switch between two bands at 76–77 and 77–81 GHz. The phase noise is 97 dBc/Hz at 1-MHz offset. On-wafer, the output power is 2 13 dBm. At 3.3-V supply, the Rx chip draws 240 mA, while the Tx draws 530 mA. The power dissipation for the complete chipset is 2.5 W. The two chips are used as vehicles for a 77-GHz package test. The chips are packaged using the redistribution chip package technology. We compare on-wafer measurements with on-board results. The loss at the RF port due to the transition in the package results to be less than 1 dB at 77 GHz. The results demonstrate an excellent potential of the presented millimeter-wave package concept for millimeter-wave applications. Index Terms—Bipolar technology, high frequency, low noise, multichannel, package, redistributed chip package (RCP), receiver (Rx), SiGe, transceiver, transmitter (Tx).

I. INTRODUCTION

R

ECENTLY transceiver chipsets for 76–77-GHz automotive radar applications have been presented [1]–[3], [4]. Automotive radar systems are designed to measure the distance to the azimuth and the relative speed of an object present ahead of an automotive vehicle for cruise control and/or anticollision control. The detectable range of the radar system is defined geometrically by a beam emitted from or received by an antenna. Multiple beams increase the angular resolution. Beam forming, and in the special case, digital beam forming, is achieved using

Manuscript received August 15, 2011; revised December 15, 2011; accepted December 16, 2011. Date of publication January 23, 2012; date of current version March 02, 2012. S. Trotta, R. Jammers, T. Hauck, B. Dehlink, H. Li, A. Ghazinour, Y. Yin, R. Reuter, and S. Majied are with the RF/IF Innovation Center, Freescale Semiconductor, D-81829 Munich, Germany (e-mail: [email protected]). M. Wintermantel, U. Moeller, and A. Samulak are with Continetal AG, ADC Automotive Distance Control Systems GmbH, D-88131 Lindau/Bodensee, Germany (e-mail: [email protected]). J. Dixon, K. Shun-Meen, S. Pacheco, D. Moline, T. Aaron, V. P. Trivedi, D. J. Morgan, and J. John are with Freescale Semiconductor Inc., Tempe, AZ 85284 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2181536

Fig. 1. Simplified bistatic ranging system.

multiple antennas, multiple transmitter (Tx) and receiving channels, and digital signal processing. In the near future, automotive radar systems [5]–[7] will extensively use multichannel Tx and receiver (Rx) chips for high resolution digital beam forming systems capable to cover long-range (LR) detection in 76–77-GHz band and short-range (SR) detection in the 77–81-GHz band. Such complex systems will have a limited power dissipation capability. This means that the efficiency of the next-generation chipset should be improved. A better system signal-to-noise ratio (SNR) should be achieved for a lower power consumption. The system SNR corresponds, in first approximation, by dB

Hz

dB

dBm

Thus, lower noise figure in the Rx is a must. This will help to reduce the Tx output power, which reduces the power consumption and improves the efficiency. In frequency modulation continuous wave (FMCW) ranging systems, the noise figure of the Rx also depends on the amplitude and phase modulated noise [8]–[10] due to close in reflected signals, as in Fig. 1. System simulation results based on the above example are reported in Fig. 2. The simulations show the increase of the system noise, i.e., noise density at the Rx IF output, due to Tx phase noise and internal coupling and/or reflections at the radome. For the simulation, the following was assumed: • signal power at the Rx input due internal coupling and/or dBm; reflections at the radome dB; • maximum noise figure of the receiver

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with as the center frequency of the chirp signal. From (2), in case of two targets, we can write (3) The term resolution describes the ability to separate two closely spaced targets. As can be intuitively understood from Fig. 4 Case 2 and 3, in case of fast ramp, the contribution of in determining the IF and is, in a first approximation, negligible with respect to the contribution of . For a given range delta between targets, , (3) then shows that the increase of is proportional to the ramp slope. The slope can be increased either by increasing the BW (Fig. 4 Case 2) or reducing the ramp time (Fig. 4 Case 3). From (2), it can be derived that (4) Fig. 2. Simulated system results. The shape below 5 MHz is due to the assumed ac coupling at the IF port (courtesy of Continental A. D. C. Lindau).

• conversion gain dB (for noise increase due to PN not relevant, only for absolute noise level); • FMCW modulation with a ramp in the range of 200 MHz in 10 s (fast modulation ramp). The Tx amplitude and phase noise smear the signal spectrum and raise the noise floor. The results highlight that, for the modulation speed considered, an increase of 10 dB in phase noise increases the IF noise density at the Rx output by 5 dB. Thus, the SNR is degraded by 5 dB. Moreover if the phase noise is severe, small targets can be hidden under the sidebands making it impossible to separate them, as shown in Fig. 3. The left close target detected obscures the far small target due to the Tx phase noise. Lower phase noise would help the system to detect also the second target. The optimum would be also to increase the separation between targets at the IF (larger ). This could increase also the SNR margin for the far target in case of presence of close reflected strong signals. The IF at which the targets appears in case of FMCW-based radar depends on the ramp slope. The transmit frequency is modulated with a linear law (e.g., sawtooth), as shown in Fig. 4 Case 1. If there is a target at a distance , an echo signal will return after a time delay , where is the propagation constant. The beat frequency , which appears at the Rx, represents the difference between the emitted frequency and the frequency received after reflection on the target. From Fig. 4 Case 1, it is clear that the beat frequency depends on the slope of the modulating ramp: (1) where the constant is proportional to the bandwidth (BW) of the ramp and inversely proportional to the time of the ramp. For target with a relative velocity (due to radar or target movements), a Doppler frequency shift is added (2)

is given by The one-bin resolution in the frequency domain with being the sampling rate of the ADC (which samples the IF) and the number of samples in the period of the ramp . Substituting this result in (4), it yields that (5) According to (5) only a larger BW (Fig. 4, Case 2) during the frequency sweep can increase the range resolution, while does not have impact. During a radar scan, chirps are performed. The velocity resolution is generated by the time of all ramps—i.e., the time for one ramp does not have an influence. Due to the Doppler, the phase of a target changes from chirp to chirp. Applying a fast Fourier transform (FFT) over these chirps the Doppler can be also calculated with high accuracy and resolution. The sequence of chirps takes about : the speed resolution is given by this . To summarize, we can say that fast modulation ramp in principal have the benefit to increase the delta between two IF signals associated with two distinct targets and be less sensitive to phase noise (as described in Fig. 3). This helps to resolve multiple targets scenario. This allows also for a large IF separation between the signal reflected by the bumper and the signal reflected by a target (as discussed in the Rx measurement session). If the fast slope is achieved with a large BW, this helps also to improve the range resolution, while the speed resolution depends then on the number of chirps. Moreover, since the IF associated with fast modulation ramp, e.g., 200 MHz in 10 s, are well above 100 kHz, this let the usage of ac coupling at the Rx IF outputs, avoiding that the dc offset generated by the mixer could saturate the ADC. Due to the relatively high IF, the ac coupling could be also integrated on chip. Finally the relative high IF lets also to neglect the noise region at the Rx output that could degrade the SNR. One way to implement fast modulation speed and still achieve the expected phase noise in correspondence of the IF of interest is to use the so-called software phase-locked loop (PLL). Its simplified view is presented in Fig. 5. The loop in this case is closed by an ADC and DAC. A calibration is required before transmission to linearize the tuning characteristic of the voltage-controlled oscillator (VCO). The linearization data are stored in a lookup table (LUT). The DAC tunes the VCO according to the data in the LUT. During transmission the VCO is in free-running mode.

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Fig. 3. Qualitative representation of one possible scenario a radar sensor should be able to detect. Targets are peaks, which tower above the sidebands generated by phase noise.

Thus, the VCO should fulfill tough requirements: the carrier frequency should be stable in every condition (load–pull, , and temperature) during transmission and at the same time have low phase noise. The phase noise of the free-running VCO is the phase noise of the transmitted signal. One of the main drawback of fast modulation speed is the requirement of fast ADCs at the IF output and memory requirement for post-processing. Thus, a tradeoff between modulation speed (i.e., IF BW) and signal separation should be found. The chipset presented in this paper was previously discussed in [11]. In this paper, more theoretical analysis and measurement results, which emphasize the performance of the proposed chipset for a system based on the architecture above discussed, are provided. Overview on the first packaged chip test results are also given. Section II introduces the chipset. The implementation of the chips is illustrated in Sections III and IV. Section V present the SiGe technology used, while Section VI presents measurement setup and results. The first results on the packaged chip are reported in Section VII with special emphasis to power consumption and thermal dissipation since those are key aspects in the development of a package for 77-GHz applications [12]. Finally, Section VIII presents the conclusion of the design. II. CHIPSET Presented in Fig. 6 is a radar front end used for, but not only, digital beam forming. It consists of a Tx and multichannel Rx chips. The multichannel Rx uses a local oscillator (LO) signal at 38.25 GHz. This signal is provided by the Tx chip. The usage of the LO at half of the Tx frequency allows to reduce the loss on-board and of the bond transitions. This helps in case more Rx chips need to be driven on the same board. III. FOUR-CHANNEL Rx The Rx chip is presented in Fig. 7. It consists of a fourchannel Rx and an LO doubler chain, as in [13]. LO Generation: Each Rx channels’ LO signal is provided by an LO stage consisting of balun, 38.25-GHz amplifier, frequency doubler, 76.5-GHz power amplifier (PA), balun, and a highly symmetrical passive LO distribution network (see Fig. 7). The 38.25-GHz buffer consists of a cascode stage with inductive load. As shown in Fig. 8, a differential pair with

connected emitters and collectors is the core of the LO doubler circuit. The antisymmetry (180 phase shift) of the signals taken from the collectors and from the emitters is forced by an ac-coupled transmission line (TL) at 76.5 GHz. The differential signal is then fed into a common-base stage that drives the 76.5-GHz PA. Compared to the doubler with stacked cascade configuration [14], the presented topology has the advantage of equal bias conditions for the devices in the cascode stage, further improving differential operation, stability, and signaling. The biasing circuits of all stages are again decoupled from the signal path by at 76.5-GHz TLs (except for the 38.25-GHz path). The 76.5-GHz PA consists of a differential cascode. The emitter-coupled pair and the common-base stage are ac coupled, allowing for operation under different bias conditions (Fig. 9). Due to the split of the stacked configuration, a 2-V headroom at the output of the PA is available. This allows achieving high output power with low voltage supply. TLs at the output together with the LC-balun provide the load. Separate measurements on a standalone doubler show a saturated output power between 8 dBm at 40 C and 5 dBm at 125 C for input power levels larger than 10 dBm. The amplifier, doubler, and PA consume 120 mA from a 3.3-V supply. While the absolute phase of the received signals are of minor importance (they can be calibrated in the digital domain), changes in the phases due to the Rxs changing characteristics must be identical for each channel. Thus, each receive channel must behave exactly as all the others under all operation conditions. Thus, all mixers are oriented in the same direction. The LO distribution network (Fig. 7) also exhibits exactly the same lengths, number of corners, and power division stages (Wilkinson dividers). The same number of corners is important since any corner adds an additional capacitance that causes a phase shift. The insertion loss of the LO distribution network is 8 dB. Rx Channel: As shown in Fig. 7, each Rx channel consists on an RF LC-balun for single-ended to differential conversion, a low-noise mixer, an LO LC-balun, a two-stage limiter/amplifier to drive in saturation the mixer in every condition, and finally an IF buffer consisting of emitter followers (EFs) to drive an external load larger than 500 . The main difference compared to [13] and [16] is in the mixer topology. In [13] and [16], a mixer as presented in Fig. 10(a) was used. In order to

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Fig. 5. Simplified block schematic of a software PLL.

Fig. 6. Transceiver chipset block diagram.

Fig. 7. Four-channel Rx block diagram.

Fig. 4. Impact of the slope of the FMCW on the target detection and IF generation.

reduce the temperature dependence of the mixer and reduce the current consumption, the RF stage, which usually requires large current for high linearity, has been removed, as shown in Fig. 10(b). In this case the RF LC-balun provides not only 50-

input matching and noise matching, single-ended to differential conversion, but also V–I conversion due to the impedance of the TLs . This allows saving 20 mA for each channel, or 80-mA saving for a four-channel Rx at 3.3 V. The current provided by has been optimized to achieve a dynamic current density in the switching-quad devices targeting the best tradeoff between: low noise corner frequency ( 100 kHz), low current consumption, high input referred P-1 dB ( 5 dBm), and

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Fig. 8. Schematic of the doubler.

Fig. 10. Mixer topology. (a) Old approach. (b) New approach.

Fig. 9. Schematic of the LO PA.

low temperature dependence (2 dB from 40 C to 125 C). It results in a 5-mA dc current. The main drawback of the version without RF stage is the degraded LO to RF isolation. In fact, the RF stage provides 10 dB more isolation. In case of severe mismatch (e.g., at the antenna) this can become an issue due to large LO self-mixing in the mixer, which can yield a large dc offset having an impact on the linearity (clipping) and on the noise floor at the Rx IF output, especially in the region. In case of the fast modulation speed assumed at the beginning of this paper, the IF of interest will be well above the region. Moreover since the IF of interest can be well above 100 kHz, ac coupling can be used to avoid driving into saturation the ADC at the IF port due to the dc offset. On the other hand, the version without the RF stage could generate less self-mixing products due to close in reflection at the radome or bumper interface (Fig. 1). In the measurement results section, two Rx versions will be compared, one with and one without the RF stage, showing pros and cons. IV. Tx The block diagram is presented in Fig. 11. The Tx chip is based on two exclusively enabled VCOs to cover the 76–77-GHz (LR) and 77–81-GHz (SR) bands. This gives the freedom to optimize each VCO to fulfill the application requirements for each band.

Fig. 11. Dual-band Tx block diagram.

VCO Design: The push–push topology used for the VCO (see Fig. 12) is similar to the one reported in [15] and [16]. It uses only one VCO core and two active devices instead of the

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Fig. 12. VCO schematic. Fig. 14. Simulated load-line over

for the HBT in the VCO.

Fig. 13. Simulated dynamic current behavior in (blue in online version) and . HBT emitter length m. its complementary over

four HBTs used in [17] and the four complementary devices in [18]. Four devices in parallel, of 10- m length each, form the transistor (due to the symmetry of the circuit, only one label is used). These devices are biased at half of peak- current density. This low current still allows reaching large-signal swing in the resonator (Figs. 13 and 14) since the VCO is running at half of the output frequency. This improves the phase noise due to lower contribution of the active devices. As shown in the load-line plot in Figs. 14 and 15, the active devices are operated always in a safe range. The bias network with its 20 mA has an impedance at the node k . The resonator has been optimized to maximize the signal swing. The resonator consists of the TL , the parasitic line , and a differential varactor. TLs at the fundamental RF are used between node B and the emitter of to bias the devices and extract the second harmonic. Moreover, these TLs represent a high-impedance path for the fundamental signal that is forced in the resonator. Thus, the phase noise is improved due to the larger signal swing in the resonator. A network consisting of , and is used at the collector of to force the fundamental signal in the VCO core and extract the second harmonic. As in the harmonic doublers [13], the differential outputs are generated at the

Fig. 15. Load-line (dashed line) versus I–V characteristics (linear scale) for an HBT device of 10- m emitter length.

common node at the collectors, A, and at the emitters, B. As in [18], the differential push–push outputs are decoupled from the dc supply by RF chokes implemented in our design as TLs at RF. The signals collected at the node A and B do not have 180 phase difference (Fig. 16) since at 77 GHz the delta phase between the signals at the collector and at the emitter of is not 180 and due to also the phase shift introduced by all TLs used in the design. Thus, different phase shift are introduced by the TLs and to compensate for the phase unbalance (Fig. 17). The amplitude of the voltage swing is increasing for large . This is related to the quality factor of the varactor, which becomes better for large . The VCO used for the 76–77-GHz band has been optimized to show the lowest phase noise possible in order to achieve the highest SNR for LR detection. For SR, the PN requirement is relaxed, therefore the VCO has been tuned to have larger tuning range. Thus, a varactor with a wider tuning ratio has been adopted. This slightly degrades the

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Fig. 16. Simulated voltage swing at the node A (red in online version) and at . the node B (blue in online version) over Fig. 18.

and

plots for a HBT device of 10- m emitter length.

[19]. This millimeter-wave capable technology includes a thick last metal (0.8 m) option with microstrip TLs, high tuning ratio varactor, metal–insulator–metal (MIM) capacitors, thin-film resistors, 1.8- and 3.3-V MOSFETs, as well as a design library with elements modeled up to 110 GHz. The chip photographs are presented in Fig. 19. The die size is 12 mm for the Rx and 6.5 mm for the Tx. VI. ON-WAFER MEASUREMENT RESULTS

Fig. 17. Simulated differential voltage swing over at the VCO outputs . The VCO is loaded with the PA chain. after the TLs

loaded in the VCO core. Each VCO is followed by a buffer, which is used to de-embed the VCO from the PA chain [12], [15]. The buffer output signal is combined in an LC-balun. The signals from both VCOs are then combined with a Wilkinson passive structure. A differential signal is generated finally by another LC-balun. This drives a PA that consists of three cascode stages. The last one has the dc split in the LO stage in Fig. 9. A dynamic Miller divider generates the Fosc/2 to drive the LO PA. A divider chain with a ratio of 768 generates a signal in the 50-MHz range to drive an external PLL. The chip includes a peak detector and a temperature sensor. V. TECHNOLOGY The circuit presented in this paper is manufactured in a 180-nm SiGe:C BiCMOS technology [19]. The technology is based around a 200 GHz (Fig. 18) self-aligned selective-epi base SiGe:C HBT. The device utilizes a cost-effective collector integration combining an implanted collector with a sub-isolation buried layer module (SIBL) for low collector resistance

The Rx chip draws 240 mA, while the Tx chip draws 530 mA both from 3.3-V supply. The chips have been characterized from 76 to 81 GHz at V % from 40 C to 125 C. All measurement results for the Rx include the loss of the RF input balun (on chip). Four-Channel Rx: The conversion gain (CG) versus the RF input power (RF) is reported in Fig. 20. The typical CG is 19 dB, while input referred P-1 dB is better than 5 dBm. This high linearity is required to handle the signals reflected by the radome and bumper (see Fig. 1). In the 76–77-GHz band, the variation over temperature and are limited to 2 dB only. This represents an improvement of 2.5 dB compared to what was reported in [13] and [16]. The variation becomes larger at 81 GHz where a larger LO input power (LO) would be beneficial to saturate completely the mixer at 125 C. This is visible in Fig. 21. To saturate completely the CG in every and temperature condition, an LO power of 5 dBm is required. The noise behavior is shown in Fig. 22. The new mixer topology allows achieving the extremely low NFssb of 10 dB, including the loss of the RF input balun, in the 76–77-GHz band at room temperature at 1-MHz offset without any RF-stage/low-noise amplifier (LNA) in front of the switching quad. This is 6 dB better compared to [1]. The drop at 125 C is 2 dB only. At 40 C the noise of the active device raises, probably due to also LO overdriving effects, increasing the NFssb below 1 MHz. In this case, the larger noise injected by the active devices is not de-embedded by the gain that could be provided by a RF input stage. As for the CG, the worst case for the noise is at 81 GHz, but even in that case the NFssb does not exceed the value of 15

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Fig. 20. Measured Rx CG versus RF input power.

Fig. 21. Measured Rx CG versus LO input power.

Fig. 19. Chip photograph of the: (a) Rx and and (b) Tx.

dB at 125 C. The measured channel to channel isolation is in the range of 50 dB, as reported in [13]. The channel-to-channel CG variation is lower than 0.5 dB. The phase variation, which has a large impact on digital beam-forming radar, is not easy to measure due to the high accuracy required. A test was performed with the setup shown in Fig. 23. It allows measuring two channels at the same time (see also Fig. 19). The RF signal is split by a magic-T. The phase of one path was calibrated with a phase shifter in nominal conditions. The measurements were performed sweeping RF, , and the temperature. The phase was measured with an Agilent DSO 5054A sampling oscilloscope. As reported in Fig. 24, the max phase delta between ch1 and 3, which could be effected also by the setup, is 4 (the same between ch2 and 4). The LO feed through at the RF port is also evaluated. In order to take into account the possible mismatch at the antenna, a tunable short was used at the RF port to

modify the matching, as shown in Fig. 25. A harmonic mixer was connected to the coupled port of the coupler to measure the level of the LO feed through in different conditions. The test was performed for the Rx described in this paper, without RF input stage, and for a second version with the RF input stage (Fig. 10), which shows the same CG. Figs. 26 and 27 show that the version without RF input stage, as expected, has 10–15 dB higher LO feed through. In both cases, the delta between the best and worst case is between 3.5–5 dB. It should be noticed moreover that the LO power measured at the RF port in this case is a saturated power since on-chip there is an LO chain that saturates the CG already for an input LO level below 10 dBm. A level of 20 dBm would be still sufficient in nominal conditions. The dc offset, which depends on the self-mixing of the LO, also follows the variation of the amplitude of the LO. In the version without RF input stage, it can vary between 100–700 mV. The impact of the signal reflected by the bumper has been also evaluated using the setup in Fig. 28. The choice of the frequency of the signals fed into the Rx was also taking into account the

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Fig. 25. Measurement setup with tunable short for LO feed through test.

Fig. 22. Measured Rx NFssb.

Fig. 23. Measurement setup for channel-to-channel phase delta test.

Fig. 26. Measured LO feed through at the RF port for the Rx version without RF input stage. Blue (in online version) is the best case and green (in online version) is the worst case.

Fig. 24. Phase delta between ch1 and 3 versus temperature, Vcc, and RF.

fact that, as already discussed, a fast modulation ramp was considered. This allows for a large IF separation between the signal reflected by the bumper and the signal reflected by a target. At the RF port, two signals were combined: one at 76.5005 GHz with a signal level of 20 dBm to emulate a reflected close signal; the second one at 76.5014 GHz with a signal level of 40 dBm to emulate a reflected close signal. In this case, three

Fig. 27. Measured LO feed through at the RF port for the Rx version with RF input stage. Blue (in online version) is the best case and green (in online version) is the worst case.

signals were present at the IF output: at 50 kHz, at 1.4 MHz, and at 1.35 MHz ( Fig. 29). The results in Fig. 29 suggest that, besides the dc offset due to the self-mixing of the LO, we have also the self-mixing products due to the RF feed through to the LO

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Fig. 30. Possible scenario that can generate the same IF as in Fig. 28. Fig. 28. Measurement setup to verify the impact of a close reflected signal.

Fig. 29. Measurement results for the RF multitone test.

port (Fig. 27). The delta amplitude between the signals at 1.35 and 1.4 MHz should be in the range of 40 dB. If lower, it could generate issues because it will be difficult for a radar system to discriminate if this signal is a ghost or a real target. A typical scenario could be a man walking crossing the street at the same time and distance of a truck, with a much larger radar cross section, as show in Fig. 30. This scenario could also generate two IF signals in the same IF range, as in Fig. 29, with comparable amplitude. To verify that the unwanted IF signal at 1.35 MHz was due to the self-mixing, the version with RF stage was again measured. In this case, we should expect a larger level for the RF self-mixing products due to the amplification provided by the RF input stage. The results are reported in Fig. 31. The version with RF-input stage has 4-dB larger unwanted IF signal. This is proportional to the gain of the RF stage. Finally, the IP3 was tested for both Rx versions (Fig. 32). The version without RF input stage is slight more linear. For an input level of 40 dBm, the delta between the IF signal and the intermodulation products is 80 dB. The input matching is better than 10 dB for the LO and RF port as well. Results over temperature and are reported in Fig. 33. Tx: The two VCOs cover the LR and SR bands over temperature (Fig. 34). The SR VCO has 1–2 GHz more tuning range in this first test. At 40 C, the tuning characteristic has a compression above 1.5-V . This is due to the too large signal swing in the resonator, which is modulating the varactor capacitance modifying the C–V effective characteristic. One carrier

Fig. 31. Measurement results for the RF self-mixing test.

only is present at the Tx output. The VCO fundamental suppression is better than 40 dBc. Shown in Fig. 35, the typical output power is 2 13 dBm. The drop at 125 C is also, in this case, 2 dB only in the LR band. At 81 GHz, it drops by another 3 dB. This should not be a problem since in SR mode the Tx has to transmit less power. The LO power to drive the Rx is typically 2 dBm, and at room temperature there is almost no frequency dependency (Fig. 36). An additional buffer stage in front of the LO PA would help to drive it in saturation also at 81 GHz at 125 C. The measured phase noise is better than 96 dBc/Hz at 1-MHz offset, as in [15] and [16] for the LR band. It is degraded by 1 dB in the SR band. The tunable short was used also in this

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Fig. 32. Two-tone IP3 measurement results.

Fig. 35. Tx output power versus frequency.

Fig. 33. Input matching: LO at 38 GHz (blue in online version) and RF at 76 GHz (red in online version).

Fig. 36. LO output power versus frequency.

Fig. 34. Tx tuning characteristic.

case to measure the pulling (Fig. 37). The results are reported in Fig. 38. With a 5-dB attenuation between the Tx output and the tunable short, the typical measured pulling is, in the worst case,

Fig. 37. Pulling measurement setup. The losses from the Tx output to tunable short, including the tips and transitions, are 5 dB.

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Fig. 39. Top view of the two packaged chips.

Fig. 38. Pulling measurement results.

250 kHz only at 77 GHz for all phases. The worst case for the pulling is at the lowest setting where the VCO shows the largest . Such a low level of pulling at 77 GHz is due to the large loaded achieved in the resonator and the high isolation provided by the different stages in the PA, but also due to capability of the PA to drive different loads. In this case, the level of self-biasing is negligible. Thus, this does not generate thermal drift of the carrier due to a difference current consumption. The SNR for the complete system, calculated for one Rx channel only, degrades by 6 dB going from 76 to 81 GHz in the worst case at 125 C: 3 dB due to the NFssb increase and 3 dB due to the drop of the Tx output. VII. PACKAGE TEST Packaging will become in the near future an essential technology for 77-GHz chipset for automotive radar systems enabling cost reduction in the radar module assembly process and more reliable transition at the RF ports (more than the actual bond-wire techniques used for bare-die assembly). Packaged chip at 77 GHz have been already published [20], [21]. The two chips presented in this paper have been used as test vehicle for a 77-GHz package test (Fig. 39). To package the parts, Freescale’s redistributed chip package (RCP) technology has been used [22], [23]. The RCP technology supports more redistribution layers for the interconnections to the landing pads on the board (see Fig. 40). Two main points should be addressed for the RF package development: the transition loss at the RF outputs and the thermal dissipation (heat transfer). Electromagnetic (EM) simulations of the RCP radar package show that the losses are 1 dB at the PA output and 3 dB at the Rx input. To achieve such low loss at the Tx output, the setup and the output power results in Figs. 37 and 38 were useful to optimize the interface between the PA and package. The RF input matching of the Rx to the package can be further optimized to reduce the loss. To address the thermal dissipation issue, two tests were performed. In the first one, the chips were assembled in the standard RCP. In the second one, the back side of the chip was glued to a heat spreader (top face of the package) with a 50- m silver epoxy (4 W/mK). The heat spreader is made from 380- m-thick

Fig. 40. X-ray image of RCP.

Kovar plus plated nickel gold (17 W/mK). This should results in 10 K/W increase from the top side of the heat spreader to the back side of the chip. The finalized samples look like the ones in Fig. 39. The design of the package cannot be decoupled from the design of the board. In this kind of packaging technology, the heat transfer and the RF performance are also due to the balls location and their landing pad on the RF board. The balls represent the vehicle for the heat transfer to the printed circuit board (PCB) to improve the power dissipation. At the same time their configuration at the RF port has impact on the loss. On the RF board, thermal vias should also be placed, which transfer the heat from the top to the bottom where a heat spreader is mounted. They should be as close as possible to the balls. A board design example is presented in Fig. 41. Tx Test: The two different Tx, with and without the heat spreader, where mounted on the presented board (see Figs. 41 and 42). First the thermal behavior was evaluated. The power

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Fig. 43. IR scan performed on the part with heat spreader (top left), without heat spreader (bottom left), part with heat spreader and a clamp (top right) and finally on a part without heat spreader and with clamp (bottom right).

Fig. 41. Tx RF board (courtesy of Continental A. D. C. Lindau).

Fig. 42. Tx chip mounted on the RF board. X-ray on the right side show the perfect alignment of the balls with the landing pads.

Fig. 44. On-chip temperature sensor reading.

consumption of the Tx chip is 1.7 W in full power mode. Fig. 43 shows the infrared (IR) scan for the two chip versions. The first clear result from the IR scan shows that the heat spreader helps to uniformly spread the heat to the top face of the package. On the top left result (with heat spreader), we can read a temperature around 70 C. The second important result is the lower temperature of the version with the heat spreader. The temperature is 30 C lower. In order to push the chip on the board, a small clamp with opening was used. In this case, still in Fig. 43, the top face temperature is further reduced (by 20 C). This can be explained by considering the fact that the better the balls are touching the landing pad the better is the heat transfer to the board (there may also have been thermal conduction from the part into the clamp). This is less effective for the case without the heat spreader because the chip has to dissipate 1.7 W and this is too much in this configuration. The IR scan was correlated to the on-chip temperature sensor reading. Considering that the chip dissipates 1.75 W, taking

into account that a 10-K/W increase from the top side of the heat spreader to the chip backside, the results in Fig. 44 show that if the on-chip temperature sensor is reading 73 C, the top side of the heat spreader should be around 55.5 C, which is exactly what is measured with the IR scan (with clamp), as reported in Fig. 43. The above results are very encouraging. The back side of the chip with heat spreader is only at 72 C, which is well below to previous published results [20]. In a second step, phase noise and the Tx and LO output power were measured. Fig. 45 shows the measurement setup used. An external PLL board with a small loop BW ( 100 kHz) was used to lock the Tx. Since the loop BW is small, the setup does not influence the phase-noise measurements above 100 kHz (frequency offset of interest). The chip was characterized in the LR and SR mode. A synthesizer was used to sweep the reference of the PLL board and tune the Tx to the desired frequency. The phase noise is slightly (1–2 dB) degraded in SR mode (Fig. 46). It is important to highlight that even if

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Fig. 47. Spot frequency phase-noise measurement.

Fig. 45. Test setup for phase noise and power measurements.

Fig. 48. Carrier signal spectrum.

Fig. 46. Phase-noise measurement results in LR and SR mode. Fig. 49. Tx output power measurement results in LR mode.

packaged, the Tx chip does not have any spurs at the Tx output. This is clear in the plots in Figs. 47 and 48. These first results suggest that there is no coupling between the interconnection lines in the redistribution layer and between the redistribution layer and the PCB board. During the Tx power measurement, the power sensor was connected directly to the waveguide

interface at the RF port. The measured output power at the waveguide interface at 76.5 GHz is 13 dBm (violet curve in online version in Figs. 49 and 50). According to EM simulation, the differential to single-ended waveguide transition on-board has only 1-dB loss. If we de-embed those losses, we

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Fig. 50. Tx output power measurement results in SR mode. Fig. 52. LO output power measurement results in SR mode.

Fig. 51. LO output power measurement results in LR mode.

can estimate the power at the landing pad on the board. We can assume 14.2 dBm. De-embedding also the 1 dB simulated for the RCP transition, we can estimate a power at the TX pad output of 15.2 dBm. Considering the measurements performed on-wafer at 25 C and 125 C (black and red (in online version) results in Figs. 49 and 50, respectively), considering also that the measured temperature on-chip by the temperature sensor is well below 125 C, the value of 15.2 dBm represents a very good estimation of the power generated on chip in those conditions. This highlights also that the simulated loss for the transition in the RCP package and on-board are in good agreement with the measurement results. Figs. 51 and 52 report the results of the LO power measurement. Also in this case, considering the losses of the connector and on the RF board, which are not de-embedded, there is a good agreement between the data measured on-wafer and the one measured on-board. The results suggest that lowering the output power to 10 dBm at the waveguide interface (3 dB less) would drastically reduce the power consumption allowing achieving a chip backside below 60 C (with heat spreader). In this case, the chip should work in conditions similar to the case when it is glue on top of

Fig. 53. IF signal at the RX output. RF input level

22 dBm.

an RF board with the advantage of lower loss and more reliable transitions at the Tx output (the bondwire losses are larger). Rx Test: Only a few tests were performed thus far on the Rx chip. Since the Rx chip needs to dissipate only half of the Tx power, the thermal effect is not as severe as on the Tx. Since the board was not available, the functionality of the chip was tested performing bonding on the balls. The RF signal was fed through an RF tip contacting the RF signal ball only. As shown in Fig. 53, the IF signal is very clean, no spurs. The CG is only 13 dB, which is 6 dB lower than on-wafer measurement. This drop is mainly due to the way the chip is tested. Also in this case, we can assume that there is no coupling between the lines in the RCP layer. VIII. CONCLUSION A detailed system requirement for an automotive radar chipset was provided. The presented Rx and Tx chips were evaluated in details. The state-of-the-art single-sideband noise

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figure in the Rx, 10 dB, in conjunction with the very low phase noise measured on the Tx, 97 dBc/Hz at 1-MHz offset, will enable the design of a next-generation low power radar system based on fast modulation ramps. The Rx chip dissipates 240 mA at 3.3 V, while the Tx dissipates 530 mA at 3.3 V in full power mode (16-dBm differential power). The two chips have been used as a test vehicle for an RCP 77-GHz package test. The thermal dissipation and the output power behavior have been reported. Since the Rx chip needs to dissipate only half of the Tx power, the thermal effect is not as severe as on the Tx. The backside temperature on the Tx chip was only 72 C in full power mode. To the best of the authors’ knowledge, this is the lowest temperature reported thus far for a 77-GHz packaged Tx. Furthermore, the results suggest that lowering the output power by 3 dB would reduce the power consumption of the Tx, allowing achieving a chip backside below 60 C (with a heat spreader). In this case, the chip should work in conditions similar to the case when it is glue on top of an RF board with the advantage of lower loss and more reliable transitions at the Tx output (the bond-wire losses are larger). This will also enable cost reduction in the radar module assembly process. ACKNOWLEDGMENT The authors would like to thank the complete Freescale Semiconductor package team. REFERENCES [1] H. P. Forstner, H. Knapp, H. Jäger, E. Kolmhofer, J. Platz, F. Starzer, M. Treml, A. Schinko, G. Birschkus, J. Böck, K. Aufinger, R. Lachner, T. Meister, H. Schäfer, D. Lukashevich, S. Boguth, A. Fischer, F. Reininger, L. Maurer, J. Minichshofer, and D. Steinbuch, “A 77 GHz 4-channel automotive radar transceiver in SiGe,” in IEEE Radio Freq. Integr. Circuits Symp. Dig., Jun. 2008, pp. 233–236. [2] A. Babakhani, X. Guan, A. Komijani, A. Natarajan, and A. Hajimiri, “A 77-GHz phased-array transceiver with on-chip antennas in silicon: Receiver and antennas,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2795–2806, Dec. 2006. [3] A. Natarajan, A. Komijani, X. Guan, A. Babakhani, A. Natarajan, and A. Hajimiri, “A 77-GHz phased-array transceiver with on-chip antennas in silicon: Transmitter and local LO-path phase shifting,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2807–2819, Dec. 2006. [4] S. T. Nicolson, P. Chevalier, A. Chantre, B. Sautreuil, and S. P. Voinigescu, “A 77–79-GHz doppler radar transceiver in silicon,” in IEEE Compound Semicond. Integr. Circuit Symp. Dig., Nov. 2007, pp. 1–4. [5] D. Lesperoy, “76 GHz electronic scanning radar,” presented at the Int. Wireless Industry Consortium, Interactive Tech. Workshop, Feb. 2011. [6] J. Hildebrandt, “77 GHz midrange radar for a variety of applications,” presented at the Int. Wireless Industry Consortium, Interactive Tech. Workshop, Feb. 2011. [7] N. Gebert, G. Krieger, and A. Moreira, “Digital beam forming on receive: Techniques and optimization strategies for high-resolution wideswath SAR imaging,” IEEE Trans. Aerosp. Electron. Syst., vol. 45, no. 2, pp. 564–592, Apr. 2009. [8] P. D. L. Beasley, “The influence of transmitter phase noise on FMCW radar performance,” in IEEE 3rd Eur. Radar Conf. Dig., Sep. 2006, pp. 331–334. [9] L. Wu, S. S. Peng, and X. Q. Shi, “Effects of transmitter phase noise on millimeter wave LFMCW radar performance,” in IEEE Int. Microw. Millimeter Wave Technol. Conf. Dig., Apr. 2008, pp. 1415–1418. [10] M. E. Adamski, K. S. Kulpa, M. Nałcz, and A. Wojtkiewicz, “Phase noise in two-dimensional spectrum of video signal in FMCW homodyne radar,” in Proc. Int. Microw., Radar, Wireless Commun. Conf., May 2000, pp. 645–648.

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[11] S. Trotta, H. Li, B. Dehlink, A. Ghazinour, Y. Yin, R. Reuter, S. Majied, and J. John, “A transceiver chipset for automotive LRR and SRR systems in the 76–77 and 77–81 GHz bands in SiGe BiCMOS technology,” in IEEE Radio Freq. Integr. Circuits Symp. Dig., Jun. 2011, [CR ROM]. [12] J. Boeck, “eWLB packaging technology for automotive radars in the 76–81 GHz range,” presented at the IEEE 3rd Eur. Radar Conf. Workshop, 2010. [13] S. Trotta, B. Dehlink, R. Reuter, Y. Yin, J. John, J. Kirchgessner, D. Morgan, P. Welch, J. J. Lin, B. Knappenberger, I. To, and M. Huang, “A multi-channel Rx for 76.5 GHz automotive radar applications with 55 dB IF channel-to-channel isolation,” in IEEE Eur. Microw. Integr. Circuits Conf. Dig., Sep. 2009, pp. 192–195. [14] F. Gruson et al., “A frequency doubler with high conversion gain and good fundamental suppression,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2004, vol. 1, pp. 175–178. [15] S. Trotta, H. Li, V. P. Trivedi, and J. John, “A tunable flipflop frequency divider up to 113 GHz and a fully differential 77 GHz push-push VCO in SiGe BiCMOS technology,” in IEEE Radio Freq. Integr. Circuits Symp. Dig., Jun. 2009, pp. 47–50. [16] S. Trotta, B. Dehlink, A. Ghayinour, D. Morgan, and J. John, “A 77 GHz 3.3 V three-channel transceiver in SiGe BiCMOS technology,” in IEEE Bipolar/BiCMOS Circuits Technol. Meeting Dig., Oct. 2009, pp. 186–189. [17] E. Laskin, P. Chevalier, A. Chantre, B. Sautreuil, and S. P. Voinigescu, “80/160-GHz transceiver and 140-GHz amplifier in SiGe technology,” in IEEE Radio Freq. Integr. Circuits Symp. Dig., Jun. 2007, pp. 153–156. [18] H. Shin and K. Hyun, “Extraction technique of differential second harmonic output in CMOS LC VCO,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 5, pp. 379–381, May 2007. [19] J. P. John, J. Kirchgessner, M. Menner, H. Rueda, F. Chai, D. Morgan, J. Hildreth, M. Dawdy, R. Reuter, and H. Li, “Development of a cost-effective, selective-Epi, SiGe:C HBT module for 77 GHz automotive applications,” in IEEE Bipolar/BiCMOS Circuits Technol. Meeting Dig., Oct. 2006, pp. 1–4. [20] M. D. Richter and M. Schneider, “Substrate-embedded millimeter wave SiGe VCO chip,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2009, vol. 1, pp. 605–608. [21] M. Wojnowski, M. Engl, B. Dehlink, G. Sommer, M. Brunnbauer, M. Pressel, and R. Weigel, “A 77 GHz SiGe mixer in an embedded wafer level BGA package,” in IEEE Electron. Compon. Technol. Conf., May 2008, pp. 290–296. [22] “Redistributed chip packaging (RCP) technology,” Freescale Semiconduct. [Online]. Available: http://www.freescale.com/webapp/sps/site/ overview.jsp?code=ASIC_LV3_PACKAGING_RCP [23] B. Keser, C. Amrine, D. Trung, O. Fay, S. Hayes, G. Leal, W. Lytle, D. Mitchell, and R. Wenzel, “The redistributed chip package: A breakthrough for advanced packaging,” in IEEE Electron. Compon. Technol. Conf., Jun. 2007, pp. 286–291.

Saverio Trotta was born in San Giovanni Rotondo, Italy, in 1976. He received the Laurea degree in electronic engineering from the Politecnico di Bari, Bari, Italy, in 2003. In 2003, he was with the Fraunhofer Institut, Erlangen–Nürnberg, Germany, where he was engaged in the development of high-speed digital integrated circuits (ICs). From 2004 to 2007, he was with Infineon AG, Munich, Germany, where he was involved with research on high-frequency IC design beyond 100 GHz in SiGe bipolar technology. He is currently with the RF/IF Innovation Center, Freescale Semiconductor, Munich, Germany, where he is involved with the design of integrated circuits for 77-GHz automotive radar applications. Markus Wintermantel, photograph and biography not available at time of publication. John Dixon, photograph and biography not available at time of publication. Ulrich Moeller, photograph and biography not available at time of publication.

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Richard Jammers, photograph and biography not available at time of publication.

Sergio Pacheco, photograph and biography not available at time of publication. Ralf Reuter, photograph and biography not available at time of publication.

Torsten Hauck, photograph and biography not available at time of publication. Soran Majied, photograph and biography not available at time of publication. Andrzej Samulak, photograph and biography not available at time of publication.

Daniel Moline, photograph and biography not available at time of publication.

Bernhard Dehlink, photograph and biography not available at time of publication.

Tang Aaron, photograph and biography not available at time of publication.

Kuo Shun-Meen, photograph and biography not available at time of publication.

Vishal P. Trivedi, photograph and biography not available at time of publication.

Hao Li, photograph and biography not available at time of publication.

Dave J. Morgan, photograph and biography not available at time of publication.

Akbar Ghazinour, photograph and biography not available at time of publication.

Jay John, photograph and biography not available at time of publication.

Yi Yin, photograph and biography not available at time of publication.

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A Fundamental Frequency 120-GHz SiGe BiCMOS Distance Sensor With Integrated Antenna Ioannis Sarkas, Student Member, IEEE, Juergen Hasch, Member, IEEE, Andreea Balteanu, Student Member, IEEE, and Sorin P. Voinigescu, Senior Member, IEEE

Abstract—This paper describes the first fundamental frequency single-chip transceiver operating at -band. The low-IF monostatic transceiver integrates on a single chip two 120-GHz voltage-controlled oscillators (VCOs), a 120-GHz divide-by-64 chain, two in-phase/quadrature (IQ) receivers with phase-calibration circuitry, a variable gain transmit amplifier, an antenna directional coupler, a patch antenna, bias circuitry, a transmit power detector, and a temperature sensor. A quartz antenna resonator with 6-dBi gain and simulated 50% efficiency is placed directly above the on-chip patch to transmit and receive the 120-GHz signals. The circuit with the above-integrated-circuit antenna occupies an area of 2.2 mm 2.6 mm, consumes 900 mW from 1.2- and 1.8-V supplies, and was wire-bonded in an open-lid 7 mm 7 mm quad-flat no-leads package. Some transceiver performance parameters were characterized on the packaged chip, mounted on an evaluation board, while others, such as receiver noise figure and VCO phase noise at the 120-GHz output were measured on circuit breakouts. The AMOS-varactor VCOs have a typical phase noise of 100 dBc/Hz at 1-MHz offset and a tuning range of 115.2–123.9 GHz. The receiver gain and the transmitter output power are each adjustable over a range of 15 dB with a maximum transmitter output power of 3.6 dBm. The receiver IQ phase difference, measured at the IF outputs of the packaged transceiver, is adjustable from 70° to 110°, while the amplitude imbalance remains less than 1 dB. The receiver breakout gain and double-sideband noise figure are 10.5–13 and 10.5–11.5 dB, respectively, with an input compression point of 20.5 dBm. Several experiments were conducted through the air over distances of up to 2.1 m with a focusing lens placed above the packaged chip. Index Terms— -band, distance sensor, Doppler radar, integrated antenna, in-phase/quadrature (IQ) receiver, 120-GHz transceiver, phase calibration circuit, radar sensor, SiGe BiCMOS.

short range radar, nondestructive testing with active imaging [12], and high data-rate point-to-point links [13]–[16]. Most importantly, due to the small operating wavelengths involved, different types of integrated antennas can be implemented [17]–[19], avoiding the use of lossy cumbersome off-chip transitions, and thus greatly simplifying the packaging process and enabling very low-cost solutions. The 122.5-GHz industrial–scientific–medical (ISM) band with 1-GHz bandwidth is ideal for narrowband short-range radar sensors for velocity and distance detection of a single reflecting target since no target separation that requires larger bandwidths would be needed. For distances of up to approximately 2 m, a relatively low transmitter power of 0 dBm results in signal-to-noise ratios (SNRs) that are adequate for accurate detection, and simultaneously satisfy the maximum allowed effective isotropic radiated power (EIRP) of 20 dBm, thus paving the way for simple silicon realizations, as will be discussed in this paper. This paper is organized as follows. The system architecture, specification, and analysis are covered in Section II. A detailed description of the transistor-level design considerations and the simulated performance of each block are provided in Section III. Section IV summarizes the antenna design, its simulated performance, and provides a brief overview of the fabrication process and packaging. The experimental verification of the circuit breakouts and of the packaged chip, including radar experiments over a distance of up to 2.1 m, are described in Section V. The main conclusions and comparison with other work are summarized in Section VI.

I. INTRODUCTION

II. SYSTEM ARCHITECTURE

R

ECENT advancements in SiGe BiCMOS technology [1]–[3] have paved the way for the development of integrated transmitters, receivers, and transceivers operating well into the -band (110–170 GHz) frequency range [4]–[10]. This frequency range offers opportunities for new applications of silicon technology, such as passive remote sensing [11],

Manuscript received July 16, 2011; revised October 13, 2011; accepted October 21, 2011. Date of publication January 10, 2012; date of current version March 02, 2012. This work was supported by Robert Bosch GmbH. I. Sarkas, A. Balteanu, and S. P. Voinigescu are with the Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada M5S 3G4 (e-mail: [email protected]). J. Hasch is with Corporate Research and Advance Development, Robert Bosch GmbH, 70049 Stuttgart, Germany. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2176504

A. General Considerations The block diagram of the proposed monostatic 120-GHz transceiver, fabricated in a production 130-nm SiGe BiCMOS process with dedicated millimeter-wave back-end-of-line (BEOL) [2], is illustrated in Fig. 1. Two fundamental frequency voltage-controlled oscillators (VCOs), operating at a frequency difference of 1.5–3 GHz, are employed to generate the transmit and receive local oscillator (LO) signals, allowing for an adjustable receiver output frequency. After passing through an amplifier with variable output power, the transmit VCO signal is coupled to the antenna through a 6-dB directional coupler that isolates the transmitted signal and the received signal reflected by the target. The latter is routed to the receiver through the coupler and undergoes downconversion to an IF by a quadrature receiver. The signal from the receive VCO is distributed to the two in-phase/quadrature (IQ) mixers and to a

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TABLE I SYSTEM PARAMETERS

Fig. 1. Block diagram of the transceiver.

divide-by-64 chain whose output, at approximately 1.9 GHz, is provided to an off-chip phase-locked loop (PLL), which locks the VCO to a stable frequency reference. The local transmit and receive VCO outputs are also downconverted by a second quadrature receiver, which provides a reference IF frequency signal. The reference path IQ downconverter is identical to the main receiver, apart from the low-noise amplifier (LNA), which has been omitted since the amplitudes of the two multiplied signals are large enough for the mixer noise to be irrelevant. The reference receiver serves a dual purpose. First, it can be used to lock the transmit VCO in an external PLL. Second, it provides a phase reference for the main receiver allowing for phase and frequency variations of the signal reflected by the target to be accurately measured. The monostatic radar architecture was preferred over the bistatic one because of its potential for a simpler lower cost solution. Since the antenna feed and ground plane are formed on the silicon die, it is crucial to reduce the number of antennas in order to minimize the use of silicon area, and thus, reduce system cost. Due to imperfect antenna, LNA input, and transmit amplifier output matching, as well as because of imperfections in the antenna directional coupler, a portion of the transmitted signal will leak into the receiver, potentially desensitizing it. After conducting an analysis of different microstrip structures for the directional coupler, in which realistic values were assumed for the reflection coefficients of the circuit blocks connected to the coupler, and the process variation of the termination resistor was accounted for, it was concluded that the isolation between the output of the transmit amplifier and the input of the receiver will not be greater than 20–25 dB. As a result, it was decided to limit the transmitter output power to 0 dBm. Therefore, to ensure that the receiver performance is not impaired by the leakage of the transmitter, the receiver input compression point has to be better than 20 dBm. Both the transmitter output power and the receiver input compression point are relatively easy to satisfy using silicon technology at 122 GHz. To provide an adequate margin in case of even poorer isolation, output power control in the transmit amplifier and gain control in the receiver LNA were introduced.

Another problem associated with the system architecture of Fig. 1 is the crosstalk between the two VCOs, which affects the minimum IF frequency that can be realized in practice. Due to inevitable coupling through the silicon substrate and through the supply distribution planes, the isolation between the two VCOs is finite and they will eventually injection-lock each other if their frequency difference is sufficiently small. When that happens, the IF frequency becomes zero. Unfortunately it is very difficult to analyze and accurately capture all of the coupling mechanisms between the two VCOs in simulation. Therefore, the minimum realizable IF frequency will have to be determined experimentally. B. SNR Analysis To estimate the SNR of the radar transceiver for operation over 2 m, the parameters of Table I have been assumed. The receiver noise figure has been set to 15 dB, higher than that of state-of-art -band SiGe HBT transceivers (e.g., [5], [6], [8], and [9]) in order to account for the degradation due to the antenna coupler. The flicker noise corner for the receiver was set to 10 kHz. The corner frequency is based on simulations of the present receiver and corresponds to the corner of the SiGe HBT at large base and collector currents [2]. Accounting for flicker noise, the receiver output noise floor can be expressed as (1) where is the receiver gain, is the IF frequency, is the Boltzmann’s constant, and is the receiver noise factor. The received signal power at the receiver output is given by (2) where is the attenuation (free-space loss) predicted by the radar equation (3) and is the speed of light. Fig. 2 illustrates the simulated at the receiver output versus frequency for three different integration times. The SNR improves by approximately 30 dB when the IF frequency increases from 10 Hz to 1 MHz. The large SNR gain motivates the use of the proposed transceiver architecture with two VCOs, allowing for finite IF, in contrast to zero-IF

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III. CIRCUIT DESIGN Unlike all other -band SiGe HBT receivers, transmitters, and transceivers reported to date, which operate from 3.3 V or higher supplies and consume 1.5 W or more, one of the most important goals of this design was to reduce power consumption below 1 W, as needed for a portable system. As a result, a decision was made from the outset to use only circuit topologies that operate from 1.2- or 1.8-V supplies. Telescopic cascodes, which provide large gain at -band [4] were intentionally avoided and replaced with capacitively or transformer-coupled cascodes or common-emitter topologies. A. IQ Receiver

Fig. 2. SNR versus IF frequency for the parameters listed in Table I and variable integration time.

radar transceivers, commonly employed in the -band (e.g., [20], [21]) that use a single VCO. The penalty is higher system complexity and higher power consumption. C. Phase-Noise Analysis The receiver noise floor will typically degrade further due to phase noise. Assuming that the receiver IF and reference outputs of Fig. 1 are multiplied, yielding a final zero-IF output, and accounting for range correlation [22], [23], the phase-noise contribution to the receiver noise floor can be estimated as

(4) is the single-sideband (SSB) phase noise of where the VCO (in dBc/Hz), is the IF frequency, and is the IF bandwidth, which is identical to that of (1). Assuming that the VCO phase noise is 100 dBc/Hz at 1-MHz offset from the carrier and that it exhibits a slope of 20 dB/decade between 10 kHz–1 MHz (i.e., ), the noise-floor contribution becomes (5) noise At IF frequencies higher than 1 MHz, where the contribution can be ignored and is minimized, the ratio , calculated from (5), is still larger than 13 dB. This indicates that for a distance of 2 m, the system performance remains largely unaffected by the phase noise of the VCOs, and that it will be limited primarily by the receiver noise figure. It should be noted that there will be an additional phase-noise contribution term due to transmitter leakage. However, because of the even smaller delay, range correlation will be stronger and will also cancel the contribution of this term.

The schematic of the IQ receiver is illustrated in Fig. 3. The input signal is first amplified by a three-stage LNA followed by common-emitter transistors and that double up as transconductors for the I and Q mixers and as an active power splitter. Transformer coupling is employed in the Gilbert-cell mixers that downconvert the 120-GHz RF signal to a low IF frequency. Highly linear unity-gain 50- IF buffers (not shown in the figure) are used as an interface to the external 50- environment. Due to the small power gain of the transistor at 120 GHz, the LNA design is based on optimizing the noise measure of the transistor, rather than the noise figure [24]–[27]. Following [24], [28], and [29], the noise factor ( ) and associated gain ( ) of the transistor can be expressed as (6) (7) where is the minimum noise factor, is the maximum available gain, , , and are the admittance of the input source, and the optimum source admittances for and , respectively. The expression of the noise measure, , of an infinite chain of cascaded identical stages becomes

(8) while the overall noise factor . Equation (8) has a global minimum value at the optimum source admittance [28]. Fig. 4 illustrates the simulated and measured and at 120 GHz versus current density for a 0.13 m 4.5 m SiGe HBT in the utilized SiGe BiCMOS technology [2]. Also shown are the minimum noise factor and the noise factor corresponding to (i.e., source admittance corresponding to the maximum gain) versus current density. The noise factors and of the infinite chain of cascaded identical stages are based on the measured data, obtained using the methodology described in [30]. Due to the small power gain of the device, less than 5 dB, the minimum noise factor, , attained at a current density of 5–8

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Fig. 3. Schematic of the quadrature receiver.

Fig. 4. Measured (lines and symbols) and simulated (dashed lines) maximum ) and minimum noise figure ( ) for a 4.5- m device available gain ( ) and noise measure , at 120 GHz. The minimum noise measure ( also shown, are extracted from the measured data.

mA m , is 2 dB higher than the minimum noise factor . Furthermore, if the transistors in the amplifier were matched for maximum gain, the resulting overall noise factor would be only 0.7 dB higher than . In the system architecture under consideration, the receiver input needs to be well matched to 50 in order for the 6-dB coupler to be terminated symmetrically. Since the noise factor

penalty when matching for is low, directly matching for power ( ) was preferred to using inductive feedback to achieve simultaneous matching for noise and power [31]. Nevertheless, to avoid excessive noise-figure degradation, the first stage of the LNA is biased for low noise, while the second and third stages are biased progressively at slightly higher current densities in order to increase the amplifier gain with negligible impact on the noise figure. Gain control is implemented in the third common-base stage of the LNA by steering the bias current between transistor , whose output drives the tuned L–C load, and , whose collector is connected directly to the power supply. The input impedance of in parallel with remains constant as the current is steered, ensuring that of the LNA does not vary significantly with gain control. Transistors and , forming the power splitter, are of identical size and loading, guaranteeing that the signal applied at their bases is split equally and in-phase among the I and Q mixers and avoiding unwanted I-Q imbalance [32]. Both the LNA and the transconductor cells operate with a 1.2-V supply. Since the linearity of the receiver is limited by the mixer, special attention was paid to maximizing its input compression point. To achieve this, and are biased at the peak current density of 12 mA m and their emitter length is set to 7.5 m, more than two times larger than the size of . Similarly, the mixing quad transistors have an emitter length of 3.5 m, forming a one-to-one cascode with and , respectively. The input compression point of the mixer is further improved by inserting 30-pH degeneration inductors at the emitters of and and by employing a 1.8-V supply for

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and allows for their phases to be calibrated. Calibration is performed by adding weighted I and Q cross paths to the main LO distribution path of opposite phase, i.e., the I cross path is added to the Q main path and vice versa. The operation of the phase correction circuits can be described in the phasor domain as (9) (10) where and are the tail currents of the I and Q differential pairs added on the load impedance , is the amplitude of the I and Q outputs before calibration (assumed equal), and is the variable gain of the cross path. The amplitude imbalance and phase difference of the I and Q outputs are given by (11) (12)

Fig. 5. IQ generation and calibration circuits. (a) Block diagram. (b) Schematic of one of the two parallel paths highlighted in the block diagram.

the mixing quad and IF buffers to maximize the linear output voltage swing. The simulated conversion gain, input 1-dB compression point, and double-sideband noise figure of each of the I and Q mixers (including signal splitting at and ) are 5 dB, 10 dBm, and 18.5 dB, respectively, including the unity gain 50- IF buffers. Although the linearity of the mixer could, in theory, be improved by further increasing the size of and , the required power consumption of the mixer becomes prohibitively high. As a result, the number of stages in the LNA were limited to three so that the receiver achieves the goal of the 20-dBm input 1-dB compression point at maximum gain. Nevertheless, limiting the number of LNA stages does degrade the overall noise figure of the receiver, resulting in a power-noise-linearity tradeoff where noise is traded for linearity. The total power consumption of the receiver is 130 mW, including the 50- IF buffers. The simulated receiver downconversion gain, double-sideband (DSB) noise figure, and input compression point from the LNA input to either the I or the Q IF outputs are 13.5 dB, 12.5 dB, and 20.5 dBm, respectively. B. I-Q Generation and Calibration Due to possible modeling inaccuracies and layout asymmetries in the I-Q LO distribution circuits, phase calibration is necessary in order to guarantee that the receiver IF outputs are in quadrature. Fig. 5(a) illustrates the block diagram of the IQ phase correction circuit that splits the LO signal into quadrature outputs

As a result, under ideal conditions, the amplitude ratio of the I and Q outputs remains constant and the phase difference between and can be varied around 90 , according to the sign of . Fig. 5(b) reproduces the transistor-level schematic of the Q path, highlighted in the block diagram of Fig. 5(a). The input signal is first converted from single-ended to differential mode and is split into the main and cross paths using two parallel differential common-emitter amplifiers in a 2:1 size ratio. The output signal from each differential amplifier is coupled via 1:1 symmetrical baluns to a buffer amplifier on the main path, and to a Gilbert-cell variable gain amplifier (VGA) on the cross path. The advantage of using a Gilbert-cell-based VGA is that both variable gain and sign selection are possible. The output of the VGA is then buffered by a differential common-emitter stage before being added to the main I path. This buffering stage is absolutely necessary because the output impedance of the VGA varies with the gain-control setting and would otherwise lead to uncontrolled loading of the main I path, and ultimately to parasitic amplitude modulation. After adding the currents of the main and cross paths at the primary of yet another balun, the resulting output signal is buffered by a 3- m differential common-base stage to ensure that the output power is sufficiently large to fully switch the HBTs in the mixing quads. As shown in Fig. 5(a), the input signal to the phase correction circuit is first split into in-phase and quadrature paths by a lumped 90 hybrid, illustrated in Fig. 6(a), which is designed according to the methodology presented in [33]. Fig. 6(b) reproduces the measured and simulated amplitude imbalance and phase difference between the I and Q outputs of the hybrid. To perform the -parameters measurement, two separate test structures with on-chip 50- terminations were utilized [32], as well as a two-tier de-embedding procedure described in [34]. The 6 disagreement between measurement and simulation of the phase difference is attributed to limitations in modeling the lumped components, as well as to possible deviation of the on-chip terminations from their ideal 50- value, indicating the necessity of calibration.

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Fig. 7. Simulated performance of the I-Q generation and calibration circuit at 122 GHz.

Fig. 6. Quadrature hybrid. (a) Schematic. (b) Measured and simulated results.

The simulated small-signal power gain and phase difference at 122 GHz from the input to the I and Q outputs is illustrated in Fig. 7. A phase adjustment range of 60 to 110 is predicted. The absolute amplitude imbalance between the I and Q outputs is less than 1.8 dB for the entire phase adjustment range. This amplitude imbalance is not predicted by (11) and is due to nonidealities such as unequal delays between the main and cross paths, as well as due to variation of the VGA transmission phase as a function of its gain setting. The power consumption of the I-Q generation and calibration circuit is 92 mW from a single 1.2-V power supply. C. VCO The schematic of the 120-GHz fundamental frequency VCO is shown in Fig. 8(a) and follows a differential Colpitts topology [35], a common choice for low phase-noise millimeter-wave VCOs [36]–[38]. In order to achieve low phase noise, a single transistor topology is employed. It has the added benefit of operation from a low-voltage supply, avoiding the use of a stacked common-base buffer [37], [39]. In order to maximize the quality factor of the tank, multifinger double-side contacted 130-nm accumulation-mode MOS varactors with 1- m-wide gate fingers were employed. The measured quality factor of these varactors is 4–16 in the -band [30], and is typically higher than that of pn-junction varactors [30], [38], while their measured ratio is 2:1 [30] with a voltage tuning range that is CMOS compatible (0–1.2 V). Moreover, in order to maximize the voltage swing on the oscillator tank and thus minimize phase noise, the HBT emitter length is set to the

largest possible value that still permits a reasonable tank inductance value, 7.5 pH in this case. The HBTs are biased at their peak- current density, guarantying the oscillation condition [38] and large output power. To simplify the design of the external PLL and to minimize the PLL noise contribution and spurs, coarse and fine control of the VCO frequency is provided by two groups of varactors. The grouping for coarse control has a total varactor size of 13 1 m 0.13 m and can be adjusted once, at power up, to bring the VCO frequency close to the intended value. A 3 1 m 0.13 m varactor is used for fine tuning as part of the PLL. This arrangement minimizes the VCO gain in the PLL. Single-ended controls were preferred in order to simplify the chip interface with the external loop filter. A previous version of this VCO [8], [10] featured a single differential control voltage, as shown in Fig. 8(b). Half of the varactors have the gates connected to the tank, while the other half have their n-wells tied to the tank. Although this arrangement reduces the common-mode noise and yields better phase noise, the varactors with the n-well connected to the tank introduce additional parasitic capacitance and reduce the overall VCO tuning range. The VCO with single-ended controls is expected to have wider tuning range and slightly higher phase noise than that in [8] and [10]. Optimization of the symmetrical VCO layout is crucial to achieve the intended oscillation frequency and tuning range at -band. The 7.5-pH tank inductors were formed as a single 5- m-wide inductive line with the top two copper layers shunted together for a total thickness of 6 m in order to be able to precisely control the inductance. Fig. 8(c) reproduces the die microphotograph of a VCO breakout. The total power consumption of each VCO is 76 mW from a 1.8-V power supply. D. LO Distribution Distributing the 120-GHz LO signal to a relatively large number of circuits without degrading its amplitude is a challenging task. Passive power splitting has been employed at lower frequencies (e.g., [40]–[43]). However, such an approach

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Fig. 9. Receive VCO signal distribution.

Fig. 8. 120-GHz Colpitts VCOs. (a) VCO with single-ended control. (b) VCO with differential control. (c) Die microphotograph. Fig. 10. Transmit VCO signal distribution.

would suffer from very high insertion loss, which, ultimately, requires very powerful buffers to be placed at the output of the VCO. In order to avoid designing such buffers, an active power distribution solution was preferred, as illustrated in Figs. 9 and 10 for the cases of the receive VCO and the transmit VCO, respectively. The first set of buffers, placed immediately after the VCOs, employ the smallest transistor size in order to avoid overloading the VCO, which would endanger the oscillation condition. Furthermore, in order for the two VCOs to be loaded similarly and to oscillate in the same frequency range, these buffers are identical for both the TX and RX LO trees. The second-level buffers are scaled by a factor of two (4 m) and operate close to their 1-dB output compression point, ensuring that their output power

is sufficiently large to drive the subsequent stages in compression. The third set of buffers in the receiver LO tree have their inputs connected in parallel and the transistor size is selected such that the divider receives adequate input power to guarantee proper frequency division. Conjugate power matching with -sections was employed between buffer stages, whereas -matching networks were used at the 50- interfaces (Figs. 9 and 10) since the corresponding -sections would require very small capacitors and would result in very narrow bandwidth. Common-mode inductors and resistors are introduced to increase the common-mode rejection ratio and improve the bias stability. All transistors in all buffers are biased at the peak- current density.

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Fig. 12. Block diagram of the divider chain.

Fig. 11. Transmit amplifier schematic and simulation results. (a) Schematic of the variable gain transmit amplifier. (b) Simulated power detector output voltage versus amplifier output power at 122 GHz. The output power is varied through the gain control function.

The LO distribution network in the receiver delivers 4 dBm to the divider and 1 dBm to each of the I-Q generation and calibration circuits at 120 GHz, while consuming 90 mW from a single 1.8-V power supply. The transmitter LO distribution tree delivers 1 dBm to the transmit amplifier and to the reference downconverter while consuming 40 mW from 1.8-V power supply. E. Transmit Amplifier The schematic of the transmit amplifier is illustrated in Fig. 11(a) and is identical to that of the LNA, except for the power supply voltage of the last stage, which was increased to 1.8 V in order to ensure that the output power is at least 0 dBm. The output network was modified to facilitate 50- matching. The power detector function is realized with a common-collector HBT biased at a low current density using a MOS current source [44]. The detector is ac-coupled through a 200-fF capacitor to the output of the amplifier. The smallest HBT size was selected in order to minimize the loading of the amplifier. The simulated power detector output voltage versus the output power of the transmit amplifier is reproduced in Fig. 11(b).

Fig. 13. Schematic of the 120-GHz dynamic divider.

F. Divider Chain The block diagram of the divider chain is reproduced in Fig. 12 and consists of a 120-GHz dynamic divider stage, chosen for its high operation frequency[45], [46], followed by 1.8- and 1.2-V static current-mode logic (CML) dividers. Two cascaded CML-buffers were inserted between the 120and 60-GHz divider stages to boost the signal level over all process, supply, and temperature corners. A single CML buffer was placed between the 60- and 30-GHz divider stages for the same purpose. The schematic of the 120-GHz dynamic divider is shown in Fig. 13. It features a low-voltage Gilbert-cell mixer and a low-pass filter formed by a pair of ac-coupled emitter followers, the 200-fF series capacitors and the input resistance of the differential transconductor pair. The LO signal is applied directly to the mixing quad. In order to facilitate operation from a 1.8-V supply, transformer and capacitive coupling is employed in the feedback path between the transconductor pair and the mixing quad, and between the emitter followers and the transconductor pair, respectively. An earlier version of the dynamic divider [8], [10] used transformer coupling also between the emitter followers and the transconductor pair. Simulation predicts that replacing

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Fig. 14. 6-dB coupler. (a) Sketch. (b) Measured and simulated -parameters.

the transformer with a pair of metal–insulator–metal (MiM) capacitors increases the maximum division frequency by approximately 5 GHz. However, replacing the second transformer between the transconductor and the mixing quad is more difficult since four inductors and two capacitors would be needed to provide loads to the transconductors, the ac coupling, and the supply current, resulting in unacceptably narrowband operation and larger area. The penalty for ac coupling the feedback path in dynamic dividers is an increase in the lowest division frequency [47]. However, this is partially circumvented by the higher transistor gain at lower frequencies. The simulated division range of the dynamic divider extends from 130 GHz down to 80 GHz. The simulated power consumption of the entire divider chain is 115 mW from 1.2- and 1.8-V power supplies. G. 6-dB Coupler The sketch of the coupled-line, 6-dB antenna coupler is illustrated in Fig. 14(a) [8]. The two coupled lines are realized in the top 3- m-thick metal layer (M6), while the ground plane is realized with the bottom three metal layers shunted together. In order to meet the required metal density rules, a floating bar in metal 5, located 1.5 m below the top metal layer, is inserted between the two arms of the coupler. The width of the floating bar is chosen to improve the overall isolation of the coupler by optimizing the matching between the even- and odd-mode velocities [48], [49]. A comparison between the measured and simulated -parameters of the 6-dB coupler is reproduced in Fig. 14(b). The 6-dB

Fig. 15. Simulated performance of the antenna. (a) Antenna simulation CAD model. (b) 3-D radiation pattern. (c) Simulated gain versus frequency, including mismatch losses.

coupler was also characterized using two separate test structures with on-chip terminations. The loss of the “thru” arm remains below 2 dB at 120 GHz, while the isolation and input reflection

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Fig. 16. Cross section of the BEOL. Fig. 18. Packaged transceiver. (a) Transceiver mounted in a QFN package. (b) Close-up view of the quartz resonator.

TABLE II QUALITY FACTORS OF PASSIVE COMPONENTS

Fig. 17. Die microphotograph. The dimensions are 2.2 mm

2.6 mm.

are better than 20 dB. Very good matching between the simulated and measured ”thru” and ”coupled” transmission coefficients is achieved. The measured reflection coefficient and isolation slightly deviate from their simulated values. However, it is difficult to know if this is due to a design inaccuracy or because of deviations and mismatches of the on-chip terminations. IV. ANTENNA DESIGN, FABRICATION, AND PACKAGING A. Antenna Design The antenna is a frequency-scaled version of the antenna presented in [17] and consists of a shorted patch on-die feed radiating from one side, electromagnetically coupled to an external

Fig. 19. Measured VCO tuning range. (a) Tuning range versus fine control. (b) Tuning range versus coarse control.

patch resonator. The latter is manufactured on a low-loss quartz substrate.

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Fig. 20. Measured phase noise of the VCO at 118 GHz.

Fig. 21. Measured (lines and symbols) -parameters of the LNA breakout for six gain settings. The dashed lines correspond to simulations at maximum gain.

The antenna was simulated along with the package and the bondwires in a 3-D electromagnetic (EM) simulator, as illustrated in Fig. 15(a). The gain and radiation pattern are reproduced in Fig. 15(b). The simulated antenna gain and efficiency are 6 dBi and 50%, respectively, including the mismatch loss. The simulated antenna 1-dB bandwidth of 9 GHz is shown in Fig. 15(c). Similar antenna solutions with comparable performance have also been reported at 94 GHz in [18] and [19]. B. Fabrication and Packaging The transceiver was fabricated in STMicroelectronic’s BC9MW 130-nm SiGe BiCMOS process [2], which features heterojunction bipolar transistors (HBTs) with of 230/280 GHz, 130 nm MOSFETs, and six copper layers, the top two being 3- m thick, as illustrated in the cross section of Fig. 16. These top two metal layers (M5–M6) and the 2-fF m MiM capacitors were employed to realize all of the

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Fig. 22. Measured (lines and symbols) and simulated (dashed lines) DSB noise figure and downconversion gain of the receiver breakout.

Fig. 23. Measured sensitivity of the divider chain.

high-frequency passive components, while the bottom three (M1–M3) were utilized for the ground plane. The passive components (inductors, transformers, couplers, and transmission lines) were designed using two commercial planar EM simulators (Agilent Momentum and Sonnet). Furthermore, the design methodology and the simulation accuracy of the passive components have been verified in many cases using -band -parameter measurements [34]. Table II summarizes the quality factors of some characteristic frequently used passive components. Fig. 17 shows a die microphotograph of the transceiver, which occupies 2.2 mm 2.6 mm. Several 0.3-pF capacitors have been employed for bias decoupling in all circuit blocks in order to ensure circuit stability and proper power supply noise filtering. In addition to surrounding the receiver, VCOs, and divider with ground shields to avoid noise coupling, their power supplies are provided from separate pads and employ isolated supply planes [50]. The physical distance from the transmit VCO and amplifier to the rest of the circuits has been maximized in an effort to

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Fig. 24. Measured (lines and symbols) and simulated (dashed lines) phase adjustment range of the I-Q receiver and amplitude imbalance when the phase is calibrated.

minimize the leakage from the transmitter to the receiver and to reduce the frequency range over which the TX and RX VCOs are injection locking. The chip is mounted in an open-lid quad-flat no-leads (QFN) package with the external quartz antenna glued on top of the chip, as illustrated in Fig. 18(a). Fig. 18(b) shows a close-up view of the resonator glued on the chip. V. MEASUREMENT RESULTS The antenna coupler, the on-chip power detector, and the phase generation and calibration circuits allow for the verification of the functionality and for some of the quantitative performance parameters of the packaged transceiver to be evaluated without millimeter-wave equipment and measurements. At the same time, due to the difficulty of accurately quantifying all performance parameters of the integrated transceiver with antenna through free-space measurements, and in order to evaluate the performance of the individual blocks, several breakouts of the transceiver circuits were fabricated and characterized separately on wafer. A. Breakouts 1) VCO: The VCO was characterized: 1) as a standalone breakout; 2) in a breakout that includes the VCO and the divider chain; 3) in the receiver breakout; and 4) in the packaged transceiver at the divider output. Fig. 19 reproduces the measured tuning range of the VCO at the IF output of the receiver, when the fine tuning control is swept from 0 to 1.2 V for different values of the coarse tuning control [see Fig. 19(a)] and [see Fig. 19(b)] when only the fine control is swept. The tuning range spans 8.7 GHz from 115.2 to 123.9 GHz. Fig. 20 illustrates the measured 100 dBc/Hz at 1-MHz phase noise of the VCO at 118 GHz. This is on par or better than that of other state-of-the-art SiGe HBT VCOs in this frequency range [5], [51] and approximately 3–5 dB worse than the VCO version with differential control in [8]. 2) LNA: The -parameters of the LNA were measured in a separate breakout using a -band VNA. The and for

Fig. 25. Quadrature receiver outputs. (a) plot of the receiver IQ outputs GHz. at two frequencies. (b) Time-domain signals when

the first few gain settings are depicted in Fig. 21. The dashed lines correspond to simulations in the highest gain state. The variation with gain has been minimized by using the gain control technique described in Section III-A. Good agreement between simulation and measurements has been achieved due to careful modeling of all interconnects and passive components. Similar results, but with slightly higher , were obtained for the transmit amplifier. 3) Receiver: A separate receiver breakout was characterized with an ELVA-1 -band noise source. The measured single-ended conversion gain and DSB noise figure (from the RF input to the I IF output), at a 500-MHz IF frequency, are shown in Fig. 22. Since the 50- IF buffers have no gain, the entire downconversion gain is achieved by the RF front-end alone. Although in this application the gain of the LNA had to be limited in order to preserve the overall linearity of the receiver, the 10–11.5-dB receiver noise figure is comparable to those of other -band transceivers fabricated in technologies with similar performance [5], [6], [9]. The measured noise figure is 2 dB better than simulation, consistent with many other results obtained with this design kit [30], [52] and is attributed to the inadequate capturing of the correlation between

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Fig. 26. Measured (lines and symbols) and simulated (dashed line) on-chip power detector output voltage versus frequency and transmitter output power based on the simulated performance of the detector.

Fig. 28. Measured and simulated -plane normalized antenna radiation patterns with and without the focusing lens.

Fig. 27. Transmitter output power versus control voltage measured with a power meter, at the IF receiver outputs, and at output of the on-chip power detector at 122 GHz.

the collector and base noise currents and to an overestimation of the noise resistance [30], [53]. 4) Divider Chain: The divider chain was characterized as part of the transceiver and as a standalone divider-chain breakout. The measured sensitivity is reproduced in Fig. 23 and hovers at 7 to 8 dBm for input signals in the 76–110-GHz range. -band operation was also verified between 115–123 GHz, when the divider chain is driven by the VCO. However, the absolute value of the sensitivity in this frequency range is unknown since there are no means to control and measure the power at the input of the divider.1 B. Transceiver 1) Receiver: Although the transceiver with the on-die antenna feed could not be wafer-probed, certain measurements could be carried out on the packaged chip, mounted on the printed circuit board (PCB), by taking advantage of the leakage 1The available source does not provide sufficient power to measure the sensitivity of the standalone divider chain.

Fig. 29. Rotation speed test setup.

from the transmitter to the receiver and of the detector placed at the output of the transmitter. The IF outputs of the receiver and divider chain were monitored with a spectrum analyzer and an oscilloscope, and the injection-locking properties of the two VCOs were analyzed. As the frequency difference between the transmit and receive VCOs, and thus the IF frequency, was decreased to less than 1 GHz, the harmonics of the IF signal started to emerge and modulating tones appeared in the divided-down receive VCO

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Fig. 30. Measured speed of a rotating reflector placed at 30 cm above the board. (a) Spectrum. (b) Time-domain signal.

spectrum. In order to avoid this injection-locked mode of operation, the rest of the transceiver measurements were performed with 1.5-GHz frequency offset between the transmitter and receiver VCOs. The upper limit of the IF frequency is 5 GHz due to receiver bandwidth and package limitations. The phase difference and phase adjustment range of the I and Q IF outputs were measured by taking advantage of the leakage from the transmitter to the receiver. Fig. 24 reproduces the measured phase adjustment range of the I and Q outputs of the receiver as a function of the LO frequency. The phase difference can be adjusted from 70 to 110 , which agrees reasonably well with the simulated values. The discrepancy between measurements and simulations in the lower range is attributed to the mismatch between the measured and simulated performance of the quadrature hybrid, as well as to other layout imbalances in the mixer that were intended to be calibrated with this circuit. Also shown in Fig. 24 is the measured amplitude imbalance between of the I and Q receiver outputs when the phase is cal-

Fig. 31. Measured speed of a rotating reflector placed at 2.1 m above the board. (a) Spectrum. (b) Time-domain signal.

TABLE III POWER CONSUMPTION

ibrated to be exactly 90 for each receiver LO frequency. The amplitude imbalance remains less than 0.4 dB (better than simulation due to the saturated operation of the mixer in the LO port) for the entire range, and could be easily compensated by including variable gain in the baseband amplifiers. Fig. 25(a) reproduces an – plot of the calibrated I and Q receiver outputs for two LO frequencies while the corresponding time domain signals are shown in Fig. 25(b).

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TABLE IV PERFORMANCE COMPARISON

2) Transmitter: In order to characterize the output power of the transmitter, the dc voltage of the on-chip power detector was measured over frequency, as illustrated in Fig. 26. Based on the simulated performance of that detector [see Fig. 11(b)], the signal power at the transmit amplifier output was estimated to be approximately 3.6–3.7 dBm across the entire TX VCO frequency range. Furthermore, the less than 20-mV mismatch between the measured and simulated detector output voltages indicate that the error in the estimated output power is expected to be less than 1 dB. The output power control function was verified, as illustrated in Fig. 27, by varying the transmit amplifier output power control and monitoring the power of the receiver IF output and the dc output voltage of the on-chip power detector. Furthermore, an ELVA-1 -band power sensor with a horn antenna was brought close to the chip and its power reading was monitored.2 As seen in Fig. 27, the three power measurements track each other, indicating that the output power can be controlled over a range of at least 15 dB. Furthermore, this experiment also validates the linear operation of the receiver since the amplitude of the IF output signal due to transmitter leakage responds linearly to changes in the transmitter output power. 3) Antenna: The relative radiation pattern of the antenna was measured at the output of the receiver by placing the PCB with the packaged chip on a rotating table and illuminating it using a 122-GHz signal source. As illustrated in Fig. 28, two cases were compared, which were: 1) the board with the EM-coupled antenna alone and 2) the board with an EM-coupled antenna and a dielectric meniscus lens with mm diameter and 20-mm focal length, which yields a maximum theoretical gain of

dBi

(13)

2This measurement was performed in the near field as the power sensor does not have enough sensitivity to measure the power in the far field. Therefore, deembeding the free-space loss was not attempted.

Based on the measured patterns of Fig. 28, the antenna gain is improved by 20 dB by the lens. As a result, the estimated total antenna gain is 26 dBi. 4) Measurement of Rotation Speed: To verify the intended operation of the transceiver through the air, the speed of a rotating reflector placed at various distances was measured using the evaluation board with the packaged chip and the dielectric lens. In this simple test case, a portion of the transmitted signal at frequency leaks into the receiver input and another portion is transmitted and reflected back by the reflector. The signal at the I IF output of the receiver can be expressed as (14) and are the amplitudes of the signal leaking where from the transmitter to the receiver and the reflected signals, respectively, and are the corresponding phases, while is the IF frequency. is a function that depends on the reflector type, the antenna radiation pattern, and the rotation speed. In its simplest form, is unity when the reflector is in parallel with the evaluation board and zero elsewhere. The amplitude of the reflected signal can be calculated by using (2) as

(15) where is the termination impedance at the IF output. Similarly, the I reference output is (16) By multiplying the reference and IF output signals and lowpass filtering, the baseband signal becomes (17)

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Equation (17) indicates that the baseband signal includes a dc component that depends on the leakage and a time-varying part that depends on the rotation speed of the reflector. Based on the simple model for , the strongest harmonic in the spectrum of the baseband signal will correspond to the rotation speed. In practice, all four outputs of the chip could be further downconverted to a lower IF frequency of a few megahertz, digitized and processed by a digital signal processor. However, for a simple demonstration, the in-phase receiver IF output is amplified and multiplied with the in-phase reference output using an external passive mixer, as illustrated in Fig. 29. Fig. 30 reproduces the output in time and frequency domains for a 13 13 cm reflector, located 30 cm away from the PCB (including the dielectric lens). Fig. 31 shows when the reflector is positioned 2.1 m away from the PCB. The lower frequency tones in Fig. 31(a) correspond to movement spurs caused by the person who held the rotor in place. The difference in rotation speed between the two positions is also caused by this person’s movement. In both experiments, the transmitter frequency was 122 GHz, while the receiver frequency was 120 GHz. VI. CONCLUSION A single-chip low-power low-voltage SiGe BiCMOS transceiver operating at 120 GHz has been presented. By careful selection of circuit topologies and by exploiting ac coupling techniques, the power supply voltage was kept below 1.8 V and the power consumption was reduced to 900 mW. By employing an on-chip antenna feed along with an external patch resonator, no off-chip transitions were necessary at 120 GHz. As a result, the chip was wirebonded in a low-cost open-lid QFN package, demonstrating the feasibility of future low-cost highly integrated -band systems. A breakdown of the 900-mW power consumption of the transceiver chip is presented in Table III. Most of the power was consumed for generating, distributing, and calibrating the LO signals, which was necessary in order to ensure proper operation of the transceiver. Table IV compares the performance of this transceiver with recently reported transmitters, receivers, and transceivers operating at -band. ACKNOWLEDGMENT The authors would like to thank Dr. K. Yau and E. Dacquay for assistance with measurements, Dr. P. Chevalier, Dr. G. Avenier, and Dr. B. Sautreuil for discussions on the SiGe BiCMOS process, and J. Pristupa for CAD support and the Natural Sciences and Engineering Research Council of Canada (NSERC), Ontario Innovation Trust (OIT), and the Canada Foundation for Innovation (CFI) for equipment grants. The chips were fabricated and donated by STMicroelectronics, Crolles, France. REFERENCES [1] P. Chevalier, F. Pourchon, T. Lacave, G. Avenier, Y. Campidelli, L. Depoyan, G. Troillard, M. Buczko, D. Gloria, D. Celi, C. Gaquiere, and A. Chantre, “A conventional double-polysilicon FSA-SEG Si/SiGe:C ,” in Bipolar/BiCMOS Circuits Technol. HBT reaching 400 GHz Meeting, Oct. 2009, pp. 1–4.

[2] G. Avenier, N. Revil, P. Chevalier, S. Pruvost, J. Bouvier, G. Avenier, G. Troillard, L. Depoyan, M. Buczko, S. Montusclat, A. Margain, S. T. Nicolson, K. H. K. Yau, D. Gloria, A. Chantre, M. Diop, N. Loubet, N. Derrier, C. Leyris, S. Boret, D. Dutartre, and S. P. Voinigescu, “0.13 m SiGe BiCMOS technology fully dedicated to mm-wave applications,” IEEE J. Solid-State Circuits, vol. 44, no. 9, pp. 2312–2321, Sep. 2009. [3] H. Rucker, B. Heinemann, W. Winkler, R. Barth, J. Borngraber, J. Drews, G. Fischer, A. Fox, T. Grabolla, U. Haak, D. Knoll, F. Korndo? andrfer, A. Mai, S. Marschmeyer, P. Schley, D. Schmidt, J. Schmidt, M. Schubert, K. Schulz, B. Tillack, D. Wolansky, and Y. Yamamoto, “A 0.13 m SiGe BiCMOS technology featuring of 240/330 GHz and gate delays below 3 ps,” IEEE J. Solid-State Circuits, vol. 45, no. 9, pp. 1678–1686, Sep. 2010. [4] E. Laskin, P. Chevalier, A. Chantre, B. Sautreuil, and S. P. Voinigescu, “165-GHz transceiver in SiGe technology,” IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1087–1100, May 2008. [5] K. Schmalz, W. Winkler, J. Borngraber, W. Debski, B. Heinemann, and J. Scheytt, “A subharmonic receiver in SiGe technology for 122 GHz sensor applications,” IEEE J. Solid-State Circuits, vol. 45, no. 9, pp. 1644–1656, Sep. 2010. [6] E. Laskin, P. Chevalier, B. Sautreuil, and S. P. Voinigescu, “A 140-GHz double-sideband transceiver with amplitude and frequency modulation operating over a few meters,” in Proc. Bipolar/BiCMOS Circuits Technol. Meeting, Oct. 2009, pp. 178–181. [7] M. Jahn, A. Stelzer, and A. Hamidipour, “Highly integrated 79, 94, and 120-GHz SiGe radar frontends,” in IEEE MTT-S Int. Microw. Symp. Dig., May 2010, pp. 1324–1327. [8] I. Sarkas, E. Laskin, J. Hasch, P. Chevalier, and S. Voinigescu, “Second generation transceivers for -band radar and data communication applications,” in IEEE MTT-S Int. Microw. Symp. Dig., May 2010, pp. 1328–1331. [9] U. Pfeiffer, E. Ojefors, and Y. Zhao, “A SiGe quadrature transmitter and receiver chipset for emerging high-frequency applications at 160 GHz,” in Proc. IEEE Int. Solid-State Circuits Conf., Feb. 2010, pp. 416–417. [10] S. Voinigescu, E. Laskin, I. Sarkas, K. Yau, S. Shahramian, A. Hart, A. Tomkins, P. Chevalier, J. Hasch, P. Garcia, A. Chantre, and B. Sautreuil, “Silicon -band wireless transceivers and applications,” in Asia–Pacific Microw. Symp. Dig., Dec. 2010, pp. 1857–1864. [11] “Imaging at millimeter-wave and beyond, workshop WSC,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2011. [12] E. Ojefors, U. Pfeiffer, A. Lisauskas, and H. Roskos, “A 0.65 THz focal-plane array in a quarter-micron CMOS process technology,” IEEE J. Solid-State Circuits, vol. 44, no. 7, pp. 1968–1976, Jul. 2009. [13] T. Kosugi, A. Hirata, T. Nagatsuma, and Y. Kado, “mm-wave longrange wireless systems,” IEEE Microw. Mag., vol. 10, no. 2, pp. 68–76, Apr. 2009. [14] U. Yodprasit, R. Fujimoto, M. Motoyoshi, K. Takano, and M. Fujishima, “ -band 3.6-dB-insertion-loss ASK modulator with 19.5-dB isolation in 65-nm CMOS technology,” in Asia–Pacific Microw. Symp. Dig., Dec. 2010, pp. 1853–1856. [15] Z. Xu, Q. Gu, Y.-C. Wu, A. Tang, Y.-L. Lin, H.-H. Chen, C. Jou, and M.-C. Chang, “ -band CMOS transmitter and receiver for multi-gigabit/sec wireless data link,” in IEEE Custom Integr. Circuits Conf., Sep. 2010, pp. 1–4. [16] N. Deferm and P. Reynaert, “A 120 GHz 10 Gb/s phase-modulating transmitter in 65 nm LP CMOS,” in Proc. IEEE Int. Solid-State Circuits Conf., Feb. 2011, pp. 290–292. [17] J. Hasch, U. Wostradowski, S. Gaier, and T. Hansen, “77 GHz radar transceiver with dual integrated antenna elements,” in German Microw. Conf., Mar. 2010, pp. 280–283. [18] Y. Atesal, B. Cetinoneri, M. Chang, R. Alhalabi, and G. Rebeiz, “Millimeter-wave wafer-scale silicon BiCMOS power amplifiers using free-space power combining,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 4, pp. 954–965, Apr. 2011. [19] Y.-C. Ou and G. M. Rebeiz, “On-chip slot-ring and high-gain horn antennas for millimeter-wave wafer-scale silicon systems,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 8, pp. 1963–1972, Aug. 2011. [20] S. Nicolson, K. Yau, S. Pruvost, V. Danelon, P. Chevalier, P. Garcia, A. Chantre, B. Sautreuil, and S. Voinigescu, “A low-voltage SiGe BiCMOS 77-GHz automotive radar chipset,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 5, pp. 1092–1104, May 2008.

SARKAS et al.: FUNDAMENTAL FREQUENCY 120-GHz SiGe BiCMOS DISTANCE SENSOR WITH INTEGRATED ANTENNA

[21] H. Forstner, H. Knapp, H. Jager, E. Kolmhofer, J. Platz, F. Starzer, M. Treml, A. Schinko, G. Birschkus, J. Bock, K. Aufinger, R. Lachner, T. Meister, H. Schafer, D. Lukashevich, S. Boguth, A. Fischer, F. Reininger, L. Maurer, J. Minichshofer, and D. Steinbuch, “A 77 GHz 4-channel automotive radar transceiver in SiGe,” in IEEE RFIC Symp. Dig., Apr. 2008, pp. 233–236. [22] M. C. J. Budge and M. Burt, “Range correlation effects on phase and amplitude noise,” in Proc. IEEE Southeastcon, Apr. 1993, pp. ???–???. [23] A. Stove, “Linear FMCW radar techniques,” Proc. Inst. Elect. Eng. —Radar Signal Processing, vol. 139, no. 5, pp. 343–350, Oct. 1992. [24] R. Tucker, “Low-noise design of microwave transistor amplifiers,” IEEE Trans. Microw. Theory Tech., vol. MTT-23, no. 8, pp. 697–700, Aug. 1975. [25] H. Haus and R. Adler, “Optimum noise performance of linear amplifiers,” Proc. IRE, vol. 46, no. 8, pp. 1517–1533, Aug. 1958. [26] J. Bardin and S. Weinreb, “Experimental cryogenic modeling and noise of SiGe HBTs,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2008, pp. 459–462. [27] M. Gordon and S. Voinigescu, “An inductor-based 52-GHz 0.18 m SiGe HBT cascode LNA with 22 dB gain,” in Proc. ESSCIRC, Sep. 2004, pp. 287–290. [28] H. Fukui, “Available power gain, noise figure, and noise measure of two-ports and their graphical representations,” IEEE Trans. Circuit Theory, vol. CT-13, no. 2, pp. 137–142, Jun. 1966. [29] C. Poole and D. Paul, “Optimum noise measure terminations for microwave transistor amplifiers,” IEEE Trans. Microw. Theory Tech., vol. MTT-33, no. 11, pp. 1254–1257, Nov. 1985. [30] K. H. K. Yau, P. Chevalier, A. Chantre, and S. P. Voinigescu, “Characterization of the noise parameters of SiGe HBTs in the 70–170-GHz range,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 8, pp. 1983–2000, Aug. 2011. [31] S. Voinigescu, M. Maliepaard, J. Showell, G. Babcock, D. Marchesan, M. Schroter, P. Schvan, and D. Harame, “A scalable high-frequency noise model for bipolar transistors with application to optimal transistor sizing for low-noise amplifier design,” IEEE J. Solid-State Circuits, vol. 32, no. 9, pp. 1430–1439, Sep. 1997. [32] I. Sarkas, S. Nicolson, A. Tomkins, E. Laskin, P. Chevalier, B. Sautreuil, and S. Voinigescu, “An 18-Gb/s, direct QPSK modulation SiGe BiCMOS transceiver for last mile links in the 70–80 GHz band,” IEEE J. Solid-State Circuits, vol. 45, no. 10, pp. 1968–1980, Oct. 2010. [33] I. Sarkas, M. Khanpour, A. Tomkins, P. Chevalier, P. Garcia, and S. Voinigescu, “ -band 65-nm CMOS and SiGe BiCMOS transmitter and receiver with lumped I-Q phase shifters,” in IEEE RFIC Symp. Dig., Jun. 2009, pp. 441–444. [34] K. Yau, I. Sarkas, A. Tomkins, P. Chevalier, and S. Voinigescu, “Onwafer -parameter de-embedding of silicon active and passive devices up to 170 GHz,” in IEEE MTT-S Int. Microw. Symp. Dig., May 2010, pp. 600–603. [35] L. Dauphinee, M. Copeland, and P. Schvan, “A balanced 1.5 GHz voltage controlled oscillator with an integrated LC resonator,” in Proc. IEEE Int. Solid-State Circuits Conf., Feb. 1997, pp. 390–391. [36] S. Voinigescu, D. Marchesan, and M. Copeland, “A family of monolithic inductor-varactor SiGe-HBT VCOs for 20 GHz to 30 GHz LMDS and fiber-optic receiver applications,” in IEEE RFIC Symp. Dig., 2000, pp. 173–177. [37] H. Li and H.-M. Rein, “Millimeter-wave VCOs with wide tuning range and low phase noise, fully integrated in a SiGe bipolar production technology,” IEEE J. Solid-State Circuits, vol. 38, no. 2, pp. 184–191, Feb. 2003. [38] S. Nicolson, K. Yau, P. Chevalier, A. Chantre, B. Sautreuil, K. Tang, and S. Voinigescu, “Design and scaling of -band SiGe BiCMOS VCOs,” IEEE J. Solid-State Circuits, vol. 42, no. 9, pp. 1821–1833, Sep. 2007. [39] C. Lee, T. Yao, A. Mangan, K. Yau, M. Copeland, and S. Voinigescu, “SiGe BiCMOS 65-GHz BPSK transmitter and 30 to 122 GHz LC-varactor VCOs with up to 21% tuning range,” in IEEE Compon. Semiconduct. Integr. Circuits Symp., Oct. 2004, pp. 179–182. [40] S. Trotta, B. Dehlink, A. Ghazinour, D. Morgan, and J. John, “A 77 GHz 3.3 V 4-channel transceiver in SiGe BiCMOS technology,” in Proc. Bipolar/BiCMOS Circuits Technol. Meeting, Oct. 2009, pp. 186–189. [41] A. Valdes-Garcia, S. Nicolson, J.-W. Lai, A. Natarajan, P.-Y. Chen, S. Reynolds, J.-H. C. Zhan, D. Kam, D. Liu, and B. Floyd, “A fully integrated 16-element phased-array transmitter in SiGe BiCMOS for 60-GHz communications,” IEEE J. Solid-State Circuits, vol. 45, no. 12, pp. 2757–2773, Dec. 2010.

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[42] J. May and G. Rebeiz, “A 40–50-GHz SiGe 1:8 differential power divider using shielded broadside-coupled striplines,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 7, pp. 1575–1581, Jul. 2008. [43] S. Emami, R. Wiser, E. Ali, M. Forbes, M. Gordon, X. Guan, S. Lo, P. McElwee, J. Parker, J. Tani, J. Gilbert, and C. Doan, “A 60 GHz CMOS phased-array transceiver pair for multi-Gb/s wireless communications,” in Proc. IEEE Int. Solid-State Circuits Conf., Feb. 2011, pp. 164–166. [44] R. Meyer, “Low-power monolithic RF peak detector analysis,” IEEE J. Solid-State Circuits, vol. 30, no. 1, pp. 65–67, Jan. 1995. [45] H. Knapp, M. Wurzer, T. Meister, K. Aufinger, J. Bock, S. Boguth, and H. Schafer, “86 GHz static and 110 GHz dynamic frequency dividers in SiGe bipolar technology,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2003, vol. 2, pp. 1067–1070. [46] A. Rylyakov, L. Klapproth, B. Jagannathan, and G. Freeman, “100 GHz dynamic frequency divider in SiGe bipolar technology,” Electron. Lett., vol. 39, no. 2, pp. 217–218, Jan. 2003. [47] R. Derksen, V. Luck, and H.-M. Rein, “Stability ranges of regenerative frequency dividers employing double balanced mixers in large-signal operation,” IEEE Trans. Microw. Theory Tech., vol. 39, no. 10, pp. 1759–1762, Oct. 1991. [48] A. Pavio and S. Sutton, “A microstrip re-entrant mode quadrature coupler for hybrid and monolithic circuit applications,” in IEEE MTT-S Int. Microw. Symp. Dig., May 1990, vol. 1, pp. 573–576. [49] S. March, “Phase velocity compensation in parallel-coupled microstrip,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 1982, pp. 410–412. [50] S. Nicolson, P. Chevalier, B. Sautreuil, and S. Voinigescu, “Single-chip W-band SiGe HBT transceivers and receivers for Doppler radar and millimeter-wave imaging,” IEEE J. Solid-State Circuits, vol. 43, no. 10, pp. 2206–2217, Oct. 2008. [51] M. Jahn, H. Knapp, and A. Stelzer, “A 122-GHz SiGe-based signalgeneration chip employing a fundamental-wave oscillator with capacitive feedback frequency-enhancement,” IEEE J. Solid-State Circuits, vol. 46, no. 9, pp. 2009–2020, Sep. 2011. [52] E. Ojefors, F. Pourchon, P. Chevalier, and U. Pfeiffer, “A 160-GHz low-noise downconversion receiver front-end in a SiGe HBT technology,” Int. J. Microw. Wireless Technol., vol. 3, no. 3, pp. 347–353, Mar. 2011. [53] K. Yau, “On the metrology of nanoscale silicon transistors above 100 GHz,” Ph.D. dissertation, Dept. Electr. Comput. Eng., Univ. Toronto, Toronto, ON, Canada, 2011. [54] M. Abbasi, S. Gunnarsson, N. Wadefalk, R. Kozhuharov, J. Svedin, S. Cherednichenko, I. Angelov, I. Kallfass, A. Leuther, and H. Zirath, “Single-chip 220-GHz active heterodyne receiver and transmitter MMICs with on-chip integrated antenna,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 2, pp. 466–478, Feb. 2011. [55] S. Koch, M. Guthoerl, I. Kallfass, A. Leuther, and S. Saito, “A 120–145 GHz heterodyne receiver chipset utilizing the 140 GHz atmospheric window for passive millimeter-wave imaging applications,” IEEE J. Solid-State Circuits, vol. 45, no. 10, pp. 1961–1967, Oct. 2010. Ioannis Sarkas (S’04) received the Diploma degree in electrical engineering from the University of Patras, Patras, Greece, in 2006, the M.A.Sc. degree in electrical and computer engineering from the University of Toronto, Toronto, ON, Canada, in 2010, and is currently working toward the Ph.D. degree in electrical and computer engineering at the University of Toronto. His research interests include the design of millimeter-wave integrated circuits operating above 100 GHz, as well as millimeter-wave radar systems. Jürgen Hasch (M’99) was born in Göppingen, Germany, in 1970. He received the Dipl.-Ing. and Ph.D. degrees from the University of Stuttgart, Stuttgart, Germany, in 1996 and 2007, respectively. He is currently a Senior RF Expert with Corporate Research and Advance Development, Robert Bosch GmbH, Stuttgart, Germany. His main interests are ultra-wideband sensing technology and millimeterwave radar sensors. Dr. Hasch is a member of the IEEE Antennas and Propagation Society (IEEE AP-S) and the IEEE Microwave Theory and Techniques Society (IEEE MTT-S).

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Andreea Balteanu (S’10) received the B.A.Sc. degree in electrical engineering from the University of Waterloo, Waterloo, ON, Canada, in 2007, the M.A.Sc degree from the University of Toronto, Toronto, ON, Canada, in 2010, and is currently working toward the Ph.D degree at the University of Toronto. She has previously held internship positions with the Altera Corporation and Texas Instruments Incorporated. Her research interests include the design of high-speed and millimeter-wave integrated circuits.

Sorin P. Voinigescu (S’91–M’95–SM’02) received the M.Sc. degree in electronics from the Polytechnic Institute of Bucharest, Bucharest, Romania, in 1984, and the Ph.D. degree in electrical and computer engineering from the University of Toronto, Toronto, ON, Canada, in 1994. From 1994 to 2002, he was initially with Nortel Networks, Ottawa, ON, Canada, and then with Quake Technologies, Ottawa, ON, Canada, where he was responsible for projects in high-frequency characterization and statistical scalable compact model develop-

ment for Si, SiGe, and III–V devices. He later conducted research on wireless and optical fiber building blocks and transceivers in these technologies. In 2002, he joined the University of Toronto, where he is currently a Full Professor. From 2008 to 2009, he spent a sabbatical year with Fujitsu Laboratories of America, Sunnyvale, CA. His research and teaching interests focus on nanoscale semiconductor devices and their application in integrated circuits at frequencies beyond 300 GHz. Dr. Voinigescu is a member of the ITRS RF/AMS Committee and of the Technical Program Committees of the IEEE CSICS and BCTM. He was the recipient of Nortel’s President Award for Innovation in 1996. He was a corecipient of the Best Paper Award of the 2001 IEEE CICC and the 2005 IEEE CSICS. He was also the recipient of the Beatrice Winner Award of the 2008 IEEE ISSCC. His students have been the recipients of Student Paper Awards of the 2004 VLSI Circuits Symposium, the 2006 SiRF Meeting, the 2006 RFIC Symposium, the 2006 BCTM, and the 2008 IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS).

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-Band Total Power Radiometer Performance Optimization in an SiGe HBT Technology E. Dacquay, Student Member, IEEE, A. Tomkins, K. H. K. Yau, Member, IEEE, E. Laskin, Pascal Chevalier, Member, IEEE, A. Chantre, Senior Member, IEEE, B. Sautreuil, and S. P. Voinigescu, Senior Member, IEEE

Abstract—A -band SiGe HBT total power radiometer is reported with a peak responsivity of 28 MV/W, a noise equivalent power (NEP) of 14–18 fW/Hz , and a temperature resolution better than 0.35 K for an integration time of 3.125 ms. The noise corner of the radiometer is lower than 200 Hz. Fabricated in a developmental technology with 270-GHz and 330-GHz , it includes a five-stage low-noise amplifier (LNA) with 4–7-GHz bandwidth and over 35 dB of gain centered at 165 GHz, along up to with a square-law detector with an NEP below 6 pW/Hz 170 GHz. An average system noise temperature of 1645 K is obtained using the -factor method and a noise bandwidth of 10 GHz calculated from the measured characteristics of the radiometer. The reduced noise corner frequency in the presence of the amplifier, compared to that of the detector, appears to indicate that, unlike in III–V radiometers, LNA gain fluctuations are not a problem in SiGe HBT radiometers. The circuit consumes 490 m . Wafer mapping of the ra95 mW and occupies 765 diometer sensitivity and of the amplifier gain was performed across different process splits. The mapping results demonstrate that the radiometer can be employed as a relatively simple and area-efficient transistor noise-measure monitor, useful in SiGe HBT vertical profile optimization. Index Terms— -band, detector, low-noise amplifier (LNA), noise equivalent power (NEP), noise equivalent temperature difnoise corner, passive imaging, ference (NETD), noise figure, radiometer, responsivity, SiGe HBT.

I. INTRODUCTION

T

HE -band total power radiometer is attractive for applications such as stand-off security screening [1] and for atmospheric water cycle and hurricane monitoring at 118 and 183 GHz [2]. Since the angular resolution of a lens or aperture improves with decreasing wavelength [3], -band passive Manuscript received August 02, 2011; revised December 22, 2011; accepted December 23, 2011. Date of publication February 10, 2012; date of current version March 02, 2012. This work was supported by the National Science and Engineering Research Council (NSERC) of Canada. E. Dacquay and S. P. Voinigescu are with the Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada M5S 3G4 (e-mail: [email protected]). A. Tomkins and E. Laskin were with the Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada M5S 3G4. They are now with Peraso Technologies Inc., Toronto, ON, Canada M5J 2L7. K. H. K. Yau was with the Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada M5S 3G4. He is now with the Broadcom Corporation, Irvine, CA 92617 USA. P. Chevalier, A. Chantre, and B. Sautreuil are with STMicroelectronics, F-38926 Crolles, France (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2184132

imaging arrays have excellent potential for high-resolution operation without requiring electronic or mechanical switching or local oscillator (LO) signal distribution [4]. Unlike other currently available semiconductor technologies, advanced SiGe BiCMOS with thick-metal, thick dielectric back-end-of-line (BEOL), and values now approaching 500 GHz [5] allow wafer-scale antenna array integration with over 50% antenna efficiency [6], [7]. While presently there are no reported commercial solid-state passive imagers in the -band, five commercial -band systems have recently appeared on the market [8]. These are typically realized using discrete amplifiers with over 35-dB gain and noise figures below 5 dB, followed by a zero-bias diode (ZBD) detector chip, all fabricated in III–V technologies [4], [9]. In total power radiometers, the amplifier gain fluctuations, noise, and the noise of which manifest themselves as the detector, are as critical as the amplifier noise figure in determining the overall temperature sensitivity [4]. Image calibration is performed by pointing to a reference temperature source, thus avoiding mechanical chopping or integration of a switch, which would reduce sensitivity [1]. Recently, -band total power radiometers have been reported in SiGe HBT [10], [11] and CMOS [12] technologies, demonstrating promising temperature sensitivity and noise performance. A number of III–V heterodyne receivers [13], [14] and even a super-regenerative CMOS receiver [2] have been published or announced, which operate in the - and -bands with excellent noise performance. However, they require oscillators or LO signal distribution and will not be considered in this paper. Cutting-edge SiGe HBT technologies, in particular, with the lowest noise corner of all competing technologies, represent an interesting opportunity where the high-volume benefits of silicon can be exploited while also taking advantage of RF device performance with high gain even in the - and -bands [15]–[18]. In this paper, we report the first -band total power radiometer with high-gain pre-amplification fabricated in silnoise corner, low-noise amplifier (LNA) gain, deicon. Its tector noise equivalent power (NEP), and overall imager sensitivity are comparable to those of the best III–V total power radiometers and detectors operating at -band. In an effort to identify the key semiconductor technology figures of merit that impact the total power radiometer sensitivity, we also conduct , a comprehensive study across process splits of transistor , amplifier gain, noise figure, detector responsivity, NEP, noise corner, separating them from system parameters and unrelated to the technology, such as integration time and frame

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Fig. 1. Block diagram and system performance parameters of an integrated total power radiometer.

rate. The circuits were fabricated in a preproduction 130-nm SiGe BiCMOS technology (BC9MW) and in two experimental SiGe HBT technologies: B3T and B4T. This paper is organized as follows. In Section II, we discuss system and circuit design considerations and implementation problems. This is followed by a description of the fabrication process and transistor characterization in Section III. Detailed -parameter and noise characterization of the amplifier and detector breakouts across process splits is covered in Section IV, along with a hot–cold noise source method to measure the radiometer the noise-equivalent differential temperature (NEDT) and effective system noise temperature in Section V. Conclusions are summarized in Section VI. II. SYSTEM AND CIRCUIT DESIGN CONSIDERATIONS A. Total Power Radiometer Design Considerations Passive imaging sensors or radiometers are high-sensitivity broadband receivers used to measure the thermal (“black-body”) radiation (noise) emitted or reflected by a target. A body in thermal equilibrium at a temperature emits energy according to Planck’s radiation law (1) is the receiver bandwidth over which the black body where radiation is integrated and is the Boltzmann’s constant. This equation is strictly valid only for a perfect “black body” that absorbs all incident energy and reflects none. A nonideal object partially reflects incident energy and radiates only a fraction of the energy predicted by (1). It can therefore be described by a “brightness” (noise) temperature, , which is always smaller than its physical temperature and much smaller than the receiver noise temperature . This radiation is very weak at millimeter-wave frequencies, and therefore, sensitivity becomes the most important design parameter for a radiometer. Most modern -band [4], [8] “cameras” employ a direct detection (or tuned homodyne) receiver, also known as a total power radiometer, consisting of an LNA, a square-law detector, a post-detector low-bandwidth “video” amplifier, and an integrator, as in Fig. 1. A 2-D image is formed by mechanically steering the antenna in the - and -directions and recording the image at each position. This is a slow process. Ideally, if low-cost and low-power receivers could be developed, mechanical steering would be replaced by a 2-D receiver array to achieve electronic scanning and image collection at a much faster rate.

Fig. 2. Typical output noise spectra for semiconductor III–V SBD, SiGe (solid), and CMOS (dashed) detectors [4], [10], [12].

The system performance of a total power radiometer is determined by the following: • the antenna and implementation loss, captured by ; • the gain , bandwidth , and noise figure (equivalent noise temperature ) of the LNA; • the responsivity , noise slope, , and NEP of the detector (Fig. 2), where describes the noise of the detector diode [4]; • the integration time (or bandwidth ) of the integrator. The system bandwidth is given by the entire receivechain preceding the detector and is typically determined by the LNA. The imager resolution in degrees Kelvin can be expressed as [9] (2) [4] represents the numbers of pixels in where a frame, and describes the video frame rate, typically 6–30 Hz [1]–[4], [8]. For an imaging system with a single pixel, and the second term in (2) disappears. is also known as the noise equivalent temperature difference (NETD) [9]. Equation (2) indicates that, in order to improve resolution, the system noise temperature must be reduced and the integration time and RF bandwidth must be increased. Fluctuations in noise at frequencies higher than (first term under the radical) are smoothed out through the integration process. The noise from the detector diode at frequencies below , divided by the LNA gain, and from the amplifier gain fluctuations, if any, are captured by the second and third terms, respectively, under the square root [4], [9]. Indeed, a critical aspect of radiometer design is the development of a detector with very low noise corner and of an amplifier with low noise figure, high gain, and no gain fluctuations. While the first three goals are readily satisfied in III–V radiometers, the fourth remains elusive since considerable noise is still present in the output spectra of even the best-performing systems with low noise detectors, over 30–35-dB LNA gain, and less than 5-dB noise figure [4]. The proposed SiGe HBT total-power radiometer, whose transistor-level schematic is shown in Fig. 3, consists of a singleended five-stage LNA, similar to the one in [15] and centered at 165 GHz, followed by a differential square-law detector. A

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Fig. 3. Transistor-level schematics of integrated total power radiometer.

Fig. 4. Simulated . and available gain for 110 nm CE and cascode stages at 165 GHz.

4.5 m B4T

transformer is used for single-ended to differential conversion between the LNA and detector. B. Amplifier Topology Selection and Design The LNA poses significant challenges at -band in any technology because it must simultaneously achieve very high gain (over 30 dB), broad bandwidth, and low noise figure. The high gain is needed to overcome the large noise of the detector at video-rate frequencies: 10–60 Hz. A simulation study of the available gain, minimum noise figure, and minimum noise measure of common emitter (CE) and cascode stages was conducted and the simulation results at 165 GHz versus collector current density are reproduced in Fig. 4 for the B4T technology. Although the noise figure of the CE stage is significantly smaller, the two topologies have almost identical minimum noise measures of 8.8 and 8.4 dB, respectively, favoring the cascode. Moreover, the corresponding available gain is 14 dB for the cascode and 3 dB for the CE stage. Consequently, at least one or two cascode stages must be employed to achieve the much needed high gain at -band without excessive power consumption. However, an SiGe HBT cascode is prone to oscillate if its emitter length and bias current are larger than 4–5 m and 6–8 mA, respectively. In contrast, CE stages exhibit excellent stability. Recent transistor and receiver noise-figure measurements show promising SiGe HBT values, below 5 dB up to 170 GHz [16], and cascode amplifier noise figures around 8 dB [16], [17]. However, the experimental data indicate that the design kit model overestimates the minimum noise figure. For these

reasons, topologies with approximately equal gain and a combination of five CE and cascode stages, placed either at the input or at the output of the amplifier, were fabricated and investigated for the lowest overall noise figure. The first amplifier, A, employed in the radiometer of Fig. 3, was originally designed as a general-purpose moderate output power amplifier [15] in a production process (BC9MW) [19] and was ported without redesign into two developmental process technologies (B3T [20] and B4T) intermediary development steps as part of the dot5 European Union (EU) program [5]. This amplifier consists of three low-current cascode stages, followed by two large-current CE stages. The simulated noise figure and power gain at 165 GHz for the B4T process are plotted in Fig. 5 as a function of the collector current density in the first cascode stage. As can be seen, the noise figure and gain are 11 and 37 dB, respectively, when the first stage is biased at the optimum noise figure current density of 6 mA m , This current density is 30% higher than that in Fig. 4, likely because of the loading from the other stages and from the layout parasitics, which were not included in the simulations of the individual stage. The amplifier consumes 140 mW from 1.5- and 3-V supplies in BC9MW, and 92 mW from 1.4- and 2.8-V supplies in B4T. Lumped inductors, designed and modeled using ASITIC,1 and a mix of custom-designed metal–oxide–metal (MOM) capacitors and foundry-provided metal–insulator–metal (MIM) capacitors, were employed for all tuning and matching elements. The three low bias current cascode stages provide significant gain, and due to the small input stage transistor size, broadband matching to 50 . The two CE stages, with lower gain, are designed to provide higher linearity and large saturated output power with improved stability. The second LNA, B, shown in Fig. 6, consists of two CE stages followed by three cascode stages. It consumes 75 mW from 1.5- and 3-V supplies. Apart from the degeneration inductor in the first stage, it employs microstrip transmission lines as matching elements. The microstrip lines are realized in the top metal layer with a 1- m-thick ground plane formed by shunting the first two metal layers together to reduce ground loss, as illustrated in Fig. 7. Emitter degeneration resistors, bypassed at -band, provide improved bias current accuracy and stability over PVT variations. The simulated gain and noise figure are reproduced in Fig. 8 as a function of the collector current density in the first stage. The minimum noise figure 1[Online].

Available: http://rfic.eecs.berkeley.edu/~niknejad/asitic.html

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Fig. 5. Simulated density for amplifier

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and at 165 GHz as a function of collector current in the B4T process.

Fig. 9. Simulated responsivity and NEP of the tion of RF input frequency.

-band detector (A) as a func-

C. Detector

Fig. 6. Schematics of amplifier B with CE input stage and t-lines in BC9MW.

Fig. 7. Microstrip-line and back-end cross sections.

The square-law peak detector, shown in Fig. 3, is an HBT adaptation [20] of the nMOS-based version in [12]. It utilizes a differential topology, with single-ended to differential conversion provided by a lumped balun, which also matches the detector input to 50 . The common-mode signal at the emitter of the input transistors , which is proportional to the signal amplitude, is amplified by the common-base amplifier formed by transistor and the output load resistor. The latter is located off-chip. This arrangement allows for different resistor values and different bias current densities to be experimented with in order to optimize the detector NEP. A dummy reference detector is included on-chip, providing a reference voltage to be used along with the main detector voltage as inputs to a differential (off-chip) post-amplifier. It also helps to suppress power supply noise. Two detector test structures were fabricated to allow broadband performance testing with reasonably good matching to 50 throughout the - and -band. The only difference is the input balun. In version A, suitable for -band and lower -band testing, a 3:1 side-coupled structure was employed with a total diameter of 32 m. Both primary and secondary coils are formed in the top copper layer with m and m. The primary has two coils, while the secondary has a single coil. The inductance of the primary is 122 pH, whereas that of the secondary is 43 pH. Version B, used in the fabricated total power radiometer and targeted at the upper half of the -band and at the lower -band, employs a side-coupled 1:1 balun with a single-coil primary and single-coil secondary. It features a metal strip width, m, an inter-coil spacing, m, and a diameter of 24.6 m. The simulated responsivity and NEP of detector A at the minimum NEP bias is shown in Fig. 9 as a function of frequency. It shows that the NEP is as low as 5 pW Hz at 130 GHz where the detector input is perfectly matched and that it remains below 10 pW Hz up to 170 GHz. III. FABRICATION AND PROCESS CHARACTERIZATION

Fig. 8. Simulated gain and noise figure of amplifier B versus collector current density per emitter area at 155 GHz in the BC9MW process.

current density, 6–7 mA m , is approximately half of that corresponding to the peak gain.

The radiometer, amplifier A, and detector breakouts were fabricated along with transistor test structures and on-die thru-reflect-line (TRL) calibration standards in several process splits of a developmental SiGe HBT technology, B4T [5]. Both highspeed, with of 1.6 V, and medium-voltage,

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Fig. 10. Measured versus characteristics on B4T wafer PGT20 for V and V, high-speed and medium-voltage SiGe HBTs biased at respectively.

V, HBTs were fabricated on the same wafer. The BEOL, shown in Fig. 7, is similar to that in [19], with 2-fF/ m MIM capacitors and six copper layers, the top two being 3- m thick. Several wafers with different B4T process variants were fully characterized. Amplifier A was also fabricated in the BC9MW and B3T processes, whereas amplifier B was fabricated only in the BC9MW process. -parameter measurements of transistors, t-lines, transformers, and circuit breakouts were performed with an HP8510C network analyzer interfaced with two -band OML transmit/receive (T/R) modules and ground–signal–ground (GSG) wafer probes from Cascade Microtech, Beaverton, OR. Both TRL and line-reflect-reflect-match (LRRM) calibrations were performed on standard calibration substrates from GGB, Naples, FL, and Cascade Microtech, without any noticeable differences in the device-under-test (DUT) measurements. The pad and interconnect parasitics of the transistor, t-line, and transformer test-structures were de-embedded using the t-line-based technique described in [21]. In the case of the amplifier, detector and imager measurements, the impact of the pads (approximately 8-fF capacitance) and interconnect is included in all the measured -parameters. They were not de-embedded. Figs. 10 and 11 show the measured and versus current density for high-speed and medium-voltage B4T transistors with 165-nm emitter width and various emitter lengths. As illustrated in Fig. 12, the metallization on top of the transistor, up to and including metal 6, was not removed by de-embedding in order to capture the true circuit performance of the transistor. and were extrapolated from the measured and characteristics, averaged in the 110–125-GHz range where the slope versus frequency is approximately 20 dB/decade. As can be seen in Figs. 10 and 11, for very large emitter lengths, the interconnect series resistance and parasitic capacitance start to degrade and . It is also important to note that of the medium-voltage HBTs is almost as large as that of the high-speed HBTs at about 1/3 of the current density, whereas is reduced to half. For comparison with the performance of the other two SiGe HBT processes, the measured MAG at 120 GHz of representative high-speed B4T, B3T, and BC9MW HBTs, is reproduced

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Fig. 11. Measured versus characteristics on B4T wafer PGT20 for V and V, high-speed and medium-voltage SiGe HBTs biased at respectively.

Fig. 12. Transistor with metallization, after de-embedding pad and interconnect parasitics [20].

in Fig. 13. It can be observed that the peak MAG current density remains approximately the same between the three processes while MAG (hence, ) improves by almost 3 dB from BC9MW to B4T. Additionally, the and characteristics measured on a high-speed 0.165 m 4.5 m SiGe HBT across different B4T process splits are compiled in Figs. 14 and 15, respectively. Note that and vary by 10%–15% across splits. IV. CIRCUIT BREAKOUT CHARACTERIZATION A. Amplifier Performance The die photographs of amplifiers A and B are shown in Figs. 16 and 17, respectively. Fig. 18 shows the measured of type A amplifiers for three different HBT vertical profiles (BC9MW, B3T, and B4T). Additionally, two versions each of the BC9MW and B3T amplifiers with 130- and 120-nm emitter widths are included. The impact of reducing emitter width on BC9MW amplifiers is almost as high as changing the vertical HBT profile from BC9MW to B3T. The peak amplifier gain shifts in frequency from 156 to 163 GHz and increases from 18 to 24 dB, whereas the change in profile from BC9MW to B3T at the same emitter width causes a 8-dB increase in peak gain and a shift to 163 GHz. The overall improvement in gain between BC9MW

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Fig. 13. Measured SiGe HBT MAG @ 120 GHz versus characteristics at V for BC9MW, B3T, and B4T process variants.

Fig. 16. Die photograph of amplifier A showing the inductor- and capacitorbased matching networks.

Fig. 14. Measured 0.165 m 4.5 m SiGe HBT V. over B4T process splits at

Fig. 15. 0.165 m 4.5 m SiGe HBT V. B4T process splits at

versus

versus

characteristics

characteristics over

and B4T is about 18 dB, spread across three cascode and two CE stages. This is consistent with the 2.5–3-dB improvement in HBT MAG seen in Fig. 13 and the much higher simulated gain of the cascode versus the CE stage in Fig. 4. Fig. 19 compares the measured -parameters of amplifiers A and B fabricated in the BC9MW process. The gain of amplifier B peaks at 185 GHz to 22 dB when the last three stages are biased at half the peakcurrent density. The -parameters of amplifier A were mapped across B4T process splits. The measured at peak- bias current density and at half peak- bias current density in the cascode stages is reproduced in Figs. 20 and 21, respectively. In both cases, wafer PGT20 has

Fig. 17. Die photograph of amplifier B showing the t-line matching networks and single degeneration inductor in the first stage.

the highest amplifier gains. Interestingly, of all the tested B4T wafers, this wafer has the lowest , but the second best , within 1 GHz of the best value. This trend agrees very well with that observed for a 140-GHz amplifier in a earlier generation, pre-BC9MW, of an SiGe HBT process [22]. B. Detector Performance The detector breakout die photograph is reproduced in Fig. 22. The responsivity and NEP [20] of the two standalone

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Fig. 18. Impact of HBT vertical profile and and emitter width on the measured . amplifier

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Fig. 21. Comparison of the measured of amplifier A across B4T wafer splits when the HBTs in the cascode stages are biased at half the peak- current density.

Fig. 19. Comparison of the measured -parameters of BC9MW cascode-input and CE-input amplifies centered at 165 and 185 GHz, respectively.

Fig. 20. Comparison of the measured of amplifier A across B4T wafer splits when the HBTs in the cascode stages are biased at peak .

detectors were measured as a function of RF frequency and bias current density using the setup in Fig. 23. The output noise spectra were recorded with a spectrum analyzer. Simultaneously, the dc output voltage was measured with a multimeter [12] at a known signal source power and with the signal source turned off. The gain of the postamplifier was de-embedded from all responsivity and NEP measurements. The responsivity and NEP were determined as (3)

Fig. 22. Die photograph of detector breakout B.

(4) is the known input signal source power respectively, where chosen to ensure that the detector operates in linear mode and

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Fig. 23. Measurement setup for detector responsivity and NEP.

Fig. 25. Measured NEP at 1-kHz offset as a function of RF frequency for both detectors on wafer TPC11 for 1- and 10-k load resistors and a detector current density of 0.35 mA m . Simulation results for 10-k load resistor are also shown for comparison.

Fig. 24. Measured and responsivity of the two detector breakouts on wafer TCP11 for 10-k load resistors and a detector current density of 0.35 mA m . The simulated responsivity of detector A ( -band) is also shown with dashed lines.

is the output noise voltage in V Hz at the dc offset frequency , Fig. 24 shows the measured and responsivity of the two detector breakouts and the simulated responsivity of detector A, as a reference. The larger, 3:1 balun provides good matching to 50 at -band and up to about 130 GHz for the real part of the input impedance of the detector, which is approximately 20 . The smaller 1:1 balun tunes out the imaginary part of the detector at 190 GHz. In the radiometer, this resonance moves down in frequency due to the output capacitance of the LNA. This is the reason why the 1:1 transformer, rather than the 3:1 version, was employed in the radiometer. The peak responsivity of the -band detector corresponds to the frequency at which reaches its optimum. In fact, the responsivity of the two detectors closely tracks their variation across the -band with the two detector breakouts exhibiting almost identical responsivity and in the 160–170-GHz range. The NEP is plotted in Fig. 25 as a function of RF frequency for two different load resistor values of 1 and 10 k , respectively. These measurements were taken at the minimum NEP current density of 0.35 mA m at dc offset frequency of 1 kHz, beyond the noise corner [19]. Although the responsivity of the detector is ten times larger when a 10-k load is employed, the NEP improves only by a factor of 1.5 to 2. Ideally, if the load resistor was noiseless, the NEP should not depend on the load resistor value. However, the load resistor itself contributed to the overall detector NEP. Its noise must be minimized by selecting a large enough resistor value and a resistor that has very low noise. Note that simulations overestimate the NEP of the detector. This is similar to the overestimation of amplifier noise

Fig. 26. Comparison of the measured responsivity and NEP of the -band detector breakout A on wafer TCP11 for 10-k load resistors at: (a) 120 and (b) 165 GHz as a function of current density at offset frequencies of 160 Hz and 1 kHz, respectively.

figure and voltage-controlled oscillator (VCO) phase noise observed with this HBT model. As illustrated in Fig. 26, the optimal current density reduces to 0.175 mA m when the NEP is measured at a dc offset frequency of 160 Hz. The NEP and responsivity measurements were repeated for several supply voltages on the load resistor and they were found to be largely constant for dc voltages at the load resistor output

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Fig. 27. Measured responsivity at 165 GHz for the -band detector on wafer TCP11 biased at 0.35 mA m and for the radiometer as a function of input power when the detector is biased at 0.25 mA m .

of 1.1–2.4 V. The detector input return loss, responsivity, and NEP measurements reveal the importance of on detector and radiometer performance and that lumped transformers can be used in silicon millimeter-wave integrated circuits (ICs), even at 190 GHz. Furthermore, the most important detector figure of merit, the NEP and its optimal bias conditions, are closely related to the noise of the HBT and to the bias current at which the HBT noise, the noise corner, and the HBT noise above the corner are simultaneously reduced [19]. The detector responsivity plays a secondary role compared to its NEP since the responsivity can always be boosted by using larger load resistors and/or low-noise post amplifiers. At the optimal bias that minimizes the NEP at 160-Hz offset, the standalone detector consumes 1.7 mW from 1.2- and 2.1-V power supplies. Fig. 27 reproduces the measured responsivity of the -band detector as a function of input power at 165 GHz when the detector is biased at a current density of 0.35 mA m . The detector is linear below 20 dBm and begins to saturate at higher input levels. It was not possible to determine at what power level the responsivity decreases by a factor of 2 due to the limited output power of the signal source available in the -band. For comparison, the measured responsivity of the entire radiometer, larger than 17 MV/W at a lower bias current density in the detector, is also shown. The 1-dB input compression point of the radiometer responsivity is smaller than 50 dBm.

V. RADIOMETER CHARACTERIZATION A die photograph of the radiometer is reproduced in Fig. 28. The circuit occupies an area of 765 490 m and is pad limited. Fig. 29 reproduces the measured -parameters of the radiometer and of the standalone LNA, measured on the same wafer, TCP11, and under identical bias conditions. The simulated -parameters of the LNA are also shown for comparison. Even when the LNA cascode stages are biased at the peakcurrent density, the of the radiometer remains below 6 dB throughout the frequency range. The radiometer , measured between the radiometer input and one of the detector outputs,

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Fig. 28. Die photograph of the radiometer, including LNA and detector. The 490 m . dimensions are 765

Fig. 29. -parameters (lines and symbols) and responsivity of the radiometer and of the standalone LNA measured on B4T wafer TCP11. Simulation results for the LNA -parameters are also shown with lines only.

peaks at 161 GHz, coinciding with the peak in the measured responsivity of the radiometer. Direct NETD measurements were performed in the setup shown in Fig. 30, using a calibrated -band ELVA-1 solid-state noise source with a 13-dB excess noise ratio (ENR). The -band waveguide attenuator placed after the noise source permitted controlling the input noise power level reaching the DUT. The calibrated noise source was switched between the hot and cold states via an external modulation voltage. The cold noise state is approximately equal to the ambient room temperature of 290 K, and the hot noise state is approximately 13 dB above this, or 6076 K. The radiometer output voltage difference between the hot and cold states was measured using a multimeter, and the output noise spectra at baseband were simultaneously monitored using a spectrum analyzer. To facilitate measurements in a 50- environment, and to amplify the radiometer output signal above the noise floor of the test equipment, an off-chip low-noise post-amplifier was used (AD620), but its gain was de-embedded from all measurement results. The expressions of the responsivity and of the NEDT are given by (5)

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Fig. 30. Radiometer test setup with calibrated solid-state noise source.

and [10] (6) respectively, where is the measured output dc voltage corresponding to , the input noise-power generated by the noise source in the hot state

Fig. 31. Measured radiometer output noise on-wafer PGT20 with hot noise source (top), cold noise source, and with the LNA bias turned off and cold noise source (bottom). The LNA stages are biased at the peak- current density from 1.5- and 3-V supplies and the detector is biased at 0.25 mA m , corresponding to the minimum detector NEP at 1-kHz offset.

(7) where describes the input setup loss between the noise source and the DUT. NEP is obtained from the measured output noise voltage at dc offset frequency , normalized to 1 Hz, (8) By plugging (8) and (7) into (6), the final expression for NEDT is then recast as (9) where 204 is the ambient-temperature noise-floor (dBW), integrated over 1-Hz bandwidth in watts. Thus, with a known ENR (manufacturer provided), (measured independently), and a given integration time (system-implementation specific), the temperature resolution depends on the measured output noise voltage at and the measured dc voltage change between the hot and cold noise states of the calibrated noise source. Note that, with this NETD measurement method, the RF noise bandwidth need not be known since it cancels out and does not appear in the NETD (9). The measured output noise voltage spectra of the radiometer are reproduced in Figs. 31 and 32 for two different bias conditions of the LNA and of the detector. Both the hot (top) and the cold (middle) noise spectra are shown, along with the output noise spectra when the LNA is unbiased, shown in the bottom trace as a reference. A noise corner of approximately 500 Hz can be observed, with the low-frequency noise being dominated by 60-Hz harmonic tones. For the spectrum in the middle, the noise corner is less than 200 Hz, while no noise can be observed for the top spectrum when the noise source is in the hot state. The signal roll-off at very low-frequencies 20 Hz is caused by the dc blocking capacitor required in front of the PSA. Both the output noise level and the noise corner of the detector are reduced under the bias conditions in Fig. 32 when the LNA supplies are 1.4 and 2.8 V and the bias current density in the detector is set to 0.175 mA m .

Fig. 32. Measured radiometer output noise on wafer TCP11 with hot noise source (top), cold noise source, and with the LNA bias turned off and cold noise source (bottom). The LNA stages are biased at the half-peak- current density from 1.4- and 2.8-V supplies and the detector is biased at 0.175 mA m , corresponding to the minimum detector NEP at 160 Hz.

The NEDT was measured for a variety of bias conditions using the cold-state noise voltage at Hz and the hot-state output dc voltage change. As can be concluded from the output noise spectra in Figs. 31 and 32, it is critical to optimally bias the LNA for high gain and low noise, and the detector for minimum noise, both important contributors to the noise performance and the NEDT of the radiometer. Fig. 33 shows the measured NEDT, at a low-frequency offset of 160 Hz, and the radiometer responsivity as a function of the current density in the input stage of the LNA. Since the minimum noise figure current density of the HBT cascode is different from the peak gain bias, the optimal bias setting differs for responsivity (optimized by peak gain) and NEDT (optimized by minimal noise). These results were obtained assuming an integration time of 3.125 ms, as in [4], a measured input system loss of 4.15 dB, and by averaging the measured output noise voltage between 150–170 Hz. A minimum temperature resolution of approximately 0.35 K is observed. When biased for optimal noise performance, the LNA consumes 36 mA from 1.4 V and 13 mA from 2.8 V, for a total of 92 mW, including the bias current mirrors.

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Fig. 33. Measured NEDT on wafer TCP11, at 160-Hz offset, and output dc voltage change as a function of the LNA input stage current density with the detector biased at 0.175 and 0.35 mA m , using 1.4- and 2.8-V supplies on the LNA, and with the detector biased at 0.25 mA m , using 1.5- and 3.1-V supplies on the LNA.

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Fig. 35. Measured NEDT (from the output noise spectra at 160-Hz offset corms) across process splits as a function of the LNA responding to input stage current density. The LNA supplies were 1.5 and 3 V.

Fig. 36. Measured output dc voltage change as a function of input noise temperature on wafer TCP11, with the detector biased at 0.35 mA m and using 1.4- and 2.8-V supplies on the LNA.

Fig. 34. Measured output noise spectra for hot and cold states and the corresponding -factor.

300 Hz–1 kHz. An average -factor of 2.15 is measured, which corresponds to an average system noise figure of dB

When the detector was biased at 0.175 mA m , which reduces the detector NEP at 160-Hz offset, the radiometer measurements show approximately the same NETD as when the detector was biased at 0.35 mA m . This is despite the fact that the radiometer responsivity decreases 2.8 times. However, the minimum NETD now occurs at a higher LNA input current density. This implies that the LNA has insufficient gain to suppress the detector noise above 300 Hz, but also that the radiometer exhibits lower overall output noise at 160-Hz offset. These results agree with the findings in [4] for a -band InP radiometer where the noise of the detector was found to have greater impact than the LNA gain and noise figure in the NETD of the radiometer. The system noise figure and noise temperature—averaged over the system noise bandwidth—can be determined by observing the ratio of the noise-power between the hot and cold noise states, in a manner similar to the traditional -factor noise figure measurement technique. Fig. 34 reproduces the hot and cold noise spectra for the radiometer (top and middle curves) with the noise-power ratio ( -factor) shown in the bottom curve. The ratio of the two powers is averaged between

When subtracting the 4.15-dB setup loss at the input, an average system noise figure of 8.25 dB is obtained. A system noise temperature of 1645 can be also derived from the average noise factor and from the noise bandwidth. The latter is bias dependent, rather ambiguous, and can be calculated from the measured radiometer characteristics in Fig. 29

–

GHz

(10)

or can be approximated by multiplying the 3-dB bandwidth with . The NETD of the radiometer was mapped across the B4T wafer splits and plotted in Fig. 35 against the collector current density of the input transistor of the LNA. In general, the best NEDT is obtained on the wafers that also have the highest amplifier gain: TCP11 and PGT20. Note also that the optimum NETD current density is higher for wafer TCP11 than for wafer

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TABLE I COMPARISON OF TOTAL POWER RADIOMETER PERFORMANCE

PGT20, in agreement with the HBT peak- current density in Fig. 14. The spread in NETD across wafer splits is 2–3 dB (from 0.35 to 0.55 K). The preceding measurement setup and the experimental results collected using it demonstrate that the most important figures of merit of the radiometer, its sensitivity and system noise temperature can be determined solely with low-frequency instrumentation and a relatively low-cost -band noise source. No millimeter-wave measurements are required, thus minimizing large volume production test cost. In contrast, to determine the radiometer responsivity, a -band signal source and power measurements are required. From the measured responsivity of 9.6 MV/W in Fig. 33 and from the output noise voltage of 136 nV Hz in Fig. 32, a minimum radiometer NEP of 14 fW Hz is obtained on wafer TCP11 at a detector current density of 0.175 mA m . From the measured responsivity of 17 MV/W in Fig. 33 and from the output noise voltage of 320 nV Hz in Fig. 31, a minimum radiometer NEP of 19 fW Hz is obtained at a detector current density of 0.25 mA m . It should be noted that the radiometer occupies a much smaller area than the heterodyne receiver in [16], making it ideally suitable as a process monitor for the 50- noise measure of the HBT and/or cascode stage using low-frequency test equipment and a -band noise source. Finally, a measurement of dc output voltage as a function of the input noise power was performed to quantify the thermal sensitivity of the radiometer. The results shown in Fig. 36 correspond to a thermal sensitivity of 8 V/K, higher than that in [9]. This plot was obtained by changing the temperature of the -band noise source using a variable attenuator. Table I compares the performance of this radiometer with other passive imaging receivers fabricated in CMOS, SiGe, and III–V technologies. The NETD, integration time, and to a less extent the RF bandwidth, depend on system architecture and implementation choices rather than transistor and detector technology.

VI. CONCLUSION An integrated -band radiometer with pre-amplification has been demonstrated in a developmental SiGe HBT technology. Wafer mapping across several process splits indicates that the best radiometer sensitivity is obtained on the wafers with highest SiGe HBT , which result in the highest LNA gain. If the LNA gain is sufficient to overcome the detector noise, typically over 40 dB), then the optimum LNA bias current density for best radiometer sensitivity corresponds to the minimum noise figure/noise measure current density of the input LNA stage. To these authors’ knowledge, this marks the first -band total power radiometer integrated in any semiconductor technology. Its performance is comparable or better than that of published -band radiometer in silicon. The system consumes 95 mW and occupies 765 490 m . Temperature resolution and NEP values as low as 0.35 K and 14 fW/Hz , respectively, estimated using standard 3.125-ms integration times and the measured noise spectra at 160 Hz, indicate the possibility of using such a system without any form of noise chopping due to the excellent noise corner, below 200 Hz. The very low noise corner of the radiometer appears to indicate that, unlike InP HEMT LNAs, high-gain SiGe HBT LNAs do not suffer from gain fluctuations. The state-of-the radiometer results and the large gain amplifiers at 165 and 185 GHz reported in this paper suggest that the -band could emerge as a sweet spot for silicon-based imaging. In comparison with the -band, it benefits from several key advantages, including: 1) simpler and more efficient on-die antenna integration; 2) potential for wider-bandwidth systems; 3) smaller form factor; and 4) lower power consumption per pixel. At the same time, SiGe BiCMOS technology is ideal for the fabrication of total power radiometers since it features lower noise corner than both CMOS and III–V technologies, larger gain per bias current consumption, and better BEOL than nanoscale CMOS at a comparable price. Although wafer-scale integration of a 2-D pixel array in SiGe BiCMOS or sub 32-nm

DACQUAY et al.:

-BAND TOTAL POWER RADIOMETER PERFORMANCE OPTIMIZATION

CMOS technologies is attractive, market volumes need to increase significantly to justify the development cost.

ACKNOWLEDGMENT The authors would like to thank J. Pristupa, University of Toronto, Toronto, ON, Canada, and CMC Microstystems, Kingston, ON, Canada, for computer-aided design (CAD) support and the National Science and Engineering Research Council (NSERC) of Canada, Ontario Innovation Trust (OIT), and Canada Foundation for Innovation (CFI) for equipment grants. The authors also thank STMicroelectronics, Crolles, France, for donating the chips used in this study.

REFERENCES [1] A. Luukkanen, “Passive and active submm-wave imaging for stand-off security screening applications,” presented at the IEEE MTT-S Int. Microw. Symp. WSC Imag. Workshop, Jun. 2011. [2] P. Kangaslahti, D. Pukala, D. Hoppe, A. Tanner, T. Gaier, and B. Lambrigtsen, “Broadband millimeter wave receiver with dual polarization,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2011, Paper WE1G-1. [3] A. Tang and F. Chang, “Advantages of the CMOS receiver for millimeter and sub-millimeter wave imaging,” presented at the IEEE MTT-S Int. Microw. Symp. WSC Imag. Workshop, Jun. 2011. [4] J. J. Lynch, “ -band sensors fopr passive millimeter wave imaging,” presented at the IEEE MTT-S Int. Microw. Symp. WSC Imag. Workshop, Jun. 2011. [5] A. Chantre et al., “Pushing conventional SiGe HBT technology towards “Dotfive” terahertz,” in Eur. Microw. Integr. Circuits Conf., 2010, pp. 21–24. [6] Y. A. Atesal, B. Cetinoneri, M. Chang, R. Alhalabi, and G. M. Rebeiz, “Millimeter-wave wafer-scale silicon BiCMOS power amplifiers using free-space power combining,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 4, pp. 954–965, Apr. 2011. [7] I. Sarkas, J. Hasch, A. Balteanu, and S. Voinigescu, “A fundamental frequency, single-chip 120-GHz SiGe BiCMOS precision distance sensor with above IC antenna operating over several meters,” IEEE Trans. Microw. Theory Tech., submitted for publication. [8] A. Pergande, “The history and challenges of passive millimeter wave imaging,” presented at the IEEE MTT-S Int. Microw. Symp. WSC Imag. Workshop, Jun. 2011. [9] J. J. Lynch et al., “Passive millimeter-wave imaging module with preamplified zero-bias detection,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 7, pp. 1592–1600, Jul. 2008. [10] J. W. May and G. M. Rebeiz, “Design and characterization of -band SiGe RFICs for passive millimeter-wave imaging,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 5, pp. 1420–1430, May 2010. [11] L. Gilreath, V Jain, H.-C. Yao, L. Zheng, and P. Heydari, “A 94-GHz passive imaging receiver using a balanced LNA with embedded Dicke switch,” in IEEE Radio Freq. Integr. Circuits Symp., 2010, pp. 79–82. [12] A. Tomkins, P. Garcia, and S. P. Voinigescu, “A passive -band imager in 65 nm bulk CMOS,” IEEE J. Solid-State Circuits, vol. 45, no. 10, pp. 1981–1991, Oct. 2010. [13] S. Koch, M. Guthoerl, I. Kallfass, A. Leuther, and S. Saito, “A 120–145 GHz heterodyne receiver chipset utilizing the 140 GHz atmospheric window for passive millimeter-wave imaging applications,” IEEE J. Solid-State Circuits, vol. 45, no. 10, pp. 1961–1967, Oct. 2010. [14] H. Zirath et al., “Integrated receivers up to 220 GHz utilizing GaAsmHEMT technology,” in IEEE RFIT, 2009, pp. 225–228. [15] E. Laskin, P. Chevalier, B. Sautreuil, and S. P. Voinigescu, “A 140-GHz double-sideband transceiver with amplitude and frequency modulation operating over a few meters,” in IEEE BCTM Dig., 2009, pp. 178–181. [16] K. H. K. Yau, P. Chevalier, A. Chantre, and S. P. Voinigescu, “Characterization of the noise parameters of SiGe HBTs in the 70–170 GHz range,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 8, pp. 1983–2000, Aug. 2011.

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[17] E. Öjefors, F. Pourchon, P. Chevalier, and U. R. Pfeiffer, “A 160-GHz low-noise downconversion receiver front-end in a SiGe HBT technology,” Int. J. Microw. Wireless Technol., vol. 3, no. 3, pp. 347–353, Mar. 2011. [18] E. Öjefors, B. Heinemann, and U. R. Pfeiffer, “A 220 GHz subharmonic receiver front-end in a SiGe HBT technology,” in IEEE RFIC Dig., Jun. 2011, Paper RMO-1C5. [19] G. Avenier, M. Diop, P. Chevalier, S. Pruvost, J. Bouvier, G. Troillard, L. Depoyan, M. Buczko, N. Revil, S. Montusclat, A. Margain, S. T. Nicolson, K. H. K. Yau, D. Gloria, N. Loubet, N. Derrier, C. Leyris, S. Boret, D. Dutartre, S. P. Voinigescu, and A Chantre, “0.13 m SiGe BiCMOS technology fully dedicated to mm-wave applications,” IEEE J. Solid-State Circuits, vol. 44, no. 9, pp. 2312–2321, Sep. 2009. [20] S. P. Voinigescu, E. Laskin, I. Sarkas, K. H. K. Yau, S. Shahramian, A. Hart, A. Tomkins, P. Chevalier, J. Hasch, P. Garcia, A. Chantre, and B. Sautreuil, “Silicon -band wireless transceivers and applications,” in IEEE Asia–Pacific Microw. Conf. Dig., Dec. 2010, pp. 1857–1864. [21] A. M. Mangan, S. P. Voinigescu, M. T. Yang, and M. Tazlauanu, “Deembedding transmission line measurements for accurate modelling of IC designs,” IEEE Trans. Electron. Devices, vol. ED-53, no. 2, pp. 235–241, Feb. 2006. [22] E. Laskin, P. Chevalier, A. Chantre, B. Sautreuil, and S. P. Voinigescu, “165-GHz transceiver in SiGe technology,” IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1087–1100, May 2008.

E. Dacquay (S’04) received the B.A.Sc. degree in computer engineering from the University of Waterloo, Waterloo, ON, Canada, in 2008, and is currently working toward the M.A.Sc. degree in electrical engineering at the University of Toronto. His current research interests are in the areas of passive millimeter-wave imaging and detector modeling for silicon wafer scale imaging arrays.

A. Tomkins received the B.A.Sc. degree in engineering physics from Carleton University, Ottawa, ON, Canada, in 2006, and the M.A.Sc degree from the University of Toronto, Toronto, ON, Canada, in 2010. He is currently with Peraso Technologies Inc., Toronto, ON, Canada, where he is a Millimeter-Wave Transceiver Designer.

K. H. K. Yau (S’03–M’11) received the B.A.Sc. degree (with distinction) in engineering physics from the University of British Columbia, Vancouver, BC, Canada, in 2003, and the M.A.Sc. and Ph.D. degrees in electrical engineering from the University of Toronto, Toronto, ON, Canada, in 2006 and 2011, respectively. His Ph.D. research concerned the area of on-wafer metrology techniques and compact modeling for nanoscale MOSFETs, advanced SiGe HBTs, and passive elements. In 2011, he joined the Broadcom Corporation, Irvine, CA, where he is involved in the compact modeling of advanced nanoscale CMOS technologies. Dr. Yau was the recipient of numerous scholarships, including an Undergraduate Research Award and a Post-Graduate Scholarship from the Natural Sciences and Engineering Council (NSERC) of Canada. He was also the recipient of an Achievement Award from the Association of Professional Engineers and Geoscientists of British Columbia.

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E. Laskin received the B.A.Sc. (Hons) degree in computer engineering and M.A.Sc and Ph.D. degrees in electrical engineering from the University of Toronto, Toronto, ON, Canada, in 2004, 2006, and 2010, respectively. In 2006, she was on a six-month internship with the IBM T. J. Watson Research Center, Yorktown Heights, NY. Her research interests include the design of high-speed and millimeter-wave integrated circuits with a focus on millimeter-wave imaging systems. Ms. Laskin was a University of Toronto Scholar from 2000 to 2004. She was the recipient of the National Science and Engineering Research Counsel of Canada (NSERC) Undergraduate Student Research Award in industry and university in 2002 and 2003, the NSERC Postgraduate Scholarship, and the NSERC Canada Graduate Scholarship.

P. Chevalier (M’06) was born in Saumur, France, in 1971. He received the Engineering degree in science of materials from the University School of Engineers of Lille, Lille, France, in 1994, and the Ph.D. degree in electronics from the University of Lille, Lille, France, in 1998. His doctoral research concerned the development of 0.1- m InP-based HEMT technologies. In 1999, he joined Alcatel Microelectronics, Oudenaarde, Belgium, where he contributed to the start of RF BiCMOS and led the development of 0.35- m SiGe BiCMOS technologies. In 2002, he joined STMicroelectronics, Crolles, France, to develop high-speed SiGe HBT’s for 0.13- m millimeter-wave BiCMOS. He is currently a Principal Engineer, Senior Member of Technical Staff, in charge of the process integration of advanced RF and millimeter-wave devices for CMOS derivatives technologies. He has authored or coauthored over 100 technical journal papers and conference publications. Dr. Chevalier has been the chair of the Process Technology Subcommittee, IEEE Bipolar / BiCMOS Circuits and Technology Meeting. He belongs to the RF & AMS Technologies Working Group, ITRS, of which he leads the Silicon Bipolar and BiCMOS Subgroup.

A. Chantre (M’91–SM’97) was born in Reims, France, in 1953. He received the Engineering degree in physics from the Institut National des Sciences Appliquées de Lyon, France, in 1976, and the Ph.D. degree from the Université Scientifique et Médicale de Grenoble, Grenoble, France, in 1979. His doctoral research concerned deep-level optical spectroscopy (DLOS) in GaAs. From 1979 to 1999, he was with the Centre National d’Etudes des Télécommunications (CNET), Grenoble, France. From 1985 to 1986, he was with AT&T Bell Laboratories, Murray Hill, NJ, where he was involved with deep-level defects investigations in silicon. From 1986 to 1992, he was in

charge of a group that worked on the characterization of advanced silicon processes and devices. From 1993 to 1999, he worked within the GRESSI consortium between France Telecom CNET and CEA-LETI, as Head of a group involved in the development of advanced bipolar devices for submicrometer BiCMOS technologies. Since 2000, he has been with STMicroelectronics, Crolles, France, where he is currently manages the development of advanced SiGe BiCMOS devices and technology for RF, millimeter-wave, and optical communications applications. He has authored or coauthored over 150 technical papers related to his research. He holds 25 patents.

B. Sautreuil was born in La Rochelle, France, in 1954. He received the Engineer degree in material physics and Ph.D. degree in Ge solar cells for multicolor systems from INSA Lyon, Lyon, France, in 1979 and 1982, respectively. In 1985, he joined Thomson Semiconductor (now STMicroelectronics), St. Egreve, France, in 1985, where he has been a Process, Maintenance, and Device Engineer. In 1991, he joined the Metallization Process Group, STMicroelectronics, Crolles, France, and then became involved with metal–implant area management, and the photo and etch area, including research and development. In 1999, join the Analog & RF Technology Research and Development Group, as an Assistant Manager of BiCMOS technology and passive component research and development. Since 2004, he has been involved with interface for BiCMOS RF and mixed signal technology platform customers. Since 2006, he has articipated in Si-photonics technologies evaluations.

S. P. Voinigescu (S’91–M’95–SM’02) received the M.Sc. degree in electronics from the Polytechnic Institute of Bucharest, Bucharest, Romania, in 1984, and the Ph.D. degree in electrical and computer engineering from the University of Toronto, Toronto, ON, Canada, in 1994. From 1994 to 2002, he was first with Nortel Networks and later with Quake Technologies, Ottawa, ON, Canada, where he was responsible for projects in high-frequency characterization and statistical scalable compact model development for Si, SiGe, and III–V devices. He later conducted research on wireless and optical fiber building blocks and transceivers in these technologies. In 2002, he joined the University of Toronto, where he is currently a Full Professor. From 2008 to 2009, he spent a sabbatical year with Fujitsu Laboratories of America, Sunnyvale, CA. His research and teaching interests focus on nanoscale semiconductor devices and their application in integrated circuits at frequencies beyond 300 GHz. Dr. Voinigescu is a member of the ITRS RF/AMS Committee and of the Technical Program Committees (TPCs) of the IEEE CSICS and BCTM. He was the recipient of Nortel’s 1996 President Award for Innovation. He was a corecipient of the Best Paper Award of the 2001 IEEE CICC and the 2005 IEEE CSICS. He was also a recipient of the Beatrice Winner Award of the 2008 IEEE ISSCC. His students have been the recipients of Student Paper Awards presented at the 2004 VLSI Circuits Symposium, the 2006 SiRF Meeting, RFIC Symposium, BCTM, and the 2008 IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium.

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New Method for Determining Dielectric Properties of Skin and Phantoms at Millimeter Waves Based on Heating Kinetics Nacer Chahat, Student Member, IEEE, Maxim Zhadobov, Member, IEEE, Ronan Sauleau, Senior Member, IEEE, and Stanislav I. Alekseev, Member, IEEE

Abstract—Recent progress in millimeter-wave (MMW) wireless body-centric applications triggered an increasing interest to characterize the interactions between the millimeter waves and the human body. The determination of the dielectric properties of skin and phantoms (artificial models with tissue-equivalent dielectric properties) at MMW is crucial for the accurate evaluation of the power absorption and distribution in the skin. In this study, we show that the heating kinetics resulting from the MMW exposure can be used for the accurate determination of the penetration depth and power density in different samples (1% and 4% agar phantoms, 20% and 25% polyethylene powder (PEP) phantoms, and human skin). The samples have been exposed at 60.4 GHz using an open-ended waveguide. The temperature distribution and dynamics are recorded using an infrared camera. The values of and are defined by fitting the analytical solution of the bio-heat transfer equation to the experimental heating kinetics. The values of are further used to retrieve the permittivity spectra of materials described by Debye equation. Simultaneously, is calculated using the permittivity directly measured using a slim coaxial probe. Both results are in good agreement. Finally, our results demonstrate that the permittivity of a 20% PEP phantom is close to that of skin. Hence, this phantom can be used to model the MMW interactions with skin and to characterize on-body wearable MMW antennas. Index Terms—Body-centric applications, experimental phantoms, human skin permittivity, infrared thermometry, permittivity measurement.

I. INTRODUCTION

R

ECENTLY, the body area networks (BANs) operating in the unlicensed 57–64-GHz band have been identified as a highly promising solution since they provide several advantages compared with microwave BANs. First, very high data rates can be reached (typically up to 5 Gb/s) because of the large available spectrum (7 GHz worldwide) [1]. Second, high free-space losses due to the atmospheric oxygen-induced absorption around 60 GHz result in a high level of security and low interference with adjacent networks [2]. Finally, the size of

Manuscript received July 01, 2011, revised October 24, 2011; accepted November 08, 2011. Date of publication January 04, 2012; date of current version March 02, 2012. This work was supported in part by “Agence Nationale de la Recherche” (ANR), France under Grants ANR-09-RPDOC-003-01 (Bio-CEM project) and by “Centre National de la Recherche Scientifiques (CNRS),” France. N. Chahat, M. Zhadobov, and R. Sauleau are with the Institute of Electronics and Telecommunications of Rennes (IETR), UMR CNRS 6164, University of Rennes 1, 35042 Rennes, France (e-mail: [email protected]). S. I. Alekseev is with the Institute of Cell Biophysics, Russian Academy of Sciences, 142292 Pushchino, Russia. Digital Object Identifier 10.1109/TMTT.2011.2176746

on-body devices is greatly reduced compared with similar systems operating at microwaves. The extension of BAN to the millimeter-wave (MMW) range requires careful characterization of the antenna/human body interaction in order to evaluate, and possibly minimize, the variations of antenna characteristics and exposure levels induced to the body. To this end, knowledge of the dielectric properties of the human tissues is crucial for the numerical modeling and development of experimental phantoms [3]. Any variations of the dielectric properties could directly impact the theoretical and experimental results. Several techniques have been introduced so far to determine the complex permittivity of skin at MMW. Gabriel et al. [4] reported extrapolated permittivity values up to 110 GHz based on human skin measurements performed below 20 GHz using an . Gandhi open-ended coaxial probe et al. presented results at 60 GHz [5] obtained with a Debye model relying on measurements performed on rabbit skin at 23 GHz . Alabaster et al. used a freespace technique on excised samples of human skin at 60 GHz [6]. Hwang et al. [7] measured the human skin permittivity in vivo up to 110 GHz using a coaxial probe . Alekseev et al. [8] carried out reflection measurements using an open-ended waveguide and proposed homogeneous and multilayer human skin models fitting . the experimental data The reported skin permittivity data strongly depend on a number of parameters, including the measurement technique, the sample under test, and the location on the body [9]. Furthermore, direct electromagnetic measurements at MMW often require quite sophisticated and costly equipment, such as a MMW vector network analyzer. Development of alternative permittivity measurement techniques is important, particularly at MMW frequencies, to reduce the measurement cost and validate the accuracy of available data. Besides, skin-equivalent experimental phantoms have been developed very recently for on-body characterization of wearable MMW antennas [3]. Changes of the phantom dielectric properties with time, related for instance to evaporation, also requires accurate, and noninvasive measurement of its dielectric properties. This paper proposes a new method for determining the dielectric properties of skin and phantoms at MMW based on the measurements of the heating kinetics. Compared with most of the existing techniques, this method allows performing nondestructive measurements in situ.

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The paper is organized as follows. The considered samples, measurement setup, and methodology are described in Section II. The results are given in Section III for different materials and are compared with data obtained from reflection measurements. Finally, the proposed method is discussed in detail in Section IV. II. MATERIALS AND METHODS A. Samples Description The penetration depth and the complex permittivity of the following samples have been determined: 1) two agar phantoms; 2) two polyethylene powder (PEP) phantoms; and 3) human skin. They are described in detail hereafter. First, we have considered two phantoms made of distilled water and 1% or 4% agar. Due to the high water concentration, the permittivity of these phantoms is close to the permittivity of free water ( at 60 GHz, 20 C) [10]. Second, 20% and 25% PEP phantoms have been investigated. They are prepared by adding PEP, agar, and TX-151 into distilled water. TX-151 is a white powder that solidifies when mixed with water to obtain a material with the consistency of rubber. Such phantoms have been widely used to model human tissues at microwave frequencies [11], [12]. Recently, a skin-equivalent PEP phantom has been developed for modeling human skin in the 55–65-GHz range [3]. All phantoms have a cylindrical shape with a thickness of 2 cm and a diameter of 14 cm, and they are at ambient temperature. Finally, measurements have been performed on the forearm skin. Three volunteers from the laboratory staff participated in these experiments. All volunteers have a solid background in electromagnetics and were informed about the purpose of the measurements. B. Measurement Setup The experimental setup is represented in Fig. 1. Phantoms and skin are exposed at 60.4 GHz using a WR-15 rectangular open-ended waveguide (9 dBi gain) located at 17 mm above the object. A CW signal is generated by a narrowband Gunn oscillator. After amplification, the signal is transmitted towards the waveguide aperture. The input power of the radiating waveguide (Fig. 1) equals 425 mW. Similar power levels are commonly used in bioelectromagnetic studies [9]. The input power is controlled and adjusted before each experiment using an Agilent E4418B power meter (Agilent Technologies, Santa Clara, CA). A FLIR SC5000 high-resolution infrared (IR) camera (FLIR Systems, Wilsonville, OR) operating in the 2.5–5.1- m spectral range is used for recording the heating pattern and dynamics on the surface of exposed samples at the ambient temperature . The thermal sensitivity of the camera provided by the manufacturer is 0.025 C. The IR camera allows obtaining images with a spatial resolution up to 640 512 pixels. Under the experimental conditions considered in this study, the resolution on the sample surface is roughly 0.2 mm . The sequence of thermal images is recorded at a sampling rate of 25 frames

Fig. 1. Schematic representation of the measurement set-up (proportions are not to scale). The main parts of the millimeter-wave generator (QuinStar Technology Inc.) are the following: 1) 60.42-GHz tunable Gunn oscillator; 2) V-band tunable attenuator; 3) V-band power amplifiers (25 dB gain); 4) isolator (20 dB isolation).

per second. We would recommend the following minimal requirements on the camera features for the proposed technique: 1) resolution on the sample: 1 mm ; 2) frame rate: 10 Hz; and 3) thermal resolution: 0.1 C. C. Methodology The proposed methodology is divided in two parts. First, we describe the approach implemented for the determination of the penetration depth of the considered samples. Second, the procedure implemented to retrieve the permittivity spectrum is provided. 1) Determination of the Penetration Depth: It was shown previously that the initial temperature rise rate of the heating kinetics does not depend on the exposing beam size (e.g., openended waveguide or horn antenna) if the peak incident power density is kept at the same level [14]. Therefore, the heating of the skin or phantom can be modeled by the following 1-D bio-heat transfer equation (BHTE) [15]: (1) where is the tissue (or phantom) temperature, is the arterial blood temperature, is the mass density, is the specific heat of the exposed material, is the heat conduction coefficient, , where is the specific blood flow rate (equal to 0 for the considered phantoms), and are the density and specific heat of blood, respectively, and is the heat deposition from the MMW exposure, where is the direction of penetration (normal to the sample interface). Further, we will consider the relative temperature rise . The heat deposition in skin or phantom can be defined as follows [15]:

(2) is the incident where is the power reflection coefficient, power density, and is the unit step function.

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Equation (1) is solved analytically under the following boundary conditions:

(3) , is the heat transfer coefficient describing the where heat loss from the sample to the external environment due to radiation, convection, and evaporation [16] and is the ambient temperature. The initial conditions are determined from the steady-state solution of (1) at as (4) where . The transient solution for the temperature rise on the surface of a homogeneous and isotropic semi-infinite medium (i.e., at ) is given by

Fig. 2. Standard deviation between the experimental data and the theoretical as a function of and . The temperature kinetics was obtained for model 20% PEP exposed at 60.4 GHz.

This approach allows us to determine the penetration depth for each sample under test at 60.4 GHz. 2) Retrieval of the Complex Permittivity: The penetration depth determined above at 60.4 GHz is used for the calculation of the complex permittivity spectrum of each sample. It can be expressed as follows [17]: (6)

(5) where , , and . This solution is in agreement with that given in [15]. Some parameters appearing in the expression of , such as , , , and , are well established and given in the literature. The heat transfer coefficient can be easily calculated [16]. If we define the absorbed power density as , then the number of unknown parameters in (5) is reduced to two, namely, and . To determine in the considered samples, we first measure the temperature increase as a function of time with the IR camera during 10 s of exposure. Then, using the least-squares technique, we fit these experimental data to the theoretical model by varying and . In practice, only one temperature recording is sufficient, as the measurement results are reproducible. The standard deviation (SD) between the experimental data and the theoretical model as a function of and , has only one minimum. This means that there is a unique set of values for and corresponding to the experimental heating kinetics for a given sample. As an example, Fig. 2 represents the SD for the 20% PEP phantom. The minimum SD is obtained for and 77.8mW/cm . More detailed results for this phantom are given and discussed in Section III.

where is the velocity of light in free space and is the frequency. It is well known that the relaxation frequencies of all components in biological tissues (e.g., proteins, lipids, or bound water), except free water, lie below 5 GHz. Therefore, those of biological tissues at MMW are close to the relaxation frequencies of free water at the same temperature [4], [5], [8]. It is also known that the skin permittivity at MMW can be described by a Debye model [17] (7) where is the relaxation time equal to that of free water, , , is the magnitude of the dispersion of the free water fraction of the sample, is the permittivity at , is the optical permittivity, , and is the ionic conductivity. The optical permittivity equals , where is the weight fraction of the total water content of the material to be characterized [18]. In [8], the authors determined in (7) by fitting the theoretical power reflection coefficient to the experimental data. In the current study, we use a similar approach to determine and therefore . Varying in the Debye equation (7), we can find the optimized value of for which the penetration depth given by (6) is equal to that found from the temperature kinetics measurements .

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To illustrate this technique, we consider here the 20% PEP phantom. The penetration depth , calculated from the temperature kinetics, equals 0.48 mm. The parameters of the Debye model have been optimized to obtain the same penetration depth: 39.0, 9.27 10 s, 4.5 ( 0.8 for this phantom), and (the phantom employed in this study does not contain salts and free ions). The resulting penetration depth equals exactly 0.48 mm. The permittivity results for the optimized Debye model are presented in detail in Section III (cf. Fig. 4). To cross check the permittivity results and to validate the proposed methodology, an open-ended coaxial slim probe operating up to 67 GHz has been used for the permittivity measurements applying the methodology provided in [13]. III. RESULTS Fig. 3 represents the temperature distribution and dynamics for the 20% PEP phantom illuminated by the open-ended waveguide within the compact anechoic chamber presented in Fig. 1. The heated area of the phantom has a circular shape [Fig. 3(a)], and the temperature profile has a Gaussian-type distribution [Fig. 3(b)]. The diameter of the heated spot at 3 dB level of the peak temperature is equal to 12 mm. The solution of the 1-D BHTE fitted to the experimental temperature kinetics is plotted in Fig. 3(c). Similar heating patterns and good match of the theoretical kinetics to the experimental data have been also obtained for the other samples under test. The penetration depths at 60.4 GHz found from the fitting procedure (Section II-C) are given in Table I for all samples considered here. The thermo-physical parameters used in these calculations (Table I) were selected in accordance with the literature data [11], [18], [19]. In the same table, we also give the penetration depths obtained from direct measurements of permittivity using an open-ended slim coaxial probe. Both sets of results demonstrate a very good agreement. As expected, in 1% agar phantom, the penetration depth is equal to that of water ( 0.318 mm at 20 C) [10]. The experimental results obtained with the other samples confirm that this method can be applied for the determination of for materials with a relatively wide range of the permittivity values. In addition, the penetration depth in skin has been calculated analytically using the skin permittivity values provided by Gabriel et al. [4]. Using these data, the calculated penetration depth equals 0.48 mm; it is very close to our results for the penetration depth in skin (Table I). The value of which is the closest to the penetration depth in skin [4] is obtained for the 20% PEP phantom. Fig. 4 represents the permittivity spectrum of this phantom when measured directly using the slim coaxial probe and the one retrieved from the heating kinetics. The results are in very good agreement ( and at 60 GHz). Although the distance between the waveguide aperture and the sample surface was maintained constant, the maximal temperature elevation during 10 s of exposure was different for the selected samples. Though these elevations strongly depend on the material reflectivity and heat transfer coefficients, the variations in heating do not well correlate with changes in reflectivity and . We presume that this is due to the difference in the material emissivity. However, these variations in heating do not

Fig. 3. Heating profiles and dynamics for the 20% PEP phantom. (a) IR image of the temperature distribution on the surface of phantom exposed at 60.4 GHz by an open-ended waveguide (WG). (b) Temperature profile in the cutting plane passing by the center of the heated spot. (c) Kinetics of the temperature rise in the area of maximal temperature elevation. Dotted line: experimental result. Solid 0.48 mm and 77.8 mW/cm . line: optimized thermal model with

change the values of obtained during the fitting procedure, and therefore they do not impact the retrieved permittivity spectra. At the same time, the contribution of the emissivity should be carefully taken into account for the accurate determination of that is proportional to the temperature increment. As the temperature monitored by an IR camera directly depends on the emissivity, the use of incorrect values of emissivity may result in errors when determining . Taking into account that the emissivity of skin is close to 1 [19], we calculated the incident power density for the skin

CHAHAT et al.: NEW METHOD FOR DETERMINING DIELECTRIC PROPERTIES OF SKIN AND PHANTOMS BASED ON HEATING KINETICS

TABLE I THERMO-PHYSICAL PARAMETERS AND PENETRATION DEPTHS AT 60.4 GHZ IN AGAR AND PEP PHANTOMS, AND IN FOREARM SKIN

Fig. 4. Permittivity of water (solid lines) and 20% PEP (dotted lines) measured with a slim coaxial probe at 20 C. Dashed lines: permittivity of 20% PEP phantom determined from heating kinetics measurements.

exposure. First, we determined the skin permittivity and the power reflection coefficient . Then, we calculated as follows: . We found that, under the exposure conditions used in our study, 77 mW/cm . As it was demonstrated previously that homogeneous models can be used to represent the skin at MMW [8], we use here the solution of BHTE obtained for a homogeneous and isotropic medium to fit the temperature kinetics. Since the distance from the waveguide aperture remains the same for all samples, is valid for all samples considered in this study. We used literature data for and (Table I). In practice these values may not be as accurate as for other well-known materials. A parametric study has shown that the changes in and are within when and are varied by (in reality, the uncertainty is expected to be much smaller). Thus, the exact knowledge of and is not critical for the accurate determination of and . Moreover, the values of were measured accurately for all phantoms. For the skin, we found that changes of blood flow produce a weak effect on the accuracy of and (less than 0.4% when is multiplied by a factor of four) if we use short records of the heating kinetics 10 s . IV. DISCUSSION It is necessary to determine accurately the dielectric properties of skin and phantoms for near-future body-centric applications studies (e.g., antenna design in close proximity to the

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human body, on-body propagation channel characterization). Any uncertainty of these parameters could lead to errors in the power reflection and absorption at the air/skin or air/phantom interface, resulting therefore in an inaccurate evaluation of the interaction between on-body antennas and the human body. This could directly impact the performances of a wireless system. In this study, we have demonstrated that the temperature kinetics measured using an IR camera can be used to determine the penetration depth and permittivity of high water content materials in the MMW range. The proposed procedure consists in fitting the solution of the BHTE to the measured temperature kinetics; this enables us to define and . Then, for a given kinetics, a unique combination is found by minimizing the standard deviation. The obtained values of are further used to calculate the skin and phantom permittivity spectra. It is worthwhile to note that the method used for the permittivity determination can be applied only to high-water-content materials with the same relaxation time as water. The dielectric properties of skin obtained with the new approach are in good agreement with the literature data [4], [8] and with permittivity spectra obtained from reflection measurements. In this study, for the temperature measurements, we used a high-resolution IR camera. However, accurate temperature measurements could be also performed using either a thin thermocouple 0.1 mm or a fiber-optic temperature sensor. For a thermocouple, to perform an artifact-free temperature measurement, it is necessary to locate its leads perpendicular to the -field of the incident electromagnetic wave [14]. Thermocouple-based measurements have an advantage over the IR thermometry because they measure temperature directly, and therefore they do not require to know the emissivity of the sample under test. To validate the proposed methodology, we used two phantoms with dielectric properties close to those of skin, namely 20% and 25% PEP phantoms [3]. We found that the dielectric properties of the 20% PEP phantom are the closest ones to those of skin. Hence, this phantom can be used for modeling the interactions between the MMW and skin. Finally, it is important to underline that this measurement technique can be easily and inexpensively implemented. In addition, compared with other in-house techniques based on reflection measurements [6]–[8], this approach uses low-cost commercially available equipment. It provides accurate results for the penetration depth and dielectric properties in a simple and fast way. Furthermore, the specific absorption rate in the near-surface layers can be directly determined using this approach. REFERENCES [1] R. C. Daniels, J. N. Murdock, T. S. Rappaport, and R. W. Heath, “60 GHz wireless: Up close and personal,” IEEE Microw. Mag., vol. 11, no. 7, pp. 44–50, Dec. 2010. [2] S. L. Cotton, W. G. Scanlon, and P. S. Hall, “A simulated study of co-channel inter-BAN interference at 2.45 GHz and 60 GHz,” in Proc. Eur. Wireless Technol. Conf., Paris, France, Sep. 2010, pp. 61–64. [3] N. Chahat, M. Zhadobov, S. Alekseev, and R. Sauleau, “Human skinequivalent phantom for on-body antenna measurements in the 60 GHz band,” Electron. Lett., accepted for publication. [4] S. Gabriel, R. W. Lau, and C. Gabriel, “The dielectric properties of biological tissues: III. Parametric models for the dielectric spectrum of tissues,” Phys. Med. Biol., vol. 41, pp. 2271–2293, 1996.

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[5] O. P. Gandhi and A. Riazi, “Absorption of millimeter waves by human beings and its biological implications,” IEEE Trans. Microwave. Theory Tech., vol. MTT-34, no. 2, pp. 228–235, Feb. 1986. [6] C. M. Alabaster, “Permittivity of human skin in millimetre wave band,” Electron. Lett., vol. 39, no. 21, pp. 1521–1522, Oct. 2003. [7] H. Hwang, J. Yim, J.-W. Cho, C. Cheon, and Y. Kwon, “110 GHz broadband measurement of permittivity on human epidermis using 1 mm coaxial probe,” in IEEE Int. MTT-S Micro. Symp. Dig., Jun. 2003, vol. 1, pp. 399–402. [8] S. I. Alekseev and M. C. Ziskin, “Human skin permittivity determined by millimeter wave reflection measurements,” Bioelectromagnetics, vol. 28, no. 5, pp. 331–339, Jul. 2007. [9] M. Zhadobov, N. Chahat, R. Sauleau, C. L. Quément, and Y. L. Dréan, “Millimeter-wave interactions with the human body: State of knowledge and recent advances,” Int. J. Microw. Wireless Technol., vol. 3, no. 2, pp. 237–247, Mar. 2011. [10] W. J. Ellison, “Permittivity of pure water, at standard atmospheric pressure, over the frequency range 0–25 THZ and the temperature range 0–100 C,” J. Phys. Chem. Ref. Data, vol. 36, no. 1, pp. 1–18, Feb. 2007. [11] K. Ito, K. Furuya, Y. Okano, and L. Hamada, “Development and characteristics of a biological tissue-equivalent phantom for microwaves,” Electron. Commun. Japan, vol. 84, no. 4, pp. 67–77, Apr. 2001. [12] N. Chahat, M. Zhadobov, R. Sauleau, and K. Ito, “A compact UWB antenna for on-body applications,” IEEE Trans. Antennas Propag., vol. 59, no. 4, pp. 1123–1131, Apr. 2011. [13] M. Zhadobov, R. Augustine, R. Sauleau, S. Alekseev, A. D. Paola, C. L. Quément, Y. S. Mahamoud, and Y. L. Dréan, “Complex permittivity of representative biological solutions in the 2–67 GHz range,” Bioelectromagnetics, 2011, to be published. [14] S. I. Alekseev and M. C. Ziskin, “Local heating of human skin by millimeter waves: A kinetics study,” Bioelectromagnetics, vol. 24, no. 8, pp. 571–581, Oct. 2003. [15] K. R. Foster, H. N. Kritikos, and H. P. Schwan, “Effect of surface cooling and blood flow on the microwave heating of tissue,” IEEE Trans. Biomed. Eng., vol. BME-25, no. 3, pp. 313–316, May 1978. [16] E. H. Wissler, “Steady-state temperature distribution in man,” J. Appl. Physiol., vol. 16, no. 4, pp. 734–740, Jul. 1961. [17] S. I. Alekseev, A. A. Radzievsky, M. K. Logani, and M. C. Ziskin, “Millimeter wave dosimetry of human skin,” Bioelectromagnetics, vol. 29, no. 1, pp. 65–70, Jan. 2008. [18] S. I. Alekseev, O. V. Gordiienko, and M. C. Ziskin, “Reflection and penetration depth in millimeter waves in murine skin,” Bioelectromagnetics, vol. 29, no. 5, pp. 340–344, Jul. 2008. [19] F. A. Duck, Physical Properties of Tissue. A Comprehensive Reference Book. San Diego, CA: Academic, 1990. [20] M. Zhang, Z. Che, J. Chen, H. Zhao, L. Yang, Z. Zhong, and J. Lu, “Experimental determination of thermal conductivity of water-agar gel at different concentrations and temperatures,” J. Chem. Eng. Data, vol. 56, no. 4, pp. 859–864, Apr. 2011. Nacer Chahat (S’09) was born in Angers, France, in 1986. He received the degree in electrical engineering and radio communications and M.S. degree in telecommunication and electronics from the Ecole Supérieur d’ingénieurs de Rennes (ESIR), Rennes, France, in 2009. He is currently working toward the Ph.D. degree in signal processing and telecommunications at the Institute of Electronics and Telecommunications of Rennes (IETR), University of Rennes 1, Rennes, France. He accomplished a six-month master’s training period as a Special Research Student in 2009 at the Graduate School of Engineering, Chiba University, Chiba, Japan. His current research fields are electrically small antennas, millimeter-wave antennas, and the evaluation of the interaction between the electromagnetic field and human body. Mr. Chahat was the recipient of the 2011 Best Poster Presentation Award from Bioelectromegnetics Society.

Maxim Zhadobov (S’05–M’07) received the M.S. degree in radiophysics from Nizhni Novgorod State University, Nizhni Novgorod, Russia, in 2003, and the Ph.D. degree in bioelectromagnetics from the Institute of Electronics and Telecommunications of Rennes (IETR), University of Rennes 1, Rennes, France, in 2006. He performed post-doctoral training at the Center for Biomedical Physics, Temple University, Philadelphia, PA, in 2008 and then rejoined IETR as an Associate Researcher. He has authored or coauthored more than 70 scientific contributions. His main scientific interests are in the field of biocompatibility of electromagnetic radiations, including interactions of microwaves, millimeter waves, and pulsed radiations at the cellular level, health risks and environmental safety of emerging wireless communication systems, biocompatibility of wireless noninvasive biomedical techniques, therapeutic applications of nonionizing radiations, bioelectromagnetic optimization of body-centric wireless systems, and experimental and numerical electromagnetic dosimetry. Dr. Zhadobov was the recipient of the 2005 Best Poster Presentation Award from the International School of Bioelectromagnetics, 2006 Best Scientific Paper Award from the Bioelectromegnetics Society, and Brittany’s Young Scientist Award 2010.

Ronan Sauleau (M’04–SM’06) received the degree in electrical engineering and radio communications from the Institut National des Sciences Appliquées, Rennes, France, in 1995, the Agrégation degree from the Ecole Normale Supérieure de Cachan, France, in 1996, and the Ph.D. degree in signal processing and telecommunications and “Habilitation à Diriger des Recherche” degree from the University of Rennes 1, France, in 1999 and 2005, respectively. He was an Assistant Professor and Associate Professor with the University of Rennes 1, Rennes, France, between September 2000 and November 2005 and again between December 2005 and October 2009. He has been a full Professor with the same university since November 2009. He holds five patents and is the author or coauthor of more than 100 journal papers and more than 240 publications in international conferences. His current research fields are numerical modelling (mainly FDTD), millimeter-wave printed and reconfigurable (MEMS) antennas, lens-based focusing devices, periodic and nonperiodic structures (electromagnetic bandgap materials, metamaterials, reflectarrays, and transmitarrays) and biological effects of millimeter waves. Prof. Sauleau is a Junior member of the “Institut Universitaire de France.” He received the 2004 ISAP Conference Young Researcher Scientist Fellowship (Japan) and the first Young Researcher Prize in Brittany, France, in 2001 for his research work on gain-enhanced Fabry–Perot antennas. He was awarded the Bronze medal by CNRS in 2008.

Stanislav I. Alekseev (M’10) received the M.S. degree in physics from Kazan State University, Kazan, Russia, in 1971, and the Ph.D. degree in biophysics from the Institute of Biophysics, Russian Academy of Sciences, Pushchino, Russia, in 1977. He is currently a Senior Researcher with the Institute of Cell Biophysics, Russian Academy of Sciences, Pushchino, Russia, where he is involved in the research of neural effects of millimeter (mm)-wave irradiation. His research interests include theoretical and experimental study of microwave and mm-wave interaction with the skin, dosimetry and thermodynamics, mechanisms of microwave and mm-wave effects on model and neuronal membranes, on electrical activity of neurons, and cutaneous sensory afferents.

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Diffraction in mm and Sub-mm Wave Indoor Propagation Channels Martin Jacob, Student Member, IEEE, Sebastian Priebe, Robert Dickhoff, Thomas Kleine-Ostmann, Thorsten Schrader, Member, IEEE, and Thomas Kürner, Senior Member, IEEE

Abstract—Current indoor wireless communication systems are shifting from classical microwave bands towards mm wave frequencies, whereas here the 60 GHz band is of special interest. Future systems are expected to work at even higher carrier frequencies in the sub-mm band beyond 300 GHz. In indoor wave propagation channels of such systems, diffraction occurs at a multitude of objects and hence must be considered for propagation simulations. Although the relevance of diffraction has been thouroughly studied at lower frequencies, it has not yet been analyzed methodically in the mm and sub-mm wave frequency range. This paper presents an extensive measurement campaign of the diffraction at objects like edges, wedges and cylinders for frequencies of 60 and 300 GHz. Different materials, realistic antennas as well as transmission through the objects are taken into account. Theoretical approaches are validated against the measurement results. Furthermore, shadowing of rays by persons is investigated and modeled with the help of diffraction. Finally, ray tracing is applied in an office scenario in order to evaluate the impact of diffraction on mm and sub-mm wave indoor channel characteristics. Index Terms—Diffraction measurements, diffraction modeling, mm and sub-mm wave communication, mm and sub-mm wave propagation, ray tracing, 60 GHz, 300 GHz, THz.

I. INTRODUCTION

R

ECENTLY, the ever-growing demand for wireless data transmission capacity has brought about the shift from conventionally used frequencies in the 2.4 and 5 GHz band up to carrier frequencies around 60 GHz with data rates of a few Gbit/s (cf. e.g., the IEEE standard 802.15.3c [1]). It can already be foreseen that several 10 Gbit/s of available wireless data rates will become necessary within 10 years from now [2]. Requiring huge unallocated bandwidths beyond 10 GHz, such communication systems can only be operated at even higher frequencies due to the almost completely allocated spectrum below 300 GHz. As solution, the THz band, ranging from 300 GHz to 3 THz, provides sufficient unregulated spectrum. A

Manuscript received July 01, 2011; revised November 16, 2011; accepted November 17, 2011. Date of publication January 18, 2012; date of current version March 02, 2012. M. Jacob, S. Priebe, and T. Kürner are with the Institut für Nachrichtentechnik, Technische Universität Braunschweig, 38106 Braunschweig, Germany and also with Terahertz Communications Lab, 38106 Braunschweig, Germany (e-mail: [email protected]; [email protected]; [email protected]). R. Dickhoff, T. Kleine-Ostmann, and T. Schrader are with the PhysikalischTechnische Bundesanstalt (PTB), 38116 Braunschweig, Germany and also with Terahertz Communications Lab, 38106 Braunschweig, Germany (e-mail: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2178859

frequency window with a low atmospheric attenuation can be found around 300 GHz, offering a bandwidth of 40 GHz [3]. Accordingly, a frequency of 300 GHz will also be used as a basis for the sub-mm wave investigations in this paper. Due to the high free space attenuation, robust data transmission at both 60 GHz and even more at 300 GHz should be based on a line-of-sight (LOS) link with high gain antennas, if possible. In case of ray blocking by objects or persons, these transmission systems must rely on the reception of multipath components on directed non-line-of-sight (NLOS) paths with with the drawback of a performance deterioration [3]. Besides reflection and scattering, especially diffraction leads to wave propagation in the geometrical shadow region behind obstacles. Diffraction can also be used to model the ray shadowing by persons [4]. Furthermore, diffraction may cause a non-negligible multipath propagation under both LOS and NLOS conditions and hence is of particular interest. For the description of electromagnetic scattering from many dielectric and metallic objects, various models exist, see e.g., [5]–[7]. In this work, we consider the knife edge diffraction model [8] and the uniform geometrical theory of diffraction (UTD) [6], which are among the most commonly used theories for radio propagation modeling. A good overview and discussion about edge diffraction can be found in [9]. In case of inhomogeneous objects or objects with more complex shapes, fullwave simulations may provide higher accuracy. However, such simulations require very high computional times and cannot be combined with fast ray tracing simulations, which are in the scope of the paper. Also, plenty of structures can be approximated by edges, wedges or cylinders without losing accurateness in practice. Plenty of diffraction investigations have been performed for current communication systems at far lower frequencies like 900 MHz (GSM) and 2.4 or 5 GHz (wireless LAN) [10]–[14]. In contrast, hardly any literature can be found on the diffraction in higher frequency ranges. The first diffraction measurements at 60 GHz have been reported in [15], whereas a simple edge diffraction geometry has been examined at 300 GHz in our own previous work [16]. Remarkably, the knife edge theory has been extended to describe the diffraction attenuation due to persons moving through a ray at 4–10 GHz [4]. This model has also been applied successfully at 60 GHz in our preliminary work [17]. However, to the best knowledge of the authors, no considerations about the impact of diffraction on ultra broadband transmission channels have been presented. Therefore, angular-dependent measurements of the diffraction attenuation caused by different objects like metallic and wooden edges, wedges and

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a cylinder are conducted. Furthermore, the movement of these objects through a direct ray path is investigated. Realistic antenna diagrams as well as transmission through the obstacle are considered. With the aim of validating the applicability of common theories also for the quasi-optical propagation at 60 and 300 GHz, the measurement results are compared to predictions obtained from the analytical models. Additionally, the ray obstruction by a moving person is evaluated. Then, ray tracing is performed at both 60 and 300 GHz to assess the relevance of diffraction for a communication link. Arising implications and challenges for the design of data communication systems employing mm and sub-mm waves are discussed. The remaining paper is structured as follows. In Section II, a short introduction to the knife edge theory as well as to the UTD is given. Afterwards, the measurements and the comparison with the diffraction theories are presented in Section III. Ray tracing simulations are shown in Section IV before the paper is wrapped up with a conclusion in Section V. II. DIFFRACTION THEORIES For the description of diffraction at wedges, edges and circular cylinders, various theories have been developed. In this work, we have chosen the knife edge method and the UTD, for the reason that they are easy to integrate with the ray tracing simulations presented in Section IV. The first approach describes the diffraction at semi-infinite edges, whereas the latter one is additionally applicable to wedges and cylinders. In practice, plenty of objects can be approximated by such geometries especially in the field of indoor communications. Examples are screens, edges of bookshelves, cupboards or tables, left-open doors and even persons. A. Knife Edge Diffraction (KED) Relying on perfect conductivity, the KED provides an approximation formula for the edge diffraction at a semi-infinite half-plane. The diffracted electric field with reference to the electric field received from an isotropic radiator without obstruction by the edge is calculated as

Fig. 1. Scheme of the wedge diffraction geometry.

the diffracted field as (2) at the diffraction point. is with respect to the incident field the distance from the wedge to the receiver (RX) and is the angle describing potentially skewed incidence in the general three-dimensional case, whereat is equal 90 in Fig. 1. denote the reflection coefficients of the planes of the wedge facing the transmitter (TX) and facing away from the TX, respectively. Those planes are called the 0 face and the n face. The complete formulation of the theory can e.g., be found in [8], but shall be omitted here for the sake of briefness. 2) Conducting Circular Cylinder: For the scattering by a infinitely long circular cylinder, an exact solution exists [7]. Nevertheless, here we have chosen to model the diffraction according to the UTD [18] due to its rather simple, but still sufficiently accurate formulation compared to the analytical solution. In this theory, mainly derived by Pathak et al. [19], the total field in the shadow region is composed by contributions from two so-called surface diffracted rays traveling clockwise and counterclockwise around the cylinder. For the lit region, the surface diffracted field is a reflected field. Similarly to (2), the field components are calculated by generalized reflection/diffraction coefficients depending on the actual geometry of the problem.

(1) III. DIFFRACTION MEASUREMENTS AT 60 AND 300 GHZ where denotes the Fresnel integral and is the geometry-dependent Fresnel parameter [8]. Despite the missing polarization consideration, the KED provides a simple and robust means for the description of diffraction in practical situations and hence will also be used in this paper. B. Uniform Geometrical Theory of Diffraction (UTD) By applying the UTD, solutions have been derived for the diffraction at different canonical objects, amongst which the dielectric wedge and the ideally conducting cylinder are chosen for closer investigations in this paper. 1) Dielectric Wedge: A scheme of the diffraction at a wedge including relevant geometry parameters can be seen in Fig. 1 for the two-dimensional case. Introducing a distance-dependent factor and the diffraction coefficients [6], one obtains

The motivation for the diffraction measurements described in this section is twofold. On the one hand, we use them to validate the theoretical models presented in Section II at mm and sub-mm wave frequencies. On the other hand, the basic differences between diffraction at distinct objects and between the 60 GHz and 300 GHz frequency range will be highlighted. All measurements have been carried out with a Rohde & Schwarz ZVA50 vector network analyzer (VNA) in combination with external transmitting and receiving test heads. As measurement antennas, 20 dBi WR-15 and WR-3 fed standard gain horns (SGH) with very similar antenna patterns have been used. Measurements have been taken for both horizontal and vertical polarization. Three types of measurements were performed in order to analyze individual aspects, namely the angular dependence of

JACOB et al.: DIFFRACTION IN MM AND SUB-MM WAVE INDOOR PROPAGATION CHANNELS

Fig. 2. Setup for angular-dependent measurements (setup 1).

diffraction, diffraction at closed objects and the investigation of human-induced shadowing. The different measurement setups will be described along with the results in the following subsections. A. Angular Dependent Diffraction The first measurement setup is shown in Fig. 2. Here the angular dependent diffraction loss is analysed. For that purpose, the transmitting and receiving test heads are mounted on rotatable arms, pointing always towards the direction of the rotation axis. The transmitter (TX) is kept fixed in order to illuminate the discontinuity of the object, i. e. the corner of the edge or the wedge always under the same angle . The measurement object (DUT) is positioned endwise vertically at x = 0, resulting in a shadow boundary for . The receiver is rotated, with positive angles corresponding to the lit region and negative angles to the shadow region. As a maximum angular resolution 1 has been chosen. The distances and have been 0.47 m in case of 60 GHz and 0.57 m in case of the 300 GHz measurements. Due to the narrow beamwidth of the antennas, the direct signal in the LOS case as well as a possible signal transmitted through the object in the NLOS case is highly attenuated mostly except for the area around the shadow boundary (see Fig. 1). In order to extend the dynamic range of the system and to achieve a higher suppression of the direct and transmitted signals, a polyethylene (PE) lens has been used at the RX in the 300 GHz setup. When dealing with electromagnetic diffraction, the total received electrical field strength is a superposition of different contributions. In case of measurement setup 1, the electrical field strength can be calculated according to

(3) is the diffracted field and is the field propawhere gating directly from TX to RX. and are the antenna gains for the corresponding angle of arrival and angle of departure at the antennas. In case of dielectric materials, an attenuated direct field component does also exist in the shadow region. Hence, has to be multiplied by a transmission coefficient . For metal, the parameter is assumed to be 0, and for wood it is calculated according to the Fresnel equations.

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Please note that in case of the diffraction coefficients and in (2) have to be corrected according to [20]. In a setup like this, the correct consideration of the antenna patterns is essential. In principal, the radiation pattern ought to be included in the derivation of the diffraction theory [8], but our comparison between measurements and theory has shown that it is sufficient to assume the field components as rays weighted by the antenna gains and . The angles and change with (see Fig. 1), whereas the diffracted component is always amplified by the maximum gain of the antennas. For the correct consideration, the SGH patterns are simulated with Ansoft HFSS. In case of the PE lens, a rectangular-shaped pattern with a width of 1.5 and a maximum gain of 33 dBi has been assumed. Additionally, a side lobe level of 13 dBi has been assumed. Complex transfer functions with frequency bandwidths of 20 GHz and 50 GHz and center frequencies of 60 GHz and 300 GHz have been measured. Afterwards they have been transformed to the time domain via inverse Fourier transform. Here, a rectangular time gating was performed in order to suppress undesired signal components, i.e., multipath reflections. After inverse transformation to the frequency domain, the diffraction losses are calculated as the ratio of the received power with the diffracting object and the unobstructed received power for . Firstly, a metal sheet (300 300 1 mm ) and a wooden board (200 200 7.6 mm ) serve as edges. Secondly, the diffraction was measured at wedges with 90 opening angles, composed of two of these edges. The dielectric material parameters have been extracted from transmission measurements. The refractive index is 1.4 at both frequencies, whereas the absorption coefficient amounts to 0.75 cm at 60 GHz and 2.8 cm at 300 GHz. Thirdly, a metal cylinder with a circular base (radius mm) and a height of 250 mm has been measured. All measurements can be reduced to a planar problem due to the invariant shape of the objects in z-dimension. In addition, objects are illuminated in a way that the antenna footprint does not excite diffraction over the object. TX and RX are always in a horizontal plane and hence the polarization of the radiated waves will not change during propagation. Fig. 3 depicts the results of the diffraction measurements and the comparison with the UTD for the angular dependent diffraction. The angular range is limited to , because only here the influence of diffraction is significant. Figs. 3(a) and (b) illustrate the metal edge measurements. In the shadow region the loss characteristics correspond to the diffracted field only, because a transmitted signal does not exist . As expected, the loss characteristic is steeper at 300 GHz. Furthermore, it is higher for vertical polarization. In the lit region, a general increase of losses due to the filtering of the direct path by the antenna pattern is observed as the RX remains fixed. The oscillations are caused by interference between and . Here, no direct comparison between the frequencies is possible, due to the steeper decay at 300 GHz caused by the extremely narrow beam of the PE lens. Especially at 300 GHz, the measurement resolution in the lit region is not high enough to reproduce the oscillations. However, the general

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Fig. 3. Comparison of angular dependent diffraction measurements and UTD modeling, (a) Metal edge, 60 GHz, (b) Metal edge, 300 GHz, (c) Wood edge, 60 GHz, (d) Metal wedge, 60 GHz, (e) Metal wedge, 300 GHz, (f) Metal cylinder, 300 GHz.

trend of the measurement agrees well with the prediction in all cases. In addition, it is noteworthy that the typical amplitude rise has its maximum at a lower angle compared to 60 GHz, which is a proof for the expected narrower diffraction characteristics at 300 GHz. Regarding the wooden edge (Fig. 3(c)), the characteristic in the lit region is in principle equal to the characteristic of the metal edge. It is steeper only close to . In contrast to the metal edge, the behavior in the shadow region is almost identical to that in the lit region, because here the diffracted field interferes with the transmitted field, which is not present in the metal case. The transmission power losses of the wooden board only amount to about 3 dB and hence are much lower than the diffraction losses. Nevertheless, the total loss increases with more negative angles due to the attenuation by the antenna. The agreement between measurement and model is very good around , however, for larger absolute angles the measurement resolution is not high enough to reproduce the oscillations. There, the exact location of the oscillation minima and maxima strongly depends on a perfect knowledge of the dielectric properties of the wood. Deviations between measurement and model can be caused by unavoidable, small inaccuracies during the determination of these properties. Considering the results of the metal wedge measurements (Figs. 3(d),(e)), the main difference compared to the metal edge is that the losses for horizontal polarization are lower and the losses for vertical polarization are higher in the shadow region. In the lit region the characteristics are quasi-identical.

In Fig. 3(f) the diffraction loss for the metallic cylinder is shown for 300 GHz. It can be clearly recognized that the characteristic is much steeper in the shadow region than for the edge or the wedge. The loss already amounts to almost 40 dB at an angle of . On the other hand, the losses are lower than for the wedge/edge in the lit region, because here the field is mostly composed of reflected contributions. Again, the agreement between measurement and UTD is very good. Fig. 4 shows the comparison between measurements of the metal and the wooden wedge at 300 GHz for vertical polarization. For angles larger both characteristics are identical. At smaller angles, the losses of the wooden wedge are always lower than for the metal wedge. Here the transmitted field dominates, because the penetration loss of the wooden wedge amounts to only about 22 dB. The comparison shows that the only significant difference between the dielectric material and the conducting metal is not the diffraction itself but the influence of the signal propagating through the wedge. B. Translation Stage Measurements In the second setup, both the TX and the RX are kept fixed. The measurement object is positioned on a translation stage and moved in x-direction in steps of 1 mm (see Fig. 5). The measurements were taken for single frequencies of 60 and 300 GHz. In both cases, only the SGHs have been used as transmitting and receiving antennas. The unobstructed case always serves as a reference. Closed objects have been used, namely the cylinder

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region, where the components have a similar magnitude and experience similar antenna gains, interference of both parts causes oscillations. Figs. 6(a)–(c) depict the results for the copper cuboid. In addition to the UTD, here the KED results are also shown. In the lit region, the loss oscillates around 0 dB whereas it decreases in the shadow region. As expected, the losses amount to 6 dB at in any case. Comparing the horizontal and vertical polarization, only small differences can be recognized, which is also expected in the case of metallic objects. The interference between and is clearly visible in the shadow region for both polarizations. Although the measured objects are not edge-shaped, KED and measurements are also in good agreement. The RMS modeling error is about 1.7 dB compared to 0.8 dB for the UTD. This shows that even this simple model provides a sufficient and pragmatic solution for commonly encountered diffraction problems. In the 300 GHz measurements, again, the steeper characteristics as well as the higher number of oscillations in both regions must be emphasized. The same holds true for the metal cylinder measurements (Figs. 6(d) and (e)). Compared to the cuboid only slight differences can be recognized. Measurements and UTD again agree well, except for cases in the deep shadow region where the theory overestimates the diffraction losses.

Fig. 4. Comparison of the metal and the wooden wedge at 300 GHz.

C. Diffraction at Moving Persons

Fig. 5. Translation stage measurement setup (setup 2).

mentioned above and a metallic cuboid with quadratic cross section (80 80 mm ). In this setup, the interference between diffracted field components around both sides of the object is of special interest. As TX and RX are kept fixed and the objects are moved, the total field must be calculated in a different way than for the first setup. On the one hand, the field component is constant, on the other hand we are dealing with closed objects here. In the lit region, the total field is modeled according to

(4) where are the diffracted field components around both sides of the object (see Fig. 5), weighted by the corresponding antenna gain values and . The individual terms and are calculated assuming two single edges or wedges, whereas the cylinder UTD already accounts for both components. It is noteworthy to mention that here only metal objects are analyzed and hence in the shadow region. The results for the longitudinal movement of the objects are shown in Fig. 6. Again, the range is limited to the relevant area from cm to cm. For symmetry reasons, the characteristics are mirrored at smaller -values. Due to the relatively narrow antenna pattern, mostly one of the diffracted field components or dominates. The other component is suppressed by the antenna diagram. Only in the deep shadow

The intention of the third setup was to measure the shadowing caused by human bodies. Due to the high attenuation, human-induced shadowing events may have a significant influence on the link quality of mm-and sub-mm wave communication systems. Analogous to the second setup, a person crosses the link between TX and RX, whereas here the time-dependent losses at single frequencies of 60 GHz and 300 GHz have been measured. The temporal resolution was 20.1 ms, the distances between TX and RX were chosen to 2.7 meters at 60 GHz and 1.0 m at 300 GHz. Both test heads were positioned at the same height of 1.10 m. Two exemplary shadowing events are shown in Fig. 7. In addition to the measurements, here double knife edge theory taking into account the antenna diagrams according to (4) is shown. According to this theory, a person is modeled by two knife edges at the front and at the back of the body. This approach has been proven to be sufficient to model the human blockage at different frequencies before [4], [17]. A person length of 0.31 m is assumed, while the walking speeds have been determined to be 1.2 m/s for Fig. 7(a) and 0.9 m/s for Fig. 7(b) from the duration of the shadowing events. In case of the 60 GHz measurements, a good agreement between model and measurement values could be achieved. Only in the deep shadow region the temporal measurement resolution was not high enough to reproduce the expected oscillations. At 300 GHz, the event generally shows higher losses and a steeper increase and decrease of the attenuation. The deviation between measurement and theory in the shadowing can be explained by an insufficient dynamic range of the measurement system. Nevertheless, our measurements have proven that the double knife edge approach is also suitable for 300 GHz. A more detailed analysis of measured human induced shadowing events at 60 GHz can be found in [21].

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Fig. 6. Comparison of diffraction measurements and modeling of metal objects, (a) Metal cuboid (HH), 60 GHz, (b) Metal cuboid (VV), 60 GHz, (c) Metal cuboid (HH), 300 GHz, (d) Metal cylinder (VV), 60 GHz, (e) Metal cylinder (VV), 300 GHz.

Based on the validated diffraction theories, we now apply the models in ray tracing simulations. IV. RAY TRACING SIMULATIONS Ultra broadband transmission channels in mm and sub-mm bands may be affected seriously by diffraction effects from various kinds of objects or persons. In order to assess the impact of diffraction on transmission channels for 60 and 300 GHz communication systems, propagation investigations are performed within a realistic indoor environment. For the propagation simulations, an in-house developed and validated ray tracing tool [22] is employed. It accounts for up to third order reflections as well as up to second order scattering [23] and is fully polarimetric [24]. Results are evaluated in terms of coverage maps, the average path loss (PL) and the temporal channel characteristics. Both, the influence of various objects as well as of persons is considered. A. The Investigated Realistic Office Scenario Generally, diffraction occurs at all kinds of discontinuities, which exist manifold in indoor environments. Most typical forms are either sharp edges like open doors, shelves and screens or rectangular shapes like e.g., corners, boxes and cupboards. Such objects can be modeled appropriately as edges or wedges with the help of the UTD. Due to the complexity of the UTD, only the most relevant objects ought to be considered in propagation simulations to

minimize the required computational time. This applies especially to scenarios where multiple diffraction or combined propagation phenomena like reflections to diffraction, diffraction to scattering etc. shall be accounted for. However, the relevance of diffraction at particular objects can generally not be known a priori but must be evaluated under realistic conditions. For that purpose, an office scenario has been designed as shown in Fig. 8 in top view with either an edge in the first (Fig. 8(a)) or a wedge in the second setup (Fig. 8(b)). The room has the dimensions 5 m 2.75 m 2.5 m. It features two wooden tables as workspaces, both with a height of 0.7 m. All walls and the ceiling consist of slightly rough plaster. Corresponding dielectric and statistical surface parameters can be found in our previous work [25]. Representing a wireless LAN access point, the transmitter is fixed in the upper left corner at m, m, m, whereas a nomadic device like a laptop is assumed as receiver at m at positions equally distributed in the whole room. In order to clearly and isolatedly detect critical areas where diffraction cannot be neglected, only first order diffraction at one major diffracting object is included. In the first setup, a screen separating the workspaces acts as an edge. A further wall is introduced in the second setup, creating a wedge. The screen is indicated by the solid line at m between m and 1.5 m, whereas the wedge additionally consists of a second part between m and 2.5 m at m. For evaluations later on, an individual RX position as well as a point trajectory are introduced for discussion in the Subsections IV-C and IV-D. All remaining dimensions can be obtained from Fig. 8, which is true to scale.

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Fig. 8. Scheme of the office scenario in top view, (a) Setup 1: screen, (b) Setup 2: wedge.

Fig. 7. Comparison of measured human induced shadowing events and the double knife edge model, (a) 60 GHz, (b) 300 GHz.

In contrast to the measurement section, ideal omnidirectional antennas at both transmitter and receiver are assumed in the following to avoid the suppression of any relevant multipath components and obtain results for the maximum multipath propagation. Regarding the polarization, the highest impact of diffraction is to be expected when least power is reflected. Accordingly, linear horizontal polarization is chosen, corresponding to TM reflections at the walls. Moreover, the power diffracted at the object is highest for that particular polarization (cf. the previous section), so that the upper limit of the diffraction impact can be determined. B. Coverage Investigations Coverage simulations are carried out for 5500 receiver positions at m and m with a step size of m. For the wedge setup, the lower left area, simultaneously meaning the area within the wedge, is of minor interest and remains disregarded in all further evaluations. Small scale fading effects caused by reflections and scattering must be eliminated in order to isolate and identify the diffraction impact. This is done on a power basis by a power addition of all received rays in the following. The upper row of Fig. 9 shows the results of the path loss for the screen at 60 GHz, the screen at 300 GHz and the partition at 300 GHz (left to right). Ideal conductivity is assumed for the edge and wedge material. Please note that the impact of dielectric material parameters will be discussed later using the example of wood. At 60 GHz, the path loss under LOS conditions ranges between approximately 69 dB directly under the transmitter and 81

dB in the right part of the room. Higher free space and reflection losses lead about 13 dB higher to path losses at 300 GHz. Under NLOS conditions, path losses of around 90 and 106 dB occur for 60 and 300 GHz, respectively. For both frequencies, the reflection shadow boundary of the edge can be spotted in the lower left part of the room. Furthermore, several boundaries can be noticed within the NLOS area, which result from the shadowing of individual reflected paths. Compared to the screen, the partition leads to a slightly increased received power in the upper left region of the room due to the reflections at the upper face of the wedge. Apart from that, no significant change of the path loss appears. The relative contribution of the diffracted power to the total received power is demonstrated in the lower row of Fig. 9. Regardless of the frequency and the object, the highest relative diffracted power values occur in the NLOS area and along the incident and reflection shadow boundaries (ISB)/(RSB). These lines describe the borders between the regions where the LOS ray or the ray reflected at the obstacle cannot be received and where their reception is possible according to geometrical optics. For the edge at 60 GHz, the diffracted power ranges between 10 and 20 dB below the total power in the shadow region aside the ISB, whereas it dominates on the ISB. Apart from the reflection shadow boundary, hardly any diffraction contribution is found under LOS conditions with relative power values of dB and less. Due to the shorter wavelength, considerably lower power is diffracted into the shadow region at 300 GHz. There, the minimum values of the relative diffracted power range down to dB. Moreover, the width of the band with a non-negligible diffracted power on both sides of the ISB becomes slightly lower. A similar behavior qualitatively also holds for the wedge. As a difference, the upper left area is clearly dominated by the direct and the reflected rays. Obviously, diffraction has a relevant contribution close to the ISB, only. Further quantitative evaluations are required, especially

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Fig. 9. Coverage maps for different diffracting objects at 60 and 300 GHz. The TX position is marked by the blue spot, the black lines indicate the screen or the wedge. Upper row: total path loss; lower row: diffracted power relative to the overall received power, (a) Metal edge, 60 GHz, (b) Metal edge, 300 GHz, (c) Metal wedge, 300 GHz, (d) Metal edge, 60 GHz, (e) Metal edge, 300 GHz, (f) Metal wedge, 300 GHz.

under consideration of other materials and with regard to the temporal channel characteristics, which is discussed in the following. Cumulative distribution functions (CDFs) of the path losses occurring in the wedge scenario are given in Fig. 10(a) and (b) separately for LOS and NLOS conditions, respectively. Under LOS conditions, virtually no difference between the curves with and without diffraction can be noticed. The shift of the CDFs for 60 and 300 GHz just relates to the difference of the free space losses. In consequence, diffraction can obviously be neglected regardless of the frequency for the LOS case so that we only focus on the NLOS area in the following. There, the curves mostly agree apart from the lowest path losses, which correspond to the non-negligible diffraction contribution along the ISB. Slightly higher differences can be noticed for 60 GHz due to the higher diffracted power. In that region, the overall propagation loss might be overestimated if applying propagation modeling without diffraction. In the next step, the influence of the material and the object shape is quantified in terms of the differences between the path loss without and with diffraction. is demonstrated for the metal and a wood edge as well as for the metal and a wood wedge at 300 GHz under NLOS conditions in Fig. 10(c). Identical material parameters of the wood are assumed compared to Section III. Least deviations are observed for the wood edge. The reason is that, unlike for metal, also a significant transmission contribution with a penetration loss of around 10 to 15 dB occurs. For the wood wedge, twice the transmission losses of the wood edge and less reflected power at the upper part of the partition cause the highest path loss difference. Both, the metal edge and metal wedge behave similarly with the curves being

found in between those of the wood edge and wood wedge. Remarkably, the path loss error only amounts to less than 1 dB with a probability of at least 90%, if no diffracted rays are considered. Apart from the influence on the path loss, diffraction may also induce an increased multipath propagation and hence seriously affect the temporal channel characteristics. An appropriate measure for the temporal channel dispersion is provided by the RMS delay spread [8], which is evaluated exemplarily for the metal edge in Fig. 10(d). Realistic temporal system resolutions of 0.46 ns and 0.1 ns have been used for the computation of the RMS delay spread at 60 GHz and at 300 GHz, respectively. Those parameters correspond to system bandwidths of 2.16 and 10 GHz. Because of higher reflection losses, delay spreads up to 1.5 ns lower can be observed at 300 GHz compared to 60 GHz. Whereas diffraction remains without any higher impact at 300 GHz, the delay spread increases by up to 0.5 ns at 60 GHz caused by diffraction. Due to the high delay difference of the diffracted ray compared to the reflected paths, the relevance of diffraction for the RMS delay spread is higher than the relevance for the path loss. Regarding the material and the object type as evaluated in Fig. 10(e), a considerable difference between metal and wood becomes obvious. Far lower delay spreads occur for wood compared to metal. On the other hand, the form of the object is of minor importance. However, this behavior cannot be traced back to diffraction effects, but must be explained with transmission. Remarkably, the transmitted ray only experiences a transmission attenuation of about 2.75 dB for orthogonal incidence at 60 GHz, so that it dominates both the received power as well as temporal channel characteristics.

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Fig. 10. Cumulative distribution functions of the path loss and the RMS delay spread under LOS and NLOS conditions for different frequencies and objects, (a) Path loss, LOS, metal wedge, (b) Path loss, NLOS, metal wedge, (c) Difference of the path loss without and with diffraction, NLOS, 300 GHz, (d) RMS delay spread, NLOS, metal edge, (e) RMS delay spread, NLOS, 60 GHz.

Fig. 11. Impact of the diffraction evaluated in terms of the path loss, the diffraction contribution to the overall received power and the RMS delay spread along the trajectory, (a) Path loss, wood edge, (b) Relative diffraction contribution, edge, (c) RMS delay spread, metal edge.

C. Impact of Diffraction Along a Point Trajectory As it has been demonstrated, the region close to the ISB is of major importance for the diffraction impact. Accordingly, we additionally perform ray tracing along a point trajectory (cf. Subsection IV-A and Fig. 8) with a high spatial resolution of 1 mm in order to gain further insight into the path loss and the RMS delay spread behavior across the ISB. The first part of Fig. 11 shows the path loss curve for the wood edge along the trajectory at m for m. In the LOS part, the path loss difference between the two frequencies is dominated by the different free space losses. A rather smooth transition is achieved with diffraction in contrast to a sharp step without. At m, a clear separation between LOS and NLOS conditions can be spotted with a jump of the PL at the

ISB. It is worth mentioning that a far sharper increase of the PL occurs at the ISB for 300 GHz than for 60 GHz, which is due to the different penetration losses of the edge. The dependence on the material is additionally visualized for the edge in Fig. 11(b) in terms of the received diffracted power with reference to the total received power. As expected, the relative diffraction impact is highest at the ISB and decreases rapidly to both sides of the ISB. Most power is diffracted at 60 GHz and has the highest relative contribution under NLOS conditions without transmission, i.e., for the metal edge. In this case, the relative diffracted power drops below dB within a range of 4 cm at 60 GHz and 2 cm at 300 GHz starting from a maximum of dB. Under LOS conditions, a drop down to dB takes place even within 1 mm. In consequence, the higher resolution of the trajectory reveals that diffraction can basically

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be neglected everywhere in the room apart from a narrow strip of a few cm along the ISB on the NLOS side. However, the RMS delay spread may still be affected as visualized in Fig. 11(c). In order to avoid any transmission influence, the metal edge has been chosen exemplarily. Analog to the relative diffracted power, an increase of the RMS delay spread is observed towards the ISB. There, the deviations of the delay spreads amount to up to 1.4 ns. In the LOS region, the RMS delay spread behaves similarly for both frequencies regardless of whether diffraction is respected or not. In summary, the implication of the results on ultra broadband communication systems is twofold. On the one hand, diffracted rays slightly increase the relative received power. This leads to higher signal-to-noise ratios and hence allows for higher data rates and more robust connections especially in the NLOS area close to the shadow boundary. On the other hand, a stronger multipath propagation is induced, so that the small-scale fading behavior of the indoor channels may be deteriorated. Moreover, a severe pulse broadening may limit the achievable symbol rates due to intersymbol interference. Against those effects, the most promising countermeasure is spatial filtering and suppression of individual multipath components with the help of highly directive (smart) antennas. High antenna directivities without beamsteering, however, only are feasible in static setups and cannot compensate for dynamic ray shadowing by persons, which is discussed concludingly in the following. D. Persons LOS connections are likely to temporarily fail in indoor scenarios due to shadowing caused by human movement. In order to demonstrate the drop of the received signal for a person walking through the direct ray path, an exemplary receiver position is chosen at with m, m, m (cf. Fig. 8). The person starts at m and m with a walking speed of 0.7 m/s in direction. It is modeled with two knife edges at the front and the back as discussed in the previous Subsection III. Please note that all received rays are now added coherently in contrast to the coverage simulations. A person length of 15 cm is assumed. It is worth mentioning that not only the direct, but also any other reflected or scattered ray is treated according to the double knife edge model in case of obstruction by the person. As can be seen in Fig. 12(a), the person begins to shadow the direct path after approximately 0.4 s. Within the deep shadowing between and 0.48 s, a drop of the LOS power by at least 20 and 30 dB occurs for 60 and 300 GHz, respectively. Furthermore, a faster and sharper rise of the path loss can be observed in case of 300 GHz compared to 60 GHz. In contrast to the LOS power diffracted around the person, the jump of the overall path loss is mitigated by the power received from reflected rays. Even in the deep shadowing region of the LOS path, the power drops by only at maximum 12 and 14 dB, respectively. Please that the interference of the direct and the diffracted rays can be observed before and after the shadowing. Finally, we exemplarily assess the performance deterioration of a hypothetical communication system caused by the shadowing event. The system is assumed to transmit data without forward error correction (FEC) at a rate of 4 Gbit/s employing a

Fig. 12. Path loss and bit error rate at the position with m, m, m for a person walking through the direct ray path, (a) Time-dependent path loss, (b) Bit error rate.

QPSK modulation. A realistic transmit power of 40 dBm EIRP is used in accordance with the European spectrum regulations [26]. For a better comparability, the same EIRP is also adopted at 300 GHz. At each point of time, the Rician -factors and the received power values are evaluated based on the ray tracing results. From BER functions [27], a BER curve is obtained on the assumption of a Rician fading channel as shown in Fig. 12(b). Like before, omnidirectional antennas are employed to gain an estimate of the maximum multipath-induced fading impact and hence also of the worst-case bit error rate (BER) performance. Dependent on the system concept, a better performance may be achieved with the help of steerable antennas. However, such considerations are beyond the scope of this paper, so that the inclined reader shall be referred to our further work [28]. Apart from the shadowing region, rather constant and acceptably low BERs of around and are determined for 60 and 300 GHz, respectively. During shadowing, the rising path losses simultaneously induce a considerable increase of the BER to about and , most likely causing a failure of the communication link at least at 300 GHz. Still, efficient FEC coding schemes may help to sustain the data transmission despite the BER rise. Remarkably, the BER decreases again between and 0.49 s, which is due to one strong reflected multipath component being shadowed, leading to a higher -factor. Please note that, in contrast to Fig. 12(a), the BER curves for the LOS ray have been omitted in Fig. 12(b). This has been done as any data transmission on the direct path

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only would be effectively hindered by the severe increase of the propagation losses anyway, which even lead to a BER close to 0.5 for 300 GHz. In summary, the performance of the communication system is obviously not only severely impaired by the mere path loss, but also by the multipath impact. Here, smart antennas can provide both an additional gain and spatial filtering, so that a connection loss might be preventable. V. CONCLUSION Measurement and ray tracing based investigations of the diffraction in 60 and 300 GHz propagation channels have been presented with regard to current and future communication systems operated in mm and sub-mm wave bands. Diffraction at an edge, at a wedge and at a cylinder has been measured. Those shapes are representative for typical objects in indoor environments like screens or corners. Both, angular-dependent measurements as well as measurements with the objects moving through the ray path have been recorded. The results have been compared to simulations according to the knife edge model and the uniform geometrical theory of diffraction under consideration of realistic antenna patterns, where good agreements have been reached. Apart from metal, also wooden objects have been investigated. In the latter case, it has been observed that transmission also has a non-negligible impact and must be considered in addition to diffraction. Furthermore, the ray shadowing by persons has been measured and modeled with the help of diffraction. From the ray tracing performed in an indoor scenario, it can be concluded that diffraction at edges or wedges can be neglected almost everywhere in a room. The sole exception is a few cm wide region close to the incident shadow boundary under NLOS conditions. Only there, diffraction observably influences both the path loss as well as the temporal channel characteristics by at maximum several dB and ns, respectively. Transmission effects may reduce the diffraction impact even further in case of transparent dielectric materials. Regarding the ray shadowing due to human movement, an exemplary shadowing event has been simulated. A person blocking the direct path causes a significant drop of the received power and at the same time leads to a jump in the bit error rates. In consequence, adaptive antenna arrays will be required for mm and sub-mm wave communication systems to ensure reliable data communication also in the presence of moving persons. ACKNOWLEDGMENT The authors would like to thank U. Hellrung and his team from the IfN mechanical workshop for designing and building an excellent measurement setup and Dr. P. Herrero for the HFSS antenna models. REFERENCES [1] IEEE, IEEE Std 802.15.3c-2009 (Amendment to IEEE Std 802.15.32003), Oct. 2009. [2] S. Cherry, “Edholm’s law of bandwidth,” IEEE Spectrum, vol. 41, no. 7, pp. 58–60, 2004. [3] R. Piesiewicz, T. Kleine-Ostmann, N. Krumbholz, D. Mittleman, M. Koch, J. Schoebel, and T. Kürner, “Short-range ultra-broadband terahertz communications: Concepts and perspectives,” IEEE Antennas Propag. Mag., vol. 49, no. 6, pp. 24–39, 2007.

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[4] J. Kunisch and J. Pamp, “Ultra-wideband double vertical knife-edge model for obstruction of a ray by a person,” in Proc. IEEE Int. Conf. Ultra-Wideband (ICUWB), Sep. 2008, vol. 2, pp. 17–20. [5] S. Rao, D. Wilton, and A. Glisson, “Electromagnetic scattering by surfaces of arbitrary shape,” IEEE Trans. Antennas Propag., vol. AP-30, no. 3, pp. 409–418, Mar. 1982. [6] R. Kouyoumjian and P. Pathak, “A uniform geometrical theory of diffraction for an edge in a perfectly conducting surface,” Proc. IEEE, vol. 62, no. 11, pp. 1448–1461, 1974. [7] T. Senior and P. Uslenghi, Electromagnetic and Acoustic Scattering by Simple Shapes (Revised Edition), J. Bowman, T. Senior, and P. Uslenghi, Eds. New York: Hemisphere, 1987, pp. 92–127. [8] R. Vaughan and J. Andersen, Channels, Propagation and Antennas for Mobile Communications. New York: IET, 2003. [9] G. Durgin, “The practical behavior of various edge-diffraction formulas,” IEEE Antennas Propag. Mag., vol. 51, no. 3, pp. 24–35, Mar. 2009. [10] J. Deygout, “Multiple knife-edge diffraction of microwaves,” IEEE Trans. Antennas Propag., vol. AP-14, no. 4, pp. 480–489, Apr. 1966. [11] C. Giovaneli, “An analysis of simplified solutions for multiple knifeedge diffraction,” IEEE Trans. Antennas Propag., vol. AP-32, no. 3, pp. 297–301, Mar. 1984. [12] G. Liang and H. Bertoni, “A new approach to 3-D ray tracing for propagation prediction in cities,” IEEE Trans. Antennas Propag., vol. 46, no. 6, pp. 853–863, Jun. 1998. [13] V. Erceg, A. Rustako, Jr., and R. Roman, “Diffraction around corners and its effects on the microcell coverage area in urban and suburban environments at 900 MHz, 2 GHz, and 4 GHz,” IEEE Trans. Veh. Technol., vol. 43, no. 3, pp. 762–766, Mar. 2002. [14] P. Bernardi, R. Cicchetti, and O. Testa, “An accurate UTD model for the analysis of complex indoor radio environments in microwave WLAN systems,” IEEE Trans. Antennas Propag., vol. 52, no. 6, pp. 1509–1520, Jun. 2004. [15] A. Maltsev, R. Maslermikov, A. Sevastyanov, A. Lomayev, A. Khoryaev, A. Davydov, and V. Ssorin, “Characteristics of indoor millimeter-wave channel at 60 GHz in application to perspective WLAN system,” in Proc. 4th Eur. Conf. Antennas Propag. (EuCAP), Barcelona, Spain, Apr. 2010, pp. 1–5. [16] S. Priebe, C. Jastrow, M. Jacob, T. Kleine-Ostmann, T. Schrader, and T. Kürner, “Channel and propagation measurements at 300 GHz,” IEEE Trans. Antennas Propag., vol. 59, no. 5, pp. 1688–1698, May 2011. [17] M. Jacob, S. Priebe, A. Maltsev, A. Lomayev, V. Erceg, and T. Kürner, “A ray tracing based stochastic human blockage model for the IEEE 802.11ad 60 GHz channel model,” in Proc. 5th Eur. Conf. Antennas Propag. (EuCAP), Rome, Italy, Apr. 2011, pp. 3084–3088. [18] D. McNamara, C. Pistorius, and J. Malherbe, Introduction to the Uniform Geometrical Theory of Diffraction. Norwood, MA: Artech House. [19] P. Pathak, W. Burnside, and R. Marhefka, “A uniform GTD analysis of the diffraction of electromagnetic waves by a smooth convex surface,” IEEE Trans. Antennas Propag., vol. AP-28, no. 5, pp. 631–642, May 1980. [20] W. Burnside and K. Burgener, “High frequency scattering by a thin lossless dielectric slab,” IEEE Trans. Antennas Propag., vol. AP-31, no. 1, pp. 104–110, Jan. 1983. [21] M. Jacob, C. Mbianke, and T. Kürner, “A dynamic 60 GHz radio channel model for system level simulations with MAC protocols for IEEE 802.11ad,” in Proc. 14th Int. Symp. Consum. Electron. (ISCE), Braunschweig, Germany, Jun. 2010, pp. 1–5. [22] S. Priebe, M. Jacob, C. Jastrow, T. Kleine-Ostmann, T. Schrader, and T. Kürner, “A comparison of indoor channel measurements and ray tracing simulations at 300 GHz,” in Proc. 35th Int. Conf. Infrared, Millimeter THz Waves (IRMMW-THz), Rome, Italy, Sep. 2010, pp. 1–2. [23] S. Priebe, M. Jacob, C. Jansen, and T. Kürner, “Non-specular scattering modeling for THz propagation simulations,” in Proc. 5th Eur. Conf. Antennas Propag. (EuCAP), Rome, Italy, Apr. 2011, pp. 1–5. [24] S. Priebe, M. Jacob, and T. Kürner, “Polarization investigation of rough surface scattering for THz propagation modeling,” in Proc. 5th Eur. Conf. Antennas Propag. (EuCAP), Rome, Italy, Apr. 2011, pp. 24–28. [25] C. Jansen, S. Priebe, C. Möller, M. Jacob, H. Dierke, M. Koch, and T. Kürner, “Diffuse scattering from rough surfaces in THz communication channels,” IEEE Trans. Terahertz Sci. Technol., vol. 1, no. 2, pp. 462–472, Feb. 2011. [26] “Electromagnetic Compatibility and Radio Spectrum Matters (ERM); System Reference Document; Technical Characteristics of Multiple Gigabit Wireless Systems in the 60 GHz Range,” Tech. Rep. ETSI DTR/ERM-RM-049 v1.1.1_0.0.5, Apr. 2006.

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[27] M. Simon and M. Alouini, Digital Communication Over Fading Channels, 2nd ed. New York: Wiley, 2005. [28] M. Jacob, A. de Graauw, M. Spella, P. Herrero, S. Priebe, J. Schoebel, and T. Kürner, “Performance evaluation of 60 GHz WLAN antennas under realistic propagation conditions with human shadowing,” in Proc. 30th URSI General Assembly Scientific Symp., 2011, pp. 1–4.

Martin Jacob (S’08) was born in Bielefeld, Germany, in 1982. He received the Dipl.-Ing. degree in electrical engineering from the Technische Universität Braunschweig in 2007. Currently, he is pursuing the Ph.D. degree as a Research Assistant with the Institut für Nachrichtentechnik at Technische Universität Braunschweig. He is the author of more than 30 technical journal and conference papers in the field of system and channel modeling for UWB, GPS, mm-wave and THz systems. His current research interest lies in the field of wireless communication systems at frequencies of 60 GHz and above. His work mainly focuses on channel and propagation modeling as well as propagation measurements. He is a contributor to the IEEE 802.11ad 60 GHz WLAN channel model and has been a member of the COST 2100 and IC1004 initiatives. Mr. Jacob received the 2011 URSI Commission B Young Scientist Award.

Sebastian Priebe was born in Braunschweig, Germany, in 1985. He received the Dipl.-Ing. degree (hons.) in electrical engineering from the Technische Universität Braunschweig, Germany, in 2009. During his studies, he had been awarded a scholarship by the Chair of the TU Braunschweig as well as by the German National Academic Foundation. In his diploma thesis, he investigated propagation mechanisms at THz frequencies. He is currently pursuing the Ph.D. degree in the field of future THz communication systems as a research assistant with the Institut für Nachrichtentechnik at Technische Universität Braunschweig. Apart from his scientific publications in the field of THz communications, Mr. Priebe has contributed to the channel model for IEEE 802.11ad 60 GHz WLANs. Mr. Priebe received the 2011 URSI Commission F Young Scientist Award.

Robert Dickhoff was born in Rubzowsk, Russia, in 1983. He received the diploma degree (FH) in electrical engineering from the Ostfalia, Hochschule für angewandte Wissenschaften, Germany, in 2010. During his diploma thesis, he had worked with vector scanning of a sub-mm wave Gaussian beam profile. After his diploma thesis, he worked at the Physikalisch-Technische Bundesanstalt (PTB) in the Electromagnetic Fields Group.

Thomas Kleine-Ostmann was born in Lemgo, Germany, in 1975. He received the M.Sc. degree in electrical engineering from the Virginia Polytechnic Institute and State University, Blacksburg, in 1999, and the Dipl.-Ing. degree in radio frequency engineering and the Dr.-Ing. degree, both from Technische Universität Braunschweig, Germany, in 2001 and 2005, respectively. He was a Research Assistant with the Ultrafast Optics Group, Joint Institute of the National Institute of Standards and Technology and the University of Colorado, Boulder, and with the Semiconductor Group, Physikalisch-Technische Bundesanstalt, Braunschweig, before he started working on the Ph.D. degree in the field of THz spectroscopy. Since 2006, he has been working as a permanent scientist with the Electromagnetic Fields Group, Physikalisch-Technische Bundesanstalt. Currently, he is working on realization and transfer of the electromagnetic field strength, electromagnetic compatibility, and THz metrology. In 2007, he became head of the Electromagnetic Fields Group. Dr. Kleine-Ostmann is a member of the VDE and the URSI. He received the Kaiser-Friedrich Research Award in 2003 for his work on a continuous-wave THz imaging system.

Thorsten Schrader (M’97) was born in Braunschweig, Germany, in 1967. He received the Dipl.-Ing. and Dr.-Ing. degree in electrical engineering from the Technische Universität Braunschweig, Germany, in 1992 and 1997, respectively. In 1998 he worked for EMC Test Systems LP, in Austin, TX, (now ETS-Lindgren, Cedar Park, TX). In 1999, he joined the Working Group “Highfrequency Measurement Techniques” of Physikalisch-Technische Bundesanstalt (PTB), Braunschweig, Germany. During 2000 he was a member of the Presidential Staff Office at PTB. In 2004, he became the Head of the Working Group “Electromagnetic Fields and Electromagnetic Compatibility”. Since 2005 he has been the Head of the Department “Highfrequency and Fields” and since 2006 he has also responsible for the Working Group “Antenna Measurement Techniques.” His current interest is the metrology for RF quantities in the mm- and sub-mm-wave range. Prof. Schrader is a member of VDE/VDE-GMA, and VDI.

Thomas Kürner (S’91–M’94–SM’01) received the Dipl.-Ing. degree in electrical engineering in 1990 and the Dr.-Ing. degree in 1993 from Universität Karlsruhe, Germany. From 1990 to 1994 he was with the Institut für Höchstfrequenztechnik und Elektronik (IHE), Universität Karlsruhe, working on wave propagation modeling, radio channel characterization and radio network planning. From 1994 to 2003 he was with the radio network planning department at the headquarters of the GSM 1800 and UMTS operator E-Plus Mobilfunk GmbH & Co. KG, Düsseldorf, where he was team manager radio network planning support being responsible for radio network planning tools, algorithms, processes and parameters. Since 2003, he has been a Professor for Mobile Radio Systems at the Institut für Nachrichtentechnik (IfN) at Technische Universität Braunschweig. His working areas are propagation, traffic and mobility models for automatic planning of mobile radio networks, car-to-car communications, self-organizing LTE networks, indoor channel characterization for high-speed short-range systems including future terahertz communication systems as well as multipath propagation in GNSS systems. He has been engaged in several international bodies such as ITU-R SG 3, UMTS Forum Spectrum Aspects Group and COST 231/273/259/2100/IC1004. He has been participant in the European projects IST-MOMENTUM and ICT-SOCRATES. Currently, he is chairing IEEE802.15 IG THz. Prof. Kürner served as Vice-Chair Propagation at the European Conference on Antennas and Propagation (EuCAP) in 2007 and 2009 and has been Associate Editor of IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY since 2008. He is a member of VDE/ITG and VDI.

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Millimeter-Wave Technology for Automotive Radar Sensors in the 77 GHz Frequency Band Jürgen Hasch, Member, IEEE, Eray Topak, Raik Schnabel, Thomas Zwick, Member, IEEE, Robert Weigel, Fellow, IEEE, and Christian Waldschmidt

Abstract—The market for driver assistance systems based on millimeter-wave radar sensor technology is gaining momentum. In the near future, the full range of newly introduced car models will be equipped with radar based systems which leads to high volume production with low cost potential. This paper provides background and an overview of the state of the art of millimeterwave technology for automotive radar applications, including two actual silicon based fully integrated radar chips. Several advanced packaging concepts and antenna systems are presented and discussed in detail. Finally measurement results of the fully integrated radar front ends are shown. Index Terms—Automotive radar, millimeterwave silicon RFICs, packaging and interconnects, radar transceivers, antenna systems.

I. INTRODUCTION

M

AKING driving on the streets more safe and convenient has been one of the key promises for any new car generation in the last three decades. The goal is to relieve the driver from the combination of monotonic tasks and split-second decisions within complex traffic scenarios to improve safety and comfort. This functionality is nowadays called driver assistance system. Table I shows a simple classification of different types of driver assistance systems. Passive driver assistance systems do not influence the vehicle motion itself, they only act on a certain scenario. Active systems however can directly influence vehicle dynamics, for example accelerating or decelerating. Driver assistance systems require sensors that can recognize the traffic scenario around the vehicle. In order to realize these kind of driver assistance systems, sensors to recognize the traffic scenario around the own vehicle are required. Different sensor technologies such as radar, lidar, video or PMD can be used for this purpose [1], [2]. Radar can measure radial distance and velocity of remote objects very precisely. Using more than one receive or transmit Manuscript received July 01, 2011; revised November 08, 2011; accepted November 17, 2011. Date of publication January 10, 2012; date of current version March 02, 2012. This work was supported in part by the German Federal Ministry of Education and Research (BMBF) under contract 13N9820-13N9824 Radar on Chip for Cars (RoCC). J. Hasch and E. Topak are with Robert Bosch GmbH, Corporate Sector Research and Advance Engineering, 70049 Stuttgart, Germany (e-mail: [email protected]). R. Schnabel and C. Waldschmidt are with Robert Bosch GmbH, Chassis Systems Control, 71226 Leonberg, Germany. T. Zwick is with Institut für Hochfrequenztechnik und Elektronik, Karlsruhe Institute of Technology (KIT), 76131 Karlsruhe, Germany. R. Weigel is with Lehrstuhl für Technische Elektronik, University of Erlangen-Nürnberg, 91058 Erlangen, Germany. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2178427

TABLE I TYPES OF DRIVER ASSISTANCE SYSTEMS

channel, additional angular information can be obtained. It is also robust against environmental influences such as extreme temperatures, bad light or weather conditions. Due to these reasons, radar has been identified as the most promising technology for a number of driver assistance functions [3], [4]. Additionally, different sensing technologies can be combined together using sensor data fusion to improve the overall accuracy, reliability and flexibility of the system [5]. The paper is organized as follows. Section II first gives some background information. The selection of the 77 GHz frequency band is explained and the current frequency regulation status is given. Then, the present state of the art of commercially available automotive radar sensors at 77 GHz is described using three different commercial sensors as examples. In Section III, different application scenarios for driver assistance are introduced, each having their own requirements for the radar sensor. System parameters for three exemplary radar sensors types are given, in order to give an impression of the typical technical requirements for such sensors. Section IV goes into more detail for the millimeter-wave frontend part of the radar sensor. It provides a description of current active components, including, the motivation behind the move to SiGe silicon semiconductor technology for the next generation of radar sensors. Different packaging concepts for millimeter-wave circuits will be shown, giving an overview of new technologies that have the potential to be used in the next generation of sensors. Section IV.C will then give an overview of antenna systems for automotive radar sensors and provides an outlook in what direction antenna systems for automotive radar sensors might evolve. Finally, Section V presents three examples of realized radar sensors, showing actual realizations of the concepts introduced in the previous chapters. II. BACKGROUND The first reported usage of millimeter-wave based radar technology in the automobile was in the early 1970s. A number of companies and research institutes started to look into the

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promise of a distance radar that could avoid collisions. First applications were devised and prototypes were built. However until 1999, due to the integration-unfriendly technology at the time, large size and high cost, no product ever made it into the market. Finally, the first generation of automotive radar sensors in the 77 GHz band became available in 1998 with the introduction of the so called Distronic as an option in the Daimler S class. Other companies such as Jaguar, Nissan and BMW followed in the coming years [6]. By 2003, most major car manufactures offered a radar system in their upper class segments. The application was a comfort function, where the radar sensor measures the speed and distance of the vehicle in front and automatically regulates the distance (ACC—adaptive cruise control). Since then, several new generations of automotive radar sensors have become available from a number of manufacturers. Today’s radar-based driver assistance systems have become available even for middle class cars. Accelerating this trend, a rapidly growing number of radar sensors are integrated into new vehicles, to allow driver assistance functions for comfort and safety enhancement [7]. A. Frequency Band Selection Two different frequency bands are predominantly used for automotive radar: the 24 GHz and 77 GHz bands. Other frequencies (e.g., below 10 GHz or above 100 GHz) have also been investigated, however currently play no practical role. Naturally, there is an ongoing competition in the choice between the two frequency bands. From an engineering point of view, 77 GHz is more challenging than 24 GHz. On the other hand, the 77 GHz bands offers more opportunities to realize higher-performance sensors. An exhaustive comparison between the 24 GHz and 77 GHz band would go beyond the scope of this paper, so only a few key issues are highlighted here. One key feature for a flexible integration of sensors into vehicles is the sensor size. The size of an automotive radar sensor is determined by the antenna aperture. Operation at 77 GHz allows a small antenna size for a given beamwidth requirement and enables good angular resolution for a small sensor size. Sensors at 24 GHz require an about three times larger aperture to achieve the same performance. For a 50 50 mm antenna aperture, using the Rayleigh criterion as shown in Section III.B with mm, results in a angular separability of 17.5 at 24 GHz and 5.4 at 77 GHz. A separability of a few degrees is required for almost all mid and long range functions. Another advantage of the 77 GHz band is that in the future short-range sensors with high spatial resolution will be introduced, having an absolute bandwidth of up to 4 GHz. This translates to a relative bandwidth of only about 5% at 77 GHz compared to nearly 17% at 24 GHz. This makes the design of antennas and wavelength dependent components much easier. dBm/ Also, the combination of high transmit power ( MHz) is not allowed at 24 MHz) and high bandwidth ( GHz. This combination is available at 77 GHz, allowing long range operation and high distance separability at the same time. Taking into account the recent advances in semiconductor, packaging and PCB technology, the manufacturing costs can be seen as on par between the two frequency bands. At 24 GHz, a better performance (power consumption, noise figure, performance margins) with the same technology node or usage of a different (and lower cost) technology node is possible. On the

TABLE II CURRENT REGULATION STATUS

other side, the sensor at 77 GHz will typically be much smaller, reducing volume- and weight-related costs. One widely expressed concern for 77 GHz sensors is behind-bumper integration. However, solutions to this have been investigated [8] and are thought to be feasible. B. Frequency Regulation The operation parameters of radar sensors are not only determined by technical requirements alone. Another deciding factor is frequency regulation, governed by regulatory bodies such as the FCC in the US and CEPT in Europe. Each country can have its own regulation, sometimes conflicting with other—even neighboring—countries. Regulation is subject to constant changes, therefore only a brief overview is given. For the operation of automotive radar sensors in the millimeter-waves, two frequency bands have emerged. One is the band from 76–77 GHz, which is available nearly worldwide. The second band is the directly neighboring band from 77–81 GHz, which has been introduced in Europe to replace ultrawideband (UWB) automotive radar sensors in the 24 GHz band. It provides a larger bandwidth of 4 GHz instead of 1 GHz, however at reduced maximum transmit power compared to the 76–77 GHz band. Table II shows the current regulatory status for the two frequency bands in a number of different countries. Both frequency bands are currently only available in the EU and countries associated in CEPT. dBm In the 76–77 GHz band, the peak transmit power is EIRP, subject to some restrictions for average power or scanning antenna systems [9]. The limits for spectral power density in the frequency band 77–81 GHz are defined in [9] and are given as dBm/MHz (EIRP) maximum power spectral density, assodBm (EIRP). Additionally, the ciated with a peak limit of maximum mean power density outside a vehicle is limited to dBm/MHz, taking into account the additional attenuation due to mounting the sensor behind a painted bumper. In the US, the emission limits in the frequency band 76–77 GHz are dependent on several factors (e.g., if the vehicle is moving or not). It is planned however, to harmonize the regulation with power limits similar to Europe [10]. C. Sensors on the Market Due to the still advancing evolution of the driver assistance market and the complexity of development, there is a significant variety of implementations for automotive radar sensors in the 77 GHz band, arising from quite unique technical approaches for each manufacturer. In the following section, a brief overview on three sensor concepts that are currently available

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TABLE III COMPARISON OF RADAR SENSORS CURRENTLY ON THE MARKET

on the market will be given with their key performance indicators being illustrated in Table III. Their main differentiating factor is the target angle estimation, resulting in a use of different beam steering techniques. Despite those different approaches, all presented sensors rely on the FMCW modulation technique. The LRR3 sensor by Bosch [11] has been available since 2009. Its most prominent feature is the dielectric lens antenna that provides the high gain to achieve the maximum distance of 250 m. It is the only example in this field not scanning its field of view. To achieve angular information in the azimuthal plane, it uses four patch antennas placed in the focal line of the dielectric lens to create four slightly offset beams. All four antennas are receive antennas with the middle two antennas also simultaneously transmitting. Using phase and amplitude information of all four channels, angular information of detected objects can be determined. The sensor was the first to use SiGe integrated circuits at 77 GHz. The SiGe chip is mounted on a multilayer PCB and wire bonded to an RF substrate on the top side of the PCB. The patch antennas to illuminate the antenna are also placed on the RF substrate. The sensor is described in more detail in Section V.A. The ARS 300 presented by Conti [12] in 2009 mechanically scans the field of view. It uses a grooved rolling spindle to create a narrow scanning antenna beam [13]. By using different patterning of the spindle, the sensor can switch between long and mid range mode, changing its field of view. By pivoting a reflector plate, the antenna can scan in multiple levels of elevation allowing auto-alignment operation. The antenna is fed by a RF module comprising multiple GaAs MMICs for RF generation and a balanced mixer with discrete diodes. Denso’s third generation long range radar [14] was introduced in 2008 and utilizes digital beamforming (DBF) using one transmit antenna and a five switched receive antennas. By serially switching to the different receive antennas, the electronics for only a single receiver channel needs to be implemented. The antenna itself is realized as a slotted waveguide array and uses a three-dimensional waveguide network to distribute the antenna channels to the RF module. The transmitter is realized using four GaAs MMICs and the receiver uses three additional MMICs. The complete RF module is encapsulated in a ceramic package. III. REQUIREMENTS With the growing penetration of driver assistance systems in the market, an increasing list of functions are being addressed based on radar sensors [15], [16]. Such functions include comfort improvements like adaptive cruise control (ACC), where the vehicle supports the driver by automatically adjusting the speed depending on preceding vehicle and even decelerating to a total stop in case of a traffic jam. Additionally, safety-related

Fig. 1. Field of view and distance range for three exemplar functions.

TABLE IV SENSOR CLASSIFICATION

functions begin to appear, supporting the driver in critical situations. Examples are lane change assistant (LCA), watching for traffic when starting overtaking action or cross traffic alert (CTA), warning of approaching vehicles at a junction. Fig. 1 graphically depicts the field of view of the radar sensor for these three example functions. The field of view here is defined as and the angular having a maximum measurement distance . range A. Classification Looking at Fig. 1 it can be easily understood that for each individual function a different sensor specification is needed. This can lead to an intractable number of different radar sensor specifications, each designed to address the appropriate distance range and field of view. To simplify the following technology assessment, only three generic sensor types will be considered here. • LRR—Long Range Radar for applications where a narrow-beam forward-looking view is required, like ACC • MRR—Medium Range Radar for applications with a medium distance and speed profile, like CTA • SRR—Short Range Radar for applications sensing in direct proximity of the vehicle, like obstacle detection and parking aid In Table IV, technical system parameters for these three generic sensor types are given. Fig. 2 depicts the range and angular resolution definition. The is defined as the ability to distinguish berange resolution tween two targets in radial distance, while the angular resolution

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Fig. 2. Range resolution and angular resolution.

defines ability to distinguish two targets by angle. It should for range, for be noted, that the measurement accuracy ( for angle) describes the amount of uncertainty velocity and that exists in the measurement and can be much smaller than the corresponding resolution. One of the main challenges for an automotive radar sensor is the separation of targets with a small radar cross section, such as a motorbike, and targets with a large radar cross section, such as a truck, traveling at nearly the same distance and velocity in adjacent lanes. This discrimination can be achieved by high resolution and dynamic range in at least one of the measurement quantities distance, velocity or angle.

Fig. 3. Measured monostatic RCS of a vehicle.

B. Measurement Quantities A generic bistatic radar system with separate transmit and receive antennas consists of a transmitter with the transmit power and the antenna gain and the receiver with the antenna and the received power from a target with the radar gain cross section . For this basic bistatic scenario, the well-known radar equation illuminating a target in the [17] specifies the power density distance :

Fig. 4. FMCW Modulation. (a) Frequency characteristics, (b) Baseband signal.

(1) For a given radar cross section , the receive power radar receiver can then be calculated to:

at the (2)

denotes the combined losses within the Here, the factor radar sensor. The signal-to-noise ratio can then be calculated as: (3) The noise power in the baseband comes from a number of noise sources, including thermal noise, receiver noise figure, bandwidth, amplitude and phase noise of the oscillators and noise. The threshold for target detection is typically 10 dB. This threshold value has shown to give a low false alarm rate with a good probability of detection. As the receive and transmit antennas are very close to each other, the radar cross section can be approximated as a monostatic radar cross section [18]. Fig. 3 shows the monostatic radar cross section of a car (Mazda 6) measured at 77 GHz [19]. Four maxima can be seen at the four sides of the car, exceeding a dBsm. In a real traffic scenario, a vehicle needs value of to be characterized by more than one single radar cross section. It can be typically characterized as a number of separate scattering centers [20].

For the following discussion of the radar performance parameters, linearly swept frequency modulation (FMCW) is assumed, as shown in Fig. 4. in time In Fig. 4(a) the frequency sweep with duration is depicted. This leads to a baseband signal shown in Fig. 4(b), where a target is mapped to a beat frequency . The beat frequency at the receiver can be calculated to (4) where the velocity difference between the two vehicles of Fig. 2 leads to a doppler frequency (5) In (4), range and velocity are coupled. In order to separate these two quantities for multiple targets, multiple FMCW have to be performed. sweeps with different ramp slopes An important performance criterion is the resolution or separability of speed and distance between two targets. From [21], and velocity resolution can be the distance resolution calculated with (6) (7)

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The accuracy of the measurement is characterized by the measurement error . It is mainly determined by the linearity . Using the signal-toerror and the signal-to-noise ratio noise ratio (S/N), the accuracy can be given as

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TABLE V SIGE PROCESS FOUNDRIES AND IDMS

(8) (9) due to a nonlinear frequency sweep A frequency error [22] leads to a distance error (10) The combined distance measurement accuracy is then (11) Another important measurement quantity is angular information of the target in azimuth and elevation. System concepts to enable angular measurement are discussed in Section IV-C. Here, only the basic requirements for angular resolution and accuracy are discussed. The angular resolution [23] using the Rayleigh criterion can be calculated (12) where is the size of the aperture of the antenna in the direction considered. The angular accuracy can again be given like before, if only the signal-to-noise ratio is considered (13)

IV. MILLIMETER-WAVE FRONTEND The millimeter-wave frontend of an automotive radar sensor still changes quite a lot in each new generation. It is very much technology driven, as new solutions in semiconductor technology, packaging technology and antenna systems become available. For semiconductor technology, higher performance, more integration and lower power consumption are key factors. A. Active Components For the active components of the millimeter-wave frontend, the available semiconductor technology is the key enabler. Higher performance, more integration and lower power consumption at low cost are the key requirements here. 1) Semiconductor Technology Selection: The first commercially available automotive radar sensors in the 77 GHz band that emerged on the market beginning in 1999, typically used GaAs Gunn diodes mounted inside a waveguide cavity, as millimeter-wave signal source and discrete Schottky diodes flipchipped on quartz glass substrate with thin film patterning [6], [24]. Since this first generation of sensors, the available technology has improved and costs have decreased significantly.

Discrete semiconductor components have been replaced by MMIC blocks or even complete transceiver circuits. Mature chip sets in GaAs technology are reported from semiconductor manufacturers UMS [25] and TriQuint [26]. Additionally, a number of radar sensor implementations using GaAs MMIC have been reported in the literature, recent examples are [27], [28], and [29]. However, at 77 GHz, GaAs is on the verge of being replaced in the next generation of products by most manufacturers, as silicon-based SiGe technology has become a viable and cost-effective approach. The RF performance of modern SiGe processes has been demonstrated by a number of research groups [30]–[32] using semiconductor technology from manufacturers such as Freescale [33], TowerJazz [34], ST Microelectronics [35], IBM [36] and Infineon [37]. Infineon and Freescale have complete transceivers using their own flavor of SiGe technology [38], [39]. Infineon’s radar transceiver has been in mass production in the LRR3 radar sensor since 2009 [11]. Table V gives an overview over the currently available SiGe processes available at foundries or independent device manufacturers (IDM). They frequencies of well over 200 GHz for typically provide npn transistors. All provide additional CMOS transistors, which allows easy integration of digital circuitry with the exception of Infineon, which currently has a bipolar-only process. Higher and considerably. At ambient temperatures decrease 125 C a reduction of at least 20% compared to 25 C was found should be at least 2 times the op[40]. According to [41], erating frequency for an amplifier, so the required room-temis 200 GHz at minimum. In [42], the influence of perature temperature on the performance of W-band circuits was investigated in detail. Recently, the first implementations of highly integrated 77 GHz radar transceivers in pure CMOS, using 90 nm and 65 nm nodes, have been published [43]–[45]. They demonstrate the technical feasibility of realizing such a system. However, there are still a number of obstacles to be overcome, until a true automotive grade radar sensor for the applications discussed in this paper, can be realized. From a technical side, achieving the required output power, dynamic range and linearity is still not proven. A good comparison of the differences between SiGe and CMOS can be found in [46]. to Additionally the required temperature range of C ambient especially for the power amplifier still is problematic, as can be seen in [47]. It is even possible, that output power and temperature performance may always be limited, as shown in [48]. Since the main driver to CMOS is integration, it is unclear how a highly integrated radar system can look like. There are

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Fig. 6. Four channel transceiver chip [38]. (a) Block diagram, (b) Chip micrograph.

Fig. 5. Semiconductor performance trends. (a) Trend projected by ITRS for vs collector current for a SiGe bipolar transistor speed and noise figure, (b) transistor.

many very different implementations, and, as shown in [49], the design costs for modern CMOS processes are expected to drastically increase due to complexity of the circuits and the highly advanced design tools required. In the coming years, new high volume applications for radar sensors might emerge, justifying the high one-time costs for developing a CMOS solution [49] while living with the reduced system performance due to the impediments described above. For now, SiGe technology in its BiCMOS flavor is destined to be the mainstream semiconductor technology for automotive millimeter-wave radar in the next years. Fig. 5 tries to give some insight into the future. In Fig. 5(a) the projected ITRS trend [50] for three different semiconductor technologies is shown. It can be seen that for InP, SiGe and CMOS technology the transistor speed will continue to increase rapidly and the noise figure at 77 GHz will decrease further. For a radar sensor, this translates to lower overall noise figure (oscillator phase noise, mixer and LNA noise) and allows a reand duced transmit power. In Fig. 5(b) the evolution for the of a SiGe process is shown [51]. For a required given transistor speed, the biasing current can be greatly reduced, leading to much reduced power consumption. 2) Examples: In this subsection, two millimeter-wave chips are introduced. The first chip shown in Fig. 6 is a four channel radar transceiver implemented in Infineon’s B7HF bipolar SiGe technology and has been presented in [38]. Fig. 6(a) shows the block diagram of the transceiver. It consists of a fundamental

77 GHz VCO with frequency divider stages for frequency stabilization, a four channel receiver with two of the channels operation simultaneously as transmit/receive channel. Each of the transmit channels provides an output power of 7 dBm. The transmit channels can be selected by a simple one-mask change, so different versions of radar sensors can be built with the same basic transceiver. Some key figures of the transceiver is a noise figure of 17.7 dB (23.4 dB for transmit/receive channels) and a receiver gain of 14.2 dB. The input match, important for simultaneous transmit/receive operation, is better than 20 dB for the receive-only and better than 12 dB for transmit/receive channels. The transceiver operates at 5.5 V and has a power consumption of less than 4 W. It is used in the LRR3, which is described in Sections II.C and V-A. The chip size is 3.25 2.1 mm. Two key components for a FMCW radar will be investigated further in the next paragraphs, the mixer and the frequency generation circuit. Mixers play a major part in determining the performance of a radar receiver. Linearity, conversion gain, noise figure and power consumption are the most important parameters. Assuming an output match to off-chip components of 20 dB, dB dB (3 the mixer will receive dB have to be subtracted for the receiver/transmit coupler) the RF input. Close-by objects in close proximity to the antenna could lead to even higher values. This contributes to one of the main problems of an FMCW radar, the DC offset at the output of the mixer. This offset has to be taken into account in the following signal processing stages. Using (2), for an object at 250 m distance with the parameters of a long range radar (LRR) system from Table IV a receive dBm can be calculated. In order to achieve a dypower of namic range in the order of 90 dB or more, the mixer core will typically be biased with a high current. This works against the low-power requirement. The currently dominating mixer architecture is the Gilbert type mixer because it offers a good suppression of unwanted intermodulation products [52]. Usually the Gilbert mixer core is amended by filter circuitry and buffers to provide better port isolation and impedance matching. Recent publications report improved power consumptions figures while retaining the required performance [53].

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Fig. 8. Chip on board wire bonding. (a) Cross section of a PCB with a wire bonded SiGe chip, (b) SiGe transceiver bonded to RF substrate.

Fig. 7. Three channel transmitter chip. (a) Block diagram, (b) Chip micrograph. Fig. 9. Flip chip mounting on substrate. (a) Cross section of flip-chip mount, (b) Photo of mounted chip.

The performance of the frequency source is another key performance figure. The millimeter-wave signal is generated by a fundamental 77 GHz VCO. The linear FMCW modulation is applied off-chip using the integrated frequency divider to drive a PLL circuit. The phase noise of the VCO was measured to dBc/Hz@100 kHz at 25 C. This number is not sufficient for long-range operation, as the noise skirts of the oscillator signal can mask weak signals [54]. In order to improve the phase noise performance, the divided-by-four VCO signal can be mixed down using an additional low-phase noise 19 GHz oscillator [55], rather than divided down to the low-GHz frequency range which is suitable for the PLL circuit. An example of the next generation of circuits is shown in Fig. 7. It shows a three channel transmitter, developed for use in a bistatic radar sensor. It consists of a 77 GHz fundamental VCO, again with attached frequency dividers for frequency stabilization. Also, an additional 18 GHz VCO has been added, to enable the direct down-conversion of the divided-by-4 77 GHz signal instead of using high divider ratios in order to improve phase noise. Each output channel can be individually turned on and is equipped with a power sensor that is able to monitor the transmitted and reflected power and provide them to an external surveillance circuit using an analog multiplexer. An integrated 19 GHz downconverter and two divider chains can be used for PLL operation. A digital control interface allows to configure the chip, e.g., divider ratio settings and output channel power control. Beside its higher functionality the chip is more efficient due to e.g., a lower required supply voltage of 3.3 V, resulting in a power W. The chip size is 3 3 mm. consumption of B. Packaging Another crucial element in a low-cost millimeter-wave frontend is the packaging technology. Traditionally wire-bonding and flip-chip packaging have been used for microwave and millimeter wave transitions to transfer signals off-chip. After a brief review of these two established technologies, new developments will be presented. Important parameters are losses and reflections in the transition from chip to substrate, thermal conductivity to dissipate the heat coming from the active circuits, reliability, flexibility and cost.

1) Chip on Board: Wire bonding is by far the most used technology to connect a semiconductor chip to a printed circuit board. A typical setup is shown in Fig. 8(a). The chip is mounted in a cavity to avoid height differences for the bond wires. To achieve a good heat dissipation, the chip is mounted directly on a thick copper inlay. The top side of the PCB is laminated with a RF substrate to achieve low signal losses and allow the realization of antenna structures. On the bottom side, multilayer FR4 is used and standard electronic components can be mounted. Fig. 8 shows a close-up view of a SiGe transceiver chip mounted on such a PCB board. The millimeter-wave signals are single-ended, therefore an additional ground signal bond wire is placed at each side. At millimeter-wave frequencies, the parasitic electrical properties of the bond wire can severely effect the performance of such a transition. Although an optimized geometry of wire-bond and matching structures can achieve good performance, the wiring tolerances in mass production are significant and can be %. A detailed analysis of this setup was performed in up to dB. Losses can reach [56] and showed reflections of up to up to 2 dB due to mismatch and radiation [57]. Measurements in [58] show a return loss better than 12 dB and insertion loss less than 0.3 dB in the frequency range of DC to 80 GHz. 2) Flip-Chip: As an alternative to wire bonding, flip-chip packaging, as shown in Fig. 9, is also being used. An overview of millimeter-wave flip-chip technology is given in [59]. It can deliver a better RF performance with reduced radiation losses and improved matching. Due to the smaller electrical length and mechanical tolerances, a more consistent performance and more broadband operation can be achieved. Another advantage of flip-chip packaging is the more flexible distribution of contact pads within the chip, allowing a more relaxed placing and routing to off-chip circuitry. An example of the millimeter-wave performance for a flip-chip transition can be found in [60], where an insertion loss less than 0.2 dB and a match better than 20 dB up to 82 GHz was reported. Apart from the required fine line/space requirements for the substrate the chip will be mounted on, detuning due to the close proximity to a substrate or underfiller, the worse thermal contact and the fine line pitch on the substrate can be mentioned.

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Fig. 10. Cross-section drawing of an eWLB package.

For GaAs chips, a concept using hot vias through the bulk of the chip was reported in [25]. This enables better thermal conductivity and reduces the detuning effect, while still retaining the good performance of a flip-chip transition. 3) eWLB Package: An important driver in packaging technology is the “interconnect gap” that characterizes the pitch and pad size for chips shrinking faster than the line/space structure capabilities of PCB technology. Therefore, interposers or redistributing layers have been added to reduce the requirements on PCB technology. This is the basic idea of the eWLB (embedded wafer level BGA) package, which was introduced in 2006 by Infineon for their mobile phone chipsets [61]. Very similar approaches have been developed by other companies and have been in mass production for several years. A cross section drawing of an eWLB package is shown in 10. To use this package for 77 GHz circuits, a number of obstacles had to be overcome. As the chip is now facing the PCB with its active side, the electrical function can be influenced by the PCB and by the solder balls. Solder balls therefore could not be allowed in most areas of the chip and need to be moved to the mold compound area. Also, the heat transfer between the chip and the PCB is now mostly due to the solder balls. , As the mold compound exhibits low losses low-loss coplanar lines can be realized. Measurement results of transmission lines show insertion losses of 0.2 dB/mm at 60 GHz compared to on-chip components and a -factor of up to 39 for spiral inductors [62]. Furthermore, the results of the first fully operational 77 GHz SiGe mixer implemented in an eWLB package show a conversion gain of only 1 dB below on-wafer measurement [63]. Due to different coefficients of thermal expansion (CTE) between chip and mold compound, mechanical stress can occur, leading to warpage. In addition it has been revealed that solder ball fatigue is the dominating failure mode [64], [65] which is related directly to the distance between solder ball and package’s neutral point. The eWLB package also offers compatibility to both side-byside and stacked 3-D layouts by using RDL interconnection as well as through silicon vias (TSV) and through mold vias (TMV) [64], [66], making the package an excellent starting point for future developments. 4) Antenna in Package: All of the packaging solutions presented so far still rely on an additional millimeter-wave low loss substrate to distribute the RF signal to the antenna or to realize the antenna directly on the substrate. Integrating the antenna in the package allows avoiding any transition of the millimeter-wave signal from the package to a PCB board, reducing costs for the PCB significantly. In our approach, the the antenna was realized using the eWLB package introduced in the previous section.

Fig. 11. Photographs of eWLB package and PCB footprint. (a) eWLB package and PCB, (b) close-up view.

Fig. 12. Antenna integrated in eWLB package concept. (a) Cross section drawing, (b) Photo of eWLB bottom side with dipole element.

Fig. 12(a) shows a cross section drawing of package-integrated antenna [67]. The antenna element is realized using the redistribution layer of the package and radiates through the lowloss mold compound. To improve directivity, a metallic patch is added on the PCB below the antenna element, functioning as reflector. In Fig. 12(b), the photo of a realized antenna is shown. The package size is 8 8 mm and contains a differentially fed dipole antenna with a length of about 1.65 mm, realized on the redistribution layer. For testing, a chip is also integrated in the package, the antenna however is fed using a differential transition at the edge of the package. The antenna has a gain of 5 dBi over a in the E-plane and in the half-power beamwidth of H-Plane. More antenna elements can be realized in the package, so group antennas with higher gain or antennas for multiple channels can be realized. However, because of the mechanical properties of the eWLB package described in the previous section, the maximum size of the eWLB severely limits the number of antenna elements. 5) Antenna on Chip: Taking antenna integration even one step further leads to the realization of the antenna directly on the chip. However, the radiation efficiency of an on-chip antenna is typically quite poor, as most of the energy is dissipated in the low-resistivity silicon. Adding a thick dielectric layer on top of the chip [68] or using micromachining techniques ([69]) are the possible solutions to increase the antenna efficiency. These approaches require an additional processing of the complete wafer and are often difficult in handling and processing. Also, due to

HASCH et al.: MILLIMETER-WAVE TECHNOLOGY FOR AUTOMOTIVE RADAR SENSORS

Fig. 13. Antenna on chip transceiver micrographs. (a) Chip without mounted quartz glass resonators, (b) Quartz glass resonators.

material parameter tolerances, they are often not suitable for mass production. As an alternative approach, parasitic resonators can be placed above an on-chip antenna element, leading to a significantly improved antenna performance by coupling the electromagnetic wave from the chip to the resonator [70], [71]. This technique requires no further processing of the silicon wafer and can be easily automated in production using standard packaging equipment. In order to investigate the proposed on-chip antenna concept and verify its performance, the four channel radar transceiver introduced in Section IV-A.2 was used and two on-chip antenna elements were added to the transmit/receive channels. The remaining two receive-only channels are not used. A micrograph of the realized circuit is shown in Fig. 13(a). The on-chip antenna elements are based on shorted quarter-wavelength microstrip lines, formed by the top and bottom metal layers of the backend. The microstrip line acts as a patch antenna with one radiating slot. The resonant frequency of the antenna is mainly determined by the length of the line. Due to the thin substrate between the ground plane and the patch element in the 10 m range, most of the radiation would be dissipated due to conductor and dielectric losses, resulting in a low antenna efficiency of less than 10%. long thin-film metal The parasitic resonator realized as patch on top of a 1.3 0.6 0.25 mm quartz glass. It is positioned directly above the on-chip patch antenna element and drastically improves the antenna efficiency and bandwidth. Fig. 13(b) shows the chip with the quartz glass mounted. distance to allow The two on-chip antennas are spaced at direction of arrival (DOA) estimation of a target detected by the radar or provide two separate antenna beams used for illuminating an additional dielectric lens that will be presented in Section IV-B.5. The antenna pattern and phase difference between the two receive channels for a single target is shown in Fig. 14. The ripple on both graphs is due the influence of the bondwires and reflections in the housing used in the measurement setup. In the setup presented in [70], the radar transceiver chip was glued on an aluminium heatsink and connected to a surrounding high-frequency PCB using gold wire bonds, see Fig. 15(a). An additional 19 GHz DRO downconverter MMIC [55] was used to achieve a good phase noise behavior of the 77 GHz signal. To benefit from a low-cost PCB technology, an SMD realization has been employed using the same transceiver MMIC with

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Fig. 14. Performance of the on-chip antenna. (a) Normalized antenna pattern, (b) Phase difference between the two channels.

Fig. 15. Comparison of SiGe transceiver chip mounting. (a) Bonded in PCB, (b) Mounted in QFN package.

integrated antennas. In this setup, the millimeter-wave transceiver chip was placed together with a new bare die 19 GHz VCO downconverter MMIC [72] into a 7 7 mm open-cavity QFN package as shown in Fig. 15(b). The chip pads were contacted to the QFN package using gold wire bonds. C. Antenna System As described in Section II.C, the antenna system is one of the main differentiating factors of a radar sensor. Based on the standard antenna performance parameters such as gain, input match, bandwidth or the number of channels, it defines the field of view and achievable angular object separation of a radar system. The antenna system therefore not only comprises of the radiating structure, it also defines how the desired properties in the angular domain are achieved. These properties are becoming even more important for the next generation of automotive radar sensors [3]. Four antenna system concepts will be briefly discussed below to motivate further developments in the antenna system domain. 1) Quasi-Optical Beamforming: This beamforming concept uses quasi-optical elements like a dielectric lens to shape the antenna pattern and obtain a fixed field of view. Examples of quasi-optical beamforming antennas are the LRR3 using a dielectric lens antenna [73] (as shown in Section V-A) or a folded reflector antenna [74]. Typically, this approach is used for a long-range operation, where a narrow field of view is required. With this concept, a large antenna aperture at low cost can be achieved, as quasi-optical elements can often be mass produced easily. If more than one antenna feed is used, an offset between

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TABLE VI COMPARISON OF ANTENNA SYSTEM CONCEPTS

Fig. 16. Analog and digital beamforming concepts. (a) Digital beamforming system, (b) Phased array system.

the different feeds allows the generation of simultaneous or sequential multiple beams looking in different directions. However, a wide field of view and a narrow antenna beamwidth are not easy to obtain at the same time [75]. If each antenna feed is connected to an individual receiver channel, parallel data acquisition can be achieved, allowing processing of multiple antenna beams simultaneously. Monopulsing can be used to gather angular information of a detected object using multiple antenna beams [76]. 2) Digital Beamforming (DBF): In this configuration, the beamforming is carried out in the digital baseband. The concept from [77] is shown Fig. 16(a). To achieve a narrow beamwidth and high angular resolution, typically eight or more channels need to be provided. For this large number of channels, there is a significant cost penalty. As one approach to reduce the number of receivers, a switch in the millimeter-wave path can be added, so only one receiver channel is needed [78]. Multipath effects and interfering signals are also processed in the digital baseband, therefore the receiver requires sufficient dynamic ranges to process these interferences. Although DBF systems are mostly used on the receiver side, they can also be implemented on the transmitter side [79], [80]. Since the beamforming is performed in the digital domain, this concept provides a high degree of flexibility. The calibration is also straightforward since all receiver channels are identical and have fixed properties. 3) Analog Beamforming: Analog beamforming refers to the technique where switchable or steerable antenna patterns can be generated directly in the millimeter-wave frontend. Numerous millimeter-wave antenna concepts can be categorized within this beamforming network. The most popular and common ones for analog beamforming are phased arrays with phase shifters [81], [82], as shown in Fig. 16(b). By controlling the phase weights of each phase shifter electronically, the direction and beamwidth of the antenna can be adjusted to a desired value almost instantaneously. This property provides multi-mode ability via beam shape versatility. By providing variable gain for each channel, the sidelobe levels can be kept low. Until the last decade, the use of the phased array concept for the automotive radars was almost impossible due to high cost of millimeter-wave phase shifters. However, improved silicon semiconductor technology allows the integration of multiple channels of phase shifters and variable gain amplifiers on a single chip [83]. Phased arrays can be classified into three different architectures, depending on the location of phase shifters or switches

(RF, IF and LO phase shifting) [83]–[85]. Among these, RF phase shifting is the most common and widely used phased array system, usually used for the military and satellite communication radars [86]. Analog beamforming can have high interference suppression in the analog path. 4) Mechanically Scanned Array: Mechanical scanning is a well-proven approach to achieve high angular resolution while retaining the interference suppression of a narrow beamwidth antenna. The antenna is scanned by a mechanical actuation of the radiation elements or of an additional reflector element in azimuth or elevation. Typically, well-behaved radiation patterns can be obtained over the complete field of view without significant performance degradation. 5) Comparison: Table VI highlights the differences between the four previously described approaches. While a mechanical scanning antenna allows a good coverage of any desired field of view for short- and long-range operation with high suppression of interferers or clutter, however it is typically complex to manufacture and the scanning speed is restricted. A combination with other concepts is not seen practical. Quasi-optical beamforming allows to achieve a narrow antenna beam with high gain and is ideally suited for long-range operation. It can be very cost-effective to manufacture and also serve as radome. On the downside, it is not a very flexible concept, as the field of view is fixed by the quasi-optical element. Analog beamforming allows the realization of a very flexible antenna system with high performance and requires almost no additional signal processing power, as the beam steering is done in the millimeter-wave frontend. However the practical implementation proves difficult. To achieve good performance, a large number of channels are necessary. The challenges are then the number of interconnects to the active circuits, routing of the many channels, isolation between the channels and calibration of the antenna system. Digital beamforming shows a lot of promise, allowing a flexible antenna system with high performance. However, a practical implementation leads to some of the same challenges as for analog beamforming. Additionally, the digital signal processing in the baseband requires more processing power compared to other concepts. Hybrid systems, combining the different approaches to avoid the disadvantages of one individual concept alone can be envisioned. For example, to improve interference suppression and reduce the number of required channels of a digital

HASCH et al.: MILLIMETER-WAVE TECHNOLOGY FOR AUTOMOTIVE RADAR SENSORS

Fig. 17. Bosch LRR3 sensor. (a) Sensor housing, (b) Topside of RF PCB module.

beamforming concept, a quasi-optical beamforming network can be added to define the field of view without degrading the advantages of the DBF system. Such a hybrid antenna can fulfill the requirements of a high performance antenna system as well as the requirements of low-cost, compact and robust radar sensor. For example, a hybrid array that employs phased array and digital beamforming concepts that allow the advantages of both systems to be realized in the same architecture [87]–[89]. V. EXAMPLES After presenting current and future active components, their packaging as well as various antenna concepts, in this section three specific sensor examples will be introduced. Starting with a state-of-the-art long range sensor and a mid range sensor currently under development, finally an Antenna on Chip demonstrator is presented, giving an outlook on upcoming trends for automotive radar. A. Long Range Radar Fig. 17(a) illustrates Bosch’s current long range sensor LRR3, which has already been introduced in Section II.C. It consists of a lens antenna, diecast housing, car connector, 77 GHz transceiver module, ECU board and diecast back side cover. The lens antenna [73] is clipped and bonded to the diecast housing. From the bottom side, the transceiver module is placed in a cavity and screwed on the housing in a way that the antennas can radiate through an opening in the middle. Subsequently, the ECU board is attached to the car connector and to the transceiver board using a board-to-board connector. Both PCBs are secured by the diecast cover comprising structures for heat dissipation and a pressure equalization element. At the end of the assembly line, the deviation between the radar axis and the sensor’s mechanical axis is measured and stored in the sensor unit for alignment procedures at the car manufacturer. A simplified block diagram of the sensor is depicted in Fig. 18. The major innovations in comparison to its predecessor LRR2 are to be found in size and package complexity reduction of the RF module by implementing SiGe MMICs instead of Gunn oscillators and discrete mixer diodes (see Fig. 17(b)). The transceiver chip as presented in Section IV-A.2 and the reference DRO MMIC are placed in cavities using CoB packaging (see Section 8) to accomplish short bond wires and to improve their heat dissipation due to a 300 m strong copper layer below. The reference MMIC contains a 19 GHz oscillator,

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Fig. 18. Block diagram of LRR3 sensor.

stabilized by an external ceramic resonator being frequency adjusted accurately by a laser trimming process [11]. Reference signal and LO signal being divided by four are mixed and after passing additional dividers fed into a phased locked loop (PLL) to circumvent the fact that high divide ratios tremendously increase the in-loop phase noise and thus degrade the dynamic range [90]. Subsequently, the signal is split and transmitted to the four patch antennas, which are rotated by 45 in order to be less prone to inferring millimeter-wave radiation. Each patch structure consists of the actual directly excited patch and two parasitic patches to increase the bandwidth to 4 GHz and to generate narrower beams. The resulting two-way antenna diagram is illustrated in Fig. 19, showing the squint between all four beams being used for angle estimation. After down-converting, the receive signals are amplified, filtered and A/D converted by an ASIC located on the backside of the RF module and being furthermore responsible for modulation and power control, sequencing and diagnostics. Subsequent signal processing is then carried out on the C of the ECU board. B. Mid Range Radar To illustrate the progress since the development of third generation radar sensors, subsequently a new mid range radar sensor, called MRR is presented. This sensor, announced in 2011, is in contrast to precedent sensor generations a bistatic system, and like for all generations before its development is strongly driven by innovations of the transceiver unit. The sensor housing and the RF frontend PCB are shown in Fig. 20(a). The block diagram Fig. 21 depicts the bistatic setup of the radar. The transmitter chip feeds a multi-column transmit patch array and provides the LO signal for the receiver chip. The receiver features four channels, which are fed by individual patch columns. The bonded 77 GHz and 19 GHz MMICs are replaced by a transmit SiGe MMIC, similar to the one mentioned in Section IV-A.2 and its counterpart for the receive path, being both packaged in eWLB technology (see Section IV-B.3) to benefit from state-of-the-art “Pick&Place” processes and from better RF performance [91], [92]. Subsequent processing is again carried out using an ASIC and a C. Instead of a combination of antenna patches and a dielectric lens, planar antennas are used comprising four receive and two transmit channels. The according transmit antennas and a close up view of the receiver MMIC are illustrated in Fig. 20(b). The main transmit

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Fig. 19. Two-way antenna diagram of LRR3.

Fig. 22. Two-way antenna diagram for the front-side MRR sensor.

Fig. 20. Bosch MRR sensor. (a) Sensor housing, (b) RF PCB module with planar antenna. Fig. 23. Block diagram of the radar sensor with on-chip antenna.

channels, using frontside transmit antenna characteristics, is depicted in Fig. 22. C. Antenna on Chip Demonstrator

Fig. 21. Block diagram of the MRR sensor.

array consists of ten columns and achieves a sidelobe level suppression of better than 30 dB. The field of view can be broadened by using an additional single-column transmit channel. The losses of the microstrip feed lines are in the order of 0.8 dB/cm. They do not impact the overall sensor performance, as sufficient system dynamic is available for midrange operation. Fabrication variations in the permittivity of the PCB only slightly influence the antenna characteristics. On the other hand, the unidirectional feeding of the antenna elements causes a tilt of the main lobe when changing the transmit frequency. Therefore, the array is designed to minimize this effect within the bandwidth of 1 GHz around the center frequency. The planar antenna array can be easily modified to realize different antenna patterns for front and rear/side car integration. The two-way antenna diagram for the four different receive

To demonstrate the performance of the on-chip antenna concept, presented in Section IV-B.5, a complete radar sensor was built based on the LRR3 sensor [93]. Only the top side with the RF substrate of the LRR3 RF module has been replaced with the QFN packaged transceiver introduced in Section IV-B.5, all other modules remain identical. The PCB surrounding the QFN package contains all additional electronic components to control this 19 GHz VCO. A standard integer PLL was used to stabilize the 19 GHz VCO, using the divider by 8 from the MMIC. A 10 MHz quartz is used as a reference for the PLL. All of the remaining PLL and baseband circuits remain identical to the LRR3 radar sensor. The fabricated RF module PCB is shown in Fig. 24(b). The SiGe radar transceiver can be seen mounted inside the QFN package on the middle of the board. The stabilization PLL and quartz reference are placed next to the QFN package. Fig. 24(a) shows the complete radar sensor integrated in the sensor housing with the unmounted LRR3 dielectric lens. The housing, used for LRR3, was slightly adapted and absorber material was used to suppress unwanted reflections between the metal housing and dielectric lens antenna. The two antenna elements were mounted nearly in the identical position as the LRR3 antenna feed patches.

HASCH et al.: MILLIMETER-WAVE TECHNOLOGY FOR AUTOMOTIVE RADAR SENSORS

Fig. 24. Antenna on-chip demonstrator. (a) LRR3 sensor housing, (b) PCB module with QFN package containing antenna on-chip.

Fig. 25. Two-way antenna diagram of the antenna on chip demonstrator compared to an LRR3.

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evaluated. The presented measurement results of the radar frontends demonstrate their good performance. On the semiconductor side, several manufacturers are able to provide modern processes with sufficient performance. SiGe BiCMOS technology was identified as the currently most promising semiconductor technology for low-cost millimeter-wave radar sensors. A number of packaging technologies to interconnect the semiconductor chip with a PCB have been introduced. Starting with well known chip on board wire bonding and flip-chip mounting, a number of newer developments were presented to achieve lower cost solutions. The eWLB package allows soldering 77 GHz as standard SMD components, drastically reducing production efforts. By integrating the antenna in the package itself, a solution to eliminate expensive millimeter-wave capable substrate was shown. Taking this approach even one step further, an antenna on chip concept was presented, showing very good performance, comparable to off-chip approaches. The selection of the antenna system has been addressed by introducing and comparing four different concepts. The comparison shows that a hybrid system, combining different concepts, is a promising way to implement the antenna system for an automotive radar system. Especially extending digital beamforming with approaches like analog or quasi-optical beamforming can deliver a flexible and competitive solution. Finally three different realizations of automotive radar sensors were introduced, showing the path from current to next to future generation implementations. ACKNOWLEDGMENT

To verify the performance of the sensor, two way response measurements of the two monostatic radar channels were performed by operating the sensor using FMCW modulation and placing a corner reflector in a distance of several meters. The received power reflected from the corner reflector is recorded at the baseband after amplification, filtering, analog to digital conversion and signal processing by using fast fourier transformation. This setup allows a direct comparison with a LRR3 sensor. Fig. 25 shows a two-way antenna pattern in the azimuthal plane of two on-chip antennas and two channels of the LRR3 from Fig. 19. A 3 dB difference in peak values of received powers between LRR3 and Antenna on Chip demonstrator is observed after the measurements. A mismatch in the illumination of the dielectric lens by the on-chip antennas and broader beamwidth of the on-chip patch antennas compared to the beamwidth of the LRR3 patch feeds are the reasons for this amplitude difference. The placement of the on-chip antennas on the transceiver chip was not optimized. Taking into account the 2–3 mm long on-chip microstrip feed lines leading to the antenna elements with a loss of 1 dB/mm, the sensor performance can be optimized to exceed the LRR3 reference sensor for at least 3 dB. VI. CONCLUSION An overview of the key issues in semiconductor technology, packaging and antenna systems for millimeter-wave technology used in automotive radar sensors was provided. Advanced packaging concepts and antenna systems are explained in detail and

The authors would like to thank Infineon for providing the millimeter-wave integrated circuits. REFERENCES [1] R. Adomat, G.-O. Geduld, M. Schamberger, and P. Rieth, “Advanced driver assistance systems for increased comfort and safety—Current developments and an outlook to the future on the road,” Avd. Microsyst. Autom. Appl., pp. 431–446, 2003. [2] M. van Schijndel-de Nooij, A. Schieben, N. Ford, and M. McDonald, “Definition of necessary vehicle and infrastructure systems for automated driving,” European Commission, Information Society and Media DG, Components and Systems Directorate - ICT for Transport, Study Rep. SMART 2010/0064, Jun. 2011. [3] R. H. Rasshofer and K. Gresser, “Automotive radar and lidar systems for next generation driver assistance functions,” Adv. Radio Sci., vol. 3, pp. 205–209, 2005. [4] S. K. P. Zador and R. Vocas, “Final Report-Automotive Collision Avoidance (ACAS) Program,” Tech. Rep. DOT HS 809 080, NHTSA, U.S. DOT, Aug. 2000. [5] R. Altendorfer, S. Wirkert, and S. Heinrichs-Bartscher, “Sensor fusion as an enabling technology for safety-critical driver assistance systems,” SAE Int. J. Passeng. Cars—Electron. Electr. Syst., vol. 3, pp. 183–192, Dec. 2010. [6] J. Wenger, “Automotive radar—Status and perspectives,” in Proc. IEEE Compound Semicond. Integr. Circuit Symp., Oct. 2005, pp. 21–25. [7] “Report on Interference Density Increase by Market Penetration Forecast,” Mosarim Project, D1.6, 2010 [Online]. Available: http://www. mosarim.eu/ [8] F. Pfeiffer and E. Biebl, “Inductive compensation of high-permittivity coatings on automobile long-range radar radomes,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 11, pp. 2627–2632, Nov. 2009. [9] European Telecommunications Standards Institute, EN 302 264-1: Electromagnetic Compatibility and Radio Spectrum. [10] Federal Communications Commission, FCC 11-79 May 2011.

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[11] D. Freundt and B. Lucas, “Long range radar sensor for high-volume driver assistance systems market,” in Proc. SAE World Congress & Exhibition, 2008, pp. 117–124. [12] W. Menzel, “Millimeter-wave radar for civil applications,” in Proc. Eur. Radar Conf., Oct. 2010, pp. 89–92. [13] V. Manasson, L. Sadovnik, and R. Mino, “MMW scanning antenna,” IEEE Aerosp. Electron. Syst. Mag., vol. 11, no. 10, pp. 29–33, Oct. 1996. [14] H. Mizuno, N. Tomioka, A. Kawakubo, and T. Kawasaki, “A forwardlooking sensing millimeter-wave radar,” in Proc. JSAE Ann. Congr., 2004, no. 33-04, pp. 5–8. [15] H.-L. Bloecher and J. Dickmann, “Automotive radar for safety and driver assistance applications: Status and trends,” presented at the Eur. Radar Conf. Workshop WFF01, Oct. 2010. [16] S. Buckley, “Radar based driver assistance features,” presented at the IWPC—Autom. Radar Workshop, Feb. 2011. [17] M. I. Skolnik, Introduction to Radar Systems. New York: McGrawHill, 2001. [18] H. Buddendick and T. Eibert, “Acceleration of ray-based radar cross section predictions using monostatic-bistatic equivalence,” IEEE Trans. Antennas Propag., vol. 58, no. 2, pp. 531–539, Feb. 2010. [19] L. Mesow, “Multisensorielle datensimulation im fahrzeugumfeld für die bewertung von sensorfusionsalgorithmen,” Ph.D. dissertation, Technical Univ. Chemnitz, Germany, 2007. [20] M. Bühren and B. Yang, “Automotive radar target list simulation based on reflection center representation of objects,” in Proc. Workshop Intell. Transport. (WIT), Hamburg, Germany, Mar. 2006, pp. 161–166. [21] G. R. Curry, Radar System Performance Modeling. Norwood, MA: Artech House, 2005. [22] Y. Liu, D. Goshi, K. Mai, L. Bui, and Y. Shih, “Linearity study of DDSbased W-band FMCW sensor,” in Proc. IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2009, pp. 1697–1700. [23] E. Hecht, Optics, 4th ed. New York: Addison Wesley, 2001. [24] I. Gresham, N. Jain, T. Budka, A. Alexanian, N. Kinayman, B. Ziegner, S. Brown, and P. Staecker, “A compact manufacturable 76–77-GHz radar module for commercial ACC applications,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 1, pp. 44–58, Jan. 2001. [25] P. Alleaume, C. Toussain, C. Auvinet, D. Domnesque, P. Quentin, and M. Camiade, “Millimetre-wave hot-via interconnect-based GaAs chipset for automotive RADAR and security sensors,” in Proc. Eur. Microw. Integr. Circuit Conf., Oct. 2008, pp. 52–55. [26] G. Brehm, “Trends in microwave/millimeter-wave front-end technology,” presented at the EuMIC, Sep. 2006. [27] D. Platt, L. Pettersson, D. Jakonis, M. Salter, and J. Hagglund, “Integrated 79 GHz UWB automotive radar front-end based on hi-mission MCM-D silicon platform,” in Proc. Eur. Radar Conf., Oct. 2009, pp. 445–448. [28] T. Nagasaku, K. Kogo, H. Shinoda, H. Kondoh, Y. Muto, A. Yamamoto, and T. Yoshikawa, “77 GHz low-cost single-chip radar sensor for automotive ground speed detection,” presented at the IEEE Compound Semicond. Integr. Circuit Symp., Oct. 2008. [29] K. Kim, W. Choi, S. Kim, G. Seol, K. Seo, and Y. Kwon, “A 77 GHz transceiver for automotive radar system using a 120 nm In0.4AlAs/In0. 35GaAs metamorphic HEMTs,” in Proc. IEEE Compound Semicond. Integr. Circuit Symp., Nov. 2006, pp. 201–204. [30] S. Nicolson, K. Tang, K. Yau, P. Chevalier, B. Sautreuil, and S. Voinigescu, “A low-voltage 77-GHz automotive radar chipset,” in Proc. IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2007, pp. 487–490. [31] L. Wang, S. Glisic, J. Borngraeber, W. Winkler, and J. Scheytt, “A single-ended fully integrated SiGe 77/79 GHz receiver for automotive radar,” IEEE J. Solid-State Circuits, vol. 43, no. 9, pp. 1897–1908, Sep. 2008. [32] A. Babakhani, X. Guan, A. Komijani, A. Natarajan, and A. Hajimiri, “A 77-GHz phased-array transceiver with on-chip antennas in silicon: Receiver and antennas,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2795–2806, Dec. 2006. [33] W. Huang, J. John, S. Braithwaite, J. Kirchgessner, I. Lim, D. Morgan, Y. Park, S. Shams, I. To, P. Welch, R. Reuter, H. Li, A. Ghazinour, P. Wennekers, and Y. Yin, “SiGe 77 GHz automotive radar technology,” in Proc. IEEE Int. Symp. Circuits Syst., May 2007, pp. 1967–1970. [34] A. Kar-Roy, D. Howard, E. Preisler, M. Racanelli, S. Chaudhry, and V. Blaschke, “SiGe BiCMOS manufacturing platform for mmWave applications,” in Proc. Society Photo-Optical Instrumentation Engineers (SPIE) Conf. Ser., Oct. 2010, vol. 7837.

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HASCH et al.: MILLIMETER-WAVE TECHNOLOGY FOR AUTOMOTIVE RADAR SENSORS

[55] H. P. Forstner, H. D. Wohlmuth, H. Knapp, C. Gamsjaeger, J. Boeck, T. Meister, and K. Aufinger, “A 19 GHz DRO downconverter MMIC for 77 GHz automotive radar frontends in a SiGe bipolar production technology,” in Proc. Bipolar/BiCMOS Circuits Technol. Meeting, 2008. [56] O. Günther, “Modellierung und Leakage-Kompensation von 77 GHz FMCW-Weitbereichsradar-Transceivern in SiGe-Technologie für KfzAnwendungen,” Ph.D. dissertation, Univ. Erlangen, Germany, 2008. [57] K. Kuang, F. Kim, and S. S. Cahill, RF and Microwave Microelectronics Packaging. New York: Springer, 2010. [58] T. Budka, “Wide-bandwidth millimeter-wave bond-wire interconnects,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 4, pp. 715–718, Apr. 2001. [59] W. Heinrich, “The flip-chip approach for millimeter wave packaging,” IEEE Microw. Mag., vol. 6, no. 3, pp. 36–45, Sep. 2005. [60] A. Jentzsch and W. Heinrich, “Theory and measurements of flip-chip interconnects for frequencies up to 100 GHz,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 5, pp. 871–878, May 2001. [61] M. Brunnbauer, E. Furgut, G. Beer, T. Meyer, H. Hedler, J. Belonio, E. Nomura, K. Kiuchi, and K. Kobayashi, “An embedded device technology based on a molded reconfigured wafer,” in Proc. Electron. Compon. Technol. Conf., Jul. 2006, pp. 547–551. [62] M. Wojnowski, M. Engl, M. Brunnbauer, K. Pressel, G. Sommer, and R. Weigel, “High frequency characterization of thin-film redistribution layers for embedded wafer level BGA,” in Proc. Electron. Packag. Technol. Conf., Dec. 2007, pp. 308–314. [63] M. Wojnowski, M. Engl, B. Dehlink, G. Sommer, M. Brunnbauer, K. Pressel, and R. Weigel, “A 77 GHz SiGe mixer in an embedded wafer level BGA package,” in Proc. Electron. Compon. Technol. Conf., May 2008, pp. 290–296. [64] T. Meyer, K. Pressel, G. Ofner, and B. Römer, “System integration with eWLB,” presented at the Electron. Syst.-Integr. Technol. Conf. (ESTC), Sep. 2010. [65] M. Brunnbauer, T. Meyer, G. Ofner, K. Mueller, and R. Hagen, “Embedded wafer level ball grid array (eWLB),” in Proc. Electron. Manuf. Technol. Symp., Nov. 2008, pp. 994–998. [66] S. W. Yoon, A. Bahr, X. Baraton, P. Marimuthu, and F. Carson, “3D eWLB (embedded wafer level BGA) technology for 3D-packaging/3D-SiP (systems-in-package) applications,” in Proc. Electron. Packag. Technol. Conf., Dec. 2009, pp. 915–919. [67] M. Al Henawy and M. Schneider, “Integrated antennas in eWLB packages for 77 GHz and 79 GHz automotive radar sensors,” in Proc. Eur. Microw. Conf., Oct. 2011, pp. 424–427. [68] R. Carrillo-Ramirez and R. Jackson, “A highly integrated millimeterwave active antenna array using BCB and silicon substrate,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 6, pp. 1648–1653, Jun. 2004. [69] I. Papapolymerou, R. F. Drayton, and L. Katehi, “Micromachined patch antennas,” IEEE Trans. Antennas Propag., vol. 46, no. 2, pp. 275–283, Feb. 1998. [70] J. Hasch, U. Wostradowski, S. Gaier, and T. Hansen, “77 GHz radar transceiver with dual integrated antenna elements,” in Proc. German Microw. Conf., Mar. 2010, pp. 280–283. [71] Y. Atesal, B. Cetinoneri, M. Chang, R. Alhalabi, and G. Rebeiz, “Millimeter-wave wafer-scale silicon BiCMOS power amplifiers using free-space power combining,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 4, pp. 954–965, Apr. 2011. [72] H. P. Forstner, H. Knapp, C. Gamsjaeger, H. Rein, J. Boeck, T. Meister, and K. Aufinger, “A 19 GHz VCO downconverter MMIC for 77 GHz automotive radar frontends in a SiGe bipolar production technology,” in Proc. Eur. Microw. Conf., 2007, pp. 178–181. [73] T. Binzer, M. Klar, and V. Gross, “Development of 77 GHz radar lens antennas for automotive applications based on given requirements,” in Proc. ITG Conf. Antennas, Mar. 2007, pp. 205–209. [74] W. Menzel, D. Pilz, and R. Leberer, “A 77 GHz FM/CW radar frontend with a low-profile, low-loss printed antenna,” in Proc. IEEE MTT-S Int. Microw. Symp. Dig., Jun. 1999, pp. 1485–1488. [75] D. Chouvaev and M. Danestig, “Slot antennas and quasi-optical beamforming for a cost-efficient integrated automotive radar,” presented at the GigaHertz Symp., Linköping, Sweden, 2003. [76] G. Kühnle, H. Mayer, H. Olbrich, W. Steffens, and H.-C. Swoboda, “Low-cost long-range radar for future driver assistance systems,” Auto Technol., vol. 4, pp. 76–79, 2003. [77] M. Steinhauer, H.-O. Ruo, H. Irion, and W. Menzel, “Millimeter-waveradar sensor based on a transceiver array for automotive applications,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 2, pp. 261–269, Feb. 2008.

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[78] Y. Asano, S. Ohshima, T. Harada, M. Ogawa, and K. Nishikawa, “Proposal of millimeter-wave holographic radar with antenna switching,” in Proc. IEEE MTT-S Int. Microw. Symp. Dig., vol. 2, pp. 1111–1114. [79] C. Lievers, W. van Rossum, A. Maas, and A. Huizing, “Digital beam forming on transmit and receive with an AESA FMCW radar,” in Proc. Eur. Radar Conf., Oct. 2007, pp. 47–50. [80] S. Holzwarth, O. Litschke, W. Simon, K. Kuhlmannt, and A. F. Jacob, “Far field pattern analysis and measurement of a digital beam forming 8 8 antenna array transmitting from 29.5 to 30 GHz,” presented at the Eur. Conf. Antennas Propag., Nov. 2007. [81] I. Sarkas, M. Khanpour, A. Tomkins, P. Chevalier, P. Garcia, and S. Voinigescu, “W-band 65-nm CMOS and SiGe BiCMOS transmitter and receiver with lumped I-Q phase shifters,” in Proc. IEEE Radio Freq. Integr. Circuits (RFIC) Symp., Jun. 2009, pp. 441–444. [82] C. Wagner, M. Hartmann, A. Stelzer, and H. Jaeger, “A fully differential 77 GHz active IQ modulator in a silicon-germanium technology,” IEEE Microw. Wireless Compon. Lett., vol. 18, pp. 362–364, May 2008. [83] A. M. Niknejad and H. Hashemi, mm-Wave Silicon Technology: 60 GHz and Beyond. New York: Springer, 2007. [84] G. Rebeiz and K. Koh, “Silicon RFICs for phased arrays,” IEEE Microw. Mag., vol. 10, no. 3, pp. 96–103, May 2009. [85] A. Natarajan, A. Komijani, X. Guan, A. Babakhani, and A. Hajimiri, “A 77-GHz phased-array transceiver with on-chip antennas in silicon: Transmitter and local LO-path phase shifting,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2807–2819, Dec. 2006. [86] D. Parker and D. Zimmermann, “Phased Arrays—Part II: Implementations, applications, and future trends,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 3, pp. 688–698, Mar. 2002. [87] S. Tokoro, K. Kuroda, A. Kawakubo, K. Fujita, and H. Fujinami, “Electronically scanned millimeter-wave radar for pre-crash safety and adaptive cruise control system,” in Proc. Intell. Veh. Symp., Jun. 2003, pp. 304–309. [88] L. Baggen, S. Holzwarth, M. Boettcher, and M. Eube, “Advances in phased array technology,” in Proc. Eur. Radar Conf., Sep. 2006, pp. 88–91. [89] F. van Vliet and A. de Hek, “Front-end technology for phased-arrays with digital beamforming,” presented at the Conf. Microw., Commun., Antennas Electron. Syst., May 2008. [90] C. Wagner, A. Stelzer, and H. Jager, “PLL architecture for 77-GHz FMCW radar systems with highly-linear ultra-wideband frequency sweeps,” in Proc. IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2006, pp. 399–402. [91] J. Hildebrandt, “77 GHz mid range radar for a variety of applications,” presented at the IWPC—Automotive Radar Workshop, Feb. 2011. [92] P. Tamang, “Radar sensors,” Vision Zero Int., pp. 68–69, Jun. 2011 [Online]. Available: http://www.scribd.com/doc/58141328/Vision-Zero-International-June-2011 [93] J. Hasch, U. Wostradowski, R. Hellinger, and D. Mittelstrass, “77 GHz automotive radar sensor in low-cost PCB technology,” in Proc. Eur. Microw. Conf., Oct. 2011, pp. 101–104. Jürgen Hasch was born in Göppingen, Germany, in 1970. He received the Dipl.-Ing. degree in 1996 and the Ph.D. degree in 2007 from the University of Stuttgart, Stuttgart, Germany. He is a senior RF expert at corporate research of the Robert Bosch GmbH in Stuttgart, Germany. His main interests are ultrawideband and millimeter-wave sensors. Dr. Hasch is a member of the IEEE Antennas and Propagation Society and the IEEE Microwave Theory and Techniques Society.

Eray Topak was born in Denizli, Turkey, in 1983. He received the M.Sc. degree in 2008 from the Technical University of Munich, Munich. Germany. Currently he is pursuing the Ph.D. degree at corporate research of the Robert Bosch GmbH, Stuttgart, Germany. His main interests are millimeter-wave antenna systems.

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Raik Schnabel was born in Weimar, Germany, in 1985. He received the Dipl.-Ing. degree in 2010 from the Karlsruhe Institute of Technology, Karlsruhe, Germany. Currently he is pursuing the Ph.D. degree at the business unit “Chassis Systems Control” of the Robert Bosch GmbH, Stuttgart, Germany. His main interests are millimeter-wave integrated circuits.

Thomas Zwick (S’95–M’00–SM’06) received the Dipl.-Ing. (M.S.E.E.) and the Dr.-Ing. (Ph.D.E.E.) degrees from the Universität Karlsruhe (TH), Karlsruhe, Germany in 1994 and 1999, respectively. From 1994 to 2001 he was Research Assistant at the Institut für Höchstfrequenztechnik und Elektronik (IHE), Universität Karlsruhe (TH), Germany. In February 2001, he joined IBM as a Research Staff Member at the IBM T. J. Watson Research Center, Yorktown Heights, NY. From October 2004 to September 2007, he was with Siemens AG, Lindau, Germany. During this period he managed the RF development team for automotive radars. In October 2007 he became appointed as Full Professor at the Karlsruhe Institute of Technology (KIT), Germany. He is Director of the Institut für Hochfrequenztechnik und Elektronik (IHE), KIT. His research topics include wave propagation, stochastic channel modeling, channel measurement techniques, material measurements, microwave techniques, millimeter wave antenna design, wireless communication and radar system design. He participated as an expert in the European COST231 Evolution of Land Mobile Radio (Including Personal) Communications and COST259 Wireless Flexible Personalized Communications. For the Carl Cranz Series for Scientific Education he served as a lecturer for Wave Propagation. He is the author or coauthor of over 100 technical papers and over 10 patents. Dr. Zwick received the Best Paper Award on the International Symposium on Spread Spectrum Technology and Applications (ISSSTA 1998). In 2005 he received the Lewis Award for outstanding paper at the IEEE International Solid State Circuits Conference. Since 2008 he has been President of the Institute for Microwaves and Antennas (IMA).

Robert Weigel was born in Ebermannstadt, Germany, in 1956. He received the Dr.-Ing. and the Dr.-Ing.habil. degrees, both in electrical engineering and computer science, from the Munich University of Technology, Munich, Germany, in 1989 and 1992, respectively. From 1982 to 1988, he was a Research Engineer, from 1988 to 1994 a Senior Research Engineer, and from 1994 to 1996 a Professor for RF Circuits and Systems at the Munich University of Technology. During 1994 to 1995 he was a Guest Professor for

SAW Technology at Vienna University of Technology, Austria. From 1996 to 2002, he was Director of the Institute for Communications and Information Engineering at the University of Linz, Austria. In August 1999, he co-founded DICE—Danube Integrated Circuit Engineering, Linz, meanwhile split into an Infineon Technologies and an Intel company which are devoted to the design of RFICs. In 2000, he was appointed as Professor for RF Engineering at the Tongji University, Shanghai, China. Also in 2000, he co-founded the Linz Center of Competence in Mechatronics. Since 2002 he is Head of the Institute for Electronics Engineering at the University of Erlangen-Nuremberg. In 2009, he co-founded eesy-id, a company which is engaged with the design of medical electronic circuits and systems. He has been engaged in research and development of microwave theory and techniques, SAW technology, integrated optics, high-temperature superconductivity, digital and microwave communication and sensing systems, and automotive EMC. In these fields, he has published more than 750 papers and given about 300 international presentations. His review work includes international projects and journals. Dr. Weigel received the German ITG Award in 2002 and the IEEE Microwave Applications Award in 2007. He serves on various editorial boards such as that of the Proceedings of the IEEE, and he has been editor of the Proceedings of the European Microwave Association (EuMA). He has been member of numerous conference steering and technical program committees. Currently he serves on several company and organization advisory boards in Europe and Asia. He is an elected scientific advisor of the German Research Foundation DFG. Within IEEE MTT-S, he has been Founding Chair of the Austrian COM/MTT Joint Chapter, Region 8 Coordinator and, during 2001 to 2003 Distinguished Microwave Lecturer, and currently he is an AdCom Member and Chair of MTT-2 Microwave Acoustics.

Christian Waldschmidt received the Dipl.-Ing. (M.S.E.E.) and the Dr.-Ing. (Ph.D.E.E.) degrees from the University Karlsruhe (TH), Karlsruhe, Germany, in 2001 and 2004, respectively. From 2001 to 2004 he was a Research Assistant at the Institut für Höchstfrequenztechnik and Elektronik (IHE), Universität Karlsruhe (TH), Germany. Since 2004 he has been with Robert Bosch GmbH, in the business units Corporate Research and Chassis Systems. He was heading different research and development teams in high frequency engineering, EMC and automotive radar. His research topics include integrated radar sensors, radar system design, millimeter wave technologies, antennas and antenna arrays, UWB, and EMC. He is author or coauthor of over 50 technical papers and over 15 patents.

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A Four-Channel 94-GHz SiGe-Based Digital Beamforming FMCW Radar Martin Jahn, Student Member, IEEE, Reinhard Feger, Member, IEEE, Christoph Wagner, Member, IEEE, Ziqiang Tong, Student Member, IEEE, and Andreas Stelzer, Member, IEEE

Abstract—This paper presents a multi-channel frequency-modulated continuous-wave (FMCW) radar sensor operating in the frequency range from 91 to 97 GHz. The millimeter-wave radar sensor utilizes an SiGe chipset comprising a single signal-generation chip and multiple monostatic transceiver (TRX) chips, which are based on a 200-GHz HBT technology. The front end is built on an RF soft substrate in chip-on-board technology and employs a nonuniformly distributed antenna array to improve the angular resolution. The synthesis of ten virtual antennas achieved by a multiple-input multiple-output technique allows the virtual array aperture to be maximized. The fundamental-wave voltage-controlled oscillator achieves a single-sideband phase noise of 88 dBc/Hz at 1-MHz offset frequency. The TX provides a saturated output power of 6.5 dBm, and the mixer within the TRX achieves a gain and a double sideband noise figure of 11.5 and 12 dB, respectively. Possible applications include radar sensing for range and angle detection, material characterization, and imaging. Index Terms—Frequency-modulated continuous wave (FMCW), heterojunction bipolar transistors (HBTs), millimeter wave circuits, MMICs, SiGe bipolar ICs, voltage-controlled oscillators.

I. INTRODUCTION

T

HE small wavelengths involved make millimeter-wave radars and imaging sensors very attractive in terms of resolution and compactness. The 92–100-GHz band, dedicated by the FCC to radio location, also benefits from a local minimum of atmospheric absorption. Since compact size and low costs are key requirements in short-range and consumer market applications, integrated solutions are favored over expensive and bulky

Manuscript received July 07, 2011; revised December 10, 2011; accepted December 13, 2011. Date of publication January 31, 2012; date of current version March 02, 2012. This work was supported by the Christian Doppler Research Association (CDG) and by the Austrian Center of Competence in Mechatronics (ACCM). M. Jahn and R. Feger are with the Christian Doppler Laboratory for Integrated Radar Sensors, Institute for Communications Engineering and RF-Systems, Johannes Kepler University, 4040 Linz, Austria (e-mail: [email protected]). C. Wagner is with Danube Integrated Circuits Engineering (DICE) GmbH, 4040 Linz, Austria. Z. Tong is with the Institute for Communications Engineering and RF-Systems, Johannes Kepler University, 4040 Linz, Austria. A. Stelzer is with the Christian Doppler Laboratory for Integrated Radar Sensors, Institute for Communications Engineering and RF-Systems, Johannes Kepler University, 4040 Linz, Austria, and also with the Institute for Communications Engineering and RF-Systems, Johannes Kepler University, 4040 Linz, Austria. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2181187

Fig. 1. Block diagram of the radar sensor. Gray-shaded building blocks indicate custom-made SiGe MMICs. For details on the TRX cells, refer also to [2].

split-block and waveguide alternatives. Further, integrated designs allow multichannel sensors to be accommodated in minimal space. Multichannel radars extend the basic capability of measuring range and velocity to the determination of the object angle. While range and velocity measurement performance correlates with bandwidth and measurement time, angular resolution is determined by the aperture of the antenna array. This work utilizes the combination of hardware-based methods proposed in [1], which allows us to keep the number of channels low by maximizing the number of unique virtual antenna positions. A further optimization in the physical size of the front end is the application of monostatic transceivers (TRX). This topology uses a single antenna for transmission and reception and thus requires a minimal number of RF pads on the chip and only one antenna per channel. However, this concept entails a trade-off in performance, due to the introduction of the hybrid-coupler (as discussed in [2]) and dc-offsets (due to reflections [3], [4]). A block diagram of the multichannel radar sensor is shown in Fig. 1. It is based on the topology proposed in [2] and [5], where four TRX cells with LO feed-through function were cascaded. The signal generation chip contains a divide-by-4 prescaler and thus presents frequencies in the range of approximately 23–25 GHz at the divider output. The phase-locked loop (PLL) is completed by a down-converter (DC) operating at 21 GHz and an off-the-shelf phase/frequency discriminator (PFD) with integrated prescaler. The offset-loop approach allows a low total frequency division ratio of 128, and the reference frequency is provided by a direct-digital synthesizer (DDS). The chips were fabricated in an Infineon Technologies SiGe process (similar to [6]). The entire front end runs on a 3.3-V power supply and draws approximately 480 mA (VCO chip, 4 TRX with one TX active, and down-converter).

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Fig. 4. Simulated . The small-signal simulation result confirms the impedance transformation property derived in (4). The resonant behavior origins from the base-to-collector capacitance and the base inductance.

Fig. 2. Circuit of the fully differential 94-GHz fundamental-wave VCO. It includes a fine- and coarse-tuning input. Transmission lines are labeled TL.

negative resistance at the emitter nodes of , which supports oscillation at higher frequencies, as discussed in the next paragraphs. The frequency-dependent small-signal gain can be approximated as (1) , where corresponds to the small-signal when low-frequency gain and (cf. [8]). Then, the input impedance seen at the emitter node of the common base transistor can be expressed as (2) represents the impedance of . Since is where shorted to virtual ground and its length is shorter than a quarter wavelength, it is instructive to write (3)

Fig. 3. Microphotograph of the chip layout of the fully differential 94-GHz fundamental-wave VCO.

with of

and being the equivalent resistance and inductance , respectively. Combining (1), (2), and (3) yields (4)

II. BUILDING BLOCK DESIGN A. Fundamental-Wave VCO The simplified fundamental-wave voltage-controlled oscillator (VCO) circuit is shown in Fig. 2. It is based on a design presented in [7] that incorporates the common-base stage in the oscillator core. This weakens the isolation property of a stacked common base buffer but enables higher fundamental oscillation frequencies with respect to the cutoff frequency . Transistors and and transmission lines (TLs) and are identical in size and layout, respectively. Fig. 3 illustrates the fabricated VCO layout. The transmission line inductors and are indicated. Each line has a length of 20 m. The inductance of at the base nodes of is transformed into a

which shows that any inductance connected at the base node is transformed into a negative resistance at the emitter node at high frequencies. Fig. 4 confirms the discussed impedance transformation by means of a SpectreRF small-signal circuit simulation result of based on the implemented VCO. A negative resistance is generated in the frequency range from 75 to 115 GHz. At even higher frequencies, returns to positive values. The simulation shows a resonant behavior, which can be explained with the help of the transistors’ high-frequency response by identifying the corresponding capacitances of . The extended equivalent high-frequency circuit is depicted in Fig. 5. For the sake of simplicity, the inductances of and were condensed into , and is represented by , assuming lossless transmission lines.

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Fig. 7. (a) Impedance seen at the base node of transistor with grounded . (b) Simple equivalent circuit for the input impedance emitter and load . of Fig. 5. Equivalent model incorporating the capacitances between the transistor was divided into two grounded capacitors, and nodes. Note that , in accordance to Miller’s theorem.

Fig. 6. (a) Impedance seen at transistor due to the base-to-collector . (b) Simple equivalent circuit for . capacitance

Incorporating the base-to-emitter capacitance yields

into (4)

(5) and thus contributes a frequency-independent (i.e., constant) resistance in this simple model. The base-to-collector capacitance was converted into two grounded capacitances— and —by applying Miller’s theorem. In contrast to the usual common-base stage where the base is shorted to ground, a capacitance is created that suffers from a form of Miller multiplication. Immediately, it becomes apparent that a resonant circuit containing and is formed at the base node, which dictates the behavior of . Above resonance, the impedance of the parallel circuit changes to capacitive behavior, which leads to a positive resistance at the emitter node (cf. Fig. 4). It is furthermore important how , which loads , is transformed into the oscillator core. In an ideal transistor, would not have any influence on , since no feedback from the collector to the base is present. In a real transistor, the base-to-collector capacitance occurs, and thus makes the base-to-collector path transparent up to a certain degree. Fig. 6 depicts a fraction of the hybrid-pi model of that includes the base-to-collector capacitance , the current source, and the load . Base resistance and base-to-emitter impedance are omitted for the sake of simplicity. The equivalent impedance seen due to results in (6) where corresponds to the voltage gain, and thus the result is consistent with Miller’s theorem. In the targeted oscillation frequency region, and holds. It

Fig. 8. Simulated small-signal impedances seen at the base node of transistor for emitter and collector shorted to ground ( ) and for the transistor ). with load (

is interesting that is proportional to , whereas is proportional to . In the next step, the input impedance seen at the base node of is calculated. Therefore, the emitter of is shorted to ground, and the collector is loaded with . Fig. 7 shows the circuit and the corresponding simple equivalent model. The input impedance of is modeled by the extrinsic base resistance and the base-to-emitter capacitance . The transformed load can be connected in parallel to , and the resulting equivalent input impedance of at resonance of and can be denoted as (7) denotes a positive real-valued factor. Equation (7) where yields that the base resistance of can be reduced in this design, since (cf. Fig. 4). This statement is supported by the results of SpectreRF small-signal simulations performed on the VCO circuit. To this end, the input impedance with grounded emitter and collector was compared to [loaded with , cf. (7)]. Fig. 8 illustrates the results. While is nearly constant over frequency, it can be seen that gets tuned when is loaded with a negative resistance. Resistance can even be compensated at the targeted oscillation frequency region around 100 GHz. This technique allows us to boost the oscillation frequency, since it reduces the resistance in the tank and thus supports oscillation start-up with already limited transistor gain. The resulting VCO characteristic can be seen in Fig. 9(a). The oscillator runs on 3.3 V and draws 50 mA, which is 20 mA less than that used in [2]. It covers the target frequency

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Fig. 9. Measured (a) VCO characteristic and (b) -parameters of the VCO buffer.

TABLE I COMPARISON OF SIGE AND SIGE BICMOS 90-GHz VCOS

Fig. 10. Measured -parameters of (a) the first active power splitter, (b) the second active power splitter (LO buffer), and (c) the medium power amplifier. The measurement results are not de-embedded from the input and output baluns. (d) Mixer and TX performance. TABLE II DETAILED CURRENT CONSUMPTIONS,

3.3 V

range easily and hence provides headroom to compensate for process, voltage, and temperature variations. The output power measured at the buffer ranges from 5.5 to 9 dBm. A single-sideband (SSB) phase noise below 95 dBc/Hz (best value 100 dBc/Hz) at 1-MHz offset from the carrier was measured at the divide-by-four prescaler over the 92- to 100-GHz band. To account for the frequency division, 12 dB must be added to estimate the phase noise at the real oscillation frequency. The best phase noise of 88 dBc/Hz at 1 MHz is achieved around 3-V tuning voltage (98 GHz). Table I compares the measured performance with other 90-GHz VCOs. Fig. 9(b) additionally shows the measured -parameters of the separate VCO cascode buffer test chip. The results were not de-embedded from the input and output LC baluns. Note that of the VCO buffer need not be matched to 100 differentially. Instead, it was matched to 50 in order to load the oscillator properly. A detailed breakdown of building blocks contained in the VCO chip and their power consumption is given in Table II.

B. Monostatic Transceiver The amplifier circuits of the building blocks contained in the TRX chip are based on that proposed in [5]. The -parameters of each circuit are shown in Fig. 10(a)–(c). They were obtained from separate test chips. All -parameters were measured in a single-ended configuration by applying on-chip LC baluns at the test chips. The insertion loss of two baluns in a back-to-back configuration is 3 dB. The amplifiers, which are entirely based on the cascode structure, are well matched in the desired frequency band. The medium power amplifier (PA), for example, achieves a (de-embedded) gain of 11.7 dB, a bandwidth of 15 GHz, and a measured saturated output power of 11 dBm. Fig. 10(d) summarizes the TX and mixer performances determined in on-wafer measurements. The saturated TX output power was measured to be 6.5 dBm. The 4.5-dB difference from the saturated output power of the PA (11 dBm) is due to the hybrid coupler, which was inserted to enable the monostatic structure. Fig. 10(d) also shows the de-embedded mixer performance. The mixer is based on the Gilbert-cell structure and was designed to achieve a high compression point, which is required in the single-antenna approach. Its gain and double-sideband noise figure were measured to be 11.5 and 12 dB, respectively, at an IF frequency of 6 MHz. The simulated input referred RF-compression point is 2 dBm. The robustness of the RX is crucial in the monostatic architecture, since high-level TX signals and low-level RX signals have to be processed over a single TRX channel simultaneously. This realization does furthermore not allow employment of an LNA in the RX channel, since TX

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TABLE III COMPARISON OF SI-BASED 94-GHz RXS AND TXS

C. Differential Microstrip Patch Antenna Array

Fig. 11. Microphotograph of the fully differential monostatic TRX chip with . LO feed-through function. Die size: 1 1.1

leakage, reflections from imperfect interfaces (wire bond transition), mismatch at the antenna, and near radar targets would saturate the LNA and mixer. Therefore, only an active mixer with high linearity ( 2 dBm) was employed in the RF RX path. Despite the challenges involved, two main advantages are achieved with the monostatic architecture. First, the number of RF pads on the chip is minimized and therefore the required chip area is reduced, and second, the single TRX antenna leads to a compact sensor size. Fig. 11 shows a microphotograph of the fabricated and diced TRX die with the main building blocks indicated. The differential hybrid coupler (rat-race coupler) consists of transmission lines. This allows a compact and flexible integration in the layout. Here, it surrounds the second active power splitter, the mixer, and the medium power amplifier. One branch of the hybrid coupler is terminated (cf. also Fig. 1). The terminated signal could be used as LO signal for the mixer as proposed, for instance, in [4]. This is, however, not feasible in this concept, since in RX-only mode (the PA is switched off), the mixer LO signal would be missing. To this end, amplifier was introduced to provide a constant mixer LO signal regardless of the TRX mode. Amplifier accomplishes the redistribution of the TRX LO signal and enables cascading of several TRXs in order to create multiple channels. The trade-off demanded to realize the monostatic operation becomes also visible in Table III, where the TRX of this work is compared to other RX chips. Separate RX chips/channels can have low compression points, for example, 30 dBm, which allows high RX gain and improved noise figure. Note that the TRX performance differs by 4.5 dB compared to the bare medium power amplifier and mixer figures due to the combination with the hybrid coupler.

The TRX antenna is the final crucial element of the front end. In order to eliminate any single-ended conversion between the fully differential TRX chip and the antenna, a differentially fed antenna array was designed (Fig. 12). The differential feeding allows a seamless path from the TRX chip to the antenna, supporting better integration. Nevertheless, a bond wire interface must be overcome as transition between the chip pads and the microstrip line used for signal distribution on the PCB. An impedance matching structure was designed between the first array element and the microstrip feeding line used as connection to the chip. In addition to being compact, differential antennas can outperform their single-ended counterparts in terms of bandwidth and cross polarization [14], [15]. The designed array achieves a gain of 12 dBi, as can be seen from the simulated beam patterns shown in Fig. 13. Furthermore, a very broad beam can be achieved in the -plane, which makes the design perfectly suitable for digital beamforming applications that require a large field of view (FOV). Fig. 14 shows the simulated and measured differential-mode -parameters . A theoretical 10 dB return loss bandwidth from 93 to 99 GHz is achieved. The measured -parameters were obtained from standard -parameter measurements with subsequent transformation into mixed-mode -parameters. The raw result (including contacting pads and feeding network) for is shown as the dashed line in Fig. 14. D. MIMO Beamforming Array Four antennas as shown in Fig. 12 were arranged to form a nonuniform four-channel antenna array. The distances between the antennas were chosen to be 1.64 mm, 2.79 mm, and 2.95 mm, as can be seen in the photograph of the assembled front end PCB shown in Fig. 15. Incorporating a MIMO array using reconfigurable TRX chips similar to those described in [1] leads to the virtual antenna positions given in Table IV. The positions from Table IV result from sequentially using each one of the reconfigurable channels as TRX while the remaining channels are operated as RX. Due to the varying TX positions, a synthetic aperture is created with virtual receive antenna positions resulting from the sum of all combinations of TX and RX positions. In our case, TX and RX positions are equal since TRXs are used. Setting the first antenna position to zero by defining , the positions can be written as by summing the antenna spacings according

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Fig. 12. Differential microstrip patch antenna array with a center frequency of 96-GHz.

Fig. 13. Simulated beam patterns achieved with the differential series-fed patch array.

Fig. 15. 94-GHz multi-channel radar frontend with nonuniformly distributed ). The inset shows the chip-to-chip bonding antennas (board size: 40 50 between the VCO chip and the first TRX.

Fig. 14. Simulated and measured differential-mode -parameters of the patch antenna array. Note that the measured -parameters were not de-embedded from the feeding network.

to . Now, the virtual antenna positions can be determined as , where denotes the four-element column vector of all ones and is the Kronecker product. The antenna spacings and the corresponding spatial window functions (also shown in Table IV) were determined using the design approach presented in [1]. Compared to the results in [1], the smallest antenna spacing was increased by 10% (relative to the free-space wavelength), which, on one hand, is advantageous because crosstalk between the antennas is reduced. On the other hand, the overall size of the array had to be decreased by reducing the remaining spacings to maintain the full 90 unambiguous FOV with the increased minimal antenna spacing. This comes at the cost of a broader mainbeam, which leads to reduced angular resolution. Fig. 16 shows the simulated spatial power distributions for targets at 0 and 90 calculated according to the two window functions from Table IV. The 3-dB beamwidths achieved with the two configurations from Table IV are 11.15 and 14.33 for a beam pointed boresight. It can be seen that the presented array configuration allows a possible

tradeoff between beamwidth and sidelobe level (SLL) by means of different window functions. With window function 1, an SLL of 12.1 dB can be achieved, whereas window function 2 leads to an SLL of 14.2 dB. An important property of the designed MIMO array is that no grating lobes occur even for targets at 90 . Together with the broad beam of the physical array elements in the -plane, a sensor with a large FOV can be realized. III. PROTOTYPE HARDWARE To realize a system for frequency-modulated continuous-wave (FMCW) measurements, all the previously presented building blocks were combined to form a prototype system consisting mainly of two PCBs, one of which is the radar frontend shown in Fig. 15. It combines the differential series-fed patch array antennas arranged with nonuniform spacings, the TRX chips, the VCO, and the down-converter chip. The frontend is a multi-layer PCB, with the topmost layer consisting of RF substrate Taconic TLE-95 with a thickness of 127 m. To realize low-loss bond connections, two different techniques were used. Firstly, neighboring chips were directly connected via chip-to-chip bonding (cf. the inset in Fig. 15) to avoid lengthy bond-to-microstrip transitions. Secondly, the chips were placed not on top of the RF layer but in cavities realized in the top layer, which allows short connections from the bond pads to the differential microstrip lines without the need

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Fig. 16. Simulated spatial power distributions of the MIMO beamforming array for targets located at (a) 0 and (b) 90 . The designed array allows a tradeoff between beamwidth and SLL. Although the spacing between the , the array shows no ambiguities for targets physical antennas is larger than from 90 to 90 . This is due to the MIMO principle, which lead to some . (a) Target at 0 . (b) Target at 90 . virtual antenna spacings smaller than TABLE IV VIRTUAL ANTENNA POSITIONS AND SPATIAL WINDOW FUNCTIONS OF THE MIMO ARRAY

for bridging the chip height with the bonds. These approaches also facilitate the design of bond compensation structures, since the inductance of the bond connections is minimized due to the reduced length. All lower frequency signals, such as those required to realize the PLL and all mixer outputs and control signals, were routed to connectors (also visible in Fig. 15). Using these connectors, the frontend can be plugged into a multi-purpose baseband-board featuring variable gain amplifiers in conjunction with 14-bit ADCs to amplify and convert the baseband radar signals, PLL synthesizer components to stabilize the RF VCO, a DDS to generate the linear frequency ramp, and an FPGA controlling all components and realizing the data transfer from the ADCs to a personal computer via an USB 2.0 interface. IV. MEASUREMENT RESULTS To test the operational system, measurements combining corner cubes (CCs) and practical targets, as they might occur,

Fig. 17. Outdoor measurement scenario with six distinctive targets indicated by markers. It can be seen that all targets marked in the photograph can be clearly identified as peaks in the power distribution. The power distribution was normalized to the maximum target return. (a) Photograph of the outdoor measurement scenario. (b) Single channel IF spectrum. (c) Measured power distribution viewed with an elevation of 60 .

for instance, in an outdoor sensing application, were carried out. In order to determine the unknown phase relations between the array channels, we used our radar to perform FMCW radar measurements in an anechoic chamber, prior to the outdoor measurements. During this calibration procedure, a 5-ms linear

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frequency chirp from 91 to 97 GHz was produced. A single CC with a radar cross section (RCS) of 12.3 dBsm was positioned at an angle of 0 and a distance of 3 m relative to the radar to determine the phase differences between the radar channels. After this calibration step, two corner reflectors with radar cross sections of 7.3 and 12.3 dBsm (comparable to the RCS of a car [16]), respectively, served as reference targets in an outdoor measurement scenario, which is illustrated in Fig. 17(a). The location of the two corner cubes, denoted by 1 and 2, is highlighted with CC insets to enhance their visibility. Note that these insets are not to scale. Their edge lengths are 6 and 8 cm, leading to the RCSs mentioned previously. Further targets were the corners at the entrances of the building (on the right side of the photograph, denoted by 3, 4, and 5) and a concrete stairway at a distance of approximately 60 m (denoted by 6). Fig. 17(b) shows the measured IF spectrum resulting from a single TX–RX combination. For the measurements, a 5-ms chirp from 91 to 97 GHz was again sent, and the resulting IF signal was sampled with a sampling rate of 1.56 MS/s. Even though no beamforming gain can be realized for a single channel measurement, all targets are clearly visible. Considering CC2 at a distance of 9.4 m, it can be seen that its RCS leads to a spectral SNR of approximately 25 dB. Here, the noise floor is determined by the baseband hardware with an IF gain of 31 dB. It is designed to allow the measurement of very low frequencies; thus, low-frequency signals caused by reflections from the antenna mismatch are not filtered out. Therefore, especially the monostatic channel measurements lead to signals with an amplitude up to 1 V at the ADC input, which prevents the use of higher IF gain or lower ADC reference voltage. Nevertheless, the maximum range at which CC2 can be detected with the system is more than 35 m. This can be estimated using the radar equation, which states that doubling the target range leads to a 12-dB power reduction. With the beamforming gain of 12 dB due to the 16 TX–RX combinations and assuming an SNR margin of 13 dB required for a detection, an SNR reduction of 24 dB is tolerable for a successful detection of CC2. These 24 dB correspond to a quadruplication of the target range, which leads to a distance of 9.4 m 37.4 m. Fig. 17(c) shows the measured power distribution calculated by digital beamforming using the virtual antenna positions from Table IV. For all TX–RX combinations single FMCW sweeps were collected. The peaks at the target positions show the angular position clearly and exhibit only a slightly increased SLL compared to the theoretical values. All marked targets can be identified, and an increased angular width of peaks can be observed for objects at larger distances. Peak 6, attributed to the concrete staircase, seems to exhibit bad SLL behavior. However, Fig. 17(a) shows that not only the staircase but also the grass hill contributes to the reflection from target ranges around 60 m. V. CONCLUSION We have presented a fully functional four-channel 94-GHz radar sensor. The sensor was tested in the 91 to 97-GHz frequency range. Operation at frequencies up to 100 GHz is possible with adapted PLL parameters. The presented system relies on a nonuniformly distributed antenna array in conjunc-

tion with MIMO beamforming, which allows synthesis of ten virtual antenna positions and thus enlarges the array aperture. This leads to an improved angular resolution although only four physical array elements are used. The radar front end is built with SiGe-based integrated circuits and thus compact in size. Outdoor measurements performed with FMCW bandwidths of 6 GHz verified the functionality of the sensor. We have also investigated how a negative-resistance load can boost the operation frequency of fundamental-wave VCOs and presented a qualitative explanation by means of small-signal models. ACKNOWLEDGMENT The authors would like to thank Infineon Technologies AG, Munich, Germany, and DICE GmbH & Co KG, Linz, Austria, for circuit fabrication. REFERENCES [1] R. Feger, C. Wagner, S. Schuster, S. Scheiblhofer, H. Jäger, and A. Stelzer, “A 77-GHz FMCW MIMO radar based on a SiGe single-chip transceiver,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 5, pp. 1020–1035, May 2009. [2] M. Jahn, A. Stelzer, and A. Hamidipour, “Highly integrated 79, 94, and 120-GHz SiGe radar frontends,” in IEEE MTT-S Int. Microw. Symp. Dig. 2010, May 2010, pp. 1324–1327. [3] M. Jahn, C. Wagner, and A. Stelzer, “DC-offset compensation concept for monostatic FMCW radar transceivers,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 9, pp. 525–527, Sep. 2010. [4] O. Günther et al., “DC-offset compensation of a 77 GHz monostatic FMCW-radar transceiver for automotive application,” in Proc. IEEE Radio Wireless Symp., Jan. 2008, pp. 49–50. [5] C. Wagner, H.-P. Forstner, G. Haider, A. Stelzer, and H. Jäger, “A 79-GHz radar transceiver with switchable TX and LO feedthrough in a silicon-germanium technology,” in Proc. Bipolar/BiCMOS Circuits Technol. Meeting (BCTM), Oct. 2008, pp. 105–108. [6] J. Böck, H. Schäfer, K. Aufinger, R. Stengl, S. Boguth, R. Schreiter, M. Rest, H. Knapp, M. Wurzer, W. Perndl, T. Böttner, W. Perndl, and T. F. Meister, “SiGe bipolar technology for automotive radar applications,” in Proc. Bipolar/BiCMOS Circuits Technol. Meeting (BCTM), Sep. 2004, pp. 84–87. [7] S. Trotta, H. Knapp, K. Aufinger, T. F. Meister, J. Böck, W. Simbürger, and A. L. Scholtz, “A fundamental VCO with integrated output buffer beyond 120 GHz in SiGe bipolar technology,” in IEEE MTT-S Int. Microw. Symp. Dig. 2007, Jun. 2007, pp. 645–648. [8] M. Jahn, H. Knapp, and A. Stelzer, “A 122-GHz SiGe-based signalgeneration chip employing a fundamental-wave oscillator with capacitive feedback frequency-enhancement,” IEEE J. Solid-State Circuits, vol. 46, no. 9, pp. 2009–2020, Sep. 2011. [9] S. T. Nicolson, P. Chevalier, B. Sautreuil, and S. P. Voinigescu, “Single-chip W-band SiGe HBT transceivers and receivers for Doppler radar and millimeter-wave imaging,” IEEE J. Solid-State Circuits, vol. 43, no. 10, pp. 2206–2217, Oct. 2008. [10] G. Huang and V. Fusco, “A 94 GHz wide tuning range SiGe bipolar VCO using a self-mixing technique,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 2, pp. 86–88, Feb. 2011. [11] N. Pohl, H.-M. Rein, T. Musch, K. Aufinger, and J. Hausner, “SiGe bipolar VCO with ultra-wide tuning range at 80 GHz center frequency,” IEEE J. Solid-State Circuits, vol. 44, no. 10, pp. 2655–2662, Oct. 2009. [12] E. Öjefors and U. Pfeiffer, “A 94-GHz monolithic front-end for imaging arrays in SiGe:C technology,” in Proc. Eur. Microw. Integrated Circuit Conf., Oct. 2008, pp. 422–425. [13] I. Sarkas, M. Khanpour, A. Tomkins, P. Chevalier, P. Garcia, and S. P. Voinigescu, “W-band 65-nm CMOS and SiGe BiCMOS transmitter and receiver with lumped I-Q phase shifters,” in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2009, pp. 441–444. [14] Z. Tong, A. Stelzer, C. Wagner, R. Feger, and E. Kolmhofer, “A novel differential microstrip patch antenna and array at 79 GHz,” in Proc. Int. Symp. Antennas Propag., Oct. 2008, pp. 276–280. [15] Z. Tong, A. Stelzer, and E. Kolmhofer, “77 GHz center-fed differential microstrip antenna array,” in Proc. 5th Eur. Conf. Antennas Propag., Apr. 2011, pp. 1–4. [16] A. G. Stove, “Obstacle detection radar for cars,” Electron. Commun. Eng. J., vol. 3, no. 5, pp. 232–240, Oct. 1991.

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Martin Jahn (S’07) received the Dipl.-Ing. (M.Sc.) degree in mechatronics from the Johannes Kepler University, Linz, Austria, in 2007. Since 2007, he has been with the Institute for Communications Engineering and RF-Systems, Johannes Kepler University, Linz, Austria, and since 2008, he has been working towards the Ph.D. degree as a Research Assistant. His research interests include RF and millimeter-wave integrated circuit design with emphasis on system design for millimeter-wave radar sensors.

Reinhard Feger (S’08–M’11) was born in Kufstein, Austria, in 1980. He received the Dipl.-Ing. (M.Sc.) degree in mechatronics and the Dr.Techn. (Ph.D.) degree in mechatronics from Johannes Kepler University, Linz, Austria, in 2005 and 2010, respectively. In 2005, he joined the Institute for Communications and Information Engineering, Johannes Kepler University, as a Research Assistant. In 2007, he became a member of the Christian Doppler Laboratory for Integrated Radar Sensors, Johannes Kepler University. His research topics are radar signal processing, as well as radar system design for industrial and automotive radar sensors. Dr. Feger was recipient of the 2011 Microwave Prize and the 2011 German Microwave Conference (GeMiC) Best Paper Award.

Christoph Wagner (S’06–M’11) was born in Zwettl, Austria, in 1980. He received the M.Sc. degree in mechatronics and the Dr.Techn. (Ph.D.) degree in mechatronics from Johannes Kepler University, Linz, Austria, in 2006 and 2010, respectively. In 2007, he became a member of the Christian Doppler Laboratory for Integrated Radar Sensors, Johannes Kepler University. He is currently with Danube Integrated Circuit Engineering (DICE), Linz, Austria. His research interests include circuit and system design for millimeter-wave and microwave radar sensors with an emphasis on digitally intensive techniques for RF imperfection mitigation.

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Ziqiang Tong (S’07) was born in Anhui, China, in 1977. He received the B.S. degree in electrical engineering from the University of Science and Technology of China (USTC), Hefei, China, in 2000 and the M.Sc. degree in communication technology from the University of Ulm, Germany, in 2006. He is currently working toward the Ph.D. degree at the Johannes Kepler University, Linz, Austria. From 2000 to 2003, he worked as network engineer in Information Technology Center of China Post, Anhui Province, China. In 2006, he joined the Institute for communications and Information Engineering, Johannes Kepler University, as a Research Assistant. His research interests include millimeter-wave antenna, as well as interconnects and packaging.

Andreas Stelzer (M’00) was born in Haslach an der Mühl, Austria, in 1968. He received the Diploma Engineer degree in electrical engineering from the Technical University of Vienna, Vienna, Austria, and the Dr.Techn. degree (Ph.D.) in mechatronics (with sub auspiciis praesidentis rei publicae hons.) from the Johannes Kepler University, Linz, Austria, in 2000. In 2003, he became an Associate Professor with the Institute for Communications and Information Engineering and RF Systems, Johannes Kepler University. Since 2003, he has been a key Researcher for the Linz Center of Competence in Mechatronics (LCM) and currently for the 2008 founded Austrian Center of Competence in Mechatronics (ACCM), where he is responsible for numerous industrial projects. Since 2007, he has been Head of the Christian Doppler Laboratory for Integrated Radar Sensors, and since 2011 he has been full Professor at Johannes Kepler University, heading the department for RF-Systems. He has authored or coauthored over 245 journal and conference papers. He is a Reviewer for international journals and conferences. His research is focused on microwave sensor systems for industrial and automotive applications, RF and microwave subsystems, surface acoustic wave (SAW) sensor systems and applications, as well as digital signal processing for sensor signal evaluation. Dr. Stelzer is a member of the Austrian ÖVE. He has served as an Associate Editor for the IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS. He was the recipient of several awards, including the EEEfCOM Innovation Award and the European Microwave Association (EuMA) Radar Prize of the European Radar Conference. He was also the recipient of the 2011 German Microwave Conference (GeMiC) Best Paper Award as well as of the 2008 IEEE Microwave Theory and Techniques Society (IEEE MTT-S) Outstanding Young Engineer Award and the 2011 IEEE Microwave Prize.

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Security Pre-screening of Moving Persons Using a Rotating Multichannel -Band Radar Sebastian Hantscher, Member, IEEE, Beverly Schlenther, Manfred Hägelen, Stefan A. Lang, Helmut Essen, Member, IEEE, Axel Tessmann, Axel Hülsmann, Arnulf Leuther, and Michael Schlechtweg

Abstract—This contribution describes a novel millimeter-wave radar system for security checks of persons. The goal of the system is not the classical airport checkpoint situation, but it should support existing security systems by a fast and effective prescreening of moving persons to identify threats in an early stage. With the proposed experimental system, exceptionally dangerous objects can be detected and localized on the body of moving persons. The radar operates in the band between 96 and 99 GHz and consists of one transmit and five coherent receive channels. The transmit and receive modules are fabricated in split-block technology using 100-nm metamorphic HEMT MMICs processed at Fraunhofer IAF. Index Terms—Millimeter wave integrated circuits, radar signal processing, solid state circuit design, synthetic aperture radar.

I. INTRODUCTION

T

HE protection of critical infrastructures such as airports or train stations has become of vital importance, since terrorists tried to attack them by using improvised explosive devices (Madrid 2004 or on the flight Amsterdam-Detroit 2009). That is why many security systems have been developed [1], [2], especially for security gates on airports. This includes, among other devices, systems for the detection of explosive substances in the hand luggage as well as metallic and nonmetallic objects hidden underneath the cloths of the passenger to be checked. For this purpose, in recent years, a range of new technologies have been tested for their ability to screen persons for all kind of prohibited items. In general, they can be divided into three categories: X-ray, radiometers, and active radar systems. Many X-ray devices (e.g. “Secure 1000 Single Pose” from Rapiscan Systems) use backscatter technology as well as an appropriate image processing algorithm [1]. The quality of the image in terms of the ability to detect as well as identify objects is good; however, this technology produces the undesired “naked images.” Moreover, Manuscript received June 29, 2011; revised November 28, 2011; accepted November 29, 2011. Date of publication February 06, 2012; date of current version March 02, 2012. This work was carried out within the Project ATOM, which was funded by the European Union, 7th framework program, Theme #7 Transport (including Aeronautics), Grant agreement 218041. S. Hantscher, B. Schlenther, M. Hägelen and S. A. Lang are with the Fraunhofer Institute for High Frequency Physics and Radar Techniques FHR, 53343 Wachtberg, Germany (e-mail: [email protected]). H. Essen is with Fraunhofer FHR, 53343 Wachtberg, Germany. A. Tessmann, A. Hülsmann, A. Leuther, and M. Schlechtweg are with the Fraunhofer Institute for Applied Solid State Physics IAF, 79108 Freiburg, Germany. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2011.2181534

X-ray radiation is used, which is a well known and trusted diagnostic tool for medical examinations. Even though the X-ray dose of the body scanners is very low, X-rays do have the disadvantage of being ionizing. Although government tests have determined the technology to be safe, they are harmful for humans, especially for the genetic make-up. Passive millimeter-wave devices do not radiate any kind of electromagnetic waves [2], [3]. Instead, they use the natural radiation of the sky reflected by the human body as well as its selfradiation (Planck’s law). Therefore, they are especially suitable for outdoor and indoor (with additional noise sources) stand-off screening applications, and they have to be very sensitive with respect to the reception of low microwave power levels, making the technology more expensive. Moreover, due to basic physical reasons (similar to a real aperture radar), the image resolution is not as good compared to active millimeter-wave systems, and the antennas are much larger. Active millimeter-wave scanners are the most promising of the emerging scanning technologies because they provide reasonable image resolution and do not use X-rays [4]–[8]. One of the best known commercial scanners is the “ProVision” series from “L3 Communications,” which has been undergoing trials at different European airports. This scanner initially caused privacy concerns by displaying undesirable “naked images,” but this issue was solved by showing a stylized person (like an avatar) with colored squares indicating that a suspicious item has been detected on the body part instead of the processed “naked” radar image. However, the official trial tests carried out by the German Federal Police at the Airport of Hamburg, Germany, showed that this step increased the false-alarm rate remarkably. Moreover, these devices as well as all the others mentioned above suffer from the difficulty that they have a limited throughput because the passenger has to stand still to be screened. This problem becomes more evident due to steadily increasing passenger numbers. Both MMIC based high-resolution active and passive imaging systems for passenger screening have been reported and demonstrated in [9]–[12], which, however, suffer from either complex and thus expensive architectures or too-large integration times to be able to check people without interfering the passenger flow. Also the mentioned commercial scanners do not fulfil this requirement. That is why, for a lot of applications, a tradeoff between scanning speed and image quality is required, which makes desirable low-cost systems that are able to screen people in their motion. For this purpose, a preselection of the passengers is essential for classifying persons as suspicious or not. This procedure

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Fig. 1. Block diagram of the radar front end.

would, for example, help in speeding up the security checks and reduce the waiting queues. Moreover, terror attacks in the airport terminals (Moscow 2011) show that the security concept has to be expanded to the whole airport. A system, for instance, installed at the airport entrances, over moving walkways or escalators could identify dangerous weapons, such as explosive belts, large firearms, or gas bottles worn concealed under clothes or hidden in the baggage. A quick reaction to avoid further damage would be possible. To demonstrate the feasibility of such a system, a rotating -band radar for screening moving persons has been developed and is described in the following. A rail system served as an imitation of a moving walkway. From the technology point of view, improvements in MMIC technology are the key of high-frequency millimeter-wave integrated circuits, which is essential for compact -band systems. The metamorphic HEMT technology developed at IAF enables cost-efficient production of MMICs by using commercial large diameter GaAs wafers and results in high yield and good reliability of multifunctional chips. II. RF FRONT END A. System Concept The operation frequency from 96 to 99 GHz was chosen in the millimeter-wave region because they are well suited for the detection of concealed items. The advantages of millimeter waves include their ability to provide an excellent image identification as well as resolution. Furthermore, even with comparably low powers, e.g. like the 10 dBm of the proposed scanner, they can easily penetrate clothing and detect nonmetallic objects (e.g., ceramic objects and plastic explosives) and are—according to

the current knowledge—not harmful to humans. Moreover, the technology progress in the past years, in particular in the GaAs technology, made a lot of components available, which allow the setup of sensitive and low-noise radar systems. The radar sensor used for the demonstrator operates in a frequency-modulated continuous-wave (FMCW) mode, thus guaranteeing the highest possible average power. The block diagram is depicted in Fig. 1. The heart of the RF front end is the monolithic integrated FMCW radar module described in Section II-B. The nonlinear tuning voltage marked by “V tune” guarantees that a highly linear increasing frequency chirp is generated and radiated by the transmit antenna. The radar is equipped with five receive channels. One receive channel is directly integrated in the FMCW module. It yields the intermediate frequency (IF) signal “IF Out 1,” which is sampled by the back end. Its frequency is directly convertible into the distance to the target. The FMCW module has separate transmit and receive channels, which is equivalent to a bistatic setup. This is important to yield a high dynamic range. In a monostatic configuration, an additional electrical separation between transmit and receive chirp is necessary, which, however, does not work perfectly, leading to an unintended crosstalk from the transmit to the receive path. For the coherent processing of the echoes captured by the antennas to , a four-channel receiver is used that is fed by the transmit chirp. For this purpose, the directional coupler transfers 12 dB of the FMCW module output power to the receiver, where it is internally distributed to four separate mixer stages. In the following, the resulting output signal “IF Out 2” to “IF Out 5” are digitized and, hence, are available for the following image processing. All components are connected by WR-10 waveguides. For this reason, horn antennas were used in order to avoid waveguide transitions. The gain of

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Fig. 2. Details of the opened split-block FMCW module showing the single chip MMIC, quartz waveguide transitions for Tx and Rx and some DC circuitry on PCB.

Fig. 3. Block circuit of the FMCW MMIC with VCO, preamplifier, MPA on -mixer, Lange coupler on the transmit path and LNA, Wilkinson splitter the receive path.

20 dBi gives a good compromise between the reception of sufficient high powers for detecting objects with low radar cross section and a sufficient large beam angle or integration time, respectively, required for the synthetic aperture radar (SAR) processing. B. Integrated Circuits Both the FMCW and receiver circuits have been realized using a 100-nm InAlAs/InGaAs based depletion type metamorphic high electron mobility transistor (MHEMT) technology in combination with coplanar circuit topology, thus leading to an excellent power and gain performance at millimeter-wave frequencies. The basic details of the technology have been published in [13]. The FMCW and receive modules are realized in split-block technology, and a special microcontroller based DC circuitry was designed to gently ramp up the MMIC biases and to improve the electromagnetic discharge protection. The WR-10 waveguide to MMIC transitions are realized by quartz substrates, which include the waveguide field probes and the microstrip to coplanar transitions. The details of the FMCW-module can be seen in Fig. 2 with the MMIC at the center. The MMIC block diagram is shown in Fig. 3. The MMIC includes a broadband VCO for signal generation. The tuning voltage is between 1.5 and 1.0 V ramping the transmit frequency of more than 3 GHz. Although an FET based integrated VCO is not ideal in terms of phase noise, in this case it is sufficient, because of short distances and, therefore, extremely short radar signal return times. The generated signal is preamplified, and a 10-dB coupler generates the LO-signal for the -mixer. The transmitted signal is further amplified to an output power of 10 dBm with only 0.4-dBm variation over the entire chirp bandwidth, as shown in Fig. 4. The receiver inside the FMCW-module consists of an LNA and a Wilkinson splitter that delivers the RF input signals to the two mixers. The LO-signal from the coupler is divided into two paths that are 90 out of phase using a Lange coupler. The and IF signals are directly guided to SMA connectors. The FMCW module has a current consumption of 230 mA at 5-V

Fig. 4. Output power of the VCO versus frequency.

supply. A similar FMCW module having a combined Tx and Rx WR-10 port was already used as a helicopter landing aid and published at [14]. At this system, only -IF output is used and the -IF is terminated. The four channel receiver module is shown in Fig. 5. The WR-10 waveguide module contains four heterodyne front-end MMICs, two of which are shown in Fig. 5(a), together with a part of the bias control circuit, which is shown in Fig. 5(b). The depicted SMA connectors are the four “IF Out 2 to 5” outputs of Fig. 1. For the prevention of low-frequency oscillations, chip and SMD capacitors as well as bias filters have been implemented in the module. The receiver module has a current consumption of 200 mA from a 5-V supply. The LO of the four-channel receiver module is distributed to the four MMICs by three waveguide rat-race couplers, as shown in Fig. 5(a). The waveguide termination of the rat-race couplers isolated ports is located on the other split block side. Fig. 6 shows chip photograph of the fully integrated heterodyne receiver MMIC, as well as the schematic. The incoming RF-signal is amplified by a two-stage cascode LNA having 20-dB gain and a noise figure of 3.3 dB. The amplified RF-signal is afterwards downconverted by a balanced resistive mHEMT mixer circuit. To increase the power level at the LO-port of the mixer, a single-stage cascode buffer medium

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curve in Fig. 8. If a single target would be measured, a sinusoidal IF signal would be expected; however, due to the nonlinear chirp, the phase of the IF signal is nonlinear, as well, resulting in a smeared peak after the Fourier transformation, making a determination of the target range quite impossible. Thus, the VCO has to be fed by an appropriate nonlinear tuning voltage marked by “V tune” in Fig. 1. It is generated as follows: A microcontroller supplies the slope values of each part of the voltage curve. After a D/A conversion, the slopes are integrated to voltage ramps that are transferred to the VCO input. An additional voltage offset can be added to tune the VCO in a certain frequency range. For practical reasons, this curve is approximated by piecewise linear voltages. To carry out the calibration, a corner cube at a distance has been measured. Theoretically, the IF signal should be harmonic; however, in practice, it is distorted by VCO power variation and beat frequencies caused by impedance mismatch of the antenna and the FMCW module. To remove the distortion, the upper and lower envelope curves are determined for subtraction and normalization. Thus, the phase of the measured IF signal can be derived and compared with the theoretical value given by (1)

Fig. 5. (a) Photograph of the -band four-channel receiver module. (b) Photograph of the heterodyne front-end MMICs.

power amplifier (MPA) was also integrated. The overall chip size of the coplanar -band front end is mm . Fig. 7 shows the characteristics of the heterodyne receiver. The measured conversion gain is shown in Fig. 7(a) at an IF frequency of 400 MHz and an LO power of 0 dBm. The conversion gain achieves a maximum of 12 dB at 87 GHz and a minimum gain of 8 dB at 102 GHz. The noise figure of the receiver is shown in Fig. 7(b) and was measured at an IF frequency of 50 MHz and an LO power of 0 dBm. The measured noise figure is not depending on IF frequency, as the receiver noise figure is dominated by the two-stage LNA. The variation between the channels is as low as 1 dB. C. Calibration A crucial step before any FMCW radar measurements can be carried out is a precise calibration due to the nonlinear behavior of the VCO. If the voltage would be swept linearly, the frequency would decrease in the same nonlinear way as the dotted

If the difference between the expected and measured phase is too large, the slope values of the microcontroller are changed until the deviation is less than a predefined threshold. In (1), denotes the bandwidth, the speed of light, the number of slope values, and is the time index. The result of the calibration is illustrated in Fig. 8. The diagram shows the VCO characteristic (VCO frequency over tuning voltage) as well as the tuning voltage (voltage over chirp time) in one plot. The voltage changes within the 4-ms chirp time from 1.2 to 0.5 V, which tunes the VCO from 96 to 99 GHz. The diagram shows a very good agreement between the two curves. The voltage changes in the same way as the VCO output frequency varies in dependency of the tuning voltage. It results in a chirp with linear increasing frequency (frequency increment 775 MHz/ms). III. SIGNAL PROCESSING After the reception of the back-scattered millimeter-wave chirp signals and the following digitization, the raw data have to be focused in range as well as cross-range direction. The basis of this focusing technique is the synthetic aperture approach. In principle, SAR is a method that replaces a large antenna by a multiple of single small antennas for obtaining a high cross-range resolution (either set up in an array-like structure or moved antennas carrying out single measurements at predefined geometric positions). With this approach, the target under test is illuminated and measured from different aspect angles. The resulting data have to be recalculated in such a way as if the transmit signal would have been radiated at the same time from the aperture of a large antenna. In general, there exist many classical [15], [16] and alternative SAR [17]

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Fig. 6. (a) Chip photograph and (b) schematic of a

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-band heterodyne receiver MMIC. Chip size:

mm .

Fig. 8. VCO characteristic (black dots) and tuning voltage (blue solid line) in one diagram.

Fig. 7. (a) Measured conversion gain and (b) measured noise figure as a function of the RF frequency of the -band four-channel receiver module.

algorithms for image formation. For the developed prototype, we used a backprojection approach because it gives an accurate solution of the focusing task. It is adapted on the geometry and added with necessary calibration steps and the compensation of the movement of the person. The computation of the radar image based on the raw data is carried out as follows: First, the measurement geometry (trajectory of the radar movement, target surface) is defined before the

digitized IF signals (receiver output) are compressed in range direction in the next step. Then, the different propagation times in the different waveguides as well as the movement of the person have to be compensated. This is a crucial step as the IF signal phase is directly influenced by these operations. After that, a phase correction of the range compressed data has to be carried out due to the varying distances from the radar to the target during the measurement. With this result, the data are focused in the azimuth direction by a coherent summation over that part of the synthetic aperture that illuminates the target area to be investigated. In the following, these signal processing steps are described in more detail. The measurement geometry in depicted in Fig. 9. For the sake of simplicity, only one receive antenna is shown. The transmit antenna moves during the measurement on a circular aperture (referred in the following as azimuth direction) with the position vector whereby and denote the index and the number of radar positions, respectively, and is the radius of the transmit aperture. (2)

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The sampled IF data of the receiver outputs are described for each channel by a 2D matrix whereby denotes the time index, is the discrete time, and is the number of time samples of the IF signal. For a precise determination of the range to the target, the different waveguide lengths between the components have to be taken into account because additional signal travel times in the waveguides are translated into frequency shifts of the IF signal. For this purpose, the difference between the actual and the measured bistatic distances based on the waveguide lengths has to be calculated and divided by the range resolution . This gives for each receive channel the number of range gates the range profile has to be shifted. Fig. 9. Geometry of the radar scene, with the transmit and receive antenna marked in orange and the cylindrical surface with grid illustrated in green.

Fig. 10. Schematically representation of the range profile correction caused by waveguide travel times. Resolution cells containing target echoes are marked in green; those that are only caused by waveguide length are white.

The receive antennas also move on a circular aperture with a radius of . The index describes the number of the receiver. is the azimuth angle, and is the height difference between transmitter and the receiver .

(3)

In the next step, a focusing surface has to be introduced as the person to be screened is a 3D target. With the setup given in Fig. 9, the radar yields only the information for two dimensions: the first is given by the 1D synthetic aperture defined in (2) and (3), and the second is obtained by the -direction side-looking antenna in combination with the signal bandwidth. In a first approximation, the pixel grid with the position vector is assumed as cylindrical with the grid index in azimuth direction and in the range direction. The target area has pixels around the cylinder in azimuth and pixels in range direction. and are the radius and height of the cylinder, respectively.

(4)

for for

to 5. (5) In (5), the variables to denote the physical waveguide lengths between the components, which are shown in the block diagram in Fig. 1. denotes the group velocity, which is for the center frequency of 97.5 GHz in a WR-10 waveguide for the mode. For the focusing of FMCW radar data in range direction ( -direction), a discrete Fourier transformation, computed by the FFT, is applied to the raw data RP

(6)

, where giving the range profiles RP denotes the frequency index. This operation is called range compression. In the raw data (IF data), the information about the distance to the target is distributed over the whole chirp length, while, after the range compression, the signal width is reduced to having large peak values at those distances on which the energy of the transmit signal has been scattered back to the receiver. In the next step, the range profiles have to be corrected by the values given in (5) yielding for each receiver the corrected range profiles RP RP by a shift of resolution cells for and . This range profile correction is illustrated in Fig. 10 showing the original error-prone resolution cells on the left and the corrected ones on the right. Due to the additional travel time caused by the waveguides, at each antenna position , the first of the resolution cells (marked in white) have to be removed whereby targets are shifted to lower distances. After that the antenna beam spread has to be taken into account to sum up over just those radar positions that illuminate the pixel under investigation. If not enough measurement positions are considered, the length of the synthetic aperture decreases and the azimuth resolution gets worse. In the other case, if the receive signal of antenna positions are used for the azimuth compression which did not radiate the pixel on the target surface under investigation, the radar image gets noisy due to summation over clutter and noise. For this purpose, first the number of radar positions (odd number) illuminating one pixel in the target area has

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to be estimated by evaluating the directional pattern of the antennas. Next, all indices illuminating pixel are determined:

. During the azimuth compression, this variation has to be compensated before the summation in

(7) Then, the index of that radar position illuminating a pixel under that angle being closest to perpendicular incidence is computed by (8) whereby describes the mathematical round operation of a number . Finally, for each pixel, the indices to be used for the following azimuth compression are given by the elements of the vector (9) is a vector with ones. whereby In the next step, for each pixel, the bistatic distance that the wave covered from the transmitter to the target and back to the receiver has to be computed. In this step, it is necessary to take the movement of the person into account. We assumed a steady movement in a positive -direction between the values and , shown in Fig. 9. This movement can be directly compensated during the range calculation as the movements of the person to be screened and the radar are synchronized. The bistatic range for each sensor is given by (10), shown at the bottom of the page, whereby denotes the unit vector in the -direction. In order to map the calculated bistatic range to the index of the resolution cell , has to be divided by the double range resolution (due to the bistatic setup) and rounded. (11) Finally, the azimuth compression is carried out corresponding to a coherent summation. This step focuses the energy spread out during the radar movement at the different antenna positions. When considering the phase of the IF signal of one point scatterer on the target surface , it varies by

(12) over all antenna positions illuminating the pixel to be calculated (given by the elements of the vector from (9)) and over all receive channels is carried out yielding the final radar image . IV. RESULTS A photograph of the radar front end described in Section II is shown in Fig. 11 with the transmitter in the middle of the antenna configuration. The electronic boards at the right side are for supplying a constant power supply of 5 V, signal amplification, and IF filtering. The front end is mounted on an electromechanical rotating platform performing a 360 scan of a person. The radius of the transmit aperture is 0.55 m; the radii of the receivers are 0.55 m, 0.56 m, and 0.58 m; the azimuth angles of the receivers are , 10 , 10 , 20 . It is important to mention that the angle difference between transmit and receive antenna should not be chosen too large. Otherwise, depending on the target surface, the antennas do not illuminate exactly the same point, leading to an information loss of the IF signal phase, and thus a loss of the coherence. The technical specifications are summarized in Table I. The maximum operating range is not restricted by the range ambiguity but by the phase noise of the VCO, which is about 23 dBc measured with a spectrum analyzer 5 MHz away from the 96.4–GHz carrier and 30-kHz video and resolution bandwidth. For targets at larger distances, the propagation time from the transmitter to the receiver becomes longer, resulting in a phase of the transmit chirp that has been significantly drifted away during the propagation time. Therefore, a coherent reception is no longer possible. This effect, however, appears just at distances larger than 10 m. The Doppler shift caused by the motion of the person is only roughly 1% of the IF bandwidth (in the kilohertz range). Thus, a Doppler shift

(10)

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Fig. 11. Photograph of the radar front end consisting of one transmitter and five receivers.

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Fig. 12. Measured point spread function using a corner cube.

TABLE I TECHNICAL DATA OF -BAND RADAR

Fig. 13. Scanner setup.

measurement by radiating up- and downchirps is not necessary in the configuration. To characterize the radar and to evaluate its resolution performance, a corner cube has been measured. Since a corner has a high RCS value and can be considered as a point-like target for a wide angle of view, such a measurement is suitable for estimating the point spread function, the analogon in the radar technique to the impulse response in electrical circuits. Fig. 12 shows the focused image, the amplitude being proportional to the RCS in dependency of the range and cross range. The 3-dB resolution width is about 3 mm in cross range (corresponding to the wavelength) and 5 cm in range (corresponding to the expected value for ). The whole setup of the scanner is depicted in Fig. 13. In order to simulate the movement of a person on a moving walkway, a little wagon on a small rail system, on which the person to be screened stands, is used, which drives 0.2 m during the measurement time (4 s) below the radar. The RF front end rotates 360 during the measurement and captures the echoes at 640 antenna positions. The target surface radius is estimated by 0.2 m. The person is shown in Fig. 14(a) wearing a simulant of explosive tubes on breast height and a grenade and a gun in the pockets; all concealed under a jacket. In the radar image in Fig. 14(b), the weapons could be detected due their RCS being much higher than that of the body. Although an

Fig. 14. (a) Photograph of the person under test wearing an explosive belt stimulant, a grenade (left trouser pocket) and a gun (right trouser pocket), all concealed under a jacket; (b) obtained radar image. The cylindrical surface has been unrolled for a better image interpretation.

identification is not possible, the measurement shows that nonmetallic objects also are detectable, which makes the system feasible for real-time passenger prescreening, for instance, at the entrance of mass transport systems. In this case, it is not the aim to find small items such as wallets by high resolved images but to detect large weapons (guns, explosive belts, etc.). Another measurement example is shown in Fig. 15. In this setup,

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Fig. 15. Radar image of a person wearing a gun at breast height (vertical rotation of the sensor).

the radar rotated vertically in front of the person and thus illuminated the person under a smaller elevation angle than the previous one. This gives much stronger reflections making the contour of the body more visible without violating the privacy at any time. Moreover, the concealed gun can now be identified by its shape. V. CONCLUSION The currently developed scanners used for security checks on airports do not solve the task of handling increasing passenger flows. Moreover, they have a negative impact on the privacy of the persons to be screened. That is why, in this paper, a new prototype of a scanning system was proposed that carries out a full body scan of moving persons. The system operates at 97 GHz in the band, which has not been used before for commercial scan applications. This technology provides an added value to existing security related systems because it supports them by detecting large and dangerous weapons (such as explosive belts), and it can raise an alarm before a potential terrorist can approach the security area. However, the application is not restricted to the airport security checkpoint or the airport terminal. For example, it is usable for the protection of critical infrastructures with high passenger throughput, e.g., mass transport systems. It demonstrated the feasibility of using monolithic integrated millimeter-wave circuits for commercial application. A very compact single-chip FMCW radar sensor with separate transmitter and receiver had been developed. A 100-nm InAlAs/InGaAs based depletion type metamorphic high-electron mobility transistor (MHEMT) technology has been used. The radar module achieves a frequency tuning range between 96 and 99 GHz at an RF output power of 10 dBm. The FMCW radar chip was successfully packaged in a WR-10 waveguide module and used to real-time-monitor the time flow of a gas-assisted injection molding process. The grounded coplanar waveguide technology in combination with metamorphic cascode HEMTs has been demonstrated to be highly suitable for the development of millimeter-wave low-noise heterodyne receiver MMICs. The presented four-channel receiver operates between 84 and 104 GHz

and achieved a maximum conversion gain of 12 dB and an average noise figure of 3.5 dB. The developed radar front end uses an integrated FMCW radar chip with separated transmitter and receiver for increasing the dynamic range) and allows a coherent reception of all five receive channels. This coherence was obtained by using chirp signals that were derived by the same oscillator as well as by a precise chirp linearization. Exemplary measurements showed the feasibility of detecting and localizing a stimulant of an explosive belt, a grenade, and a gun worn concealed under a jacket. With the obtained radar image, the privacy was not violated at any time. Both the MMIC performance (especially the phase noise) and the movement compensation (proper motion of the person) influences directly the image quality (decreasing resolution) due to occurring distortions of the measured phase. As a rule of thumb, significant distortions become visible at phase errors of around . That is why, in the future, the measurement time for one person check will be reduced from currently 4 to 0.1 s ensuring a quasi-stationary measurement. This requires faster chirps with a maximum chirp length of 0.1 ms along with a faster back end due to the increasing IF bandwidth. Future work will focus on polarimetric or interferometric measurements. Moreover, other antenna configurations, in particular those that radiate the person to be screened under nearly perpendicular wave incidence, will be tested and compared. From the signal processing point of view, a real 3D model instead of the cylindrical surface will be used in the future for focusing and projection of the radar data. ACKNOWLEDGMENT The authors would like to thank G. Briese and D. Nöthen for their assistance and support in setting up the radar system. REFERENCES [1] G. Zentai, “X-ray imaging for homeland security,” presented at the IEEE Int. Workshop Imag. Syst. Tech., Chania, Greece, 2008. [2] R. Appleby and R. N. Anderton, “Millimeter-wave and submillimeterwave imaging for security and surveillance,” Proc. IEEE, vol. 95, no. 8, pp. 1683–1690, 2007. [3] R. Appleby and H. B. Wallace, “Standoff detection of weapons and contraband in the 100 GHz to 1 THz region,” IEEE Trans. Antennas Propag., vol. 55, no. 11, pp. 2944–2956, 2007. [4] F. Gumbmann, H. P. Tran, J. Weinzierl, and L.-P. Schmidt, “Optimization of a fast scanning millimeter-wave short range SAR imaging system,” in Proc. Eur. Radar Conf., 2007, pp. 24–27. [5] D. D. Arnone, “Terahertz pulsed imaging and spectroscopy for chemical detection and security,” presented at the Int. Conf. Infrared Millimeter Waves, Williamsburg, VA, 2005. [6] K. B. Cooper, R. J. Dengler, N. Llombart, T. Bryllert, G. Chattopadhyay, E. Schlecht, J. Gill, C. Lee, A. Skalare, I. Mehdi, and P. H. Siegel, “Penetrating 3-D Imaging at 4- and 25-m range using a submillimeter-wave radar,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 12, pp. 2771–2778, 2008. [7] S. Hantscher, S. Lang, M. Hägelen, H. Essen, and A. Tessmann, “Sensor fusion based security concept on airports with a rotating millimeter wave person scanner,” presented at the SPIE Conf. Security Defence, Toulouse, France, 2010. [8] S. Bertl, A. Dallinger, and J. Detlefsen, “Interferometric focusing for the imaging of humans,” IET Radar, Sonar, Navig., vol. 4, no. 3, pp. 457–463, 2010. [9] D. M. Sheen, L. McMakin, and T. E. Hall, “BThree-dimensional millimeter-wave imaging for concealed weapon detection,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 9, pp. 1581–1592, Sep. 2001. [10] L. Zhang, Y. Hao, C. G. Parini, and J. Dupuy, “An experimental millimetre wave imaging system,” presented at the Antennas Propag. Conf., Loughborough, U.K., 2008.

HANTSCHER et al.: SECURITY PRE-SCREENING OF MOVING PERSONS USING A ROTATING MULTICHANNEL

[11] S. S. Ahmed, A. Schiessl, and L. P. Schmidt, “Novel fully electronic active real-time millimeter-wave imaging system based on a planar multistatic sparse array,” in IEEE. Int. Microw. Symp., Baltimore, MD, Jun. 2011. [12] G. N. Sinclair, R. Appleby, P. R. Coward, and S. Price, “Millimeterwave imaging for security scanning,” in Proc. SPIE, 2000, vol. 4032, pp. 40–45. [13] A. Tessmann, A. Leuther, C. Schwörer, and H. Massler, “Metamorphic 94 GHz power amplifier MMICs,” presented at the IEEE MTT-S Int. Microw. Symp., Long Beach, CA, 2005. [14] M. Schlechtweg, A. Leuther, A. Tessmann, A. Hülsmann, O. Ambacher, M. Hägelen, G. Brise, and H. Essen, “Advanced millimeter-wave radar modules for helicopter landing aid,” presented at the Future Security Res. Conf., Karlsruhe, Germany, 2009. [15] K. Tomiyasu, “Tutorial review of synthetic-aperture radar (SAR) with applications to imaging of the ocean surface,” Proc. IEEE, vol. 66, no. 5, pp. 563–583, 1978. [16] J. M. Lopez-Sanchez and J. Fortuny-Guasch, “3-D radar imaging using range migration techniques,” IEEE Trans. Antennas Propag., vol. 48, no. 5, pp. 728–737, May 2000. [17] S. Hantscher, A. Reisenzahn, and C. G. Diskus, “Through-wall imaging with a 3-D UWB SAR algorithm,” IEEE Signal Process. Lett., vol. 15, pp. 269–272, 2008.

Sebastian Hantscher (S’06–M’11) was born in Räckelwitz, German Democratic Republic, in 1980. In 2004, he received the Dipl.-Ing. degree in information systems engineering from the University of Technology, Dresden, Germany, and the Dr.Techn. degree (with distinction) from the Johannes Kepler University, Linz, Austria, in 2008. From 2005 to 2008, he has been with the Johannes Kepler University, where he served as a Lecturer as well as Researcher on signal processing, radar imagery, and hardware concepts for material penetrating ultra-wideband radar systems. During this time, he authored and coauthored more than 40 papers. In 2009, he joined Fraunhofer FHR, Wachtberg, Germany, where he acquires and leads projects in the field of radar based security systems on airports. He is co-holder of a patent on person scanning systems using emerging sensor fusion concepts. His research interests currently include multistatic radar concept engineering for security applications, especially at millimeter-wave frequencies, as well as synthetic aperture radar processing. Dr. Hantscher serves as a reviewer of several scientific journals and is a member of the IEEE MTT Editorial Review Board. Moreover, he has twice organized the IEEE Forum on Sensing and Communication as well as special radar sessions at international conferences.

Beverly Schlenther was born in Lahnstein, Germany, in 1984. She received the Dipl.-Ing. (FH) degree in medical and sports-medical technology from the RheinAhrCampus Remagen of the University of Applied Sciences Koblenz, Germany, in 2009. In 2011, she joined Fraunhofer FHR, where she received the M.Sc. degree from the same university in July 2011 for her thesis about the setup of a multistatic millimeter wave radar for moving person screening.

Manfred Hägelen was born in Ufa, Russia, in 1976 and migrated to Germany in 1991, where he completed his college education and attended his military service. He studied electrical engineering with a main focus on high-frequency techniques at the Technical University of Brunswick, Germany, where he received the Dipl.-Ing. degree in 2002. In January 2003, he started his professional career as Research Associate at the Research Institute for High-Frequency Physics and Radar Techniques (FGAN-FHR). Since September 2009, he has

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worked as teamleader “Sensor Systems for Security Applications” in the department for millimeter wave radar and high frequency sensors of Fraunhofer FHR, Wachtberg, Germany. In his current work, he develops sensors, systems, and algorithms in the research field of security applications.

Stefan A. Lang was born in Mayen, Germany, in 1979. He received the Dipl.-Ing. (FH) degree in laser techniques and the M.Sc. degree (with Hons.) in applied physics, both from the Rhein Ahr Campus Remagen, the University of Applied Sciences Koblenz, Germany, in 2007 and 2009, respectively. Since 2009, he has been with the Fraunhofer FHR, Wachtberg, Germany, where he currently is a Research Scientist, working towards the Ph.D. degree in engineering sciences. His main research interests focus on the field of security scanning: simulation and development of synthetic aperture radar based devices.

Helmut Essen (M’07–SM’11) graduated in Physics from the University of Bonn, Germany, where he received the Dipl.-Ing. degree in 1972 and the Ph.D. (Dr. rer. nat.) degree in 1976. He joined the Max-Planck-Institute for radio astronomy, where he was engaged in the development of millimeter-wave radiometers until 1977. Since then, he was with the FGAN-Research Institute for High Frequency Physics and Radar Techniques as Research Scientist and Group Leader. There he was engaged in the development of millimeter-wave radars in the frequency range of 10 to 220 GHz. His work on target background signatures covered experimental investigations and the development of signal processing algorithms using SAR, InSAR, ISAR, and DBS. Further fields of research have been propagation of radio waves and terahertz imaging for security applications. Since 1995, he has headed the Department of Millimeter Wave Radar and High Frequency Sensors, which has been part of the Fraunhofer Institute of High Frequency Physics and Radar Techniques (FHR) since 2009. He is coauthor of books on remote sensing and author of more than 200 scientific papers. Dr. Essen is a member of the German Physical Society (DPG), the German Terahertz Center, the European Microwave Association (EuMA), and the IEEE Geoscience and Remote Sensing Society. He is a member of the national advisory board on Microwave Technology of the VDE.

Axel Tessmann received the Dipl.-Ing. degree in electrical engineering from the University of Karlsruhe, Germany, in 1997 and the Dr.-Ing. degree in electrical engineering from the University of Karlsruhe, Germany, in 2006. In 1997, he joined the High Frequency Devices and Circuits Department, IAF, Freiburg, Germany, where he is involved in the development of monolithically integrated circuits and subsystems for high-resolution imaging systems up to 340 GHz. He is currently head of the millimeter-wave packaging and subsystem group.

Axel Hülsmann received the Diploma degree in solid state electronics from RWTH Aachen, Germany, in 1986 and the Ph.D. degree in electrical engineering from TU-Munich, Germany, in 1994. Since 1986, with some interruption, he has been with Fraunhofer-IAF, Germany. From 2001 to 2003, he was Vice-President of mergeoptics GmbH, Berlin, Germany, and from 2005 to 2007, he was head of the Research and Development Department at Z-Laser Optoelektronik GmbH, Freiburg, Germany. His major interests are focused on laser- and

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HEMT-devices and systems based on III–V semiconductors. He coauthored numerous papers and holds several patents. Dr. Hülsmann received the Fraunhofer Prize in 1993 for his contribution to MMICs with coplanar waveguides.

Arnulf Leuther received the Dipl. Phys. degree and the Ph.D. degree in physics from the Technical University of Aachen Germany. From 1992 to 1996, he was with Forschungszentrum Jülich. In 1996, he joined Fraunhofer-IAF, Germany. where he is currently head of the lithography group. His research work is focused on the development of advanced III–V-process technologies for metamorphic HEMTs and the fabrication of millimeter-wave and submillimeter-wave MMICs. Dr. Leuther received the Borchert medal from the RWTH Aachen for his dissertation thesis in 1996.

Michael Schlechtweg received the Dipl.-Ing. degree in electrical engineering from the Technical University Darmstadt, Germany, in 1982 and the Dr.-Ing. degree from the University of Kassel, Germany, in 1989. He joined the Fraunhofer Institute for Applied Solid State Physics, Freiburg, Germany, working on the design of millimeter-wave integrated circuits and on nonlinear characterization and modeling of active RF devices. In 1994, he became head of the simulation and modeling group at Fraunhofer IAF. Since 1996, he has led the RF Devices and Circuits Department, focusing on the design and the characterization of devices and integrated circuits based on III–V compound semiconductors for RF applications, as well as the development of integrated circuits and modules for sensor and communication systems up to 500 GHz and above. He has coauthored about 200 scientific publications and holds two patents. Dr. Schlechtweg received the Fraunhofer Prize in 1993 and the European Microwave Prize in 1998.

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120-GHz-Band Wireless Link Technologies for Outdoor 10-Gbit/s Data Transmission Akihiko Hirata, Senior Member, IEEE, Toshihiko Kosugi, Hiroyuki Takahashi, Member, IEEE, Jun Takeuchi, Hiroyoshi Togo, Senior Member, IEEE, Makoto Yaita, Naoya Kukutsu, Member, IEEE, Kimihisa Aihara, Member, IEEE, Koichi Murata, Senior Member, IEEE, Yasuhiro Sato, Member, IEEE, Tadao Nagatsuma, Senior Member, IEEE, and Yuichi Kado, Member, IEEE

Abstract—Our progress in 120-GHz-band wireless link technologies enables us to transmit 10-Gbit/s data transmission over a distance of more than 1 km. The 120-GHz-band wireless link uses high-speed uni-traveling carrier photodiodes (UTC-PD) and InP high-electron mobility transistor (HEMT) millimeter-wave (MMW) monolithic integrated circuits (MMICs) for the generation of MMW signals. We investigate the maximum output power of these devices and compare the phase noise of MMW signals generated by UTC-PDs and InP HEMT MMICs. We describe the antennas we used and their operation technologies. Finally, we investigate the dependence of transmission distance on availability using the statistical rain attenuation data. The calculation results show that the 120-GHz-band wireless link can transmit 10-Gbit/s data over a distance of 1 km with availability of 99.999%. Index Terms—Broadband communications, high-electron mobility transistor (HEMT), millimeter-wave radio communications, photodiode.

I. INTRODUCTION

B

ROADBAND wireless link using the upper millimeter-wave (MMW) band has recently been attracting significant interest among a diverse group comprising telecommunications carriers, mobile telephone and data network operators, broadcasters, consumer electronics manufacturers, enterprise users, and others, because of its gigabit-class data transmission capability. For indoor applications, gigabit-class 60-GHz-band wireless standards, such as WirelessHD and IEEE802.15.3c, have been established, and a WirelessHD system has achieved 4.0 Gbit/s and already been integrated into television systems [1]. For outdoor applications, TV program relay broadcast and high-speed backhaul services for mobile communications appear to be the most promising applications, because the data rate necessary for these applications is increasing in proportion to the broadband trend in high-definition video or new mobile services. The 60-GHz-band and -band wireless link can achieve a data rate from 1.0 to 2.5 Gbit/s, and Manuscript received June 29, 2011; revised November 15, 2011; accepted November 17, 2011. Date of publication January 12, 2012; date of current version March 02, 2012. This work was supported in part by the Research and Development Project for the Expansion of Radio Spectrum Resources, of the Ministry of Internal Affairs and Communications, Japan. A. Hirata, H. Takahashi, J. Takeuchi, H. Togo, M. Yaita, N. Kukutsu, K. Aihara, and Y. Sato are with NTT Microsystem Integration Laboratories, NTT Corporation, Kanagawa 243-0198, Japan (e-mail: [email protected]). T. Kosugi and K. Murata are with NTT Photonics Laboratories, NTT Corporation, Kanagawa 243-0198, Japan. T. Nagatsuma is with the Graduate School of Engineering Science, Osaka University, Osaka 560-8531, Japan. Y. Kado is with Kyoto Institute of Technology, Kyoto 606-8585, Japan. Digital Object Identifier 10.1109/TMTT.2011.2178256

they have been actually used in the mobile backhaul services. It is expected that the over-10-Gbit/s data rate will be required for mobile backhaul in the near future. To achieve a 10-Gbit/s data rate, we have been developing a 120-GHz-band MMW wireless link. The 120-GHz band is an unexplored frequency region in the field of industries, and the absorption coefficient of air is relatively small (about 1 dB/km), compared with a higher frequency region. Therefore, the 120-GHz-band wireless link is suitable for broadband outdoor fixed wireless systems, and we have succeeded in the outdoor transmission of 10-Gbit/s data [2]. The transmission distance and the availability are very important for TV relay broadcast and mobile backhaul applications. In order to increase the transmission distance and availability, we need to increase the output power of the wireless transmitter and decrease the received power necessary for error-free transmission. However, it has been difficult to generate highpower radio signals due to the limitations of semiconductor devices, because semiconductor device characteristics deteriorate as the operation frequency increases. We have used a high-speed uni-traveling carrier photodiode (UTC-PD) [3] and InP highelectron mobility transistor (HEMT) millimeter-wave monolithic integrated circuits (MMICs) [4], both developed by us. An evaluation of rain attenuation is also important for estimating availability, because rain attenuation of 120-GHz-band MMW is large. This paper presents our progress in 120-GHz-band wireless system technologies that contribute to extending the transmission distance of the wireless links. Section II describes the progress in the transmission distance and the technologies we used. Section III explains the devices we use to generate 120-GHz-band radio signals and discusses the possibility of obtaining maximum output power from these devices. Section IV covers the technologies we use to decrease the received power necessary for error-free transmission, such as forward error correction (FEC), and low-noise amplifiers (LNAs). Section V describes the antennas we have used and describes a system for auto-alignment of antenna direction in 120-GHz-band wireless links. Section VI describes in detail our two 120-GHz-band wireless link systems, one of which uses the UTC-PD and other HEMT MMICs, and compares their features. Section VII discusses the transmission distance and availability on the basis of statistical data, such as the cumulative distribution of rain rate and rain attenuation of 120-GHz-band MMWs, obtained in long-term outdoor transmission experiments. Section VIII concludes the paper.

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III. OUTPUT POWER OF DEVICES USED FOR GENERATING THE 120-GHZ-BAND WIRELESS SIGNALS

Fig. 1. Progress in the transmission distance of the 120-GHz-band wireless link.

II. PROGRESS OF THE 120-GHZ-BAND WIRELESS LINK SYSTEM: TRANSMISSION DISTANCE Fig. 1 shows the transmission distance of the 120-GHz-band wireless link. Photographs of the wireless equipment used for the transmission experiments are also shown. At the early stage (2000–2005), the 120-GHz-band wireless signals were generated by photonic technologies, because photonics technologies have broadband characteristics and are suitable for generating high-frequency signals. Moreover, we can modulate MMW signals at a rate of over 10 Gbit/s because we can use high-speed optical Mach–Zehnder modulators in the photonic MMW generation systems. Data transmission over a distance of 2 m at 1.25 Gbit/s was achieved in 2000 [5], [6], and the world’s first 10-Gbit/s data transmission over a radio wireless link was accomplished in 2002 [7]. We used planar antennas in those two experiments. In 2003, we started working on the MMICs for the 120-GHz wireless system. Component circuits, i.e., LNAs, power amplifiers (PAs), modulators, and demodulators, were designed and improved to ensure long-range transmission. PAs and LNAs were implemented to enhance performance of the photonic system. We obtained the first experimental radio station license from the Ministry of Internal Affairs and Communications of Japan in 2004 and conducted the first outdoor transmission experiments over a distance of 170 m [8]. At that stage, 120-GHz-band MMW amplifiers and high-gain antennas, such as Gaussian optic lens antennas or Cassegrain antennas, were introduced into both the transmitter and receiver, which made the outdoor transmission experiments possible. Since 2007, we have been generating the 120-GHz-band wireless signals using InP HEMT MMIC technologies [2]. The InP HEMT MMICs have a narrow operation bandwidth compared with photonic technologies; however, all-electronic systems have advantages of compactness and low cost, especially when the transceiver functions are implemented with MMICs. The wireless equipment was designed to be weatherproof, which makes it possible to conduct long-term outdoor transmission experiments. In 2009, 5.8-km 10-Gbit/s data transmission was achieved in fine weather by increasing the output power and antenna gain and by introducing FEC technologies [9]. As shown in Fig. 1, the transmission distance increased from 2 m to 5.8 km in nine years, mainly due to improvements in output power, receiver sensitivity, and antenna gain. We describe the characteristics of these devices we used in the following sections.

Here, we discuss the 120-GHz-band wireless link output power and investigate the maximum output power that can be obtained by the devices we have used (UTC-PDs or InP HEMTs) in the 120-GHz band. Gunn oscillators, impact oscillators, and backward oscillators (BWO) had been studied as generators of over-100-GHz signal [10]–[12]. These devices can generate over 10 dBm of output power at frequencies above 100 GHz. However, it was difficult to apply these devices for wireless communications because they lacked the characteristics required for telecommunications applications, such as high-frequency stability, frequency tunability, and low phase noise. In particular, the lack of high-speed modulation was a big obstacle to wireless communications applications. Photonic technologies enable us to generate MMW signals at over 100 GHz with conventional photonic devices, and it is possible to modulate MMW signals at a rate of 10 Gbit/s by using optical modulators. Key devices for the generation of over-100-GHz MMW signals are a high-power and high-speed O/E convertor and a low-phase-noise photonic MMW source. We used a UTC-PD as a high-power and high-speed O/E convertor [3]. The UTC-PD uses only electrons as its active carriers, and its prime feature is high current operation. On the other hand, recent technological progress in semiconductor devices has been remarkable. This is especially true for compound semiconductor transistors, such as HEMTs and heterojunction bipolar transistors (HBTs), which are attracting a great deal of interest because of their high-speed characteristics. Recent improvements in electron beam gate lithography are seeing the speed of HEMTs increase as the gate length decreases, and InP HEMTs with maximum oscillation frequency of over 1 THz have already been developed [13]. These transistors enable us to make electronic devices that operate at frequencies over 100 GHz. The transitions in the output power of the 120-GHz-band wireless link are shown in Fig. 2, where the output power is the average power of the ASK-modulated MMW signal output from the transmitter. We used UTC-PDs for the transmitter before 2002, and the output power ranged from about 0 to 7 dBm. Later, we used an InP HEMT MMIC amplifier as a post-amplifier of UTC-PD output and were able to increase the output power up to 10 dBm. Since 2007, we have generated the 120-GHz-band MMW signal with a frequency multiplier and amplifiers made of InP HEMT MMICs, and we have achieved 16-dBm output power using composite-channel (CC) InP HEMT MMICs with improved breakdown voltage [14]. Next, we investigated the saturation output power of the UTC-PD at a frequency of 125 GHz. Critical current of the UTC-PD can be approximated as (1) (2) where is depletion width, is critical electron density, is junction area, is load resistance, is electron overshoot velocity, is dielectric constant, is voltage applied to

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Fig. 2. Changes in output power of the 120-GHz-band transmitter.

the PD, is operation voltage ( 3.0 V), is built-in voltage (0.75 V), and is critical electron field (50 kV/cm) [3]. When the load of UTC-PD is , the relationship between and can be approximated as (3) Therefore,

of the UTC-PD can be approximated as (4)

The frequency characteristics of the UTC-PD output power are determined by the RC time-constant-limited bandwidth and the carrier-transit-time-limited bandwidth . We investigated the effect of junction capacitance on the UTC-PD output power at a frequency of 125 GHz. Junction capacitance is expressed as (5)

of

The ratio of UTC-PD output power at an operation frequency over the output power during dc operation is given by (6)

is parasitic capacitance. where is operation frequency and The effect of UTC-PD series resistance is ignored for simplicity. Therefore, the saturation output power is given by (7) We calculated the junction area dependence of UTC-PD saturation output power using (7). The calculation result is shown in constant cm/s to simplify Fig. 3. We set the the simulation of saturation output power, even though, in reality, changes with . For a UTC-PD with a of 220 GHz ( : 290 nm), maximum output powers of about 8 dBm are obtained with a junction area of about 30–40 m . On the other hand, a maximum output power of about 10 dBm can be obtained when is 310 GHz ( : 230 nm), and the junction area is about 25 m . We measured the maximum output power of UTC-PDs on-wafer with of 220 GHz at a frequency

Fig. 3. Dependence of saturation output power on the PD junction area.

of 125 GHz using a power meter connected to a MMW probe. The measurement results are also shown in Fig. 3. The maximum output powers are 4.0, 8.1, and 7.0 dBm for junction areas of 13, 29, and 50 m , respectively. The measured power qualitatively coincides with the simulation results. Ito et al. showed that the output power of the UTC-PD can be increased by using a matching circuit, and they obtained 13.6 mW at 100 GHz [15]. We applied this technique for the 120-GHz-band wireless link. Fig. 4(a) is the schematic of the equivalent circuit. We measured the -parameter and current–voltage characteristics of the UTC-PD to obtain the equivalent circuit model of UTC-PD. For the calculation, we used the junction area and of the PD of 23 m and 220 GHz, respectively. A resonant matching circuit composed of a short stub circuit compensates for the imaginary part of internal impedance in the UTC-PD at a specific frequency. On the other hand, introducing the resonant matching circuit makes the UTC-PD operation bandwidth narrow. The matching condition can be changed by setting the length of transmission line and that of short stub shown in Fig. 4(a). The simulation results for PDs (PDa-PDe) with matching circuits with different and are shown Fig. 4(b). Table I shows the and of UTC-PDs with a matching circuit. The relative response in the narrowband design at 125 GHz is about 45% to 130% higher than that for the UTC-PD without the matching circuit. On the other hand, there is a tradeoff between the maximum output power and bandwidth. For 10-Gbit/s data transmission using an ASK modulation scheme, the bandwidth of the devices should be about 17 GHz. Fig. 4(c) shows the relationship between the peak power and bandwidth. For PDe, which achieves highest peak power (15 mW), the 1-dB bandwidth is 8 GHz, which is insufficient for 10-Gbit/s data transmission. To obtain the bandwidth of over 17 GHz with a margin, we selected PDb. Fig. 5 shows the measurement results for PDb at 125 GHz. The output power of a PD without a matching circuit is also shown. PDb with a matching circuit exhibits 50% higher efficiency than the one without it, which coincides with the simulation results in Fig. 4(c). These results indicate that a UTC-PD itself can generate about 10 dBm at 125 GHz. However, linearity is required for ASK systems, and 3-dB back-off is required for the ASK modulation scheme; therefore, we have to use a UTC-PD with an output power of a few dBm. One way to obtain over 10 dBm

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Fig. 6. Photographs of InP HEMT MMICs. (a) PA using conventional InP HEMT. (b) PA using CC InP HEMT MMICs. (c) Tx MMIC using conventional InP HEMT. (d) Rx MMIC using conventional InP HEMT.

Fig. 7. Typical current–voltage characteristics of a fabricated 0.8- m-gate CC HEMT with gate width of 40 m.

Fig. 4. (a) Schematic of the equivalent circuit of a UTC-PD with a matching circuit, (b) simulated UTC-PD output power, (c) simulated relationship between 1-dB bandwidth and peak power.

AND

OF

TABLE I UTC-PDs WITH A MATCHING CIRCUIT

Fig. 5. Measured output power of UTC-PDs with and without matching circuit at 125 GHz.

of output power in the 120-GHz band is to introduce of a PA, which we investigate next.

InP HEMT MMICs feature high-speed and high-power operation, and we have succeeded in making PAs that employ an InP HEMT MMIC [4]. A photograph of the PA MMIC chip is shown in Fig. 6(a). The chip size is 1.0 mm 2.0 mm. We investigate the output power of the InP HEMT MMIC PA that operates at a frequency of 120 GHz. The bias point has a major impact on a PA’s output power. The effect of the bias point can be obtained by considering the device’s current–voltage ( – ) characteristic in conjunction with a load line. The maximum output power can be obtained when the load line allows maximum voltage and current excursion. The most effective way to increase the maximum voltage excursion is to increase the breakdown voltage of the InP HEMTs. The use of an InGaAs/InP composite channel (CC) is effective for increasing the breakdown voltage while maintaining high-frequency performance. The 0.08- m-gate CC InP HEMT we have developed typically have a unity current gain frequency of 180 GHz and a maximum oscillation frequency of 580 GHz [16]. Fig. 7 shows typical dc current–voltage characteristics of 0.08- m-gate CC HEMTs at room temperature. The gate width is 40 m. The off-state breakdown voltage of the HEMTs is around 10 V, and reliable operation can be expected below 4.0 V from the results of bias temperature acceleration tests. These values are almost two times higher than those of conventional lattice-matched InP-HEMTs. The output power of an HEMT is expressed as (8)

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where the bias point is and and are drain voltage and drain current that swing on the load line, respectively. Maximum voltage excursion can be obtained when we set the bias point 2.25 V 12 mA , and is expressed as (9) where is voltage swing and is breakdown voltage. The output power of one HEMT calculated by (8) and (9) is about 10 dBm. This calculation is based on a dc load line analysis and is different from the actual ac behavior of the HEMT. The transconductance (gm) of the HEMT decreases at both ends of the load line; therefore, we have to limit the voltage swing to avoid nonlinear operation of the PA. Judging from the drain voltage dependence of gm, should be below 1.0 V and the bias point 2.0 V,13 mA for linear operation. The output power of the HEMT calculated using these values is about 5.4 dBm. We fabricated a PA MMIC using the CC InP HEMTs [14]. The photograph of the PA MMIC using CC InP HEMTs is shown in Fig. 6(b). The chip size is 2.0 mm 2.2 mm. The amplifier has a three-stage common-source configuration. To increase total power handling capability, we divided the amplifier into eight medium-power amplifiers (MPAs) with an on-chip power divider (eight-way) and combiner (eight-way). Each MPA handles only one-eighth of the total RF and dc power. Therefore, narrow transmission lines with a high cut-off frequency and low radiation loss can be used in the cuircuit design. Over 100 HEMTs with a gate width of 30 m were used at the final stage of the PA circuits, and these HEMTs were combined with a power combiner circuit. The total output power calculated from the number and gate width of the HEMTs at the final stage is approximately 25 dBm. We fabricated a PA module by integrating the PA MMICs in a metal package [14]. The photograph of the PA module is shown in Fig. 8(a). The thickness of the PA MMIC chip integrated in a metal package was 0.15 mm. The output of the MMIC was transmitted to the waveguide via a waveguide-to-planar-circuit transition. The MMIC and waveguide-to-planar-circuit transition were connected by wire bonding. Details of the waveguide-to-planar-circuit transition and MMIC integration are shown in [17]. The efficiency of the PA MMIC was below 5%. The output power of the PA module is about 19 dBm, and the saturation output power is about 21 dBm at 125 GHz. There is a 6-dB difference between the PA module output power and the calculated PA MMIC output power. We suppose that the difference is due to loss at the power combiner in the PA MMIC and at the waveguide-to-planar-circuit transition in the PA module. When we use the PA module for an ASK-modulation wireless transmitter, the average power of the transmitter should be 16 dBm for linear operation. From the viewpoint of chip area and power consumption, the number of HEMTs at the final stage can be more than doubled. We think that the Tx with ASK modulation scheme can achieve about 20-dBm average output power by using this CC InP HEMT MMIC.

Fig. 8. Photograph of (a) Rx and Tx module, and (b) PA module. The package of Tx module and Rx module are same.

Fig. 9. Maximum output power of MMW PAs.

We compare the maximum output power of reported PAs in Fig. 9. GaN devices achieve the highest power at frequencies below 100 GHz. Micovic et al. reported a GaN HEMT PA MMIC whose maximum output power is 29.3 dBm at 88 GHz [18]. At frequencies above 100 GHz, InP HEMT devices show higher output power than other devices at the same operation frequency. Deal et al. reported an InP HEMT PA MMIC with an output power of 8 dBm at 270 GHz [19]. Our PA has the highest output power in the 120-GHz band, and the output power of our PA coincides with the trend in the relationship between the maximum output power and the operation frequencies. For the generation of 125-GHz-band signal that is amplitude-modulated at a data rate of 10 Gbit/s, we have developed a transmitter (Tx) MMIC using the standard InP HEMT technologies [4]. In the transmitter MMIC, a frequency multiplier, ASK modulator, and amplifiers are integrated in one chip. The photograph of the transmitter MMIC is shown in Fig. 6(c). The chip size is 1.0 mm 3.0 mm. The transmitter MMIC can generate over 0-dBm 125-GHz-band MMW signal that is ASK modulated at a rate of up to 11.1 Gbit/s. We have developed a Tx module that integrates a Tx MMIC chip in a metal package, as shown in Fig. 8(b) [17]. IV. RECEIVER TECHNOLOGIES The 120-GHz-band wireless link employs an envelope detection method using Schottky barrier diodes (SBDs). Fig. 10 shows the transition in receiver sensitivity. At first, we used a conventional waveguide MMW detector, which had a video

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Fig. 10. Transition in the sensitivity of the 120-GHz-band receiver.

sensitivity of 10 mV/mW when the video load impedance was 1 M . However, we had to set the video load impedance to 50 for high-speed data transmission, which decreased the video sensitivity to 20 mV/mW. We then developed a planar broadband receiver with SBDs and a planar slot ring antenna [6]. The SBD chip was flip-chip bonded on the planar slot ring antenna chip made on a Si substrate. With optimized data output circuits, the receiver achieved a video sensitivity of 190 mV/mW at a load impedance of 50 . In order to improve the video sensitivity of the receiver, we developed a receiver MMIC chip that monolithically integrates HEMT detector and an LNA [4]. The photograph of the receiver MMIC is shown in Fig. 6(d). The chip size is 1.0 mm 3.0 mm. The video sensitivity of the HEMT detector itself is about 400 mV/mW, and with the integration of an LNA with a gain of 33 dB, the sensitivity of the receiver MMIC chip reached 5 10 mV/mW. For the wireless data transmission, it is important to increase the C/N ratio at the receiver. In a wireless transmission system with ASK modulation and envelope detection, a C/N ratio of over 20 dB is necessary for a bit error rate (BER) of 10 [20]. Noise power at the receiver mainly comes from the thermal noise of the LNA, which is given by (10) where is Boltzmann’s constant, is the noise figure (NF) of the amplifier in the receiver, and is the bandwidth of the amplifier. One way to increase the C/N ratio is to improve the NF of the LNA. Fig. 10 shows how the NF has changed for the 120-GHz-band LNA. The NF of the LNA was about 9 dB at first, and it was decreased to 5.6 dB by using a combination of two kinds of matching circuits [21]. We have developed a receiver (Rx) module that integrates an Rx InP HEMT MMIC chip composed of HEMT detector and LNA [Fig. 8(b)] [17]. Introducing a bandpass filter (BPF) in the Rx MMIC chip is effective for increasing the C/N ratio. For this purpose, we employed a planar BPF composed of two dual coplanar open stubs [4]. The becomes 65.2 dBm when the NF is about 5.6 dB and is 20 GHz. Therefore, the theoretical received power necessary for a BER of 10 is 43.6 dBm. We can reduce the required C/N ratio necessary for the data transmission with a BER of by using FEC technologies.

Many kinds of FEC methods, such as low-density parity-check (LDPC) code, BHC code, and punctured code, have been used in various wireless communications systems. On the other hand, several requirements must be met for the application of FEC to the 120-GHz-band wireless link. One of the promising applications of the 120-GHz-band wireless link is live relay broadcast of uncompressed high-definition videos, for which FEC should be able to handle high-speed data with a small latency. Therefore, we selected Reed–Solomon (RS) coding because it satisfies the above requirements. For example, the latency due to FEC should be below one frame of the television signal (below 33 msec) for the transmission of uncompressed high-definition videos in order to keep synchronization between different video signals. The latency of FEC using RS coding is below 10 s, and this value satisfies our requests. FEC using RS coding has already achieved 10-Gbit/s data rate in the optical transport network (OTN). Moreover, FEC using RS coding can obtain coding gain of about 6 dB at a BER of with small increase of data rate (about 7%) [22]. Another way to reduce the required C/N ratio is to change the modulation scheme. The BPSK modulation scheme requires a lower C/N ratio than the ASK modulation scheme. We developed a BPSK modulation module and demodulation module, and a back-to-back test showed that these modules can transmit 10-Gbit/s data with lower received power than ASK modules [23]. Fig. 11 shows the relationship between the BER and the received power of the wireless link at 10 Gbit/s. The BERs were measured by a free-space transmission experiment (Exp. 1) and back-to-back tests (Exp. 2–4). In experiment 1 (Exp. 1), the transmitter used a photonic emitter with a UTC-PD, and the receiver was a planar broadband receiver composed of SBDs and a planar antenna [5]. MMW amplifiers were not used in the transmitter and receiver, and about 3-dBm received power is required for a BER of below 10 . In experiment 2 (Exp. 2), as a transmitter, we used a photonic waveguide module that integrated a UTC-PD chip and PA chip and used an Rx waveguide module as a receiver [8]. The use of an MMW amplifier at both of transmitter and receiver reduces the received power necessary for a BER of to about 30 dBm. In experiment 3 (Exp. 3), we used a Tx module and a PA module as a transmitter and used an Rx module as a receiver, in which a Rx MMIC chip with a BPF and an NF-improved LNA were integrated [2]. The bandwidth limitation by the BPF and the NF improvement of LNA contributed to considerably reduce the received power necessary for a BER of 10 to about 40 dBm. This value is 3.6 dB higher than the theoretical value discussed above with (10). When we used RS (255,239) coding defined in the ITU-T Recommendation G.709 Interfaces in the same transmitter and receiver setup as in Exp. 3, a BER of 10 was obtained when the received power was about 46 dBm (Exp. 4) [9]. This value is about 43 dB lower than that in Exp. 1, in which neither an LNA nor FEC were not employed. V. ANTENNA TECHNOLOGIES For the 120-GHz-band wireless link, the output power is generally smaller than that of microwave wireless systems

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Fig. 11. Relationship between the BER and received power of the wireless link at 10 Gbit/s.

due to the limitation of generator characteristics, as discussed in Section III. Moreover, the received power necessary for error-free transmission is higher than that of microwave systems, because 120-GHz-band wireless system requires a broad bandwidth for the transmission of 10-Gbit/s data. Moreover, the free-space transmission loss is large due to the short wavelength. Therefore, we need to use high-gain antennas to transmit data over a distance of 1 km. At a 120-GHz-band frequency, the reduction of transmission loss between the transmitter/receiver chip and the antenna is important. Therefore, we developed a planar antenna on which a PD is hybridly or monolithically integrated [24]–[26]. Fig. 12(a) is a photograph of the planar slot antenna on which a UTC-PD chip is flip-chip bonded, and Fig. 12(b) shows the diagram of the designed photonic MMW transmitter using the planar slot antenna [24]. The transmitter consists of a planar antenna chip, a UTC-PD chip, a hemispherical Si lens, and an optical fiber with a collimating lens. We used a coplanar waveguide-fed (CPW-fed) slot antenna for the planar antenna chip because it has an antenna pattern perpendicular to the substrate and is suitable for the connection of planar-active devices. The slot antenna and the CPW were formed on a Si substrate , which was 0.4 mm thick. To decrease the dispersion and radiation loss due to the substrate, we used high-resistivity Si and thick gold. The resistivity of the Si was 1 k cm, and the thickness of the gold was 10 m. The antenna gain obtained by a 3-D electromagnetic simulation based on the finite-element method (FEM) was about 13.5 dB. In the data transmission experiments, Teflon lenses with a diameter of 50 mm were used to collimate the output of the planar antenna. The output power of the transmitter was 3 dBm at a frequency of 120 GHz, and we have succeeded in the transmission of 10-Gbit/s data over a distance of 2 m by using a Teflon lens to collimate the MWW beam [7]. However, antenna gain of over 40 dBi is necessary for the 120-GHz-band wireless link to transmit 10-Gbit/s data over a distance of 1 km, and the gain of these antennas shown in Fig. 12 is insufficient. A Gaussian optic lens antenna (GOA) and Cassegrain antenna (CA) have high gain, and both have a waveguide port. Therefore, it was necessary to develop a planar-circuit-to-waveguide transition in order to use these high-gain antennas.

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Fig. 12. (a) Photographs of planar antennas used for the 120-GHz-band wireless link. (b) Schematic of photonic MMW transmitter module using planar slot antenna.

Fig. 13. (a) Photograph of planar-circuit-to-waveguide transition on a Si substrate. (b) Schematic of photonic MMW transmitter module that employs planar-circuit-to-waveguide transition.

Fig. 13(a) shows a photograph of planar-circuit-to-waveguide transition made on a Si substrate, and Fig. 13(b) is a schematic of photonic MMW transmitter module that employs the planarcircuit-to-waveguide transition. [9]. We selected Si substrate because we can use the matured and low-cost Si fabrication process. A UTC-PD chip is flip-chip bonded on a planar-circular chip. The MMW signals travel along a CPW to a tapered slot antenna inserted into the waveguide. The thickness of the Si substrate was set to 100 m to reduce the effect of surface waves. Optical MMW signals are input to the UTC-PD from the backside, and the UTC-PD converts them into MMW signals. The MMW signals travel along a coplanar waveguide (CPW) to a tapered slot antenna inserted into the waveguide. Fig. 14 shows the simulated -parameter of the planar-circuit-to-waveguide transition. We employed the finite element method (FEM) for the simulation. The input port is the CPW, and the output port is the waveguide. The insertion loss improves as the substrate gets thinner; it is below 2 dB when the substrate is 100 m thick at a frequency of 90–140 GHz. We also developed a planar-circuit-to-waveguide transition made on a quartz substrate to reduce the transmission loss [17]. The planar-circuit-to-waveguide transition is composed of a CPW-to-slotline (SL) transition, SL, and monopole antenna placed on the waveguide. With the development of the planar-circuit-to-waveguide transition, it became possible to use high-gain GOAs and CAs. Table II shows the gain of the antennas we used for the 120-GHz-band wireless link. The GOAs have a smaller diameter than the CAs, though their gains are comparable. A standard gain horn antenna was integrated in the GOAs. The half power beamwidth (HPBW) of CAs is smaller than that

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Fig. 15. Schematic of the auto-alignment system. Fig. 14. Simulated S parameter of planar-circuit-to-waveguide transition that uses Si substrates with different thicknesses.

TABLE II CHARACTERISTICS OF ANTENNAS FOR THE 120-GHz-BAND WIRELESS LINKS

of GOAs. These results indicate that the antenna efficiency of GOAs is higher than that of CAs. However, GOAs are much heavier than CAs even at similar antenna gain. Therefore, we have mainly used CAs for 120-GHz-band wireless links. As shown in Table II, the beamwidth of the antennas is very narrow, which makes the alignment of the antenna difficult during setup. A telescope can be attached to the antenna of the 120-GHz-band wireless link, and we can make the telescope’s axis direction coincide with the direction of the main lobe of the antenna. At setup, we roughly align the antenna direction manually using the telescope, then we do a fine alignment by monitoring the received power. The 120-GHz-band wireless link is unidirectional, so we have to send the received power information to the transmitter side by using some other method of wireless communications, such as a cellular phone, when the direction of the transmitter antenna is aligned. This process takes time and requires an operator with alignment experience. We therefore developed a system for auto-alignment of antenna direction. Figs. 15 and 16 show a schematic and photograph of the system, respectively. The system uses a 2.4-GHz-band wireless local area network (LAN) to send the control signal and received power information between the transmitter and receiver. The wireless LAN uses the IEEE 802.11g standard, and it can transmit 12-Mbit/s data over a distance of 10 km using a high-gain parabolic antenna. The PC at the receiver side controls the motion of the antenna platforms of the transmitter and receiver alternately to maximize the received power at the receiver. The PC at the receiver side calculates the received power from the monitor voltages output from the receiver. Fig. 17 shows the scanning algorithm of auto-alignment program. The auto-alignment program consists of a coarse alignment step and a fine alignment step. We can change the scanning area in the coarse alignment step. In Step 1, the Rx antenna scans coarsely as shown in Fig. 17. When no MMW power is detected by Rx during coarse scanning, the direction of Tx

Fig. 16. Photograph of the auto-alignment experiment (transmitter).

Fig. 17. Scanning algorithm of auto-alignment system.

antenna moves to the next position, then the Rx antenna starts coarse scanning. When MMW power is detected by Rx, the program moves to Step 2. The coarse scanning of Rx antenna stops when MMW power is detected, and fine scanning of Rx antenna starts. When the fine scanning finishes, Rx antenna moves to the position that maximum received power was obtained during fine scanning. After that, Tx antenna starts fine scanning, and moves to the position that maximum received power was obtained during fine scanning. Fig. 18 shows the time necessary for auto-alignment. In the experiment, we set the transmitter and receiver 1 km apart. First, we aligned both the transmitter and receiver antenna directions to obtain the maximum received power, then we shifted both the transmitter and receiver antenna directions by a certain offset angle. At this stage, we started the auto-alignment program. We set the scanning area to be . The system achieves

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Fig. 18. Dependence of time necessary for auto-alignment on the offset angle of the antenna.

auto-alignment in a 4–10 min when the offset angle is below 1.4 . This is comparable to the time it takes experienced operator to align the antennas. When offset angle is over 1.7 , the auto-alignment system does not converge, because we set the coarse scanning area to be . The antenna direction can be aligned manually within from the right directions with the telescope. Therefore, it is possible for anyone to align the antenna direction by first aligning both the transmitter and receiver antennas using the telescope and then starting the auto-alignment program. With the auto-alignment system, the antenna directions can be aligned when the transmitter and receiver are set 1 km apart. The time for auto-alignment mainly depends on the time necessary for the first coarse scanning. We can decrease the time by increasing the speed of coarse scanning.

Fig. 19. Schematic of 120-GHz band wireless transmitter using a UTC-PD (Tx1).

VI. 120-GHZ-BAND WIRELESS SYSTEM As described in Section III, we have developed two technologies for the generation of 120-GHz-band wireless signals. In this section, we present 120-GHz-band wireless systems using UTC-PD and InP HEMT MMIC technologies and compare the features of each system. Fig. 19 shows a schematic diagram of the 120-GHz-band wireless transmitter using a UTC-PD (Tx1). The transmitter is composed of a low-phase-noise photonic MMW generator, data modulator and a UTC-PD module. In the photonic MMW generator, the output of an ultra-narrow-linewidth single-mode laser is modulated at a frequency of 62.5 GHz with a optical intensity modulator. The 62.5-GHz CW signals are generated by multiplying the output of a 15.625-GHz phase locked oscillator (PLO). The phase noise of PLO used in Tx1 is shown in Fig. 20. The modulated optical signals are fed into a planar lightwave circuit (PLC) that integrates an arrayed waveguide grating (AWG) and 3-dB coupler [27]. The channel spacing of the AWG is 60 GHz, and two output channels with an interval of 120 GHz are connected with the 3-dB coupler. The PLC therefore acts as an optical filter that outputs two modes whose frequency interval is 125 GHz. The output signal is amplified by an erbium-doped optical fiber amplifier (EDFA). The optical MMW signal is modulated by data signals. The modulated optical signal is amplified by the second EDFA. The amplified optical signal is input into the UTC-PD module, which is composed of a UTC-PD and an InP HEMT MMIC amplifier [28]. The optical MMW signal is O/E-converted and amplified by the UTC-PD module. The generated MMW signal is transmitted from a high-gain antenna. The 120-GHz-band wireless

Fig. 20. SSB phase noises of down-converted 125-GHz CW signal generated by Tx1 and Tx2. SSB phase noises of PLOs used in Tx1 and Tx2 are also shown.

signals are generated in the photonic MMW generator, and the head of the wireless equipment only acts as an O/E convertor, which makes the head of the wireless equipment light and reduces its power consumption. A schematic of the 120-GHz-band wireless receiver is shown in Fig. 21. The receiver employs a receiver module [17] with a receiver MMIC chip [4]. The photograph of the receiver (Rx) module is shown in Fig. 8(b). The receiver module amplifies the received MMW signals and demodulates them. The gain and NF of LNA used in the receiver module was 33 and 5.6 dB, respectively [4]. The demodulated data signals are amplified with a base-band amplifier. The demodulated data signals are clock-and-data recovered and converted into optical signal with an E/O converter. Fig. 22 shows a schematic of the 120-GHz-band wireless transmitter using InP HEMT MMIC technologies (Tx2). The transmitter is composed of three components: the head, which generates the radio signal; the controller, which supplies power and the data signal and control signals to the head; and the antenna. The optical 10-Gbit/s data signals are input into the controller and transmitted to the head, where the optical data signals are O/E-converted. The transmitter uses three MMW modules:

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TABLE III SPECIFICATIONS OF 120-GHz-BAND WIRELESS LINKS USING PHOTONIC TECHNOLOGIES (Tx1) AND InP HEMT MMIC TECHNOLOGIES (Tx2)

Fig. 21. Schematic of 120-GHz band wireless receiver.

Fig. 22. Schematic of 120-GHz band wireless transmitter using InP HEMT MMICs (Tx2).

a Tx module and two PA modules [14], [17]. The photographs of PA modules and Tx module are shown in Fig. 8(a) and Fig. 8(b), respectively. The Tx module multiplies 15.625-GHz CW signal from a PLO up to 125 GHz. The phase noise of the PLO used in Tx2 is shown in Fig. 20. The ASK modulator in the Tx module modulates the 125-GHz MMW signal with 10-Gbit/s data signal, and the modulated 125-GHz MMW signals are amplified up to 0 dBm. The output of the Tx module is input to the first PA module. The first PA module amplifies the MMW signals up to 10 dBm; the second one amplifies them up to 16 dBm and outputs them to the Cassegrain antenna. The configuration of the receiver is almost the same as that shown in Fig. 21. Table III shows the specifications of the wireless link systems using Tx1 and Tx2. The head of Tx2 is larger and heavier than the one using photonic technologies; however, the controller is much smaller than the photonic system controller (photonic MMW generator) because MMW signals are generated in the head. Moreover, the power consumption is smaller than that of the photonic systems. Next, we compare the phase noise of the MMW signals generated by the UTC-PD with that of the signals generated by the InP HEMT MMICs. Fig. 20 shows the single sideband (SSB) phase noise of the down-converted MMW signal. The 125-GHz CW signal generated by Tx1 and Tx2 are down-converted to 5 GHz by a sub-harmonic mixer. The SSB phase noise of the PLOs used in Tx1 and Tx2 are also shown. The phase noise of the MMW signal generated by Tx1 and Tx2 are almost the same at an offset frequency of over 2 kHz, and they are about 90 dBc/Hz at an offset frequency of 100 kHz, which is larger

than that of the 15.625-GHz PLO by about 18 dB. This result agrees well with the theory regarding phase noise (Phase noise is increased by 20 log(m), where m is the multiplication order [29]). The phase noise of Tx1 is smaller than that of Tx2 below 2 kHz, which is due to the phase noise difference of the PLOs used in Tx1 and Tx2. These results indicate that the phase noises of the MMW signal generated by photonic technologies and InP HEMT technologies are almost the same when the RF source (PLO) phase noise and multiplication order are the same, that the optical comb signal is coherent, and that the optical filtering process with AWGs does not affect the phase noise. Finally, we mention the features of the wireless link using photonic technologies and InP HEMT technologies. The biggest merit of photonic technologies is that more than one radio station can share the radio signal generator. In this case, the head of the transmitter is composed of an O/E convertor and amplifier, which makes the head of the transmitter small, simple and low-cost with low power consumption. Another merit of this system is the flexibility of the wireless system. We can change the modulation scheme of the wireless link without changing the head of the transmitter. Moreover, the introduction of wavelength division multiplexing (WDM) technologies makes the construction of the multi-band wireless system possible. Multiband radio-on-fiber (RoF) signal can be transmitted to a base station through a fiber by using WDM technologies, therefore, we can select the most suitable wireless band depending on the climate or traffic of the link. Due to these advantages, the 120GHz-band wireless links using photonic technologies are expected to be promising for the next-generation of mobile wireless backhaul networks or indoor wireless LANs. The next-generation of mobile wireless networks will require a large number of gigabit-class base stations because the transmission distance becomes short compared with the present base stations due to the increase of transmission capacitance. On the other hand, a radio signal generator composed of conventional photonic components is more expensive and consumes more power than one that uses MMICs. In view of total system cost, the cost of a

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radio signal generator per one wireless link decreases when the number of transmitters that share the radio signal generator becomes large, and the merit of wireless links using photonic technologies appears. The 120-GHz-band wireless link using InP HEMT MMICs has the merits of a small size, simple structure, light weight, low power consumption and low cost because all functions are implemented into millimeter-size MMIC chips. Therefore, it can be assembled quickly and is easy to operate. Moreover, it now consumes less than 100 W, so that it can be operated using a 12-V battery. On the other hand, it is impossible to change the modulation scheme and operation frequency. Due to these features, the 120-GHz-band wireless link using InP HEMT MMIC technologies is suitable for live TV relay because there is a strong demand to reduce the time required from arrival on the site to becoming broadcast-ready to broadcast much as possible. Wireless links for disaster recovery and temporary wireless links for public viewing and large-scale events are also promising applications of the 120-GHz-band wireless link using InP HEMT MMICs.

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Fig. 23. Rain rate cumulative distribution from March 2008 to October 2009 in the Atsugi, Japan, area.

VII. INVESTIGATION OF TRANSMISSION DISTANCE The attenuation of 120-GHz-band MMW signals by atmosphere and rain is large compared with microwave signals. Therefore, it is important to take these attenuations into consideration in estimating the transmission distance of 120-GHz-band wireless link. We have already reported measurement results of rain attenuation on a 120-GHz band wireless link from March to December, 2008 [30]. To increase the accuracy of the statistical analysis, we continued the measurement of rain attenuation using the same experimental setup to the end of September 2009, giving us a total measurement period of one year and seven months. The wireless link is set up at the NTT Atsugi R&D Center. The experimental site in Atsugi (Japan) is at latitude and longitude and about 93 m above sea level. The length of the link is about 400 m. Fig. 23 shows the rain rate cumulative distribution from March 2008 to October 2009 in the Atsugi, Japan, area. In this work, the rain rate was calculated by multiplying the experimental results for the one-minute rain rate by 60 to express the rain rate in millimeters per hour and thereby make comparisons with other technical reports easy. The rain rate for 0.1%, 0.01% and 0.001% cumulative distributions are 25, 58 and 96 mm/hr, respectively. We compared the result with the theoretical cumulative distribution models, i.e., conditional M distribution [31], and the conditional M distribution agrees well over the region of 0.03%. Fig. 24 shows the dependence of the attenuation coefficient due to rain on the one-minute rain rate during the same period as in Fig. 23. In general, the specific attenuation (dB/km) is approximately expressed as (11) where is the rain rate (mm/hr) and and are functions of frequency, dropsize distribution and rain temperature [32]. In the ITU model, is 1.13 and is 0.732. The specific attenuation using the ITU model is also shown in Fig. 24. The measurement

Fig. 24. Dependence of the attenuation coefficient due to rain on the one-minute rain rate from March 2008 to October 2009 in the Atsugi, Japan, area.

results agree well with the ITU model in the range from 10 to 80 mm/hr. The rain attenuation obtained by the year-round measurement is about 9, 17 and 23 dB/km when the rain rate is 20, 40 and 60 mm/hr, respectively. Using these statistical analysis results, we investigated the dependence of transmission distance on the output power as a parameter of availability. The received power is given by dB (12) where is transmitter output power, is transmission distance, is wavelength, is transmitter antenna gain, is receiver antenna gain, and is atmospheric gaseous loss, and is rain attenuation coefficient. We assumed the maximum transmission distance to be the distance where calculated by (12) is below 44 dBm, which is the minimum received power necessary for a BER of . We changed the value of depending the availability obtained by the cumulative distribution of the rain rate shown in Fig. 23. The calculation results are shown in Fig. 25 for and of 52 dBi. In fine weather, is about 10 km when is 16 dBm. When increases to 20 and 30 dBm, is about 13 and 20 km, respectively. On the other hand, decreases drastically due to the rain attenuation. In order to guarantee the availability of 99.9% and 99.999% (rain rate: 25 and 96 mm/hr), becomes about 1.8 and 1.0 km, respectively, when is 16 dBm. The increase in up to 30 dBm does not affect

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Fig. 25. Calculation results of relationship between the transmission distance and output power as a parameter of output power and availability. The antenna gain is 52 dBi.

rier transit time-limited bandwidth and PD junction area, and the state-of-the-art UTC-PD can generate about 8-dBm output power at 125 GHz by introducing a matching circuit. For the InP HEMT MMIC, breakdown voltage mainly determines the maximum output power, and we have achieved a of 16 dBm by using composite channel InP HEMT MMICs with improved breakdown voltage. The phase noise of 125-GHz CW signals generated by UTC-PDs and InP HEMTs are almost the same, about 90 dBc/Hz at an offset frequency of 100 kHz. Due to the increase in the output power and receiver sensitivity of the 120-GHz-band wireless link, we have achieved a 10-Gbit/s data transmission over a distance of 5.8 km in a fine weather. We investigated the transmission distance dependence of availability using statistical rain attenuation obtained at Atsugi Japan for over one year. The rain attenuation statistics data show that the 120-GHz-band wireless link can transmit 10-Gbit/s data over a distance of 1 km with availability of 99.999%. ACKNOWLEDGMENT The authors would like to thank Dr. T. Enoki for his encouragement and discussions. REFERENCES

Fig. 26. Calculation results of transmission distance as a parameter of antenna gain and availability. The output power is 16 dBm.

in heavy rain condition so much compared with that in the fine weather conditions, and becomes about 2.6 and 1.3 km for the 99.9% and 99.999% availability, respectively. As discussed in Section III, PAs based on InP HEMT MMICs have already achieved 16-dBm output power and have a potential to generate 20-dBm output power at 125 GHz. On the other hand, it is difficult to achieve 30-dBm output power with state-of-the-art InP HEMT MMIC technology. Therefore, it may be possible to transmit 10-Gbit/s data over a distance of 10 km in a fine weather, however, it will be difficult to achieve a 20-km-long transmission distance in the near future. Fig. 26 shows the dependence of on antenna gain as a parameter of availability when is 16 dBm. When antenna gain is 30 dBi, is about 200 m in fine weather. For availability of 99.999%, is about 130 m. When we use a 60-dBi antenna, is over 20 km in fine weather. These results indicate that the 120-GHz-band wireless link has the potential to transmit 10-Gbit/s data over a distance of 10 km in a fine weather and that it guarantee the transmission distance of about 1 km with availability of 99.999% in Japan. VIII. CONCLUSION For outdoor applications of 120-GHz-band wireless links, increasing output power and receiver sensitivity is very important. The key devices for the generation of 120-GHz-band wireless signal are a UTC-PD and InP HEMT MMIC. The maximum output power of the UTC-PD mainly depends on the car-

[1] J. M. Gilbert, C. H. Doan, S. Emami, and C. B. Shung, “A 4-Gbps uncompressed wireless HD A/V transceiver chipset,” IEEE Micro, vol. 28, pp. 56–64, 2008. [2] A. Hirata, R. Yamaguchi, T. Kosugi, H. Takahashi, K. Murata, T. Nagatsuma, N. Kukutsu, Y. Kado, N. Iai, S. Okabe, S. Kimura, H. Ikegawa, H. Nishikawa, T. Nakayama, and T. Inada, “10-Gbit/s wireless link using InP HEMT MMICs for generating 120-GHz-band millimeter-wave signal,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 5, pt. 1, pp. 1102–1109, May 2009. [3] T. Ishibashi, T. Furuta, H. Fushimi, S. Kodama, H. Ito, T. Nagatsuma, N. Shimizu, and Y. Miyamoto, “InP/InGaAs uni-traveling-carrier photodiodes,” IEICE Trans. Electron., vol. E83-C, no. 6, pp. 938–949, 2000. [4] T. Kosugi, T. Shibata, T. Enoki, M. Muraguchi, A. Hirata, T. Nagatsuma, and H. Kyuragi, “A 120-GHz millimeter-wave MMIC chipset for future broadband wireless application,” in IEEE MTT-S Int. Microw. Symp. Dig., 2003, vol. 1, pp. 129–132. [5] A. Hirata, N. Sahri, H. Ishii, K. Machida, S. Yagi, and T. Nagatsuma, “Design and characterization of millimeter-wave antenna for integrated photonic transmitter,” in Proc. Asia–Pacific Microwa. Conf., Sydney, Australia, Dec. 3–6, 2000, pp. 70–73. [6] A. Hirata, M. Harada, and T. Nagatsuma, “120-GHz wireless link using photonic techniques for generation, modulation, and emission of millimeter-wave signals,” J. Lightw. Technol., vol. 21, no. 10, pp. 2145–2153, Oct. 2003. [7] T. Minotani, A. Hirata, and T. Nagatsuma, “A broadband 120-GHz Schottky-diode receiver for 10-Gbit/s wireless links,” IEICE Trans. Electron., vol. E86-C, no. 8, pp. 1501–1505, 2003. [8] A. Hirata, T. Kosugi, T. Shibata, and T. Nagatsuma, “High-directivity photonic emitter using photodiode module integrated with HEMT amplifier for 10-Gbit/s wireless link,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 8, pp. 1843–1850, Aug. 2004. [9] A. Hirata, T. Kosugi, H. Takahashi, J. Takeuchi, K. Murata, N. Kukutsu, Y. Kado, S. Okabe, T. Ikeda, F. Suginosita, K. Shogen, H. Nishikawa, A. Irino, T. Nakayama, and N. Sudo, “5.8-km 10-Gbps data transmission over a 120-GHz-band wireless link,” in Proc. IEEE Int. Conf. Wireless Inf. Technol. Syst., 2010, paper 207.1. [10] M. R. Kumar, D. Kumar, and A. K. Shukla, “Development of D-band Gunn oscillator,” in Proc. Int. Conf. Recent Adv. Microw. Theory Applic., 2008, pp. 316–318. [11] J. Wenger and S. Huber, “Low-noise D-band IMPATT oscillators,” Electron. Lett., vol. 23, pp. 475–476, 1987. [12] A. R. Harvey, G. M. Smith, and J. C. G. Lesurf, “Phase noise measurements of a D-band backward wave oscillator,” IEEE Microw. Guided Wave Lett., vol. 4, pp. 271–273, 1994.

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[13] R. Lai, X. B. Mei, W. R. Deal, W. Yoshida, Y. M. Kim, P. H. Liu, J. Lee, J. Uyeda, V. Radisic, M. Lange, T. Gaier, L. Samoska, and A. Fung, “Sub 50 nm InP HEMT device with fmax greater than 1 THz,” in Proc. IEEE Int. Electron Devices Meeting, 2007, pp. 609–611. [14] T. Kosugi, H. Sugiyama, K. Murata, H. Takahashi, A. Hirata, N. Kukutsu, Y. Kado, and T. Enoki, “A 125-GHz 140-mW InGaAs/InP composite-channel HEMT MMIC power amplifier module,” IEICE Electron. Exp., vol. 6, pp. 1764–1768, 2009. [15] H. Ito, T. Nagatsuma, A. Hirata, T. Minotani, A. Sasaki, Y. Hirota, and T. Ishibashi, “High-power photonic millimetre wave generation at 100 GHz using matching-circuit-integrated uni-travelling-carrier photodiodes,” Proc. Inst. Electr. Eng.—Optoelectron., vol. 150, no. 2, pp. 138–142, 2003. [16] H. Sugiyama, T. Kosugi, H. Yokoyama, K. Murata, Y. Yamane, M. Tokumitsu, and T. Enoki, “High-performance InGaAs/InP composite-channel high electron mobility transistors grown by metal-organic vapor-phase epitaxy,” Jpn. J. Appl. Phys., vol. 47, no. 4, pp. 2828–2832, 2008. [17] T. Kosugi, M. Tokumitsu, K. Murata, T. Enoki, H. Takahashi, A. Hirata, and T. Nagatsuma, “120-GHz Tx/Rx waveguide modules for 10-Gbit/s wireless link system,” in IEEE Compound Semicond. IC Symp. Dig., Nov. 2006, pp. 25–28. [18] M. Micovic, A. Kurdoghlian, K. Shinohara, S. Burnham, I. Milosavljevic, M. Hu, A. Corrion, A. Fung, and R. Lin, “W-band GaN MMIC with 842 mW output power at 88 GHz,” in IEEE MTT-S Int. Microw. Symp. Dig., 2010, pp. 237–239. [19] W. R. Deal, X. B. Mei, V. Radisic, B. Bayuk, A. Fung, W. Yoshida, P. H. Liu, J. Uyeda, L. Samoska, T. Gaier, and R. Lai, “A new sub-millimeter wave power amplifier topology using large transistors,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 8, pp. 542–544, 2008. [20] S. Sekino, Basis of Digital Modulation and Demodulation Circuit (in Japanese). Tokyo, Japan: Ohm, pp. 30–35. [21] H. Takahashi, T. Kosugi, A. Hirata, K. Murata, and N. Kukutsu, “120GHz-band low-noise amplifier with 14-ps group-delay variation for 10-Gbit/s data transmission,” in Proc. 38th Eur. Microw. Conf., Amsterdam, The Netherlands, Oct. 27–31, 2008, pp. 1457–1460. [22] A. Hirata, N. Iai, R. Yamaguchi, H. Takahashi, T. Kosugi, K. Murata, N. Kukutsu, Y. Kado, S. Kimura, S. Okabe, H. Ikegawa, H. Nishikawa, T. Nakayama, and T. Inada, “10-Gbit/s data transmission with forward error correction using a 120-GHz-band wireless link,” presented at the Asia–Pacific Microw. Conf., Macau, China, Dec. 16–20, 2008, A3-11. [23] H. Takahashi, T. Kosugi, A. Hirata, K. Murata, and N. Kukutsu, “10-Gbit/s BPSK modulator and demodulator for a 120-GHz-band wireless link,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 5, pp. 1361–1368, May 2011. [24] A. Hirata, H. Ishii, and T. Nagatsuma, “Design and characterization of a 120-GHz millimeter-wave antenna for integrated photonic transmitters,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 11, pp. 2157–2162, Nov. 2001. [25] A. Hirata, T. Furuta, and T. Nagatsuma, “Monolithically integrated Yagi-Uda antenna for photonic emitter operating at 120 GHz,” Electron. Lett., vol. 37, no. 18, pp. 1107–1109, Aug. 2001. [26] A. Hirata, T. Minotani, and T. Nagatsuma, “A 120-GHz microstrip antenna monolithically integrated with a photodiode on Si,” Jpn. J. Appl. Phys., vol. 41, no. 3A, pt. 1, pp. 1390–1394, Mar. 2002. [27] A. Hirata, H. Togo, N. Shimizu, H. Takahashi, K. Okamoto, and T. Nagatsuma, “Low-phase noise photonic millimeter-wave generator using an AWG integrated with a 3-dB combiner,” IEICE Trans. Electron., vol. E88-C, no. 7, pp. 1458–1464, Jul. 2005. [28] H. Ito, T. Furuta, A. Hirata, T. Kosugi, Y. Muramoto, M. Tokumitsu, T. Nagatsuma, and T. Ishibashi, “Pre-amplifier-integrated uni-travelingcarrier photodiode module with a rectangular waveguide-output port for operation in the 120-GHz band,” in Proc. IEEE LEOS Conf., 2004, vol. 1, pp. 128–129. [29] R. T. Logan, Jr., “All-optical heterodyne RF signal generation using a mode-locked-laser frequency comb: Theory and experiments,” in IEEE MTT-S Int. Microw. Symp. Dig., 2000, vol. 3, pp. 1741–1744. [30] A. Hirata, R. Yamaguchi, H. Takahashi, T. Kosugi, K. Murata, N. Kukutsu, and Y. Kado, “Effect of rain attenuation for a 10-Gb/s 120-GHz-band millimeter-wave wireless link,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 12, pt. 2, pp. 3099–3105, Dec. 2009. [31] T. Taga, M. Ishida, and O. Sasaki, “Comparison of methods for estimating one-minute rainfall rate distribution and proposal of a method using conditional M distribution” (in Japanese) Tech. Rep. IEICE, AP2007-57, 2002, pp. 7–12.

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[32] “Propagation data and prediction methods required for the design of terrestrial line-of-sight systems,” ITU, Geneva, Switzerland, Rec. ITU-R P.530-11, Sep. 2006. Akihiko Hirata (SM’11) received the B.S. and M.S. degrees in chemistry and Dr. Eng. degree in electrical and electronics engineering from Tokyo University, Tokyo, Japan, in 1992, 1994, and 2007, respectively. He joined Nippon Telegraph and Telephone Corporation (NTT), Atsugi Electrical Communications Laboratories (presently NTT Microsystem Integration Laboratories), Kanagawa, Japan, in 1994. He is currently a Senior Research Engineer and Supervisor with NTT Microsystem Integration Laboratories. His current research involves millimeter-wave antenna and ultra-broadband millimeter-wave wireless system. Dr. Hirata is a member of the Institute of Electrical, Information and Communication Engineers (IEICE) of Japan. He received the 2002 Asia–Pacific Microwave Conference APMC prize, the 2004 YRP Award, the 2007 Achievement Award presented by the IEICE, the 2008 Maejima Award presented by the Post and Telecom Association of Japan, 2009 Radio Achievement Award presented by Association of Radio Industries and Businesses Broadcast-Culture, 2010 Fundation Award presented by Hoso Bunka Fundation, 2010 Asia–Pacific Microwave Conference APMC prize, and the 2011 Commendation for Science and Technology by the Minister of Education, Culture, Sports, Science and Technology.

Toshihiko Kosugi received the M.S. and Ph.D. degrees in electrical engineering from Osaka University, Osaka, Japan, in 1990 and 1993, respectively. His Ph.D. dissertation addressed the characterization of point defects in GaAs and processing of GaAs. In 1993, he joined Nippon Telegraph and Telephone Corporation (NTT). He is currently with NTT Photonics Laboratories, Kanagawa, Japan, studying the microwave characteristics of HEMTs on InP and their application in MMICs. Dr. Kosugi received the 2007 Achievement Award presented by the Institute of Electronics, Information, Communication Engineers (IEICE), the 2008 Maejima Award presented by the Post and Telecom Association of Japan, and the 2011 Commendation for Science and Technology by the Minister of Education, Culture, Sports, Science and Technology.

Hiroyuki Takahashi (M’11) received the B.S. and M.S. degrees in applied physics from Nagoya University, Nagoya, Japan, in 2001 and 2003, respectively. In 2003, he joined Nippon Telegraph and Telephone (NTT) Microsystem Integration Laboratories, NTT Corporation, Atsugi-shi, Japan. He is engaged in research and development of millimeter-wave MMICs. His other research interests include ultra-high-speed wireless technologies. Mr. Takahashi is a member of the Institute of Electrical, Information and Communication Engineers (IEICE) of Japan. He received the 2008 Young Engineers Prize presented by the European Microwave Integrated Circuits Conference.

Jun Takeuchi received the B.E. and M.E. degrees from Tokyo Institute of Technology, Tokyo, Japan, in 2006 and 2008, respectively. In 2008, he joined Nippon Telegraph and Telephone (NTT) Microsystem Integration Laboratories, NTT Corporation, Atsugi-shi, Japan. He is engaged in research and development of millimeter-wave components and wireless systems. Mr. Takeuchi is a member of he Institute of Electrical, Information and Communication Engineers (IEICE) of Japan. He received the 2010 Asia–Pacific Microwave Conference APMC prize.

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Hiroyoshi Togo (SM’11) received the M.Sc. and Ph.D. degrees in applied physics and electronic engineering from University of Tsukuba, Ibaraki, Japan, in 1996 and 2010, respectively. He joined the Nippon Telegraph and Telephone Corporation (NTT), Musashino Opto-electronics Laboratories in 1996. From 1996 to 2001, he was engaged in the development of the thermo-capillary waveguide-based optical switch and from 2001 to 2002 he endeavored to commercialize it for NTT Electronics Inc. Since 2002, he has been researching ultrawideband impulse radio systems using photonic techniques and millimeter-wave tomography with electro-optic probing, and is now a senior research engineer at NTT Microsystem Integration Laboratories, Kanagawa, Japan. Dr. Togo is a member of the IEEE Photonics Society, the IEEE Antenna and Propagation Society, the IEEE Microwave Theory and Techniques Society (MTT-S), and the Institute of Electronics, Information and Communication Engineers of Japan. He was a recipient of the 2006 Asia–Pacific Microwave Photonics Conference AP-MWP Award and the 2010 European Conference on Antenna and Propagation Award.

Makoto Yaita received the B.S. and M.E. degrees from Waseda University, Tokyo, Japan, in 1988 and 1990, respectively. In 1990, he joined Nippon Telegraph and Telephone Corporation (NTT), LSI Laboratories, Kanagawa, Japan, where he was engaged in the research and development of measurement technologies for high-speed devices and ultrafast-optical signals. From 1999 to 2008, he had been engaged in the development of the digital television relay network in NTT Communications. He is currently a Senior Research Engineer and Supervisor with NTT Microsystem Integration Laboratories. His current research involves millimeter-wave radio transmission. Mr. Yaita is a member of the Institute of Electronics, Information and Communication Engineers of Japan.

Naoya Kukutsu (M’93) was born in Hokkaido, Japan, on September 16, 1962. He received B.E., M.E., and D.E. degrees in electrical engineering from Hokkaido University, Sapporo, Japan, in 1986, 1988, and 1991, respectively. His D.E. dissertation described research on a time-domain electromagnetic wave numerical analysis method. In 1991, he joined Nippon Telegraph and Telephone Corporation (NTT), Applied Electronics Laboratories, Musashino, Japan. He is currently a senior research engineer and supervisor at NTT Microsystem Integration Laboratories, Atsugi, Japan. His current research involves millimeter-wave radio transmission and millimeter-wave imaging systems. Dr. Kukutsu is a member of the IEEE Micowave Theory and Techniques Society (MTT-s), the IEEE Communications Society, and the Institute of Electronics, Information and Communication Engineers of Japan.

Kimihisa Aihara (M’09) received B.E. degrees in electronics from Keio University, Tokyo, Japan, in 1984. In 1984, he joined Nippon Telegraph and Telephone Public Corporation (now NTT). He is currently responsible for ubiquitous communications appliance technologies at NTT Microsystem Integration Laboratories as an executive manager. He is leading R&D projects on subterahertz-wave wireless communications, ultra-low-power network appliances and electric near-field communication for human area network.

Koichi Murata (SM’92) received the B.S. and M.S. degrees in mechanical engineering and Dr. Eng. degree in electrical and electronics engineering from Nagoya University, Nagoya, Japan, in 1987, 1989, and 2003, respectively. He joined NTT LSI Laboratories, Atsugi, Japan, in 1989. He is currently a Senior Research Engineer and Supervisor at NTT Photonics Laboratories, Atsugi, Japan. He has been engaged in research and development of ultrahigh-speed mixed-signal ICs for optical communications systems. His current research interests include optoelectronic IC design and high-speed optical transmission systems. Dr. Murata is a member of the Institute of Electronics, Information and Communication Engineers of Japan.

Yasuhiro Sato (M’97) received the B.S., M.S., and Ph.D. degrees in chemistry from the University of Tokyo, Tokyo, Japan, in 1987, 1989 and 2004, respectively. In 1989, he joined NTT LSI Laboratories, Atsugi, Japan. From 1989 to 2004, he worked on LSI interconnection technology, ultra-thin-film CMOS/SOI process integration for low power application, and low-power communication appliances for ubiquitous services. He is currently engaged in research and development of millimeter-wave wireless communication technology. Dr. Sato is a member of the Japan Society of Applied Physics, and the Institute of Electronics, Information and Communication Engineers of Japan.

Tadao Nagatsuma (M’93–SM’02) received the B.S., M.S., and Ph.D. degrees in electronic engineering from Kyushu University, Fukuoka, Japan, in 1981, 1983, and 1986, respectively. During his Ph.D. studies, he was involved in millimeter-wave and submillimeter-wave oscillators based on flux-flow phenomenon in superconducting devices. In 1986, he joined the Electrical Communications Laboratories, Nippon Telegraph and Telephone Corporation (NTT), Atsugi, Kanagawa, Japan, where he was engaged in research on the design and testing of ultrahigh-speed semiconductor electronic/photonic devices and integrated circuits. From 1999 to 2002, he was a Distinguished Technical Member with NTT Telecommunications Energy Laboratories. From 2003 to 2007, he was a Group Leader with NTT Microsystem Integration Laboratories. He is currently a Professor at the Division of Advanced Electronics and Optical Science, Department of Systems Innovation, Graduate School of Engineering Science, Osaka University, Toyonaka, Japan. His research interests include millimeter-wave and terahertz photonics and their application to sensors and wireless communications. Prof. Nagatsuma is a member of the Institute of Electronics, Information and Communication Engineers (IEICE), Japan, the Technical Committee on Microwave Photonics of the IEEE Microwave Theory and Techniques Society, and the Microwave Photonics Steering Committee. He was the recipient of the 1989 Young Engineers Award presented by the IEICE, the 1992 IEEE Andrew R. Chi Best Paper Award, the 1997 Okochi Memorial Award, the 1998 Japan Microwave Prize, the 2000 Minister’s Award of the Science and Technology Agency, the 2002 Asia–Pacific Microwave Conference Prize, the 2004 Yokosuka Research Park Award, the 2006 Asia–Pacific Microwave-Photonics Conference Award, the 2006 European Microwave Conference Prize, the 2007 Achievement Award presented by the IEICE, the 2008 Maejima Award presented by the Post and Telecom Association of Japan, the 2009 Education and Research Award from Osaka University, the 2011 Commendation for Science and Technology by the Minister of Education, Culture, Sports, Science and Technology, and the 2011 Recognition from Kinki Bureau of Telecommunications, Ministry of Internal Affairs and Communications.

HIRATA et al.: 120-GHz-BAND WIRELESS LINK TECHNOLOGIES FOR OUTDOOR 10-Gbit/s DATA TRANSMISSION

Yuichi Kado (M’08) received the M.S. and Ph.D. degrees in electronics from Tohoku University, Miyagi, Japan, in 1983 and 1998, respectively. In 1983, he joined the Electrical Communication Laboratories of Nippon Telegraph and Telephone Public Corporation (now NTT), Kanagawa, Japan, where he was engaged in research on SOI structure formation by hetero-epitaxial growth. From 1989 to 1998 he worked on the development of fully depleted CMOS/SIMOX LSIs and ultra-low-power CMOS circuits. From 1999, he was engaged in R&D on compact network appliances using ultralow-power CMOS circuit

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technologies for ubiquitous communications. He led research and development projects on ultra-low-power network appliances, sub-terahertz-wave wireless communication, and intra-body communication as a Director of Smart Devices Laboratory at NTT Microsystem Integration Laboratories (2003–2010). In July 2010, he joined the Department of Electronics, Kyoto Institute of Technology, Kyoto, Japan. Dr. Kado was the recipient of awards including the 1990 Young Engineers Award presented by the Institute of Electronics, Information and Communication Engineers of Japan, the 2009 Nikkei BP Technology Award, and the 2009 Radiowave Achievement Award presented by the ARIB.

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EDITORIAL BOARD Editor-in-Chief: GEORGE E. PONCHAK Associate Editors: H. ZIRATH, W. VAN MOER, J.-S. RIEH, Q. XUE, L. ZHU, K. J. CHEN, M. YU, C.-W. TANG, J. PAPAPOLYMEROU, N. S. BARKER, C. D. SARRIS, C. FUMEAUX, D. HEO, B. BAKKALOGLU The following members reviewed papers during 2011

P. Aaen A. Abbaspour-Tamijani A. Abbosh D. Abbott A. Abdipour M. Abe M. Abegaonkar R. Abhari A. Abramowicz M. Acar L. Accatino R. Achar E. Ackerman J. Adam K. Agawa M. Ahmad H.-R. Ahn B. Ai M. Aikawa J. Aikio C. Aitchison M. Akaike T. Akin S. Aksoy I. Aksun A. Akyurtlu G. Ala L. Albasha A. Alexanian W. Ali-Ahmad F. Alimenti R. Allam K. Allen A. Alphones A. Alu A. Álvarez-Melcon A. Al-Zayed S. Amari H. Amasuga R. Amaya H. An D. Anagnostou M. Andersen K. Andersson M. Ando Y. Ando P. Andreani M. Andrés W. Andress K. Ang C. Angell I. Angelov Y. Antar G. Antonini H. Aoki V. Aparin F. Apollonio R. Araneo J. Archer F. Ares F. Ariaei T. Arima M. Armendariz L. Arnaut F. Arndt E. Artal H. Arthaber F. Aryanfar U. Arz M. Asai Y. Asano A. Asensio-Lopez K. Ashby H. Ashoka A. Atalar A. Atia S. Auster I. Awai A. Aydiner M. Ayza K. Azadet R. Azaro A. Babakhani P. Baccarelli M. Baginski I. Bahl S. Bajpai J. Baker-Jarvis B. Bakkaloglu M. Bakr A. Baladin C. Balanis S. Balasubramaniam J. Balbastre J. Ball P. Balsara Q. Balzano A. Banai S. Banba R. Bansal D. Barataud A. Barbosa F. Bardati I. Bardi J. Bardin A. Barel S. Barker F. Barnes J. Barr G. Bartolucci R. Bashirullan S. Bastioli A. Basu B. Bates R. Baxley Y. Bayram J.-B. Bégueret N. Behdad F. Belgacem H. Bell D. Belot J. Benedikt T. Berceli C. Berland M. Berroth G. Bertin E. Bertran A. Bessemoulin M. Beurden A. Bevilacqua A. Beyer M. Bialkowski

E. Biebl P. Bienstman S. Bila D. Blackham R. Blaikie M. Blank P. Blockley P. Blondy P. Blount D. Boccoli G. Boeck L. Boglione R. Boix G. Bonaguide F. Bonani G. Bonmassar O. Boos B. Borges V. Boria-Esbert O. Boric-Lubecke A. Borji S. Borm J. Bornemann W. Bosch R. Bosisio H. Boss G. Botta N. Boulejfen S. Boumaiza J. Bouny C. Boyd C. Bozler M. Bozzi R. Bradley D. Braess N. Braithwaite M. Brandolini G. Branner T. Brazil J. Breitbarth M. Bressan K. Breuer B. Bridges D. Bridges J. Brinkhoff E. Brown S. Brozovich E. Bryerton D. Budimir G. Burdge P. Burghignoli N. Buris C. C. Galup-Montoro B. Cabon P. Cabral L. Cabria C. Caloz C. Camacho-Peñalosa V. Camarchia E. Camargo R. Cameron M. Camiade C. Campbell M. Campovecchio F. Canavero A. Cangellaris A. Cantoni C. Cao F. Capolino F. Cappelluti G. Carchon J. Carmo K. Carr F. Carrez R. Carrillo-Ramirez P. Carro R. Carter N. Carvalho P. Casas R. Castello J. Catala M. Cavagnaro R. Caverly D. Cavigia J. Cazaux M. Celuch Z. Cendes D. Chadha M. Chae S. Chakraborty C. Chan C. Chang H. Chang K. Chang S. Chang T. Chang W. Chang E. Channabasappa H. Chapell W. Chappell C. Charles M. Chatras I. Chatterjee G. Chattopadhyay S. Chaudhuri S. Chebolu A. Cheldavi A. Chen C. Chen H. Chen J. Chen K. Chen M. Chen N. Chen S. Chen Y. Chen Z. Chen Z.-N. Chen H. Cheng K. Cheng M. Cheng Y. Cheng C. Cheon C. Chi M. Chia Y. Chiang J. Chiao A. Chin K. Chin H. Chiou Y. Chiou C. Chiu

H. Chiu A. Chizh C. Cho K. Cho T. Cho A. Choffrut C. Choi J. Choi W. Choi C. Chong M. Chongcheawchamnan C. Chou D. Choudhury E. Chow Y. Chow C. Christodoulou C. Christopoulos Q. Chu T. Chu H. Chuang M. Chuang Y. Chun S. Chung Y. Chung D. Chye A. Cidronali T. Cisco C. Cismaru O. Civi S. Clavijo M. Clénet D. Cogan P. Colantonio M. Cole J. Coleman J. Collantes R. Collin C. Collins B. Colpitts R. Compton G. Conciauro M. Condon D. Consonni A. Constanzo M. Converse K. Cools F. Cooray I. Corbella A. Costanzo S. Cotton C. Courtney G. Coutts J. Cowles J. Craninckx C. Crespo-Cadenas J. Cressler S. Cripps T. Crowe J. Cruz T. Cui E. Cullens T. Cunha W. Curtice J. Dabrowski W. Dai G. Dambrine P. Dankov F. Danneville I. Darwazeh A. Darwish N. Das M. Davidovich L. Davis D. Dawn J. Dawson H. Dayal F. De Flaviis D. De Zutter B. Deal A. Dearn J. Deen M. Dehan C. Dehollain C. Deibele G. Dejean M. DeLisio N. Deltimple S. Demir V. Demir J. Deng A. Dengi T. Denidni W. DeRaedt H. Deshpande Y. Deval R. Dey T. Dhaene L. Diaz A. Diaz-Morcillo L. Ding M. Dionigi C. Diskus A. Djordjevi T. Djordjevic J. Dobrowolski H. Dogan S. Donati X. Dong A. Dounavis P. Draxler R. Drayton A. Dreher J. Drewniak J. Duchamp A. Duffy L. Dunleavy J. Dunsmore S. Durden L. Dussopt C. Duvanaud J. East J. Ebel K. Eccleston I. Ederra R. Egri I. Ehrenberg N. Ehsan T. Eibert H. Eisele W. Eisenstadt G. Eleftheriades

F. Ellinger G. Ellis T. Ellis M. El-Nozahi M. Elsbury S. Elschner M. El-Shenawee T. Enoki K. Entesari L. Epp I. Erdin O. Ergul T. Eriksson C. Ernst D. Erricolo I. Eshrah M. Essaaidi H. Esteban C. Eswarappa W. Eyssa A. Ezzeddine C. Fager M. Fahmi Y. Fan D. Fang M. Farina A. Fathy M. Faulkner P. Fay A. Fazzi E. Fear P. Fedorenko D. Feld Y. Feng A. Feresidis A. Fernandez T. Fernandez M. Fernández-Barciela M. Ferndahl F. Fernez P. Ferrari E. Ferre-Pikal A. Ferrero M. Ferriss H. Fetterman J. Fiedziuszko S. Fiedziuszko G. Fikioris J. Fikioris I. Filanovsky F. Filicori D. Filipovic R. Fletcher B. Floyd H. Foltz N. Fong B. Fornberg F. Fortes K. Foster P. Foster P. Franzon A. Frappe J. Freire M. Freire A. Freundorfer F. Frezza I. Frigyes R. Frye J. Fu O. Fu R. Fujimoto O. Fujiwara C. Fumeaux C. Furse V. Fusco D. Gabbay E. Gad M. Gadringer N. Gagnon J. Gajadharsing A. Gala C. Galbraith B. Galwas J. Gambini A. Gameiro O. Gandhi B. Gao J. Gao S. Gao C. Gaquiere H. Garbe J. Garcia M. Garcia P. Garcia-Ducar F. Garcia-Vidal K. Gard P. Gardner P. Garland P. Gaudo J. Gautier S. Gedney B. Geelen F. Gekat B. Geller R. Genov A. Georgiadis N. Georgieva J. Gerdes W. Gerhard S. Gevorgian H. Ghali M. Ghanevati F. Ghannouchi K. Gharaibeh R. Gharpurey G. Ghione M. Ghovanloo F. Giannini A. Gibson I. Gil P. Gilabert B. Gimeno D. Ginste A. Goacher E. Godshalk A. Goel C. Goldsmith M. Golio M. Golosovsky R. Gómez-García A. Goncharenko X. Gong

R. Gonzalo S. Goodnick S. Gopalsami A. Gopinath A. Görür K. Gosalia M. Gouker K. Goverdhanam W. Grabherr J. Graffeuil L. Gragnani J. Grahn J. Grajal V. Granatstein A. Grbic A. Grebennikov I. Gresham A. Griol D. Grischowsky S. Grivet-Talocia E. Grossman S. Gruszczynski T. Grzegorczyk S. Guenneau T. Guerrero S. Gunnarsson J. Guo Y. Guo C. Gupta M. Gupta R. Gupta R. Gutmann W. Gwarek R. Habash S. Hadjiloucas D. Haemmerich M. Hagmann S. Hagness A. Halappa P. Hale D. Ham E. Hamidi O. Hammi H. Han T. Hancock A. Hanke G. Hanson Y. Hao Z. Hao R. Harjani L. Harle H. Harris P. Harrison O. Hartin J. Hasch H. Hashemi K. Hashimoto J. Haslett G. Hau S. Hauptmann L. Hayden L. He Y. He R. Heath E. Hegazi G. Hegazi S. Heinen W. Heinrich G. Heiter M. Hella R. Henderson F. Henkel B. Henning D. Heo K. Herrick F. Herzel J. Hesler J. Hesthaven K. Hettak H. Heuermann P. Heydari A. Hietala A. Higgins A. Hirata J. Hirokawa M. Ho K. Hoffmann R. Hoffmann E. Holzman V. Hombach J. Hong S. Hong W. Hong K. Honjo G. Hopkins Y. Horii J. Horng T.-S. Horng J. Horton K. Hosoya M. Hotta J. Hoversten J. Howard M. Høyerby H. Hsieh L. Hsieh C. Hsu H. Hsu J. Hsu C. Hsue R. Hu C. Huang F. Huang H. Huang P. Huang T. Huang J. Hubert W. Huei A. Hülsmann A. Hung C. Hung J. Hung I. Hunter I. Huynen H. Hwang J. Hwang K. Hwang R. Hwang G. Iannaccone K. Ikossi M. Isaksson T. Ishizaki

Digital Object Identifier 10.1109/TMTT.2012.2188757

S. Islam M. Ito K. Itoh T. Itoh Y. Itoh A. Ittipiboon F. Ivanek D. Iverson M. Iwamoto D. Jablonski D. Jachowski C. Jackson D. Jackson R. Jackson A. Jacob K. Jacobs S. Jacobsen D. Jaeger J. Jaeger S. Jagannathan N. Jain G. James M. Janezic S. Jang M. Jankovic D. Jansen L. Jansson H. Jantunen H. Jardon-Aguilar J. Jargon N. Jarosik B. Jarry P. Jarry A. Jastrzebski B. Jemison W. Jemison S. Jeng A. Jenkins S. Jeon D. Jeong J. Jeong Y. Jeong A. Jerng T. Jerse T. Jiang X. Jiang G. Jianjun D. Jiao J. Jin J. M. Jin J. Joe T. Johnson B. Jokanovic U. Jordan K. Joshin J. Joubert S. Jung T. Kaho S. Kanamaluru K. Kanaya S. Kang P. Kangaslahti B. Kapilevich I. Karanasiou M. Karim T. Kataoka A. Katz R. Kaul R. Kaunisto T. Kawai S. Kawasaki M. Kazimierczuk L. Kempel P. Kenington P. Kennedy A. Kerr D. Kettle A. Khalil W. Khalil S. Khang A. Khanifar A. Khanna R. Khazaka J. Khoja S. Kiaei J. Kiang B. Kim C. Kim D. Kim H. Kim I. Kim J. Kim S. Kim T. Kim W. Kim N. Kinayman R. King N. Kinzie S. Kirchoefer A. Kirilenko M. Kishihara T. Kitazawa J. Kitchen T. Klapwijk E. Klumperink D. Klymyshyn L. Knockaert R. Knoechel M. Koch K. Koh N. Kolias J. Komiak A. Komijani G. Kompa A. Konanur A. Konczykowska H. Kondoh B. Kopp B. Kormanyos J. Korvink P. Kosmas Y. Kotsuka S. Koziel A. Kozyrev V. Krishnamurthy H. Krishnaswamy C. Krowne J. Krupka D. Kryger H. Ku H. Kubo A. Kucar

A. Kucharski C. Kudsia A. Kudymov D. Kuester B. Kuhn W. Kuhn T. Kuki A. Kumar J. Kuno C. Kuo J.-T. Kuo H. Kurebayashi F. Kuroki L. Kushner S. Kusunoki D. Kuylenstierna Y. Kwon G. Kyriacou A. Lacaita J. Lamb P. Lampariello U. Langmann T. Larsen L. Larson J. Laskar C. Lau K. Lau A. Lauer D. Lautru P. Lavrador A. Lavrinenko A. Lazaro G. Lazzi R. Lech B. Lee C.-H. Lee C. Lee H. Lee J. Lee J.-H. Lee K. Lee R. Lee S. Lee T. Lee Y. Lee D. Leenaerts Z. Lei G. Leizerovich K. Leong Y. Leong R. Leoni C. Ler G. Leuzzi B. Levitas R. Levy C. Li L. Li M. Li X. Li L. Lianming C. Liao S. Liao D. Lie E. Lima E. Limiti F. Lin J. Lin K. Lin T. Lin Y. Lin S. Lindenmeier A. Lindner F. Ling D. Linkhart P. Linnér D. Linten D. Linton D. Lippens F. Little V. Litvinov C. Liu H. Liu J. Liu K. Liu Q. Liu S. Liu Y. Liu Z. Liu A. Llewandowski O. Llopis I. Lo L. Locht A. Loke K. Lonngren T. Lopetegi N. Lopez U. Lott G. Lovat D. Lovelace Z. Low C. Lu L. Lu S. Lu Y. Lu V. Lubecke S. Lucyszyn D. Ludwig N. Luhmann M. Lui J. Luy G. Lyons A. M. Niknejad K. Ma Z. Ma S. Maas P. Maccarini G. Macchiarella J. Machac B. Machiels M. Madihian A. Madjar G. Magerl S. Magierowski R. Mahmoudi I. Maio F. Maiwald A. Majedi H. Majedi M. Majewski M. Makimoto R. Makinen D. Malocha J. Manges

R. Mansour D. Manstretta J. Mao S. Mao F. Maradei A. Margomenos D. Markovic E. Márquez-Segura J. Martens F. Martin E. Martini K. Maruhashi J. Marzo D. Masotti A. Massa G. Massa F. Mastri J. Mateu A. Matsushima M. Mattes G. Matthaei K. Mayaram M. Mayer U. Mayer W. Mayer J. Mazeau S. Mazumder A. Mazzanti G. Mazzarella K. McCarthy G. McDonald I. McGregor M. McKinley J. McLean D. McQuiddy A. Mediano F. Medina M. Megahed I. Mehdi K. Mehrany A. Melcon R. Melville F. Mena D. Mencarelli C. Meng R. Menozzi W. Menzel P. Mercier B. Merkl F. Mesa R. Metaxas A. Metzger P. Meyer P. Mezzanotte E. Michielsen A. Mickelson D. Miller P. Millot J. Mingo F. Miranda D. Mirshekar A. Mirzaei S. Mitilineos R. Miyamoto K. Mizuno J. Modelski W. Moer M. Moghaddam A. Mohammadi S. Mohammadi A. Mohammadian P. Mohseni E. Moldovan M. Mollazadeh M. Mongiardo P. Monteiro J. Montejo-Garai G. Montoro J. Monzó-Cabrera J. Morente T. Morf D. Morgan M. Morgan A. Morini A. Morris J. Morsey A. Mortazawi M. Moussa M. Mrozowski Q. Mu J.-E. Mueller J. Muldavin K. Murata S.-S. Myoung M. Myslinski B. Nabet V. Nair K. Naishadham Y. Nakasha M. Nakatsugawa M. Nakhla J.-C. Nallatamby I. Nam S. Nam J. Nanzer T. Narhi A. Nashashibi A. Natarajan J. Nath A. Navarrini J. Navarro J. Nebus R. Negra J. Neilson B. Nelson P. Nepa A. Neri H. Newman G. Ng D. Ngo E. Ngoya C. Nguyen E. Nicol A. Nicolet S. Nicolson E. Niehenke M. Nielsen K. Nikita P. Nikitin N. Nikolova M. Nisenoff K. Nishikawa T. Nishino

G. Niu B. Noori C. Nordquist B. Notaros K. Noujeim D. Novak I. Novak G. Nusinovich K. O I. Obeid J. Obregon R. O’Dea M. O’Droma M. Odyniec J.-E. Oh T. Ohira E. Öjefors H. Okazaki V. Okhmatovski A. Oki M. Okumura G. Olbrich S. Olson F. Olyslager A. Omar K. Onodera B.-L. Ooi S. Ootaka H. Oraizi G. Orengo A. Orlandi R. Orta J. Ortega-Gonzalez S. Ortiz S. Otaka B. Otis K. Ozdemir T. Ozdemir O. Ozlem P. Paco R. Paknys S. Pal Y. Palaskas D. Palmer S. Pamarti G.-W. Pan S.-K. Pan A. Panariello K. Pance J. Papapolymerou S. Parisi C.-S. Park E. Park J.-S. Park M.-J. Park S. Park W. Park A. Parker T. Parker D. Pasquet M. Pastorino H. Pau S. Paulotto A. Pavio D. Pavlidis W. Pearson J.-C. Pedro S. Peik S. Pellerano G. Pelosi M. Pelosi D. Pelz R. Pengelly J. Pereda F. Pereira A. Perennec B. Perlman D. Peroulis L. Perregrini K. Per-Simon M. Persson M. Petelin A. Peterson A. Petosa O. Peverini U. Pfeiffer A.-V. Pham J. Phillips H. Pickett M. Pieraccini L. Pierantoni B. Pillans S. Pinel Z. Ping M. Pirola S. Pisa G. Pisano D. Pissoort D. Plant C. Plett J. Plumridge C. Pobanz A. Poddar F. Podevin R. Pogorzelski G. Ponchak A. Poon D. Popovic Z. Popovic J. Portilla M. Pospieszalski A. Pothier K. Pourvoyeur J. Powell H. Powen R. Prabhu L. Pradell S. Prasad D. Prather A. Priou S. Pruvost Y. Qian R. Qiang J. Qiu T. Quach X. Quan R. Quay C. Queck C. Quendo R. Quéré F. Quesada F. Raab V. Radisic

M. Raffetto A. Raffo T. Rahkonen R. Raich A. Raisanen O. Ramahi M. Ramdani R. Ranson P. Rantakari L. Ranzani P. Ratajczak H. Rategh C. Rauscher J. Rautio T. Rautio B. Rawat J. Rayas-Sanchez G. Rebeiz J. Rebollar M. Reddy J. Reid R. Reid J. Reina-Tosina S. Reising B. Rembold K. Remley R. Renaut S. Rengarajan D. Resca P. Reynaert S. Reynolds A. Rezazadeh E. Rezek S. Ricci A. Riddle L. Rienzo D. Ritter E. Rius J. Rizk V. Rizzoli M. Roberg I. Robertson P. Roblin A. Roden C. Rodenbeck W. Rodriguez F. Rodriguez-Morales M. Rodwell A. Rofougaran R. Rogers H. Rogier U. Rohde V. Rokhlin Y. Rolain J.-M. Rollin R. Romanofsky S. Romisch G. Romo Y. Rong D. Rönnow D. Root N. Rorsman M. Rosario L. Roselli A. Rosen U. Rosenberg M. Rosker T. Roste F. Rotella E. Rothwell R. Rotman P. Rovati J. Roy L. Roy M. Roy T. Rozzi T. Rubaek J. Rubio D. Rudolph M. Rudolph A. Ruehli C. Ruppel A. Rydberg J. Ryynänen C. Saavedra F. Sabath K. Sachse B. Sadler N. Safari A. Safarian A. Safavi-Naeini A. Safwat P. Saha K. Saito I. Sakagami S. Sakhnenko T. Samaras J. Sambles C. Samori A. Sanada J. Sanchez S. Sancho K. Sano A. Santarelli H. Santos S. Sanyal K. Sarabandi T. Sarkar C. Sarris H. Sato P. Saunier M. Sawan H. Sayadian A. Sayeed W. Scanlon E. Schamiloglu J. Schellenberg M. Schindler E. Schlecht E. Schmidhammer L.-P. Schmidt S. Schmidt D. Schmitt F.-J. Schmueckle J. Schoebel D. Schreurs D. Schrijver A. Schuchinsky P. Schuh L. Schulwitz K. Schünemann J. Schutt-Aine

J. Scott F. Sechi K. Sellal V. Semenov E. Semouchkina K.-S. Seo J. Sercu A. Serebryannikov J. Sevic O. Sevimli F. Seyfert L. Shafai A. Shameli O. Shanaa Z. Shao I. Shapir A. Sharma S. Sharma J. Sharp D. Sheen T. Shen Z. Shen Y. Shestopalov J. Shi Y.-Q. Shi H. Shigematsu Y. Shih H. Shin S. Shin S.-H. Shin N. Shino W. Shiroma S. Shitov K. Shu D. Shyroki D. Sievenpiper C. Silva D. Silveira M. Silveirinha K. Silvonen W. Simbuerger G. Simin R. Simons C. Simovsky J. Simpson V. Simulik D. Simunic H. Singh D. Sinnott Z. Sipus C. Siviero H. Sjöland M. Slazar-Palma R. Sloan P. Smith C. Snowden R. V. Snyder M. Sobhy A. Sodagar N. Sokal K. Solbach J. Sombrin Y.-K. Song R. Sorrentino A. Soury E. Sovero J. Sowers R. Sperlich B. Spielman K. Stadius P. Staecker D. Staiculescu D. Stancil A. Stancu A. Stanitzki S. Stapleton J. Staudinger P. Stauffer B. Stec D. Steenson P. Steenson M. Steer G. Stegmayer J. Stenarson B. Stengel K. Stephan C. Stevens N. Stevens M. Steyaert J. Stiens I. Stievano S. Stitzer M. Straayer B. Strassner A. Street W. Struble M. Stubbs M. Stuchly B. Stupfel A. Suárez G. Subramanyam T. Sudo N. Suematsu T. Suetsugu C. Sullivan F. Sullivan A. Sulyman N. Sun S. Sun X. Sun R. Sutton K. Suzuki J. Svacina M. Swaminathan D. Swanson B. Szendrenyi W. Tabbara A. Taflove Y. Tajima T. Takagi M. Takahashi I. Takenaka T. Takenaka V. Talanov S. Talisa K.-W. Tam B. Tan E. Tan J. Tan T. Tanaka C.-W. Tang W.-C. Tang

X.-H. Tang T. Taris R. Tascone P. Tasker J. Taub J. Tauritz V. Tavares S. Taylor D. Teeter R. Temkin M. Tentzeris V. Teppati J.-P. Teyssier N. Thakor H. Thal J. Tham M. Thumm M. Tiebout E. Tiiliharju M.-R. Tofighi P. Tognolatti T. Toifl T. Tokumitsu A. Tombak A. Topa E. Topsakal H. Torres-Silva G. Town S. Tretyakov R. Trew P. Troyk C. Trueman A. Truitt C.-M. Tsai Z.-M. Tsai J. Tsalamengas C.-H. Tseng T. Tsiboukis J. Tsui M. Tsutsumi S. H.-L. Tu W.-H. Tu N. Tufillaro V. Turin G. Twomey C.-K. Tzuang T. Ueda V. Urick K. U-Yen N. Uzunoglu T. Vähä-Heikkilä R. Vahldieck A. Valdovinos G. Vandenbosch K. Vanhille D. Vanhoenacker-Janvier G. Vannini L. Vardapetyan G. Vasilescu C. Vaucher J. Vaz L. Vegni G. Vendelin S. Verdeyme M. Vérez A. Verma J. Verspecht P. Vial H.-O. Vickes A. Victor L. Vietzorreck C. Vittoria S. Vitusevich R. Voelker S. Voinigescu J. Volakis A. Vorst M. Vossiek M. Vouvakis B. Vowinkel L. Vreede K. Vryssas C. Wagner B. Waldmann P. Waldow A. Walker P. Wambacq S. Wane B.-Z. Wang C. Wang C.-F. Wang C.-J. Wang E. Wang F. Wang H. Wang J. Wang K.-C. Wang N. Wang X. Wang Y. Wang Y.-H. Wang Z.-G. Wang C. Ward J. Ward W. Wattanapanitch J. Webb D. Webster R. Webster S. Wedge J. Weem X. Wei D. Weide R. Weigel R. Weikle C. Weil T. Weiland D. Weile S. Weinreb M. Weiss S. Weiss T. Weller C. Wen G. Wen S. Wentworth D. Wentzloff R. Wenzel J. Whelehan J. Whitaker J. White J. Wiart M. Wickert

A. Wiesbauer J. Wight D. Willems B. Willemsen D. Williams A. Williamson J. Wilson J. Wiltse T. Winkel K. Wise D. Wisell M. Wolf E. Wollack G. Wollenberg F. Wong K. Wong M. Wong S. Wong K. Woo J. Wood G. Woods D. Woolard C. Wu J.-M. Wu K.-L. Wu K. Wu L. Wu R.-B. Wu T. Wu T.-L. Wu R. Wylde T. Wysocki M. Xia S. Xiang J. Xiao Y. Xiao C. Xie J. Xu S. Xu Q. Xue M. Yagoub T. Yakabe A. Yakovlev K. Yamamoto K. Yamauchi W. Yan C.-L. Yang F. Yang N. Yang X. Yang Y. Yang Z. Yang F. Yanovsky H.-W. Yao J. Yao A. Yarovoy Y. Yashchyshyn K. Yashiro K. Yasumoto J. Yau S. Ye J. Yeh K.-S. Yeo S.-P. Yeo K.-W. Yeom L.-K. Yeung W.-Y. Yin X.-S. Yin S. Yngvesson D. Yongsheng D. Yoo H.-J. Yoo J.-G. Yook E. Yoon J.-B. Yoon R. York S. Yoshikado A. Young B. Young D. Young P. Young W. Young H.-K. Yu M. Yu P. Yu R. Yu W. Yu Y. Yu M. Yuan M. Yuce S.-W. Yun F. Zabini J. Zaeytijd K. Zaki P. Zampardi J. Zapata L. Zappelli C. Zelley P. Zhai C. Zhang F. Zhang G. Zhang H. Zhang J. Zhang N. Zhang Q.-J. Zhang R. Zhang Y. Zhang A.-P. Zhao Y.-J. Zhao Y. Zhao Y. Zheng Q. Zhiguo H. Zhou A. Zhu L. Zhu N.-H. Zhu X. Zhu J. Zhuang H. Zirath