DECEMBER 2012 
IEEE MTT-V060-I12 (2012-12A) [60, 12 ed.]

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DECEMBER 2012

VOLUME 60

NUMBER 12

IETMAB

(ISSN 0018-9480)

PART I OF TWO PARTS

Guest Editorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J.-S. Rieh

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PAPERS

Theory and Numerical Methods A Semianalytical Approach for a Nonconfocal Suspended Strip in an Elliptical Waveguide . . . J.-W. Lee and J.-T. Chen FDTD Modeling of Impedance Boundary Conditions by Equivalent LTI Circuits . . . . . . . . . . . M. Feliziani and S. Cruciani

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Passive Components and Circuits Wideband Dual-Mode Microstrip Filter Using Short-Ended Resonator With Centrally Loaded Inductive Stub . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S.-J. Sun, B. Wu, T. Su, K. Deng, and C.-H. Liang Coupled Line 180 Hybrids With Lange Couplers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V. Napijalo A Physics-Based Causal Bond-Wire Model for RF Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A. L. Nazarian, L. F. Tiemeijer, D. L. John, J. A. van Steenwijk, M. de Langen, and R. M. T. Pijper

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Electron Devices and Device Modeling A Novel Model for Implementation of Gamma Radiation Effects in GaAs HBTs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J. Zhang, Y. Zhang, H. Lu, Y. Zhang, and M. Liu On the Compression and Blocking Distortion of Semiconductor-Based Varactors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C. Huang, K. Buisman, P. J. Zampardi, L. E. Larson, and L. C. N. de Vreede

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Hybrid and Monolithic RF Integrated Circuits High-Quality-Factor Active Capacitors for Millimeter-Wave Applications . . . . . . . . . . . . . . . . . . . . . . . . A. Ghadiri and K. Moez Variable Reflection-Type Attenuators Based on Varactor Diodes . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . S. Bulja and A. Grebennikov Distributed Modeling of Six-Port Transformer for Millimeter-Wave SiGe BiCMOS Circuits Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D. Hou, W. Hong, W. L. Goh, Y. Z. Xiong, M. A. Arasu, J. He, J. Chen, and M. Madihian

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(Contents Continued on Back Cover)

(Contents Continued from Front Cover) A 64–84-GHz PLL With Low Phase Noise in an 80-GHz SiGe HBT Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . G. Liu, A. Trasser, and H. Schumacher Analysis and Design of Low Phase-Noise Oscillators With Nonlinear Resonators . . . . . . . . . . . . . A. Imani and H. Hashemi Broadband CMOS Millimeter-Wave Frequency Multiplier With Vivaldi Antenna in 3-D Chip-Scale Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . L. Tripodi, X. Hu, R. Götzen, M. K. Matters-Kammerer, D. van Goor, S. Cheng, and A. Rydberg Design and Analysis of Digital-Assisted Bandwidth-Enhanced Miller Divider in 0.18- m CMOS Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Y.-H. Kuo, J.-H. Tsai, T.-W. Huang, and H. Wang Theory and Design of Class-J Power Amplifiers With Dynamic Load Modulation . . . . . . . . . . . . . . . . . . . . . . C. M. Andersson, D. Gustafsson, K. Yamanaka, E. Kuwata, H. Otsuka, M. Nakayama, Y. Hirano, I. Angelov, C. Fager, and N. Rorsman Widely Tunable High-Efficiency Power Amplifier With Ultra-Narrow Instantaneous Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K. Chen, X. Liu, and D. Peroulis An 8-bit Integrate-and-Sample Receiver for Rate-Scalable Photonic Analog-to-Digital Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T. D. Gathman and J. F. Buckwalter Analog Signal Processing for Pulse Compression Radar in 90-nm CMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M. Parlak, M. Matsuo, and J. F. Buckwalter 245-GHz LNA, Mixer, and Subharmonic Receiver in SiGe Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Y. Mao, K. Schmalz, J. Borngräber, and J. C. Scheytt CMOS Integrated Antenna-Coupled Field-Effect Transistors for the Detection of Radiation From 0.2 to 4.3 THz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S. Boppel, A. Lisauskas, M. Mundt, D. Seliuta, L. Minkevičius, I. Kašalynas, G. Valušis, M. Mittendorff, S. Winnerl, V. Krozer, and H. G. Roskos Instrumentation and Measurement Techniques A Unified Theory for -Parameter Uncertainty Evaluation . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . M. Garelli and A. Ferrero

3739 3749 3761 3769 3778 3787 3798 3810 3823 3834 3844

RF Applications and Systems An Ultra-Thin, High-Power, and Multilayer Organic Antenna Array With T/R Functionality in the -Band . . . . . . . . . . . . . . . . . C. A. Donado Morcillo, C. E. Patterson, B. Lacroix, C. Coen, C. H. J. Poh, J. D. Cressler, and J. Papapolymerou Sensitivity of a Passive Correlation Interferometer to an Angularly Moving Source . . . . . . . . . . . . . . . . . . . . . . . . . . J. A. Nanzer Terahertz Aperture Synthesized Imaging With Fan-Beam Scanning for Personnel Screening . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S. Gu, C. Li, X. Gao, Z. Sun, and G. Fang

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Information for Authors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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CALLS FOR PAPERS

Special Issue on Phased-Array Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 12, DECEMBER 2012

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Guest Editorial

T

HE IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF) is a conference dedicated to the field of Si-based RF research, which encompasses the material, technology, devices, and more increasingly, circuits and systems, all based on Si for RF applications. Since its first meeting in 1998, it has continuously contributed to the popular adaption of Si technology to RF and millimeter-wave applications. After alternating between the U.S. and Europe for the conference venues for the first five meetings, which were held every 1.5 years, SiRF has been annually held in the U.S. since 2006 as part of IEEE Radio and Wireless Week. The 12th SiRF was held in Santa Clara, CA, January 16–18, 2012. One new attempt made for this year’s conference was to encourage the authors of the presented papers to submit an expanded version to this TRANSACTIONS, which would be specially arranged for publication in a single issue if accepted. This was successfully implemented in this issue. Out of 56 papers presented at the conference, including both podium and poster papers, 12 papers were expanded and submitted. After the regular review process, five papers were finally accepted, a brief introduction of which is provided here. The paper by Liu et al. introduces a utilization of low-cost 80-GHz SiGe HBT technology for the implementation of a phaselocked loop (PLL) that operates on the range of 64–84 GHz. The paper by Gathman et al. describes an 8-bit integrate-and-sample receiver with a high dynamic range, which is intended for use in electrical interface to a photonic sampling system that can potentially reach a higher sampling rate than electric counterpart. In the paper by Parlak et al., analog signal-processing circuitry developed in 90-nm CMOS technology for pulse compression radar (PCR), which shows high-range resolution, is described. The paper by Mao et al. demonstrates a high-frequency operation capability of SiGe technology by describing a 245-GHz SiGe receiver with a focus on performance and design issues of the low-noise amplifier (LNA) and subharmonic mixer. The paper by Boppel et al. reports patch antenna-coupled field-effect transistors integrated on 0.15- m CMOS technology that can detect radiation from 0.2 to 4.3 THz, far beyond the cutoff frequency of the transistors. I believe these selected papers will provide a more detailed description of the excellent results that were not available with the limited space allowed for the papers in the conference proceeding. JAE-SUNG RIEH School of Electrical Engineering Korea University Seoul, 136-701 Korea Digital Object Identifier 10.1109/TMTT.2012.2222133

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3642

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 12, DECEMBER 2012

A Semianalytical Approach for a Nonconfocal Suspended Strip in an Elliptical Waveguide Jia-Wei Lee and Jeng-Tzong Chen

Abstract—A problem of a nonconfocal suspended strip in an elliptical waveguide is analyzed by using a semianalytical approach, which is the so-called null-field boundary integral-equation method (BIEM). The null-field BIEM is proposed by introducing the idea of null field, degenerate kernels, and eigenfunction expansion to improve the conventional dual boundary-element method (BEM). A closed-form fundamental solution can be expressed in terms of the degenerate kernel containing the Mathieu and modified Mathieu functions in the elliptical coordinates. Boundary densities are represented by using the eigenfunction expansion. By this way, the efficiency is promoted in three aspects: analytical boundary integral without numerical error, natural bases for boundary densities, and exact description of boundary geometry. Due to the semianalytical formulation, the null-field BIEM can fully capture the property of geometry and the error only occurs from the truncation of the number of the eigenfunction expansion terms in the real implementation. The present method is also a kind of meshless method since only boundary nodes are needed to construct influence matrices instead of using boundary elements. Both TE and TM cases are considered in this paper. To verify the validity of the present method, the dual BEM and finite-element method are also utilized to provide cutoff wavenumbers. Besides, the analytical solution of a confocal elliptical waveguide can be derived by using the present method. After comparing with published data, good agreement is made. Index Terms—Degenerate kernels, elliptical null-field boundary integral equation (BIE), strip.

waveguide,

I. INTRODUCTION

E

LLIPTICAL waveguides play an important role in the optical and electromagnetic wave propagation. There are many engineering applications for elliptical waveguides, such as optical fiber, microwave elements, radar feed line, accelerator beam tubes, and multichannel communication. How to determine cutoff wavelengths for designing the waveguide is required. The theory of the transmission of electromagnetic waves in an elliptical waveguide was first presented by Chu [1] in

Manuscript received May 13, 2012; revised September 20, 2012; accepted September 20, 2012. Date of publication October 26, 2012; date of current version December 13, 2012. This work was supported by the National Science Council under Grant NSC-98-2221-E-019-017-MY3, Grant NSC-99-2221-E019-015-MY3, and Grant NSC-100-2221-E-019-040-MY3 for National Taiwan Ocean University. (Corresponding author: J.-T. Chen.) J.-W. Lee is with the Department of Harbor and River Engineering, National Taiwan Ocean University, Keelung City 20224, Taiwan (e-mail: [email protected]). J.-T. Chen is with the Department of Harbor and River Engineering and the Department of Mechanical and Mechatronic Engineering, National Taiwan Ocean University, Keelung City 20224, Taiwan (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2221138

1938. By introducing elliptical coordinates, Mathieu functions and modified Mathieu functions, calculation of cutoff wavelengths is nothing more than computing the zeros of the modified Mathieu functions of the first kind and their derivatives. Chu first presented the analytical solution of six lowest modes for an elliptical waveguide. In 1970, Kretzschmar [2] calculated the cutoff wavelength of 19 successive modes by using the product series of Bessel function to compute the modified Mathieu functions of the first kind and their derivatives. However, Goldberg et al. [3] indicated that the first mode of TM waves presented by Chu [1] is inaccurate and corrected that mode. Later, two comments and corrections were also found in [4] and [5]. Zhang and Shen [6] paid attention to calculate the parametric zeros of the modified Mathieu functions of the first kind and their derivatives and presented the cutoff wavelengths of the lowest 100 successive eigenmodes. They also claimed that no high-order modes in the eigenmode sequence are omitted. Later, Tsogkas et al. [7] employed two analytical methods to evaluate cutoff wavelength of elliptical waveguides. One is using an elliptical-cylindrical wave function and the other one is a shape perturbation method. Regarding numerical approaches for analysis of elliptical waveguides, Davies and Kretzschmar [8] employed the polygon approximation to analyze elliptical waveguides. The accuracy of their results was increased by applying the boundary perturbation theory. Wang et al. [9] presented an improved polynomial approximation to directly represent the elliptical domain in the Rayleigh–Ritz method. The orthogonality is not required in the improved polynomial method. The computation time is also reduced due to the performance of analytical formulation for integration over the elliptical domain. Recently, some meshless methods are employed to determine cutoff wavelengths of elliptical waveguides. For the differential quadrature method [10], the accurate results can be obtained by using a few grid points. Jiang et al. [11] calculated the cutoff wavelengths of elliptical waveguides by a meshless method with radial basis functions. For the field at any domain point, the Wendland radial basis functions are used to interpolate the field value. To obtain a more accurate approximation of the derivatives, the Hermite interpolation is considered. The method of fundamental solutions was employed by Young et al. [12]. Different from the above two meshless methods, the method of fundamental solutions is a boundary type meshless method. No domain points are needed to construct the algebraic equation system. Besides, a semianalytical approach was derived by Roumeliotis and Savaidis [13] to deal with eccentric circular-elliptical waveguides. Both kinds of waveguides were considered in their paper. One is an eccentric circular-elliptical

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LEE AND CHEN: SEMIANALYTICAL APPROACH FOR NONCONFOCAL SUSPENDED STRIP IN ELLIPTICAL WAVEGUIDE

waveguide and the other is an eccentric elliptical-circular waveguide. The focus of the above paper is on the analysis of an elliptical waveguide. For an elliptical waveguide containing suspended strips, Rozzi et al. [14] derived the analytical solution of cutoff wavelengths and corresponding eigenmodes by using the method of separation variables in the elliptical coordinates. The Mathieu and modified Mathieu functions are adopted and the radial coordinate of the confocal suspended strip is equal to zero. Later, Ragheb [15] extended confocal case to noncofocal case. He employed the method of separation variables in conjunction with the addition theorem of Mathieu functions [16] to construct an infinite-dimensional determinant. Regarding this issue, some related works on circularly shielded waveguides were done by Babili et al. [17], Vardiambasis et al.[18], [20], and Tsalamengas et al.[19]. Besides, the issue of edge singularity has been discussed by Linton [21]. In this paper, we employ the null-field boundary integralequation method (BIEM) to revisit the problem of an elliptical waveguide containing a nonconfocal suspended strip. The nullfield BIEM was developed by Chen et al. [22]–[32]. Recently, Chen et al. [22]–[32] have successfully applied the null-field BIEM in conjunction with the degenerate kernel, Fourier series, and eigenfunction expansions to improve the drawbacks of the conventional boundary-element method (BEM), while applications on various fields such as torsion bar [22], piezoelectricity [23], bending of cantilever beam [24], antiplane shear [25], membrane vibration [26], acoustics [27], water wave [28], SH-wave [29], Stokes’ flow [30], plate vibration problems [31], and flexural wave in a thin plate [32] have been successfully implemented. A closed-form fundamental solution is expressed in terms of the degenerate kernel. Boundary densities are represented by using the Fourier series or eigenfunction expansion. By this way, five advantages, i.e.: 1) free of calculating principal values; 2) exponential convergence [30]; 3) elimination of boundary-layer effect; 4) meshless; and 5) well-posed system have been demonstrated. This approach is one kind of semianalytical methods since errors only occur from the truncation of the number of the Fourier terms. Besides, it belongs to a meshless method since only collocation points on the boundaries are required. Finally, the dual BEM is also implemented to verify this finding. On the other hand, the commercial finite-element code in the toolbox of MATLAB is also utilized to provide cutoff wavelengths for comparisons.

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Fig. 1. Elliptical waveguide containing a strip.

are and , respectively. The width of the perfectly conducting strip is . To fully use the property of ellipse to analyze the problem, the elliptical coordinates may be employed. If the strip is confocal with the elliptical waveguide, only one elliptical coordinate system is required and an analytical solution can be derived. Contrarily, two elliptical coordinate systems are needed for a nonconfocal strip. Regarding TM and TE modes, is equal to and , respectively. The boundary conditions of TM modes satisfy the Dirichlet boundary condition as follows: (2) where is the boundary of the elliptical waveguide and denotes the strip. For the TE modes, the boundary conditions are the Neumann type as follows: (3) where denotes the unit outward normal vector of boundaries. In this paper, only purely TM and TE modes are considered. For more detail of the decoupled part, readers may consult with Harrington’s textbook [33]. III. DUAL BOUNDARY INTEGRAL FORMULATIONS AND DEGENERATE KERNELS A. Dual Boundary-Element Formulations: Conventional Version Based on the Green’s third identity, the dual boundary integral equations for the boundary point are as follows:

II. PROBLEM STATEMENT For the problem of the electromagnetic waves in waveguides, the governing equation is the Helmholtz equations as follows:

(4)

(1) is the plane position vector in terms of the where Cartesian coordinates, is the scalar wave function, is the cutoff wavenumber, and is the domain of interest. Here, an elliptical waveguide containing a nonconfocal suspended strip is considered, as shown in Fig. 1. The length of major axis and focal length for the perfectly conducting elliptical waveguide

(5) , and denote the Riemann where principal value (Riemann sum), Cauchy principal value, and

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Hadamard (or so-called Mangler) principal value, respectively, denotes the unit outward normal vector at the source point , and is the fundamental solution, which satisfies (6) where is the Dirac–delta function, is the zeroth-order Hankel function of the first kind, and is the distance between the source point and field point. The other kernel func, , and are defined by tions

where is the complementary domain. It is noted that (10)–(13) can contain the boundary point since the kernel functions ( , , , and ) are expressed in terms of proper degenerate kernels, which will be elaborated on later in (10)–(13). Based on the property of separation variables in the elliptical coordinates, the closed-form fundamental solution , other kernel functions , , and can be expressed as [34] (14)

(7)

(15)

(8) (16) (9) (17) B. Dual Boundary Integral Formulations: Present Version By introducing degenerate kernels, the collocation point can be exactly located on the real boundary without need of calculating principal value in the bump contour approach. By choosing the proper degenerate kernels, the representations of the conventional integral equations including the boundary point can be written as

where and denote the elliptical coordinates, , , , , , , , and are degenerate kernels in the elliptical coordinates (finite-rank approximation), shown in (18)–(21) at the bottom of the following page, where and are the even and odd th-order modified Mathieu functions (Mathieu-Hankel functions) of the third kind, respectively, and are defined as (22) (23)

(10)

and are the th-order even and odd the in which modified Mathieu functions of the second kind, respectively. and are the Jacobian terms for the field point and source point , respectively, as follows: (24) (25)

(11)

kernels in (18) and (21) contain the It is noted that and , while and kernels do not include the equal sign of equal sign due to the discontinuity across the boundary.

and

C. Expansion for Boundary Densities

(12)

For the boundary densities along the elliptical boundaries, we apply the eigenfunction expansion to approximate the th boundary potential and normal derivative in its local elliptical coordinates as follows:

(13)

(26)

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Fig. 2. Adaptive observer system.

Fig. 3. Decomposition of the potential gradient.

(27) respectively, where , , , and are the unknown coefficients of the th boundary densities. The Jacobian term may appear either in the kernel functions of (19)–(21), the boundary densities of (27), or the elliptical boundary contour integration . We may worry about the possible use of orthogonal relations for the Mathieu bases due to the presence of . Fortunately, the Jacobian terms can cancel each other out by artificially introducing a Jacobian term in the expansion of boundary flux. Therefore, the orthogonal

Fig. 4. Elliptical waveguide containing a confocal strip.

(18)

(19)

(20)

(21)

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TABLE I COMPARISON BETWEEN PRESENT RESULTS AND THOSE OF TWO REFERENCES. (a) FOR THE EVEN TM MODE. (b) FOR THE ODD TM MODE. (c) FOR THE EVEN TE MODE. (d) FOR THE ODD TE MODE

relations can be fully utilized in the contour integration of the elliptical boundary, which can be analytically determined. D. Adaptive Observer Systems Since the geometry of an elliptical and a confocal elliptical waveguides can be described exactly by a single elliptical coordinates, all boundary contour integrations can be analytically determined. The analytical solutions can also be obtained by using the present method. Regarding the nonconfocal case, it

cannot be clearly described by using only a single elliptical coordinates. To analytically determine all boundary contour integrations for the nonconfocal case, the addition theorem for translating the Mathieu functions may be required. However, the addition theorem for translating the Mathieu function is quite complex. Due to the rule of objectivity for the observer system, the addition theorem for translating the Mathieu functions can be avoided by introducing the adaptive observer system, which is chosen to fully employ the property of degenerate kernels.

LEE AND CHEN: SEMIANALYTICAL APPROACH FOR NONCONFOCAL SUSPENDED STRIP IN ELLIPTICAL WAVEGUIDE

Nevertheless, the expansion of a closed-form fundamental solution into degenerate kernel in this paper is also one kind of subtraction theorem instead of addition theorem. Fig. 2 shows the boundary contour integration for the elliptical boundary. It is worth noting that the origin of the observer system can be adaptively located on the center of the corresponding ellipse under integration to fully utilize the analytical properties of elliptical boundaries. The adaptive observer system means that the location of the local observer system is shifted according to the boundary contour of the integral path. The main purpose is to describe the boundary contour in terms of a constant radial parameter. For instance, if the integral path is an outer ellipse, we set a local elliptical coordinate system to describe the ellipse in terms of a constant radial parameter. By this way, the dummy variable in the integration on the elliptical boundaries is only the angle instead of the radial coordinate . Therefore, all boundary contour integrations can be analytically determined by using the orthogonal relations of the Mathieu function. Similarly, we set a local elliptical coordinate system to describe the strip in terms of a constant radial parameter when the integral path is on the strip. By using the adaptive observer system, all the boundary contour integrals can be determined analytically free of sense of principal values.

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where

(29) Based on the chain rule, we have

(30) (31) After arrangement, the gradients of follows:

can be expressed as

(32)

(33) E. Normal Derivative of the True Normal Vector If only the singular integral formulation is employed to deal with the boundary value problems (BVPs) containing a degenerate boundary without any special treatments such as domain decomposition, the problem of nonunique solution may appear. According to the idea of the dual BEM [35], the problem of a nonunique solution due to a degenerate boundary can be overcome by introducing the hypersingular integral formulation. When boundaries of BVPs are described by a constant radial coordinate in the same elliptical coordinates such as an ellipse and confocal ellipse, the and kernels in (20) and (21) can be directly used for evaluating the hypersingular integral formulation without any special treatment of vector decomposition. However, a special treatment for the normal derivative of field point should be taken care of once the hypersingular formulation is employed to deal with BVPs containing more than two elliptical boundaries, e.g., nonconfocal ellipse. The field point and source point may not locate on the elliptical boundaries with the same foci, except the two locating points on the same elliptical boundary. As shown in Fig. 3, a field point is located on the elliptical boundary and the integration path is along the elliptical boundary . Based on the adaptive observer system, the local elliptical coordinates is set for the elliptical boundary . The normal vector with respect to the field point is . Therefore, the normal derivative for the and kernels depends on the vector instead of the vector . The definition of normal derivative in the Cartesian coordinates is as follows: (28)

Therefore, the normal derivative for the field point in Fig. 3 can be obtained by considering . By this way, the and kernels are original defined as follows: (34) (35) instead

and

of , respectively.

F. Linear Algebraic Equations In the real implementation, we move the collocation points on the real boundary by using the null-field formulation of (12) and (13) and we have

(36)

(37)

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TABLE II NORMALIZED CUTOFF WAVELENGTHS OF CASE 2

Fig. 5. Relative error versus number of truncation terms.

The kernel functions of , , , and are expressed in terms of degenerate kernels, and and are substituted by using the eigenfunction expansion. In order to calculate the unknown coefficients, boundary nodes on each elliptical boundary for matching boundary conditions are needed and they are uniformly collocated on each elliptical boundary. Therefore, two linear algebraic equations can yield (38) (39) , , , and are the influence matrices with where by , and denote the a dimension of column vectors of unknown coefficients with a dimension of by 1 in which , , , , , and can be defined as follows: (40) (41) (42) (43)

(44)

where the vectors the forms of

and

are

in and , respectively; the first ) in , , and denotes subscript ( the index of the th boundary where the collocation point is ) denotes the index located and the second subscript ( and of the th boundary where the boundary densities are specified. The influence coefficient matrices of the linear algebraic equation are partitioned into blocks, and each off-diagonal block corresponds to the influence matrices

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The submatrix in (40)–(43) yield (45), shown at the bottom of the page, respectively, where the element of for and kernels in (45) can be obtained by

TABLE III NORMALIZED CUTOFF WAVELENGTHS OF CASE 3

(46)

(47) for while we can calculate the element of kernels by using the following formulations:

and

(48)

(49)

between two different boundaries. The diagonal blocks are the influence matrices due to itself in each individual boundary.

.. .

.. .

..

.

where and (elliptical) is the angular coalong the elliptical boundordinate of the collocating point aries. By rearranging known and unknown sets, unknown coefficients are easily determined by using the linear algebraic equafor tion. The details of how to obtain the matrix elements of the simplest TM case of an elliptical waveguide is addressed in the Appendix. In addition, the two linear algebraic equations of (38) and (39) can also be obtained by using the dual integral formulation for the domain point of (10) and (11), respectively, since they yield the same algebraic equations. When the limit is taken from the inside or from the outside of the domain, both limits represent the same algebraic equation that is an approximate counterpart of the boundary integral equation. For the case of a smooth boundary, the left-hand-side term is or rather than or for the domain point or 0 for the null-field point. Besides, the limiting case to the boundary is also addressed. The jump behavior across the elliptical boundaries are well captured by using the Wronskian relations [36]

.. .

.. .

..

.

.. .

(45)

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TABLE IV NORMALIZED CUTOFF WAVELENGTHS OF CASE 4

(53) It is the reason why the same linear algebraic equation can be obtained by using boundary integral formulations either from the domain point of (10) or from the null-field point of (12) when field point is exactly pushed on the real boundary from either the domain or the complementing domain. In the real calculation, we prefer to employ the dual null-field boundary integral formulation due to its easy use in constructing the linear algebraic equation free of a jump term. G. Special Treatment for a Degenerate Boundary When the integration path is on the degenerate boundary , the radial coordinate is equal to zero. It may result in the fact that the th-order odd modified Mathieu function of the first kind and the derivative of the th-order even modified Mathieu function of the first kind are zero. There, , and , are rank deficient fore, influence matrices by and , respectively. To make up four influence matrices to be full rank, a special treatment is required. Regarding (38), at least equations are added or replaced to promote the rank. According to the idea of the dual BEM [35], the last rows of (39) are replaced by the last rows of (38) as follows: (54) where and are equal to and , respectively. rows of (39) are replaced by the last Similarly, the last rows of (38) as follows: (55)

of modified Mathieu functions, and the Wronskian relations are defined by

where and are equal to and , respectively. Hence, four influence matrices in (52) and (53) are full rank, except when the wavenumber is equal to the cutoff wavenumber. In the real implementation, the cutoff wavenumber is obtained by using the direct searching scheme. IV. NUMERICAL EXAMPLES

(50) (51) The jump behavior across the elliptical boundaries is as follows:

A. Confocal Case Regarding the confocal elliptical waveguide, as shown in Fig. 4, the analytical eigenequations [26] of the cutoff wavenumber can be derived by using the present method. For TM modes, we have

(56) (52)

(57)

LEE AND CHEN: SEMIANALYTICAL APPROACH FOR NONCONFOCAL SUSPENDED STRIP IN ELLIPTICAL WAVEGUIDE

EIGENMODES

FOR

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TABLE V THOSE ROOTS WITH MULTIPLICITY 2

where (56) and (57) represent even and odd modes, respectively. In the real implementation, the radial coordinate of the strip is equal to 0. Therefore, (56) and (57) can be simplified as follows:

(58) (59)

where

is equal to (60)

Similarly, we have two eigenequations of TE modes for the confocal elliptical domain as follows:

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TABLE VI FORMER EIGHT TRUE EIGENVALUES OF A CIRCULAR WAVEGUIDE CONTAINING A CENTRAL STRIP

(61) (62) By substituting simplified into

to be 0, the above two eigenequations are

(63) (64) The analytical eigenequations derived by the present method are the same with the result in the literature [14]. The eccentricity for an ellipse is defined by (65) The normalized cutoff wavelengths

is defined as

(66) is the cutoff wavelength. The first normalized cutoff where wavelengths of even and odd modes for TM and TE waves are listed in Table I, respectively. The results obtained by the present method are in agreement with those of data in two references [14], [15] over a wide range of eccentricities. B. General Case To verify the generality of the present approach, we revisit three nonconfocal cases with various geometric parameters. We plot a figure of relative error versus number of truncation for the first cutoff wavelength of the TM mode of Case 2 shown in Fig. 5. The reference value is 0.8364 . It is observed that a fast convergent rate is achieved. To make the numerical results of higher order cutoff wavelengths to be more accurate, we need the number of 42 truncation

Fig. 6. Circular waveguide containing a central strip.

terms in the real implementation. The cutoff wavelengths in the range between 0–10 of the cutoff wavenumber are tabulated in Tables II–IV. It is noted that we only employed (52) to search for cutoff wavenumbers. The numerical results obtained by using the dual BEM and the finite-element method (FEM) are also listed in Tables II–IV. Regarding numerical results of the literature [15], Ragheb claimed that all of his numerical results are the first three cutoff wavelengths for both TM and TE cases. However, some of the first three cutoff wavelengths seem to be lost in his paper. For those lost values, the present results are compared well with those of the dual BEM and the FEM. The lost ones are denoted by the symbol in Tables II–IV. Besides, the second cutoff wavelengths of the odd TE mode obtained by using the present method are inconsistent with those of the literature. Those inconsistent values are marked by the symbol #. From this finding, we may wonder that his results may be in error since the present results are consistent with the results of the dual BEM and the FEM. It is interesting to find that there are some roots with multiplicity 2 in those results. These roots with multiplicity 2 are denoted by symbol. The mode shapes of those roots are shown in Table V. Finally, a circular waveguide containing a central strip is also considered, as shown in Fig. 6. This case can be seen as a special case of an elliptical . Nevertheless, we set the ratio waveguide by setting of to to be near 1 in the real implementation. If the ratio is exactly equal to 1, the radial coordinate will be infinite and the program cannot work. After comparing with those values in the literature, [37] and [38], as shown in Table VI,

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TABLE VII FORMER FIVE MODES FOR A CIRCULAR WAVEGUIDE CONTAINING A CENTRAL STRIP

TABLE VIII COMPARISON OF A TM CUTOFF WAVENUMBER FOR CIRCULAR WAVEGUIDE CONTAINING A STRIP

V. CONCLUSIONS A

good agreements are made. The first five modes are shown in Table VII. Besides, we also reproduce some results of cutoff wavenumber for comparison with those in [17], as shown in is very close Table VIII. It is found that if the ratio of to to 1, the results are very consistent with those data of [17].

For an elliptical waveguide containing a nonconfocal suspended strip with arbitrary width, the null-field BIEM was successfully employed to solve the eigenproblem in a semianalytical manner. Based on the addition theorem, the closed-form fundamental solution is expanded into the degenerate kernel containing the Mathieu and modified Mathieu functions in the elliptical coordinates. Boundary densities are represented by using the eigenfunction expansions due to the orthogonal properties of Mathieu functions. To overcome the problem of rank deficiency due to the degenerate boundary, the hypersingular integral formulation is also used. After comparing with published data, good agreement is made, except those of incorrect values in the literature, but numerical results using the dual BEM and FEM match well with all those results obtained by using the present method. It indicates that those inconsistent values in the literature may be in error. It is interesting to find that there are some roots with multiplicity 2. Besides, acceptable results can be obtained by using the present method in the elliptical coordinates for the special case of a circular waveguide containing a central strip.

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.. .

.. .

..

.. .

.

APPENDIX for the simplest According to (43), the influence matrix TM case of an elliptical waveguide yield (A1), shown at the top of the page, where the element of in (A1) can be obtained by

(A2)

(A3) in which is the radial parameter of the elliptical coordinates for an elliptical waveguide. REFERENCES [1] L. J. Chu, “Electromagnetic waves in elliptical pipes of metal,” J. Appl. Phys., vol. 9, pp. 583–591, Sep. 1938. [2] J. G. Kretzschamar, “Wave propagation in hollow conducting elliptical waveguides,” IEEE Trans. Microw. Theory Techn., vol. MTT-18, no. 9, pp. 547–554, Sep. 1970. [3] D. A. Goldberg, L. J. Laslett, and R. A. Rimmer, “Modes of elliptical waveguides: A correction,” IEEE Trans. Microw. Theory Techn., vol. 38, no. 11, pp. 1603–1608, Nov. 1990. [4] J. B. Davies, “Comments on ’Modes of elliptical waveguides: A correction’,” IEEE Trans. Microw. Theory Techn., vol. 40, no. 1, p. 174, Jan. 1992. [5] J. C. Wiltse and T. H. Gfroerer, “Further comments on ’Modes of elliptical waveguides: A correction’,” IEEE Trans. Microw. Theory Techn., vol. 40, no. 1, pp. 175–176, Jan. 1992. [6] S. J. Zhang and Y. C. Shen, “Eigen-mode sequence for an elliptical waveguide with arbitrary ellipticity,” IEEE Trans. Microw. Theory Techn., vol. 43, no. 1, pp. 227–230, Jan. 1995. [7] G. D. Tsogkas, J. A. Roumeliotis, and S. P. Savaidis, “Cutoff wavelengths of elliptical metallic waveguides,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 10, pp. 2406–2415, Oct. 2009. [8] J. B. Davies and J. G. Kretzschmar, “Analysis of hollow elliptical waveguides by polygon approximation,” Proc. Inst. Electr. Eng., vol. 119, no. 5, pp. 519–522, May 1972. [9] B. K. Wang, K. Y. Lam, M. S. Leong, and P. S. Kool, “Elliptical waveguide analysis using improved polynomial approximation,” Proc. Inst. Elect. Eng.—Microw., Antennas, Propag., vol. 141, no. 6, pp. 483–488, Dec. 1994. [10] C. Shu, “Analysis of elliptical waveguides by differential quadrature method,” IEEE Trans. Microw. Theory Techn., vol. 48, no. 2, pp. 319–322, Feb. 2000. [11] P. L. Jiang, S. Q. Li, and C. H. Chan, “Analysis of elliptical waveguides by a meshless collocation method with the Wendland radial basis functions,” Microw. Opt. Technol. Lett., vol. 32, no. 2, pp. 162–165, Jan. 2002. [12] D. L. Young, S. P. Hu, C. W. Chen, C. M. Fan, and K. Murugesan, “Analysis of elliptical waveguides by the method of fundamental solutions,” Microw. Opt. Technol. Lett., vol. 44, no. 6, pp. 552–558, Mar. 2005.

.. .

..

.

.. .

(A1)

[13] J. A. Roumeliotis and S. P. Savaidis, “Cutoff frequencies of eccentric circular-elliptic metallic waveguides,” IEEE Trans. Microw. Theory Techn., vol. 42, no. 11, pp. 2128–2138, Nov. 1994. [14] T. Rozzi, L. Luca, and M. Ronzitti, “Analyzes of the suspended strip in elliptical cross section by separation of variables,” IEEE Trans. Microw. Theory Techn., vol. 45, no. 11, pp. 1778–1784, Oct. 1997. [15] H. A. Ragheb, “Analysis of a nonconfocal suspended strip in an elliptical cylindrical waveguide,” IEEE Trans. Microw. Theory Techn., vol. 48, no. 7, pp. 1148–1151, Jul. 2000. [16] K. A. Sæark, “A note on addition theorems for Mathieu functions,” Z. Angew. Math. Phys., vol. 10, pp. 426–428, 1959. [17] B. T. Babili, J. L. Tsalamengas, and J. G. Fikioris, “TM and TE modes in cylindrically shielded strip waveguides,” J. Electromagn. Waves Appl., vol. 6, no. 10, pp. 1291–1316, 1992. [18] I. O. Vardiambasis, J. L. Tsalamengas, and J. G. Fikioris, “Hybrid wave propagation in generalized Goubau-type striplines,” Proc. Inst. Elect. Eng.—Microw., Antennas, Propag., vol. 144, no. 3, pp. 167–171, 1997. [19] J. L. Tsalamengas, I. O. Vardiambasis, and J. G. Fikioris, “TE and TM modes in circularly shielded slot waveguides,” IEEE Trans. Microw. Theory Techn., vol. 41, no. 6/7, pp. 966–973, Jun./Jul. 1993. [20] I. O. Vardiambasis, J. L. Tsalamengas, and J. G. Fikioris, “Hybrid wave propagation in circularly shielded microslot lines,” IEEE Trans. Microw. Theory Techn., vol. 43, no. 8, pp. 1960–1966, Aug. 1995. [21] C. M. Linton, “Accurate solution to scattering by a semi-circular groove,” Wave Motion, vol. 46, pp. 200–209, 2009. [22] J. T. Chen, Y. T. Lee, and J. W. Lee, “Torsional rigidity of an elliptic bar with multiple elliptic inclusions using the null-field integral approach,” Comput. Mech., vol. 46, pp. 511–519, 2010. [23] J. T. Chen and A. C. Wu, “Null-field integral equation approach for piezoelectricity problems with arbitrary circular inclusions,” Eng. Anal. Boundary Element, vol. 30, no. 11, pp. 971–993, 2006. [24] J. T. Chen and P. Y. Chen, “A semi-analytical approach for stress concentration of cantilever beams with holes under bending,” J. Mech., vol. 23, no. 3, pp. 211–221, 2007. [25] J. T. Chen and A. C. Wu, “Null-field integral equation approach for multi-inclusion problem under antiplane shear,” J. Appl. Mech.–Trans. ASME, vol. 74, pp. 469–487, 2007. [26] J. T. Chen, J. W. Lee, and S. Y. Leu, “Analytical investigation for spurious eigensolutions of multiply-connected membranes containing elliptical boundaries using the dual BIEM,” Int. J. Solids Struct., vol. 48, pp. 729–744, 2011. [27] J. T. Chen, C. T. Chen, P. Y. Chen, and I. L. Chen, “A semi-analytical approach for radiation and scattering problems with circular boundaries,” Comput. Meth. Appl. Mech. Eng., vol. 196, pp. 2751–2764, 2007. [28] J. T. Chen and J. W. Lee, “Water wave problems using null-field boundary integral equations: Ill—Posedness and remedies,” Appl. Anal., vol. 91, no. 4, pp. 675–702, 2012. [29] J. T. Chen, J. W. Lee, and W. S. Shyu, “SH-wave scattering by a semielliptical hill using a null-field boundary integral equation method and a hybrid method,” Geophys. J. Int., vol. 188, pp. 177–194, 2012. [30] J. T. Chen, C. C. Hsiao, and S. Y. Leu, “A new method for Stokes’ flow with circular boundaries using degenerate kernel and Fourier series,” Int. J. Numer. Methods Eng., vol. 74, pp. 1955–1987, 2008. [31] W. M. Lee and J. T. Chen, “Null-field integral equation approach for free vibration analysis of circular plates with multiple circular holes,” Comput. Mech., vol. 42, pp. 733–747, 2008. [32] W. M. Lee and J. T. Chen, “Scattering of flexural wave in thin plate with multiple inclusions by using null-field integral equation approach,” J. Sound Vibr., vol. 329, pp. 1042–1061, 2010. [33] R. F. Harrington, Time–Harmonic Electromagnetic Fields. New York: McGraw-Hill, 1993.

LEE AND CHEN: SEMIANALYTICAL APPROACH FOR NONCONFOCAL SUSPENDED STRIP IN ELLIPTICAL WAVEGUIDE

[34] P. Morse and H. Feshbach, Method of Theoretical Physics. New York: McGraw-Hill, 1953. [35] J. T. Chen and H.-K. Hong, “Review of dual boundary element methods with emphasis on hypersingular integrals and divergent series,” Appl. Mech. Rev., vol. 52, no. 1, pp. 17–33, 1999. [36] S. Zhang and J. Jin, Computation of Special Functions. New York: Wiley, 1996. [37] J. T. Chen, S. R. Lin, I. L. Chen, and S. W. Chyuan, “Eigenanalysis for membranes with stringers using conventional BEM in conjunction with SVD technique,” Comput. Method Appl. Mech. Eng., vol. 192, no. 11–12, pp. 1299–1322, 2003. [38] C. W. Chen, C. M. Fan, D. L. Young, K. Murugesan, and C. C. Tsai, “Eigenanalysis for membranes with stringers using the methods of fundamental solutions and domain decomposition,” Comput. Model. Eng. Sci., vol. 8, no. 1, pp. 29–44, 2005.

Jia-Wei Lee was born in Changhua, Taiwan, on July 23, 1987. He received the M.S. degree in harbor and river engineering from National Taiwan Ocean University, Keelung City, Taiwan, in 2010, and is currently working toward the Ph.D. degree at National Taiwan Ocean University. He is currently a member of the Mechanics, Sound and Vibration Laboratory, Department of Harbor and River Engineering, National Taiwan Ocean University. His research focuses on the application of the null-field BIEM. He has authored 18 papers.

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Jeng-Tzong Chen was born in 1962. He received the B.S. degree in civil engineering, M.S. degree in applied mechanics, and the Ph.D. degree in civil engineering from National Taiwan University, Taipei, Taiwan, in 1984, 1986, and 1994, respectively. From 1986 to 1990, he was a Research Assistant with the Structural Division, Department of Rocket and Missile System, Chung Shan Institute of Science and Technology. In 1994, he was an invited Associate Professor with the Department of Harbor and River Engineering, National Taiwan Ocean University, Keelung, Taiwan. In 1998, he was became a Full Professor. In 2004, he was selected to be the Distinguished Professor. In 2007, he was selected as the Lifetime Distinguished Professor. He authored two books in Chinese on dual BEM and FEM using MSC/NASTRAN, respectively. He is an Associate Editor for the Engineering and Boundary Elements (EABE) and Journal of Mechanics (JoM) journals. He is currently an Editorial Board member of five international journals. He has authored or coauthored over 177 SCI papers on BEM and FEM in technical journals. Near 1027 citings can be found. His major interest is computational mechanics. He had derived the theory of dual integral equations for BVPs with degenerate boundary. He also developed four dual BEM programs for the boundary value problems (BVPs) of Laplace equation, Helmholtz equation, biHelmholtz and modified Helmholtz equations, and Navier equation. He also recently employed the null-field integral equations to solve BVPs with circular boundaries. The BEM is one focus of his research interests. His other focuses may be categorized into three areas: vibration and acoustics; computational mechanics; and engineering and mathematical education. Dr. Chen has been invited to give plenary and keynote lectures, twice at the World Congress on Computational Mechanics (WCCM4, Buenos Aries, Argentina, and WCCM5, Vienna, Austria) and at FEM/BEM 2003, St. Petersburg, Russia. He was the recipient of the 2011 Academic Award of the Ministry of Education (MOE), R.O.C., the International Conference on Advances in Computing and Management (ICACM) Fellows Award, the Outstanding Research Award of the National Science Council, Taiwan (three times), and the 2002 the Wu Ta-You Memorial Award.

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FDTD Modeling of Impedance Boundary Conditions by Equivalent LTI Circuits Mauro Feliziani, Senior Member, IEEE, and Silvano Cruciani

Abstract—A circuit-based implementation of the Leontovich impedance boundary condition (IBC) is proposed. The surface impedance of a lossy medium is approximated by a series of first-order rational functions using the vector-fitting technique. Thus, an equivalent analogical circuit with lumped linear time-invariant parameters is derived, which is simply analyzed in time domain without performing any convolution. The implementation of the equivalent circuit in the finite-difference time-domain method is detailed for different circuit configurations. Finally, the advantages of the proposed method are presented and compared with those of other numerical procedures for the solution of the IBC in time domain. Index Terms—Circuit modeling, circuit-oriented electromagnetic (EM) field solution methods, finite difference, finite-difference time-domain (FDTD) methods, impedance boundary condition (IBC).

I. INTRODUCTION

T

HE ANALYSIS of the electromagnetic field by partial differential equation (PDE) techniques inside a conductive region requires a dense spatial discretization and this leads to a heavy computational cost for field solution. When the skin depth is small compared with the linear dimension, and when the interest is focused on the reflected field rather than the transmitted field, the conductive region can be eliminated from the computational domain and impedance boundary conditions (IBCs) can be imposed on the new boundary to perform the same field reflection. The IBC permits a significant reduction of the number of field unknowns through the elimination of grid points within large conductive regions and the increase of the cell dimension in the exterior region. The IBC was formulated by Leontovich several years ago [1] and was applied to the boundary element method (BEM) [2], [3], the finite-element method (FEM) [4]–[6], and finite-difference time-domain (FDTD) method [7]–[15]. Time-domain solutions are more complicated than frequency-domain solutions since the product in the frequency-domain equations becomes a convolution equation in the time domain. It means that, in principle, it should be necessary to store the field solution on the IBC boundary at any time instant,

Manuscript received April 26, 2012; revised August 28, 2012; accepted August 29, 2012. Date of publication October 11, 2012; date of current version December 13, 2012. The authors are with the Department of Industrial/Information Engineering/ Economics, University of L’Aquila, L’Aquila 67100, Italy (e-mail: mauro. [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2217981

from the initial time step up to the current time step, leading to a large memory cost. To reduce this unacceptable cost, several techniques have been developed to solve recursively the convolution integral by approximating the integrand with a sum of exponentials [10]–[16]. Here, a new circuit model is proposed to simulate low-order IBC [1], i.e., the conductive body surface is considered as a planar surface and the field is assumed to penetrate into the body only in the direction normal to the body surface. In the past, some authors had the idea to model the IBC by a ladder network composed by linear time-invariant (LTI) shunt resistances and series inductances [17], [18]. In this paper, the IBC is modeled by an equivalent circuit with only parallel branches of resistor-inductor series circuits. The - and -parameters are derived by the expression of the rational function used to approximate the equivalent admittance by the vector-fitting (VF) procedure [19]–[21]. From a computational point of view, the analysis of series circuits can be carried out by analytical and numerical methods without solving any convolution integral. This is the great advantage of the proposed circuit method in comparison with other methods developed in the past. The main difference with the method proposed in [18] is given by the different mathematical treatment, which leads to a different equivalent circuit (i.e., ladder network in [18], parallel branches in the proposed methods). As described in the following sections, the method proposed here requires less circuit components to model IBC in a very large frequency band, leading to higher efficiency and accuracy. Other methods using rational function approximation and recursive convolutions have been presented in the past [11], but they were not based on the circuit approach, and therefore are not directly suitable for circuit-field simulations. The circuit approach is very simple and can be implemented to model more complex material (e.g., curved metal boundary [22], linear magnetized ferrites [23], composite materials, metamaterials, nanostructured materials, smart materials, and dispersive materials). The IBC problem solution is here addressed by the FDTD method since its implementation is straightforward, but other numerical techniques based on field-circuit problem solutions could be used [18], [24]–[27]. In the following sections, the proposed procedure is described and discussed with particular care on the FDTD implementation. The applications are carried out analyzing 1-D and 2-D domains since the Leontovich-type (low order) IBC implementation to 3-D regions is straightforward and do not present any further difficulty. Also, the limits of low-order IBC are well known and are not altered by the proposed circuit modeling [8], [12], [28]–[31].

0018-9480/$31.00 © 2012 IEEE

FELIZIANI AND CRUCIANI: FDTD MODELING OF IBCs BY EQUIVALENT LTI CIRCUITS

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Fig. 2. Equivalent IBC circuit with LTI parameters used to model the fre. quency-domain admittance Fig. 1. (a) Separation surface tion of the conductive region of IBC on .

between the regions and . (b) Eliminafrom the computational domain by imposition

quency-dependent admittance is then given by the following rational function:

II. RATIONAL FUNCTION APPROXIMATION The separation surface between two different regions, and , is shown in Fig. 1(a). The specific characteristics in are (permittivity), (permeability), and (conductivity), while in , are , , and . Assuming for the sake of simplicity that medium 1 is a poor conductor or a nonconductor , while medium 2 is a good conductor , where is the angular frequency. The electric and magnetic field components tangential to the separation surface, and , respectively, are then related by the IBC given by [1]

(7)

To synthesize a circuit equivalent to (7), the admittance can be expressed as (8) that can be rewritten as

(1) where and

is the unit vector normal to the separation surface , is the intrinsic impedance of , given by

(9) when assuming (10a)

(2)

(10b) Equation (2) can be used as IBCs after elimination of the conductive region from the computational domain, as shown in Fig. 1(b). Assuming and defining , it yields [11] (3) Defining ized impedance

, it is possible to introduce the normalas in [11]

(10c) The equivalent circuit of the frequency-dependent admittance is composed by parallel branches, as shown in Fig. 2, each composed by only lumped LTI parameters. III. FDTD IMPLEMENTATION OF IBC A. Circuit IBC Equations Maxwell’s curl equations in the region mated by finite differences as

can be approxi-

(4)

(11)

or, following the same procedure described above, a normalized admittance as

(12)

(5) Equation (5) can be approximated by a rational function via the VF procedure [19]–[21] (6) where residue,

is a prefixed number of the poles, is the th is the th pole, and is a real quantity. The fre-

is the electric where the classical FDTD notation is used. field vector at the time instant is the magnetic field vector at the time instant is the constant time step, and is the iteration number. Equations (11) and (12) can be numerically solved by the FDTD method using central differences in both time and space. Adopting the leapfrog scheme, an explicit iterative scheme is obtained. For our purpose, it is important to illustrate the FDTD implementation in the time axis. Thus, a simple 1-D FDTD problem is considered assuming the wave is propagating in the positive -direction, the electric field having only the -component as , and the magnetic field having only the

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Fig. 3. Lumped parameter -circuit equivalent to (13).

Fig. 5. (a) 1-D FDTD grid for the IBC implementation assuming (electric field boundary). (b) IBC equivalent circuit.

Fig. 4. Lumped parameter T-circuit equivalent to (14).

-component as . The discretized 1-D iterative system then has the following form:

(13)

(14) where, according to the leapfrog scheme, subscripts are referred to the spatial position and is the space cell size. The FDTD equations (13) and (14) can be modeled by simple LTI circuits. Equation (13) describes at any time instant the application of Kirchhoff’s Voltage Law (KVL) to the mesh of the FDTD grid shown in Fig. 3, where the circuit mesh is shadowed. Equation (14) describes the application of Kirchhoff’s Current Law (KCL) to the th node of the FDTD grid, as shown in Fig. 4. The updating iterative scheme of the FDTD equations (13) and (14) is given by

(15)

(16) The implementation of the time-constant LTI lumped parameter circuit equivalent to the frequency-dependent admittance is very simple. We terminate the last FDTD cell before separation surface by the equivalent circuit of shown in Fig. 5 or in Fig. 6, respectively, for the equivalent circuits of Figs. 3 or 4.

Fig. 6. (a) 1-D FDTD grid for the IBC implementation assuming (magnetic field boundary). (b) IBC equivalent circuit.

The magnetic field on is called and can be obtained, applying KCL, by the sum of all the magnetic fields, or currents in the equivalent circuit of , in all the parallel branches as (17)

B. Numerical Integration—Circuit Impedance Boundary Condition (NI-CIBC) Method Considering the configuration of Fig. 5, the electric and magnetic fields on (point ) are called and , respectively. The updating equation (16) can be used assuming and , and via (17), it yields

(18)

FELIZIANI AND CRUCIANI: FDTD MODELING OF IBCs BY EQUIVALENT LTI CIRCUITS

Equation (18) can be solved directly in time domain applying finite-difference schemes to the circuit branch constitutive relationships as (19) and the lumped circuit parameters of indicating with the th circuit branch given by (10). The magnetic fields on the circuit branches are then obtained by the following updating equations:

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when assuming the electric field constant during the interval and equal to . Therefore, (25) represents the FDTD solution with a piecewise constant approximation for the electric field. Once calculated, the update equation for the electric field on (see Fig. 5) is still given by (18). D. Spectral Decomposition—Circuit IBC (SD-CIBC) Method Applying KVL at the circuit mesh containing any th parallel branch of the circuit shown in Fig. 6, the frequency-domain equation is obtained as (26)

(20)

Rewriting (26) in the time domain and using central finite differences, via (17) it yields

Equations (20) and (18) represent the numerical implementation of the time-domain IBC condition, which can be easily integrated in the classical FDTD time iteration scheme. This approach is called the NI-CIBC method. C. Analytical Integration—Circuit Impedance Boundary Condition (AI-CIBC) Method

(27)

The IBC circuit in Fig. 2 is constituted by parallel branches, each composed by a series connection. For this kind of circuit, an analytical solution exists under some assumptions. The transient current flowing in an circuit is given by

By some manipulations (27) can be rewritten as

(28)

(21) where is the forced response, and is the natural or zero input response. Assuming a voltage source excitation constant over the time interval being , the initial time, and an initial condition for the inductor current , the zero input current is (22) where and

is the time constant. Using , the solution of (21) can be given by

Equation (28) can be written in a compact form as (29) where dimension

and

and are square matrices of whose terms are given by

(i.e., is a unit vector of dimension (29) are

(30a)

(23) Equation (23) can be adapted to the solution of the IBC circuit problem in Fig. 2. Substituting the voltage source with the tangential electric field , the current with the magnetic field , (23) becomes

(24) Equation (24) can be used for the iterative time solution of the FDTD method. Adopting the classical notation for the time, calculating (24) at the time instant and assuming the initial time instant , it yields (25)

and are diagonal), and . The other quantities in

(30b) The update equation is obtained inverting the nonsingular matrix as (31) The tangential magnetic field (30a) as

is then obtained via (17) and (32)

is updated by the classical FDTD while the electric field procedure (16) when assuming . Defining , we can rewrite (31) as (33)

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Since the matrix is nonsingular with different eigenvalues, it is possible to apply the spectral decomposition (SD) method [32]. Therefore, the matrix can be written in the form , where is a diagonal matrix whose terms along the diagonal are the eigenvalues of the matrix , while the columns of are the corresponding eigenvectors. Defining the vector via the linear transformation, (34) (31) becomes (35) where becomes

is a vector having

rows and (32) (36)

Finally, (35) and (36) can be rewritten for the

th term as

(37a) (37b) is the th eigenvalue of , while and are the where th terms of the vectors and , respectively. Equations (37) and (16) are the update equations that can be implemented in the FDTD code. It should be noted that the operations required to determine , , and are executed only once in a preprocessing step. The method proposed here is called the SD-CIBC method. IV. PERFORMANCES AND APPROXIMATIONS In this section, a rigorous analysis is performed to evaluate the stability and the accuracy of the three considered CIBC methods, particularly as a function of the conductivity . All the CIBC FDTD methods are conditionally stable due to the leapfrog algorithm used by the FDTD method, but also the electromagnetic parameters affects their stability. By a simple analysis, it appears evident that the minimum time constant in the NI-CIBC method must be much greater than the fixed time step, , to assure stability. The AI-CIBC method is also conditionally stable as a function of the conductivity and it can be considered exact when assuming a time-invariant source. It means that in (25) the electric field on the IBC boundary is assumed to be constant during the time interval . This is obviously not true, but it can be considered a good approximation for slow time variation of during the time interval . Instead, the stability of the SD-CIBC method is not affected by the electromagnetic parameters in the region . A rigorous stability analysis has been carried out adopting the Von Neumann approach based on the amplification matrix , which is built from the FDTD and IBC update equations

Fig. 7. Maximum eigenvalue versus conductivity (a) NI-CIBC method. (b) AI-CIBC method.

for the CIBC methods.

[33]. The resulting equation system is stable when all the eigenvalues of are inside the unit circle. In Fig. 7, the maximum eigenvalues of for the different proposed methods are plotted versus the value of , assuming . The NI-CIBC and AI-CIBC methods are conditionally stable and their stability is influenced by the value of , while the SD-CIBC method is not affected by the parameter due to its semiimplicit formulation. Nevertheless the SD-CIBC method is less accurate than the NI-CIBC and AI-CIBC methods when considering a poor conductive material. The selected ranges for in the -axis of Fig. 7(a) and (b) are chosen to highlight the conditional stability versus of the NI-CIBC and AI-CIBC methods. The absolute value of the maximum eigenvalue is constantly equal to 1 in the SD-CIBC for any in the range from 10 to 10 S/m and the figure is therefore omitted for this unconditionally stable method. In Fig. 7(a) and (b), is chosen equal to , while for the analysis of the SD-CIBC method, is assumed to be . As example, the computational time of the coefficients , , and in the SD-CIBC method (once given in input the circuital parameters ) is estimated in 88 s for a ten-pole test case by an entry-level workstation (Intel i5 3 GHz with 8 GB of RAM). The accuracy of the rational approximation of the surface impedance is investigated. The number of poles (i.e., circuit parallel branches) has been selected after a fine tuning of the parameters of the VF approximation as function of required precision and bandwidth. In the considered test case, the number of poles is fixed to ten, even if it can be significantly diminished reducing

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Fig. 8. (a) Equivalent circuit to evaluate the reflection coefficient . (b) IBC assuming poles. circuit equivalent to

TABLE I LTI CIRCUIT LUMPED PARAMETERS FOR

S/m

the frequency band of interest, as pointed out in [15]. To evaluate the error in the field reflection, the simple circuit shown in Fig. 8(a) is analyzed, where and are the intrinsic impedances of and , respectively. The parameter chosen here for the accuracy analysis is the reflection coefficient . The impedance is varied to simulate far- and near-field (magnetic and electric) sources, while is the input impedance of the IBC circuit shown in Fig. 8(b). The values of LTI resistors inductors and time-constants obtained by the VF procedure are reported in Table I for a medium characterized by and S/m assuming poles. The coefficient in (10a) is chosen to be unitary to ideally cover the entire band. The reflection coefficient calculated for different values of and are reported in Fig. 9 and are compared with an equivalent ten-section ladder network obtained by the Celuch method [18] assuming as central frequency GHz in order to have an optimal behavior in all three considered examples. It should be noted that the proposed method based on rational function approximation by equivalent circuits is very accurate in the whole frequency band used in this application (i.e., 1 kHz–1 THz), while the Celuch method is accurate in amplitude only in the higher part of the band (i.e., 1 MHz–1 THz). Therefore, the proposed CIBC methods are very suitable for wideband simula-

Fig. 9. Reflection coefficient calculated for different values of and apby a rational function with poles. (a) proximating S/m. (b) , S/m. (c) S/m.

tions, while the Celuch method is valid only for some frequency bands. To achieve the same accuracy of the proposed method using ten poles, the Celuch method requires many more sections of the ladder network. It is also sensitive of the type of the source reducing the error for near electric field or plane wave sources, while the error is significant for the magnetic near-field source . It should be noted that the values of and in Table I can be adapted for any conductive material characterized by relative permittivity , relative permeability , and conductivity . By (8)–(10), it is simple to demonstrate that the circuit parameters and for any linear material can be easily obtained by the following expressions: (38a)

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(38b) (38c) It should be also noted that as . In this case, the IBC works well assuming the validity of Leontovichtype IBC (i.e., plane-wave propagation inside the region ). Furthermore, as or as . It means that, for high-conductivity material as metals, it yields . In this case, it is always possible to assume that the region is a perfect electrical conductor (PEC) and impose the condition to limit calculation time while achieving accurate results for the reflected field. The three proposed methods are also very efficient in terms of computational time since they require only the calculation of the terms (or ) and their summation in order to calculate , while for example, the method proposed in [18] requires the calculation of both voltage and current. The Celuch method has the advantage of allowing an easy calculation of the equivalent circuit parameters, while the proposed methods require the use of the VF approximation to calculate the parameters and , but they must be computed only once and then derived by (38) for any material. The accuracy of the numerical methods can be evaluated by the reflection coefficient , which is function of given by

where the convolution in time is written without using a recursive solution scheme as summation for from 0 to . From (43) via (40), it yields

(44) The asymptotic behavior of (44) is obtained for . Since the asymptotic value of the series for , being , is (45) (44) is given asymptotically by (46) where (47)

(39) Now consider the expression of the time-harmonic electric and magnetic fields of a plane wave that propagates in the medium with propagation constant (the subscripts are omitted here to improve readability)

Equation (39) can be written via (46), (48) Following the same procedure described above, (25) can be rewritten for the AI-CIBC method as

(40a) (49)

(40b) Equation (18) can be rewritten via (40) as

Equation (49) can then be rewritten via (40) as

(41) posing

(50) and by some manipulations (48) is still obtained, but AI-CIBC method is given by

(42a)

for the

(51)

(42b) Equation (41) can be rewritten for the NI-CIBC method (20) as a summation for from 0 to the actual time step

(43)

Equation (37) can be rewritten for the method SD-CIBC as

(52)

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Fig. 11. Sketch of the 1-D test case configuration. (a) FDTD domain without IBC. (b) FDTD domain with IBC.

Fig. 10. Amplitude and phase of the reflection coefficient calculated analytmm, fs, ically and by the proposed methods assuming S/m. and

and via (40) it yields

(53) with (54) at the time step The electric field by (16) and the following equation is obtained:

is calculated

(55) The admittance is obtained by some manipulations as (56)

A comparison is carried out between the analytic reflection coefficient and that derived from the numerical implementation of the VF approximation of described in (48) and (56). The error in the numerical calculation of depends on two kinds of approximations: the errors produced by the VF approximation and the error due to the time and space discretization. To simulate the asymptotic behavior, i.e., , , the values of mm and ps have been fixed in the calculations shown in Fig. 10. It should be noted how (51) tends to (47) for and both tend to (9) when since, from (42), and . From Fig. 10(b), we can observe that NI-CIBC and AI-CIBC methods are very accurate in the whole frequency band,

while the SD-CIBC method presents a phase error at higher frequencies. A comparison of the proposed FDTD circuit methods with an FDTD method based on the solution of convolution equations derived by system (1) is also performed. Equation system (1) into the time domain is given by (57) with being the inverse transform of (9). The transient magnetic field is then given by a formula equal to (25) when assuming the piecewise constant approximation for the electric field in the time interval . It means that the convolution approach is equal to the analytical solution (24) of the equivalent RL circuit in discrete time. Comparing the proposed method with that presented in [11], the main difference is in the formulation since that proposed in [11] is based on impedances instead of admittances. The other difference is in the piecewise linear approximation adopted for the field in [11], but it does not necessarily lead to a more precise solution as highlighted in [15]. In few words, the proposed methods have very similar performances of the method in [11], but with the advantage of the LTI circuit modeling for the IBC, which can be very useful in some applications. As in previous studies [11], [15], the proposed circuit IBC methods use a normalized impedance (or admittance) function, which is independent on medium properties, so the rational approximation has to be performed only once and stored in a computer program without the need to fit the rational function at any application. This a considerable advantage in the field computation. The computational time increases as the pole number increases. Normally, a suitable value for the pole number is assumed to be around – in order to properly fit the impedance/admittance function in a very large frequency range, i.e., kHz– THz, corresponding to a normalized frequency for a given value of , while a smaller number of poles can be used when the source is band-limited in a few decades. The reduction of is still an open problem, especially if the solution must be robust enough to analyze wideband fields, from near- to far-field conditions. To this aim, it is possible to find the optimum pole number for particular bands of frequencies [15]. V. NUMERICAL EXAMPLES A 1-D domain is analyzed by the FDTD method using the proposed circuit IBC methods and without IBC. An electric

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Fig. 13. Sketch of the 2-D test case configuration. (a) Computational domain without IBC. (b) Computational domain with IBC.

Fig. 14. Comparison between FDTD 2-D simulation, IBC [11] with eight poles and the proposed circuit IBC methods with four poles on the observer .

Fig. 12. Reflected electric field at point B on the separation surface calcuS/m and mm, (b) S/m and lated assuming: (a) mm, and (c) S/m and mm where the circuit in [18] is considered with ten sections.

field source located at extremity point A is the excitation of the computational domain. The plane-wave field propagation is analyzed in two different computational domains. When the IBC is not applied, the computational domain is composed by the regions and , where is the free-space region, and is the conductive region, B being the separation point between and . Applying circuit IBC, the domain is given only by the free-space region between points A and B. All the calculations are performed assuming a time step , where is the wave propagation speed in . A sketch of the FDTD computational domains is shown in Fig. 11. The waveform of the incident electric field is given by (58)

assuming V/m and ps. The discretization parameters are taken as mm and ps for the case of Fig. 12(a), while they are chosen to be mm and ps for the other cases of Fig. 12(b) and (c). The reflected electric field at point B calculated by the FDTD simulations with IBC methods and without IBC are reported in Fig. 12 for conductive regions assuming , S/m, or S/m, respectively. As seen in Fig. 12(a), the SD-CIBC method and the method proposed in [18] are less accurate than other circuit IBC methods when considering a medium with low conductivity . In all the other cases, when , there is an excellent agreement between the CIBC methods and the exact solution. A 2-D example is proposed to compare the proposed circuit IBC methods with that presented in [11] using the same electro-geometrical configuration. In a free-space square domain of side 40 cm is embedded a square lossy dielectric of side 25 cm having electrical properties , and S/m, as shown in Fig. 13. The waveform of the electric field source at point is given by (58) assuming ps. The adopted discretizations are mm and ps. The configuration of Fig. 13(a) is analyzed by the classical FDTD method to obtain the reference solution. This reference solution is then compared with those obtained by the proposed circuit IBC methods when analyzing the configuration showed in Fig. 13(b) and assuming a limited number of poles (namely, four poles) since the incident wave is band-limited in a few decades [15]. The obtained results are also compared with those obtained by the Chebyshev method proposed in [11] assuming

FELIZIANI AND CRUCIANI: FDTD MODELING OF IBCs BY EQUIVALENT LTI CIRCUITS

TABLE II LTI CIRCUIT LUMPED PARAMETERS FOR

S/m

eight poles to achieve the same accuracy, as shown in Fig. 14. The values of the electrical parameters used to approximate by four poles are reported in Table II. VI. CONCLUSION The numerical solution of the IBC for a lossy linear isotropic material region is addressed by equivalent LTI circuits. The proposed circuit approach is quite simple and can be implemented for more complex material boundaries as metamaterials or composite. It permits to obtain the time-domain solution of the IBC problem without using any convolution integral. The IBC problem has been solved by the FDTD since its implementation is straightforward, but it can be also used successfully for other numerical techniques based on field-circuit problem solutions. Three different solution methods, called the NI-CIBC, AI-CIBC, and SD-CIBC methods, have been illustrated. The NI-CIBC method accuracy strongly depends on the ratio between the time step and the minimum time constant. The AI-CIBC method precision is instead depending on the variability of the electric field. The NI-CIBC and AI-CIBC methods are conditionally stable, but for most of the practical interest cases, these two methods are still stable. The SD-CIBC method is stable and accurate in many practical cases, but its formulation is a little bit more complex than the other two CIBC methods and requires a negligible additional computational effort for matrix creation and SD. The proposed methods are more adequate than the Celuch method [18] for wideband simulations, for magnetic near-field source, or for low values of material conductivity. REFERENCES [1] M. A. Leontovich, “On the approximate boundary conditions for electromagnetic fields on the surface of well conducting bodies,” in Investigations of Radiowaves Propagation, B. A. Vedensky, Ed. Moscow, Russia: Acad. Sci. USSR, 1948, pp. 5–20. [2] K. F. Ali, M. T. Ahamed, and P. E. Burke, “Surface impedance—BEM techniques for nonlinear TM-eddy current problems,” J. Appl. Phys., vol. 61, no. 8, pp. 3925–3927, Apr. 1987. [3] T. H. Fawzi, M. T. Ahamed, and P. E. Burke, “On the use of the impedance boundary conditions in eddy current problems,” IEEE Trans. Magn., vol. MAG-21, no. 5, pp. 1834–1840, Sep. 1985. [4] S. R. H. Hoole and C. J. Carpenter, “Surface models for comers and slots,” IEEE Trans. Magn., vol. MAG-21, no. 5, pp. 1841–1843, Sep. 1985. [5] S. R. H. Hoole, K. Weeber, and N. R. G. Hoole, “The natural finite element formulation of the impedance conditions in shielding structures,” J. Appl. Phys., vol. 63, no. 8, pp. 3022–3024, Apr. 1988.

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[6] S. Celozzi and M. Feliziani, “Time domain finite element simulation of conductive regions,” IEEE Trans. Magn., vol. 29, no. 2, pp. 1705–1710, Mar. 1993. [7] M. Feliziani and F. Maradei, “Edge element analysis of complex configurations in presence of shields,” IEEE Trans. Magn., vol. 33, no. 2, pp. 1548–1551, Mar. 1997. [8] M. Feliziani, F. Maradei, and G. Tribellini, “Field analysis of penetrable conductive shields by the finite-difference time-domain method with impedance network boundary conditions (INBC’s),” IEEE Trans. Electromagn. Compat., vol. 41, no. 4, pp. 307–319, Nov. 1999. [9] J. G. Maloney and G. S. Smith, “The use of surface impedance concepts in the finite-difference time-domain method,” IEEE Trans. Antennas Propag., vol. 40, no. 1, pp. 38–48, Jan. 1992. [10] J. H. Beggs, R. J. Luebbers, K. S. Yee, and K. S. Kunz, “Finite-difference time-domain implementation of surface impedance boundary conditions,” IEEE Trans. Antennas Propag., vol. 40, no. 1, pp. 49–56, Jan. 1992. [11] K. S. Oh and J. E. Schutt-Aine, “An efficient implementation of surface impedance boundary conditions for the finite-difference time-domain method,” IEEE Trans. Antennas Propag., vol. 43, no. 7, pp. 660–666, Jul. 1995. [12] J. J. Akerson, M. A. Tassoudji, Y. E. Yang, and J. A. Kong, “Finite difference time domain (FDTD) impedance boundary condition for thin finite conducting sheets,” Progr. Electromagn. Res., vol. 31, pp. 1–30, 2001. [13] H. X. Zheng and K. W. Leung, “FDTD implementation and application of high order impedance boundary condition using rational approximation,” IEEE Trans. Antennas Propag., vol. 57, no. 8, pp. 2397–2408, Aug. 2009. [14] M. Takada and Y. Iida, “Broad band lossy conductor wall processing using lumped constant circuit and recursive formulas on FDTD method,” IEICE Trans., vol. J88-C, no. 1, pp. 28–33, 2005. [15] V. De Santis, S. Cruciani, M. Feliziani, and M. Okoniewski, “Efficient low order approximation for surface impedance boundary conditions in finite-difference time-domain method,” IEEE Trans. Magn., vol. 48, no. 2, pp. 271–274, Feb. 2012. [16] R. J. Luebbers, R. J. , F. Hunsberger, K. S. Kunz, R. B. Standler, and M. Schneider, “A frequency-dependent finite-difference time domain formulation for dispersive materials,” IEEE Trans. Electromagn. Compat., vol. 32, no. 3, pp. 222–227, Aug. 1990. [17] E. M. Deeley and X. Xu, “An improved model for a transient surface impedance boundary condition,” IEEE Trans. Magn., vol. 31, no. 3, pp. 1674–1677, May 1995. [18] M. Celuch-Marcysiak, W. K. Gwarek, and M. Sypniewski, “A simple and effective approach to FDTD modeling of structures including lossy metals,” in Proc. Asia–Pacific Microw. Conf., Yokohama, Japan, Dec. 1998, pp. 991–993. [19] B. Gustavsen and A. Semlyen, “Rational approximation of frequencydomain responses by vector fitting,” IEEE Trans. Power Del., vol. 14, no. 3, pp. 1052–1061, Jul. 1999. [20] B. Gustavsen, “Improving the pole relocating properties of vector fitting,” IEEE Trans. Power Del., vol. 21, no. 3, pp. 1587–1592, Jul. 2006. [21] D. Deschrijver, M. Mrozowski, T. Dhaene, and D. De Zutter, “Macromodeling of multiport systems using a fast implementation of the vector fitting method,” IEEE Microw. Wireless Lett., vol. 18, no. 6, pp. 383–385, Jun. 2008. [22] W. K. Gwarek, “Analysis of an arbitrarily-shaped planar circuit a timedomain approach,” IEEE Trans. Microw. Theory Techn., vol. MTT-33, no. 10, pp. 1067–1072, Oct. 1985. [23] A. Taflove and S. C. Hagness, Computational Electrodynamics: The Finite Difference Time Domain, 3rd ed. Norwood, MA: Artech House, 2005. [24] M. Feliziani and F. Maradei, “Modeling of electromagnetic fields and electrical circuits with lumped and distributed elements by the WETD method,” IEEE Trans. Magn., vol. 35, no. 3, pp. 1666–1669, May 1999. [25] M. Feliziani and F. Maradei, “FEM solution of time-harmonic electromagnetic fields by an equivalent electrical network,” IEEE Trans. Magn., vol. 36, no. 4, pp. 938–941, Jul. 2000. [26] M. Feliziani and F. Maradei, “Circuit-oriented FEM: Solution of circuit-field coupled problems by circuit equations,” IEEE Trans. Magn., vol. 38, no. 2, pp. 965–968, Mar. 2002.

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[27] H. Ke, T. H. Hubing, and F. Maradei, “Using the LU recombination method to extend the application of circuit-oriented finite element methods to arbitrarily low frequencies,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 5, pp. 1189–1195, May 2010. [28] B. Z. Wang, “Time-domain modeling of the impedance boundary condition for an oblique incident perpendicular-polarization plane wave,” Microw. Opt. Technol. Lett., vol. 7, no. 8, pp. 355–359, Jun. 1994. [29] S. Yuferev and N. Ida, “Time domain surface impedance boundary conditions of high order of approximation,” IEEE Trans. Magn., vol. 34, no. 5, pp. 2605–2608, Sep. 1998. [30] S. Yuferev and N. Ida, “Selection of surface impedance boundary condition for a given problem,,” IEEE Trans. Magn., vol. 33, no. 2, pp. 1486–1489, May 1999. [31] F. M. Tesche, “On the inclusion of loss in time-domain solutions of electromagnetic interaction problems,” IEEE Trans. Electromagn. Compat., vol. 32, no. 1, pp. 1–4, Feb. 1990. [32] D. Bau, III and L. N. Trefethen, Numerical Linear Algebra. Philadelphia, PA: SIAM, 1997. [33] K. Kunz and R. Luebbers, The Finite Difference Time Domain Method for Electromagnetics. Boca Raton, FL: CRC, 1993. [34] J. Young and R. Nelson, “A summary and systematic analysis of FDTD algorithms for linearly dispersive media,” IEEE Antennas Propag. Mag., vol. 43, no. 1, pp. 61–126, Feb. 2001.

Mauro Feliziani (M’91–SM’00) received the Laurea degree in electrical engineering from the University of Rome “La Sapienza,” Rome, Italy, in 1983. In 1987, he became a Researcher, in 1990, an Assistant Professor, and in 1992, an Associate Professor. Since 1994, he has been a Full Professor of electrical engineering with the University of L’Aquila, L’Aquila, Italy. He has authored or coauthored many papers in the fields of electromagnetic compatibility (EMC) and electromagnetic field numerical computation. Prof. Feliziani was an associate editor of the IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY (1995–2000). He was a guest editor of a Special Issue of the IEEE TRANSACTIONS ON MAGNETICS in March 2003. He was the general chairman of the 2002 EMC Europe Symposium, Sorrento, Italy and the 2005 EMC Europe Workshop, Rome, Italy. He was the chair of the International Steering Committee of EMC Europe. He has been a program committee member, an Editorial Board member, a tutorial session organizer, an invited speaker, and the session chairman for several international conferences. He was the recipient, as a coauthor, of the Best Paper of the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS—1995 Electrostatics Process Committee, and the 2000 EMC Europe Symposium.

Silvano Cruciani received the Laurea degree in information and automation engineering from the University of L’Aquila, L’Aquila, Italy, in 2010, and is currently working toward the Ph.D. degree in electrical engineering at the University of L’Aquila. His research interests include numerical methods and electromagnetic wave propagation in complex media.

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Wideband Dual-Mode Microstrip Filter Using Short-Ended Resonator With Centrally Loaded Inductive Stub Shou-Jia Sun, Student Member, IEEE, Bian Wu, Member, IEEE, Tao Su, Kun Deng, and Chang-Hong Liang, Senior Member, IEEE

Abstract—In this paper, a new class of wideband filters utilizing a novel dual-mode resonator is presented. For the first time, the resonator realized by loading an inductive short-circuited stub at the center of the short-ended resonator is proposed. The inductive stub is tuned to control the filter bandwidth by splitting two degenerate modes. For wideband application, source–load coupling, which is introduced to compensate the insufficient I/O coupling strength in a parallel-coupled microstrip line, not only improves the property within the passband, but also produces transmission zero to enhance passband selectivity. In addition, the method of extraction of the source–load coupling coefficient is proposed, and through equivalent circuit topology analysis, three types of dual-mode wideband filters, by utilizing the proposed basic resonant unit and connecting two or three short-circuited points, are designed and fabricated with good performance. Index Terms—Bandpass filter, dual-mode filters, microstrip filter, short-ended resonator, wideband.

I. INTRODUCTION

S

INCE THE Federal Communications Commission allocated 7.5 GHz of spectrum for unlicensed use of ultra-wideband (UWB) devices, the development of wideband filter technology have been promoted. The most popular way of designing wideband filters is to employ multiple-mode resonators [1]–[10]. In [1] and [2], a stepped-impedance resonator (SIR) is used to implement wide passband by controlling the fundamental and second harmonic frequency. The resonator in [2] folded the high-impedance section of the SIR so it can reduce the size of filter to the three-quarters of the filter in [1]. Meanwhile, one more transmission zero is introduced to improve the passband selectivity. However, the main drawback of this kind of filter is that these two frequencies fixed by length and impedance ratios are not independent of each other. The dual-mode resonator was originally introduced by Wolff [11]. Dual-mode resonators, which feature compact Manuscript received July 30, 2012; revised September 17, 2012; accepted September 19, 2012. Date of publication November 16, 2012; date of current version December 13, 2012. This work was supported by the National Natural Science Foundation of China (NSFC) under Project 60901031 and Project 61271017 and by the Fundamental Research Funds for the Central Universities (72005477). The authors are with the National Key Laboratory of Antennas and Microwave Technology, School of Electrical Engineering, Xidian University, Xi’an, 710071, China (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2221737

size, high performance, and low cost, have attracted more and more attention in the application of wireless communication [12]–[18]. Thus, the dual-mode resonators in [3]–[6], with stubs loaded at the symmetrical plane of a single resonator, are adopted to realize wideband response when employing large perturbation. The main advantage of dual-mode resonators is that two degenerated modes are independent of each other. In all the above wideband filters, the PCML adopted as an I/O coupling scheme not only supplies tight coupling strength, but also introduces harmonic suppression to improve the out-ofband rejection level, as shown in [1], [3], [6], and [9]. Stub loaded resonators (either open ended or short ended) have been widely employed to realize dual passband filters, dual-mode filters, and UWB filters. However, the proposed dual-mode resonator realized by loading an inductive short-circuited stub at the center of the short-ended resonator has never been presented. In this paper, the proposed dual-mode resonator is utilized to implement wideband filters. Meanwhile, the parallel-coupled microstrip line (PCML) I/O scheme including source–load coupling is employed to supply tight coupling for a wideband response to match two degenerate modes. In addition, a process of extracted source–load coupling is proposed. Due to the equivalence of the three short-circuited points, we can connect the terminals of the resonator or stub optionally so it can provide us lots of choices in practical applications, and this is not impossible in other stub-loaded resonators. By utilizing the proposed basic resonant element and connecting two or three short-circuited points, three types of filters are designed and fabricated to verify the proposed concept. II. CHARACTERISTICS OF THE PROPOSED WIDEBAND FILTER Fig. 1(a) depicts the schematic layout of the type of wideband filter, which consists of the proposed novel dual-mode resonator and a pair of I/O feeders. The dual-mode resonator is composed of a short-ended resonator and a centrally loaded inductive short-circuited stub; the resonator has a length of , while the and characteristic admittance stub, acting as a perturbation, has a length of and characteristic admittance . The PCML used as a feeding structure can supply strong coupling for wideband application when employing large perturbation. Fig. 1(b) presents the equivalent circuit topology of the filter in which the coupling in the PCML section is represented by a -inverter susceptance . The equivalent circuit model of the novel dual-mode resonator is illustrated in the dashed box. In order to maintain

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Fig. 2. Simulated values of the degenerate modes’ frequencies against the when mm and . length of

Fig. 1. (a) Schematic layout and (b) equivalent circuit topology of the proposed wideband filter.

the symmetry of the circuit, the stub is divided into two parts with the same characteristic admittance . In addition, represents source–load coupling because of the close distance between terminals of the I/O feeders. A. Dual-Mode Resonator Analysis The equivalent circuit of the dual-mode resonator in Fig. 1(b) can be analyzed using even–odd-mode method. The even-mode circuit is achieved by adding a magnetic wall along the symmetrical plane, therefore the input admittance from #1 can be deduced as (1) According to the resonant condition must be

, there (2a)

and

(2b)

The odd-mode circuit can be modeled as an electric wall added along the symmetrical plane. Its input admittance is derived as (3) According to the resonant condition must be

, there

(4a) (4b) Once the length of the short-ended resonator is fixed, according to (2a) and (4a), the odd-mode resonant frequency will remain constant, and the even-mode resonant fre-

quency varies with the different lengths of the short-circuited stub. Therefore, the length can be tuned to control the filter bandwidth, and its variation range is listed as follows:

(5) Substituting (5) into (2a) yields (6) To verify (5) and (6), the comparison of simulated results with analytical results of mode frequency with different lengths of is plotted in Fig. 2. The simulation is accomplished by the commercial simulator Zeland IE3D. Due to the error in the effective dielectric constant, the simulated results are a little different from the analytical results. However, the tendencies of the variation of mode frequencies with are the same. From the simulation, when increases from 0 to 30 mm, which is approximately equal to , the fundamental odd-mode resonant frequency at 3.49 GHz hardly changed, while the fundamental even-mode resonant frequency decreases from 3.49 to 1.76 GHz , which is approximately equal to half the fundamental odd-mode resonant frequency, which verifies (6). In addition, when exceeds 30 mm, the harmonic even-mode resonant frequency is less than the fundamental odd-mode one and destroys the dual-mode characteristic so the constraint condition in (5) is necessary. In addition, the coupling coefficient between the two degenerate modes could be calculated based on the asynchronously tuned coupled resonator theory as

(7) where and represent the two split-mode frequencies, and and represent two self-resonant frequencies of the resonator, which can be obtained by placing an electric or magnetic wall along the symmetric plane during simulation, respectively [19]. The simulated results of IE3D indicate that and

SUN et al.: WIDEBAND DUAL-MODE MICROSTRIP FILTER USING SHORT-ENDED RESONATOR

EXTRACTION OF

TABLE I WITH DIFFERENT DIMENSIONS OF

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AND

, which results in the conclusion that , i.e., no coupling exists between the two degenerate modes. From the above analysis, a wideband filter application is required to split the two modal frequencies far away from each other. Enlarging the perturbation can achieve this goal, but that is not enough to realize wideband response, the I/O coupling strength is also an important design parameter. B. I/O Coupling In this paper, the PCML is employed to implement the required I/O coupling. The precise design formulas of the modal characteristic impedances for the wide passband can be found in [20, Sec. 10.02]. Once and are known, the normalized value of the -inverter, as shown in Fig. 1(b), can be computed by (8) where is the reference port impedance and represents the coupling strength in the PCML section. The external quality factor and the admittance inverter is related by (9) For a given wideband filter design specifications, the external quality factor can be computed by (8) and (9); vice versa, the extraction of from simulation can also be implemented by them. As shown in Table I, the left-hand side describes the variations of and fractional bandwidth (FBW) with different lengths of , while return loss (RL) equal to 11 dB remains unchanged; the right-hand side depicts the variations of and RL with different , the value of the gap between the I/O feeders and resonator, keeping . With the increase of or the decrease of , the coupling degree in the PCML section gets tighter. Therefore, tuning the values of and will achieve a tight coupling for a wideband application. In addition, source–load coupling will be introduced due to the close distance between the two terminals of the I/O feeders. As depicted in Fig. 1(b), the -inverter susceptance indicates source–load coupling. On the basis of a transmission line theorem, the reflection coefficient can be deduced and analytically expressed in terms of , , , and , and the closed-form expression of from Port 1 is given as (10) , and , as shown in Fig. 1(b), is the total where electrical length of the dual-mode resonator.

Fig. 3. Configuration of Filter I ( mm, mm, mm, mm).

mm,

mm, mm,

mm, mm,

It can be concluded from (9) that each pole location where can be found at the frequency , , or . In this filter, the former two cases correspond to the even- and odd-mode frequencies, while the latter is generated by the tight coupling degree in the PCML section. In this way, the number of poles in the passband is at least two. III. DESIGN OF WIDEBAND DUAL-MODE FILTERS Based on the above discussion, wideband filters using the proposed dual-mode resonator and I/O structure can be designed. For the given wideband filter specifications, the general design procedure can be summarized as follows. • According to the given center frequency and bandwidth, determine the total length of the short-ended resonator by (4a). Tune the length of the short-circuited stub to meet the desired bandwidth. • According to the given FBW and RL, determine the external quality factor by (8) and (9). Adjust and to fulfill the computed . Some adjustments will be carried out when source–load coupling is introduced. In this section, three wideband filter examples utilizing the proposed schematic layout, as shown in Fig. 1(a), and transformed resonant structures are designed in detail. All the designed filters, simulated using the commercial simulator Zeland IE3D, are fabricated in microstrip technology, and the substrate with the relative dielectric constant of 2.65 and thickness of 1 mm is utilized. The fabricated prototypes are measured by an Agilent 8719ES network analyzer. A. Dual-Mode Wideband Filter I Using the Proposed Schematic Layout With center frequency GHz, dB, and 3-dB , configuration of Filter I utilizing the proposed schematic layout is shown in Fig. 3. Three short-circuited points are realized by ground via-holes with a diameter of 2 mm. An additional transmission-line segment (hereinafter, the coupled line) is loaded to enhance source–load coupling strength. The geometric parameters of the dual-mode resonator are chosen by locating GHz and GHz. The computed without considering source–load coupling is 1.099. However, when source–load coupling is introduced, the actual should be different. As shown in Fig. 4, when mm, the existence of source–load coupling introduces one more transmission zero besides the passband edge. By adding the coupled line, source–load coupling strength gets enhanced, and transmission zeros move close to the passband,

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Fig. 4. Simulated

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 12, DECEMBER 2012

of Filter I with and without source–load coupling.

which results in a higher passband selectivity. Moreover, source–load coupling improves the insertion loss and the RL . When mm, there is no source–load coupling, the extracted is 0.73, which is less than the former computed one, and the frequency response cannot meet the design specification. However, when source–load coupling is introduced, ideal frequency response can be obtained so source–load coupling can compensate the insufficient coupling in the PCML scheme. In addition, the poles at and shift to 3.3 and 4.28 GHz, respectively, which slightly move the center frequency to 3.75 GHz and increase the filter BW. When mm and mm, source–load coupling strength gets enhanced, and we can extract by the following method. The layout and equivalent circuit of I/O feeders are shown in Fig. 5(a) and (b), respectively. According to the transmissionline theorem, the transmission response of I/O feeders can be deduced as

Fig. 5. (a) Layout and (b) equivalent circuit of I/O feeders. (c) Simulated fre. quency response and extracted

Fig. 6. Simulated and measured -parameters of Filter I.

(11) can be obtained by the simulated transmission response so of I/O feeders. In Fig. 5(c), the simulated transmission response of I/O feeders and the extracted are shown. In this filter, the extracted at 3.75 GHz is 0.197. Submit , , and (extracted from the phase of at 3.75 GHz) into (10), at 3.75 GHz can be given as (12) dB dB, which is lower than 18.4 dB so and a new pole appears in the passband, as denoted by the black line in Fig. 4. Simulated and measured results are compared in Fig. 6 with good agreement. Due to the fabrication error, the measured 3-dB FBW is 40.3%, which is larger than the simulated 3-dB FBW (34.7%). The overall size is , where is the guide wavelength at the center frequency of the passband. A transmission zero at 5.3 GHz is introduced because of source–load coupling. Due to an inherent property of a

parallel-coupled stage [9], a harmonic suppression around the second harmonic is obtained, with the rejection level about 20 dB. Filter I is implemented utilizing the proposed schematic layout, as shown in Fig. 1(a), which occupies a large size. Due to the equivalence of the three short-circuited points in the proposed schematic layout, the following filters are designed with transformed resonant structures by connecting three or two short-circuited points together to realize compact size. B. Dual-Mode Wideband Filter II by Connecting Three Short-Circuited Points Fig. 7 shows the configuration of Filter II by connecting three short-circuited points. A short-circuited point is realized by a ground via-hole with a diameter of 1 mm. In this structure, source–load coupling can be controlled by adjusting and without the coupled line employed in Filter I. With center frequency GHz, dB and 3 dB , the design procedure is similar to that of Filter I and the dimensions of Filter II are given in Fig. 7. The simulated and measured results are drawn in Fig. 8. The

SUN et al.: WIDEBAND DUAL-MODE MICROSTRIP FILTER USING SHORT-ENDED RESONATOR

Fig. 7. Configuration of Filter II ( mm, mm, mm, mm, mm,

mm, mm, mm, mm).

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mm, mm, Fig. 9. (a) Configuration and (b) topology of Filter III ( mm, mm, mm, mm,

mm, mm).

Fig. 8. Simulated and measured -parameters of Filter II. Fig. 10. Simulated

extraction of and at from the simulation are 0.92 and 0.14, respectively, and extracted from the phase at so dB dB, and a new pole locating at is introduced as the simulated results shows. The measured 3-dB FBW is 53.5%, and the overall size is , which is smaller than the size of Filter I. One transmission zero at 3.46 GHz is introduced as a result of source–load coupling. The harmonic suppression with a rejection level about 20 dB around the second harmonic can be observed. C. Dual-Mode Wideband Filter III Cascading Two Resonators With Two Short-Circuited Points Connected The configuration of Filter III cascading two resonators with two short-circuited points connected is shown in Fig. 9(a). To begin the design, it is very important to determine the coupling property between two cascaded dual-mode resonators. For our purpose, a simulation method can be utilized to analyze it. First of all, two types of coupled structures are provided; one is cascaded dual-mode resonators with the same structure shown in Fig. 9(a), and the other is cascaded single-mode resonators by simply removing the short-circuited stubs from the structure of Fig. 9(a). The simulated results of the two structures with loose coupling are plotted in Fig. 10. For the cascaded dualmode resonators, the first and second pairs of resonant peaks, called , , and , , results from splitting the even and odd modes, respectively. The pair of resonant peaks of cascaded single-mode resonators does not match to

VARIATION OF

of two types of coupled structures.

,

TABLE II , AND WITH THE DISTANCE

and , which implies that coupling exists between the two different modes of the cascaded dual-mode resonators. Based on the previous discussion, the topology of the filter is drawn in Fig. 8(b), where red nodes (in online version) represent source or load, black nodes represent odd- or even-mode resonant units, solid lines represent direct-coupling and , while dashed lines represent cross-coupling between different modes of two resonators. These coupling coefficients can be extracted by the following methods. First, with placing an electric or magnetic wall along the symmetric plane – of resonator 1, as shown in Fig. 9(a), or can be extracted by cascading them during simulation under loose coupling, the odd- and even-modes’ self-resonant frequencies and can also be obtained. Second, with and , can be calculated by submitting , , , and into (7). At last, the variation of , , and with the distance is shown in Table II, which illustrates the direct- and cross-couplings strength decrease with

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Fig. 11. Simulated and measured -parameters of Filter III.

increasing from 0.2 to 0.4 mm. Some dimensions different from Filter II are given in Fig. 9. Comparison of the simulated and measured results is depicted in Fig. 11. The measured 3-dB FBW is 36.9%, and the overall size is . One transmission zero at 3.77 GHz is produced due to the cross-coupling between two different modes of the cascaded resonators. This filter also has harmonic suppression with rejection level about 20 dB around the second harmonic. In all the filter examples above, the locations of the transmission zeros of the measured are a little different from the simulated, which may due to the fabrication error that changing the PCML and source–load couplings, as well as the bandwidths.

IV. CONCLUSION A type of wideband filter composed of the proposed novel dual-mode resonator and PCML I/O scheme has been proposed. By extracting the external quality factor and source–load coupling, the poles in the passband can be explained clearly. A coupled line added to the terminals of I/O feeders enhances source–load coupling and improve the passband property. When cascading two dual-mode resonators, cross-coupling existed in this structure produces a transmission zero to improve the passband selectivity. Better performance may be realized by multiorder filters. Three filter examples with the maximum FBW 53.5% are designed and fabricated with good out-of-band rejection level, high selectivity, and compact size. The simulated and measured results show good agreement. With good performance and flexible design layouts, the proposed resonator can be widely used in the wideband wireless communication systems.

REFERENCES [1] Y.-C. Chiou, J.-T. Kuo, and E. Cheng, “Broadband quasi-Chebyshev bandpass filters with multimode stepped-impedance resonators (SIRs),” IEEE Trans. Microw. Theory Techn., vol. 54, no. 8, pp. 3352–3358, Aug. 2006. [2] H. Wang, Q.-X. Chu, and J.-Q. Gong, “A compact wideband microstrip filter using folded multiple-mode resonator,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 5, pp. 287–289, May 2009.

[3] H. N. Shaman, “New -band bandpass filter (BPF) with wideband passband for wireless communication systems,” IEEE Microw. Wireless Compon. Lett., vol. 22, no. 5, pp. 242–244, May 2012. [4] S. Sun and L. Zhu, “Wideband microstrip ring resonator bandpass filter under multiple resonance,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 10, pp. 2176–2182, Oct. 2007. [5] M. H. Ren, D. Chen, and C. H. Cheng, “A novel wideband bandpass filter using a cross-shaped multiple-mode resonator,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 1, pp. 13–15, Jan. 2008. [6] X. Luo, J.-G. Ma, and E.-P Li, “Wideband bandpass filter with wide stopband using loaded BCMC stub and short-stub,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 7, pp. 353–355, Jul. 2011. [7] J. Fan, D. Zhan, C. Jin, and J. Luo, “Wideband microstrip bandpass filter based on quadruple mode ring resonator,” IEEE Microw. Wireless Compon. Lett., vol. 22, no. 7, pp. 348–350, Jul. 2012. [8] S. Sun, L. Zhu, and H.-H. Tan, “A compact wideband bandpass filter using transversal resonator and asymmetrical interdigital coupled lines,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 3, pp. 173–175, Mar. 2008. [9] J.-T. Kuo, S.-P. Chen, and M. Jiang, “Parallel-coupled microstrip filters with over-coupled end stages for suppression of spurious responses,” IEEE Microw. Wireless Compon. Lett., vol. 13, no. 10, pp. 440–442, Oct. 2003. [10] L. Li and Z.-F Li, “Side-coupled shorted microstrip line for compact quasi-elliptic wideband bandpass filter design,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 6, pp. 322–324, Jun. 2010. [11] I. Wolff, “Microstrip bandpass filter using degenerate modes of a microstrip ring resonator,” Electron. Lett., vol. 8, no. 12, pp. 302–303, Jun. 1972. [12] S. Fu, B. Wu, J. Chen, S.-J. Sun, and C.-H. Liang, “Novel second-order dual-mode filters using capacitance loaded square loop resonator,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 3, pp. 477–483, Mar. 2012. [13] J. S. Hong and M. J. Lancaster, “Bandpass characteristics of new dualmode microstrip square loop resonators,” Electron. Lett., vol. 31, no. 11, pp. 891–892, May 1995. [14] J. S. Hong and H. Shaman, “Dual-mode microstrip open-loop resonators and filters,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 8, pp. 1764–1770, Aug. 2007. [15] R.-J. Mao and X.-H. Tang, “Novel dual-mode bandpass filter using hexagonal loop resonators,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 9, pp. 3526–3533, Sep. 2006. [16] P. Cheong, T.-S. Lv, W.-W. Choi, and K.-W. Tam, “A compact microstrip square-loop dual-mode balun-bandpass filter with simultaneous spurious response suppression and differential performance improvement,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 2, pp. 77–79, Feb. 2011. [17] A. Görür, “A novel dual-mode bandpass filter with wide open-loop resonator,” IEEE Microw. Wireless Compon. Lett., vol. 12, no. 10, pp. 386–388, Oct. 2002. [18] J. S. Hong and S. Li, “Theory and experiment of dual-mode microstrip triangular patch resonators and fitlers,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 4, pp. 1237–1243, Apr. 2004. [19] J. S. Hong and M. J. Lancaster, Microstrip Filters for RF/Microwave Applications. New York: Wiley, 2001, pp. 251–257. [20] G. L. Matthaei, L. Young, and E. M. T. Jones, Microstrip Filters, Impedance-Matching Network, and Coupling Structures. Norwood, MA: Artech House, 1980.

Shou-Jia Sun (S’12) was born in Anhui Province, China, in 1987. He received the B.S. degree in electric engineering from Xidian University, Xi’an, China, in 2009, and is currently working toward the Ph.D. degree in electromagnetic fields and microwave technology at Xidian University. His research interests include the design of microwave filters and planar antennas and electromagnetic bandgap (EBG) and left-handed material (LHM) and multiplexers and millimeter-wave circuits and components.

SUN et al.: WIDEBAND DUAL-MODE MICROSTRIP FILTER USING SHORT-ENDED RESONATOR

Bian Wu (S’08–M’09) was born in Xianning City, Hubei Province, China, in 1981. He received the B.Eng. degree in electronic and information engineering and Ph.D. degree in electromagnetic and microwave technology from Xidian University, Xi’an, China, in 2004 and 2008, respectively. Since 2008, he has been a Lecturer with Xidian University, where he is currently an Associate Professor with the Science and Technology on Antenna and Microwave Laboratory. His research interests include RF/microwave filters and multiplexers, planar miniaturized antennas, left-handed materials, and computational electromagnetics. Dr. Wu is a member of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) and the Chinese Institute of Electronics.

Tao Su was born in Ji’nan, Shandong, China, in 1974. He received the B.S, M.E., and Ph.D. degrees in electromagnetic field and microwave technology from Xidian University, Xi’an, Shaanxi, China, in 1997, 2000, and 2004, respectively. In 2004, he joined the School of Electronic Engineering, Xidian University, where he is currently an Associate Dean with the National Key Laboratory of Antennas and Microwave Technology. His research interests include microwave circuit and systems, RF/microwave filters and multicouplers, and electromagnetic compatibility.

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Kun Deng was born in Kaifeng, Henan Province, China, in 1986. He received the B.S. degree in electronic and information engineering from Xidian University, Xi’an, Shaanxi, China, in 2009, and is currently working toward the Ph.D. degree in electromagnetic fields and microwave technology at Xidian University. His research directions are mainly cencentrated on the aspect of RF/microwave filters and multiplexers, planar antennas, microwave circuits, and components.

Chang-Hong Liang (M’80–SM’83) was born in Shanghai, China, on December 9, 1943. He received the B.S. degree in electronic and information engineering and M.E. degree in electromagnetic and microwave technology from Xidian University, Xi’an, China, in 1965 and 1967, respectively. From 1980 to 1982, he was a Visiting Scholar with Syracuse University, Syracuse, NY. Since 1986, he has been a Professor and Ph.D. Student Advisor with Xidian University. He has wide research interests, which include computational microwave and computational electromagnetics, microwave network theory, microwave measurement method and data processing, lossy variational electromagnetics, electromagnetic inverse scattering, and electromagnetic compatibility. Prof. Liang is a Fellow of the Chinese Institute of Engineers (CIE). He was the recipient of numerous awards, including the National Middle Aged and Young Expert with Distinguished Contribution, the National Excellent Teacher, and One of the 100 National Prominent Professors.

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Coupled Line 180 Hybrids With Lange Couplers Veljko Napijalo, Member, IEEE

Abstract—This paper presents 180 coupled line hybrids with noninterspersed inputs/outputs, which utilize Lange couplers. It demonstrates that, due to the near-TEM properties of the couplers, the asymmetry in power division found in previous work can be removed. A novel hybrid topology with increased layout flexibility and reduced substrate area is proposed and theoretically analyzed. Test circuits for the novel hybrid were designed to operate at 8 GHz and fabricated using low-temperature co-fired ceramic technology. Imperfections of the fabrication process have affected the coupled conductors of Lange couplers. A suitable simple model to account for the differences from the properties assumed in the design has been found. Samples have been measured with one port terminated in a grounded resistor, and the influence of termination was de-embedded from measured results. The de-embedded results are in good agreement with simulations. Index Terms—Hybrid couplers, Lange couplers, low-temperature co-fired ceramic (LTCC), multilayer technology, rat race.

I. INTRODUCTION

H

YBRID couplers are four-port circuits used for splitting or combining microwave signals. When signals are simultaneously applied to the inputs of a 180 hybrid, the sum will be formed at one output port , while the difference will be formed at the other output port . A detailed description of a conventional 180 hybrid (rat race) can be found in [1]. Numerous improvements of the conventional hybrid have been reported mainly dealing with increasing the bandwidth [2]–[12], size reduction [13]–[21], simultaneous size reduction and suppression of the harmonic response [22]–[24], and dual band operation [25]–[30]. A new direction of improvements has been introduced recently focusing on the development of 180 hybrids with noninterspersed input/output ports. Such a property can be beneficial when laying out complex microwave circuit. The rearrangement of a layout of the conventional microstrip 180 hybrid to obtain noninterspersed ports has been described in [31], while in [32], a similar idea was implemented in a low-temperature co-fired ceramic (LTCC) technology. A microstrip coupled line 180 hybrid coupler presented in Fig. 1 was introduced in [33]. It comprises two identical directional couplers. One connection between the couplers is direct, the other one is made using a 180 phase shifting line. In a multilayer technology such as LTCC, couplers can be realized as Manuscript received April 05, 2012; revised August 11, 2012; accepted August 24, 2012. Date of publication October 09, 2012; date of current version December 13, 2012. The author is with the Faculty of Technical Sciences, University of Novi Sad, Novi Sad 21000, Serbia (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2217980

Fig. 1. Electrical schematic of a 180 coupled line hybrid.

broadside coupled lines and a hybrid with noninterspersed inputs/outputs can be obtained [34]–[36]. If non-TEM couplers are used to construct a coupled line hybrid, the only practical choice is to design an over-coupled hybrid with two frequencies of equal power division asymmetrically located with respect to the operating frequency [34]. This property arises from different velocities of the even and odd mode on non-TEM coupled lines. Single frequency of equal power division (the canonical response) or symmetrical overcoupling is possible only when couplers are TEM. Near-TEM Lange couplers [37]–[42] are used in this paper to construct hybrids with the canonical and symmetrical over-coupled response. Combining two different types of Lange couplers, hybrids with noninterspersed ports are obtained without rewiring described in [34]–[36]. A coupled line hybrid from Fig. 1 is conveniently laid out with couplers arranged perpendicularly to each other [33]–[36]. A modified hybrid schematic resulting in a more flexible hybrid circuit is introduced and analyzed here. Test samples for the new hybrid have been fabricated using an LTCC technology. Fabricated conductors constituting Lange couplers have been found to have a semi-elliptical cross section in contrast to the rectangular assumed in the design. Furthermore, the conductors were immersed into a ceramic substrate instead of resting on the top surface. A simple model for such conductors is proposed and applied to electromagnetic (EM) simulations. Measured -parameters are presented and compared with EM simulations. II. COUPLED LINE 180 HYBRID WITH LANGE COUPLERS A. Application of Lange Couplers in Coupled Line Hybrid Two properties of Lange couplers presented in Fig. 2 are important from the perspective of this paper. The first one is the near-TEM property, which is crucial for controlling power division in 180 coupled line hybrids [34]. The second property of interest can be anticipated if Fig. 2 is viewed as an integral picture. When an “unfolded” and a “folded” Lange coupler are aligned, as in the figure, and connected together in a straightforward manner (an input port of one coupler to an adjacent output port of the other), the remaining inputs are located on the top side of the figure and the outputs are located on the bottom side. Therefore, the combination of Lange couplers from Fig. 2 can be

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Fig. 4. Connection details of coupled conductors in Lange couplers.

Fig. 2. Lange couplers in microstrip technology. (a) Unfolded Lange coupler. (b) Folded Lange coupler.

Fig. 3. Coupled line 180 hybrid with Lange couplers in LTCC technology.

directly used to construct a hybrid with noninterspersed inputs and outputs following the electrical schematic given in Fig. 1. A layout of such a hybrid is shown in Fig. 3 where nonplanar connections between coupled conductors are located on an inner layer of a multilayer substrate. Therefore, wire bonding, inherent to the conventional microstrip Lange couplers, can be avoided. In other words, the hybrid circuit from Fig. 3 can be fabricated using a single multilayer process, e.g., LTCC. B. Design of Hybrid With Lange Couplers As a first step in the design of the coupled line hybrid with Lange couplers, an ideal Lange coupler has been designed using an EM simulator [43] for the operating frequency of 8 GHz. The ideal coupler circuit, where the connections between the conductors were made through EM ports, is shown in Fig. 4(a). A multilayer LTCC stack was selected comprising 12 layers of a dielectric material with a relative dielectric constant , a dielectric loss tangent , and a nominal layer thickness m. Perfect conductors with zero thickness have been assumed. The suitable coupling ratio of 7.56 dB [34] has been obtained with a conductor width m and a separation distance m. The length of the coupler was m. In the next design step, models of the realistic connections were added to the EM model of the ideal hybrid. As illustrated in Fig. 3, details of connection arrangements at the ports of two Lange couplers are different. Nonplanar connections were realized on the inner layer with m, m

[see Fig. 4(b)] using short traces with the minimum width recommended for the particular LTCC process 100 m . The diameter of vias was 100 m, and the diameter of via pads was 200 m. New models for Lange couplers have been simulated using [43]. Simulations reveal different maximum coupling value and a shift of the maximum with respect to the operating frequency compared to the values obtained for the ideal coupler. The differences can be attributed to the effects of discontinuities [44], [45] introduced when connections were added. Individual Lange couplers were then connected together according to Fig. 3 and the integrated hybrid circuit was optimized. Two manual EM optimizations have been carried out to obtain one hybrid with the canonical response and the other with over-coupling of approximately 1 dB. The goals have been achieved with m, m, and m, m, respectively. For both of the hybrids, the length of the Lange coupler was m and the approximate total length of bent phasing line was 7600 m. The width of phasing and terminal lines was m. C. Simulated

Parameters of Hybrid With Lange Couplers

Transmission -parameters corresponding to the canonical and over-coupled hybrids are shown in Fig. 5(a) and (b), respectively. According to the discussion presented in [34], where results of similar EM simulation contained large asymmetry, symmetrical responses from Fig. 5 were possible only because Lange couplers with near-ideal TEM properties have been used in this study. For the canonical hybrid, the insertion loss of 3 0.5 dB corresponds to the frequency range of approximately 6.8–9.2 GHz. For the over-coupled hybrid, the insertion loss of 3.1 0.6 dB corresponds to the frequency range of approximately 6.4–9.5 GHz. Phase imbalance of both of the hybrids, specified as 5 variation form the nominal values, is in the frequency range of 7.6–8.4 GHz. It can be deduced from Fig. 6 that differences between the canonical and over-coupled hybrid are not significant. The return loss for both of the hybrids is better than 15 dB in the frequency range of 6.7–9.5 GHz, and the isolations are better than 20 dB within the range of 6.3–9.8 GHz. III. MODIFIED COUPLED LINE 180 HYBRID In coupled line 180 hybrids presented in [33]–[36], and in previous sections of this paper, directional couplers are perpendicular to each other. For a number of application this is adequate as terminal lines can be bent to meet various layout requirements. However, more flexibility when using the hybrid in a complex circuit can be obtained if directional couplers can

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Fig. 5. Results of EM simulation for hybrids from Fig. 3. (a) Transmission -parameters of a hybrid with the canonical response. (b) Transmission -parameters of a hybrid with over-coupled response.

Fig. 6. Results of EM simulation for hybrids from Fig. 3. (a) . (b) and . and

be positioned differently, e.g., in a line. This requires the direct connection between the couplers to be replaced with a short segment of a transmission line, as shown in Fig. 7. Such a modification introduces significant changes in the hybrid circuit and requires a new theoretical analysis. The circuit shown in Fig. 7 can be analyzed analytically carrying out the analysis based on the matrix method, similar to the analysis described in [34]. In the analysis, the directional couplers are assumed to have TEM properties, i.e., . The requirement for the simultaneous port match leads to the equation for the electrical length of the coupled section at the operating frequency

Fig. 7. Electrical schematic of a modified 180 coupled line hybrid.

,

,

,

where

(3) (1) where impedances and are the respective even- and oddmode impedance of the coupled line, is the normalizing impedance 50 , and is selected to be . On the other hand, the following equation is obtained by equating expressions for and (equal power division): (2)

For a single frequency of equal power split, (2) must take a form of a linear equation (4) i.e., the quadratic term must vanish. This will be the case if (5)

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Comparing (4) and (5), it can be concluded that the frequency of equal power split coincides with the frequency of perfect match. The solution of (5) gives a relation

(6) where normalized impedances and have been introduced. Replacing this result into (1), a relation between electrical length of short transmission line and electrical length of coupled section can be obtained (7) The coupling at a frequency where electrical length coupler is 90 is

of the

(8) Using (6) and expressing the result in logarithmic units, the last equation becomes (9) When the electrical length is different from 90 , the coupling of the coupled line TEM coupler is

Fig. 8. Directional coupler parameters for a modified 180 coupled line hybrid.

(10) IV. MODIFIED HYBRID WITH LANGE COUPLERS Finally, the coupling at the operating frequency is found to be (11) Functional dependencies of directional coupler parameters are plotted in Fig. 8. The electrical to the electrical length length of coupled line section can be approximated as a linear function of . Coupling has an approximate value of 7.67 dB in a relatively wide range of (the same value as in the original hybrid from [34]). For , coupling is less than 4.0 dB and can be easily realized using a Lange coupler. For an over-coupled hybrid, (2) must be solved with . The frequencies of equal power split can be calculated from the following expression:

(12) These frequencies are located asymmetrically with respect to . It the operating frequency where the electrical length is means that, when over-coupled, the hybrid from Fig. 7 must have asymmetric power division with respect to the operating frequency.

A. Hybrid Circuit Design Using 2.5-D EM Simulator A hybrid circuit with Lange couplers arranged in a line is presented in Fig. 9. Such a hybrid has been designed for the operating frequency of 8 GHz using 2.5-D EM simulations [43]. The same dielectric layer stack as in Section II-B was used. For the initial design, the conductor thickness has been neglected, and the value for the conductivity was 2.0 10 S/m. The dimensions were chosen as in the hybrid presented in Fig. 3. Due to the complex layout of the hybrid, it was necessary to adjust iteratively a shape and the length of the added line in conjunction with other elements of the circuit. The shape has been adjusted to minimize various discontinuities along with the tuning of the line length to reduce parasitic coupling between the added line and the phasing line on one side, and between the parallel segments of the phasing line on the other. The other dimensions of the hybrid were optimized by manual iterative process using the conclusions of the theoretical analysis, which has resulted in a minimal number of EM simulations. Lengthening of has been followed by shortening of and adjusting and to increase the coupling of Lange couplers. However, the maximum value for the coupling of the Lange coupler was limited by the minimum permissible distance between the conductors on the top layer 100 m . In particular, this relates to the distance between a via pad and a neighboring conductor (if m, the minimum value for is 150 m). Therefore, the maximum value of

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Fig. 9. Modified 180 coupled line hybrid with Lange couplers aligned in a line.

Fig. 10. Partitioning of a modified 180 coupled line hybrid circuit into elem, ments suitable for comparison with theoretical analysis ( m, m, m, m, m, m, m, m, m, and m).

was limited. The length of the phasing line has been adjusted independently to give required phase ratios and isolation at the center frequency. The hybrid with optimal performance has been obtained with m, m, and m. The other dimensions are given in Fig. 10. The -parameters of the hybrid after optimization are presented in Fig. 11. Neglecting the conductor thickness in the case of Lange couplers can introduce a significant error [40]. To fine tune the hybrid circuit in the final design step, the influence of finite conductor thickness of m has been analyzed using three 3-D EM simulators [47]–[49], which has resulted in three significantly different values for the over-coupling. As over-coupling could not be estimated at this stage with sufficient confidence, it has been decided to fabricate samples as designed with a 2.5-D EM simulator. B. Comparison Between 2.5-D EM Design and Theory After the desired performance of the hybrid has been achieved, the hybrid circuit was partitioned in order to compare the values of electrical parameters of the optimized circuit with the values that follow from the theoretical analysis. The partitioning is illustrated in Fig. 10. From subsequent 2.5-D EM simulations of the parts, approximate values of , , and can be calculated from the phases of the transmission -parameters. The theoretical analysis presented in Section III uses the even and odd characteristics of a pair of coupled lines to derive the

Fig. 11. Results of EM and circuit (CKT) simulation for hybrids from Fig. 9.

important relations between hybrid parameters. These quantities cannot be defined for the four coupled conductor structure of the Lange coupler. However, average even- and odd-mode characteristics can be calculated from -parameters of a section of four coupled lines that are connected at the ports according to the use in the Lange coupler. A circuit similar to the one shown

NAPIJALO: COUPLED LINE 180 HYBRIDS WITH LANGE COUPLERS

TABLE I COMPARISON BETWEEN HYBRID PARAMETERS OBTAINED THROUGH EM SYNTHESIS AND THEORETICAL ANALYSIS

in Fig. 4(a) with m, m, and m has been EM simulated and the average even- and odd-mode impedances, and , respectively, have been calculated using the method described in [46] and used in [34]. Using the value of normalized even-mode impedance obtained by the method described in the previous paragraph, and a value of obtained from circuit partitioning, all of the other hybrid parameters can be calculated using formulas derived in Section III. The results are presented in the second row of Table I. The remaining values of hybrid parameters obtained by circuit partitioning are presented in the third row. Agreement between the two sets of values is very good. In order to examine the possibility to design the hybrid using a microwave circuit simulator, the ideal schematic from Fig. 7 has been created with the electrical parameters of the transmission lines, as shown in Table I. The response of the ideal circuit is shown in Fig. 11 and compared with 2.5-D EM simulations. The position of return-loss minima is almost exactly at the operating frequency for circuit simulation, and very close to the operating frequency for EM simulations. A similar conclusion holds for the isolation minima. The differences in the magnitudes between ideal circuit and EM analysis and the frequency shift is due to the presence of various discontinuities in the EM model. For the same reason, the frequencies of equal power division are different. Nonetheless, the agreement between the simulators can be considered as very good. Therefore, beside qualitative usefulness during EM synthesis, theoretical analysis could have quantitative significance for hybrid design. Where technology limitations are not restrictive as explained, it can be used as an alternative to the iterative process to directly derive the circuit elements from Fig. 10. C. Comparison Between Lange Coupler Hybrids and Rat Race For the sake of the comparison with a known structure, a conventional microstrip hybrid has been designed for the same dielectric substrate and operating frequency. The comparison of the hybrids is presented in Table II. The area occupied by the Lange coupler hybrid circuit presented in Fig. 4 is similar to the one of the conventional hybrid, and the bandwidths are similar as well. In such circumstances, for applications where resolving a complex circuit layout without affecting performance level is important, e.g., in mixers, frequency multipliers, or antenna array feeding networks, the Lange coupler hybrid from Fig. 3 presents a better choice than the rat race, as it has noninterspersed input/output ports. For the applications where slightly narrower bandwidths can be tolerated, the hybrid from Fig. 9 can be used instead providing a 22% smaller footprint than the

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TABLE II COMPARISON OF DIMENSIONS AND EM SIMULATED BANDWIDTHS FOR A RAT-RACE HYBRID AND LANGE COUPLER HYBRIDS

Fig. 12. Fabricated sample circuits for modified 180 coupled line hybrid with Lange couplers: type 1: grounded with vias; type 2: grounded with a radial stub.

rat race in addition to noninterspersed input/output ports. Such a tradeoff can lead to significant space saving when integrating complex circuits comprising several hybrids, e.g., I/Q mixers and six-port receivers. Additional space saving will be possible if the phasing line is meandered. EM simulations results indicate that more than 40% size reduction compared to the ratrace is possible without any worsening of the performance from Fig. 11. Comparing with the coupled-line hybrid presented in [34], the hybrids presented in this paper have wider bandwidth and simpler construction (a multilayer crossing between the directional couplers is required there to obtain noninterspersed ports). D. Hybrid Sample Circuits Test circuits of the hybrid from Fig. 9 have been devised for the measurements using coplanar waveguide probes. Similarly to the case described in [34], the measurement facilities available had only three probe arms so only three ports were accessible for measurements, while the fourth port was terminated by soldering a shunt surface mount device (SMD) 50- resistor. The number of -parameters that can be measured when a port is terminated with a resistor is restricted. In order to circumvent the restriction, two identical sample circuits were fabricated—type 1 a where port 1 is terminated into resistor grounded using vias, and type 1 b where port 2 is terminated in the same way. This arrangement, shown in Fig. 12, enabled

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Fig. 14. Measured and EM [47] simulated and 2 b in accordance with Fig. 12.

and

. Notation 1 a, 1 b, 2 a,

V. MEASURED RESULTS AND DISCUSSION

Fig. 13. Measured and EM simulated [47] transmission tion 1 a, 1 b, 2 a, and 2 b in accordance with Fig. 12.

-parameters. Nota-

measurements of all -parameters of a hybrid, except isolation between ports 1 and 2. On test circuits 2 a and 2 b, the resistor grounding has been realized using a radial stub merged with resistor pad. A number of additional test circuits have been fabricated, measured, and the results adequately processed to calculate the reflection coefficients of grounded resistors. Reference [34, eqs. (16) and (17)] have been used to de-embed measured results where the influence of the terminations cannot be neglected, in accordance with the discussion presented there.

The measured magnitudes of transmission -parameters are presented in Fig. 13. The measured value of over-coupling, taken as the maximum difference between and inside the overlapping range, was approximately 2.4 dB for samples 1 a and 1 b, and 2.7 dB for 2 a and 2 b. As predicted by (12), power division of the hybrid with such a large amount of over-coupling is asymmetrical with respect to operating frequency. The difference of 0.3 dB comes from fabrication tolerances, measurement errors, and neglecting the influence of nonideal terminations. It is actually a result of much smaller shifts of individual and traces in opposite directions. Measured phases of the transmission -parameters are shown in Fig. 13(c). At the operating frequency, they are 177.8 and 0.3 . Measured and are presented in Fig. 14, while de-embedded values of and are presented in Fig. 15. De-embedded values of are presented in Fig. 16. Except for the over-coupling, the characteristics of the hybrid are as predicted in Section IV. Phase imbalance, return loss, and isolation bandwidths, according to the definitions from Table II, are 12%, 26%, and 37%, respectively, very similar to the values obtained using 2.5-D EM simulations. A high value of over-coupling is a consequence of two major factors. The first one is linked to inconclusive results of 3-D EM analysis, which prevented any fine tuning of hybrid transmission -parameters prior to the fabrication. The second one is related to the occurrence of critical differences in the fabrication process, which leads to a significant increase in a value of a coupling coefficient in Lange couplers. In addition to dimensional inaccuracy ( m, m, and m has been measured on the samples), the conductors on the top surface were completely immersed into ceramics. A cross section of immersed conductors has been found to be semi-elliptical, as shown in Fig. 17(c). A suitable EM model for the semi-elliptical cross section has been found in a form of a rectangular one. To determine adequate values of and for the model, several 2-D quasi-static

NAPIJALO: COUPLED LINE 180 HYBRIDS WITH LANGE COUPLERS

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TABLE III COMPARISON OF 2-D EM SIMULATIONS OF A PAIR OF COUPLED CONDUCTORS WITH DIFFERENT CROSS SECTION

choice for a 3-D EM simulator and a modeling method to fine tune over-coupling in the future designs. Fig. 15. De-embedded and EM simulated [47] 2 a, and 2 b in accordance with Fig. 12.

and

. Notation 1 a, 1 b,

Fig. 16. De-embedded and EM simulated [47] 2 b in accordance with Fig. 12.

. Notation 1 a, 1 b, 2 a, and

Fig. 17. Cross sections of coupled conductors in Lange couplers. (a) Zero thickness. (b) As in EM simulations prior to fabrication. (c) As measured on fabricated samples. (d) Equivalent of (c) for EM modeling.

VI. CONCLUSION Two 180 coupled line hybrids have been presented and designed to operate at 8 GHz. The first structure has been constructed using Lange couplers along with a schematic known from previous work. Due to near-ideal TEM properties of the couplers, asymmetry in the hybrid response has been removed. The second hybrid structure has been obtained by modifying the original schematic to increase layout flexibility. In the modified topology, Lange couplers were arranged in a line and a hybrid footprint was reduced by 22% compared to the conventional rat-race coupler with further possibilities for size reduction explained. The theoretical analysis of a modified structure presented can be applied more generally, e.g., to design a hybrid with parallel TEM couplers. Both hybrids presented have noninterspersed input/output ports and do not require subsequent wire bonding as multilayer LTCC technology has been used for fabrication, allowing nonplanar connections between the conductors to be realized on an inner layer. The multilayer crossing between the couplers required in previous work has been removed, resulting in a simpler layout. Modeling of coupled conductors having a semi-elliptical cross section with conductors having a rectangular cross section has been applied to increase the efficiency of EM simulations. Measured results are in good agreement with EM simulation. REFERENCES

EM simulations have been carried out using LINPAR [50]. Coupling coefficients were calculated from even- and odd-mode impedances using (8). The results are presented in Table III. For the case where the dimensions, cross section, and dielectrics were modeled as on fabricated samples, i.e., as in Fig. 17(c), the coupling was approximately 1.6 dB larger than for the infinitely thin conductors from Fig. 17(a). Approximately the same value was obtained when the conductors had rectangular cross section and nominal dimensions and were immersed into ceramic material, as illustrated in Fig. 17(d). The difference in effective dielectric constants between the four cases presented in Table III has been found negligible. Results of the EM simulations using updated models are presented in Figs. 13–16 and are in good agreement with measured results, especially in regard to over-coupling. This suggests a

[1] D. Pozar, Microwave Engineering, 3rd ed. Hoboken, NJ: Wiley, 2005, pp. 352–357. [2] S. March, “A wideband stripline hybrid ring,” IEEE Trans. Microw. Theory Techn., vol. MTT-16, no. 6, p. 361, Jun. 1968. [3] S. Rehnmark, “Wide-band balanced line microwave hybrids,” IEEE Trans. Microw. Theory Techn., vol. MTT-25, no. 10, pp. 825–830, Oct. 1977. [4] C.-H. Ho, L. Fan, and K. Chang, “New uniplanar coplanar waveguide hybrid-ring couplers and magic-T’s,” IEEE Trans. Microw. Theory Techn., vol. 42, no. 12, pp. 2440–2448, Dec. 1994. [5] B. R. Heimer, L. Fan, and K. Chang, “Uniplanar hybrid couplers using asymmetrical coplanar striplines,” IEEE Trans. Microw. Theory Techn., vol. 45, no. 12, pp. 2234–2240, Dec. 1997. [6] T. Wang and K. Wu, “Size-reduction and band-broadening design technique of uniplanar hybrid ring coupler using phase inverter for M(H)MIC’s,” IEEE Trans. Microw. Theory Techn., vol. 47, no. 2, pp. 198–206, Feb. 1999. [7] C.-Y. Chang and C.-C. Yang, “A novel broadband Chebyshev-response rat-race ring coupler,” IEEE Trans. Microw. Theory Techn., vol. 47, no. 4, pp. 435–462, Apr. 1999.

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[8] C.-W. Kao and C. H. Chen, “Novel uniplanar 180 hybrid-ring couplers with spiral-type phase inverters,” IEEE Microw. Guided Wave Lett., vol. 10, no. 10, pp. 412–414, Oct. 2000. [9] I. Ohta, T. Kawai, and Y. Kokubo, “A very-small-sized reversed-phase hybrid ring,” in IEEE MTT-S Int. Microw. Symp. Dig., 2000, pp. 1145–1148. [10] K. S. Ang, Y. C. Leong, and C. H. Lee, “Impedance-transforming, coupled-line 180 hybrid rings with frequency independent characteristics,” in IEEE MTT-S Int. Microw. Symp. Dig., 2003, pp. 1239–1242. [11] T. T. Mo, Q. Xue, and C. H. Chan, “A broadband compact microstrip rat-race hybrid using a novel CPW inverter,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 1, pp. 161–167, Jan. 2007. [12] T.-G. Kim and B. Lee, “Metamaterial-based wideband rat-race hybrid coupler using slow wave lines,” IET Microw. Antennas Propag., vol. 4, no. 6, pp. 717–721, Jun. 2009. [13] C.-H. Chi and C.-Y. Chang, “A compact wideband 180 hybrid ring coupler using a novel interdigital CPS inverter,” in Eur. Microw. Conf., Munich, Germany, 2007, Art. ID EuMC30-1. [14] M.-L. Chuang, “Miniaturized ring coupler of arbitrary reduced size,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 1, pp. 16–18, Jan. 2005. [15] K. W. Eccleston and S. H. M. Ong, “Compact planar microstripline branch-line and rat-race couplers,” IEEE Trans. Microw. Theory Techn., vol. 51, no. 10, pp. 2119–2125, Oct. 2003. [16] R. K. Settaluri, G. Sundberg, A. Weisshaar, and V. K. Tripathi, “Compact folded line rat-race hybrid couplers,” IEEE Microw. Guided Wave Lett., vol. 10, no. 2, pp. 61–63, Feb. 2000. [17] M. H. Awida, A. M. E. Safwat, and H. El-Hennawy, “Compact ratrace hybrid coupler using meander space-filling curves,” Microw. Opt. Technol. Lett., vol. 48, no. 3, pp. 606–609, Mar. 2006. [18] H. Ghali and T. A. Moselhy, “Miniaturized fractal rat-race, branch-line and coupled-line hybrids,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 11, pp. 2513–2520, Nov. 2004. [19] K. M. Shum, Q. Xue, and C. H. Chan, “A novel microstrip ring hybrid incorporating a PBG cell,” IEEE Microw. Wireless Compon. Lett., vol. 11, no. 6, pp. 258–260, Jun. 2001. [20] H. Okabe, C. Caloz, and T. Itoh, “A compact enhanced-bandwidth hybrid ring using an artificial lumped-element left-handed transmission-line section,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 3, pp. 798–804, Mar. 2004. [21] C. -K. Lin and S. -J. Chung, “A compact filtering 180 hybrid,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 12, pp. 3030–3036, Dec. 2011. [22] Y. J. Sung, C. S. Ahn, and Y.-S. Kim, “Size reduction and harmonic suppresion of rat-race hybrid coupler using defected ground structure,” IEEE Microw. Wireless Compon. Lett., vol. 14, no. 1, pp. 7–9, Jan. 2004. [23] J. Gu and X. Sun, “Miniaturization and harmonic suppression rat-race coupler using C-SCMRC resonators with distributive equivalent circuit,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 12, pp. 880–882, Dec. 2005. [24] J.-T. Kuo, J.-S. Wu, and Y.-C. Chiou, “Miniaturizad rat race coupler with suppression of spurious passband,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 1, pp. 46–48, Jan. 2007. [25] K. -K. M. Cheng and F.-L. Wong, “A novel rat race coupler design for dual-band applications,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 8, pp. 521–523, Aug. 2005. [26] C. P. Kong and K.-K. M. Cheng, “Dual-band rat-race coupler with bandwidth enhancement,” in IEEE MTT-S Int. Microw. Symp. Dig., 2006, pp. 1559–1562. [27] S. Dwary and S. Sanyal, “An arbitrary dual-band microstrip hybrid ring,” Microw. Opt. Technol. Lett., vol. 48, no. 5, pp. 840–842, May 2006. [28] C.-L. Hsu, C.-W. Chang, and J.-T. Kuo, “Design of dual-band microstrip rat-race coupler with circuit miniaturization,” in IEEE MTT-S Int. Microw. Symp. Dig., 2007, pp. 177–180. [29] H. Zhang and K. J. Chen, “Design of dual-band rat-race couplers,” IET Microw. Antennas Propag., vol. 3, no. 3, pp. 514–521, Apr. 2009. [30] G.-Q. Liu, L.-S. Wu, and W.-Y. Yin, “Miniaturised dual-band rat-race coupler based on double-sided parallel stripline,” Electron. Lett., vol. 47, no. 14, pp. 800–802, Jul. 2011. [31] K. S. Ang, Y. C. Leong, and C. H. Lee, “A new class of multisection 180 hybrids based on cascadable hybrid-ring couplers,” IEEE Trans. Microw. Theory Techn., vol. 50, no. 9, pp. 2147–2152, Sep. 2002.

[32] T.-M. Shen, T.-Y. Huang, and R.-B. Wu, “Multilayer 180 hybrid in LTCC,” in Asia–Pacific Microw. Conf., Hong Kong, 2008, Art. ID B1-05. [33] M. J. Park and L. Byungje, “Coupled line 180 hybrid coupler,” Microw. Opt. Technol. Lett., vol. 45, no. 2, pp. 173–176, Apr. 2005. [34] V. Napijalo and B. Kearns, “Multilayer 180 hybrid coupler,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 11, pp. 2525–2535, Nov. 2008. [35] V. Napijalo, “Multilayer 180 hybrid coupler in LTCC technology for 24 GHZ applications,” in Eur. Microw. Conf., Munich, Germany, 2007, Art. ID EuMC30-2. [36] V. Napijalo, “180 degrees hybrid coupler,” U.S. Patent 7 319 370 B2, Jan. 15, 2008. [37] J. Lange, “Interdigitated stripline quadrature hybrid,” IEEE Trans. Microw. Theory Techn., vol. MTT-17, no. 12, pp. 1150–1151, Dec. 1969. [38] R. Waugh and D. LaCombe, “Unfolding the Lange coupler,” IEEE Trans. Microw. Theory Tech., vol. MTT-20, no. 11, pp. 777–779, Nov. 1972. [39] D. Kajfez, Z. Paunovic, and S. Pavlin, “Simplified design of Lange coupler,” IEEE Trans. Microw. Theory Techn., vol. MTT-26, no. 10, pp. 806–808, Oct. 1978. [40] A. Presser, “Interdigitated microstrip coupler design,” IEEE Trans. Microw. Theory Techn., vol. MTT-26, no. 10, pp. 801–805, Oct. 1978. [41] R. M. Osmani, “Synthesis of Lange couplers,” IEEE Trans. Microw. Theory Techn., vol. MTT-29, no. 2, pp. 168–170, Feb. 1981. [42] L. Han, K. Wu, and X. -P. Chen, “Accurate synthesis of four-line interdigitated coupler,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 10, pp. 2444–2455, Oct. 2009. [43] Sonnet. ver. 10.52, Sonnet Softw., North Syracuse, NY, 2005. [44] S. Gruszczynski, K. Wincza, and K. Sachse, “Design of high performance three-strip 3-dB directional coupler in multilayer technology with compensated parasitic reactances,” Microw. Opt. Technol. Lett., vol. 49, no. 7, pp. 1656–1659, Jul. 2007. [45] S. Gruszczynski, K. Wincza, and K. Sachse, “Design of compensated coupled-stripline 3-dB directional couplers, phase shifters, and magic-T’s—Part I: Single-section coupled-line circuits,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 11, pp. 3986–3994, Nov. 2006. [46] J.-S. C. Hong and M. J. Lancaster, Microstrip Filters for RF/Microwave Applications. New York: Wiley, 2001, pp. 133–140. [47] WIPL-D Pro. ver. 7.1, WIPL-D, Belgrade, Serbia, 2009. [48] CST Microwave Studio 2008. Comput. Simulation Technol. GmbH, Darmstadt, Germany, 2008. [49] High Frequency Structure Simulation (HFSS). ver. 11.0, Ansoft Corporation, Pittsburgh, PA, 2008. [50] LINPAR for Windows, ver. 2.0. Norwood, MA: Artech House, 1999.

Veljko Napijalo (M’88) was born in Belgrade, Serbia, in 1962. He received the Dipl. Ing., M.Sc., and Ph.D. degrees in electrical engineering from the University of Belgrade, Belgrade, Serbia, in 1987, 1994 and 2010, respectively. In 1987, he joined the Institute of Microwave Technology and Electronics, IMTEL, Belgrade, Serbia, where he was involved with the design of active and passive microwave circuits and development of the automated measurement methods for microwave circuits and systems. During this time, his research interest was in the field of numerical electromagnetics applied to microwave planar circuit design. From 2001 to 2009, he was with TDK Electronics Ireland, Dublin, Ireland, where he was involved in modeling of embedded LTCC passive circuits, research and development of active and passive LTCC components for 24-GHz applications, and advanced electronic packaging methods. He is currently with the Faculty of Technical Sciences, University of Novi Sad, Novi Sad, Serbia, where he is involved in research on microwave circuits in ceramic, polymer, and flexible technologies. He authored or coauthored over 30 papers published in journals or presented at conferences. He holds two U.S. patents. Dr. Napijalo has been a member of the European Microwave Association (EuMA) since 2004.

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A Physics-Based Causal Bond-Wire Model for RF Applications Alexé L. Nazarian, Luuk F. Tiemeijer, David L. John, Jan Anne van Steenwijk, Michel de Langen, and Ralf M. T. Pijper

Abstract—A predictive causal physics-based compact model that describes the electrical behavior of multiple bond wires as a function of signal frequency and geometry of the wires is presented. It takes into account the inductive coupling between the wires, the frequency-dependent losses, and the capacitance between the wires and the ground plane. The model does not require any fitting parameters and places no restriction on the shape of the bond wires. Model predictions of resistance, of capacitance to the ground plane, and of self and mutual inductances of bond wires with different shapes were compared to the corresponding measured quantities. All inductive calculations use closed formulas that give a better approximations than the state-of-the-art. Furthermore, the causal nature of this model implies that it may be used for time-domain simulations. Index Terms—Bond wire, capacitance, compact model, inductance, mutual inductance, resistance, self inductance.

I. INTRODUCTION

B

OND WIRES are one of the mandatory parts of discrete RF power devices. They connect different components within a package, i.e., transistor, capacitors, etc., and are an integral part of the input and output matching circuitry. As a result, accurate modeling of their properties via a predictive and compact model is essential in achieving an optimum product design. Existing bond-wire models include either simple electrical circuits with parameters extracted from measurements [1] or transmission-line models with parameters extracted from electromagnetic (EM) simulations or measurements [2]–[6]. While these models have been shown to have sufficient accuracy, their reliance on measurements or on time-consuming EM simulations limits their practical utility. For this reason, physics-based models are also worth developing. Such models have been presented previously [7]–[9]; however, these attempts lack causality, and therefore cannot be used in transient

Manuscript received June 06, 2012; revised August 16, 2012; accepted August 27, 2012. Date of publication October 03, 2012; date of current version December 13, 2012. A. L. Nazarian, L. F. Tiemeijer, and R. M. T. Pijper are with the Research Department, NXP Semiconductors, Eindhoven 5614 GP, The Netherlands (e-mail: [email protected]; [email protected]; [email protected]). D. L. John is with Philips Research, Eindhoven 5656 AE, The Netherlands (e-mail: [email protected]). J. A. van Steenwijk is with Central Research and Development, Modeling and Characterization, NXP Semiconductors, Nijmegen 5656 AE, The Netherlands (e-mail: [email protected]). M. de Langen is with the PL RF Power and Base Stations Department, NXP Semiconductors, Nijmegen 5656 AE, The Netherlands (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2217983

simulations [10]. In brief, causality means that the cause precedes the effect, and this is a requirement for proper simulation in the time domain. Mathematically, causality is achieved when the impedance is an analytic function of the frequency (satisfying the Kramers–Kronig relations). In addition to the lack of causality in these previous models, they also completely neglect capacitive coupling to the ground plane, and use extremely rough inductance approximations. Since the model described in [8] is incorporated in the widely used simulation package ADS [11], we take this as an example of the current state-of-the-art, and benchmark the results of both our model and the ADS built-in model against measurement data. This paper presents a predictive physics-based causal model of multiple bond wires arbitrarily placed in space. The model predicts the inductive coupling between the wires, the frequency-dependent losses in the wires, and the capacitance between the wires and ground plane as functions of the signal frequency and the geometry of the wires. Due to the physical nature of the model, it does not require any fitting parameters, which is a clear advantage over the models in [1]–[4]. Causality of the impedance calculations, very accurate inductance calculations, and estimations of the capacitance to the ground plane add value to the model when compared to [7] and [8]. In the first part of this paper, we discuss physical and mathematical aspects of the model. The second part is dedicated to the experimental verification of the model and discussion of it. II. COMPACT BOND-WIRE MODEL A. Input Parameters and Output Values The bond-wire model requires the following input parame, wire radius (the model assumes that ters: frequency each wire has a round cross section), the shape of each wire, wire conductivity , and relative permittivity of the environment between the wires and the ground plane. All of the input parameters of the model are scalars (real numbers) with the exception of the shapes of the wires, which are defined by means of the straight segment approximation, as depicted in Fig. 1. The number of segments can be arbitrary and is not limited by the model. The output of the model is a symmetrical -parameter matrix of dimension where is the number of modeled wires. B. Equivalent Circuit Each bond wire can be modeled by an equivalent circuit (see Fig. 2). The circuit consists of the impedance element that is equal to the impedance of the wire, the capacitances to ground and , and the capacitance between the beginning and

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is the zeroth-order Bessel function of the first kind, and is a constant of proportionality. By integrating the current distribution over the cross section, one gets the total current

(2) By taking the potential difference, per unit length, on the surface of the wire and dividing by the current, we obtain the internal impedance (3) Fig. 1. Example of the approximation of the smooth bond-wire shape with connected straight segments. The number of segments is not limited by the model.

In order to obtain the total impedance, the external inductance must be added yielding (4) and are the dc resistance and low-frequency inwhere ductance of the wire, respectively. These parameters must be calculated separately depending on the shape of a bond wire. The important difference between (4) and the ADS model is that(4) satisfies the physical requirement of causality. Indeed, the impedance in (4) is a superposition of analytic functions, and hence, it too is an analytic function and may be used for correct time-domain analysis.

Fig. 2. Equivalent circuit that corresponds to a bond wire. is the impedance and are capacitances to the ground. of the bond wire,

end of the wire. The capacitance is typically two orders of magnitude smaller than capacitances and and is needed to get a consistent first-order description of transmission-line behavior of each bond wire. In the case when multiple bond wires are analyzed, the same number of circuits (with different parameter values) will be used. All of these circuits are then connected by means of a mutual inductance between the wires. The goal of the model is to calculate the parameters of the equivalent circuits and of the mutual inductances between the wires.

C. Impedance of a Wire The model is based on the assumption that the current distribution in a bond wire is proportional to the current distribution in an infinitely long straight round wire, as has been extensively studied in [12]. Such a current distribution is given by (1) in cylindrical coordinates, where the -axis is the axis of rotational symmetry for the wire, , and are the permeability and conductivity of the wire material, respectively,

D. DC Resistance The calculation of the dc resistance is straightforward, (5) where wire,

is the length of the wire, is the cross section of the is the area of this cross section, and is its radius.

E. Low-Frequency Inductance Since an isolated bond wire is not an electrically closed circuit, when speaking of inductance, we actually refer to the partial inductance of the wire, and we will continue to use these terms interchangeably. Of course, it will remain our responsibility to take into account all of the parts of the closed circuit and their self and mutual (partial) inductances. As we mentioned previously, the model assumes that each bond wire is made from a series of connected straight segments: that is why the self inductance of a wire may be calculated as (6) is the th where is the number of segments in the wire, segment, is the self inductance of the segment , and is the mutual inductance of the two segments.

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Fig. 3. Straight segment with radius , cross section , and length . Each current filament is fully determined by the intersection point of the filament and the cross section. The intersection between the filament and is denoted by and can be described by its coordinates.

The formula for the mutual inductance between two wires and may also be written in terms of the mutual inductances of different segments

(7) In order to make use of (6) and (7), the task now is to calculate the self and mutual inductances of straight segments. F. Self Inductance of a Straight Segment One of the definitions of the low-frequency self inductance of a straight segment is given by

(8) where is a cross section and is the length, of the segment (see Fig. 3). The points of integration have Cartesian coordinates and , respectively. Therefore, the surface elements and are equal to and , respectively. Equation (8) can be rewritten (9) where

(10) is the mutual inductance between one filament of the segment and the segment itself. Due to rotational symmetry, the function is even with respect to its first argument, i.e.,

Fig. 4. Relative error of the approximation of self inductance of a straight segment as a function of its length (the radius of the cross section is kept constant 25 m). The approximation is done by: 1) the bond-wire model; 2) the bond-wire model from ADS [8], [11]; and 3) the geometric mean distance approach [13].

. Although the function is technically a function of four scalar variables—two coordinates of point , , and —in reality, it depends only on three numbers: the norm of point , , and . In order to find a suitable approximation to , we seek a function of the form , where . Coefficients and are found by requiring that this approximation is exact at and . Substituting this into (9), we get an excellent approximation of the self inductance of a straight segment as the arithmetic mean of the inductance of the center filament of the segment and the inductance of any filament on the surface of the segment (11) is the center of the cross section of the segment, and is any point on the boundary of the cross section. For a detailed explanation of how to calculate and , we refer to Appendix A. In Fig. 4, we benchmark our approximation, and the geometric mean distance approach used in [13], against numerical evaluation of (8). In order to also benchmark the ADS model, we note that it is only capable of calculating the high-frequency limit of the inductance, defined as

where

(12) is a border of the cross section , and where is its length. For this reason, the ADS model is benchmarked against a numerical evaluation of (12).

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Fig. 5. Two straight segments that follow one another as a part of a bond wire.

G. Mutual Inductance Between Straight Segments For a uniform current distribution, the mutual inductance between straight segments and can be calculated by taking the following integral: (13) where and are cross sections of the straight segments, and and are current filaments. This expression can be very well approximated by the mutual inductance between the central filaments of each segment if the distance between the segments is much larger then the radius of the segments. This approximation gets less accurate if two segments are located close to each other, such as when segments are concatenated (see Fig. 5). A better way to estimate the mutual inductance between straight segments and is (14) and is based on the following observation: the mutual inductance between filaments of different segments is given by for some scaler . Here, is the mutual inductance between central filaments of the segments, and and are points of the cross section that correspond to filaments and , respectively. Since each straight segment has the same radius , we can talk about the same cross section for all straight segments. is an average of for all pairs of filaments and . The detailed explanation of how to obtain (14) is given in Appendix B. Regardless of the distance between straight segments, (14) always gives a better approximation of the mutual inductance between them than the straightforward way of calculating mutual inductance between central elements used by the ADS model. Fig. 6 gives a very good illustration of this statement. H. Capacitance In order to be able to accurately predict the -parameter matrix corresponding to the set of bond wires, the bond-wire model should also be able to calculate the capacitance between the bond wires and the ground plane. The model carries out these calculations making the following two simplifications: • capacitance between each bond wire and the ground plane is calculated separately and independently of the other bond wires; • capacitance between each segment of a wire and the ground plane is also calculated separately.

Fig. 6. Mutual inductance between two segments as a function of the angle between them (see Fig. 5). The mutual inductance was evaluated numerically using (13), and approximated using both the bond-wire model from ADS and the more accurate (14).

Fig. 7. Cross section of the ground plane and the parallel wire of radius

.

If the segment is parallel to the ground plane, the capacitance is well known (for example, it could be easily deduced from the results of [12]) and is given by (15) where is the length of the segment, is the permittivity, is the radius of the cross section of the segment, and is the distance between the center of the segment and the ground plane (see Fig. 7). The edges of the segment are excluded from the calculation, but this is exactly what we need since, in reality, each segment is not floating in space; rather, they are connected to other segments. Since the radius of the cross section of a bond wire does not change, we can consider the capacitance in (15) as a function of two variables and . In the case of an infinite ground plane and a nonparallel straight segment, the capacitance can be calculated in the form of the integral (16) where is the capacitance between an infinitely small (length ) part of the segment with radial coordinate and the ground plane. The capacitance could be calculated by substituting , the effective distance (see Fig. 8), into (15). Since there are two ways to calculate the effective distance, the

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Fig. 8. There are two ways to calculate an effective distance between an infinitely small part of the straight segment and the ground plane. This leads to the splitting of the capacitance between the infinitely small part of the straight segment and the ground plane into two components.

capacitance expression:

splits into two parts. This leads to the following

(17)

Following the same logic as in [14], we can make the transition from the capacitances of individual segments of a bond wire to the capacitances , , and from Fig. 2,

Fig. 9. Metallization patterns (viewed from the top) used for the test structures. Holes on the left and right sides of each structure are vias that connect the top metal layer of the PCB with the bottom metal layer. Letters “S” and “G” show where the signal and ground tips of the measurement probes were touching the test structure during the measurements.

(18) where is the number of segments that approximate the shape of the bond wire, is the low-frequency self inductance of the wire, and and are the self inductance and capacitance to ground of the th segment, respectively. III. EXPERIMENTAL VERIFICATION AND DISCUSSION For the experimental verification of the model, different test structures were fabricated. These structures vary with respect to the ground-plane geometry and shapes of the bond wires. Different ground-plane geometries were implemented by means of different metallizations of the top layer of the printed circuit boards (PCBs) (see Fig. 9). In order to minimize the impact of ground return current, we decided to verify this model on differentially driven pairs of bond wires, and that is why all metallization patterns require two bond wires (as shown in Fig. 9). In addition, this allows an easy implementation of the “short” de-embedding structure. The variety of bond-wire shapes are displayed in Fig. 10. Each test structure is determined by the combinations of the ground-plane metallization and the shapes of bond wires attached to it. The overview of all

Fig. 10. Shapes of the measured bond wires.

measured and analyzed test structures can be found in Table I, where we note that structures “F” and “M” have extremely low profiles. In practice, such a small distance between the bond wire and ground plane is not used so these structures are only present in order to help probe the limits of the model. For each test structure, a de-embedding procedure was applied in order to compare the predicted real and imaginary parts

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TABLE I TEST STRUCTURES OVERVIEW

of the impedance to the corresponding measured quantities. These quantities can be deduced from the differential and common mode impedance of the wires, calculated as

Fig. 11. Change of the imaginary part of the impedance is caused by the skin effect for low frequencies and is influenced by the capacitance to the ground plane in the proximity of the resonance frequency. The bond-wire model of ADS [8], [11] predicts a constant number as the imaginary part of the impedance. Shown is one indicative structure representing the average case.

(19) where is the 2 2 -parameter matrix of the test structure after de-embedding. Two de-embedding procedures were performed: open-short and short-open [15]. Both methods assume that all capacitive connections of the signal lines to the ground plane are concentrated in one point—either in the beginning or in the end of the signal lines. This simplification of reality gives satisfactory results up to some frequency that can be determined by comparing results of both de-embedding strategies with each other. In the case of the measured test structures, the de-embedding results of both strategies agree up to 4 GHz; therefore, the validation of our model against measured results will focus on the frequency range up to 4 GHz. As was promised in Section I, we compare the bond-wire model presented here to the corresponding model (BONDWn) incorporated in the ADS simulation package (see [11] for documentation). This model is an implementation of the bond wire model of Mouthaan [8]. BONDWn is incapable of predicting the capacitance between the bond wire and ground plane, predicts the impedance with a constant (frequency independent) imaginary part (see Fig. 11), and uses an interpolated real part of the impedance that is not differentiable everywhere. The impedance calculated in such a way does not satisfy the Kramers–Kronig relations, and this means that BONDWn is noncausal and can, therefore, not be used in transient simulations. Before starting our detailed analysis of the measured and predicted imaginary parts of the impedance, it makes sense to divide the frequency range into three parts: the low-frequency range where the skin effect plays a negligible role in determining the inductance (for the measured wires, this corresponds to frequencies smaller than 20–30 MHz); the frequency range where the skin effect plays a substantial role in determining the inductance, but the influence of the parasitic capacitance is small (30 MHz–2 GHz); and the frequency range where the skin effect approaches its saturation level with respect to its influence

Fig. 12. Relative prediction accuracy of the low-frequency inductance (de) for different measured test structures. Each point corresponds noted by to a structure from Table I.

on the inductance, and the parasitic capacitance starts to be more pronounced (frequencies greater than 2 GHz). The measurement of low-frequency inductance becomes accurate only for high enough frequency since the imaginary part of the impedance is proportional to the frequency (see Fig. 11). Fortunately, the reliably measured values of inductance forms a plateau for low frequencies (20–40 MHz). This allows us to compare modeled and measured low-frequency inductance, as shown in Fig. 12. We see that the agreement between measured and predicted values of the low-frequency inductance for the different test structures is excellent (the prediction is within a couple of percent). The only exception here is test structure “F” with the extremely low profile of the bond wires, yielding a small average distance between the bond

NAZARIAN et al.: PHYSICS-BASED CAUSAL BOND-WIRE MODEL

Fig. 13. Capacitance to the ground plane is the only significant component of the common mode impedance of the test structures with metallization patterns [see Fig. 9(a) and (c)]. Since the ADS model does not make any prediction of the capacitance values, they cannot be plotted here. Shown is one indicative structure representing the average case.

wires and the return current in the ground plane. This small distance amplifies the mutual inductance between the forward and return currents, and makes the nonideality of the ground plane (namely, its finite size) more apparent in the measurements. The imaginary part of the impedance of a bond wire decreases as a function of the frequency in the mid-frequency region where the skin effect is dominant. The quality of the model prediction in this frequency range directly depends on the quality of the prediction of the low-frequency inductance [see (4)]; therefore, it is appropriate to assess the deviation of the predicted and measured imaginary parts of the impedance over the mid-frequency range, rather than the absolute accuracy. The smaller this deviation is, the more parallel the measured and predicted imaginary parts of the impedance are to each other. The bond-wire model demonstrates a very similar quality of prediction for all of the test structures that can be seen in Fig. 11 (structures “F” and “M” are again the exceptions here). The small average distance between the bond wires and the return currents of structures “F” and “M” amplifies the proximity effect that is not part of this model. Due to this effect, the imaginary part of the differential impedance decreases slower as a function of the frequency. The model is also able to predict the capacitance between the bond wires and ground plane. The influence of this capacitance on the differential impedance of the bond wires becomes significant only in the high-frequency range. Nevertheless, it is possible to directly measure this capacitance value for low frequencies by measuring the common mode impedance for test structures using the metallization shown in Fig. 9(a) and (c) (see Fig. 13). At low frequencies, the bond wires in these test structures couple to the ground plane only capacitively. In Fig. 14, one can see an overview of the relative error of the predictions of our model. De-embedding of the measured capacitance includes subtracting from the overall capacitance

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Fig. 14. Relative prediction accuracy of the capacitance to the ground plane for different measured test structures. Since the ADS model does not make any prediction of the capacitance values, they cannot be plotted here.

Fig. 15. Real part of the differential impedance as a function of frequency. The prediction of the bond-wire model of ADS [8], [11] does not differ much from the prediction of this model, but is not an analytical function of the frequency. Shown is one indicative structure representing the average case.

of the signal lines and the island in the upper part of the test structures [see Fig. 9(a) and (c)]. Structure “F” is again an exception in the row of analyzed structures, and again such a big relative error is due to the small height of the wire. This implies that the interaction between the electric field of the wires and the electric field of the signal lines is larger here than in all of the other cases. This interaction influences the charge density on the surface of the wire, and therefore the measured capacitance. Our experiments have shown that, in all cases except two (structure “F” and “M”), the measured values of the real part of the differential impedance, are in very good agreement with values predicted by the model. A typical example of the prediction of the measured values of the real part of the differential impedance is shown in Fig. 15. The relative accuracy of

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of the imaginary part of the impedance for measured and simulated results up to 40 GHz. In this figure, the two sets of measured data correspond to the open-short and short-open de-embedding schemes. While the two de-embedding schemes give rise to different values in the high-frequency regime, we note that the resonance is the same for both schemes. As a result, we may conclude that the measured resonance is correctly de-embedded. The model prediction is shown by the solid line, and agrees quite well with both sets of de-embedded data; therefore, we conclude that our model is valid up to the first resonance. IV. CONCLUSION

Fig. 16. Relative prediction accuracy of the real part of the differential impedance at 1 GHz for the measured test structures. Each point corresponds to a structure from Table I.

Fig. 17. Comparison between the model predictions and the two sets of de-embedded data up to 40 GHz.

the prediction of the real part of the differential impedance at 1 GHz is shown in Fig. 16. The benchmark frequency of 1 GHz is chosen to lie between the low-frequency region, where the current crowding effect does not play any role, and the high-frequency region, where it plays the most dominant role. The agreement between measurement and simulation is very good (varying between 5%–10%). The exceptions, once again, are structures “F” and “M” with their impractically small bond-wire heights, which leads to an increased importance of nonidealities in the ground plane (the loss of electrical energy leads to the bigger resistance). As a final note, we can also consider the model behavior beyond the 4-GHz limit that we have utilized throughout the remainder of this document. Fig. 17 shows an indicative example

A predictive physics-based compact model that describes the electrical behavior of multiple bond wires as a function of signal frequency and geometry of the wires was presented. The model takes into account the inductive coupling between the wires, the frequency-dependent losses, and the capacitance between the wires and the ground plane. The model does not require any fitting parameters and places no restriction on the shape of the bond wires. Model predictions of resistance, of capacitance to the ground plane, and of self and mutual inductances of bond wires with different shapes were compared to the corresponding measured quantities. A number of test structures were implemented and characterized in order to verify the predictions of the model. For structures with practical distances between the bond wires and ground plane, the comparison of the model prediction with the measurements shows that the low-frequency inductance was predicted with a relative accuracy of 2.5%; the model can very accurately predict the current crowding effect; the capacitance to the ground was predicted with a relative accuracy of 10%. The two test structures with extremely low bond-wire profiles show worse agreement with the prediction of the model; however, such low-profile bond wires are not used in practice. Their inclusion in this study serves only to probe the limits of the approximations of this work. When compared with the state-of-the-art bond-wire model [8], we have added accurate estimation of the capacitance to the ground plane, a fully frequency-dependent impedance calculation, and causality. As a result, our model is suitable whenever high-accuracy simulations are required in either the frequency or time domains. APPENDIX A INDUCTANCE OF A FILAMENT OF THE STRAIGHT SEGMENT Equation (11) can be used only if one can calculate values of and where point is the center of the cross section of the segment, and is any point of the boundary of the cross section. The following notation will make our calculations much easier:

(20)

NAZARIAN et al.: PHYSICS-BASED CAUSAL BOND-WIRE MODEL

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where . This function is very well studied [13]; both integrals can be taken analytically

(21) . From the

Now we can consider a way to calculate definition of [see (10)], it follows that:

Fig. 18. Cross section is drawn with an arbitrary point . The disk touches the boundary of the cross section and is centered at the point (here, and is of radius ).

where has been described in section Section II-G. Substituting (26) into (13), one gets (22) (27)

This integral can be taken analytically

, consider

In order to estimate the integral the function (23) Finally, we must calculate definition,

. According to the

, and note that

is an

integral of the distance between points of the cross section and the point . Due to rotational symmetry, depends only on the norm of , and may be written as a function of only one scalar variable . Now the integral (27) can be rewritten in terms of the function

(28) (24)

Approximating

by and

by

For each value of , the cross section can be divided into two areas (see Fig. 18), and therefore the function can be split in two

, we get

(25) where the unitless coefficients result from performing exact integration of the above approximated functions. APPENDIX B MUTUAL INDUCTANCE BETWEEN STRAIGHT SEGMENTS

(29) Unfortunately we cannot calculate the function ically, but we can study the properties of it. 1) .

Equation (14) can be deduced from (13) by approximating the mutual inductance between filaments as

3)

(26)

4)

.

2)

. .

analyt-

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We can now approximate by the uniquely determined polynomial of the third order that satisfies properties 1–4

(30) Substituting yields (14).

for

in (29), and then evaluating (28)

REFERENCES [1] D. Jahn, R. Reuter, Y. Yin, and J. Feige, “Characterization and modeling of wire bond interconnects up to 100 GHz,” in IEEE Compound Semiconduct. Integr. Circuits Symp., 2006, pp. 111–114. [2] S. Hauptmann, M. Hellfeld, C. Knochenhauer, and F. Ellinger, “Modeling bond wires for millimeter wave rfic design,” in IEEE Int. Microw., Commun., Antennas, Electron. Syst. Conf., 2009, pp. 1–4. [3] A. Chandrasekharl, S. Stoukatchl, S. Brebels, J. E. Balachandran, W. De Raedt, B. Nauwelaers, and A. Poddar, “Characterisation, modelling and design of bond-wire interconnects for chip-package co-design,” in 33rd Eur. Microw. Conf., 2003, vol. 1, pp. 301–304. [4] J. Lim, D. Kwon, J.-S. Rieh, S.-W. Kim, and S. Woo Hwang, “RF characterization and modeling of various wire bond transitions,” IEEE Trans. Adv. Packag., vol. 28, no. 4, pp. 772–778, Nov. 2005. [5] F. Alimenti, P. Mezzanotte, L. Roselli, and R. Sorrentino, “Modeling and characterization of the bonding-wire interconnection,” IEEE Trans. Microw. Theory Techn., vol. 49, no. 1, pp. 142–150, Jan. 2001. [6] F. Alimenti, P. Mezzanotte, L. Roselli, and Roberto, “Multi-wire microstrip interconnections: A systematic analysis for the extraction of an equivalent circuit,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 1998, vol. 3, pp. 1929–1932. [7] X. Qi, “High frequency characterization and modeling of on-chip interconnects and RF IC wire bonds,” Ph.D. dissertation, Dept. Elect. Eng., Stanford Univ., Stanford, CA, 2001. [8] K. Mouthaan, “Modelling of RF high power bipolar transistors,” Ph.D. dissertation, Microw. Compon. Group, Delft Univ. Technology, Delft, The Netherlands, 2001. [9] K. Mouthaan, R. Tinti, M. de Kok, H. C. de Graaff, J. L. Tauritz, and J. Slotboom, “Microwave modelling and measurement of the self- and mutual inductance of coupled bondwires,” in Proc. Bipolar/BiCMOS Circuits Technol. Meeting, 1997, pp. 166–169. [10] A. Papoulis, The Fourier Integral and Its Applications. New York: McGraw-Hill, 1962. [11] Advanced Design System (ADS) 1.5 Circuit Components System Models. Agilent Technol., Santa Clara, CA, Feb. 2001. [12] S. Ramo, J. R. Whinnery, and T. van Duzer, Fields and Waves in Communication Electronics. New York: Wiley, 1994. [13] F. W. Grover, Inductance Calculations. New York: Dover, 1946. [14] L. F. Tiemeijer, R. J. Havens, R. de Kort, Y. Bouttement, P. Deixler, and M. Ryczek, “Predictive spiral inductor compact model for frequency and time domain,” in IEEE Int. Electron Devices Meeting Tech. Dig. , 2003, pp. 36.4.1–36.4.4. [15] M. C. A. M. Koolen, J. A. M. Geelen, and M. P. J. G. Versleijen, “An improved de-embedding technique for on-wafer high-frequency characterization,” in Proc. Bipolar Circuits Technol. Meeting, 1991, pp. 188–191.

Alexé L. Nazarian was born in Tbilisi, Russia, in 1971. He received the M.S. degree from Moscow State University, Moscow, Russia, in 1993. In 2001, he joined Philips Medical Systems, Best, The Netherlands, where he was involved in developing magnetic resonance imaging scanners. In 2006, he joined Philips Research Laboratories, Eindhoven, The Netherlands. He is currently with the Research Department, NXP Semiconductors, Eindhoven, The Netherlands, where his main areas of expertise are passive device modeling and anisotropic magnetoresistance (AMR) sensors for automotive industry.

Luuk F. Tiemeijer was born in Son en Breugel, The Netherlands, in 1961. He received the M.S. degree in experimental physics from the State University of Utrecht, Utrecht, The Netherlands, in 1986, and the Ph.D. degree in electronics from the Technical University of Delft, Delft, The Netherlands, in 1992. His dissertation was entitled “Optical properties of semiconductor lasers and laser amplifiers for fiber optical communication.” He was with Philips Research Laboratories, Eindhoven, The Netherlands, where he conducted research on InGaAsP semiconductor lasers and optical amplifiers. Since 1996, he has been involved with the RF characterization and modeling of advanced integrated circuit (IC) processes. In October 2006, he joined NXP Semiconductors, Eindhoven, The Netherlands. He has coauthored over 130 scientific publications. He has been the coinventor of over 20 patent applications.

David. L. John was born in Swindon, U.K., in 1972. He received the B.A.Sc degree (Hons) in engineering physics and Ph.D. degree in electrical engineering from the University of British Columbia, Vancouver, BC, Canada, in 2002 and 2006, respectively. For several years, he was a Technical Director and Lighting Designer in theatre arts. His doctoral degree, awarded under the auspices of the Institute of Applied Mathematics, dealt with the development of quantum transport simulations for carbon nanotube field-effect transistors. This work continued during his tenure as an RCUK Academic Fellow with the University of Wales, Bangor, U.K. In 2008, he joined the Device Modelling and Characterisation Group, NXP Semiconductors, Eindhoven, Netherlands, where he was involved with LDMOS and GaN HEMT devices for RF power applications. Since 2011, he has been with Philips Research, Eindhoven, Netherlands, where he is involved with power conversion applications with the Solid-State Lighting Group.

Jan Anne van Steenwijk was born in Leiden, The Netherlands, in 1951. He received the M.S. degree in electrical engineering from the Delft University of Technology, Delft, The Netherlands, in 1978. He then joined the Philips Research Laboratory, Eindhoven, The Netherlands, where he was engaged in research on high-speed integrated circuits for optical telecommunication systems, light propagation in optical fibers, and modeling and characterization of MOS transistors. In 1991, he was with the Quality Engineering Group, Philips Consumer Electronics. In 1994, he was with the Reliability Group, Philips Applied Technologies. In both groups, he has been involved in the field of robust design and compact modeling for circuit simulation. In 1998, he joined Philips Semiconductors (later on NXP Semiconductors) Nijmegen, The Netherlands, where his main interest is characterization and modeling of RF LDMOS devices for base station, broadcast, and microwave applications.

Michel de Langen, photograph and biography not available at time of publication.

Ralf M. T. Pijper was born in Holtum, The Netherlands, in 1977. He received the M.Sc. degree in applied physics from the Technical University of Eindhoven, Eindhoven, The Netherlands, in 2003. In 2005, he joined Philips Research Laboratories, Eindhoven, The Netherlands, where he is currently involved with the RF characterization of advanced integrated-circuit technologies. In October 2006, he joined NXP Semiconductors, Eindhoven, The Netherlands.

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A Novel Model for Implementation of Gamma Radiation Effects in GaAs HBTs Jincan Zhang, Yuming Zhang, Senior Member, IEEE, Hongliang Lu, Member, IEEE, Yimen Zhang, Senior Member, IEEE, and Min Liu

Abstract—For predicting the effects of gamma radiation on gallium–arsenide (GaAs) heterojunction bipolar transistors (HBTs), a novel model is presented in this paper, considering the radiation effects. Based on the analysis of radiation-induced degradation in forward base current and cutoff frequency, three semiempirical models to describe the variation of three sensitive model parameters are used for simulating the radiation effects within the framework of a simplified vertical bipolar inter-company model. Its validity was demonstrated by analysis of the experimental results of GaAs HBTs before and after gamma radiation. Index Terms—Cutoff frequency, forward base current, gamma radiation effects, heterojunction bipolar transistor (HBT), semiconductor device modeling, vertical bipolar inter-company (VBIC).

I. INTRODUCTION

G

ALLIUM–ARSENIDE (GaAs) heterojunction bipolar transistors (HBTs), due to their superior performance, are widely used in space radiation environments, and the recent boost of wireless and other high-end communications continue to draw more and more attention to its reliable long-term performance under radiation. Earlier studies on radiation effects on GaAs HBT have shown that GaAs HBTs are very attractive candidates for applications in space-based communication systems [1], [2]. In this case, many integrated circuits (ICs) have been designed with a GaAs HBT process [3]–[5]. However, to improve the radiation hardness of HBT ICs, designers need electrical models taking account for the degradation induced by radiation. However, most of the radiation studies on GaAs HBTs reported thus far have mainly focused on the radiation induced changes from the experimental results with the measured electrical characteristics of the devices (e.g., excess base current, cutoff frequency, etc.) [1], [2], [6], [7]. To our knowledge, there is not much published information on modeling the electrical characteristics of HBTs subjected to high-energy radiations [8]. The work of modeling the effects of gamma radiation on the Manuscript received May 03, 2012; revised September 16, 2012; accepted September 20, 2012. Date of publication October 24, 2012; date of current version December 13, 2012. This work was supported by the National Basic Research Program of China under Grant 2010CB327505, the Advance Research Project of China under Grant 51308030306, and the Advance Research Foundation of China under Grant 9140A08030511DZ111. The authors are with the Microelectronics Institute, Xidian University, Xi’an, Shaanxi 710071, China (e-mail: [email protected]). Digital Object Identifier 10.1109/TMTT.2012.2221137

dc characteristics of GaAs HBTs has been studied in our previous work [9]. However, the complexity of the radiation-induced degradation processes makes it difficult to develop a detailed physical model of the device after radiation. An alternative semiempirical approach is to develop an improved vertical bipolar inter-company (VBIC) model to describe electrical characteristics of the device before and after irradiation. One can use the extracted model parameters to describe the degradation of sensitive model parameters as a function of radiation dose, and then assemble the device model. We believe that such an approach is very useful to predict the degradation effects of devices. There were reports for simulating radiation-induced degradation of dc characteristics in bipolar transistors of silicon based on the semiempirical approach [10], [11]. However, very little progress has been made in modeling the degradation of ac characteristics as a function of radiation dose in bipolar transistors based on the semiempirical approach, which is now studied in this work. In this paper, a novel model for implementation of gamma radiation effects in GaAs HBTs is developed. This paper is organized as follows. The novel model based on a simplified VBIC model is presented in Section II. To validate the validity of the model, the experimental results of GaAs HBTs under gamma radiation are shown in Section III. The modeled results are compared with the measured results in Section IV and conclusions are presented in Section V. II. MODEL The VBIC model was defined by a group of representatives from IC and computer-aided design (CAD) industries to overcome the shortcomings of the Spice Gummel Poon (SGP) model. The equivalent network of VBIC is given in [12]. There are several improvements comparing with the SGP model, such as temperature-dependence modeling, quasi-saturation modeling, and decoupling of base and collector currents. However, special characteristics of HBTs make it possible to consider a simplified VBIC model, as shown in Fig. 1. In this simplified VBIC model, the following assumptions are considered. 1) There is no parasitic pnp transistor in npn HBTs [13]; therefore, the parameters to describe the parasitic transistor can be eliminated. and charge 2) The extrinsic base–emitter current can be neglected compared to the intrinsic base–emitter current and charge, respectively. 3) Since de-embedding the parasitic parameters has been and done, base–collector small-signal capacitance

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current defined as the difference between the post-radiation and pre-radiation base current can be experimentally extracted by the variations of and with radiation dose. In this case, (1) will be improved as (2), in which radiation-induced excess saturation current and excess ideal factor are included.

(2) Fig. 1. Simplified VBIC model.

B. Cutoff Frequency base–emitter small-signal capacitance can be ignored. 4) In HBTs, both early voltages and knee currents for the forward and reverse operations can be considered to be infinite [14], therefore the normalized base charge tends to be 1. The validity of the model to describe HBTs characteristics has been verified in our earlier work [15]. Unfortunately, the simplified VBIC model also has not taken account of the particular effects of radiation on the electrical behavior of devices. However, HBTs are significantly degraded when exposed to radiation. Forward base current and cutoff frequency are mainly affected. A. Forward Base Current In the measurement of forward-mode Gummel plot, the base current is measured when is fixed at zero while the base–emitter junction is in forward bias. The presence of the relatively large valence band discontinuity at the base–emitter heterointerface leads to effective suppression of the hole current injected from the base region into the emitter. Thus, the base current is mostly determined by the recombination of: 1) in the bulk and along the periphery of the base–emitter space-charge region (BE-SCR) and 2) in the bulk and at the surface of the neutral base region (NBR). In the simplified VBIC model, the total forward base current for low-level injection where voltage drop across parasitic resistances can be neglected is followed by

Physically,

can be expressed as (3) (4) (5)

where is the base–emitter junction capacitor charge time, is the base–collector junction capacitor charge time, is the base transit time, and is the base–collector space-charge region delay time. It has been shown that capacitance and resistance are slightly or even not degraded under radiation for HBTs in our previous works [16], Therefore, the degradation of is mainly caused by the increase of the transit time , which is just the sum of the variations of and in the compact model [17]. In the simplified VBIC model, the transit time is modeled as

(6) where is the forward transit time, is the variation of with basewidth modulation, is the coefficient of bias dependence, is the coefficient of dependence on , is the coefficient of dependence on , and is the forward collector current. Inserting a parameter related to the variation of due to radiation effect, the equation of the transit time can be improved as

(1) where is the thermal voltage. As can be seen from (1), the base current includes a component , formed by the NBR recombination modeled with saturation current and ideality factor , and a component , caused by the BE-SCR recombination modeled with saturation current and ideality factor . Radiation-induced degradation in the forward base current of HBTs is attributed to excess carrier recombination including radiation-induced traps in the BE-SCR [9], whereas excess base

(7) is where radiation-induced excess forward transit time used to predict the increase of , in turn to describe the degradation of . III. EXPERIMENTS In order to determine the regulations of , , and with radiation dose, and verify the validity of the presented model, the following radiation experiment has been performed.

ZHANG et al.: NOVEL MODEL FOR IMPLEMENTATION OF GAMMA RADIATION EFFECTS IN GaAs HBTs

Fig. 2. Radiation-induced degradation of base current for different total dose levels.

The devices applied in the experiment are GaAs HBTs with a single fabrication batch from the WIN Semiconductors Corporation, Tao Yuan Shien, Taiwan (type Q1H201B1). The width and length of each emitter mesa for Q1H201B1 are 1 and 20 m, respectively. Radiation of devices, without bias, was implemented in a “Gamma-Cell” with a Co source providing a dose rate of about 50 rd(Si)/s rd Si rd GaAs , and radiation time of 5.5, 16.5, 38.5, and 55 h, equivalent to a gamma total dose of 1, 3, 7, and 10 Mrd(Si), respectively. In order to get enough accurate test data, there were four test samples under every radiation total dose mentioned above. Before the experiment, the samples were carefully selected to ensure the differences of performances among the 16 tested HBTs to be less than 3% and the spread of the measured data for the four devices at each radiation to be within 0.1%. All of samples were measured at room temperature K before and after radiation. On-chip forward dc Gummel characteristic measurements were made with an HP4142 Semiconductor Analyzer. Scattering parameters ( -parameters) were measured using an HP8510C vector network analyzer from 100 MHz to 40 GHz, and in a wide bias current range based on circuit applications. A. Forward Base Current Fig. 2 shows the plot of measured versus with the base–collector junction shorted for different total dose radiation, while the collector current remains approximately unchanged. As can be seen from this figure, at low current levels, the curve shows significant change after radiation. In the high current regime, almost has no change. The increase rate of base current, defined as the ratio of excess base current to pre-radiation base current, is plotted with incremental dose values, as shown in Fig. 3. The increase rate increases with the total dose, and reaches 620% at V after a gamma total dose of 10 Mrd(Si). However, as can be seen from Fig. 3, the increase rate of base current versus decreases. In the regime of V, the increase rate becomes close to 0. Fig. 4 shows the effect of the total dose on the excess base current for different total dose levels. The results presented are limited in the low injection current region where the excess base current remains significant compared with the value of the total base current. The excess base current is approximately linear throughout the bias range with a slope of the idea factor

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Fig. 3. Increase rate of forward base current.

Fig. 4. Radiation-induced excess base current.

Fig. 5.

versus collector current for different total dose levels.

. These results indicate that radiation-induced recombination mechanism in the BE-SCR is more dominant in the excess base current. Thus, it is reasonable that only the and parameters associated with the BE-SCR are improved in the novel model, as shown in (2). There are two possible recombination mechanisms in the BE-SCR to be consistent with the measured base current ideality factor [18]. One is trap-assisted tunneling due to gamma radiation induced traps. The second possible mechanism is the recombination from a nonuniform distribution of Shockley–Read–Hall centers within the BE-SCR. B. Cutoff Frequency was extracted using -parameters The cutoff frequency measurements in the common-emitter configuration by extrapolating . Fig. 5 shows measured versus collector current for different total dose levels. In general, relatively obvious degradation is observed for the GaAs HBT after 10-Mrd(Si) radiation.

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Fig. 6.

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using fly-back measurement.

Fig. 8. Capacitances (

and

) for GaAs HBT.

TABLE I , AND PARAMETERS FOR PRE-RADIATION AND POST-RADIATION OF DIFFERENT RADIATION LEVELS

VALUES OF

Fig. 7.

using fly-back measurement.

The emitter series resistance was measured with the fly-back technique in which the emitter is grounded and current is forced into the base. The open circuit collector voltage was measured. The emitter resistance is taken as the slope of the linear segment of the curve. Fig. 6 shows the comparison of from fly-back measurement curves before and after 10-Mrd(Si) radiation. As can be seen from this figure, there is almost no change in . In the simplified VBIC model, includes the extrinsic collector resistance and intrinsic collector resistance . Fig. 7 shows from fly-back measurement curves to be similar to measurement. The value of is equal to the slope of the linear segment of the curve, and has no change after radiation. can be determined by optimizing the fitting to quasi-saturation region data of common-emitter characteristics. It can then be obtained that there is almost no change in . The possible reason for almost unchanged and after radiation is that the doped concentration in HBT devices is high, which makes radiation induced a little reduction of carrier concentration causing no obvious increment in and . Fig. 8 shows the comparison of the capacitances for the GaAs HBT. The curves nearly coincide, suggesting that even after 10-Mrd(Si) total dose gamma radiation, the capacitances almost do not change. According to the measured results, it can be concluded that the degradation of is only due to the change of , which validates the correctness of the discussion in Section II-B. IV. ANALYSIS AND DISCUSSION To predict the electrical behavior of ICs for a given radiation total dose, designers usually need an efficient evaluation of the

,

,

radiation parameters embedded in sensitive device model parameters to determine the degradation of these parameters with dose. Such an approach permits an easy implementation for radiation-induced degradation in the electrical simulator, such as the Advanced Design System (ADS), by means of symbolically defined device (SDD), which is an equation-based module to enable designer to quickly and easily define custom and nonlinear components. Furthermore, this approach, which allows reasonable computation time, is generally preferred for the applications of complex physics with large numbers of parameters. A. Forward Base Current To extract the forward Gummel base current parameters, the and parameters can be determined from the intercept and the slope of the plot in the region of low . The values of and are then easily obtained by fitting the curve in the high injection region. The obtained , , , and parameter values are listed in Table I for pre-radiation and post-radiation of different radiation levels. The extracted curves for and versus total dose are plotted in Fig. 9(a) and (b), respectively. A saturation effect is exhibited for high total doses. The objective functions for fitting and are shown in (8) and (9), respectively, where Dose represents the gamma radiation total dose [in Mrd(Si)] and , , , , , and are fitting parameters Dose

(8)

Dose

(9)

As can be seen from Fig. 9(a) and (b), the fitting curves of the first four dose levels (first four modeled) nearly coincide with that of all the five dose levels (modeled). The values of and at Dose Mrd(Si) obtained from the first four modeled, modeled, and measured are shown in Table II. There

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Fig. 11. Comparison of the measured and modeled forward base current for different total dose levels.

TABLE III , , , , AND PARAMETER FOR PRE-RADIATION AND POST-RADIATION OF DIFFERENT RADIATION LEVELS

VALUES OF

(b) Fig. 9. (a) Comparison of the measured and modeled . of the measured and modeled

VALUES OF

AND

TABLE II PARAMETERS AT Dose

. (b) Comparison

Mrd(Si)

match the measured data reasonably well (the error within 2%) up to V. The difference between the measured and modeled increases up to 3% for the high injection current region because our model does not account for the degradation of the NBR. However, this mismatch is still not bad. B. Cutoff Frequency

Fig. 10. Comparison of the measured and first four modeled excess base current for 10-Mrd(Si) gamma radiation.

In order to extract the transit time parameters, the forward transit time is obtained from the intercept of against the curve. The , , , and parameters of the transit time are further estimated by optimization. Table III presents the extracted , , , , and parameter values for pre-radiation and post-radiation of different radiation levels. It seems that parameters do not change much between pre-radiation and post-radiation. Since the most susceptible transistor materials to be sensitive to the total dose effect are insulators, the SiN insulator instead of oxides in the GaAs HBTs does not show serious degradation to the total dose effect. To describe the decrease of , the following objective function is used to describe excess forward transit time : Dose

are little deviations between the measured values and the first four modeled values. The error between the measured excess base current and the excess base current based on first four modeled is less than 5% for the fifth total dose 10 Mrd(Si), as depicted in Fig. 10. Thus, it can be concluded that the novel model should be able to predict accurately the radiation-induced degradation in excess base current even after more than 10-Mrd(Si) gamma radiation. The measured and modeled forward base current for different total doses is drawn in Fig. 11. The modeled results

(10)

where , , and are fitting parameters. The measured and modeled versus total dose is presented in Fig. 12. The fitting curve based on the first four dose levels almost entirely coincides with that based on all five dose levels, suggesting that the novel model should be able to predict the degradation of cutoff frequency under more than 10-Mrd(Si) gamma radiation. The cutoff frequency versus is illustrated in Fig. 13 for different total dose levels with a maximum error less than 1% in the all-bias range.

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Fig. 12. Comparison of the measured and modeled

.

Fig. 13. Comparison of the measured and modeled cutoff frequency for different total dose levels.

V. CONCLUSION A novel model to include total dose effects for HBTs has been presented in this paper. To predict the behavior of ICs in space-like environments, semiempirical models for radiation parameters as a function of radiation total dose have been proposed. By incorporating the radiation parameters into sensitive model parameters, a novel model based on a simplified VBIC model has been implemented to simulate accurately the radiation-induced degradation in forward base current and cutoff frequency at least 10-Mrd(Si) gamma total dose. Our analysis also shows that the model can possibly predict the electrical characteristics of HBTs even more than 10-Mrd(Si) gamma radiation; however, further experimental study is required to prove the deduction. REFERENCES [1] S. M. Zhang, G. F. Niu, J. D. Cressler, S. J. Mathew, U. Gogineni, S. D. Clark, P. Zampardi, and R. L. Pierson, “A comparison of the effects of gamma radiation on SiGe HBT and GaAs HBT technologies,” IEEE Trans. Nucl. Sci., vol. 47, no. 6, pp. 2521–2527, Dec. 2000. [2] S. Vuppala, C. S. Li, P. Zwicknagl, and S. Subramanian, “Neutron, proton and electron radiation effects in InGaP/GaAs single hetero-junction bipolar transistors,” IEEE Trans. Nucl. Sci., vol. 50, no. 6, pp. 1846–1851, Dec. 2003. [3] U. Karthaus, D. Sukumaran, S. Tontisirin, S. Ahles, A. Elmaghraby, L. Schmidt, and H. Wagner, “Fully integrated 39 dBm, 3-stage doherty PA MMIC in a low-voltage GaAs HBT technology,” IEEE Microw. Wireless Compon. Lett., vol. 22, no. 2, pp. 94–96, Feb. 2012. [4] N. G. Constantin, P. J. Zampardi, and M. N. El-Gamal, “Automatic hardware reconfiguration for current reduction at low power in RFIC PAs,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 6, pp. 1560–1570, Jun. 2011.

[5] K. Yamamoto, H. Kurusu, S. Suzuki, and M. Miyashita, “High-directivity enhancement with passive and active bypass circuit techniques for GaAs MMIC microstrip directional couplers,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 12, pp. 3095–3107, Dec. 2011. [6] E. P. Wilcox, S. D. Phillips, P. Cheng, T. Thrivikraman, A. Madan, J. D. Cressler, G. Vizkelethy, P. W. Marshall, C. Marshall, J. A. Babcock, K. Kruckmeyer, R. Eddy, G. Cestra, and B. Y. Zhang, “Single event transient hardness of a new complementary npn pnp SiGe HBT technology on thick-film SOI,” IEEE Trans. Nucl. Sci., vol. 57, no. 6, pp. 3293–3297, Dec. 2010. [7] S. Díez, M. Lozano, G. Pellegrini, F. Campabadal, I. Mandic, D. Knoll, B. Heinemann, and M. Ullán, “Proton radiation damage on SiGe:C HBTs and additivity of ionization and displacement effects,” IEEE Trans. Nucl. Sci., vol. 56, no. 4, pp. 1931–1936, Aug. 2009. [8] M. V. Uffelen, S. Geboers, P. Leroux, and F. Berghmans, “Spice modelling of a discrete COTS SiGe HBT for digital applications up to MGy dose levels,” IEEE Trans. Nucl. Sci., vol. 53, no. 4, pp. 1945–1949, Aug. 2006. [9] J. C. Zhang, Y. M. Zhang, H. L. Lu, Y. M. Zhang, and S. Yang, “The model parameter extraction and simulation for the effects of gamma irradiation on the DC characteristics of InGaP/GaAs single heterojunction bipolar transistors,” Microelectron. Reliab., Art. ID MR-D-1100657, to be published. [10] X. Montagner, R. Briand, P. Fouillat, R. D. Schrimpf, A. Touboul, K. F. Galloway, M. C. Calvet, and P. Calve1, “Dose-rate and irradiation temperature dependence of BJT spice model rad-parameters,” IEEE Trans. Nucl. Sci., vol. 45, no. 3, pp. 1431–1437, Jun. 1998. [11] X. Montagner, P. Fouillat, R. Briand, R. D. Schrimpf, A. Touboul, K. F. Galloway, M. C. Calvet, and P. Calvel, “Implementation of total dose effects in the bipolar junction transistor Gummel–Poon model,” IEEE Trans. Nucl. Sci., vol. 44, no. 6, pp. 1922–1929, Dec. 1997. [12] C. C. McAndrew, J. A. Seitchik, D. F. Bowers, M. Dunn, M. Foisy, I. Getreu, M. McSwain, S. Moinian, J. Parker, D. J. Rouston, M. Schroter, P. van Wijnen, and L. F. Wagner, “VBIC95: The vertical bipolarintercompany model,” IEEE J. Solid-State Circuits, vol. 31, no. 10, pp. 1476–1483, Oct. 1996. [13] S. V. Cherepko and J. C. M. Hwang, “VBIC model applicability and extraction procedure for InGaP/GaAs HBT,” in Proc. Asia–Pacific Microw. Conf., 2001, pp. 716–721. [14] W. Liu, “Switching characteristics and spice models,” in Handbook of III–V Heterojunction Bipolar Transistors. New York: Wiley, 1998, pp. 1088–1090. [15] J. C. Zhang, Y. M. Zhang, H. L. Lu, Y. M. Zhang, S. Yang, and P. Yuan, “A simplified VBIC model and SDD implementation for InP DHBT,” in IEEE Int. Electron Devices and Solid-State Circuits Conf., Tianjin, China, 2011, pp. 1–2. [16] S. Yang, H. L. Lu, Y. M. Zhang, Y. M. Zhang, J. C. Zhang, and H. P. Zhang, “The effects of gamma irradiation on GaAs HBT,” in IEEE Int. Electron Devices and Solid-State Circuits Conf., Tianjin, China, 2011, pp. 1–2. [17] J. Ge, Z. Jin, Y. B. Su, W. Cheng, X. T. Wang, G. P. Chen, and X. Y. Liu, “A physics-based charge-control model for InP DHBT including current-blocking effect,” Chinese Phys. Lett., vol. 26, no. 7, pp. 1–4, 2009. [18] G. A. Schrantz et al., “Neutron radiation effects on AlGaAs/GaAs heterojunction bipolar transistors,” IEEE Trans. Nucl. Sci., vol. 35, no. 6, pp. 1657–1661, Dec. 1988. Jincan Zhang, photograph and biography not available at time of publication. Yuming Zhang (M’01–SM’05), photograph and biography not available at time of publication. Hongliang Lu (M’07), photograph and biography not available at time of publication. Yimen Zhang (SM’91), photograph and biography not available at time of publication. Min Liu, photograph and biography not available at time of publication.

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On the Compression and Blocking Distortion of Semiconductor-Based Varactors Cong Huang, Member, IEEE, Koen Buisman, Member, IEEE, Peter J. Zampardi, Senior Member, IEEE, Lawrence E. Larson, Fellow, IEEE, and Leo C. N. de Vreede, Senior Member, IEEE

Abstract—The effective capacitance of variable reactors (varactors) can be modulated by the magnitude of applied RF signals, resulting in troublesome detuning issues in resonators constructed with these devices. In this paper, the fundamental causes behind these issues are investigated through the use of Volterra series. It is concluded that two major distortion mechanisms, namely, compression and blocking, are responsible for this effective capacitance change under RF excitation. In light of this observation, different varactor configurations are proposed and investigated, yielding novel devices with much smaller capacitance variation, typically on the order of 0.1 0.5 compared to 10 50 for conventional semiconductor-based varactors. With this improvement, the resonance frequency shift of a 2-GHz resonator is 300 to 5 MHz for worst case conditions, a decreased from property essential to tunable high- filter applications. Among all analyzed structures, the varactor topology that facilitates cancelation of all important distortion products has been experimentally tested. These measurements demonstrate successful cancellation of both compression and blocking terms, resulting in capacitance variation below 0.5% in worst case scenarios. Index Terms—Low distortion, microwave devices, power dependency, RF circuits, varactor, varicap.

I. INTRODUCTION

V

ARIABLE reactors (varactors) are traditionally nonlinear devices [1]–[5]. In RF applications this linearity drawback is reflected in compression, blocking/desensitization and intermodulation distortion phenomena [6], [7] when operated with large RF signals. Intermodulation distortion gives rise to in-band and out-of-band interference, which either disturbs the information detection of the adjacent-channel users, or pollutes the transmitted in-band information, causing difficulties in signal detection. On the other hand, compression and blocking/desensitization phenomena change the effective capacitance of the varactors under large RF signal excitation and may detune a well-designed RF system by changing its operation frequency and transfer function, which are both key parameters for tunable resonators and filters [8]. Manuscript received May 15, 2012; revised September 06, 2012; accepted September 13, 2012. Date of publication October 24, 2012; date of current version December 13, 2012. This work was supported under the VENI, HEECS, and MEMPHIS projects. C. Huang, K. Buisman, and L. C. N. de Vreede are with the Delft Institute of Microsystems and Nanoelectronics (DIMES), Delft University of Technology, Delft 2628 CN, The Netherlands (e-mail: [email protected]; L.C.N. [email protected]). P. J. Zampardi is with Skyworks Solutions Inc., Newbury Park, CA 91320 USA. L. E. Larson is with the School of Engineering, Brown University, Providence, RI 02912 USA. Digital Object Identifier 10.1109/TMTT.2012.2221139

Fig. 1. Different frequencies for the intermodulation, compression, and blocking distortion under a two-tone signal excitation.

Conventionally, stacking is a useful technique to reduce the impact of varactor non-linearities. By connecting a number of identical varactors in series, the voltage swing on each device is decreased and accordingly the intermodulation, compression, and blocking distortions are all reduced. This approach is simple to implement without changing the base material, but at a cost of device size and quality factor. Although stacking turns out to be the most efficient way to improve the linearity of ferroelectric-material-based varactors [9], [10] due to their high 200 , stringent tradeoffs bedielectric constants typically tween quality factor and linearity are found in the semiconductor-based varactors and therefore limit the general utility of the stacking technique. To address the linearity issues of the semiconductor varactors, research has been directed toward cancellation approaches. In [11]–[14], the intermodulation distortion of semiconductor varactors has been extensively studied and various varactor topologies have been proposed to cancel the third-order intermodulacomponents at and under a two-tone tion cancellation techniques signal excitation (see Fig. 1). These in the yield excellent third-order output intercept point order of 60 dBm, facilitating many varactor-based adaptive RF circuits [15]–[17]. cancellation techIn contrast to the previously proposed niques, the focus of this work will be on the cancellation of detuning related distortion components that appear at the fundamental frequencies and (see Fig. 1). In these scenarios, large RF signals present on the varactor might affect the varactor operation within the frequency band of interest, a phenomenon that appears as a variation of the effective varactor capacitance and in turn detunes the system. In Section II, this phenomenon is investigated using Volterra analysis. It reveals that two different distortion components may vary the capacitance of varactors under RF excitation, namely, compression distortion due to the self-mixing of the in-band signal and blocking distortion

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Fig. 2. Schematic for the Volterra analysis of the varactors’ capacitance variation due to the RF signals.

LINEAR

AND

TABLE I NONLINEAR CURRENT PRODUCTS AT & AROUND FUNDAMENTAL FREQUENCIES (FIG. 2)

THE

current components at & around the fundamental frequencies and are listed for the Volterra kernel orders less than five. For testing the capacitance variation due to RF signals, only the distortion products that appear at and play a role. Note that this is different from the intermodulation products, which appear at and . Consequently, a study related to detuning must be focused on distortion products appearing at the fundamental frequencies. The capacitive current flowing through the varactor at can be written as

(1) where and are the first- and third-order voltage–current transfer functions of the varactor. From (1), the corresponding capacitance variation of varactor due to the RF signal is given by

(2)

due to adjacent interferers. In Sections III–V, various cancellation mechanisms and solutions to these distortion phenomena are extensively discussed, which not only provide the theoretical explanation of the results reported in [18], but also yields the introduction of three new varactor configurations that have inherent blocking distortion cancellation properties. The practical application fields of these proposed topologies are discussed in Section VI. To experimentally verify the theory, their linearity performance is reported in Section VII followed by conclusions in Section VIII. II. CAPACITANCE VARIATION ISSUES VARACTOR-BASED RF CIRCUITRY

IN

Detuning issues in varactor-based RF adaptive circuits mainly arise from the capacitance variations of the varactors due to the presence of large RF signals. To understand this phenomenon, we use the Volterra analysis shown in Fig. 2. In this analysis, the voltage-controlled varactor with a given – relationship (with being the capacitance of the varactor and being the reverse applied voltage) is excited by a two-tone RF voltage signal with the amplitudes and and the frequencies and , respectively. Due to the nonlinear properties of a conventional varactor, the current flowing through it will consist of many undesired distortion components at all linear combinations of and . In Table I, all important

where is the capacitance under RF excitation and is the linear capacitance of the varactor. It can be found in (1) that the fundamental current at flowing through the varactor consists of three terms, i.e., the desired linear component and two third-order distortion components that cause deviations. Although both third-order distortion components play a role in changing the effective capacitance of the varactor, as indicated in (2), their mechanisms are different. Here, we may regard the input voltage tone at as the wanted in-band signal and the tone at as the adjacent blocking signal. It can be observed that the first third-order distortion component in (1) depends solely on and , irrespective of the blocking signal, and therefore it is a pure self-mixing term. It implies that even if the second jammer tone at is absent, the current flowing through the varactor can be a “compressive” or “expansive” function of the wanted in-band RF signal and is hereafter called compression distortion [6], [7]. In contrast, the second distortion component in (1) is a function of , , , and ; hence, it arises from the mixing between the in-band signal and the blocking jammer signal. This type of distortion is called desensitization or blocking distortion since the desired weak signal may be desensitized or even blocked due to the existence of a strong interferer [6], [7]. Consequently, as indicated in (2), the compression distortion induced capacitance variation depends solely on the amplitude of the in-band signal , while the capacitance variation due to the blocking distortion is proportional to . To test the contributions of these compression and blocking related distortion products to the capacitance variation, a single nonlinear diode with exponential relationship is simulated using the ADS harmonic-balance simulator. The resulting

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Fig. 3. Capacitance variation at due to self-mixing and adjacent blockers as a function of input voltage amplitudes for a single diode. For the compression distortion, capacitance variation is plotted versus voltage amplitude with V. For the blocking distortion, capacitance variation is plotted with V. , versus voltage amplitude pF and V . GHz, GHz and where V. the dc reverse control voltage

capacitance variation is plotted in Fig. 3 as a function of the RF voltage amplitude. The contributions of the self-mixing and adjacent blocker are distinguished using unequal amplitudes for the two-tone input signal. By enforcing the amplitude of one tone to be much smaller than that of the other tone, the capacitance variation will be dominated only by one of the distortion contributions as suggested in (2). In Fig. 3, the capacitance variation versus voltage amplitude has a slope of 2:1 in the logarithmic scale for both distortion cases, differing by a factor of two, which is in agreement with the analytical result of (2). In the worst case condition, a 40%–50% capacitance variation can occur in the single varactor case, a capacitance change that can severely detune a varactor-based RF adaptive circuit. This phenomenon will be addressed in detail in Sections III and IV when considering the various distortion cancellation approaches with semiconductor-based varactors. III. LOW-CAPACITANCE VARIATION VARACTOR CIRCUIT TOPOLOGIES When a single semiconductor diode with given – relation is used as a varactor, its capacitance variation due to the RF signal amplitude cannot be avoided. This is basically because the dc control voltage shares the same terminal with the applied RF signal(s), as shown in Fig. 4(a). In such a configuration, the periodic positive and negative RF voltage swings force the diode to experience an asymmetrical – behavior, resulting in a variation of effective capacitance and therefore raising detuning issues. To address this problem, three-terminal varactor topologies such as antiseries or antiseries/antiparallel configurations shown in Fig. 4(b) and (c) need to be employed.

Fig. 4. (a) Single diode configuration. (b) Antiseries configuration. (c) Antiseries/antiparallel configuration.

The key approach to cancel the compression and blocking distortion is to have a proper combination of the – relation for each varactor diode in relation to the chosen center-tap terminations at different (harmonic) frequencies, i.e., . For the antiseries configuration shown in Fig. 4(b), the RF signal is applied between the top and bottom terminals, while the center-tap terminal supplies a dc voltage to control the capacitance of the whole varactor stack. To separate the dc and RF signals, the center-tap impedance must be much higher than the ac impedance offered by the varactors themselves [i.e., ] at the fundamental frequencies, while being lower than that of the varactor diodes at dc for the purpose of biasing. On the other hand, the center-tap impedances around the baseband and second harmonic frequencies ( , , and ) are, in principle, selectable and this flexibility can be utilized to cancel the compression and blocking distortion without influencing the linear operation around the fundamental frequency. IV. VARACTOR CIRCUIT TOPOLOGY FOR THE CANCELLATION OF COMPRESSION DISTORTION The compression distortion arises from the self-mixing of the in-band RF signal and is irrespective of the jammer signal. For this reason, the focus of the analysis should be on the mixing products at dc, fundamental , and second harmonic frequencies. In Table II, possible combinations of the center-tap and varactor impedances at dc and second harmonic frequency

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where

TABLE II OUT-OF-BAND IMPEDANCE SETTINGS FOR COMPRESSION DISTORTION CANCELLATION MECHANISM

(5) (6) (7) are the capacitance Taylor coefficients of each varactor diode being the reverse applied voltage with a positive value, with and and are the original linear current and capacitance with infinitely small RF excitation. It is indicated in (3) that the current flowing through the varactors at the fundamental frequency is modulated by the third-order compression distortion product, which is a function of the amplitude of the applied voltage, resulting in capacitance variation, as shown in (4). By setting (4) to zero, we force the cancellation of the third-order compression distortion yielding an exponential relation for the varactor diode, i.e., (8)

Fig. 5. Cancellation mechanism of the third-order compression term with the by using a high center-tap impedance transfer function of at the second harmonic frequency.

are listed for the circuit of Fig. 4(b) to achieve cancellation of compression distortion. From the practical implementation perspective, the entry of is not possible because the varactor impedance itself approaches infinity at dc. With this in mind, the analysis can be performed for the remaining condition of . It reveals that the compression distortion component is composed of the direct mixing product of the fundamental signal itself and the indirect mixing product between the fundamental signal and the second-order mixing product at the second harmonic frequency with the mechanism illustrated in Fig. 5. Considering the fact that there is no dc second-order mixing product available at the center-tap node, we need to utilize the second-order mixing component at to cancel the third-order direct and indirect mixing products (see Fig. 5). Therefore, the center-tap impedance must be higher than that of the varactor impedance at the second harmonic frequency [i.e., ]. The Volterra series has been solved assuming a single-tone voltage excitation, where the varactor is implemented with the antiseries topology shown in Fig. 4(b). The center-tap impedance is set to be much higher than the varactor impedance at while the dc center-tap impedance remains much lower. The resulting capacitive current , which contains the third-order compression distortion term and the corresponding capacitance variation relative to the linear capacitance, can be written as (3) (4)

is the capacitance at zero bias and is the capaciwhere tance grading coefficient. Note that any choice of and will yield perfect cancellation of the third-order compression term for Fig. 4(b), providing design flexibility for the tuning range and maximum control voltage for the varactor diodes. As a proof of cancellation, the proposed compression distortion cancelled topology [see Fig. 4(b)] is simulated in comparison with a conventional single diode [see Fig. 4(a)] using the ADS harmonic-balance simulator. The varactor is excited by a single-tone voltage signal in order to test the influence of the compression distortion. In Fig. 6, the resulting capacitance variation of the proposed topology exhibits a slope of 4:1 versus voltage amplitude in contrast to the slope of 2:1 for the case of the single diode. This 4:1 slope indicates that the capacitance variation is dominated by the remaining much smaller fifth-order compression distortion due to the successful cancellation of the third-order compression product. As a result, the proposed topology has a maximum simulated capacitance variation below 0.25% compared to 20 for the conventional single diode. To illustrate the reduced sensitivity for detuning when using these improved varactor components, a high- tunable LC parallel resonator with a resonance frequency of 2 GHz (see the schematic in the inset of Fig. 7) is created. The conventional single diode [see Fig. 4(a)] and the compression distortion cancelled topology [see Fig. 4(b)] are used as the tunable element, respectively, for comparison. The reverse dc control voltage of the diodes is fixed to 5 V, while the input RF voltage is varied from 0 to 5 V to test the frequency shift of the resonator. In Fig. 7, the shift of the resonance frequency of a parallel LC resonator is plotted for the conventional single diode and the compression distortion cancelled topology using the same singletone excitation. It reveals that the detuning of the parallel LC resonator is practically eliminated when using the third-order compression distortion cancelled topology. The inset of Fig. 7 highlights the impedance of the resonator in the region close to 2 GHz and it exhibits a resonance frequency shift as small as

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TABLE III IMPEDANCE SETTINGS FOR DIFFERENT BLOCKING DISTORTION CANCELLATION MECHANISMS

Fig. 6. Simulated capacitance variation relative to the linear capacitance in percentage for the single diode [see Fig. 4(a)] and third-order compression distortion cancelled topology [see Fig. 4(b)]. The diodes all have an exponential – relationship: V and dc reverse control voltage V. pF for the single diode and pF for the third-order compression distortion cancelled topology.

Fig. 7. Simulated resonance frequency variation of the varactor-based LC parallel resonator using a single diode and a third-order compression distortion relationship: cancelled topology. The diodes all have an exponential – V and dc reverse control voltage V. pF for pF for the third-order compression product canthe single diode and celled topology. The of the 2.1-nH inductor is set to 500 at 2 GHz.

2 MHz in the worst case, in contrast to the 175-MHz resonance frequency shift that is found for the resonator using a conventional single diode.

V. VARACTOR CIRCUIT TOPOLOGIES FOR THE CANCELLATION OF BLOCKING DISTORTION In contrast to the self-mixing induced compression product, the desired quasi-static capacitance of the varactors can be also modulated by the blocking distortion due to the existence of adjacent interferers. The blocking distortion product present at

arises from the direct mixing of the signals at the fundamental frequencies (i.e., and ) and the indirect mixing beween the fundamental tones and the second-order intermodulation terms at and . The approach to cancel the blocking distortion component is to compensate the direct mixing product with the indirect mixing product through the use of a three-terminal varactor device such as the antiseries topology shown in Fig. 4(b) with an appropriate combination between the – relationship for the varactor diodes and the center-tap impedance. Compared to the cancellation of the compression distortion where the dc center-tap impedance must be low for biasing, it is now the baseband center-tap impedance at instead of dc that plays a dominant role. Therefore, the baseband impedance provides a degree of freedom in the cancellation of the blocking distortion. In Table III, possible combinations of center-tap and varactor impedance at and are listed for the cancellation of blocking distortion. Note that there will be no cancellation possible when using low center-tap impedance both at baseband and around the second harmonic frequencies, due to the absence of the indirect mixing products. Setting one of the baseband or second-harmonic center-tap impedances to a relatively low value while keeping the other at a relatively high value results in the cancellation mechanism shown in Fig. 8(a) and (b). When solving the Volterra series, the capacitive current flowing through the varactor stack at that contains the third-order blocking product, and the corresponding capacitance variation relative to the linear capacitance can be written as (9) (10) By solving the differential equation, the required condition to cancel the blocking product will again yield the exponential relationship. Note that the mechanisms that set one of the out-of-band center-tap impedances at or to a lower value and the other to a higher value [see Fig. 8(a) and (b)] yield identical results, basically because both out-of-band terminations play the same role in generating the third-order indirect mixing product.

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review of the cancellation conditions for the antiseries configuration reveals that different choices for the center-tap terminations can require different – relations, among which the exponential – relationship is the most common solution. This indicates that the antiseries configuration with an exponential – relation can be used in many conditions, except when the center-tap impedance is high at both out-of-band frequencies, i.e., and . In this case, varactor diodes with a capacitance power law coefficient of are required, which corresponds to a different doping profile for the varactor diodes, making it more complicate to address all possible varactor solutions within a single technology. To address this problem, the antiseries/antiparallel configuration of Fig. 4(c) can be used. The antiseries branch with the area ratio of for the varactor diodes redistributes the roles of the direct and indirect mixing products in the mechanism shown in Fig. 8(c) and enables the exponential – relationship for the cancellation of third-order blocking distortion when both out-of-band impedances at and are set to high values. The second antiseries pair with reverse area ratio cancels the even-order nonlinear current within the varactor structure and therefore no second-order voltage components will develop across the varactor structure during practical applications, avoiding the secondary mixing that may lead to capacitance variation. By setting the center-tap impedance to infinity at both and and using an exponential – relationship as (8) for the varactor diodes, the current and capacitance variation are given by Fig. 8. Different mechanisms to cancel the third-order blocking distortion terms with the conditions listed in Table III. (a) Cancellation mechanism of third-order blocking term by using relatively low center-tap impedance at and high center-tap impedance at . (b) Cancellation mechanism of third-order blocking term by using relatively high center-tap impedance at and low center-tap impedance at . (c) Cancellation mechanism of third-order blocking term by using relatively high center-tap impedance both and . at

On the other hand, when high center-tap impedances are used for and , the cancellation mechanism of Fig. 8(c) can be realized and the resulting current and capacitance variation are given by

(11) (12) By setting (12) to 0, we can find the required relation for the varactor diode to cancel the third-order blocking distortion component. The required capacitance is (13) is the build-in voltage for varactor diode. where Thus far, the antiseries configuration [see Fig. 4(b)] has been used to cancel the compression and blocking distortions. A brief

(14) where

, (15)

which leads to the required area ratio of the third-order products, namely,

for the cancellation

(16) The resulting antiseries/antiparallel topology with the diode area ratio of (16) allows use of the diode with an exponential – relation when both out-of-band impedances are set to high values, extending the application field of such a diode. To prove the cancellation, the blocking distortion cancelled topologies [see the mechanisms shown in Fig. 8(a)–(c)] are simulated and compared with a conventional single diode using the ADS harmonic-balance simulator. For fair comparison, the varactor diodes used in the simulation are normalized to have identical capacitance tuning ratio of 11:1 and a maximum control voltage of 10 V. In this test, a two-tone voltage signal is applied to the schematic shown in Fig. 2. The voltage amplitude of the wanted tone at is set to a much smaller value (0.01 V) than the amplitude of the jammer tone at . Under this condition, the blocking distortion component due to the adjacent jammer becomes the dominant contributor to the nonlinear current and capacitance variation. Fig. 9 plots the capacitance variation at

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Fig. 9. Simulated capacitance variation at in percentage for the single diode pF for the and third-order blocking distortion cancelled topologies. pF for the Fig. 4(b) topologies. pF and single diode, for the Fig. 4(c) configuration. GHz, GHz, V , V, and dc reverse control voltage V. is set to . 0.01 V and it is much smaller than

versus the amplitude of the jammer signal at . For the blocking distortion cancelled topologies, the slope of 4:1 versus voltage amplitude is observed in contrast to the slope of 2:1 for the case of the single diode. The 4:1 slope confirms the successful cancellation of the third-order blocking distortion, yielding much smaller capacitance variation. To investigate the blocking distortion induced detuning phenomenon, a two-tone voltage signal is applied to the resonator, where the jammer frequency is located at 2.1 GHz with varying RF amplitude . The amplitude of the in-band signal at is set to a value much smaller than in order to suppress the influence of compression distortion. The resonance frequency shift of a parallel LC resonator is plotted in Fig. 10(a) for the conventional single diode and the blocking distortion cancelled topologies using the same two-tone excitation. Much smaller frequency shifts have been found for the blocking distortion cancelled topologies. Fig. 10(b)–(e) highlights the impedance of the resonators using different blocking cancelled topologies in the region close to 2 GHz and it indicates that the resonance frequency shifts of the parallel resonators are typically less than 8 MHz, compared to 300-MHz frequency shift for the single diode based resonator. It is worth mentioning that the topology using relatively higher center-tap impedance at both and with the mechanism shown in Fig. 8(c) outperforms the rest of the topologies in terms of blocking due to its smaller fifth-order distortion coefficient and transfer function. In the worst case, its resulting resonance frequency shift is as small as 1 MHz and this property is potentially useful for

Fig. 10. Resonance frequency variation due to the RF jammer signal. (a) LC resonators using the single diode and four blocking distortion cancelled topolopF, and V for the single diode. (b) LC resgies. onator using the antiseries blocking distortion cancellation topology with low , high , and exponential relationship for the pF, V . (c) LC resonator using the varactor diodes. , antiseries blocking distortion cancellation topology with high , and exponential relationship for the varactor diodes. low pF, V . (d) LC resonator using the antiseries blocking , high , distortion cancellation topology with high for the varactor diodes. pF, and V. (e) LC resonator using the antiseries/antiparallel blocking distortion , high , and exponential cancellation topology with high relationship for the varactor diodes. pF, V , . For all resonators, dc reverse control voltage V and the and of the 2.1-nH inductor is 500 at 2 GHz. is set to 0.01 V and is much smaller . than

the most challenging high- filter/duplexer applications subject to high-power jammer signals.

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TABLE IV BLOCKING DISTORTION CANCELLED TOPOLOGIES, COMPRESSION DISTORTION CANCELLED TOPOLOGY, AND IM3 CANCELLED TOPOLOGIES

VI. SUMMARY AND COMPARISON OF VARACTOR TOPOLOGIES In Table IV, the proposed RF power insensitive varactors with the cancellation of the detuning related compression or blocking distortions are summarized. For receiver applications, the input signal is typically small 30 dBm while the jammer blocking signals can in power be much larger at a relatively large frequency spacing (e.g., MHz). In such conditions, the blocking distortion plays a major role in detuning resonators. In view of this, the first three blocking distortion cancelled topologies (configuration 1–3) in are Table IV that require large center-tap impedance at most suited for adaptive receivers. This can be understood by in these configconsidering the cancelation condition at urations (center tap impedance much larger than the varactor impedance at baseband), which is relatively easy to fulfill at large tone-spacing. This is in contrast to the configuration that makes use of the complementary solution (center tap impedance ), which much smaller than the varactor impedance at becomes difficult to fulfill when the frequency spacing becomes very large. On the other hand, when considering the transmitter situation, the transmit signal is normally the strongest signal, while other jammer interferers are most likely much lower in power. Therefore, in this case, the most troublesome detuning issue comes from the compression distortion. In view of this, the compression cancelled topology in Table IV is best suited for transmitter applications. Through the comparison in Table IV with cancelled topologies [12]–[14], the previously published it is found that this (highlighted) topology cancels not only the compression and blocking distortion, but also the intermodulation distortion. This property suggests that this topology is

also advantageous in terms of much smaller intermodulation distortion. In addition, this topology is also potentially useful for modern systems that simultaneously transmit signals in multiple bands. In these circumstances, the signals in the different frequency bands may be regarded by each other as jammers, and therefore the blocking distortion becomes also important for transmitters. VII. EXPERIMENTAL RESULTS To evaluate the capacitance variation of the varactor due to the presence of RF signals, an active load–pull system [19], [20] is used and the simplified schematic is shown in Fig. 11. In this test, the source impedance and load impedance are fixed at 50 . The capacitance of the varactor can be accurately extracted through the measured reflection coefficient under different RF excitations. Considering the fact that the varactor under test shares the voltage node with the in Fig. 11), the output power on load impedance (i.e., the 50- load impedance is used to monitor the RF voltage across the varactor. As discussed in Section VI, the highlighted varactor configuration in Table IV cancels all of the important distortions, and therefore is chosen as the representative for the compression and blocking distortion cancelled topology. The varactor sample is implemented within Skyworks Solutions Inc.’s GaAs technology [see schematic and microphotograph in Fig. 12(a)] and previously showed a successful cancellation of intermodulation distortion [21]. In this paper, the measurement focus will be on the capacitance variation due to compression and blocking distortions. As a counterpart for comparison, a single diode [see Fig. 12(b)] is implemented on the same wafer and experimentally tested as well. The implemented varactor

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Fig. 11. Measurement setup used to evaluate the capacitance variation of the varactor due to the compression and blocking distortion.

Fig. 13. Measured and simulated capacitance variation versus output RF power for the single diode and third-order compression distortion cancelled topology. V. For the simulation, an ideal exponential DC reverse control voltage – relationship is used. pF for the single diode and pF for the third-order compression distortion cancelled topology. V .

Fig. 12. (a) Microphotograph and schematic of third-order compression/blocking/intermodulation distortion cancelled varactor circuit. (b) Microphotograph and schematic of a single diode.

diodes all have exponential – relationship with the tuning range of 9:1 over a reverse control voltage range from 0 to 15 V [21]. A. Cancellation of Compression Distortion To test the capacitance variation due to compression distortion, the single-tone RF power at 2 GHz is applied to the schematic in Fig. 11. With the use of a single-tone signal, the blocking distortion due to a jammer signal is absent, and therefore the compression distortion can be solely evaluated. Fig. 13 plots the measured and simulated capacitance variation in percentage with respect to the low-power condition average output power 2 dBm as a function of output power. It shows that the compression distortion cancelled topology outperforms the single diode to a large degree. For the single diode, the measurement data match the simulation results quite well, while the measured capacitance variation of the compression distortion cancelled topology are typically less than 0.1%, a level close to the measurement limitation of the characterization system and sufficient for many RF applications such as high- tunable resonators.

Fig. 14. Measured and simulated capacitance variation at (1.999 GHz) with respect to the low-power condition versus the output RF power at (2 GHz) for the single diode and third-order blocking distortion cancelled topology. Under is turned off and the output the low-power condition, the jammer signal at power at is kept as 2 dBm. DC reverse control voltage equals to 5 V. For the relationship is used. pF for the simulation, ideal exponential – pF for the third-order blocking distortion cancelled single diode and V . topology.

B. Cancellation of Blocking Distortion For the test of capacitance variation due to blocking distortion, a two-tone RF signal is used for the schematic shown in is set to a relatively Fig. 11. In this test, the tone power at below level, and therefore the blocking jammer signal at comes the main contributor to the capacitance variation at . Fig. 14 plots the measured and simulated capacitance variation with respect to the low-power condition as a function of at the output power at . It suggests that the measured capacitance variation of the blocking distortion cancelled topology is

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ACKNOWLEDGMENT The authors acknowledge Skyworks Solutions Inc., Newbury Park, CA, for processing the varactor samples. The authors would like to thank S.-J. Park, J. Kim, and C. Zuo, all with Qualcomm Inc., San Diego, CA, for valuable discussions. The authors further acknowledge Anteverta Microwave, Delft, The Netherlands, for measurement support. REFERENCES

Fig. 15. Measured and simulated capacitance variation at (1.999 GHz) with respect to the low-power condition versus reverse control voltage for the single diode and third-order blocking distortion cancelled topology. In this test, the output RF power at 2 GHz is kept as 20 dBm. Under the low-power condiis turned off and the power available from the tion, the jammer signal at measource at is 2 dBm. Note that the simulation is based on the fitted – deviates from the exponential relation at 12.5 V. surement data and the – pF for the single diode and pF for the third-order blocking distortion cancelled topology.

100 times better than that of the single diode at the large output power levels. In Fig. 15, the capacitance variation at is plotted versus the reverse control voltage with the jammer output power fixed as 20 dBm. It indicates that the blocking distortion at cancelled topology provides a capacitance variation less than operating range. Under 0.5% for the whole exponential – such RF excitation, the blocking distortion cancelled topology offers a larger effective tuning range ( 6.5 1 over the control voltage range of 0.8–11 V) associated with much smaller capacitance variation than that of the single diode, a property attractive for many RF applications.

VIII. CONCLUSIONS For the first time, the fundamental mechanisms that induce capacitance variation of semiconductor varactors under large RF excitation have been investigated. Both compression and blocking distortion may play a role in changing the capacitance. Based on this information, various varactor configurations have been proposed to cancel the third-order compression and blocking distortion. For the experimental verification, the varactor configuration that cancels all of the important distortions has been selected and implemented within Skyworks Solutions Inc.’s GaAs technology. The measurements provide experimental evidence for the predicted cancellation of the compression and blocking distortion, yielding a measured capacitance variation in the order of 0.1 0.5 under large RF excitation. This result is 100 times better than that of the conventional single diode, and therefore very attractive for the RF applications such as high- tunable resonators. Future RF adaptive circuitry using these proposed devices will suffer less from detuning issues, making semiconductor-based varactor an appropriate choice for many large-signal RF applications.

[1] L. Dussopt and G. M. Rebeiz, “Intermodulation distortion and power handling in RF MEMS switches, varactors and tunable filters,” IEEE Trans. Microw. Theory Techn., vol. 51, no. 4, pp. 1247–1256, Apr. 2003. [2] D. Girbau, N. Otegi, L. Pradell, and A. Lazaro, “Study of intermodulation in RF MEMS variable capacitors,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 3, pp. 1120–1130, Mar. 2006. [3] Y. Lu, L. P. B. Katehi, and D. Peroulis, “High-power MEMS varactor and impedance tuners for millimeter-wave applications,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 11, pp. 3672–3678, Nov. 2005. [4] D. Girbau, N. Otegi, L. Pradell, and A. Lazaro, “Generation of third and higher-order intermodulation products in MEMS capacitors, and their effects,” in Proc. 35th Eur. Microw. Conf., Oct. 2005, pp. 593–596. [5] M. Innocent, P. Wambacq, S. Donnay, H. A. C. Tilmans, W. Sansen, and H. De Man, “An analytic volterra-series-based model for a MEMS variable capacitor,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 22, no. 2, pp. 131–241, Feb. 2003. [6] B. Razavi, RF Microelectronics. Upper Saddle River, NJ: PrenticeHall, 1998, ch. 2. [7] P. Wambacq and W. M. Sansen, Distortion Analysis of Analog Integrated Circuit. Norwell, MA: Kluwer, 1998. [8] X. Liu, L. P. B. Katehi, W. J. Chappell, and D. Peroulis, “Power handling of electrostatic MEMS evanescent-mode (EVA) tunable bandpass filters,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 2, pp. 270–283, Feb. 2012. [9] J. S. Fu, X. A. Zhu, J. D. Phillips, and A. Mortazawi, “Improving linearity of ferroelectric-based microwave tunable circuits,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 2, pp. 354–360, Feb. 2007. [10] J. S. Fu, X. A. Zhu, D. Y. Chen, J. D. Phillips, and A. Mortazawi, “A linearity improvement technique for thin-film barium strontium titanate capacitors,” in IEEE MTT-S Int. Microw. Symp. Dig., San Francisco, CA, Jun. 2006, pp. 560–563. [11] R. G. Meyer and M. L. Stephens, “Distortion in variable-capacitance diodes,” IEEE J. Solid-State Circuits, vol. SC-10, no. 2, pp. 47–55, Feb. 1975. [12] K. Buisman, L. C. N. de Vreede, L. E. Larson, M. Spirito, A. Akhnoukh, T. L. M. Scholtes, and L. K. Nanver, “Distortion free varactor diode topologies for RF adaptivity,” in IEEE MTT-S Int. Microw. Symp. Dig., Long Beach, CA, Jun. 2005, pp. 157–160. [13] C. Huang, L. C. N. de Vreede, F. Sarubbi, M. Popadić, K. Buisman, J. Qureshi, M. Marchetti, A. Akhnoukh, T. L. M. Scholtes, L. E. Larson, and L. K. Nanver, “Enabling low-distortion varactors for adaptive transmitters,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 5, pp. 1149–1163, May 2008. [14] C. Huang, K. Buisman, M. Marchetti, L. K. Nanver, F. Sarubbi, M. Popadić, T. L. M. Scholtes, H. Schellevis, L. E. Larson, and L. C. N. de Vreede, “Ultra linear low-loss varactor diode configurations for adaptive RF systems,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 1, pp. 205–215, Jan. 2009. [15] W. C. E. Neo, Y. Lin, X. D. Liu, L. C. N. de Vreede, L. E. Larson, M. Spirito, M. J. Pelk, K. Buisman, A. Akhnoukh, A. de Graauw, and L. K. Nanver, “Adaptive multi-band multi-mode power amplifier using integrated varactor-based tunable matching networks,” IEEE J. SolidState Circuits, vol. 41, no. 9, pp. 2166–2176, Sep. 2006. [16] K. Buisman, L. C. N. de Vreede, L. E. Larson, M. Spirito, A. Akhnoukh, Y. Lin, X. D. Liu, and L. K. Nanver, “A monolithic low-distortion low-loss silicon-on-glass varactor-tuned filter with optimized biasing,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 1, pp. 58–60, Jan. 2007. [17] J. H. Qureshi, S. Kim, K. Buisman, C. Huang, M. J. Pelk, A. Akhnoukh, L. E. Larson, L. K. Nanver, and L. C. N. de Vreede, “A low-loss compact linear varactor based phase-shifter,” in IEEE Radio Freq. Integr. Circuits (RFIC) Symp., Honolulu, HI, Jun. 2007, pp. 453–456. [18] K. Buisman, C. Huang, P. J. Zampardi, and L. C. N. de Vreede, “RF power insensitive varactors,” IEEE Microw. Wireless Compon. Lett., vol. 22, no. 8, pp. 418–420, Aug. 2012.

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[19] M. Spirito, M. J. Pelk, F. van Rijs, S. J. C. H. Theeuwen, D. Hartskeerl, and L. C. N. de Vreede, “Active harmonic load–pull for on-wafer out-of-band device linearity optimization,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 12, pp. 4225–4236, Dec. 2006. [20] M. Marchetti, M. J. Pelk, K. Buisman, W. C. Edmund, M. Spirito, and L. C. N. de Vreede, “Active harmonic load–pull with realistic wideband communication signals,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 12, pp. 2979–2988, Dec. 2008. [21] C. Huang, P. J. Zampardi, K. Buisman, C. Cismaru, M. Sun, K. Stevens, J. Fu, M. Marchetti, and L. C. N. de Vreede, “A GaAs junction varactor with a continuously tunable range of 9:1 and an of 57 dBm,” IEEE Electron Device Lett., vol. 31, no. 2, pp. 108–110, Feb. 2010.

Cong Huang (S’07–M’12) was born in Shanghai, China, in 1980. He received the B.S. degree in microelectronics from Fudan University, Shanghai, China, in 2002, the M.Sc. degree (with honors) in microelectronics from the Delft University of Technology, Delft, The Netherlands, in 2005, the M.Sc. degree in microelectronics from Fudan University, in 2005, and the Ph.D. degree from the Delft University of Technology, in 2010. He is currently, he a Postdoctoral Researcher/Assistant Professor with the Delft University of Technology. In 2001, he joined the State Key Laboratory of ASIC and System, Fudan University, where he developed piezoelectric-material-based cantilevers for microelectromechanical systems (MEMS) applications. In 2003, he joined the Laboratory of High Frequency Technology and Components (HiTeC), Delft University of Technology, where he developed low phase-noise voltage-controlled oscillators for RF applications. Since 2006, he has been with the Electronics Research Laboratory (ELCA), Delft University of Technology, where he is involved with high-performance varactors for RF adaptivity and the development of RF integrated circuits (RFICs) for next-generation wireless systems. Dr. Huang was the recipient of the 2010 Else Kooi Prize (Dutch best Ph.D. thesis in microelectronics). In 2011, he was recognized for academic excellence and received a VENI Grant from the Dutch Scientific Foundation (NWO).

Koen Buisman (S’05–M’09) received the M.Sc. and Ph.D. degrees in microelectronics from the Delft University of Technology, Delft, The Netherlands, in 2004 and 2011, respectively. He is currently a Postdoctoral Researcher with the Delft University of Technology. Since 2004, he has been with the Delft Institute of Microsystems and Nanoelectronics (DIMES), Delft University of Technology, where he was involved in the development of a pulsed dc and RF measurement system, an active harmonic load–pull system and the development of a custom in-house DIMES technology for high performance “distortion-free” varactors. From March 2009 to February 2010, he contributed to the development of extremely shallow junctions for EUV photodiodes. He has authored or coauthored over 30 refereed journal and conference papers. His research interests are varactors for RF adaptivity, nonlinear device characterization, and technology optimization for wireless systems.

Peter J. Zampardi (S’93–M’96–SM’02) received the B.E. degree in engineering physics from the Stevens Institute of Technology, Hoboken, NJ, in 1986, the M.S. degree in applied physics from the California Institute of Technology, Pasadena, in 1988, and the Ph.D. degree from the University of California at Los Angeles (UCLA), in 1997. While with the California Institute of Technology, he studied molecular-beam epitaxy (MBE)-grown GaAs/AlGaAs structures and investigated tellurium clustering in ZnSe:Te for use in visible light emitters. In 1988, he joined the Ring Laser Gyroscope Test Laboratory Rockwell Science Center, where he was responsible for development and testing of ring laser gyros for use in inertial measurement units. In 1990, he joined the Optics Technology Department, Rockwell Science Center, where he developed

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processes and procedures for the characterization and fabrication of infrared (IR) etalon filters. In 1991, he joined the High Speed Circuits Department, Rockwell Science Center, where he performed device and circuit development, characterization, and modeling of GaAs, InP, and SiGe HBTs, and MESFET, HEMT, BiFET, and RTD technologies. In 1999, he led the technical development of SiGe RF models for the Analog and Mixed Signal Foundry business of IBM, Burlington, VT. Since 2000, he has been with Skyworks Solutions Inc., Newbury Park, CA, where he is Technical Director for Device Design, Modeling, and Characterization. The group’s interests are technologies, characterization, modeling, and circuit design for wireless applications. He has authored or coauthored over 170 papers related to circuits and devices and two book chapters. He holds six U.S. patents. Dr. Zampardi actively participates in several IEEE technical conference committees.

Lawrence E. Larson (S’82–M’86–SM’90–F’00) received the B.S. degree in electrical engineering from Cornell University, Ithaca, NY, and the Ph.D. degree from the University of California at Los Angeles (UCLA). From 1980 to 1996, he was with Hughes Research Laboratories, Malibu, CA, where he directed the development of high-frequency microelectronics in GaAs, InP, Si/SiGe, and MEMS technologies. In 1996, he joined the faculty of the University of California at San Diego (UCSD), La Jolla, where he was the inaugural Holder of the Communications Industry Chair. From 2001 to 2006, he was Director of the Center for Wireless Communications, UCSD. From 2007 to 2011, he was chair of the Department of Electrical and Computer Engineering, UCSD. In 2011, he joined Brown University, Providence, RI, where he is Founding Dean of the School of Engineering. During the academic year from 2000 to 2001, he was on leave at IBM Research, San Diego, CA. During the academic year from 2004 to 2005 , he was a Visiting Professor with the Delft University of Technology, Delft, The Netherlands. He has authored or coauthored over 300 papers. He coauthored three books. He holds 40 U.S. patents. Dr. Larson was the recipient of the 1994 Hughes Sector Patent Award for his work on RF MEMS. He was a corecipient of the 1996 Lawrence A. Hyland Patent Award of Hughes Electronics for his work on low-noise millimeter-wave high electron-mobility transistors (HEMTs) and the 1999 IBM Microelectronics Excellence Award for his work on Si/SiGe HBT technology.

Leo C. N. de Vreede (M’01–SM’04) was born in Delft, The Netherlands, in 1965. He received the B.S. degree (cum laude) in electrical engineering from The Hague Polytechnic, The Hague, The Netherlands, in 1988, and the Ph.D. degree (cum laude) from the Delft University of Technology, Delft, The Netherlands, in 1996. In 1988, he joined the Laboratory of Telecommunication and Remote Sensing Technology, Department of Electrical Engineering, Delft University of Technology. From 1988 to 1990, he was involved in the characterization and physical modeling of ceramic multilayer capacitors (CMCs). From 1990 to 1996, he was involved with the modeling and design aspects of high-frequency (HF) silicon integrated circuits (ICs) for wideband communication systems. In 1996, he became an Assistant Professor with the Delft University of Technology, where he is involved with the nonlinear distortion behavior of bipolar transistors with the Delft Institute of Microsystems and Nanoelectronics (DIMES). In Winter 1998–1999, he was a guest with the High Speed Device Group, University of San Diego, San Diego, CA. In 1999, he became an Associate Professor responsible for the Microwave Components Group, Delft University of Technology, where, since that time, he has been involved with RF solutions for improved linearity and RF performance at the device, circuit, and system levels. He is cofounder/advisor of Anteverta-mw. He has coauthored over 80 IEEE refereed conference and journal papers. He holds several patents. His current interest includes RF measurement systems, technology optimization, and circuit concepts for wireless systems. Dr. de Vreede was a corecipient of the 2008 IEEE Microwave Prize. He was mentor of the Else Kooi Prize awarded Ph.D. work in 2010 and a mentor of the Dow Energy Dissertation Prize awarded Ph.D. work in 2011.

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High-Quality-Factor Active Capacitors for Millimeter-Wave Applications Aliakbar Ghadiri, Member, IEEE, and Kambiz Moez, Member, IEEE

Abstract—This paper presents single-ended and differential configurations of active capacitors that exhibit high-quality ( ) factor at millimeter-wave frequencies. Both structures provide a small tunable negative resistance that can be exploited to compensate for the loss of other components, such as inductors in millimeterwave integrated circuits. Unlike passive capacitors, which exhibit increasing capacitance with frequency (due to the inductive parasitic), the proposed active capacitors display relatively frequencyindependent values. Fabricated in 0.13- m IBM CMOS, tunable values of more than 20 are obtained at 60 GHz. A 40-GHz bandpass filter is designed and fabricated using the single-ended active capacitor cells in a 0.13- m IBM CMOS process exhibiting 0-dB insertion loss.

Fig. 1. Equivalent circuit for a MIM capacitor.

Index Terms—Active capacitance, active filter, millimeter wave, phase shifter.

I. INTRODUCTION

B

ANDWIDTH scarcity at low-gigahertz frequencies and increasing demand for broadband wireless communication have led to growing development of new wireless devices in the millimeter-wave frequencies, notably 60-GHz wireless personal area network (WPAN) and 77-GHz automotive radar systems [1]–[3]. The low-cost highly-integrated CMOS is rapidly becoming the technology of choice for design and implementation of these millimeter-wave integrated circuits as aggressive scaling of the technology produces transistors with cutoff frequencies well over 100 GHz [4]. However unlike transistors, passive devices, such as on-chip inductors and capacitors, do not benefit from inherent area and performance improvement of scaled technology nodes [4], [5]. While one of the main challenges of low-gigahertz RF integrated circuit (RFIC) design is the poor quality of the on-chip inductors, millimeter-wave inductors exhibit desirable quality ( ) factors of 15 or more in this frequency band [6], [7]. Despite improvement in the factor of the on-chip inductors with increasing frequencies, the on-chip capacitors exhibit decreasing factors with increased frequency as the ratio of capacitive impedance to series resistors of the top and bottom plates (denoted as and , the equivalent circuit model of a metal–insulator–metal (MIM)

Manuscript received April 04, 2012; revised September 03, 2012; accepted September 07, 2012. Date of publication November 12, 2012; date of current version December 13, 2012. This work was supported in part by the Natural Sciences and Engineering Research Council (NSERC) of Canada. The authors are with the Electrical and Computer Engineering Department, University of Alberta, Edmonton, AB, Canada 26G 2V4 (e-mail: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2221475

Fig. 2. Simulated capacitance and values for an 120-fF MIM capacitor as a function of frequency in 0.13- m IBM CMOS process and 65-nm TSMC CMOS technology.

capacitor in Fig. 1) is decreasing. For example, as shown in Fig. 2, the factor of a 120-fF MIM capacitor is reduced from 13.5 to 3.5 if implemented in the 0.13- m IBM CMOS process, and from 22 to 3.8 if implemented in 65-nm TSMC CMOS technology as frequency increases from 30 to 100 GHz. Moreover, as shown in Fig. 2, the capacitor value deviates from its nominal value and increases with frequency. At the frequency of 100 GHz, the capacitance value increases about 19.5% and 96% in 0.13- m and 65-nm CMOS, respectively. This capacitance deviation is mainly because of the series parasitic inand ), as disductors of the top and bottom plates ( is the parasitic capacitance of played in Fig. 1. In Fig. 1, , the bottom layer to the underlying metal layer, and are the parasitic resistance and capacitance from substrate, respectively. The low- factor and frequency dependence of the on-chip capacitors significantly degrades the performance of millimeter-wave integrated circuits. In addition to passive MIM structures, on-chip capacitors can be constructed using transistors. Active capacitors typically exhibit high- factors and tunable characteristics. Several structures and utilizations of active capacitance have been reported in performance improvement of active filters [8]–[12]. All of

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Fig. 3. Proposed SAC. (a) Circuit schematic. (b) High-frequency equivalent circuit. (c) Simplified equivalent circuit.

these reported active capacitors were implemented using discrete components where an RLC load was added at the drain of a transistor to provide the active capacitance along with the desired negative resistance looking into the transistor’s gate. As shown in [8]–[12], this structure exhibits the negative resistance in a limited frequency band. Moreover, the capacitance value changes dramatically at the frequency band where the resistance is negative. In this paper, we present new active capacitance structures exhibiting high- factors at the millimeter-wave frequency range. As explained in Section II, these structures can be designed to provide a negative or nearly zero parasitic resistance from dc up to the desired frequency. This negative resistance can also be exploited to compensate for the loss of other circuit elements such as inductors. As an application of the proposed active capacitors, Section III presents the design of a 40-GHz two-pole bandpass filter with no insertion loss.

Fig. 4. Simulated: (a) capacitance and values of proposed SAC as a function V and 65-nm TSMC of frequency in 0.13- m IBM CMOS process V . (b) values of proposed SAC for different CMOS technology in 65-nm TSMC CMOS technology. control voltages

II. ACTIVE CAPACITANCE CONFIGURATIONS The imaginary and real parts of

A. Single-Ended Active Capacitance (SAC) The RC-degenerated common-source configuration can act as a SAC, as shown in Fig. 3(a). It is a simple area-efficient structure since it consists of only one transistor, one capacitor, and two resistors. Using the six-element transistor model , the high-frequency equivalent circuit is illustrated in Fig. 3(b), where is the equivalent interconnect inductance between the transistor and source capacitor and resistor. As shown in Fig. 3(c), the input impedance is expressed as (1) in which

is the Laplace complex frequency, and

is (2a) (2b) (2c) (2d)

are written as (3a) (3b)

where

and

are (4a) (4b) (4c) (4d)

Fig. 4(a) illustrates the simulation results for the capacitance values of a 120-fF SAC as a function of frequency in and 0.13- m IBM and 65-nm TSMC CMOS technologies. The factor is measured as where is the series resistance of the capacitor. As shown in Fig. 4(a), high- values of more than 600 can be obtained in 65-nm TSMC CMOS technology. The minimum- value is also more than 22, which is at least five times larger than that of the passive MIM capacitor in 65-nm TSMC CMOS technology. High- values of more than 500 are obtained in the 0.13- m IBM CMOS process, while the value is 61 at 60 GHz, ten times larger than that of the samevalue passive MIM capacitor. The minimum- value for SAC

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is 6.0 at 100 GHz, nearly two times larger than that of the passive MIM capacitor in the 0.13- m IBM CMOS process. Unlike the passive MIM capacitor values that considerably change with frequency (96% at the frequency band of 30–100 GHz in 65-nm TSMC CMOS technology), the proposed active capacitor values deviate only 4% and 4.5% from its nominal value (120 fF) in 0.13- m and 65-nm CMOS, respectively. To reduce the capacitance variation, in layout design, we position the components so that the parasitic interconnect inductance is minimized. Therefore, ignoring , the imaginary and real parts of the input impedance are simplified to

(5a)

Fig. 5. Schematic of modified cross-coupled structure as a DAC with: (a) current sources and (b) resistors to reduce the substrate parasitics.

(5b) B. Differential Active Capacitance and . The proposed SAC where exhibits negative resistance from dc up to a maximum frequency , which is expressed as

(6)

After this frequency, the series resistance turns to positive values, which are still several times lower than that of a MIM capacitor. The maximum occurs when the series resistance becomes zero. Low- values at frequencies below the maximum- frequency [see Fig. 4(a)] are only the result of the mathematical calculation of , while the proposed SAC can actually provide high- values at these frequencies because of its negative resistance. Fig. 4(b) shows the tunability of the turning frequency (maximum ) with the SAC’s supply voltage in 65-nm TSMC CMOS technology. By changing , we are able to shift the maximum- frequency to frequencies above our desired band to benefit from the negative resistance available in our proposed SAC structure. This negative resistance can be exploited to compensate for the loss of other circuit components such as inductors. The total input capacitance is mainly determined by the gate–source capacitance of the transistor as the series capacitor is chosen to be several times larger than . The power consumptions of the proposed SAC are only 1.5 and 0.9 mW for the 0.13- m IBM CMOS process and 65-nm TSMC CMOS technology, respectively. To generate highactive capacitance at frequencies more than 100 GHz, newer CMOS technologies, such as 65-nm CMOS, are needed, which provide transistors with high cutoff frequency . To create large capacitance values on the order of hundreds of femtofarad, we can easily put several small SAC cells in parallel without losing the factor or decreasing the self-resonance frequency.

The conventional cross-coupled configuration has been extensively used in the design of many voltage-controlled oscillators (VCOs) because of its negative resistance behavior, which provides the oscillation condition [13]–[16]. However, its parasitic capacitance has been undesired and limits the tuning range of the VCO. In this study, we propose to use this configuration as a differential active capacitor (DAC), which can be utilized in design of many millimeter-wave circuits. Fig. 5(a) shows the proposed modified circuit consisting of nMOS and pMOS cross-coupled transistors. The current sources can be realized with transistors or resistors ( and ), as displayed in Fig. 5(b). These resistors (current sources) along with body resistors are used to increase the input resistance seen at each floating input node of DAC and to reduce the effect of the substrate capacitive and resistive parasitics. Therefore, the nMOS transistors used in the proposed DAC circuit should be constructed in isolated -wells, available in many CMOS processes such as the 0.13- m IBM CMOS process. RF nMOS transistors in 65-nm TSMC CMOS technology are also built in deep -well to allow connecting the transistor’s body through a resistor to the ground. Similar to SAC, this structure exhibits negative resistance that can be exploited to compensate for the loss of other circuit elements. The equivalent capacitance and resistance can be approximated as (7a) (7b) Fig. 6 illustrates the simulation results for the capacitance and values of a 120-fF DAC as a function of frequency in the 0.13- m IBM CMOS process and 65-nm TSMC CMOS technology. For 65-nm TSMC CMOS technology, the maximum is more than 1000 and the minimum is higher than 25 at 100 GHz, while for the 0.13- m IBM CMOS process, the maximum is more than 30 and the minimum is higher than 6 at 100 GHz. This is because of higher of transistors

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TABLE I COMPARISON OF SHUNT PARASITIC CAPACITANCES FOR MIM CAPACITOR AND PROPOSED DAC AT 60 GHz

Fig. 6. Simulated capacitance and values for the proposed DAC as a function V and 65-nm of frequency in the 0.13- m IBM CMOS process V . TSMC CMOS technology

Fig. 7.

-parameter equivalent circuit for proposed DAC.

in 65-nm CMOS compared to that of 0.13- m CMOS. Interestingly, for 65-nm TSMC CMOS technology, the capacitance value is constant over the entire frequency band of 30–100 GHz with less than 0.8% variations. In the 0.13- m IBM CMOS process, the capacitance value varies from 123 fF at 30 GHz to 148 fF at 100 GHz, about 20% variations. Variation of the capacitance with frequency introduces nonlinearity to the frequency response of broadband RF circuits. Similar to SAC, the maximum- frequency is tunable with the gate voltage of the transistors used as current sources. Thus, we are able to shift the maximum- frequency to frequencies above our desired band to benefit from the negative resistance available in the proposed DAC structure. As the proposed structure is a differential (floating) active capacitor, it is important to evaluate its shunt parasitics to the substrate. Fig. 7 shows the simplified equivalent circuit ( -parameters) applicable to both the MIM capacitor and DAC. Table I compares the simulated shunt parasitic capacitance of the MIM capacitor with that of the proposed DAC designed in both the 0.13- m IBM CMOS process and 65-nm TSMC CMOS technology. The shunt parasitic capacitance is 10% of the nominal value while our proposed DAC exhibits parasitic capacitance about 10.5% and 17% of the nominal value in 0.13- m and 65-nm CMOS, respectively. The deviated MIM-capacitor values of 126 and 147 fF (from 120 fF) in 0.13- m and 65-nm CMOS are because of the series inductive parasitic, as mentioned in Section I. The power consumptions of the proposed DAC in 0.13- m and 65-nm CMOS are 260 and 120 W, respectively. C. Experimental Results The proposed SAC and DAC are implemented in a 0.13- m IBM CMOS process. Fig. 8(a) and (b) displays the die photographs of the fabricated SAC and DAC with areas of 270 m 180 m and 350 m 270 m, respectively.

Fig. 8. Die photographs of the fabricated: (a) SAC and (b) DAC in the 0.13- m IBM CMOS process.

Excluding the RF and dc pads, the areas of the SAC and DAC are only 72 m 40 m and 165 m 100 m, respectively. Since the input RF pads add some parasitics to the measured characteristics of the capacitors, the parasitic influence of the RF pads on SAC/DAC’s characteristics must be de-embedded. The characteristics of both SAC and DAC are measured up to 65 GHz using an on-wafer measurement setup and reported after de-embedding the loading effect of the RF pads. Fig. 9(a) displays the measured capacitance values of the fabricated 120-fF SAC as functions of frequency for different values of the control voltage, [circuit schematic of Fig. 3(a)]. While the capacitance value is almost independent of the control voltage, it only varies 6.4 around 120 fF in a broad frequency band of 12-64 GHz verifying the constant-capacitance property of the proposed SAC. Fig. 10(b) shows the measured factor of SAC for different values of the control voltage, . As shown, while high- values of more than 100 are obtained, the maximumfrequency is shifted to high frequencies as increases. This proves the high- property of the proposed SAC for millimeterwave applications, whereas the passive MIM capacitors fails to

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Fig. 9. Measured: (a) capacitance and (b) . of control voltage

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 12, DECEMBER 2012

values of SAC for different values

provide values of more than 7 at 60 GHz in the 0.13- m IBM CMOS process, as shown in Fig. 1. Since the DAC is a floating capacitor, a floating (not grounded) configuration of RF probes is needed to measure the DAC’s capacitance. However, the available RF probes are configured as ground–signal–ground (GSG) probes. To measure the floating capacitance value of the DAC, the circuit schematic of Fig. 8 is used where the -parameters are measured to find the value of (floating capacitance). The GSG configuration of the probes is useful to measure the undesired parallel parasitics of the proposed DAC ( and ). is measured along with to find the values of parallel parasitic elements such as , , , and . The circuit supply is set to 1.0 V, while the gate voltage of the transistors used as current sources, or equivalently, the value of current sources [ in the circuit schematic of Fig. 5(a)] is changed. Fig. 10(a) displays the measured capacitance values of the fabricated 64-fF DAC for different values of . While the capacitance value is almost independent of the control voltage, it varies 12 around 64 fF at a broad frequency band of 12–48 GHz. Fig. 10(b) illustrates the measured factor of the DAC for different values of the control voltage . As shown, the curve changes with [or in Fig. 5(a)] so that highvalues of more than 30 is obtained at 40 GHz when is set to 0.5 V. There is a peak on the curve because the DAC’s

Fig. 10. Measured: (a) capacitance and (b) . values of control voltage

values of DAC for different

series resistance becomes zero while it is negative before the maximum- frequency. This negative resistance can be exploited to compensate for the loss of other components such as inductors in millimeter-wave RF circuits. The measured value of the parasitic capacitance is about 16 fF, 20% of the nominal value. To evaluate the efficiency of the proposed active capacitance structure, we use SAC in design of a capacitor-dominant RF circuit—bandpass filter. In Section III, we present the design details and simulation and experimental results for this circuit. III. 40-GHz BANDPASS FILTER Filters are the essential building blocks of wireless communication systems. At low frequencies (e.g., less than 10 GHz), the LC-filter’s insertion loss is mainly determined by the lowfactor of the inductors. This historically has triggered extensive efforts to improve the factor of on-chip inductors [17]–[19]. Active filters have also been used in some RF applications as the employed active devices provide loss compensation for the inductors [20]–[22]. For instance, in [22], a negative resistance structure is used to compensate for the resistive loss, while the filter passband is tuned using an additional varactor. However, the factor of inductors tends to increase with frequency while that of the capacitors decreases with increasing frequency. Thus, for millimeter-wave filters, the insertion loss is now limited by

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Fig. 11. Circuit schematic of two-pole bandpass filter with: (a) MIM capacitors and (b) proposed SAC cells in the 0.13- m IBM CMOS process.

the factor of the capacitors. We propose to use high- active capacitors in the structure of millimeter-wave filters to reduce the insertion loss.

Fig. 12. Simulated -parameters of post-layout extraction for a filter with MIM capacitors, as well as a filter with SAC cells in the 0.13- m IBM CMOS process V .

A. Filter Design As shown in Fig. 11, we design a two-pole bandpass filter for the frequency band of 38–47 GHz, using passive MIM capacitors and the proposed SAC in the 0.13- m IBM CMOS process. In the first design [see Fig. 11(a)], all capacitors are passive MIM capacitors, while in the second design [see Fig. 11(b)], two SAC cells are connected in parallel with the passive inductors to tune the resonance frequency of the resonator or to adjust the passband of the filter. The required average negative resistance across the filter passband is about 3.5 . By controlling , we are able to keep the average negative resistance at about 3.0 across the filter passband. As shown, the dc bias for SAC cells is provided using shunt inductors of the filter. Therefore, there is no need for the use of a low- MIM capacitor to isolate the dc bias circuitry of the SAC from the rest of the circuit. The resonance frequency is

Fig. 13.

curves of the SAC filter for different values of voltage supply.

(8) is the resonator capacitance. To prove the efficiency where of the proposed high- active capacitor in reduction of the insertion loss of the filter, we implemented both circuits of Fig. 11 in the 0.13- m IBM CMOS process. Fig. 12 shows the simulation results of the post-layout extraction for both filters. Filter with SAC cells has a 3-dB band of 38–47 GHz with insertion loss of nearly 0 dB, while for the filter with MIM capacitors, the insertion loss is more than 7.0 dB. The value is also less than 22 dB at the passband for the filter with SAC cells, while for the filter with MIM capacitors, is 15 dB. curves for different values of the SAC’s Fig. 13 illustrates voltage supply . As shown in this figure and also explained in Section II, the maximum- frequency can be shifted to the frequencies above our desired band to benefit from the negative resistance available in our proposed SAC structure. Therefore, insertion-loss values about 0 dB can be obtained when we increase to 1.05 V. Fig. 14 displays the simulated two-tone (37 and 37.25 GHz) distortion for the active filter. The input-refereed 1-dB compression point and third-order intercept point are 1.4 and 7.3 dBm, respectively.

Fig. 14. Simulated two-tone (37 and 37.25 GHz) distortion for active filter, input refereed 1-dB compression point, and third-order intermodulation intercept point (IIP3) are 1.4 and 7.3 dBm, respectively.

As shown in Fig. 15, the simulated noise figure (NF) of the filter with SAC cells is 4.9–7.3 dB across the passband, while for the filter with MIM capacitors, it varies from 6.9 to 10.0 dB across the passband. The reason for the improved NF of the active filter compared to its passive counterpart is the lower insertion loss (about 7.0 dB) of the active filter compared to the passive filter. Since the SAC circuit exhibits negative resistance, it is necessary to investigate the possibility of any instability in the

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Fig. 15. NF of filter with MIM capacitor and SAC filter, stability factor of SAC V . filter

Fig. 17. Experimental results for fabricated passive and active filters. (a) -paV for active filter. rameters. (b) Insertion phase shift,

Fig. 16. Die photographs of the fabricated 40-GHz: (a) passive filter (b) active filter in the 0.13- m IBM CMOS process.

operation of the circuit. Fig. 15 also depicts the simulated stability -factor of the SAC filter, which is more than 1.0 across the passband. Therefore, there is no chance for any oscillation at the passband. The power consumption of the filter with SAC cells is only 3.2 mW. B. Experimental Results To compare the performance characteristics of the proposed active filter with its passive counterpart, we implement both circuits in the 0.13- m IBM CMOS process. Fig. 16(a) and (b) shows the die photographs of the fabricated passive and active filters. The area of the active filter is 390 m 360 m, about

38% more than that of the passive filter 350 m 290 m . This added area is mainly because of two added dc probes and partially due to the active capacitor cells. Fig. 17(a) illustrates the measured -parameters from 25 to 55 GHz for both active and passive filters. The 3-dB passband of the active filter is 36.4–42.4 GHz. While the insertion loss of the passive filter is 6.8 dB, the active filter exhibits the insertion loss of 0.1 dB, an improvement of 6.7 dB over its passive counterpart. In the passband, the minimum value of the input and output reflection coefficients ( and ) for the active filter are 10.0 and 11.0 dB less than those of the passive filter, respectively. Fig. 17(b) shows the measured insertion phase of both active and passive filters. The passive filter exhibits better linear phase response (constant group delay) compared to that of its active counterpart across the passband of 36.5–42.5 GHz. Fig. 18 displays the measured values of for different values of the active filter’s supply voltage, . Positive values (amplification) are obtained for V, but it may cause instability in the operation of the active filter. As active capacitor produces negative resistance as well, it is necessary to investigate the possibility of any instability in the operation of the active filter. Fig. 19 displays the stability -factor for different values of . At V, the -factor is greater than one verifying a stable operation, but as increases, the -factor drops V. Our proposed active exhibiting instability at filter with active capacitors provides zero insertion loss with an

GHADIRI AND MOEZ: HIGH- -FACTOR ACTIVE CAPACITORS FOR MILLIMETER-WAVE APPLICATIONS

Fig. 18. Measured values of . voltage,

Fig. 19. Stability

for different values of active filter’s supply

-factor for different values of the supply voltage,

.

improved noise performance, negligible added chip area, and low power consumption (about 3.2 mW) and nonlinearity. IV. CONCLUSIONS New single-ended and differential configurations of an active capacitor exhibiting a high- factor at millimeter-wave frequencies range have been presented in this paper. Both configurations provide a frequency-independent capacitance along with a small tunable negative resistance. The small negative resistance can be exploited for the loss compensation of other passive components in an RF circuit. Fabricated in 0.13- m IBM CMOS, tunable values of more than 20 are obtained at 60 GHz. A 40-GHz filter is implemented using the proposed SAC configuration in the 0.13- m IBM CMOS process exhibiting an insertion loss of 0 dB. REFERENCES [1] E. Cohen, C. G. Jakobson, S. Ravid, and D. Ritter, “A bidirectional TX/RX four-element phased array at 60 GHz with RF-IF conversion block in 90-nm CMOS process,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 5, pp. 1438–1446, May 2010.

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[2] L. Lianming, P. Reynaert, and M. S. J. Steyaert, “A 60-GHz CMOS VCO using capacitance-splitting and gate–drain impedance-balancing techniques,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 2, pp. 406–413, Feb. 2011. [3] J. Lee, Y.-A Li, M.-H. Hung, and S.-J. Huang, “A fully-integrated 77-GHz FMCW radar transceiver in 65-nm CMOS technology,” IEEE J. Solid-State Circuits, vol. 45, no. 12, pp. 2746–2756, Dec. 2010. [4] E. Seok, D. Shim, C. Mao, R. Han, S. Sankaran, C. Cao, W. Knap, and K. O. Kenneth, “Progress and challenges towards terahertz CMOS integrated circuits,” IEEE J. Solid-State Circuits, vol. 45, no. 8, pp. 1554–1564, Aug. 2010. [5] K. Lee, I. Nam, I. Kwon, J. Gil, K. Han, S. Park, and B.-I. Seo, “The impact of semiconductor technology scaling on CMOS RF and digital circuits for wireless applications,” IEEE Trans. Electron Devices, vol. 52, no. 7, pp. 1415–1422, Jul. 2005. [6] J. Brinkhoff, K. Koh, K. Kang, and F. Lin, “Scalable transmission line and inductor models for CMOS millimeter-wave design,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 12, pp. 2954–2962, Dec. 2008. [7] C. Doan, S. Emami, A. Niknejad, and R. Brodersen, “Millimeter-wave CMOS design,” IEEE J. Solid-State Circuits, vol. 40, no. 1, pp. 144–155, Jan. 2005. [8] J.-R. Lee, Y.-H. Chun, and S.-W. Yun, “A novel bandpass filter using active capacitance,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2003, pp. 1747–1750. [9] Y.-H. Chun, J.-R. Lee, S.-W. Yun, and J.-K. Rhee, “Design of an RF low-noise bandpass filter using active capacitance circuit,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 2, pp. 687–695, Feb. 2005. [10] S.-J. Cho, Y.-H. Cho, H.-I. Back, and S.-W. Yun, “Analysis of an active capacitance circuit and its application to VCO,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2006, pp. 1749–1800. [11] K.-T. Park, Y.-H. Cho, and S.-W. Yun, “Low voltage tunable narrow bandpass filter using cross-coupled stepped-impedance resonator with active capacitance circuit,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2009, pp. 1049–1052. [12] M. R. Lababidi, J. Lintignat, D. L. H. Tong, J. Y. Naour, J. L. Robert, A. Louzir, B. Barelaud, and B. Jarry, “Tunable semi-lumped dual response filter using active capacitor circuit for multistandard systems,” in Proc. 40th Eur. Microw. Conf., Sep. 2010, pp. 838–841. [13] Y. Chen and K. Mouthaan, “Wideband varactorless LC-VCO using a tunable negative-inductance cell,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 57, no. 10, pp. 2609–2618, Oct. 2010. [14] C. Cao and K. O. Kenneth, “Millimeter-wave voltage-controlled oscillators in 0.13- m CMOS technology,” IEEE J. Solid-State Circuits, vol. 41, no. 6, pp. 1297–1304, Jun. 2006. [15] X. Wang and B. Bakkaloglu, “Systematic design of supply regulated LC-tank voltage-controlled oscillators,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 55, no. 8, pp. 1834–1844, Aug. 2008. [16] J. L. Gonzalez, F. Badets, B. Martineau, and D. Belot, “A 56-GHz LC-tank VCO with 17% tuning range in 65-nm bulk CMOS for wireless HDMI,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 5, pp. 1359–1366, May 2010. [17] J. N. Burghartz and B. Rejaei, “On the design of RF spiral inductors on silicon,” IEEE Trans. Electron Devices, vol. 50, no. 3, pp. 718–729, Mar. 2003. [18] T. Ito, K. Okadaand, and K. Masu, “Characterization of on-chip multiport inductors for small-area RF circuits,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 56, no. 87, pp. 1590–1597, Jul. 2009. [19] W.-Z. Chen, W.-H. Chen, and K.-C. Hsu, “Three-dimensional fully symmetric inductors, transformer, and balun in CMOS technology,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 54, no. 7, pp. 1413–1423, Jul. 2007. [20] L. Meng-Lin, W. Hsien-Shun, and C.-K. C. Tzuang, “1.58-GHz thirdorder CMOS active bandpass filter with improved passband flatness,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 9, pp. 2275–2284, Sep. 2011. [21] R. F. Wiser, M. Zargari, D. K. Su, and B. A. Wooley, “A 5-GHz wireless LAN transmitter with integrated tunable high- RF filter,” IEEE J. Solid-State Circuits, vol. 44, no. 8, pp. 2114–2125, Aug. 2009. [22] U. Karacaoglu and I. D. Robertson, “MMIC active bandpass filters using varactor-tuned negative resistance elements,” IEEE Trans. Microw. Theory Techn., vol. 43, no. 12, pp. 2926–2932, Dec. 1995.

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Aliakbar Ghadiri (S’10–M’11) received the B.Sc. and M.Sc. degrees in electronics engineering from the Iran University of Science and Technology (IUST), Tehran, Iran, in 1998, and 2001, respectively, and the Ph.D. degree in electrical engineering from the University of Alberta, Edmonton, AB, Canada, in 2011. From 2000 to 2001, he was a Design Engineer with the Kerman Tablo Company, Tehran, Iran, where he was involved with the design of single- and threephase digital power meters and testers. From 2002 to 2007, he was a Lecturer with the Behshahr branch, Iran University of Science and Technology. His research interests include the design of RF building blocks for ultra-wideband and millimeter-wave applications. His focus area of research is active-based implementation of passive devices for RF applications.

Kambiz Moez (S’01–M’07) received the B.Sc. degree in electrical engineering from the University of Tehran, Tehran, Iran, in 1999, and the M.ASc. and Ph.D. degrees from the University of Waterloo, Waterloo, ON, Canada, in 2001 and 2006, respectively. Since January 2007, he has been with the Department of Electrical and Computer Engineering, University of Alberta, Edmonton, AB, Canada, as an Assistant Professor. His current research interests include the analysis and design of RF CMOS integrated circuits and systems for a variety of applications including wired/wireless communications, biomedical imagining, instrumentations, and automotive radars.

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 12, DECEMBER 2012

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Variable Reflection-Type Attenuators Based on Varactor Diodes Senad Bulja, Member, IEEE, and Andrei Grebennikov, Senior Member, IEEE

Abstract—In this paper, variable reflection-type attenuators based on varactor diodes are introduced and described in detail. Their main components are 3-dB couplers, varactor diodes, and lumped elements. Initially, a simple varactor-based reflective load is introduced and its advantages and disadvantages in the circuit of reflectiontype attenuators are discussed. Based on this, improvements and refinements to the simple varactor-based reflection-type attenuator are then discussed and a novel circuit of the varactor-based reflection load is proposed. This circuit offers high attenuation and controllable insertion losses. It is also shown that the intermodulation (IM) performance of the novel varactor-based reflection-type attenuator is controllable and that the reduction of insertion losses leads to an improvement of IM performance. As an experimental verification, varactor-based reflection-type attenuators operating at a center frequency of 2.5 GHz are fabricated and measured. It is shown in one reflection-type attenuator realization that insertion losses as low as 1.1 dB with a minimum third-order intercept point of 25.2 dBm are achievable, while in the second realization a dynamic range of over 36 dB is shown to be practically achievable. The results are discussed. Index Terms—Intermodulation (IM), p-i-n diode, reflection-type attenuator, third-order intercept (IP3) point, varactor diode.

I. INTRODUCTION

V

ARIABLE control devices play an important role in modern communication systems. Examples of such devices-variable phase shifters, couplers, and attenuators are essential in the RF front end of a typical transceiver chain. The control signal usually takes the form of either voltage or current, depending on the characteristics of the active device used. Variable attenuators are widely used in radar systems, point-to-point radio, smart antennas, and RF signal cancellation. The choice of the attenuator for a particular application is influenced by many factors, such as the dynamic range, the insertion/return losses, power consumption, linearity, and power-handling capability. Depending on the circuit configuration, attenuators can be clustered into two broad groups: transmission-type attenuators and reflection-type attenuators. Transmission-type attenuators operate on the principle of attenuating the RF signal in the direct path, i.e., from input

Manuscript received June 26, 2012; revised August 03, 2012; accepted August 07, 2012. Date of publication September 28, 2012; date of current version December 13, 2012. The authors are with Bell Labs Ireland, Dublin 15, Ireland (e-mail: senad. [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2216895

to output, while reflection-type attenuators usually employ a hybrid coupler whose coupled ports are terminated in variable resistance devices. Regardless of the attenuator type, for lower power-handling capabilities and lower costs, the variation of attenuation is usually achieved using either p-i-n diodes or some kind of field-effect transistors (FETs). The potential application of p-i-n diodes as an electrically variable resistance at microwave frequencies was first recognized in [1], and it was followed by a classical treatise on the theory of diode switching, elaborated in [2]. This has paved the way to the introduction of a silicon p-i-n diode-based transmission type attenuator in [3], consisting of a p-i-n diodes loaded strip line. This configuration achieved attenuations up to 80 dB with insertion losses up to 4 dB. A similar p-i-n diode-based attenuator in [4] operating between 8–12 GHz achieved attenuations up to 28 dB with insertion losses lower than 2 dB. Further refinements to p-i-n diode-based attenuators are reported in [5], where two conventional p-i-n diode tee sections are cascaded in order to obtain high attenuations and low insertion phase shift. The progress and research into p-i-n diode-based attenuators was continued in the 1980s and 1990s; however, with an emphasis placed on low insertion phase [6], [7], [8], the use of gallium–arsenide (GaAs)-based p-i-n diodes [9] as a replacement to silicon and the use of unpowered or “cold” GaAs FETs [10]. Refinements to the cold FET as a variable resistance element were reported in [11] and [12], while in [13] a novel transmission-type attenuator achieved an attenuation level of about 15 dB with an average 0.25 /dB phase shift between 2.5–5.3 GHz. The poor return-loss performance of the attenuator in [13] was further improved in [14] by using it in the circuit of the reflection-type attenuator. The use of GaAs HBT technology as an alternative to GaAs FET-based technology was reported in [15], where a transmission-type attenuator achieved an insertion loss of 3.7 dB and attenuation up to 45 dB. The 2000s have witnessed both a continued interest in p-i-n diode-based attenuators [16], [17], [18] and the growing demand for integration. In particular, the advances in CMOS technology are used as the basis for the development of RF attenuators [19], [20], [21], while the intermodulation (IM) behavior of CMOS-based attenuators was studied in [22]. In this paper, varactor-based reflection-type attenuators are analyzed and described in detail [23]. Here, the control of attenuation is achieved by a variation of the dc-bias voltage with a negligible dc current consumption, providing for an extremely low noise operation. Additionally, provisions are made in the circuit of the reflection load for control of insertion losses and IM performance without affecting the high attenuation performance of the attenuator. Section II describes the theory and

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Fig. 1. Schematic of varactor diode-based attenuator (bias circuit excluded for brevity).

Fig. 2. Schematic of improved reflection load (bias circuit excluded for brevity).

analysis of the proposed varactor-based attenuators, while in Section III, the measured results of varactor-based attenuators operating in the frequency range of 2.3–2.7 GHz are presented and discussed. II. THEORY AND ANALYSIS The circuit of the simplest varactor-based reflection-type attenuator is presented in Fig. 1. It consists of a varactor diode and a termination resistor in the circuit of each reflection load. At low dc-bias voltages (low varactor reactance), the impedance of the reflection load is small and the majority of the RF power is reflected toward the output port. This constitutes a low attenuation region of the attenuator, and the amount of attenuation in this case is highly dependent on the parasitic resistance of the varactor diode. Usually, this loss needs to be as low as possible. At high dc-bias voltages, the reactance of the varactor is high, and hence, the impedance of the reflection load is dominated by the termination resistor. If the value of this resistor is such that it is equal to the characteristic impedance of the interconnecting lines of the 3-dB coupler, most of the incident RF power is absorbed and dissipated in this termination resistor. This situation constitutes a high attenuation region, which needs to be as high as possible. The simple attenuator circuit of Fig. 1 has many drawbacks. First, the dynamic range of attenuation is limited to 10–15 dB, due to the fact that the perfect short and termination resistance cannot be achieved with this simple circuit. Second, insertion losses (attenuation at low dc-bias voltages) are dictated by the parasitic resistance of the varactor, and third, the IM performance of this attenuator is poor due to the fact that the low insertion-loss region occurs at low bias voltages, which coincides with high capacitance variations. These issues are partially solved by modifying the circuit of the reflection load, shown in Fig. 2. In this figure, and represent the variable capacitance of the varactor, inductance of the series inductor, and capacitance of the shunt capacitor, respectively, while and are the parasitic resistances of the varactor, series inductor, and shunt capacitor, respectively. Resistor is the equivalent of the termination resistor of Fig. 1. The principle of operation of the circuit is as follows. The value of the inductor, ,

Fig. 3. Schematic of further improved reflection load (bias circuit excluded for brevity).

is chosen, first of all, so as it exhibits a series resonance with the varactor diode at high dc-bias voltages. At low dc-bias voltages, the shunt capacitor (and hence, its parasitics presented by ) and resistor are determined so that the impedance of the reflection load is purely real and equal to the characteristic impedance of the interconnecting line of the 3-dB coupler, i.e., . This circuit addresses the first and third drawbacks associated with the attenuator of Fig. 1, i.e., a small dynamic range and poor IM performance. For example, the dynamic range is increased because the reflection load presented to the coupler in the high attenuation region is made to be equal to its characteristic impedance, usually 50 , while the IM performance is improved by the requirement that the high attenuation region lies in the low dc-bias region, which coincides with high capacitance variation, and hence, results in improved IM performance. However, the second drawback—the dependence of the insertion loss on the parasitic characteristics of the varactor diode and the lumped elements—still remains unanswered. This problem is further addressed by the reflection circuit of Fig. 3. This circuit is similar to the circuit of Fig. 2; however, an impedance transformer is added to the circuit of the reflection load. The principle of operation of this circuit is similar to the one of Fig. 2; however, there is one important difference. Rather than imposing the requirement that the parasitic resistances of the varactor diode and lumped elements are small, the circuit of Fig. 3 assumes that these parasitic resistances are

BULJA AND GREBENNIKOV: VARIABLE REFLECTION-TYPE ATTENUATORS BASED ON VARACTOR DIODES

Fig. 5. Variation of reflection coefficients ( . teristic impedance

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and

) versus charac-

Fig. 4. Reflective load: (a) without impedance transformer and (b) with impedance transformer.

with a condition that unavoidable and used together with termination resistor to create a highly reflective load. In order to understand the underlying principle for the creation of the highly reflective load, it must be remembered that RF power is fully reflected from the reflective load provided that or for any value of . By imposing that the circuit of Fig. 2 yields low values of , a lower limit is very quickly reached; this is dictated by the parasitic resistances of the varactor diode and lumped elements. On the other hand, requiring also imposes certain constraints as to how the perfect open circuit can be realized, but the conditions are, generally, more relaxed than the one needed for a perfect short. One way of achieving a high value of is by the use of a quarter-wave impedance transformer; however, one needs to assess the conditions needed for improved insertion-loss performance of the open circuit. With reference to Fig. 4, let refer to the equivalent parasitic resistance of the reflective load, which determines the insertion loss of the reflective attenuator without the impedance transformer. Its reflection coefficient, , is given by (1) where represents the terminating impedance of the 3-dB coupler. Similarly, let represent the reflection coefficient of the equivalent parasitic resistance connected to the coupler through a quarter-wave impedance transformer with characteristic impedance of (2) In order for the near open circuit to provide lower insertion losses than its near short-circuit counterpart, the following must hold: . Solving this equation for the characteristic impedance, , one obtains the values of the characteristic impedance of the quarter-wave transformer that satisfy this requirement or

(3)

(4) The condition given by (4) is always achieved in practice. Since the resistance of is typically of the order of a few ohms, the first solution, , must be discarded, as a quarter-wave transformer with a characteristic impedance of will be prohibitively wide. As such, the second solution, , remains as the only physically acceptable result. In the light of (3), it can be stated that the insertion losses of the reflection attenuator with an impedance transformer will be lower than its counterpart without the transformer provided that the characteristic impedance of the transformer is greater than the terminating impedance of the 3-dB coupler, . As an example, Fig. 5 is a graphical depiction of (1) and (2) for the case when and , while is varied from 1 to 100 . As predicted by (3), the reflection coefficient, , is greater that its short-circuit reflection coefficient counterpart in two regions. The first region is defined for the case when , i.e., and the second region is for the case when , i.e., . In a practical design, the second region should be selected since, in that case, the width of the microstrip line is not excessively wide as it would be for the case when is selected. Next, the design rules for the proposed reflection attenuator are presented. First, the value of the series inductor is selected. For improved IM performance, this is done so that the series resonance with the varactor diode is obtained at high dc-bias voltages since capacitance variations of the varactor diode are less pronounced at high dc-bias voltages than that at its low dc-bias voltage counterparts. Secondly, the values of and need to be determined next. This is done so that, at low bias voltages, the input impedance of the reflective load is equal to a predetermined value, i.e., (5) In (5), represents the impedance presented to the 3-dB coupler and is as shown in Fig. 3. For total RF signal absorption, needs to be purely real and equal to the terminating impedance of the 3-dB coupler, . However, since the quarter-

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wave impedance transformer is frequency selective, the selection of results in complete RF signal absorption being achieved only at a narrow band of frequencies. As such, for a more broadband operation, the value of need not be selected so that , but it can be chosen in such a way so that it is either greater or smaller than and that it may contain a certain small reactive value. For example, can be set as , where the predefined perturbations, and , are obtained as the solution to (5) where the unknowns are and . This will ensure that the magnitude of the reflection coefficient at low bias voltages, , remains low over an extended band of frequencies. The condition for RF signal attenuation presented in (5) contains the characteristic impedance of the quarter-wave transformer as a parameter. More specifically, depending on the desired attenuation characterized by , the values of and are determined. The values of do not directly influence the attenuation, but as indicated in (3), play a major role in the reduction of insertion losses. Therefore, the selection of the value for directly determines the insertion-loss performance. In line with (3), for improved loss performance, needs to be greater than ; however, due to physical constraints, such as line width, it cannot attain an arbitrary value. Nevertheless, it will be shown that by using a quarter-wave impedance transformer with a moderate characteristic impedance of , insertion loss is significantly reduced compared to the insertion loss achieved without a transformer. The narrowband performance of the proposed attenuator can be further improved by a careful choice of the impedance transformer. If, instead of the quarter-wave transformer discussed earlier, a tapered microstrip line is used, total RF signal absorption (5) at low dc-bias voltages will be maintained over a wide range of frequencies. In particular, by optimizing and in (5) to yield and ensuring that the length of the tapered transmission line is at least one half-wavelength long [24], a broadband high-attenuation region is achieved. However, at high dc-bias voltages, is low and dominated by the series resonance between the varactor and the inductor . In this case, the input impedance of the reflective load formed in this way attains a high value, ultimately resulting in the low attenuation operation over a wide frequency range. As a demonstration of the presented principles, a broadband attenuator is designed and fabricated and its performance is measured. III. RESULTS Based on the theory and analysis presented in Section II, four different attenuators are built. The first attenuator is a simple varactor-based attenuator of Fig. 1, the second two consist of the novel reflection loads of Fig. 3, but with different quarterwavelength impedance transformer ratios, while the fourth attenuator incorporates a tapered transmission line for broadband performance. A commercially available dielectric material, RO4350B from the Rogers Corporation,1 is used for the fabrication of 1[Online].

Available: http://www.rogerscorp.com

Fig. 6. Impedance variation of MHV-500 varactor diode at 2.5 GHz with different package styles, CS-19 and CS-25.

the circuits of Fig. 1, while the novel reflection-type attenuators were built on a Rogers material, RT/Duroid 6010LM. The RO4350B material has the following characteristics, m and , and RT/Duroid 6010LM m and . As a 3-dB coupler, a quadrature surface mount hybrid coupler from Anaren,2 1P603S, is used for both type of attenuators. This device operates across the frequency range from 2.3 to 2.7 GHz with a maximum insertion loss of 0.3 dB. The varactor diode is a hyper-abrupt diode from Aeroflex-Metellics,3 with part number MHV-500. Two different case styles of this diode were used. In particular, the novel reflection load is fabricated using a varactor diode with longer pins (case style CS-25) due to the fact that the long pins give rise to a lead inductance that can be used to partially realize the inductor . On the other hand, a varactor diode attenuator of Fig. 1 uses a varactor diode with shorter pins (case style CS-19) with very low lead inductances due to the fact that the attenuator of Fig. 1 assumes that the active device is a variable capacitor with a negligible inductance. According to the manufacturer’s data sheet, the capacitance of the varactor die varies from pF to pF with a negligible parasitic resistance. The impedance of the varactor diodes with two different case styles is measured at 2.5 GHz and is presented in Fig. 6. As evident from this figure, the reactance of the varactor with case style CS-25 exhibits an inductive behavior due to its longer pins. This inductive behavior is more pronounced at low bias voltages when the capacitance of the diode is high. The parasitic resistances of both case styles are similar, i.e., they exhibit maximum values of around 3 . As a next step, the attenuator of Fig. 1 is fabricated and a short pin varactor diode (CS-19) is used in the circuit of its reflection loads (see Fig. 7). The -parameters of the attenuator are measured for different settings of the dc-bias voltage, which was supplied through a wideband bias tee. The return and insertion losses of the attenuator, measured at dc-bias voltages of 0, 2.9, 5.1, 7.9, 10.1, and 20 V are presented in Figs. 8 and 9. As expected, the return loss of Fig. 8 shows a good impedance-matched characteristic at all dc-bias voltages due to the property of hybrid couplers with balanced (similar) loads. The insertion loss of Fig. 9 displays a variation in attenuation 2[Online].

Available: http://www.anaren.com

3[Online].

Available: http://www.aeroflex.com/metelics

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Fig. 10. Simulated reflection coefficient of load with low characteristic impedance transformer attenuator versus dc-bias voltages at: (a) 2, (b) 2.5, (c) 4, (d) 5, (e) 7, and (f) 18 V. Fig. 7. Photograph of attenuator of Fig. 1.

Fig. 8. Measured return loss of attenuator of Fig. 1 at: (a) 0, (b) 2.9, (c) 5.1, (d) 7.9, (e) 10.1, and (f) 20 V.

Fig. 9. Measured insertion loss of attenuator of Fig. 1 at: (a) 0, (b) 2.9, (c) 5.1, (d) 7.9, (e) 10.1, and (f) 20 V.

due to the mechanisms discussed earlier. In particular, in the frequency range dictated by the operational range of the 3-dB coupler (2.3–2.7 GHz) attenuations up to 20 dB are obtained, while the insertion loss varies between 1.7–2 dB. In general, as discussed in earlier sections, insertion loss increases as the

dc-bias voltage increases. The dynamic range of this attenuator varies across the indicated frequency range between 14 dB at 2.7 GHz to 18 dB at 2.3 GHz. Next, three novel attenuators described by the reflection load of Fig. 3 are designed. In particular, two attenuators with different quarter-wave impedance transformer ratios and one with a tapered (broadband) impedance transformer are designed. Of the two attenuators with quarter-wave transformers, one has a characteristic impedance of (hereafter referred to as the low-impedance transformer) while the second has a characteristic impedance of (hereafter referred to as the high-impedance transformer). The third attenuator consists of a tapered microstrip-line transformer needed to transform , which varies from 75 to 82 in the frequency range of 2.3–2.7 GHz to approximately 50 . Initially, for all transformer-based attenuators, the value of the inductor, , is chosen to be nH so that it resonates in series with the varactor diode at high dc-bias voltages between 11–18 V. Next, for the quarter-wave-based attenuators, the values of capacitor and resistor are determined using appropriate settings of parameters in (5). More specifically, is set so that and to be equal to 46 in one attenuator realization and 58 in the second attenuator realization. Based on these parameters, (5) yields the values for resistor and capacitor . In particular, and pF for the low-impedance transformer and and pF for the high-impedance transformer. The simulated reflection coefficients of the reflective loads of Fig. 3, which incorporate the above found values of the lumped elements with the low and high quarter-wave impedance transformers, are given in Figs. 10 and 11. As evident, increasing the dc-bias voltage leads to the variation of the impedance presented to the 3-dB coupler. In particular, the reflection coefficients show a well-matched impedance at low dc-bias voltages, which are then gradually transformed, by increasing the dc-bias voltage, to a high-impedance region on the right-hand side of the Smith chart. The measured performances of these two attenuators are presented in Figs. 12–15,

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Fig. 11. Simulated reflection coefficient of load with high characteristic impedance transformer attenuator versus dc-bias voltages at: (a) 1.2, (b) 1.8, (c) 3, (d) 5, (e) 7, and (f) 11 V.

Fig. 12. Measured return loss of low characteristic impedance transformer attenuator versus dc-bias voltages at: (a) 2, (b) 2.5, (c) 4, (d) 5, (e) 7, and (f) 18 V.

Fig. 14. Measured return loss of high characteristic impedance transformer attenuator versus dc-bias voltages at: (a) 1.2, (b) 1.8, (c) 3, (d) 5, (e) 7, and (f) 11 V.

Fig. 15. Measured insertion loss of high characteristic impedance transformer attenuator versus dc-bias voltages at: (a) 1.2, (b) 1.8, (c) 3, (d) 5, (e) 7, and (f) 11 V.

Fig. 13. Measured insertion loss of low characteristic impedance transformer attenuator versus dc-bias voltages at: (a) 2, (b) 2.5, (c) 4, (d) 5, (e) 7, and (f) 18 V. Fig. 16. Photograph of high characteristic impedance transformer attenuator.

while a photograph of the high characteristic impedance transformer attenuator is shown in Fig. 16. It is important to note that the dc bias applied to the varactor diodes is not linear since the junction capacitance of the depletion region of the varactor diode is an exponential function,

leading to a nonlinear capacitance variation against the supplied dc voltage. With reference to Figs. 12–15, it is clear that the dynamic range of the two attenuators is increased when compared

BULJA AND GREBENNIKOV: VARIABLE REFLECTION-TYPE ATTENUATORS BASED ON VARACTOR DIODES

to the attenuator of Fig. 1. In particular, the low characteristic impedance-transformer attenuator offers a minimum dynamic range of 22 dB, while the high characteristic impedance-transformer attenuator exhibits a minimum dynamic range of 17 dB in the frequency range of 2.3–2.7 GHz. Further, it is interesting to note that curve ( ) of Fig. 12 representing the return loss of the low characteristic impedance transformer falls below 10 dB at some frequencies. From the theory of coupled lines, this infers that the impedance characteristics of the varactor diodes are dissimilar at high dc-bias voltages in this case. Further, it is noteworthy to examine the dips in the transmission coefficients evident from Figs. 13 and 15 at low dc-bias voltages. These dips are a direct consequence of the requirement that in (5). This is also evident from the Smith chart plots of the reflective load impedance versus the bias voltage (Figs. 10 and 11) and can be avoided in three ways. One way is to provide a high-value resistor in shunt with the reflective load. This will reduce the factor of the reflective load with little influence on the insertion loss performance. The second way of overcoming this issue is to solve (5) with a terminal impedance presented to the 3-dB coupler being different from . Instead, it may be possible to introduce small perturbations to this value, i.e., and then solve (5) for and as a function of . This will ensure that the high attenuation region is maintained over a wider band of frequencies. Finally, the third way of overcoming this issue would be to resort to the use of broadband microstrip transformers. In particular, one may use a tapered microstrip line, but that may come at the expense of the increased transformer length since, for efficient impedance transformation, its length needs to be approximately a half-wavelength at the lowest frequency of operation. This option is described in more detail below. As discussed earlier in this section, the value of the inductor is set to nH for all three transformer-based attenuators, enabling the low insertion-loss operation at high dc-bias voltages. Next, the values of capacitor , resistor , and parameters of the tapered microstrip line are determined from the condition of high attenuation at low dc-bias voltages. From the theory of tapered lines [24], it follows that for improved insertion-loss performance, the impedance at low dc-bias voltages needs to be set such that using capacitor and resistor . Here, is set between 75–82 in the frequency range of 2.3–2.7 GHz by optimizing the values of capacitor and resistor using a commercially available software package ADS.4 The values for and are found to be pF and . The parameters of the tapered microstrip line are then set for broadband transformation of to 50 . The simulated reflection coefficient of the reflective load formed in this way is given in Fig. 17. From this figure, it can be seen that the operational principle of the broadband attenuator is somewhat different from its quarter-wave counterparts. To be more specific, the requirement for high attenuation at low bias voltages focuses the response of the reflective loads to be in the vicinity of the center of the Smith 4[Online].

Available: http://www.agilent.com

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Fig. 17. Simulated reflection coefficient of load with broadband impedance transformer attenuator versus dc-bias voltages at: (a) 0, (b) 0.8, (c) 1.6, (d) 3, (e) 6, (f) 8, and (g) 11.6 V.

chart for both attenuator types, however, the low insertion-loss operation of these two attenuator types is different. While the quarter-wave transformer-based attenuator relies on the reflections from the near open circuit load at low dc-bias voltages, the broadband attenuator achieves a low-loss operation by introducing reflections due to an increased reactive impedance part, in this case, capacitive. The measured performance of the broadband attenuator is presented in Figs. 18 and 19. Clearly, the dynamic range of the broadband attenuator is greatly improved compared to the other three attenuators. It has a minimum of 36 dB, while the insertion loss ranges from 1.3 to 1.9 in the frequency range of 2.3–2.7 GHz. A photograph of the broadband attenuator is given in Fig. 20, while a summary of the performances of the proposed attenuators is presented in Table I. As evident from this table, the lowest dynamic range is obtained from the varactor attenuator from Fig. 1, while the highest dynamic range is obtained from the broadband attenuator. The lowest insertion loss is achieved using the high-impedance transformer attenuator, however, it is believed that with some further tuning, the broadband transformer would be capable of delivering lower loss than that presented in Table I. Next, the IM performance of the proposed varactor diodebased attenuators is measured. For this purpose, two tones with GHz and GHz are applied to the inputs of the proposed attenuators and the levels of the generated third harmonic distortion are monitored against the applied dc-bias voltage and input RF power of the applied two tones. In particular, the IM distortion is monitored for the case when the input RF power of each tone is varied from 8 and 7 dBm. Based on these measurements, the input and output third-order intercept points are then extrapolated. A summary of the IM performance of the proposed attenuators is presented in Table II. The values of the third-order intercept (IP3) point in this table represent the lowest values achieved at the indicated dc-bias voltages. The best IM performance is obtained from the high characteristic impedance transformer attenuator, while the lowest values are recorded for the low characteristic impedance attenuator. In general, higher values of IP3 points are obtainable for higher

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TABLE I MEASURED DYNAMIC RANGE AND INSERTION LOSS PROPOSED REFLECTION-TYPE ATTENUATORS

OF

Fig. 18. Measured return loss of broadband attenuator versus dc-bias voltages at: (a) 0, (b) 0.4, (c) 0.8, (d) 1.6, (e) 3, (f) 6, and (g) 11.6 V. TABLE II MEASURED INPUT AND OUTPUT IP3 OF PROPOSED REFLECTION-TYPE ATTENUATORS

Fig. 19. Measured insertion loss of broadband attenuator versus dc-bias voltages at: (a) 0, (b) 0.4, (c) 0.8, (d) 1.6, (e) 3, (f) 6, and (g) 11.6 V.

Fig. 20. Photograph of broadband impedance transformer attenuator.

impedance ratios of , which also infers that the regions of low attenuation should be placed at higher dc-bias voltages. The IM performance can be further improved by an appropriate choice of varactor diode, i.e., by using an abrupt junction profile instead of the hyper-abrupt profile used in this study.

TABLE III PERFORMANCE COMPARISON OF DIFFERENT ATTENUATOR TECHNOLOGIES

A performance comparison of the proposed attenuator to the previously published studies in the literature is given in Table III. As evident from this table, the proposed attenuator has the smallest insertion loss of all four different attenuator technologies, while its dynamic range, power consumption, and return losses are very comparable with their respective counterparts of the other technologies. However, on the downside and as indicated by Figs. 13, 15, and 19, the measured transmission performance of the proposed attenuator does not exhibit the same level of flatness across its operating frequency range as those of its rivals. This is partly due to the narrowband characteristic of the 3-dB coupler used in this design;

BULJA AND GREBENNIKOV: VARIABLE REFLECTION-TYPE ATTENUATORS BASED ON VARACTOR DIODES

however, its main contributor lies with the terminal impedance, , presented to the 3-dB coupler. As elaborated upon earlier, the flatness of the transmission coefficient of the proposed attenuators can be improved by introducing small passive and reactive perturbations to the terminal impedance so that the variations of the transmission coefficient for different dc-bias settings are minimized. This is currently under investigation. IV. CONCLUSION Novel reflection-type attenuators have been described in detail in this paper. They consist of 3-dB hybrid couplers, varactor diodes, and lumped and distributed elements. In order to demonstrate the potential of the proposed varactor diode-based attenuators, three impedance transformer-based attenuators are designed and fabricated and their measured performances are compared to simple varactor-loaded reflectiontype attenuators. The first two attenuators use simple quarterwave impedance transformers with characteristic impedances of and , while the third attenuator uses a broadband transformer in the form of a tapered microstrip line. The attenuators are fabricated on commercially available Roger Duroid substrates, while the varactor diode used for the reflection loads is a hyper-abrupt junction profile diode from Aeroflex Metellics. The -parameter measurements revealed that the broadband attenuator offers a dynamic range of over 36 dB over the frequency range of 2.3–2.7 GHz with a minimum insertion loss of 1.3 dB. Further, the quarter-wave-based attenuator with offers insertion losses as low as 1.1 dB with a minimum dynamic range of 17 dB. The proposed attenuators also offer some modest improvements of IM performance compared to simple varactor-based attenuators. It is believed that their IM performance can be further improved by fine tuning of the lumped elements’ values, and also, the high dc-bias voltage settings. REFERENCES [1] A. Uhlir, Jr., “The potential of semiconductor diodes in high frequency communications,” Proc. IRE, vol. 46, no. 6, pp. 1099–1115, Jun. 1958. [2] R. V. Garver, “Theory of TEM diode switching,” IRE Trans. Microw. Theory Techn., vol. MTT-9, no. 5, pp. 224–238, May 1961. [3] J. K. Hunton and A. G. Ryals, “Microwave variable attenuators and modulators using PIN diodes,” IRE Trans. Microw. Theory Techn., vol. MTT-10, no. 7, pp. 262–273, Jul. 1962. [4] H. C. Okean and R. Pflieger, “Octave band MIC electronically variable attenuators using PIN diodes,” in IEEE MTT-S Int. Microw. Symp. Dig., 1971, pp. 180–181. [5] W. J. Parris, “P-I-N variable attenuator with low phase shift,” IEEE Trans. Microw. Theory Techn., vol. MTT-20, no. 6, pp. 618–620, Sep. 1972. [6] F. G. Ananasso, “A low phase shift step attenuator using p-i-n diodes switches,” IEEE Trans. Microw. Theory Techn., vol. MTT-28, no. 7, pp. 774–776, Jul. 1980. [7] J. P. Starski and B. Albinsson, “An absorptive attenuator with optimized phase response,” in Proc. Eur. Microw. Conf., Liege, Belgium, Sep. 1984, pp. 510–515. [8] D. Adler and P. Maritato, “Broadband phase invariant attenuator,” in IEEE MTT-S Int. Microw. Symp. Dig., 1988, pp. 673–676. [9] Y. Tajima, T. Tsukii, R. Mozzi, E. Tong, L. Hanes, and B. Wrona, “GaAs monolithic wideband (2–18 GHz) variable attenuators,” in IEEE MTT-S Int. Microw. Symp. Dig., 1982, pp. 479–481. [10] L. M. Devlin and B. J. Minnis, “A versatile vector modulator design for MMIC,” in IEEE MTT-S Int. Microw. Symp. Dig., 1990, pp. 519–522. [11] S. Nam, A. E. Ashtiani, C. F. Oztek-Yerli, and I. D. Robertson, “Wideband reflection type MMIC attenuator with constant phase,” Electron. Lett., vol. 34, pp. 91–93, Jan. 1998. [12] M. E. Goldfarb and A. Platzker, “A wide range analog MMIC attenuator with integral 180 phase shifter,” IEEE Trans. Microw. Theory Techn., vol. 42, no. 1, pp. 156–158, Jan. 1994.

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[13] S. Walker, “A low phase shift attenuator,” IEEE Trans. Microw. Theory Techn., vol. 42, no. 2, pp. 182–185, Feb. 1994. [14] W. Kang, I. Chang, and M. Kang, “Reflection-type low-phase-shift attenuator,” IEEE Trans. Microw. Theory Techn., vol. 46, no. 7, pp. 1019–1021, Jul. 1998. [15] K. W. Kobayashi, A. K. Oki, D. K. Umemoto, S. Claxton, and C. C. Streit, “GaAs HBT PIN diode attenuators and switches,” in IEEE Microw. Millim.-Wave Monolithic Circuits Symp. Dig., 1993, pp. 151–154. [16] B. J. Jang, “Voltage controlled PIN diode attenuator with a temperature-compensation circuit,” IEEE Microw. Wireless Compon. Lett., vol. 13, no. 1, pp. 7–9, Jan. 2003. [17] K. Sun, M. K. Choi, and D. Weide, “A pin diode controlled variable attenuator using a 0-dB branch line coupler,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 6, pp. 440–442, Jun. 2005. [18] D. S. Beyragh, H. Pahlevaninezhad, and S. R. Motahari, “A broadband low reflection electronically variable PIN diode based attenuator,” in IEEE Int. Ultra-Wideband Conf., Singapore, Nov. 2007, pp. 800–804. [19] H. Dogan, R. G. Meyer, and A. M. Niknejad, “Analysis and design of RF CMOS attenuators,” IEEE J. Solid-State Circuits, vol. 43, no. 10, pp. 2269–2283, Oct. 2008. [20] B. H. Ku and S. Hong, “6-bit CMOS digital attenuators with low phase variations for -band phased-array systems,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 7, pp. 1651–1663, Jul. 2010. [21] J. S. Paek, H. Y. Lee, and S. Hong, “Analysis and design of CMOS amplitude modulator with digitally controlled variable attenuator,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 3, pp. 727–740, Mar. 2011. [22] H. Dogan and R. G. Meyer, “Intermodulation distortion in CMOS attenuators and switches,” IEEE J. Solid-State Circuits, vol. 42, no. 3, pp. 529–539, Mar. 2007. [23] S. Bulja, “Reflection type attenuator based on varactor diode,” patent pending, filed Apr. 7, 2011. [24] R. E. Collin, Foundations for Microwave Engineering, 2nd ed. New York: McGraw-Hill, 1992. Senad Bulja (S’04–M’07) received the B.Eng. (with distinction) and Ph.D. degrees from the University of Essex, Colchester, U.K., in 2002 and 2007, respectively. From 2007 to 2010, he was a Senior Research Officer with the School of Computer Science and Electronic Engineering, University of Essex, where he was involved with the characterization of liquid crystals at microwave and millimeter-wave frequencies, and development of liquid-crystal-based millimeter-wave devices. In 2010, he joined Bell Labs, Dublin, Ireland, where he is currently a Member of Technical Staff. He authored or coauthored approximately 30 papers in international journals and conference proceedings. His research interests include variable microwave devices, microwave amplifier linearization techniques, memory effects description in RF transistors, characterization of liquid crystals at microwave and millimeter-wave frequencies, and more recently, microwave filters. Andrei Grebennikov (M’99–SM’04) received the Dipl. Ing. degree in radio electronics from the Moscow Institute of Physics and Technology, Moscow, Russia, in 1980, and the Ph.D. degree in radio engineering from the Moscow Technical University of Communications and Informatics, Moscow, Russia, in 1991. He possesses long-term academic and industrial experience working with the Moscow Technical University of Communications and Informatics, the Institute of Microelectronics, Singapore, M/A-COM, Cork, Ireland, Infineon Technologies, Munich, Germany and Linz, Austria, and Bell Labs, Alcatel-Lucent, Dublin, Ireland, as an Engineer, a Researcher, a Lecturer, and an Educator. He has lectured as a Guest Professor with the University of Linz, Linz, Austria. He has authored or coauthored over 80 papers. He has authored five books dedicated to RF and microwave circuit design. He holds 20 European and U.S. patents and patent applications. Dr. Grebennikov has presented short courses and tutorials as an invited speaker at the IEEE Microwave Theory and Techniques Society (MTT-S) International Microwave Symposiums (IMS), European and Asia–Pacific Microwave Conferences, the Institute of Microelectronics, Singapore, Motorola Design Centre, Penang, Malaysia, the Tomsk State University of Control Systems and Radioelectronics, Tomsk, Russia, and Aachen Technical University, Aachen, Germany.

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Distributed Modeling of Six-Port Transformer for Millimeter-Wave SiGe BiCMOS Circuits Design Debin Hou, Student Member, IEEE, Wei Hong, Fellow, IEEE, Wang Ling Goh, Senior Member, IEEE, Yong Zhong Xiong, Senior Member, IEEE, Muthukumaraswamy Annamalai Arasu, Jin He, Member, IEEE, Jixin Chen, Member, IEEE, and Mohammad Madihian, Fellow, IEEE

Abstract—In this paper, a six-port distributed model of on-chip single-turn transformers in silicon that can predict the features of the transformers up to 200 GHz is presented. Moreover, the proposed model is scalable with the diameter of the transformer. Based on the developed model, a transformer balun with improved differential-port balance is deployed in a -band up-conversion mixer design in 0.13- m SiGe BiCMOS technology. The mixer 7 dB and localachieves a measured conversion gain (CG) of 4 oscillator-to-RF isolation over 30 dB from 110 to 140 GHz. The results have one of the best CGs in the millimeter-wave range. A -band two-stage transformer-coupled power amplifier (PA) integrated with a mixer is also reported here. Using the six-port transformer model, the performance of the PA can be conveniently optimized. At a 2-V supply, the gain and saturated output power of 20 dB and 8 dBm, respectively, are both experimentally achieved at 127 GHz. At 3 V, the measured output power rose to 11 dBm and this is the best power performance among the reported -band silicon-based amplifiers to date. Index Terms— -band, millimeter wave (mm-wave), mixer, power amplifier (PA), SiGe BiCMOS, transformer, up-converter.

I. INTRODUCTION

T

RANSFORMERS have been widely applied in millimeter-wave (mm-wave) silicon-based circuits, such as amplifiers [1]–[4] and mixers [5], [6], for the capability of interstage impedance matching, balanced-to-unbalanced mode conversion, power combining, and dc isolation while occupying a reduced silicon area. In the mm-wave frequencies, especially

Manuscript received May 16, 2012; revised September 06, 2012; accepted September 07, 2012. Date of current version December 13, 2012. This work was supported by A*STAR under Grant 102 129 0051 and the National Basic Research Program of China (“973” Program, 2010CB327400). D. Hou is with the State Key Laboratory of Millimeter Waves, Southeast University, Nanjing 210096, China, and also with the Institute of Microelectronics, Agency for Science, Technology and Research (A*STAR), 117685 Singapore (e-mail: [email protected]). W. Hong and J. Chen are with the State Key Laboratory of Millimeter Waves, Southeast University, Nanjing 210096, China (e-mail: [email protected]; [email protected]). W. L. Goh is with the School of Electrical and Electronic Engineering, Nanyang Technological University, 639798 Singapore (e-mail: [email protected]). Y. Z. Xiong is with the MicroArray Technologies Company Ltd., Chengdu 610041, China (e-mail: [email protected]). M. A. Arasu and J. He are with the Institute of Microelectronics, Agency for Science, Technology and Research (A*STAR), 117685 Singapore (e-mail: [email protected]; [email protected]). M. Madihian is with MEDIWAVE LLC, Greenville, NC 27834 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2220563

over 60 GHz, the majority of the transformers have the properties such as single-turn coils and stacked coupling structure, whereby some of them have periodic shielding structures to reduce the conductive silicon loss and eddy-current loss [2], [4], [7]. One effective approach to model these transformers is to use -parameters extracted from the electromagnetic (EM) simulation. However, the drawback of such an approach is that EM simulation can be time consuming and the simulated -parameters may cause a divergence problem in the transient simulation of the circuits. Hence, an equivalent circuit to model the transformer is necessary. Some available equivalent mm-wave transformer models are the simplified distributed model based on even–odd-mode theorem [1] and an analytical 2- lumped model [8]. However, neither of the models can adequately predict performances of the transformer with shielding structures, and in addition, they had not considered the center-tap effect of the transformer. In [9], the center taps were considered by introducing a six-port lumped model. The model, however, has more than 30 parameters, which makes it relatively complex and it is not scalable. In this paper, a six-port distributed model considering the center-tap effect of the transformers at mm-wave frequencies is presented. The proposed model can predict a broad family of single-turn transformers from dc to 200 GHz, where all will be discussed in detail in Section II. Section III describes the transformer-based circuits design. A -band up-conversion mixer using an improved balun structure based on the proposed transformer model in 0.13- m SiGe BiCMOS technology features high conversion gain (CG) and also respectable local oscillator (LO)-to-RF isolation. A two-stage transformer-coupled power amplifier (PA) integrated with the mixer is also reported in this section. By using the proposed six-port transformer model, the performance of the amplifier is optimized, achieving superior gain and output power performance. A conclusion is presented in Section IV. II. TRANSFORMER DESIGN AND MODELING Transformers are often modeled as four-port devices without considering the center-tap terminals for dc bias. In the mm-wave frequency range, the bias path can affect the impedance of the transformer and also the balance property of the transformer balun. The consideration of the center taps using a six-port model in the transformer modeling is therefore essential [9]. Fig. 1(a) shows a six-port single-turn stacked transformer. The proposed stacked transformer is realized using the top two thick metal layers, and with periodic floating shields at the bottom metal layer. The floating shields help in reducing

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Fig. 1. Stacked transformer and its equivalent model. (a) Six-port transformer architecture. (b) Corresponding four-port coupled-line structure with half of the transformer. (c) Equivalent distributed model.

both the conductive silicon loss and eddy-current loss [2], [7]. Moreover, the shields can eliminate energy leakages to lessen the EM interference. By dividing the transformer into two parts along the symmetric line (A–A’), each part can be considered as asymmetric coupled lines in Fig. 1(b) with a length of (where is linearly proportional to the diameter of the octagonal transformer). The asymmetric coupled lines can be modeled as a four-port scalable distributed model, labeled and in Fig. 1(c). In the mutual coupling modeling of the mm-wave transformer, both the inductive coupling and capacitive coupling are to be considered. According to the investigation of the single-turn transformer in [9], the only significant mutual coupling capacitors are [between ports 1 and 6 in Fig. 1(a)], , , and . Actually, these capacitors have already been included in the four-port coupled-line model, and thus no external capacitor is needed in the six-port model. However, the mutual inductances between the two coupled lines of Fig. 1(a) had been overlooked in the four-port distributed model. We and therefore represent those using crossing components, , between port 1 and port 2, and also and , between port 3 and port 4. Here, we utilize inductors rather than mutual inductors to capture the mutual couplings. This is to simplify the process of modeling and parameter extraction, and all will be described in detail in Section III-B. In the distributed model, port 2 and port 3 in and are, respectively, connected in parallel to form the center-tap ports, i.e., 5 and 6, in the six-port transformer model. However, the proposed ideal

center-tap connection can cause underestimation of mutual couplings between the center-tap ports and the rest ports. The underestimated mutual couplings at port 5 and port 6 can be similarly modeled by the four crossing inductors, i.e., two that are, respectively, connected from port 5 to port 1 and from port 5 to port 2; and also two , each connecting port 6 to port 3 and also port 6 to port 4. According to the properties of the parallel connection of multiport networks, the proposed six-port model can be expressed using the 6 6 -matrix, , of (1), shown at the bottom of this page, where is an element in the 4 4 -matrix of the coupled-line model, and the impedances are represented as , , , and . In (1), the first term of each element is contributed by the coupled-line model elements. As for the remaining terms (if any), they are attributed to the external components that are connected via dash lines in Fig. 1(c). The model generation begins with running EM simulations on the six-port transformers of Fig. 1(a) and four-port coupled lines of Fig. 1(b) to extract the device parameters. The HFSS EM simulator with an appropriate simulation environment, which has been verified in [10], is used in this study. Having accurate measurement and multiports testing at mm-wave frequencies are extremely challenging because of dynamic range limitations of the instrument and lack of multiport testing equipment [9]. Based on EM simulation, the proposed model could predict the behavior of the transformer without needing

(1)

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TABLE I EXTRACTED VALUES OF COUPLED LINES

Fig. 2. Network model of the coupled lines [ and in Fig. 1(c)]—nodes 1’, 2’, 3’, and 4’ are the corresponding cathodes, and are usually connected to the ground.

and the measurement results. Besides, simulations can also help to reduce design cost without having to fabricate the test structures. Sections II-A–II-C describe the proposed transformer model and the method to extract the corresponding components.

(4) where is the relative permittivity of the TLINP4 model in is the wavenumber, with the relation of the mode; ; and is the speed of light in vacuum. For the mode, similar relations can be found as follows:

A. Asymmetric Coupled-Line Model

(5)

The stacked coupled lines shown in Fig. 1(b) can be characterized using a generalized model based on normal mode ( and modes) parameters [11], [12]. The proposed model is intended for asymmetric and inhomogeneous coupled lines. Each element in the 4 4 -matrix of the four-port coupled-line model can be expressed by the normal mode parameters, which are defined as follows [11]: represents the relative amplitude of the two transmission lines in the mode, and are the characteristic admittances of the top line and bottom line in the mode, respectively, and and are the propagation constants for the two modes of the coupled lines. A network model including two transmission-line sections and several ideal transformers is utilized to predict the features of the and modes shown in Fig. 2[12]. The component, TLINP4, which is a four-terminal physical transmission line in ADS, has been deployed to implement the transmission-line section to help develop an equivalent model that is compatible with both the frequency- and time-domain simulators. In the TLINP4 model, the characteristic impedance can only be real value, but the extracted characteristic impedance is usually complex. Thus, two more transformers that are serially connected to both sides of each transmission line, with a transformation ratio of , are employed to transform the real impedance to a complex value. The detailed relations of the parameters in the network model in Fig. 2 can be determined as follows [12]: For the mode, (2) where

,

, and

are all real numbers, then (3)

where

, , and

are all real numbers, then (6)

and (7) is the relative permittivity of the TLINP4 model in where the mode; is the wavenumber, with the relation of . The length of the TLINP4 model and the diameter of the octagonal transformer has the following relations: (8) The extraction of the parameters in the model shown in Fig. 2 is based on the simulated four-port -parameters of the structure shown in Fig. 1(b) and the extraction procedures described in [13], which can be summarized as follows. 1) Derive the four-port -parameters of the structure of Fig. 1(b) using EM simulation. 2) Transform the four-port -parameters to -parame, , , , , ters and extract the values of , , and by eigenvalue and eigenvector decomposition on the matrices [13]. , , , 3) Extract the values of the rest parameters , , and from (2)–(7) based on the values attained in 2). Since the parameters in the coupled-lines model shown in Fig. 2 are frequency independent [12], [13], we can obtain a constant value for each parameter at a specified frequency point . Table I shows the extracted model parameters of a sample coupled lines using the 0.13- m SiGe BiCMOS technology, where the top two metal layers (TM2 and TM1 shown in Fig. 1) of the coupled lines, with a thickness of 3 and 2 m, are separated from the bottom metal layer (M1) of 9.83 and 4.83 m,

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Fig. 3. Modeled and simulated -parameters comparison of the coupled lines shown in Fig. 1(b) with different diameters: (a) m, (b) m. (Note: parameters of the model are extracted from simulated results of coupled lines with diameter of 44 m and trace width of 8 m.) (c)

respectively. The trace width is 8 m and the diameter is 44 m. The extracted frequency is set to 100 GHz, which is the center of the frequency range. It is worth noting that the relative amplitudes are extracted to be and , which indicates that the symmetry of the structure is poor (the symmetric structure has the opposite amplitude ratios with and ) [13]. Hence, the structure cannot be suitably modeled using the even–odd mode reported in [1], which is intended for symmetric structure modeling. A noticeable advantage of the proposed distributed model in Fig. 2 is its scalability property. The characteristic impedances , the relative permittivity , and the transformation ratios depend only on the trace width rather than the length of the coupled lines. Hence, the model is scalable with length . Fig. 3 shows the comparison of the -parameters from the EM simulation and the equivalent model by varying the diameter of the transformer coil from 32 to 76 m. It is evident that the results match well from dc to 200 GHz, which means that, the proposed and modes can characterize the properties of the coupled lines well. The model also demonstrates its scalability with the length of the coupled lines [i.e., by (8)].

m, and

Fig. 4. Extracted external inductances compared with the fitting formulas.

(11) If we use the mutual inductor instead of the lossy inductor ( and ) to model the mutual admittance , the parameter extraction would be difficult for the complex relations between the mutual admittance and the mutual inductor, and this is not beneficial to modeling. Similarly, the components and between ports 3 and 4 are found to be (12)

B. Mutual Coupling Modeling The mutual couplings between the two coupled lines ( and ), which are indicated by the mutual admittances between ports 2, 3 and ports 1, 4 in the six-port model ( , , , , , , and ), are modeled by external components. For example, the mutual coupling between ports 1 and 2 of the transformer is directly modeled by the element in (1), contributed by the components and in Fig. 1(c). Even though elements and are affected by the additional term , the effect is minimum as . The parameters and can be extracted from the EM simulated six-port -parameters of the transformer [refer to Fig. 1(a)] on the following relationship: (9) Thus,

(13) Compared with the above, the mutual admittances between ports 1 and 3 and 2 and 4 are much smaller (over ten times), and they can be ignored for simplification of the model without sacrificing its accuracy. Using a similar procedure, inductors and , which are used to model the underestimated mutual inductances caused by the ideal connection of center taps, can be extracted by comparing the simulated and modeled mutual admittances. For example, by introducing between port 5 and port 1, the simulated and modeled mutual admittances have the following relations: (14)

(10)

where is the element of simulated four-port -parameters of the coupled lines in Fig. 1(b). In fact, the difference of the real

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Fig. 5. Model and EM simulation comparison of the transformer with diameter of 44 m and trace width of 8 mm for: (a) -parameters, (b) inductances, and factors of the primary and secondary, and (c) coupling factor.

parts of and the inductance

is very small and can be neglected. Thus, is expressed as

(15) Similarly,

between ports 6 and 4 is found to be (16)

All the components are extracted from the simulated results at 100 GHz, based on (10)–(16). Fig. 4 illustrates the extracted inductances of a family of transformers, all with same trace width of m, but different diameters from 32 to 76 m. It is worth noting that all the elements tend to exhibit a linear relationship to the diameter. In order for the model to be scalable with the diameter, the empirical linear equations using curve-fitting technology are utilized to predict the trend of the inductors shown in Fig. 4. A similar technology has also been used in the resistor characteristics prediction, i.e., and from (11) and (13), where a slight adjustment of the resistances has been carried out to match the simulated -factor curves. With the specified family of transformers with trace width of m and diameter range of m, the fitted linear equations of the components with the diameter are summarized as follows:

simulation results illustrated in Fig. 5. Fig. 5(a) shows the -parameters when the transformer acts as a differential configuration with the primary as input and the secondary as output. The model is able to predict the performance well from dc to 200 GHz, which is beneficial for transformer PA design. The inductances and factors are shown in Fig. 5(b). It is evident that both the inductance and self-resonant frequency are predicted accurately. The of the secondary is also predicted to be lower than the primary, which is expected since the primary is designed on the top thicker metal layer and separated by a greater distance from the lossy silicon; hence, ensuring lower loss. Fig. 5(c) shows the coupling factor between the primary and secondary. It also illustrates the good fit between the model and simulation. The model scalability with the diameter of the transformer is demonstrated in Fig. 6. Fig. 6(a) and (b) depicts the primary inductances and factors with the diameter of 32 and 76 m, respectively. The corresponding coupling factors are also given in Fig. 6(c). All the modeled curves present the same tendency with the simulations. The little difference of the factors may be a consequence of the simplification of the frequency-dependent resistors where they are set to be constants [ and in (19) and (20)]. In fact, the scalable transformer model with verified diameter range from 32 to 76 m is sufficient for the mm-wave application from 60 GHz to about 200 GHz. Further research on an improved scalable model that includes trace width variation can be explored.

(17)

C. Application in Transformer Balun

(18)

The balun structure transfers the single-ended signal to differential signals. The balance of the differential signals is important for the active circuit design. Fig. 7 presents a traditional transformer balun called balun I and an improved balun called balun II. Both baluns have a single input (port 1), differential outputs (ports 2 and 3), and dc bias at the center of differential output winding (port 4). For balun II, a capacitor is connected with port 4 in parallel to improve the balance of the differential ports. Fig. 8 shows the performance comparison of the two baluns. It is noted that balun I suffers from obvious balance problem in both the amplitude and phase in the mm-wave range, as seen in Fig. 8(a). This is caused by the capacitive coupling between the primary and secondary [14]. If a primary winding port [port 2 in

(19) (20) where the units of the inductor and resistor are pH and , respectively, and the unit of diameter is m. It is worth noting that the negative inductors and , which can be treated as negative mutual inductors, are required to cancel the redundant mutual admittance caused by the ideal connection of center taps in the model. For the six-port transformer model in Fig. 1(c), the components values can be found from (17) to (20) and the parameters of the distributed coupled-line model can be derived from Table I. The transformer model results are compared with the

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Fig. 6. Model and EM simulation comparisons of transformer with different diameters. (a) Inductance and factor of the primary with diameter of m. (c) Coupling factors with diameters of and m. (b) Inductance and factor of the primary with diameter of

m.

Fig. 7. Two types of balun structures: balun I (traditional) and balun II (improved version, with a parallel capacitor at the center tap of the secondary).

Fig. 1(a)] is connected with the ground to form a single input, the two coupling capacitors between the secondary center-tap port and the primary ports will be asymmetrical ( is connected with ground, is connected with input port), and this causes imbalance at the differential outputs. By introducing a parallel capacitor at the bias port [see balun II in Fig. 7], the secondary center tap can be forced to a virtual ground, which will dramatically improve the output balance performance. However, the insertion loss (defined by maximum available gain [1], [15]) of balun II is higher than balun I, and this is due to the lossy parallel capacitor in Fig. 8(b). The selection of the baluns therefore depends on the requirement of the circuit. It is found that all the features of the baluns can be captured by the transformer model as compared with the time-consuming EM simulation, and it is beneficial to circuit design.

Fig. 8. Performance comparison of the two baluns. (a) Phase and amplitude imbalance. (b) Insertion loss. The baluns have a diameter of 44 m and trace pF for balun II. width of 8 m, and the capacitor is

III. TRANSFORMER-BASED CIRCUITS DESIGN A. Up-Conversion Mixer Design The application of the transformer model to a -band Gilbert-cell mixer for up-conversion is presented in Fig. 9. Transistors are switching pair fed by the LO, and the pairs fed by the IF signal serve as the transconductance stages. The reason for assigning the bottom transistors as the LO port (the top transistors is used as LO port in traditional topology) is that the bottom transistors show easier impedance matching to the 50- LO port with a balun compared with

Fig. 9. Schematic of the mixer for the direct up-conversion application.

the top transistors in the -band frequencies, and this is beneficial to the CG improvement of the mixer. The circuit is fabricated in IHP 0.13- m SiGe BiCMOS technology with

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Fig. 10. Voltage and current comparisons of the LO differential inputs when dBm, balun I or II is applied to the circuit under the condition of GHz, dBm, GHz, V, and V.

Fig. 12. Measured CG of the mixer with variation of LO frequency under the V, V. dBm, dBm. condition of

Fig. 11. Microphotograph of proposed up-conversion mixer. The chip size including test pads is 550 390 m .

Fig. 13. Measured RF output power of the mixer with variation of IF power V, V. dBm, under the condition of GHz.

an of 240 GHz and an of 290 GHz. The transformer baluns discussed in Section II-C is introduced for both the single-ended and differential signal conversion at both the LO and RF ports. The matching networks are also applied in the single-ended terminals for impedance matching. The proposed transformer model is deployed for the optimization of the mixer performance via the adjustment of the balun size and the matching network, which costs much less time as compared to the EM simulation approach. Thanks to the transformer model, the transient simulation can also be applied to the mixer design. Fig. 10 shows the simulated transient waveforms at the LO differential input ports when baluns I or II are used in the circuits. It is clear that both the amplitude and phase are unequal for balun I. When balun II is used in the circuit, the balance of the differential signal is dramatically improved, which leads to better CG and LO-to-RF isolation of the mixer. The simulated CG of the mixer at 130 GHz is improved by 2.4 dB (from 6.9 to 9.3 dB), and the LO-to-RF isolation is also enhanced by over 10 dB. Fig. 11 presents a micrograph of the up-conversion mixer. The performance of the mixer was measured using on-wafer probing. For the power characteristic test, an R&S SMF 100-A signal generator connected to a -band quad-mixer extender as a signal source provides 0-dBm power at the -band to LO port (after calibration). The baseband differential input signal was provided by a signal generator with external baluns and integrated with a dc bias for transistors (2-V supply) in the IF port. A -band power meter was placed in the RF port for collecting the output signal.

In Fig. 12, the measured CG with IF frequencies of 2.5 and 5 GHz are presented. It has a measured CG of 4–7 dB at LO frequencies of between 110–140 GHz, and 6.5 dB at 130 GHz. The power performance of the mixer is demonstrated in Fig. 13. Here, the power in the upper sideband and lower sideband were summed up, using a power meter to collect the RF output power. The output 1-dB gain compression point is 3 dBm The measured LO-to-RF isolation is also measured to be over 30 dB in the -band range when the IF differential ports of the mixer were terminated with two 50- resistors. The mixer employs a 2-V dc power as and 0.9 V as bias , it consumes a power of 26 mW. Table II compares the reported silicon-based mm-wave up-conversion mixers. It can be observed that the proposed study demonstrates a higher CG and other comparable performances even at high operating frequency. This is accredited to the improved balun structures and the proposed transformer model. B. PA Design The six-port transformer model presented in Section II has also been used to design a -band PA. In order to integrate with the on-chip up-conversion mixer presented in Section III-A, the differential topology of Fig. 14 is developed. The two-stage amplifier with an up-conversion mixer was constructed using transformers (T1 and T2) for inter-stage connection and baluns for differential-to-single conversion. The cascode structure is chosen to ensure high gain performance and stability without sacrificing the output power [4]. Choosing the size of the transistors is a tradeoff between the output power and efficiency while

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Fig. 14. Schematic of the PA integrated with up-conversion mixer. TABLE II PERFORMANCE COMPARISON OF mm-WAVE UP-CONVERSION MIXERS

Fig. 15. Microphotograph of the PA with up-conversion mixer including test pads, the chip size is 740 410 m .

keeping the gain performance. The bias of the transistor is set at 0.9 V, with a power supply of 2 V, to allow the device to operate at a current condition 1.8 mA m for peak maximum oscillation frequency . A separate bias V of transistor at the last stage is to ensure better output power performance [4]. Having selected the transistors and fixed the bias conditions, the optimization of the inter-stage and output matching is adopted. Taking the output-stage matching as an example: the output transformer (Balun I in Fig. 14) need to be optimized to transform maximum output power impedance to the 50load. The diameter-scalable distributed transformer model developed in Section II proved to be helpful since it can be used to derive the geometry of the desired transformer without resorting to time-consuming EM simulations. It is worth noting that the bias line TL7 through the transformer center tap affects the impedance matching, and hence, influences the gain and output power. That is because the bias line that is terminated with a bypass capacitor acts as a parallel inductor/capacitor when seen from the center-tap port. Thus, the bias line needs to be an integral multiple of one quarter-wavelength to cause the center-tap port “open” or “short” to eliminate its effect on the transformer impedance. The proposed six-port model with the center-tap ports makes it possible for the bias-line length and the transformer size tuning for impedance-matching effect reduction, as well as amplifier performance optimization. A similar procedure is also adopted for the inter-stage transformers (T1 and T2) and bias lines (TL2–TL6) optimization. At the output port, the balun I structure is adopted for its lower insertion loss as compared to balun II, leading to a better output power even though it has a poorer differential balance. In fact,

Fig. 16. Simulated and measured -parameters of the PA when the mixer opV, V, and erates as amplifier under the condition of V. V, and V.

the bias line TL7 with proper length can partially improve the differential balance in the desired frequency. Besides, the geometry of balun I can be suitably adjusted to convert maximum output power impedance to the 50- load impedance without needing additional lossy matching components. This is beneficial for achieving higher output power. The proposed PA integrated with an up-conversion mixer has also been fabricated in IHP 0.13- m SiGe BiCMOS technology, as shown in Fig. 15. The simulated and measured -parameters for the mixer operating at the amplifier condition are both provided in Fig. 16. The amplifier is unconditionally stable and with a measured stability factor that is greater than unity in the whole frequency range. The measured results exhibit the same trend as the simulation, but with some performance deteriorations due to the underestimation of the parasitic elements of the device model at the mm-wave frequency range. The amplifier attained a wideband gain performance with a measured gain of 20 dB at 127 GHz and a 3-dB bandwidth of over 28 GHz from

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IV. CONCLUSION

Fig. 17. Measured , gain, and PAE of the PA at 127 GHz under the condiV, V V, and V V. V tion of V. and

COMPARISON OF

TABLE III -BAND AMPLIFIERS IN SILICON-BASED TECHNOLOGIES

110 to 138 GHz [the lower point is limited by the -band vector network analyzer (VNA)]. The large-signal performance of the amplifier at 127 GHz is presented in Fig. 17. At 2-V supply, the measured output power compression starts at an of 5.9 dBm and saturates at an output power of 8 dBm. At 3-V supply, the power gain rises to 25.4 dB and the measured saturated output power is 11 dBm. The power performance with variation of frequency has also been studied. From 114 to 140 GHz, the measured saturated output power attained over 6.6 dBm at 2-V supply, and 9.2 dBm at 3-V supply. Including the up-conversion mixer, the circuit draws a total current of 43 and 61 mA at 2- and 3-V supply, respectively. Under the two conditions, both the peak power-added efficiency (PAE) is measured to be 6.8%. The recently published -band on-chip amplifiers using silicon-based technology are summarized in Table III. This study has achieved a superior gain and output power with comparable bandwidth and PAE in the -band frequency range. The measured frequency conversion properties of the PA with an up-conversion mixer as a transmitter have also been studied. The CG varies from 20 to 26 dB within the LO frequency range of 110 and 140 GHz. The 25.5-dB CG at 130 GHz shows reasonable consistency with the 6.5-dB CG of the mixer reported in Section III-A and around 20-dB gain of the amplifier within 1-dB discrepancy. The of the transmitter is also measured to be 5 dBm.

This study has described a six-port distributed transformer model and its applications in an up-conversion mixer and also a PA design. The proposed model is scalable with the transformer diameter and can predict the performance of single-turn transformers up to 200 GHz. Using this model, a -band up-conversion mixer has been designed with an improved transformer balun. The mixer has the superior CG performance when compared with other mm-wave silicon-based mixers. A two-stage transformer PA with promising performance in -band has also been discussed in this paper. The developed circuits can be used in high data-rate wireless communication and for imaging applications in the mm-wave range. REFERENCES [1] D. Chowdhury, P. Reynaert, and A. Niknejad, “Design considerations for 60 GHz transformer-coupled CMOS power amplifiers,” IEEE J. Solid-State Circuits, vol. 44, no. 10, pp. 2733–2744, Oct. 2009. [2] W. L. Chan and J. R. Long, “A 58–65 GHz neutralized CMOS power amplifier with PAE above 10% at 1-V supply,” IEEE J. Solid-State Circuits, vol. 45, no. 3, pp. 554–564, Mar. 2010. [3] Z. Xu, Q. J. Gu, and M. C. F. Chang, “A three stage, fully differential 128–157 GHz CMOS amplifier with wide band matching,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 10, pp. 550–552, Oct. 2011. [4] D. Hou, Y. Z. Xiong, W. L. Goh, W. Hong, and M. Madihian, “A -band cascode amplifier with 24.3 dB gain and 7.7 dBm output power in 0.13 m SiGe BiCMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 22, no. 4, pp. 191–193, Apr. 2012. [5] C. S. Lin, P. S. Wu, H. Y. Chang, and H. Wang, “A 9–50 GHz Gilbertcell down-conversion mixer in 0.13- m CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 5, pp. 293–295, May 2006. [6] P. S. Wu, C. H. Wang, C. S. Lin, K. Y. Lin, and H. Wang, “A compact 60 GHz integrated up-converter using miniature transformer couplers with 5 dB conversion gain,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 9, pp. 641–643, Sep. 2008. [7] T. S. D. Cheung and J. R. Long, “Shielded passive devices for siliconbased monolithic microwave and millimeter-wave integrated circuits,” IEEE J. Solid-State Circuits, vol. 41, no. 5, pp. 1183–1200, May 2006. [8] B. Leite, E. Kerhervé, J. B. Bégueret, and D. Belot, “An analytical broadband model for millimeter-wave transformers in silicon technologies,” IEEE Trans. Electron Devices, vol. 59, no. 3, pp. 582–589, Mar. 2012. [9] J. Brinkhoff, D. D. Pham, K. Kang, and F. Lin, “A new six-port transformer modeling methodology applied to 10-dBm 60-GHz CMOS ask modulator designs,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 2, pp. 297–309, Feb. 2010. [10] L. Wang, Y. Z. Xiong, B. Zhang, S. Hu, T. G. Lim, and X. Yuan, “0.7-dB insertion-loss -band lange coupler design and characterization in 0.13 m SiGe BiCMOS technology,” J. Infrared, Millim., Terahertz Waves, vol. 31, no. 10, pp. 1136–1145, Aug. 2010. [11] V. K. Tripathi, “Asymmetric coupled transmission lines in an inhomogeneous medium,” IEEE Trans. Microw. Theory Techn., vol. MTT-23, no. 9, pp. 734–739, Sep. 1975. [12] C. M. Tsai and K. C. Gupta, “A generalized model for coupled lines and its applications to two-layer planar circuits,” IEEE Trans. Microw. Theory Techn., vol. 40, no. 12, pp. 2190–2199, Dec. 1992. [13] K. H. Tsai and C. K. C. Tzuang, “Mode symmetry analysis and design of CMOS synthetic coupled transmission lines,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 8, pp. 1947–1954, Aug. 2011. [14] J. W. Lai and A. Valdes-Garcia, “A 1 V 17.9 dBm 60 GHz power amplifier in standard 65 nm CMOS,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., 2010, pp. 424–425. [15] K. T. Ng, B. Rejaei, and N. Burghartz, “Substrate effects in monolithic RF transformers on silicon,” IEEE Trans. Microw. Theory Techn., vol. 50, no. 1, pp. 377–383, Jan. 2002. [16] F. Zhang, E. Skafidas, and W. Shieh, “60 GHz double-balanced up-conversion mixer on 130 nm CMOS technology,” Electron. Lett., vol. 44, no. 10, pp. 633–634, May 2008.

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[17] A. Y. K. Chen, Y. Baeyens, Y. K. Chen, and J. Lin, “A -band highly linear SiGe BiCMOS double-balanced active up-conversion mixer using multi-tanh triplet technique,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 4, pp. 220–222, Apr. 2010. [18] V. H. Do, V. Subramanian, W. Keusgen, and G. Boeck, “A 60 GHz monolithic upconversion mixer in SiGe HBT technology,” in Proc. IEEE Radio Freq. Integr. Technol. (RFIT) Symp., 2007, pp. 112–115. [19] J. H. Tsai, “Design of 40–108-GHz low-power and high-speed CMOS up-/down-conversion ring mixers for multistandard MMW radio applications,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 3, pp. 670–678, Mar. 2012. [20] S. Munkyo, B. Jagannathan, J. Pekarik, and M. J. W. Rodwell, “A 150 GHz amplifier with 8 dB gain and 6 dBm Psat in digital 65 nm CMOS using dummy-prefilled microstrip lines,” IEEE J. Solid-State Circuits, vol. 44, no. 12, pp. 3410–3421, Dec. 2009. [21] B. Zhang, Y. Z. Xiong, L. Wang, S. Hu, T. G. Lim, Y. Q. Zhuang, and L. W. Li, “A -band power amplifier with 30-GHz bandwidth and 4.5-dBm psat for high-speed communication system,” Progr. Electromagn. Res., vol. 107, pp. 161–178, 2010.

Debin Hou (S’09) was born in SiChuan Province, China, in 1983. He received the B.S. degree from the School of Physical Electronics, University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 2007, and is currently working toward the Ph.D. degree at the School of Information Science and Engineering, Southeast University (SEU), Nanjing, China. He is also currently with the Institute of Microelectronics (IME), Agency for Science, Technology and Research (A*STAR), Singapore, as an exchange student. His current research interests include mm-wave on-chip components, antennas, and integrated circuits.

Wei Hong (M’92–SM’07–F’12) received the B.S. degree from the University of Information Engineering, Zhengzhou, China, in 1982, and the M.S. and Ph.D. degrees from Southeast University, Nanjing, China, in 1985 and 1988, respectively, all in radio engineering. Since 1988, he has been with the State Key Laboratory of Millimeter Waves, Southeast University, Nanjing, China, where since 2003, he has been the Director of the laboratory, and is currently a Professor and Associate Dean of the School of Information Science and Engineering. In 1993, 1995, 1996, 1997, and 1998, he was a short-term Visiting Scholar with the University of California at Berkeley and University of California at Santa Cruz, respectively. He has authored or coauthored over 200 technical publications. He authored Principle and Application of the Method of Lines (Southeast Univ. Press, 1993, in Chinese) and Domain Decomposition Methods for Electromagnetic Problems (Sci., 2005, in Chinese). He has been a Reviewer for IET Proc.–H and Electronic Letters. He has been engaged in numerical methods for EM problems, mm-wave theory and technology, antennas, EM scattering, RF technology for mobile communications. Dr. Hong is a senior member of the Chinese Institute of Engineering (CIE). He is vice president of the Microwave Society and Antenna Society, CIE. He has been a reviewer for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES and the IEEE TRANSACTIONS ON ANTENNAS AND PROPAGATION. He was an associate editor of the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES (2008–2010). He is an Editorial Board member for the International Journal of Antennas and Propagation and the International Journal of RF and Microwave Computer-Aided Engineering. He was a three-time recipient of the First-Class Science and Technology Progress Prizes of the Ministry of Education of China and the Jiangsu Province Government. He was also the recipient of the Foundations for China Distinguished Young Investigators Award and the Innovation Group Award of the National Science Foundation (NSF) of China.

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Wang Ling Goh (SM’09) received the B.Eng. degree in electrical and electronic engineering from the Queen’s University of Belfast, Belfast, U.K., in 1990, and the Ph.D. degree in microelectronics from the Queen’s University of Belfast, Belfast, U.K., in 1995. She is currently an Associate Dean for Outreach and External Relations with the College of Engineering, Nanyang Technological University (NTU), Singapore, where she was a Lecturer in 1996 and became an Associate Professor in 2004, with the School of Electrical and Electronic Engineering. She was a Research Engineer with the Northern Ireland Semiconductor Research Centre, while working toward the doctoral degree. Her research interests include digital/mixed-signal integrated circuit (IC) design, neural recording ICs, and 3-D ICs.

Yong Zhong Xiong (M’98–SM’02) received the B.S. and M.Eng degrees in communication and electronic systems from the Nanjing University of Science and Technology (NUST), Nanjing, China, in 1986 and 1990, respectively, and the Ph.D. degree in electrical and electronic engineering from the Nanyang Technological University (NTU), Singapore, in 2003. From 1986 to 1994, he was with NUST, where he was involved with microwave systems and circuit design with the Department of Electronic Engineering. In 1994, he was with the Nanyang Technological University (NTU), as a Research Scholar. From 1995 to 1997, he was with the RF and Radios Department, Singapore Technologies (ST, Singapore), as a Senior Engineer. In 1996, he was also affiliated with the Centre for Wireless Communications, National University of Singapore, where he was involved with the RF Identification (RFID) Project. Until the end of 1997, he was with the Microelectronics Centre, NTU. From September 2001 to October 2011, he was with the Institute of Microelectronics (IME), Singapore, as a Principal Investigator (PI), during which time he led a group involved with mm-wave/terahertz circuit and system design. He is currently a Chief Technical Officer (CTO) with the MicroArray Technologies Company Ltd., Chengdu, China. He has authored or coauthored over 150 technical papers. His research includes monolithic RF, microwave, and mm-wave integrated circuit [RF integrated circuit (RFIC)/monolithic microwave integrated circuit (MMIC)] design, and device modeling and characterization. He holds several patents. Dr. Xiong has been a technical reviewer for the IEEE TRANSACTIONS ON ELECTRON DEVICES, IEEE TRANSACTIONS ON ELECTRON DEVICE LETTERS, the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, and the IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS. He has also served on committees of the Singapore IEEE Microwave Theory and Techniques (MTT) Chapter and the IEEE International Workshop on Radio-Frequency Integration Technology.

Muthukumaraswamy Annamalai Arasu received the Bachelor’s degree in electronics and communication engineering from the National Institute of Technology, Tiruchirapalli, India, in 1992. From 1993 to 2000, he was with the Centre for Development of Telematics, Bangalore, India, where he designed discrete RF circuits for VSATs. From 2000 to 2003, he was with Wipro Technologies, Bangalore, India, where he designed analog/RF integrated circuits (ICs). From 2003 to 2004, he was with Intel, Bangalore, India, where he designed RF transmitters on CMOS for ultra-wideband (UWB). Since 2004, he has been with the Institute of Microelectronics, Singapore. He has developed ICs on CMOS for both high data-rate UWB and pulse-based UWB for sensor application. He is currently -band front-end and acoustic involved in the development of a low-noise telemetry system/ICs for logging-while-drilling (LWD) application. He has authored or coauthored over ten international conference publications in the areas of RF/analog IC design for UWB application.

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Jin He (S’09–M’10) received the B.E. degree in mechanical and electrical engineering from the Wuhan Institute of Chemical Engineering, Wuhan, China, in 1997, the M.E. degree in communication and information engineering from the Wuhan Research Institute of Posts and Telecommunications, Wuhan, China, in 2003, and the Ph.D. degree in electrical and electronics engineering from Nanyang Technological University, Singapore, in 2011. From 1997 to 2000, he was with the Zhejiang Huayi Electrical Instruments Company Ltd., Zhejiang, China. From 2003 to 2006, he was with the National Key Laboratory of Optical Communication Technology, Wuhan Research Institute of Posts and Telecommunications, where he was an Analog Integrated Circuit (IC) Designer for optical transceivers. From 2006 to 2007, he was with Nanyang Technological University, as a Research Associate for ultra-wideband integrated transceivers. In 2010, he joined the Institute of Microelectronics, (Agency for Science, Technology and Research (A*STAR), Singapore, where he is currently a Scientist involved with monolithic silicon-based millimeter/terahertz IC design. His research interests include analog/RF IC design and system architectures for optical and wireless communications.

Jixin Chen (M’11) was born in Jiangsu Province, China, in 1976. He received the B.S. degree in radio engineering from Southeast University, Nanjing, China, in 1998, and the M.S. and Ph.D. degrees from Southeast University, Nanjing, China, in 2002 and 2006, respectively, all in EM fields and microwave techniques. Since 1998, he has been with the Sate Key Laboratory of Millimeter Waves, Southeast University, where he is currently an Associate Professor with the School of Information Science and Engineering. He has authored or coauthored over 50 journal papers His current research interests include microwave and mm-wave circuit design and monolithic microwave integrated circuit (MMIC) design. Dr. Chen presented invited papers at the 2011 Global Symposium on Millimeter Waves (GSMM2011), the 2010 NFSC-FQRNT 2010 Workshop, and the 2011 China Microwave and Millimeter Wave Conference. He was a reviewer for IEEE MWCL, APMC2008, and ICUWB2010. He was session co-chair of APMC2007, ISSSE2010, and iWAT2011.

Mohammad Madihian (S’78–M’83–SM’88–F’98) received the B.Sc. degree from the Iran University of Science and Technology, Tehran, Iran, in 1976, and the M.Sc. and Ph.D. degrees from Shizuoka University, Shizuoka, Japan, in 1980 and 1983, respectively, all in electronic engineering. Dr. Madihian is currently President and CEO of MEDIWAVE LLC, Greenville, NC. He was the Technical Director of the Institute of Microelectronics, Singapore, the Managing Director of MEDIWAVE LLC, the Director of the NEC Corporation of America, and the Chief Patent Officer and Department Head of NEC Laboratories America, during which time he led RF chip development and PHY/MAC layer signal processing research. He authored a book on CMOS-RF. He has authored or coauthored over 210 journal and conference publications, including 28 invited talks. He was the Editor-in-Chief of the International Journal of Microwave Science and Technology (2006–2009). He was a Guest Editor for the Japan IEICE Transactions on Electronics. He is currently an Associate Editor for the Japan IEICE Transactions on Electronics. He holds 80 registered or pending patents on devices, circuits, and systems for wireless applications. Dr. Madihian was the 2010 Secretary for the IEEE Microwave Theory and Techniques Society (IEEE MTT-S). He is currently an Administrative Committee member of the IEEE MTT-S. He is the general chair of the 2018 IEEE MTT-S International Microwave Symposium (IMS), Philadelphia, PA. He was the general chair for both the IEEE Radio and Wireless Symposium and the Compound Semiconductor IC Symposium in 2007, and the Technical Program chair for these conferences in 2006. From 2000 to 2010, he served on the CSICS Executive Committee, and in 2008, was the Executive Committee chair emeritus. From 2008 to 2010, he was also the RWS Executive Committee chair, and is currently an Executive Committee member. He was guest editor for the IEEE JOURNAL OF SOLID-STATE CIRCUITS, and the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. He serves on the IEEE Speaker’s Bureau, IEEE MTT-S IMS Technical Program Committee, the MTT-6 Subcommittee, and the IEEE MTT-S Editorial Board. He was the recipient of the 1988 IEEE MTT-S Best Paper Microwave Prize. He was also the recipient of eight Distinguished Research and Development Achievement Awards and three IEEE Certificates of Recognition.

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A 64–84-GHz PLL With Low Phase Noise in an 80-GHz SiGe HBT Technology Gang Liu, Member, IEEE, Andreas Trasser, and Hermann Schumacher, Member, IEEE

Abstract—This paper presents a 64–84-GHz phase-locked loop (PLL) realized in a low-cost 80-GHz HBT technology. The circuit consists of a wide tuning-range voltage-controlled oscillator, a push–push frequency doubler, a divide-by-32 frequency divider, a phase detector and an active loop filter. The measured phase noise at 1-MHz offset is 106 dBc/Hz. The output power is 2.5 dBm at 64 GHz, and it slowly decreases to 8.1 dBm at 84 GHz, with a maximum dc power consumption of 517 mW. To the authors’ knowledge, the circuit achieves the widest frequency tuning range and its in-band phase noise is the lowest among the fully integrated -band PLLs reported to date. Index Terms—Heterojunction bipolar transistors (HBTs), millimeter-wave (mm-wave) integrated circuits (ICs), phase-locked loops (PLLs).

I. INTRODUCTION

H

IGHLY stable frequency sources are a key requirement of many millimeter-wave (mm-wave) communication and sensing systems. Stability is typically achieved using a phase-locked loop (PLL) approach, tying the mm-wave output to a lower reference frequency. With emerging applications in -band communications at 60 GHz and radar at 77 GHz, signal sources are in high demand. Owing to their potential for highly complex multifunctional integrated circuit (IC) implementations, Si/SiGe heterojunction bipolar transistor (HBT), Si/SiGe BiCMOS and ultra-scaled CMOS have made silicon the predominant platform for integrated synthesizer developments. Aside from phase noise and output power, tuning range is another important parameter, either because the application requires it (e.g., high-resolution frequency-modulated continuous wave (FMCW) radar) or because it provides the flexibility to use the synthesizer for a number of different applications. In sensor applications, the tuning speed is often another critical challenge. A review of published wideband integrated synthesizers with output frequencies in the 60–100-GHz frequency range shows a Manuscript received March 10, 2012; revised August 01, 2012; accepted August 06, 2012. Date of publication September 04, 2012; date of current version December 13, 2012. This work was supported by the German Ministry of Education and Research (BMBF) under the framework of Project EASY-A (Contract 01BU0815). This paper is an expanded version of the paper presented at the 12th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, January 15, 2012, Santa Clara, CA. The authors are with the Institute of Electron Devices and Circuits and the Competence Center on Integrated Circuits in Communications, Ulm University, 89081 Ulm, Germany (e-mail: [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2213833

significant variety of approaches. The voltage-controlled oscillator (VCO) may oscillate directly at the frequency of operation, or a lower frequency VCO may be used with subsequent frequency multiplication [1] (and also this paper). Alternatively, a low-frequency PLL-stabilized VCO may be up-converted using an injection-locked oscillator at the higher frequency of operation [8]. To achieve a very wide tuning range, CMOS and BiCMOS synthesizers use switched MOS varactors, usually via a 3-bit digital control word [2], [3], or even multiple VCOs on one chip [5]–[8]. The choice of loop bandwidth and divider ratio between the frequency of operation and the reference frequency affects phase noise, but also locking range (for analog PLLs) and locking speed. Most of the surveyed PLLs use small loop bandwidths, 4 MHz or below, down to 100 kHz [1]–[3], [5]–[8], and only [4] uses a large loop bandwidth (45 MHz) comparable to the design presented here. Most of the designs [1]–[3], [5], [7], [8] also use rather high divider ratios, between 768–8184. Only [4] and [6] use low divider ratios, 64 and 16, respectively, comparable to the work presented here. Low divider ratios lead to low phase noise, provided that a stable reference source is available. The dividers use injection-locked [5] dynamic and static division principles. In case of the injection-locked divider, it imposes a limitation on the tuning range of the synthesizer. All reviewed designs, finally, use a charge pump in the loop. This is a common approach, but requires fast pnp or pMOS devices. A tabular overview of the reviewed designs, along with results of the synthesizer presented here, is shown in Table I. The design reported here had the following objectives. . • Frequency of operation very close to the technology This is, on the one hand, motivated by the need of very lowcost front-end ICs for consumer applications at 60 GHz, and on the other hand, provides valuable insight into design techniques capable of addressing sources for systems operating much above 100 GHz. • Very wide tuning range. This is motivated by the need to address several applications with one synthesizer IC. • The ability to sweep over a wide frequency range without band switching, as needed by high-resolution FMCW sensors. • Fast settling time for applications requiring high-frequency agility. • State-of-the-art phase-noise suppression despite the partially conflicting requirements above. Specifically, an approach was chosen that uses a moderate divider ratio (64 with respect to the frequency of operation) to lower phase noise, a loop bandwidth of 50 MHz for large

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TABLE I COMPARISON OF RECENT mm-WAVE PLLs

locking range and fast settling time, and an analog PLL without a charge pump. The circuit was first discussed briefly in [9]. This paper is an extended version, describing the design, simulation, and characterization in more details. II. TECHNOLOGY OVERVIEW For realizing the PLL circuit, we used an SiGe HBT technology [10] from Telefunken Semiconductors GmbH. The process requires only 22 masks with 0.8- m minimum feature size, and therefore, is very cost effective. Two types of npn transistors are available with minimum geometric emitter size of 0.8 1.4 m (electrically active emitter size of 0.5 1.1 m ). The selectively implanted collector (SIC) npn transistor has an of 80/90 GHz and a of 2.4 V. The non-SIC transistor improves the to 4.5 V, with a reduced of 50 GHz. One type of lateral pnp (LPNP) transistor is also available, but not suitable for RF purposes. Four types of resistors, metal–insulator–metal (MIM) and nitride capacitors, as well as varactor diodes are provided. The process offers three metal layers for passive elements and interconnections. Two types of silicon substrate (1000 and 20 cm) are available. The low-resistivity substrate is chosen for this study. III. PLL CIRCUIT DESIGN The block diagram of the PLL circuit is shown in Fig. 1. It is an analog PLL incorporating a phase detector (PD) and active loop filter (LF). Compared to the commonly used digital PLL employing a phase frequency detector (PFD) and charge pump, the analog PLL can operate at much higher frequencies, enabling a smaller frequency division ratio in the PLL, and therefore, lower phase noise. A. VCO and Doubler The signal generation is realized by a VCO and a frequency doubler, which is a modified version of the work reported ear-

Fig. 1. Block diagram of the PLL circuit.

lier [14]. Fig. 2 shows the schematic of the VCO and frequency doubler. The VCO is a differential Colpitts VCO with a cascaded common base stage as the output buffer. It provides two differential outputs to drive the frequency doubler and divider in parallel. Large transistors (0.5 30 m ) are used in the VCO core and output buffer because they can generate more output power and have smaller base resistance (compared to small transistors), facilitating oscillation at higher frequency and resulting in lower phase noise [11]. The inductors and all matching networks are realized with thin-film microstrip lines (TFMLs). The oscillation frequency is tuned through varactor diodes. The oscillation frequency of the VCO can be calculated as (1) is the base inductance and is the equivalent cawhere 1 in series with the transistor base–emitter pacitance of junction capacitance . To have a wide frequency tuning range, should be much smaller than . However, a very small cannot produce sufficient negative impedance to start the oscillation. Therefore, in this design, is in the same range as (about 350 fF), as a compromise between wide tuning range and sufficient negative impedance. Three diodes with the smallest size (20- m strip length and 1.8- m strip width) are connected 1 is the equivalent capacitance of the varactor diodes in parallel with the 800- m TFML. The capacitance is mainly determined by the varactor diodes, as the TFML is a very large inductor (close to an open at the frequency range of operation) and has little influence on the capacitance.

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specific filter and matching networks is needed at the input and output. Frequency doublers based on the push–push topology have been reported [12], [13], operating at relatively low frequencies (compared to ). In this study, the frequency doubler is operated at frequencies close to . Therefore, the topology is modified to have better performance in the designed frequency range. The output is taken from the common emitter, with a 300-pH inductor as the load, which provides higher conversion gain than a resistive load (as in [12]). The ECP is biased for class-A operation using a current source. Compared with class-B operation (as in [13]), the conversion gain and output power is higher at high input levels ( 0 dBm). With 7-dBm input power, the conversion gain peaks at 30-GHz output ( 5 dB) and slowly decreases to 10 dB at 80 GHz. Further details of the VCO and frequency doubler are provided in [14]. B. Frequency Divider

Fig. 2. Schematic of the VCO and frequency doubler.

Fig. 3. Capacitance and quality factor of a single varactor diode (at 30 GHz).

in parallel to improve the quality factor. The capacitance of a single varactor diode changes from 43 to 107 fF, when the dc voltage across the varactor varies from 4 to 0 V. The quality factor at 30 GHz changes from 20 to 10, as shown in Fig. 3. The capacitance can be further increased to 158 fF with slight forward biasing 0.4 V . This is helpful to achieve a wider tuning range, although the phase noise gets slightly worse. In this design, the slightly higher phase noise of the free-running VCO is not critical because it is well suppressed within the loop bandwidth and already decreases to a sufficiently low level at high offset frequencies (outside the loop bandwidth, 50-MHz offset). The oscillation frequency can be continuously tuned from 31 to 42 GHz. Since the frequency divider requires only a very small input power, the VCO output is modified such that most of the power (5 dBm) is delivered to the frequency doubler and about 0 dBm to the frequency divider. The frequency doubler is a push–push type, based on an emitter coupled pair (ECP), as shown in Fig. 2. This type of frequency doubler can provide higher conversion gain, compared to the passive frequency doublers, and it requires less chip area than the nonlinearity type of frequency doublers because no

Frequency dividers are also important building blocks in modern PLLs. They decrease the input frequency from the VCO so that the PLL can operate at much lower frequencies. However, the in-band phase noise of the locked signal will be increased by a factor of , where is the frequency division ratio. Therefore, a small frequency division ratio is preferred to obtain a lower phase noise. In this study, a division ratio of 32 (for fundamental VCO) is chosen, which lowers the reference signal to a relatively low frequency (around 1.1 GHz) and still provides good phase-noise performance. The divide-by-32 frequency divider consists of five divide-by-2 stages. To get a wide tuning range PLL, the frequency divider should operate properly over the complete frequency tuning range of the VCO. The dc power consumption should also be minimized. Therefore, each divide-by-2 stage is designed and optimized separately balancing maximum operating frequency and power consumption. The first divider stage is the most critical one because it operates at the highest frequency. The maximum VCO output frequency is 42 GHz so the first divider stage should operate at least up to 42 GHz (better up to higher frequency to keep some safety margins). Static frequency dividers based on master–slave D-flip-flops (DFFs) cannot operate at this frequency range due to the high ratio of operating frequency and . Injection-locked frequency dividers (as used in [2] and [3]) can operate at higher frequency, but they all rely on introducing additional phase shift to an oscillator to achieve locking [15], therefore usually have limited operating frequency range. In this design, a dynamic frequency divider is used as the first stage. It is based on the regenerative concept [16], as shown in Fig. 4(a). The output of the mixer, after passing the low-pass filter and amplifier, is fed back to one input of the mixer. When an input signal at frequency with a certain power is applied to the other input of the mixer, the divider will sustain an oscillation within the loop at frequency , provided that the higher mixing products ( , , etc.) are filtered out by the low-pass filter. The operation of the dynamic divider relies on the mixer and low-pass filter, which can have very wide bandwidth so the dynamic frequency divider can operate over a

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Fig. 5. Simulated open-loop gain of the dynamic divider.

Fig. 4. (a) Regenerative frequency divider principle. (b) Schematic of the dynamic divider (first stage). All transistors have the same electrically active size of 0.5 5 m .

much wider frequency range than the injection-locked dividers. Fig. 4(b) shows the schematic of the dynamic divider, consisting of a Gilbert-cell mixer core , a transimpedance amplifier (TIA) stage and emitter-followers (EFs) as low-pass feedback and output buffer . The transimpedance stage increases the mismatch in the loop, leading to wider bandwidth and much better performance (with respect to maximum operating frequency, safe broadband operation, and high sensitivity), compared with a single resistor as the load [17]. Small transistors (0.5 5 m ) are used in the mixer core and TIA for low current consumption. The maximum operating frequency of the dynamic divider is determined by the open-loop gain. To calculate the open-loop gain, the divider feedback loop is cut at the output of the second EF , as indicated in Fig. 4. One input signal at frequency is injected into the divider from the input port (base of ) and another signal at frequency is injected into the base of .2 The open-loop gain can be calculated as the power gain from the input at to the output at . Fig. 5 shows the simulated open-loop gain under small-signal driving condition.3 The maximum operating frequency of the dynamic divider is twice the frequency at which the open-loop gain drops to 1. By adjusting the resistors in the TIA and EFs, the open-loop gain can be maximized. In this design, the maximum operating frequency is intentionally reduced from 70 to 50 GHz to save dc power consumption (by increasing the load resistor in the TIA and reducing the current in the EFs). The dynamic divider stops dividing at low frequencies ( 10 GHz) because the third harmonic in the mixer output signal is not sufficiently suppressed in 2Dummy

EFs (same as – ) are inserted before and the output of is terminated with a dummy mixer core to represent the same matching conditions in the closed loop. 3As the signal level at increases, the loop gain slowly decreases due to nonlinearity of the transistors.

Fig. 6. Schematic of the static divider (second stage). : 0.5 2 m . , : 0.5 5 m .

: 0.5

1.1 m .

,

the feedback loop [17]. Therefore, it is not suited for frequency division at very low frequencies. The second stage is a static frequency divider based on master–slave DFFs, as shown in Fig. 6. The DFFs are built using emitter-coupled-logic (ECL) ( being the clock, , being the latches). The EF provides the dc level shift (for proper biasing of , ) and increases the speed (maximum operating frequency) of the divider. , , , and are the most critical elements that determine the speed of the static divider, as analyzed in [18] and [19]. By choosing the third smallest transistor (0.5 2 m ) for , , and 100 for , the speed of the divider can be maximized (about 34 GHz). However, such high speed for the second divider stage is not necessary. Therefore, the speed is reduced to 28 GHz by increasing and decreasing the current in and . The dc power consumption is reduced by 50%. The static divider can operate down to very low frequencies (megahertz range, limited by the on-chip capacitor). Therefore, it is also used for the following three stages. Since they operate at much lower frequencies, the speed of the following stages is further reduced to save dc power consumption. The EFs in the DFFs (indicated via the dashed box) are omitted, the current in is reduced, and is increased to compensate the decrease of voltage swing due to the lower current. The output buffer (EF) is only added at the last output stage. The operating frequency range and input and output power of each stage are designed carefully so that the divider chain can operate properly over the complete frequency range with low power consumption and sufficient output power. Fig. 7 shows

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Fig. 7. Block diagram of the divide-by-32 frequency divider with the maximum operating frequency and dc power consumption (under 3.5-V supply) of each stage.

Fig. 10. Simulated PD output voltage versus phase error.

Fig. 8. Measured input sensitivity and output power of the divide-by-32 frequency divider.

Fig. 9. Simplified schematic of the PD and active LF. All transistors have the : 550 , : 800 , : 30 , : 2.5 k , : same size of 0.5 5 m . : 400 . , : 1 pF. 1.2 k ,

the block diagram of the divider chain with the maximum operating frequency and dc power consumption (under 3.5-V supply) of each stage. A standalone frequency divider has been realized for characterization. Fig. 8 shows the measured input sensitivity and output power. The divider chain can divide from 11 GHz up to 50 GHz, covering the complete tuning range of the VCO. The required input power ( 8 dBm) is well below the available power from the VCO and the output power is about 2 dBm, which is sufficient to drive the PD. C. PD and LF The PD is based on a Gilbert-cell mixer with resistive load, as provides the dc level shift so that shown in Fig. 9. The EF the PD can drive the following LF directly. The divider output is connected to the switching quad of the mixer core and the reference signal is connected to the transconductance stage. When the two input signals are different in frequency (at the initial phase of the locking process), the PD operates as a mixer and generates a low-frequency signal, which tunes the VCO frequency toward the reference frequency. When the two input signals have the same frequency, but differ in phase (by ),

as in the locked state, a dc voltage shift is produced at the output, fixing the VCO frequency at the reference frequency (multiplied by the division ratio ). Fig. 10 shows the simulated output voltage of the PD versus the input phase error. The gain of the PD , defined as , is mainly determined by the load resistor and the reference signal power. As will be shown in Section IV, influences the PLL loop gain and noise contribution from the PD, and thus needs to be chosen carefully. In the current design, the load resistor is 550 and the PD gain is about 0.1 (with 15-dBm reference signal power). In addition to the dc voltage shift, the output of the PD also contains ac signals, which are mixing products of the two input signals. These ac signals will modulate the VCO and generate spurs (reference spurs) around the locked signal, and must be sufficiently suppressed. The suppression of the ac signals on the tuning node (and hence, the spur signals at the PLL output) is determined by the LF attenuation at the spur frequencies (harmonics of the reference frequency), which can be controlled by the LF bandwidth. To have high spur suppression, a small bandwidth (low cutoff frequency) is preferred. However, a small LF bandwidth directly leads to small loop bandwidth, and hence, small frequency locking range and longer settling time of the PLL, so a compromise between spur suppression and locking range must be considered when choosing the filter bandwidth. In this design, a relatively wide bandwidth is chosen because wide locking range is the main design goal and the reference spurs are less critical since they are far from the locked signal. The LF is also shown in Fig. 9. It is based on a feedback amplifier and passive RC filter with an EF in between for dc level shift. The amplifier amplifies the small control signal from the PD and performs low-pass filtering (though feedback) together with the RC filter. The bandwidth and attenuation (at high frequency, e.g., at 1 GHz) of the filter, which influence the PLL loop bandwidth and reference spur suppression, are mainly determined by the feedback and the RC filter . Fig. 11 shows the simulated ac power gain of the filter. The 3-dB bandwidth is 47 MHz, which is a compromise between wide locking range (wide loop bandwidth) and spur signal suppression (smaller bandwidth). The free-running VCO can be tuned from 31 to 42 GHz, which corresponds to a voltage tuning from 0.6 to 6 V. In order to lock the VCO to a wide frequency range, the LF output must be able to cover a wide voltage range. Since the output

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Fig. 12. Linear model of the PLL. The loop is cut at the output of the divider for open-loop gain simulation.

Fig. 11. Simulated ac gain of the LFs with different bandwidth.

voltage swing of the PD is very small (0.13 V peak-to-peak at 30 MHz), the LF must provide sufficient gain to have a large output voltage swing, which also increases the gain of the PD and helps to suppress the noise contribution from the PD and LF, as will be shown in Section IV. The gain of the LF can be easily adjusted by changing the load resistor and biasing current. With a load of 2.5 k , the LF has 33-dB gain and 2.3-V (peak-to-peak) output voltage swing. This allows a maximum frequency tuning range of 4 GHz that is wider than the locking range determined by the loop bandwidth. Due to the high voltage swing, the non-SIC transistors (with 4.5-V ) are used in the LF design. The locking range of the PLL is limited by the loop bandwidth and covers only part of the VCO tuning range (about 3 GHz around the free-running frequency). Therefore, the usable frequency range of the VCO is limited. To cover the full tuning range of the VCO, the locking range can be shifted by adjusting the supply voltage of the LF ( ). The biasing current of the filter is fixed so that a change of the supply voltage only shifts the dc voltage level at the output node. As a result, the free-running frequency of the VCO, and hence, the locking range, can be shifted, while the loop response remains the same. By changing from 2 to 8 V in steps of 1 V, the PLL can lock to different frequency bands, covering almost the whole tuning range of the VCO, as will be shown later in Section V. IV. PLL SIMULATION To assist and optimize the design of the PLL, different simulations have been performed. The PLL behavior in the locked state (loop gain, loop bandwidth, phase noise) is simulated in the frequency domain, based on a linear model, as shown in Fig. 12. The transient response of the PLL (locking time) is simulated in time domain using transient simulation (ADS), based on real circuit models. A. Loop Gain Simulation In the locked state, the PLL can be modeled by a linear model in the frequency domain, as shown in Fig. 12, where , , , and are PD gain, VCO gain, LF transfer function, and frequency division ratio, respectively. The open- and closed-loop gain are two important PLL design parameters, defining the PLL loop stability and bandwidth. The open-loop gain is the product of all the transfer functions in

the loop . To simulate the open-loop gain, the loop is cut at the output of the frequency divider, as shown in Fig. 12. The PD, VCO, and frequency divider are replaced with ideal behavioral models. The complete circuit model of the LF is used in the simulation since a behavior model could not be extracted. The simulation is performed in ADS using ac simulation. After feeding an input signal, the open-loop gain can be calculated as the gain from the input to the divider output. The stability of the loop can be evaluated from the amplitude and phase of the open-loop gain. The phase margin4 is usually used to define the stability of the PLL. In this PLL design, one effective way to control the phase margin is to tune the load resistor in the LF ( in Fig. 9). Fig. 13(a) and (b) shows the simulated magnitude and phase of the open-loop gain for different load resistors. As the load resistor decreases, the phase margin increases and the loop becomes more stable. However, decreasing also reduces the loop bandwidth and locking range. A 2.5-k load resistor is used in the current design, which gives a good compromise between loop bandwidth and stability. The closed-loop gain (also called the transfer function)

(2) defines the phase relation between the input and output. The performance of the PLL (locking range, spur suppression, etc.) is mainly determined by the closed-loop gain. Fig. 13(c) shows the simulated closed-loop gain for different load resistors. B. Phase-Noise Simulation Phase noise is an important characteristic of a PLL. Ideally, the output phase noise should be the same as the phase noise of the reference signal plus , where is the frequency division ratio, as indicated in the closed-loop gain simulation. However, the noise of other loop components also contributes to the final output phase noise. Each component has its own transfer function. In the locked state, the PLL can be modeled as a linear system, where the total output noise is the sum of each noise source (from each component) multiplied by its own transfer function. In order to achieve the lowest possible phase noise, the noise from other loop components should be lower 4The phase margin is the phase difference between 180° and the phase of the open loop gain at the frequency where the magnitude of the open loop gain equals 1.

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Fig. 14. (a) Phase noise of individual loop components for simulation. (b) Simulated phase noise and contributions of individual loop components.

LF. The divider phase noise is much lower and has almost no influence on the output phase noise. The minimum in-band phase noise is mainly determined by the contribution from the PD and LF, which is about 120 dBc/Hz at 1-MHz offset. C. Transient Simulation

Fig. 13. Simulated: (a) amplitude and (b) phase of the open-loop gain and the simulated (c) closed-loop gain for different LF load resistor.

than the reference noise. The phase noise is simulated (using ac simulation) based on the model in Fig. 12, where the noise contributions of the individual components ( , , etc.) are added separately. The noise is represented by the root mean square (rms) noise voltage at each frequency. The simulated noise data of the PD, LF, frequency divider, and the measured noise data of the VCO, reference signal (1-GHz signal from Agilent signal source E8254A), as shown in Fig. 14(a), are used. The PD and the LF are treated as one circuit and their noises are combined. The simulated total phase noise and contributions from the loop components are given in Fig. 14(b). The in-band phase noise is mainly dominated by the reference signal and the out-of-band noise is dominated by the VCO. The noise from the PD and LF is well suppressed due to the high gain in the

PLL locking is a nonlinear and dynamic process, which cannot be modeled using the linear model in Fig. 12. Therefore, the complete PLL circuit (VCO, divider, PD, and LF) is simulated in the time domain using transient simulation. Fig. 15 shows the simulated tuning voltage of the VCO when locking to a 1.1-GHz reference signal. The locking time is less than 100 ns. V. MEASUREMENT RESULTS Fig. 16 shows a photograph of the PLL IC. The chip is very compact and occupies an area of only 1.1 1 mm , including the bonding pads. The circuit is characterized on-wafer. The output is connected through a ground–signal–ground (GSG) probe to a -band mixer (Agilent 11970V), which extends the frequency range of the spectrum analyzer (Agilent 8563E). A signal generator (Agilent 8254A) is used to generate the reference signal, which is connected through a GSG probe to the input of the PD (the second input is grounded by the ground of the probe). The VCO and frequency doubler are biased with a 4-V supply and draw 60-mA current. The frequency divider and PD are biased with a 3.5-V supply and consume 54-mA current (45 mA for

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Fig. 15. Simulated tuning voltage of the VCO versus time when locking to a 1.1-GHz reference signal.

Fig. 17. Locked spectrum at 80 GHz with: (a) 200-MHz and (b) 4-GHz span. The spectrum at 79.4 GHz in (b) is an artifact of the harmonic mixer.

Fig. 16. PLL chip photograph. The chip size is 1.1

1 mm .

a divider). The supply voltage of the LF varies from 2 to 8 V with a current change from 2 to 11 mA (due to the output EF). A clean locked spectrum is observed at the output. Fig. 17 shows the locked spectrum at 80 GHz with different span. The filter is biased at 6 V. The reference signal is at 1.25 GHz, with a power of 15 dBm. The suppression of the reference spur is 37 dB. Fig. 18 shows the measured phase noise at different frequencies. The measurements are very close to the simulation results (6 dB are added to simulation results because of frequency doubling). At 1-MHz offset, the measured phase noise is 106 dBc/Hz. The rms phase error (integrated up to 100 MHz) is 4.4 , which is calculated from the measured phase-noise data using the following equation [20]: (3) is the measured where is the rms phase error in degrees, phase noise power relative to carrier (in scalar units), and and are the lower and upper limits for integration.

With a 4-V supply at the LF, the PLL can lock from 69.8 to 76.9 GHz, which is limited mainly by the loop bandwidth. By changing the LF supply voltage, the PLL can lock to different frequency bands, as shown in Fig. 19, covering the complete frequency range from 64 to 84 GHz. The output power of the PLL is given in Fig. 20. At 64 GHz, the measured output power is 2.4 dBm. Due to the increased conversion loss of the doubler, the output power decreases to 8.1 dBm at 84 GHz.5 The leakage of the fundamental signal at the output is below 20 dBm over the whole tuning range, as shown in Fig. 20. Table I compares this study with other fully integrated -band PLLs. This work achieves the widest frequency tuning range and lowest in-band phase noise. VI. CONCLUSION This paper has presented the design, simulation, and characterization of a mm-wave PLL circuit that achieves the widest frequency tuning range (64–84 GHz) among all reported mm-wave PLLs. The circuit is realized in a low-cost 80-GHz SiGe HBT technology, yet still delivers a satisfactory output power of 2.5 dBm at 64 GHz and 8.1 dBm at 84 GHz. The measured phase noise ( 106 dBc/Hz at 1-MHz offset) is 5The output power above 75 GHz is underestimated due to the higher conversion loss of the -band mixer.

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ACKNOWLEDGMENT The authors thank all the project partners for their excellent cooperation.

REFERENCES

Fig. 18. Measured phase noise at different frequencies in comparison with simulation. 6 dB is added to the simulation because of frequency doubling.

Fig. 19. Measured locking range at different LF supply voltages.

Fig. 20. Measured power of the frequency-doubled signal and leaked fundamental signal at the output of the two PLLs.

the lowest reported in-band phase noise for PLLs in similar frequency ranges. The circuit is well suited as a -band signal source for low-cost applications.

[1] C.-C. Wang, Z. Chen, and P. Heydari, “ -band silicon-based frequency synthesizers using injection-locked and harmonic triplers,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 5, pp. 1307–1320, May 2012. [2] Z. Xu, Q. J. Gu, Y.-C. Wu, H.-Y. Jian, and M.-C. F. Chang, “A 70–78-GHz integrated CMOS frequency synthesizer for -band,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 12, pp. 3206–3218, Dec. 2011. [3] A. Musa, R. Murakami, T. Sato, W. Chaivipas, K. Okada, and A. Matsuzawa, “A low phase noise quadrature injection locked frequency synthesizer for MM-wave applications,” J. Solid-State Circuits, vol. 46, no. 11, pp. 2635–2649, Nov. 2011. [4] S. Kang, J.-C. Chien, and A. M. Niknejad, “A 100 GHz phase-locked loop in 0.13 m SiGe BiCMOS process,” in Radio Freq. Integr. Circuits Symp., Jun. 2011, pp. 79–82. [5] H.-K. Chen, T. Wang, and S.-S. Lu, “A millimeter-wave CMOS triple-band phase-locked loop with a multimode LC-based ILFD,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 5, pp. 1327–1338, May 2011. [6] S. Shahramian, A. Hart, A. Tomkins, A. C. Carusone1, P. Garcia, P. Chevalier, and S. P. Voinigescu, “Design of a dual - and -band PLL,” J. Solid-State Circuits, vol. 46, no. 5, pp. 1011–1022, May 2011. [7] V. Jain, B. Javid, and P. Heydari, “A BiCMOS dual-band millimeterwave frequency synthesizer for automotive radars,” J. Solid-State Circuits, vol. 44, no. 8, pp. 2100–2113, Aug. 2009. [8] K. Scheir, G. Vandersteen, Y. Rolain, and P. Wambacq, “A 57-to-66 GHz quadrature PLL in 45 nm digital CMOS,” in Int. Solid-State Circuits Conf., Feb. 2009, pp. 494–495. [9] G. Liu, A. Trasser, and H. Schumacher, “A 64 to 81 GHz PLL with low phase noise in an 80 GHz SiGe HBT technology,” in 12th IEEE Silicon Monolithic Integr. Circuits RF Syst. Top. Meeting, Jan. 2012, pp. 171–174. [10] A. Schüppen, J. Berntgen, P. Maier, M. Tortschanoff, W. Kraus, and M. Averweg, “An 80 GHz SiGe production technology,” III–V Rev., vol. 14, pp. 42–46, Aug. 2001. [11] G. Niu, J. Tang, Z. Feng, A. J. Joseph, and D. L. Harame, “Scaling and technological limitations of noise and oscillator phase noise in SiGe HBTs,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 2, pp. 506–514, Feb. 2005. [12] X. Zhang and Y.-H. Yun, “A DC to -band frequency doubler using GaAs HBT MMIC,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 1997, pp. 1213–1216. [13] J.-J. Hung, T. M. Hancock, and G. M. Rebeiz, “High-power high-efficiency SiGe - and -band balanced frequency doublers,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 2, pp. 754–761, Feb. 2005. [14] G. Liu, A. C. Ulusoy, A. Trasser, and H. Schumacher, “64 to 86 GHz VCO utilizing push–push frequency doubling in a 80 GHz SiGe HBT technology,” in 10th IEEE Silicon Monolithic Integr. Circuits RF Syst. Top. Meeting, Jan. 2010, pp. 239–242. [15] B. Razavi, “A study of injection locking and pulling in oscillators,” J. Solid-State Circuits, vol. 39, no. 9, pp. 1415–1424, Sep. 2004. [16] R. L. Miller, “Fractional-frequency generators utilizing regenerative modulation,” Proc. IRE, vol. 27, no. 7, pp. 446–457, Jul. 1939. [17] R. H. Derksen, H.-M. Rein, and K. Wörner, “Monolithic integration of a 5.3 GHz regenerative frequency divider using a standard bipolar technology,” Electron. Lett., vol. 21, no. 22, pp. 1037–1039, Oct. 1985. [18] W. Fang, A. Brunnschweiler, and P. Ashburn, “An analytical maximum toggle frequency expression and its application to optimizing high-speed ECL frequency dividers,” J. Solid-State Circuits, vol. 25, no. 4, pp. 920–931, Aug. 1990. [19] K. Ishii, H. Ichino, and C. Yamaguchi, “Maximum operating frequency in Si Bipolar master–slave toggle flip-flop circuit,” J. Solid-State Circuits, vol. 29, no. 7, pp. 754–760, Jul. 1994. [20] D. Banerjee, “PLL performance, simulation and design, 4th ed.,” Texas Instrum. Incorporated, Dallas, TX, 2006.

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Gang Liu (S’07–M’12) received the B.E. degree in electronics engineering from Shandong University, Shangdong Province, China, in 2005, the M.Sc. degree in communications technology from Ulm University, Ulm, Germany in 2007, and is currently working toward the Ph.D. degree at Ulm University. He is currently with the Institute of Electron Devices and Circuits, Ulm University. His research topics mainly involve design and characterization of RF/mm-wave front-end circuits and passive elements and modules, as well as their applications in wideband wireless systems.

Andreas Trasser received the Ph.D. degree from RWTH Aachen, Aachen, Germany, in 1989. In 1990, he joined the Institute of Electron Devices and Circuits, Ulm University, Ulm, Germany, where he currently is a Member of the Academic Staff and a Lecturer. His research interests are mainly focused on the design of analog circuits.

Hermann Schumacher (M’93) received the Dr.-Ing. degree (Doctorate) in engineering from RWTH Aachen, Aachen, Germany, in 1986. From 1986 to 1990, he was with Bellcore, Red Bank, NJ. He then joined Ulm University, Ulm, Germany, as a Professor with the School of Engineering and Computer Engineering. He is currently the Director of the Institute of Electron Devices and Circuits, Ulm University, and the Director of the Communications Technology international M.Sc. program. His research interests range from compound semiconductor devices for microwave and mm-wave applications to high-frequency microsystems, including low-cost mm-wave communication solutions and impulse-radio ultra-wideband techniques for biomedical sensing.

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Analysis and Design of Low Phase-Noise Oscillators With Nonlinear Resonators Alireza Imani, Student Member, IEEE, and Hossein Hashemi, Senior Member, IEEE

Abstract—It is known that the dynamics and phase noise of resonator-based self-sustained nonlinear oscillators is affected by the presence of a nonlinear resonator. In fact, it has been shown that resonator nonlinearity can enhance the oscillator phase noise under certain conditions. This paper offers a new formulation and analytical approach to describe the effect of resonator nonlinearity on the phase noise of self-sustained oscillators. The analysis applies properties of stochastic Ito integrals to oscillator’s averaged stochastic nonlinear differential equations with periodic steady state solutions. The results offer insight into designing low phase-noise oscillators with nonlinear resonators. We show that for a given nonlinear oscillator topology, there is an optimum power incident on the resonator that minimizes the phase noise. As a proof of concept, the analysis is applied to a 1.5-GHz CMOS oscillator that uses a nonlinear film bulk acoustic resonator (FBAR). A nonlinear model including memory effects for the FBAR is proposed and used in the formulation. At the optimum design point, the oscillator shows measured phase noise of 110 dBc Hz at 1 kHz, 125 dBc Hz at 10 kHz, 145 dBc Hz at 100 kHz, and 160 dBc Hz at 10-MHz offset frequencies while consuming 40 mW of dc power. This results in 10 fs of timing jitter. Index Terms—Amplitude noise, bulk acoustic wave, CMOS, oscillator, phase noise, resonator nonlinearity.

I. INTRODUCTION

O

SCILLATORS with high spectral purity, or equivalently low timing jitter, are key blocks in many engineered systems, including those used in timekeeping, synchronous communication, computation, navigation, and sensing. Many selfsustained oscillators can be modeled with a resonator coupled to a nonlinear element [1]. In these resonator-based oscillators, it is well known that the phase noise improves as the incident power on the passive linear resonator increases [1], [2]. Motivated by the application benefits of miniature engineered systems, and enabled by advancements in fabrication, high-quality nanoresonators have become mainstream [3]–[6]. Miniature resonators have nonlinear dependency on the incident power at modest power levels [7]–[10]. This resonator nonlinearity affects the nonlinear dynamics and stochastics of self-sustained oscillators. Several papers have reported oscillators using nanoresonators with measured phase-noise

Manuscript received April 05, 2012; revised September 12, 2012; accepted September 14, 2012. Date of publication October 26, 2012; date of current version December 13, 2012. This work was supported by the Office of Naval Research (ONR) Electronic Warfare Discovery and Invention Program. The authors are with the Department of Electrical Engineering–Electrophysics, University of Southern California, Los Angeles, CA 90089 USA (e-mail: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2221136

plots that diverge from simple models that assume a linear resonator [11]–[13]. Theoretical papers analyzing this effect also exist [14]–[17]. Moreover, experimentalists continue to pursue theoretical predictions that resonator nonlinearity, if exploited properly, can enhance oscillator phase noise [19]. Yurke et al. have provided a comprehensive theoretical analysis of nonlinear oscillator noise with a nonlinear resonator, and showed phase-noise suppression due to resonator nonlinearity under suitable conditions [17]. In their approach, amplitude and phase fluctuations are assumed to be small leading into linearization of the steady-state solution, and hence, finding linear stochastic differential equations for the amplitude and phase fluctuations that can be solved. He et al. use a state-space approach to form a stochastic differential equation for phase and amplitude fluctuations in a nonlinear microelectromechanical system (MEMS) oscillator that is solved numerically by a computer [14]. Pardo et al. suggest an empirical model for the phase noise of nonlinear MEMS oscillators [15]. This modification to Leeson’s empirical phase-noise expression was experimentally validated in [18]. Ward and Duwel model the parametric amplitude to phase fluctuation conversion due to resonator nonlinearity to provide an intuitive expression for oscillator phase noise [16]. Despite these publications, a generic approach to analysis of nonlinear oscillators that lead to optimum designs does not exist. The formulation and analytical approach to derive the phase noise in a self-sustained oscillator with a nonlinear resonator are presented in Section II. In Section III, the analysis, design, and experimental results for a CMOS FBAR Colpitts oscillator are presented. Conclusions are drawn in Section IV. Appendix A details the FBAR nonlinearity measurements and modeling. Appendix B describes the mathematical steps toward solving amplitude and phase stochastic differential equations. Appendix C shows the response of a bandpass filter to an amplitude- and phase-modulated signal. II. GENERAL FORMULATION AND ANALYSIS A. Problem Formulation A generic self-sustained nonlinear oscillator can be modeled with a nonlinear active core that is coupled to a resonator (Fig. 1). The nonlinear active core provides energy to build and sustain the oscillations, and the resonator sets the oscillation frequency. The nonlinearity of the resonator typically manifests itself in the energy storage element of the resonator, e.g., the nonlinear relationship between the restoring force in a mechanical resonator and displacement [11]. The resonator close to its resonance can be modeled with a second-order system, where typically the energy oscillates back and forth

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Fig. 1. Resonator-based oscillator.

between two different energy storage mechanisms. An electrical equivalent model for a second-order resonator can be made using an inductor and a capacitor. A resistor is always needed in the model to capture the resonator loss (and noise). The resonator nonlinearity can be incorporated in the model for either or both of these energy storing elements. The resonator nonlinearity can include memory effects too. In this section, a simplified nonlinear parallel RLC resonator model is motivated by measurements of a film bulk acoustic resonator (FBAR) showing nonlinear and memory effects (Fig. 2). This simplified model is used in this section to give insight about the effect of nonlinearity and memory of the resonator on phase noise. The analysis with the complete FBAR model will be presented in Section III. FBAR measurements and model validation are presented in Appendix A. The nonlinearity with memory effects is captured in the inductor magnetic flux current relationship as (1) where is the inductance at small power levels and the second term, including , models the nonlinearity. The third term, including , captures the memory effect through convolution of the current, , with a bandpass filter impulse response, , the Laplace transform of which is given by (2) is the steady-state oscillation frequency and is a where fitting parameter. The complete model for the self-sustained nonlinear oscillator with the aforementioned nonlinear resonator is shown in Fig. 2 where the nonlinear active core is modeled as a voltagedependent nonlinear current source . Without the loss of generality in the approach, a third-order polynomial is used to model , i.e., . Current source, , models all the noise that originates from the nonlinear active core and the passive resonator. The noise of the active circuitry may include thermal, shot, and flicker noise sources and is often cyclostationary in steady-state operation of a self-sustained oscillator [25]. The passive resonator noise is typically dominated by a thermal source and also has a flicker component [26]. B. Analysis Consider the oscillator model shown in Fig. 2. Taking the voltage across the capacitor, , and current in the inductor, ,

Fig. 2. General model of a self-sustained oscillator with nonlinear resonator with memory effect.

as independent state variables, the dynamical equations of this second-order nonlinear oscillator can be written as (3) (4) We use quasi-harmonic approximations and averaging technique [20] to find the stochastic differential equations for steady-state amplitude and phase. The quasi-harmonic approximations assume that steady-state solutions are (5) (6) (7) and are much slower where the rates of changes in compared with the steady-state oscillation frequency, . In (5)–(7), is the natural frequency of the nonlinear resonator with small drive, i.e., , and (8) (9) (10) is the step function. In (8) and (9), and and are low-pass filtered versions of and , respectively. Detailed derivation leading to these equations is presented in Appendix C. By inserting the quasi-harmonic approximate solutions (5)–(7) in the dynamical system (3)–(4) and applying averaging, the amplitude and phase stochastic differential equations can be derived as

(11)

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(12)

The second and third terms in the phase stochastic differential (12) are due to resonator nonlinearity and result in the conversion of amplitude noise to frequency noise. It can be shown that when , the amplitude differential (11) has a stable fixed point at (13)

Fig. 3. Graphical representation of phase-noise generation in an oscillator with nonlinear resonator with memory effect.

Now, let us consider the phase differential (12). The stable steady-state solution for the oscillation frequency can be derived as

Therefore, , commonly known as the small-signal transconductance of the active core, can be written as (14) where and has a typical range of 1–3 for reliable start-up under modeling uncertainties and variations in process, temperature, and supply voltage. The amplitude differential equation can be linearized around this stable fixed point, resulting in a linear stochastic differential equation expressed in the standard Ito form [22] as

(19) It can be seen that the steady-state oscillation frequency, , is shifted from the natural frequency of the resonator, , due to resonator nonlinearity and amplitude to frequency conversion. This shift in frequency has been shown before [16]. Assuming small amplitude noise, , the linearized version of the phase stochastic differential (12) is simplified to (20)

(15) (21) (16)

where is the quality factor of the resonator with small drive, denotes the time-domain representation of the amplitude noise, and denotes the time increment of a standard Wiener process. For simplicity, circuit noise, , is assumed to be Gaussian and white with a power spectral density (PSD) given by (17) where is the diffusion constant. The stochastic differential (16) can be solved using standard Ito integral properties (Appendix B). The PSD of amplitude noise, , as a function of frequency will then be (18)

which is a Lorentzian.

is the low-pass filtered version of where to (8) with a PSD given by

similar

(22) In (21), the first term corresponds to the standard diffusion process in nonlinear oscillators with linear resonators. The other terms in (21) are due to the resonator nonlinearity and memory effect and show amplitude to frequency noise conversion. Equation (21) can be intuitively understood by the graphical representation of Fig. 3. The noise contributions from the two branches to phase noise are independent as the noise in the top branch depends on the instantaneous value of the White noise, while the other depends on its history (due to the low-pass function). Fig. 4 shows the contributions of the different noise generation mechanisms on the frequency noise, i.e., derivative of phase noise together with the PSD of amplitude and phase noise based on the derivations in Appendix B and (21) and (22). Notice that the phase noise will have a 40-dB/dec slope when the dominant frequency noise component has 20-dB/dec

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Fig. 4. Contribution of different noise generation mechanisms in the amplitude, frequency, and phase noise power spectral densities.

slope. Based on the methodology presented in Appendix B, the PSD of phase noise can be expressed as Fig. 5. Steady-state oscillation frequency change as a function of power incident on the resonator.

(23) where (24) (25) (26) (27)

Fig. 6. Analysis and simulation of phase noise in the self-sustained oscillator shown in Fig. 2.

(28) and is the PSD of phase noise of the oscillator with a linear resonator. The single-sideband phase noise of the oscillator in dBc/Hz can now be written as . To find the ultimate phase noise achievable using a nonlinear resonator, we consider the noise to be only due to the resonator loss, i.e., (29) where is the Boltzmann constant and is the absolute temperature. Equation (24) can then be written as (30) Equation (30) shows that by increasing the power incident on the resonator, , the phase noise (and consequently, frequency noise) reduces. However, increasing the resonator power leads to an increase in the phase noise due to amplitude-to-frequency noise conversion as observable in (23) and (25). The smallest close-in phase noise is therefore achieved when (31) where is the frequency noise at zero offset frequency . The optimum incident power on the nonlinear resonator to achieve the lowest phase noise is then (32)

At this power level, the phase noise of the oscillator at low offset frequencies, i.e., and , is twice the phase noise achieved if the resonator was linear (long-term stability). It is worthwhile that the oscillator phase noise at high offset frequencies (short-term stability) remains intact whether a linear or a nonlinear resonator is used (Fig. 4). C. Simulations To verify the analysis, the model shown in Fig. 2 was simulated using the time-domain stochastic simulation tool in Cadence Spectre-RF [23]. The simulation parameters are set to , , k , pF, nH, , and . Fig. 5 shows the steadystate oscillation frequency as a function of power incident on the resonator. Fig. 6 shows the analysis and simulation of the single-sideband phase noise as a function of offset frequency mA/V and for linear and nonlinear resonator when mA/V [corresponding to W from (13) and (26)]. Fig. 7 shows the phase noise of the oscillator at 1-kHz offset as a function of the power loss in the resonator. From (32), the optimum power loss in the resonator for optimum W, which is in agreement with phase noise is simulations. III. EXAMPLE: FBAR COLPITTS OSCILLATOR A. Basics The methodology outlined in Section II can be applied to analyze and design oscillators with nonlinear resonators. As an example, let us consider the well-known Colpitts oscillator [24] with a nonlinear FBAR resonator [see Fig. 8(a)]. A bipolar

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(36) (37) (38)

Fig. 7. Analysis and simulation of phase noise as a function of power incident on the resonator.

is the series resonance frequency of the FBAR, where is the series combination of and , and is the oscillation frequency assuming the resonator is linear. The dynamical equations for this Colpitts oscillator are (39) (40) (41) (42) We apply the following quasi-harmonic approximations for the state-space variables: (43) (44) (45) (46) where and . By substituting these approximations into the dynamical equations and applying the averaging technique, the amplitude and phase stochastic differential equations are derived as in (47) and (48) at the bottom of and are modified Bessel functions. this page. In (47), , the stable fixed point of the amplitude Assuming differential equation can be derived as

Fig. 8. Circuit schematic of an FBAR Colpitts oscillator.

junction transistor (BJT) with exponential collector current to base–emitter voltage characteristic is chosen to allow derivation of closed-form solutions for amplitude and phase noise. The nonlinear resonator discussed in Appendix A can be simpli, a nonlinear magnetic energy fied down to a loss element , and a linear capacitive energy storage storage element around the oscillation frequency. The simplified element schematic of the oscillator is shown in Fig. 8(b) where (33) (34) and

is the bias current of the transistor, is equal to , is the collector shot noise, is the charge of is the standard white Gaussian process. As electron, and , is cyclostationary stated before, the active device noise, with respect to time in due to the periodic dependency of steady state. The oscillation frequency and the values for the resonator equivalent model can be written as (35)

(47)

(48) (49) The oscillation steady-state amplitude increases with the dc bias . It should be noted that the steady-state voltage current, . Using swing should be bounded by the dc voltage source, the properties of modified Bessel functions, the amplitude stochastic differential equation can be linearized around its stable fixed point to find the amplitude noise stochastic differential equation as (50)

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(51) is the quality factor of the FBAR reswhere onator at the oscillation frequency under small drive. This stochastic equation can be solved using the procedure explained in Section II and Appendix B. The PSD of the amplitude noise will be (52) Fig. 9. Phase noise at 1-kHz offset as a function of power incident on the resonator in the Colpitts oscillator.

Likewise, the PSD of the phase noise with linear resonator can be written as (53) Substituting from (49), and keeping the equivalent capacconstant, the optimum phase noise under small drive itor . The optimum value of depends level is achieved for on the maximum possible voltage swing as limited by dc power is scaled. As seen in supply and should remain the same as and while (49) and (53), increasing the capacitor values the amplitude of oscillation is kept unchanged will result in improvement of phase noise (scaling). The amplitude of oscillation, , can be kept unchanged by scaling up the current according to (54) (55) Under these conditions, the incident power on the resonator may be written as (56) As seen in this equation, if the conditions of scaling are met, increasing the bias current will result in increasing the incident power on the resonator while oscillation amplitude is kept constant. Notice that the impedance of the resonator changes according to (36)–(38) as the oscillator is scaled. The overall oscillator phase noise with the nonlinear resonator can be written as (57)

Comparing (57) and (23), we see that the phase noise of this Colpitts nonlinear oscillator is similar to that of the basic model of a nonlinear oscillator with the following modification: (62) As long as the conditions for optimal scaling (54)–(55) are met, increasing the power incident on the resonator will improve the phase noise until the amplitude to frequency noise conversion dominates. The optimal power level at which the lowest phase noise at low offset frequencies is achieved can be found to be (63) Although the equations presented here are derived for a BJT with exponential I–V characteristic, the results are applicable to design CMOS Colpitts oscillators as well. This is because BJT and CMOS Colpitts oscillators will have the same oscillation amplitude for the same passive components and bias current [34]. This is shown in simulations where the BJT is replaced with a square-law MOSFET that has the same smallsignal transconductance as the BJT. From simulations, it is observed that the incident power on the resonator, for each current level [by following scaling (54) and (55)], is very close to the BJT counterpart. In Fig. 9, the simulation and analysis of phase noise at 1-kHz offset are plotted versus the power incident on the resonator for bipolar and MOS devices. At each power level, the transistor bias current and capacitors are scaled according V. The resonator parameters are the to (55) to keep same as the model provided in Appendix A. The noise paramis set to 1. As seen in Fig. 9, for both MOS eter of the nMOS and BJT oscillators, there exist an optimal power level beyond which increasing power results in worse phase noise. B. Oscillator Design and Measurements

where (58) (59) (60) (61)

In order to verify the theoretical findings and to achieve the lowest possible phase noise in a resonator-based oscillator, with a fixed topology and FBAR, two Colpitts oscillators that are properly scaled to provide different powers to the resonator were designed (Fig. 10). The active core consists of a pMOS field-effect transistor (FET) instead of an nMOS FET because of its lower flicker noise. Current source is biased using a current mirror and an RC low-pass filter is used to reduce the effect of bias noise on the oscillator performance. As discussed in Section III-A, while drain current,

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Fig. 11. Chip and FBAR on an FR4 board.

Fig. 10. Schematic of the designed CMOS Colpitts oscillators.

, to gate–source voltage, , of a MOSFET is not exponential as in the BJT, which makes the derivations of closed-form solutions tedious and uninsightful, the results of the previous section are still applicable in the CMOS Colpitts oscillator as the steady-state current/voltage waveforms remain very similar [34]. By concurrent scaling of capacitors and , the active core and the current source, the power incident on the FBAR is scaled in the scaled oscillator. The size of main device is chosen to satisfy the start-up condition and provide the optimum swing across the resonator based on the methodology explained in Section III-A. The channel lengths of and are increased to reduce the flicker noise and decrease their output impedance. An on-chip supply regulator minimizes the effect of supply noise on the oscillator performance, and is used under nominal bias conditions where the lowest phase noise is expected. Moreover, the bias voltage of the reference current source can be adjusted off-chip to vary the current of the FBAR oscillator, and hence, the power incident on the FBAR. This is used in measurements to collect more experimental data points for theory verification. Both oscillators were fabricated in a 130-nm CMOS technology, and are followed with on-chip buffers to facilitate measurement in a 50- environment. The power consumption of the buffer is 20 mW to facilitate measuring a low phase-noise floor. The diced chip is mounted on a standard FR4 printed circuit board (PCB) using a conductive epoxy adjacent to the FBAR (Fig. 11). The chip to FBAR connection is through wire-bonds. All reported measurements are performed using RF probes. Phase-noise measurements are done using an Agilent E5052B signal source analyzer. Fig. 12 shows the measured phase noise of the main oscillator versus offset frequency at different power levels together with the simulation result at highest power level. Fig. 13 shows the simulated and measured phase noise of the scaled osillator

Fig. 12. Measurement and simulation of phase noise in the main oscillator.

Fig. 13. Simulated and measured phase noise of the scaled oscillator when the power consumption in the core is 15 mW.

when the output power is 7 dBm and the power consumption in the core is 15 mW. Comparison with simulation with a linear and nonlinear resonator model shows the validity of the proposed FBAR model in predicting the phase noise of the oscillator. Fig. 14 shows the simulated and measured phase noise of the scaled oscillator when the output power is 6 dBm and the power consumption in the core is 20 mW. The theoretical ultimate phase noise achievable using the FBAR resonator from (55)–(63) is also shown. As can be seen in this figure, the measured phase noise is getting close to this ultimate limit in the middle offset frequencies. The divergence at lower offsets is likely due to the active core flicker noise and at higher offsets due to the output buffer phase noise floor. This plot corresponds to the lowest measured phase noise. The absolute phase jitter of

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TABLE I COMPARISON WITH FBAR AND OTHER LOW PHASE-NOISE OSCILLATORS

nonlinear resonator is derived analytically. Design methodologies have been detailed to approach this ultimate phase noise in resonator-based oscillators. A model is proposed to capture the nonlinearity and memory effects in FBARs. These results have been experimentally verified by measuring CMOS FBAR oscillators designed in a 0.13- m technology. The approach introduced in this paper can be extended toward analysis, design, and experimental verification of self-sustained oscillators that benefit from nonlinear resonators. Fig. 14. Simulated and measured phase noise of the scaled oscillator when the power consumption in the core is 20 mW together with the theoretical ultimate phase noise of the resonator.

this oscillator (integrated from 12-kHz to 20-MHz offset frequency) is 9.8 fs. Most electrical oscillators with linear resonators show a phase noise versus frequency offset slope of 30 and 20 dBc/Hz at low and high offset frequencies, corresponding to flicker noise and white thermal noise contributions to the phase noise, respectively, before reaching a constant floor (limited by the output power) [1]. Nonlinearity in the resonator changes this typical behavior as seen in the measured graphs at higher power levels. An increase in the slope of phase noise versus offset at mid offset frequencies is clearly visible. At low offset frequencies, the phase-noise slope is 40 dBc/Hz in both oscillators. The measured performance summary compared with state-of-the-art FBAR oscillators, as well as other types of low phase-noise oscillators, is included in Table I. IV. CONCLUSIONS In this paper, the effect of resonator nonlinearity and memory effect on the phase noise of resonator-based oscillators is analyzed employing averaging technique and properties of stochastic Ito integrals. The ultimate phase noise achievable with a

APPENDIX A FBAR NONLINEAR MODEL Thin film, bulk wave acoustic resonators, or FBARs work based on piezo-electric principle. In the FBAR used in this paper, a thin piezo-electric AlN is used as the piezo-electric material and is sandwiched between two electrodes [31]. The size of the mechanical resonator structure is typically around 100 m 100 m [32]. Fig. 15 shows the well-known modified Butterworth–Van Dyke (BVD) linear equivalent lumped circuit model for an FBAR around its fundamental resonance mode. There is a series resonance frequency, , and a parallel resonance frequency, . The equivalent-circuit parameters are derived by fitting the one-port small-signal -parameter FBAR measurements to the model simulations. One-port small-signal -parameter measurements of our FBAR represented on a Smith chart, as well as on real and imaginary impedance axes versus frequency, are shown in Fig. 16. This FBAR has a series resonance frequency of 1.485 GHz with an unloaded quality factor of 1570 at series resonance and a maximum quality factor of 2500. Measurements of five FBAR samples show consistent results. There are a few ways to measure and characterize the nonlinearity of a passive resonator under large incident power levels. A common technique has been to measure and show the impedance versus

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Fig. 15. FBAR linear BVD equivalent lumped circuit model. Fig. 17. Measured and fitted values for output fundamental and IM3 tones for 100-kHz tone separation.

Fig. 18. Nonlinearity measurement setup.

Fig. 16. Small-signal -parameter measurements of the FBAR and comparison with the BVD model.

frequency for different incident power levels [8]. A more accurate method is the two-tone test where the values of intermodulation (IM) products that are caused due to nonlinearity are measured [21]. Nonlinear terms can be incorporated in one or some of the lumped equivalent-circuit parameters to capture the measured resonator nonlinearity. For instance, a third-order polynomial relating the magnetic flux to the current of the inductor, , in the FBAR model is sufficient to fit the experimental data. Fig. 17 shows the measured and fitted values for output fundamental and third-order intermodulation (IM3) tones when the input two tones are separated by 100 kHz. The measurement setup is shown in Fig. 18. A 1-pF capacitor is put in series with the FBAR to improve the impedance matching and power delivery to the FBAR. During two-tone measurements, we observed that the relative value of IM products and fundamental tones changes as a function of two-tone frequency separation (also observed in [21]). Notice that this effect is observed when the tone separation is low and within the resonator peak and cannot be modeled with a memoryless nonlinearity. This indicates that the resonator nonlinearity includes memory effects. We propose a new analytical model for the resonator nonlinearity including this memory effect (Fig. 19). In this model, the nonlinearity of the FBAR is modeled by adding two nonlinear terms to the magnetic flux , current equation of . The first nonlinear term models the nonlinearity at higher tone separations and the second term

Fig. 19. FBAR nonlinear model including memory effects.

Fig. 20. Measured and modeled IM3 values as a function of two-tone frequency separation when the power absorbed by the FBAR is 6 dBm.

will increase the IM products at lower tone separations through the convolution with the impulse response of a bandpass filter with impulse response . Fig. 20 shows the measured and modeled IM3 values as a function of two-tone frequency separation when the FBAR absorbed power is 6 dBm. At present, the physical reason behind this memory effect in the nonlinear FBAR is not known to us, and is the subject for possible future research.

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APPENDIX B SOLUTIONS TO AMPLITUDE AND PHASE STOCHASTIC DIFFERENTIAL EQUATIONS (70)

The phase stochastic differential equation was derived in Section II as

(64) where is the time derivative of phase noise (frequency noise). As discussed in Section II, the first and second terms on the right-hand side are independent and may be treated separately. The first term corresponds to the standard diffusion process in nonlinear oscillators with linear resonators. It can be shown [2] that , when considering the standard diffusion term, is a Wiener process with parameter

(71) where is the increment of a standard Wiener process (Brownian motion) and . To find the PSD of the amplitude noise when the oscillator has reached its steady state, the amplitude noise autocorrelation function is found as time goes to infinity as in (72) and (73), shown at the bottom of this page. From (71), the second expectation in the right-hand side of (72) is zero and from (70), the first expectation can be written as

(74)

(65) that is also called the Lorentzian corner of the phase noise or the linewidth of the oscillator. In Section II, the amplitude noise stochastic differential equation was derived as (66) (67)

(75) Assuming the phase changes slowly (phase changes much less than over one period), the second term on the right-hand side of (75) may be neglected. The amplitude noise autocorrelation function and PSD can then be written as

The solution to this linear stochastic differential equation may be written as [22] (76) (77)

(68) To solve this equation, we will use the properties of Ito stochastic integrals. Consider the bounded adapted stochastic process . The following equations can be proven [22]: (69)

APPENDIX C BANDPASS FILTER OUTPUT In this appendix, the output of filter with the impulse response to an amplitude and a phase modulated sinusoid is

(72) (73)

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REFERENCES

Fig. 21. Bandpass filter used to model memory effect with an amplitude and phase modulated input.

calculated (Fig. 21). The differential equation of this system can be written as (78) The equivalent dynamical equations of this system can be written as (79) (80) The following quasi-harmonic assumptions for input and output are made: (81) (82) (83) By plugging these approximations into the dynamical equations (78)–(79) and applying averaging, the amplitude and phase differential equations can be derived as

(84) (85) where and are the steady-state amplitudes at the input and output. Assuming , both amplitude and phase differential equations will reduce to the differential equation of a first-order low-pass filter with a pole at . Since the linewidth of the oscillator is typically much smaller than , this assumption is valid. ACKNOWLEDGMENT The authors acknowledge the support and technical information provided by Dr. R. Ruby, Avago Technologies, San Jose, CA. The FBAR resonators were provided by Avago Technologies.

[1] D. B. Leeson, “A simple model of feedback oscillator noise spectrum,” Proc. IEEE, vol. 54, no. 2, pp. 329–330, Feb. 1966. [2] M. Lax, “Classical noise V: Noise in self-sustained oscillators,” Phys. Rev., vol. CAS-160, pp. 290–307, Aug. 1967. [3] M. Rinaldi, C. Zuniga, and G. Piazza, “5–10 GHz contour-mode nanoelectromechanical resonators,” in 22th IEEE Int. MEMS Conf., Jan. 2009, pp. 916–919. [4] R. B. Karabalin, M. H. Matheny, X. L. Feng, E. Defaÿ, G. L. Rhun, C. Marcoux, S. Hentz, P. Andreucci, and M. L. Roukes, “Piezoelectric nanoelectromechanical resonators based on aluminum nitride thin films,” Appl. Phys. Lett., vol. 95, pp. 103–111, 2009. [5] A. Kraus, A. Erbe, R. H. Blick, G. Corso, and K. Richter, “Parametric frequency tuning of phase-locked nanoelectromechanical resonators,” Appl. Phys. Lett., vol. 79, pp. 3521–3523, 2001. [6] X. L. Feng, R. He, P. Yang, and M. L. Roukes, “Very high frequency silicon nanowire electromechanical resonators,” Nano Lett., vol. 7, pp. 1953–1959, 2007. [7] M. Agarwal, K. K. Park, R. N. Candler, B. Kim, M. A. Hopcroft, S. A. Chandorkar, C. M. Jha, R. Melamud, T. W. Kenny, and B. Murmann, “Nonlinear characterization of electrostatic MEMS resonators,” in Proc. IEEE Freq. Control Symp., Miami, FL, Jun. 2006, pp. 209–212. [8] M. Ueda, M. Iwaki, T. Nishihara, Y. Satoh, and K. Y. Hashimoto, “Investigation on nonlinear distortion of acoustic devices for radiofrequency applications and its suppression,” in Proc. IEEE Ultrason. Symp., Sep. 2009, pp. 876–879. [9] I. Kozinsky, H. W. C. Postma, O. Kogan, A. Husain, and M. L. Roukes, “Basins of attraction of a nonlinear nanomechanical resonator,” Phys. Rev. Lett., vol. 99, 2007. [10] A. Eichler, J. Moser, J. Chaste, M. Zdrojek, I. Wilson-Rae, and A. Bachtold, “Nonlinear damping in mechanical resonators madefrom carbon nanotubes and graphene,” Nature Nanotechnol., vol. 6, pp. 339–342, Jun. 2011. [11] V. Kaajakari, J. K. Koskinen, and T. Mattila, “Phase noise in capacitively coupled micromechanical oscillators,” IEEE Trans. Ultrason., Ferroelect., Freq. Contr., vol. 52, no. 12, pp. 2322–2331, Dec. 2005. [12] M. Pardo, L. Sorenson, W. Pan, and F. Ayazi, “Phase noise shaping via forced nonlinearity in piezoelectrically actuated silicon micromechanical oscillators,” in 24th IEEE Int. MEMS Conf., Cancun, Mexico, Jan. 2011, pp. 780–783. [13] S. A. Svetlana, N. Klein, A. G. Zaitsev, and J. Geerk, “Phase noise of an HTS resonator operated in the nonlinear regime,” IEEE Trans. Appl. Superconduct., vol. 13, no. 2, pp. 324–327, Jun. 2003. [14] L. He, Y. P. Xu, and M. Palaniapan, “A state-space phase-noise model for nonlinear MEMS oscillators employing automatic amplitude control,” IEEE Trans. Circuits Syst., vol. 57, no. 1, pp. 189–199, Jan. 2010. [15] M. Pardo, L. Sorenson, and F. Ayazi, “A phase-noise model for nonlinear piezoelectrically-actuated MEMS oscillator,” in IEEE Int Circuits Syst. Symp., 2011, pp. 221–224. [16] P. Ward and A. Duwel, “Oscillator phase noise: Systematic construction of an analytical model encompassing nonlinearity,” IEEE Trans. Ultrason., Ferroelect., Freq. Contr., vol. 58, no. 1, pp. 195–205, Jan. 2011. [17] B. Yurke, D. S. Greywall, A. N. Pargellis, and P. A. Busch, “Theory of amplifier-noise evasion in an oscillator employing a nonlinear resonator,” Phys. Rev. A, Gen. Phys., vol. 51, pp. 4211–4229, 1995. [18] H. K. Lee, P. A. Ward, A. E. Duwel, J. C. Salvia, Y. Q. Qu, R. Melamud, S. A. Chandorkar, M. A. Hopcroft, B. Kim, and T. W. Kenny, “Verification of the phase-noise model for MEMS oscillators operating in the nonlinear regime,” in IEEE Int. Solid-State Sensors, Actuators, Microsyst. Conf., 2011, pp. 510–513. [19] D. Chang, “Dynamics enabled quartz reference oscillators,” DARPA DEFYS Program Rev. Jul. 2011. [20] N. Kryloff and N. Bogoliuboff, Introduction to Nonlinear Mechanics. Princeton, NJ: Princeton Univ. Press, 1947. [21] D. A. Feld, “One-parameter nonlinear Mason model for predicting 2nd and 3rd order nonlinearities in BAW devices,” in IEEE Int. Ultrason. Symp., 2009, pp. 1082–1087. [22] B. K. Oksendal, Stochastic Differential Equations: An Introduction with Applications, 5th ed. Berlin, Germany: Springer, 2010. [23] Virtuoso SpectreRF Simulation Option User Guide. Berkshire, U.K.: Cadence, 2009.

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[24] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits, 2nd ed. Cambridge, U.K.: Cambridge Univ. Press, 2004. [25] A. Hajimiri and T. H. Lee, “A general theory of phase noise in electrical oscillators,” IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 179–194, Feb. 1998. [26] S. Gribaldo, C. Chay, E. Tournier, and O. Llopis, “Experimental study of phase noise in FBAR resonators,” IEEE Trans. Ultrason., Ferroelectr., Freq. Control, vol. 53, no. 11, pp. 1982–1987, Nov. 2006. [27] W. Pang, W. Pang, R. C. Ruby, R. Parker, P. W. Fisher, and M. A. Unkrich, “A temperature-stable film bulk acoustic wave oscillator,” IEEE Electron Device Lett., vol. 29, no. 2, pp. 315–318, Apr. 2008. [28] S. Rai, Y. Su, W. Pang, R. Ruby, and B. Otis, “A digitally compensated 1.5 GHz CMOS/FBAR frequency reference,” IEEE Trans. Ultrason. Ferrroelectr., Freq. Control, vol. 57, no. 3, pp. 552–561, Mar. 2010. [29] E. N. Ivanov and M. E. Tobar, “Low phase-noise microwave oscillators with interferometric signal processing,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 8, pp. 3284–3294, Aug. 2006. [30] T. M. Fortier, C. W. Nelson, A. Hati, F. Quinlan, J. Taylor, H. Jiang, C. W. Chou, N. Lemke, A. Ludlow, D. Howe, C. W. Oates, and S. A. Diddams, “A hybrid 10 GHz photonic-microwave oscillator with sub-femtosecond absolute timing jitter,” in IEEE Freq. Control Symp. Dig., May 2012, pp. 1–2. [31] Q. Zou, D. Lee, F. Bi, R. Ruby, M. Small, S. Ortiz, Y. Oshmyansky, and J. Kaitila, “High coupling coefficient Temperature compensated FBAR resonator for oscillator application with wide pulling range,” in IEEE Freq. Control Symp. Dig., Jun. 2010, pp. 646–651. [32] J. R. Hu, R. C. Ruby, and B. C. Otis, “A 1.56 GHz wide-tuning all digital FBAR-based PLL in 0.13 m CMOS,” in IEEE Custom Integr. Circuits Conf., Sep. 2010, pp. 1–4. [33] F. Zhang, S. R. Gilbert, F. Bi, S. Ortiz, B. Otis, and R. C. Ruby, “A 2.6 GHz, 25 fs jitter, differential chip scale oscillator that is 1 mm in area and 0.25 mm tall,” in IEEE Freq. Control Symp. Dig., May 2012, pp. 1–4. [34] A. Fard and P. Andreani, “An analysis of phase noise in Bipolar Colpitts oscillators (with a digression on bipolar differential-pair LC oscillators),” IEEE J. Solid-State Circuits, vol. 42, no. 2, pp. 374–384, Feb. 2007. [35] A. Nelson, J. Hu, J. Kaitila, R. Ruby, and B. Otis, “A 22 W, 2.0 GHz FBAR oscillator,” in IEEE Radio Freq. Integr. Circuits Symp. Dig., 2011, pp. 1–4. [36] J. Shi and B. Otis, “A sub-100 W 2 GHz differential Colpitts CMOS/ FBAR VCO,” in Proc. IEEE Custom Integr. Circuits Conf., 2011, pp. 1–4.

Alireza Imani (S’08) received the B.S. and M.S. degrees in electronics engineering from the Sharif University of Technology, Tehran, Iran, in 2006 and 2008, respectively, and is currently working toward the Ph.D. degree in electrical engineering at the University of Southern California (USC), Los Angeles. His research interests include analog and RF integrated circuits, noise in nonlinear dynamical systems, and frequency control. Mr. Imani was ranked first in the National Olympiad of Electrical Engineering in 2006.

Hossein Hashemi (SM’08) received the B.S. and M.S. degrees in electronics engineering from the Sharif University of Technology, Tehran, Iran, in 1997 and 1999, respectively, and the M.S. and Ph.D. degrees in electrical engineering from the California Institute of Technology, Pasadena, in 2001 and 2003, respectively. In 2003, he joined the Ming Hsieh Department of Electrical Engineering–Electrophysics, University of Southern California (USC), Los Angeles, where he is currently an Associate Professor, Ming Hsieh Faculty Fellow, and Co-Director of the Ming Hsieh Institute. His research interests span mathematics, physics, and realization of integrated electrical and optical systems. Dr. Hashemi currently serves on the Technical Program Committees of the IEEE International Solid-State Circuits Conference (ISSCC), IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, and the IEEE Compound Semiconductor Integrated Circuits (CSICS) Symposium. He was the associate editor for the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—PART I: REGULAR PAPERS (2006–2007) and the associate editor for the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—PART II: EXPRESS BRIEFS (2004–2005). He was the recipient of the 2008 Defense Advanced Research Projects Agency (DARPA) Young Faculty Award and the National Science Foundation (NSF) CAREER Award. He was also the recipient of the 2008 USC Viterbi School of Engineering Junior Faculty Research Award. He was recognized as a Distinguished Scholar for the Outstanding Achievement in Advancement of Engineering by the Association of Professors and Scholars of Iranian Heritage in 2011. He was a corecipient of the 2004 IEEE JOURNAL OF SOLID-STATE CIRCUITS Best Paper Award and the 2007 IEEE International Solid-State Circuits Conference (ISSCC) Lewis Winner Award for Outstanding Paper.

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Broadband CMOS Millimeter-Wave Frequency Multiplier With Vivaldi Antenna in 3-D Chip-Scale Packaging Lorenzo Tripodi, Member, IEEE, Xin Hu, Reiner Götzen, Marion K. Matters-Kammerer, Dave van Goor, Shi Cheng, Member, IEEE, and Anders Rydberg, Member, IEEE

Abstract—This paper describes a frequency multiplier able to emit a broadband signal with a frequency range from 70 GHz up to at least 170 GHz. The device is composed of a nonlinear transmission line (NLTL) implemented in commercial CMOS 65-nm technology and an off-chip Vivaldi antenna. These two elements are packaged together with a 3-D chip-scale packaging technology. Characterization of the whole device and of the standalone NLTL is presented at frequencies up to 170 GHz. Index Terms—Chip-scale packaging, nonlinear transmission line (NLTL), 65-nm CMOS, Vivaldi antenna.

I. INTRODUCTION

D

EVICES ABLE to generate or detect millimeter wave (30–300 GHz) or terahertz radiation (300 GHz–10 THz) have been demonstrated by several groups [1] and a multitude of applications in those bands are currently developed in the areas of imaging, communication, and spectroscopy/sensing [1], [2]. Many terhartz devices are based on femtosecond lasers [3], quantum cascade lasers [4], or frequency mixing [22] and concepts based on superconductors have been proposed and are currently under investigation [24]. It has also been demonstrated that electronic techniques, based on gallium–arsenide (GaAs) technology, allow terahertz spectroscopy or imaging with frequencies extending up to 1 THz [5], [6]. Recently, the opportunity given by modern commercial CMOS technology to

Manuscript received May 29, 2012; accepted September 17, 2012. Date of publication October 19, 2012; date of current version December 13, 2012. This work was supported by the European Community’s Seventh Framework Programme under Grant FP7-224189 (ULTRA Project). L. Tripodi and D. van Goor are with the Micro Systems and Devices Group, Philips Research, 5656 AE Eindhoven, The Netherlands (e-mail: [email protected]). X. Hu was with the Microwave Group, Uppsala University, 753 10 Uppsala, Sweden. She is now with ABB, 771 32 Ludvika, Sweden. R. Götzen is with microTEC Gesellschaft für Mikrotechnologie mbH, 47057 Duisburg, Germany. M. K. Matters-Kammerer was with the Micro Systems and Devices Group, Philips Research, 5656 AE Eindhoven, The Netherlands. She is now with the Department of Mixed-Signal Microelectronics, Technical University of Eindhoven, 5612 AZ Eindhoven, The Netherlands. S. Cheng was with the Department of Engineering Science, Uppsala University, 753 10 Uppsala, Sweden. He is now with the Digital Radio Division, Ericsson AB, 21-23 Kista, Sweden. A. Rydberg is with the Department of Engineering Science, Uppsala University, 753 10 Uppsala, Sweden. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2220564

build miniaturized millimeter-wave and terahertz sources and detectors has led to a number of publications [7]–[14]. CMOS offers several advantages compared to other technologies [14], and its capability to integrate a large number of components in a highly miniaturized chip paves the way to new applications. The work discussed in this paper presents a broadband frequency multiplier integrated into a hybrid module. For the first time, a 65-nm CMOS nonlinear transmission line (NLTL) is assembled with an off-chip broadband Vivaldi antenna using a commercial 3-D chip-scale packaging (3D-CSP) technology [15]–[17]. Previous work has already shown the possibility to generate and emit broadband signals above 100 GHz in CMOS [10] using an integrated NLTL and an on-chip antenna. In this study, an off-chip antenna is used to overcome the design restrictions imposed by the on-chip antenna choice made in [10]. The connection between the on-chip NLTL and the off-chip antenna is successfully implemented in the packaging procedure allowing the device in this work to outperform the previous device by 8 dB or more in terms of generated output power in almost the whole measurement band. The results achieved in this study clearly show the possibility to build highly compact and low-cost broadband emitters that can be produced in high volumes and can be used in novel terahertz or millimeter-wave applications in fields currently inaccessible by other terahertz technologies. Of special interest here are potential applications in the consumer market, where ultra-low cost, high volume, and reasonable performance are compulsory. The layout and design of the module is described in detail in Section II. Measurement results, presented in Section III, demonstrate that the device is capable of producing an output signal in the frequency range from 70 to 170 GHz. In Section IV, conclusions are drawn. Earlier works on electronic terahertz systems in GaAs technology have already shown that this type of broadband transmitter can be combined with a coherent receiver for spectroscopy and imaging applications [5], [6]. II. MODULE DESIGN AND LAYOUT The hybrid millimeter-wave frequency multiplier described in this study is composed of two parts: a chip containing an NLTL fabricated in a commercial 65-nm CMOS technology and an off-chip broadband Vivaldi antenna. The two parts are packaged and connected together using a commercial packaging process.

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TABLE I PARAMETERS OF THE DESIGNED NLTL

Fig. 1. Simplified cross section of the modified CPW used.

A. NLTL Design The NLTL implemented in this study is composed of a modified coplanar waveguide (CPW) periodically loaded with RF MOS varactors type n -poly/n-well. A simplified cross section of this modified CPW used is shown in Fig. 1. Whereas in GaAs technology a standard CPW is sufficient, a different structure is required in CMOS technology to confine the field lines in the low-loss backend dielectric layers and prevent field penetration into the low-resistivity silicon substrate. The lateral shield is used to screen the field from interference with other, closely located circuits and allows, at the same time, to satisfy the CMOS density rules. Fig. 2 shows a simplified schematic of the NLTL. A relatively low-frequency sinusoidal signal, say, 6 GHz, is injected at the input of the line and harmonics are generated by the nonlinear capacitance of the varactors distributed along the line. The traveling sinusoidal signal is deformed to have one of its edges steepened [23] with a transition from maximum to minimum voltage faster than in the input sinusoid. The line has been designed exploiting the equations reported in [18] with a procedure adapted to respect the CMOS design rules and to minimize the fall time of the signal at the output of the NLTL. A minimized fall time is particularly useful for imaging and time-domain reflectometry applications. The crucial parameters of the line are [18]: the Bragg frequency , the varactors cutoff frequency , the line capacitance and inductance per section, the varactor large-signal capacitance , and the periodically loaded and the unloaded line characteristic impedance. is the characteristic impedance of the NLTL, i.e., the modified CPW periodically loaded with the varactors, and it is chosen to be 50 to simplify tests with standard measurement instrumentation. is the characteristic impedance of the modified CPW and it is chosen to be 87 , i.e., the maximum value that could be achieved with the modified CPW geometry selected for this study. Maximum implies minimum (linear) line capacitance in shunt with the varactors. Linear line capacitance should be minimized because it reduces the nonlinear effect of the varactors and their capability to steepen the propagating signal. The benefit of a lower line capacitance (and hence, a usually higher characteristic impedance) achieved with a narrow signal line must be traded off with the higher losses that such a narrow line would introduce. This tradeoff is more stringent in CMOS than in GaAs NLTLs due to the fact that, in the latter, a ground metallic plane is either absent or usually located hundreds of micrometers away from the signal line. In the process used in this study, the distance of the signal line from the ground plane is less than 10 m and the maximum characteristic impedance achievable is limited by this value.

Fig. 2. Approximation of the NLTL using a nonlinear ladder network.

The design algorithm used has been discussed in [11] and it is summarized here for completeness along with the design parameters of the NLTL. To minimize the fall time of the signal at the output of the NLTL, the algorithm starts by choosing a certain varactor size and by calculating the associated . From the design equations and the fixed values for and , the unknown line parameters, including the Bragg frequency, which delimits the lowest passband of the NLTL, are calculated and the 90%–10% fall time of the signal at the output of the line is simulated using a circuit simulator [20]. The input signal used during the design procedure is a step with 90%–10% fall time of 16 ps. The algorithm keeps changing the varactor size at each simulation until the minimum fall time is achieved. The final parameters chosen are those that minimize the fall time and are reported in Table I along with the minimum fall time of 2.7 ps achieved. The simulations are carried out on a simplified NLTL schematic (Fig. 2), where the series parasitic resistance of the varactors is taken into account, but the losses related to the resistance of the line are neglected in this first phase; hence, the fall time is underestimated. The linear sections of the NLTL are approximated by a series inductor and a shunt capacitance . Considering that the length of each section is much smaller than one-tenth of the minimum wavelength of the signal propagating along the line, such an approximation is acceptable. The length of the line sections is 37.4 m and is calculated as the ratio , where is the inductance per meter of the modified CPW. The NLTL is straight, consists of sections and has a total length of mm. All the sections are identical. In future work, tapering and optimization of the number of cells is seen as an improvement option, as shown already in [18] for GaAs NLTLs. The -parameter matrix of each modified CPW section is simulated using a commercial electromagnetic simulator [21] and then converted into an equivalent SPICE model. This model is combined in a circuit simulator [20] with

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Fig. 3. Time-domain NLTL simulation results. The signal at the generator (be. The signal at the output of the NLTL is . fore source impedance) is

the varactor’s model so that the behavior of the complete NLTL, including varactor and modified CPW parasitics, can be simulated. As shown in Fig. 3, the input signal from the signal generator (i.e., before the 50- source impedance) is a step with 90%–10% fall time of 16 ps and a peak-to-peak amplitude of 8 V. In the same figure, the signal simulated at the end of the line is shown. The achieved fall time, including all main NLTL parasitic, is 4.4 ps (to be compared with the 2.7 ps achieved when the losses of the modified CPW are not taken into account in the simulation). B. Vivaldi Antenna and Package Design To transmit the wideband signal generated by the NLTL, a suitable tapered slot antenna (TSA), also referred as a Vivaldi antenna [19], [25], was designed. The choice of such a TSA was mainly due to its compact size, broad impedance bandwidth, high directivity, as well as its zero beam squint and end-fire radiation pattern over a wide frequency range. Its superior purity of linear polarization is greatly favoured in terahertz imaging systems or diagnostic tools to minimize distortions from unwanted scattering and reflections. Though the chosen Vivaldi antenna contains a large number of small features, it is purely planar and enables a cost-effective solution for implementing millimeter-wave and terahertz antennas other than commonly used micromachining-based high-frequency antennas. Considering the losses of the CMOS substrate and its cost per area, an off-chip antenna has been used in this study. As shown in Fig. 4(a), the broadband antenna consists of a gradual transition from a microstrip line to a broadside coupled line, followed by a flared slot formed by two identical elliptical tapers. Not only does this tapered transition convert 50- impedance at the microstrip input to a high impedance of the coupled line, but it also acts as a balun between single-ended and differential modes. In general, impedance and radiation characteristics of this category of TSAs are not very sensitive to the exact shape of the slot, as long as its tapering is gradual. An elliptically TSA was chosen for its ease of design and implementation. The width of the open slot is mm, the radius of the gradual transition is mm, and the length of the

Fig. 4. (a) Bottom view of the off-chip antenna and detailed view of the transition. (b) Detailed cross section of the transition between the NLTL and microstrip line embedded in the polymer package, displaying the location of the vias and metal layers (dark grey) and the polymer layers (light grey), as well as the air gap on top of the CMOS substrate.

slot taper is mm. The length of the microstrip line is 0.571 mm, with center conductor width of 0.072 mm. The antenna is manufactured on two polymer membranes (so-called RMPD layers, ) for support of a metallization layer made of NiCr (200-nm thick) and Cu (3- m thick) and contains integrated air cavities to reduce the dielectric loss in the polymer substrate. The ground layer of the antenna is separately produced with RMPD and attached with the same polymer and conductive glue. Low-loss interconnects at millimeter-wave and terahertz frequencies are crucial for the hybrid solution adopted in this study. Although various techniques, e.g., hot-via and embedded thin die, have been successfully demonstrated at lower millimeter-wave frequencies, interconnects at frequencies higher than 100 GHz have not yet been reported in literature. In this paper, the antenna is connected to the NLTL line through microvias using a 3-D chip-scale technology, as shown in Fig. 4(b). This technology allows the production of microparts and microsystems without tooling, using a parallel batch production process [15]–[17] on substrates up to 14 in. In the structure described here, the ground plane of the CMOS NLTL is connected with two vias to the ground plane of the microstrip line in the polymer package. Another via connects the center conductor of the CMOS NLTL to the signal conductor of the microstrip line. The vias (signal 40 40 m; ground 40 50 m) pass through a 25- m-thick partial polymer layer Hc on top of the CMOS chip and subsequently through a 20- m-thick air gap H. The partial polymer layer is directly produced with RMPD. The air gap minimizes the dielectric losses. The thickness of the upper RMPD layer including the ground layer is Hm m.

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TABLE II CONVERSION LOSSES OF THE MIXERS USED IN THE MEASUREMENT SETUP

Fig. 5. Chip microphotograph of various NLTL designs.

Fig. 6. Measured versus simulated output power of the NLTL. The dc bias on the NLTL is 0 V. The input power is 18 dBm at 6 GHz (data from [11]).

III. MEASUREMENTS RESULTS A. NLTL A photograph of several versions of the NLTL used in this study is shown in Fig. 5. The process chosen is 65-nm CMOS from foundry TSMC. The measurement results reported in Fig. 6 are carried out in bands. An Agilent signal generator type PSG E8257D and an Agilent spectrum analyzer type PSA E4448A are used from 6 to 50 GHz. To extend the measurement bandwidth from 50 to 67 GHz, an Agilent mixer type 11970 V was used. From the available power at the generator and the measured power at the spectrum analyzer, the actual power at the input and the output of the line under test is calculated measuring the losses of cables, connectors, and probes using an on-chip thru and an Agilent vector network analyzer type PNA E8361A. Since the length of the thru on chip is only 200 m, a small length compared to the millimeters-long NLTLs, and because everything is well matched to 50 , it is possible to determine with good precision the losses that the signal suffers before the input of the NLTLs and after its output. The measured losses of one cable plus probe are 2 dB at 6 GHz and 9 dB at 66 GHz. The conversion losses of the mixer were automatically corrected by the spectrum analyzer using data from the manufacturer. In the band from 78 to 168 GHz, the output spectrum was measured using an Agilent spectrum analyzer type E4440A with an Agilent harmonic mixer type 11970W (78–108 GHz), and a Pacific Millimeter Products (PMP) harmonic mixer DM

connected with a diplexer type MD1A (114–168 GHz). The conversion loss of the PMP harmonic mixer was calibrated using a WR-6 band signal source, a WR-6 band attenuator, an Agilent spectrum analyzer type PSA E4440A, and a sub-millimeter power meter Erickson type PM2. The insertion losses of the RF input cable and input Cascade Microtech Infinity probe (I67-75-S) were compensated. An Anritsu RF/Microwave signal generator type MG3694A was used. In the 78–168-GHz range, the insertion loss of the output probe and the conversion loss of the harmonic mixers (shown in Table II) have been used to correct the measured output power. The measured large-signal output spectrum is compared with simulations in Fig. 6. In measurements, a sinusoidal signal is injected at the input of the line. For this experiment, and as an example, a signal at 6 GHz has been chosen. Since the NLTL is a broadband device, other input frequencies can be used as well, and depending on the requirements of the final application, an optimized input frequency can be selected. The input power calculated taking into account the available power of the instrument and the losses of the input wires and RF microprobes was 18 dBm. The simulations are carried out as described in Section II-A and include both varactor and CPW losses. In these simulations, the input signal chosen is a sinusoid with 2.5-V peak voltage at the input of the line, which corresponds to an input power of 18 dBm as in the measurements. The varactor model includes the parasitic resistance and a stray capacitance of 2 fF. The parasitic capacitance of the input and output bonding pads (26 fF) is also included in the simulation. The generated power shown in the figure is at multiples of the input signal frequency, 6 GHz, and the continuous lines in the figure are added simply as a guide for the eye. Simulations and measurements match well across almost the complete measured band, indicating good control over the design procedure and the parasitics. B. Hybrid Module A photograph of the broadband device is shown in Fig. 7. The entire device (12.5 mm 4.5 mm) is embedded into a 3-D structured polymer. Simulations have been performed to study the RF behavior of the interconnects, as well as the impedance matching and the radiation pattern of the antenna. As shown in Fig. 8(a), the reflection and transmission coefficients of the vias [see Fig. 4(b)] between the CMOS chip and the antenna indicate that a relatively low-loss transition up to 300 GHz is realized. As shown in Fig. 8(b), the off-chip antenna achieves a simulated impedance bandwidth ( dB) of

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Fig. 9. Experimental setup used to measure the output power and the radiation pattern of the antenna.

Fig. 7. Photograph of the hybrid module consisting of the NLTL integrated circuit assembled with the broadband antenna.

Fig. 8. (a) Simulated reflection and transmission coefficient of the via interconnect between the NLTL on the CMOS chip and the antenna in the polymer package. (b) Simulated impedance matching of the antenna.

160–700 GHz. At lower frequencies, the matching is less good. This can be improved by lengthening the slot taper. The radiated output power, as well as the antenna radiation pattern, are measured in the WR-10 and WR-6 band with the setup shown in Fig. 9. An RF/microwave signal generator Anritsu MG3694A feeds the NLTL through a Cascade Microtech Infinity probe (I67-

GSG-75) with a signal at 10 GHz and 18-dBm power. Standard horn antennas for WR-10 (Flan 27240-20 with a midband gain of 20 dB) and WR-6 (Quinstar QWH-DPRR00 with a midband gain of 24 dB) bands are used to receive the power at a distance from the transmitter module. In the WR-10 band, the output spectrum is measured with an Agilent spectrum analyzer E4440A plus an Agilent 11970W harmonic mixer. In the WR-6 band, a PMP harmonic mixer DM connected with a diplexer MD1A is used. Fig. 10 shows the simulated and measured co-polarization normalized gain radiation pattern of the broadband antenna at 90, 120, and 150 GHz. The antenna features directive radiation patterns over the entire frequency range. Due to the presence of the polymer package below the antenna and the CMOS die, the pattern is tilted away from the end-fire direction in the -plane. Numerical results indicate that an antenna (including the 3-D structured polymer) radiation efficiency of more than 70% is achieved. Fig. 11 shows the measured output power of the standalone NLTL, and the radiated power in the end-fire direction of the transmitter. The radiated power is measured at 10-, 20-, and 30-cm distances from the Vivaldi antenna in the end-fire direction. Although the antenna matching is rather poor in the measured frequency band, a power greater than 80.3 dBm (gain of the receiving antenna is not de-embedded) has been measured up to 170 GHz at 30-cm distance. It should be also remarked that only a fraction of the total power generated by the NLTL is measured in the end-fire direction (the free-space losses are, at this frequency and distance, around 67 dB). As shown in Fig. 10(c), the measured normalized gain radiation pattern agrees with the simulation results very well so the total power emitted at 150 GHz can be estimated by integrating the power over all directions according to the simulated full-sphere radiation pattern. With an input signal at 10 GHz and 18-dBm power, the resulting simulated power at 150 GHz is 35.3 dBm, i.e., around 4.7 dB less than the power generated at the same frequency by the standalone NLTL. The difference is mostly due to three effects: the losses of the chip-antenna interconnect, the antenna mismatch, and the antenna radiation efficiency. Depending on the final application, and if higher power is especially required at lower frequencies, the impedance matching of the antenna below 110 GHz can be optimized further by utilizing a larger antenna. The gain of the antenna could be improved by adding

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Fig. 11. Measured output power of the standalone NLTL and the radiated power in the end-fire direction of the hybrid transmitter module at distances equal to 10, 20, and 30 cm. The input power is 18 dBm at 10 GHz.

TABLE III PERFORMANCE COMPARISON WITH PRIOR ART

Fig. 10. Simulated and measured co-polarization normalized gain radiation patterns in - and -plane of the antenna at: (a) 90 GHz, (b) 120 GHz, and (c) 150 GHz.

a low-loss lens in front of the slot taper. Due to the lack of instrumentation, the measurements have been carried out only up to 170 GHz, but the system is expected to work well beyond that frequency. This is the reason why an antenna with a compact size has been designed with good matching at higher frequencies. Several CMOS devices able to generate frequencies beyond 100 GHz have been demonstrated in the recent literature. A summary of the performance of such devices is shown in Table III. The frequency of operation and the power detected at a certain distance from the devices are the characteristics reported. A direct performance comparison is possible with the device described in [10] because, as with the module described in this study, it is a broadband frequency multiplier and the devices are measured in equal conditions. The module of this study performs better than [10] on the whole measured band

in terms of generated power, also showing an improvement of 14 dB at 160 GHz in equal measurement conditions. The other devices described in the literature are narrowband frequency generators rather than frequency multipliers and a direct comparison of the generated power at a certain frequency is not possible. The data in Table III are reported for completeness. One device [8] is equipped with an on-chip patch antenna, the others are measured directly on-wafer and do not suffer antenna or free-space propagation losses. IV. CONCLUSION A hybrid frequency multiplier composed of a 65-nm CMOS NLTL and a Vivaldi off-chip antenna has been presented. Measurements of the module have demonstrated its capability to generate extremely wideband signals up to at least 170 GHz and with a total emitted power of around 35 dBm at 150 GHz when an input signal at 10 GHz with a power of 18 dBm is provided. The standalone NLTL has been tested with input signals at 6 and 10 GHz and is able to generate a broadband signal from 6 to 170 GHz at least with a power of around 30 dBm at 150 GHz and 37 dBm at 170 GHz when its input signal is at

TRIPODI et al.: BROADBAND CMOS MILLIMETER-WAVE FREQUENCY MULTIPLIER

10 GHz and has a power of 18 dBm. The off-chip Vivaldi antenna shows directive radiation pattern in the whole measured band of 90–150 GHz and simulations show an efficiency of 70%.

REFERENCES [1] P. H. Siegel, “Terahertz technology,” IEEE Trans. Microw. Theory Techn., vol. 50, no. 3, pp. 910–928, Mar. 2002. [2] P. H. Siegel, “Terahertz technology in biology and medicine,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 10, pp. 2438–2447, Oct. 2004. [3] B. B. Hu and M. C. Nuss, “Imaging with terahertz waves,” Opt. Lett., vol. 20, no. 16, pp. 1716–1718, Aug. 1995. [4] R. Köhler, A. Tredicucci, F. Beltram, H. E. Beere, E. H. Linfield, A. G. Davies, D. A. Ritchie, R. C. Iotti, and F. Rossi, “Terahertz semiconductor-heterostructure laser,” Nature, vol. 417, pp. 156–159, May 9, 2002. [5] J. S. Bostak, D. W. van der Weide, D. M. Bloom, and B. A. Auld, “All-electronic terahertz spectroscopy system with terahertz free-space pulses,” J. Opt. Soc. Amer. B, Opt. Phys., vol. 11, no. 12, pp. 2561–2565, Dec. 1994. [6] Y. Konishi et al., “Picosecond electrical spectroscopy using monolithic GaAs circuits,” App. Phys. Lett., vol. 61, no. 63, pp. 2829–2831, Dec. 1992. [7] D. Huang et al., “Terahertz CMOS frequency generator using linear superposition technique,” IEEE J. Solid-State Circuits, vol. 43, no. 12, pp. 2730–2738, Dec. 2008. [8] E. Seok et al., “A 410 GHz CMOS push-push oscillator with an on-chip patch antenna,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2008, pp. 472–629. [9] O. Momeni and E. Afshari, “High power terahertz and millimeter-wave oscillator design: A systematic approach,” IEEE J. Solid State Circuits, vol. 46, no. 3, pp. 583–597, Mar. 2011. [10] X. Hu, L. Tripodi, M. Matters-Kammerer, S. Cheng, and A. Rydberg, “65-nm CMOS monolithically integrated sub-THz transmitter,” IEEE Electron Device Lett., vol. 32, no. 9, pp. 1182–1184, Sep. 2011. [11] L. Tripodi, M. Matters, D. Van Goor, X. Hu, and A. Rydberg, , M. Steyaert, Ed. et al., “Extremely wideband CMOS circuits for future THz applications,” in Analog Circuit Design: Low Voltage Low Power; Short Range Wireless Front-Ends; Power Management and DC-DC. New York: Springer, 2011, pp. 237–255. [12] U. R. Pfeiffer and E. Ojefors, “600-GHz CMOS focal-plane array for terahertz imaging applications,” in 34th Eur. Solid-State Circuits Conf., Sep. 2008, pp. 110–113. [13] F. Schuster et al., “A broadband THz imager in a low-cost CMOS technology,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2011, pp. 42–43. [14] E. Seok et al., “Progress and challenges towards terahertz CMOS integrated circuits,” IEEE J. Solid-State Circuits, vol. 45, no. 8, pp. 1554–1564, Aug. 2010. [15] R. Götzen, “Verfahren Zur Herstellung 3-Dimensional Angeordneter Leit- Und Verbindungsstrukturen” Germany Patent 199 64 099 and PCT/DE00/04393, Dec. 31, 1999. [Online]. Available: www.microtec-d.com [16] R. Götzen, “Verfahren Zur Produktion Von Hochfrequenz Leiterbahnen Deren Ankopplungen an Bauelementen Wie Halbleiter Bauelemente, Antennen, Koaxial Kabeln Und Hohlleiter,” Germany Patent 10 2010 053 047.6, Dec. 12, 2010. [17] R. Götzen, “Die Freiheit der werkzeuglosen Fertigung,” Mikroproduktion, vol. 02/08, pp. 47–50, Feb. 2008. [18] M. J. W. Rodwell, M. Kamegawa, R. Yu, M. Case, E. Carman, and K. S. Kiboney, “GaAs nonlinear transmission lines for picosecond pulse generation and millimeter-wave sampling,” IEEE Trans. Microw. Theory Techn., vol. 39, no. 7, pp. 1194–1204, Jul. 1991. [19] J. Langley, P. Hall, and P. Newman, “Balanced antipodal Vivaldi antenna for wide bandwidth phased arrays,” Proc. Inst. Elect. Eng.–Microw., Antennas, Propag., vol. 143, pp. 97–102, Apr. 1996.

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[20] Cadence virtuoso analog design environment. Cadence, San Jose, CA, 2009. [Online]. Available: www.cadence.com [21] Sonnet EM. Sonnet Softw., North Syracuse, NY, 2009. [Online]. Available: www.sonnetsoftware.com [22] K. L. Vodopyanov and Y. H. Avetisyan, “Optical terahertz wave generation in a planar GaAs waveguide,” Opt. Lett., vol. 33, pp. 2314–2316, Oct. 2008. [23] D. Jäger and F. J. Tegude, “Nonlinear wave propagation along periodicloaded transmission line,” Appl. Phys., vol. 15, pp. 393–397, 1978. [24] H. R. Mohebbi and A. H. Majedi, “Analysis of series-connected discrete Josephson transmission line,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 8, pp. 1865–1873, Aug. 2009. [25] P. J. Gibson, “The Vivaldi aerial,” in Proc. 9th Eur. Microw. Conf., Sep. 1979, vol. 1, pp. 101–105.

Lorenzo Tripodi (M’04) received the Laurea degree in electronics engineering from the Politecnico di Torino, Turin, Italy, in 1999, and the Ph.D. degree in theoretical condensed matter physics from the Université Joseph Fourier, Grenoble, France in 2002. In 2003, he joined Philips Research Eindhoven, Eindhoven, The Netherlands, where he is currently a Senior Scientist and Project Leader of the Terahertz Microsystems Project. He is also coordinator of the European FP7 Project ULTRA. His research interests include terahertz circuit and system design, terahertz radiation applications, and nonlinear phenomena.

Xin Hu received the B.S. degree in information engineering from Zhejiang University, Hangzhou, Zhejiang Province, China, in 2004, and the Ph.D. degree in electromagnetic theory from the Royal Institute of Technology, Stockholm, Sweden, in 2009. From 2009 to 2011, she was a Researcher with the Microwave Group, Uppsala University, Uppsala, Sweden. She is currently with ABB, Ludvika, Sweden. Her research interests include metamaterials, millimeter-wave circuits, ultra-wideband (UWB) antennas, RF identification (RFID) tags, and integrated antennas for wireless sensors.

Reiner Götzen was born in Rheinhausen Germany, in 1954. He received the Dipl. Ing. degree in electrical engineering (with a specialization in electronic and precision engineering) from the Gerhard Mercator University of Duisburg, Duisburg, Germany, in 1990, and the Ph.D. degree in electrical engineering from the Universitatea Politehnica din Bucureşti, Bucharest, Romania, in 2010. He was with the Fraunhofer Institute for Microelectronic Circuits and Systems, Gerhard Mercator University Duisburg, Duisburg, Germany. He was with Thyssen-Krupp Duisburg, Duisburg, Germany. He was with Robot Foto and Electronic, Düsseldorf, Germany. He is the founder, and since 1995, has been the Chief Executive Officer (CEO) of microTEC Gesellschaft für Mikrotechnologie mbH, Duisburg, Germany, where he has managed industrial projects, as well as national and European funded research (MCSP, LIKA, Erislide, PAC4PT, Nanoleit, Healthyaims, INOS, Ultra, Light Rolls, PRIAM). He holds a wide range of patents in microsystems, microelectromechanical systems (MEMS), applications, and production technologies. He has authored or coauthored several papers and invited presentations. Dr. Götzen was the recipient of the 1998 Innovation Award, Ruhr area.

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Marion K. Matters-Kammerer received the B.S. degree and Master of physics degree from the Ecole Normale Supérieure, Paris, France, in 1997 and 1998, respectively, the Physikdiplom degree from the Technical University of Berlin, Berlin, Germany, in 1998, and the Ph.D. in physics from RWTH Aachen, Aachen, Germany, in 2006. In 1999, she joined Philips Research Aachen, Aachen, Germany. In 2004, she joined Philips Research Eindhoven, Eindhoven, The Netherlands. In 2009 and 2010, she was a Lecturer and Guest Researcher with the Faculty of Electrical Engineering, RWTH Aachen, Aachen, Germany. Since 2011, she has been an Associate Professor with the Technical University of Eindhoven, Eindhoven, The Netherlands, where she is involved in the area of electronic modules for terahertz imaging and spectroscopy. Her research interests include RF and millimeter-wave design in system-in-package and system-on-chip technologies, as well as ultra-high-speed circuits for terahertz electronics.

Dave van Goor received the B.S. degree in electronic engineering from the Fontys Hogeschool Eindhoven, Eindhoven, The Netherlands, in 1999. He is currently with Philips Research Eindhoven, Eindhoven, The Netherlands. From 2000 to 2003, he was involved in RF integrated circuit (IC) design for optical networking applications. Since then, he has been involved with microwave IC design. His current research interests are in high-voltage and low-power analog ICs.

Shi Cheng (S’07–M’10) was born in Jiangsu, China, in 1980. He received the B.E. degree in radio engineering from Southeast University, Nanjing, China, in 2003, and the M.Sc. degree in electrical engineering and Ph.D. degree in microwave technology from Uppsala University, Uppsala, Sweden, in 2006 and 2010, respectively. From March 2010 to March 2011, he was with Advanced Technology, Laird Technologies, Kista, Sweden, where he spent four months involved with the development of diversity DVB-T repeater systems for mobile vehicles with Integrated Antennas AB, Uppsala, Sweden. Since August 2011, he has been with the Digital Radio Division, Ericsson, Kista, Sweden. He has authored or coauthored over 50 scientific papers in various journals and international conferences. He serves as a regular reviewer for several peer-reviewed journals. He is the main inventor of three international patents. His research interests include reconfigurable RF front ends, millimeter-wave and terahertz systems, wireless sensors, RF microelectromechanical systems (MEMS), phased-array antennas, diversity and multiple-input multiple-output (MIMO) systems, automotive and military radars, and stretchable and conformable large-area RF electronics. Dr. Cheng was the recipient of a number of international and national awards including the 2009 Outstanding Chinese Oversea Graduate Student Award of the Chinese Government and the 2011 Recognized Foreign Scholar Award for excellence of innovation and entrepreneurship from the Swedish Government.

Anders Rydberg (M’89) received the M.Sc.-degree from the Lund Institute of Technology, Lund, Sweden, in 1976, and the Ph.D. degree from the Chalmers University of Technology, Göteborg, Sweden, in 1988. From 1977 to 1983, he was with the National Defence Research Establishment, ELLEMTEL Development Company, and the Onsala Space Observatory. In 1991, he became was a Docent (Associated Professor) with the Chalmers University of Technology. From 1990 to 1991, he was a Senior Research Engineer with Farran Technology Ltd., Cork, Ireland. In 1992, he was an Associate Professor, and in 2001, a Professor of applied microwave and millimeter-wave technology with Uppsala University, Uppsala, Sweden. He currently heads the Microwave Group, Department of Engineering Science, Uppsala University. Since 2007, he has also been the joint owner of Integrated Antennas AB, Uppsala, Sweden. He has authored or coauthored over 190 publications in the area of microwave and millimeter-wave antennas, sensors, solid-state components, and circuits. He holds three patents. Prof. Rydberg is a member of the Editorial Board for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. He is an adjunct member of Sections B and D, Swedish Member Committee, URSI (SNRV), and chairman of the Swedish IEEE Microwave Theory and Techniques (MTT)/Antennas and Propagation (AP) Chapter.

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Design and Analysis of Digital-Assisted Bandwidth-Enhanced Miller Divider in 0.18- m CMOS Process Yen-Hung Kuo, Jeng-Han Tsai, Member, IEEE, Tian-Wei Huang, Senior Member, IEEE, and Huei Wang, Fellow, IEEE

Abstract—A bandwidth-enhanced technique for a Miller divider is presented in this paper. The proposed frequency divider consists of a band-switched Miller divider and digital-assisted circuit to switch the resonator automatically. The proposed frequency divider is implemented in 0.18- m CMOS technology and has a measured 57.4% bandwidth from 8.2 to 14.8 GHz at an input power of 0 dBm. The dc consumption is 12 mW. Compared to the previously reported Miller dividers, the proposed circuit achieves the widest fractional bandwidth. Index Terms—CMOS, digital-assisted circuit, Miller divider, regenerative frequency divider.

I. INTRODUCTION

D

UE TO a strong demand for high data rate of wireless communication, there is a demand for a high operationfrequency wide-tuning bandwidth phase-locked loop (PLL) for the local oscillator. The PLL needs a frequency divider with a high division ratio on its feedback path, thus, a wide-bandwidth high-operating-frequency divider is crucial in system applications. For high-speed operation, the frequency divider usually adopts a dynamic frequency divider, which includes the injection-locked frequency divider (ILFD) and the Miller divider. Although the bandwidth of a ILFD with cascode topology has been extended to 77.3% in the 0.13- m CMOS process [1], the voltage headroom in cascode topology is limited compared to the Miller divider. The Miller divider provides differential input, which balances the loading of the voltage-controlled oscillator (VCO) [2]. Furthermore, the Miller divider has a good locking range with moderate dc consumption. Therefore, the Miller divider is a good candidate for the high-speed frequency divider [3], [4]. Manuscript received March 30, 2012; revised August 22, 2012; accepted August 27, 2012. Date of publication October 09, 2012; date of current version December 13, 2012. This work was supported in part by the National Science Council (NSC) under Contract NSC101-2219-E-002-007, Contract NSC1012219-E-002-008, Contract 101R89083, and Contract 101R8908. Y.-H. Kuo, T.-W. Huang, and H. Wang are with the Department of Electrical Engineering and the Graduate Institute of Communication Engineering, National Taiwan University, Taipei 106, Taiwan (e-mail: [email protected]; [email protected]; [email protected]). J.-H. Tsai is with the Department of Applied Electronics Technology, National Taiwan Normal University, Taipei 10610, Taiwan (e-mail: jhtsai@ntnu. edu.tw). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2218120

Fig. 1. Block diagram of the conventional Miller frequency divider.

The conventional Miller divider consists of a bandpass filter (BPF) and a mixer, as shown in Fig. 1 [5]. The operating frequency of the Miller divider can be determined by the resonant frequency of the BPF. Therefore, the operating frequency can be much higher than the static frequency divider. However, the bandpass characteristic and the parasitic effect of the mixer limit the bandwidth of the Miller divider. To widen the bandwidth, the inductive peaking technique can be adopted [6], [7]. The peaking inductor is added at the transconductance stage of the Miller divider and has achieved a 7.6% bandwidth [6]. Similarly, the transformer-peaking Miller divider improves the injection power and achieves 24.4% bandwidth [7]. Nevertheless, the inductive peaking technique still has narrow bandwidth due to its bandpass characteristic. Another effective way to improve bandwidth of the Miller divider is using the coupling technique [8], [9]. The coupling technique satisfies the loop phase/gain condition over the wide operating range by injecting a coupled signal. With the coupling technique, the Miller divider can achieve 25.3% bandwidth [9]. However, the coupling technique will enlarge the chip size and increase dc consumption. To extend bandwidth without sacrificing dc power, the band-switched Miller divider is used in [3]. A band-switched frequency divider needs a frequency calibration circuit. To automate the switching resonator, the self-oscillating calibration in the ILFD is presented in [10]. By computing the output frequency of the frequency divider, the resonator can be switched properly; however, the self-oscillating calibration is not suitable for the non-self-oscillating circuit, such as the Miller divider. This paper presents the design and analysis of a bandswitched Miller divider with non-self-oscillating calibration. By detecting the output power of the Miller divider, the divider can be operated in a locked or an unlocked condition. Together with the digital-assisted circuit, the operating frequency of the band-switched Miller divider can be aligned with the injection frequency. The measured locking range of the proposed divider is from 8.2 to 14.8 GHz (57.4%) at 0-dBm injection power with the dc consumption of 12 mW.

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Fig. 2. Block diagram of conventional self-oscillating calibration [10].

II. CALIBRATION OF BAND-SWITCHED FREQUENCY DIVIDER The band-switched frequency divider has an advantage of wide bandwidth without increasing power consumption. When the number of the resonators increases, the bandwidth increases proportionally. However, the band-switched frequency divider needs an additional calibration circuit, as described below. A. Self-Oscillating Calibration As shown in Fig. 2, the conventional self-oscillating calibration technique can be implemented in a VCO by using the comparison of the division signal and reference clock . The band selector chooses the appropriate band from the comparison result of frequency detector. In the same way, the selfoscillating calibration can be applied to the ILFD, which also has the self-oscillating characteristics [10]. One of the drawbacks of this technique is that it may fail to lock due to the variation of supply voltage or temperature because, after the frequency search is over, the control signal is determined permanently. Hence, the conventional calibration technique needs to integrate a lock detector to resume the frequency search circuit when it is unlocked. The lock detector also consumes dc power and occupies the chip area. Another drawback is the self-oscillating calibration is only suitable for a self-oscillating circuit such as a VCO and an ILFD. If the frequency divider does not oscillate, the frequency detector cannot work properly. Hence, the Miller divider is not suitable for applying the self-oscillating calibration. B. Proposed Calibration Technique of Miller Divider Fig. 3(a) and (b) illustrates the schematic of the ILFD and Miller divider, and Fig. 3(c) shows the Miller divider and ILFD under a free-running condition. Since the ILFD has the self-oscillating characteristic, the operating frequency can be detected. On the other hand, the Miller divider does not oscillate because the diode-connected transistors and have a loss of and , which stabilizes the circuit. Therefore, the self-oscillating calibration cannot be applied to the Miller divider. To solve this problem, the non-self-oscillating calibration is proposed in this paper. The Miller divider and ILFD under an unlocked condition are different, as shown in Fig. 3(d). When the ILFD is operated in an unlocked condition, the output signal has a multitone signal [11]. In the same condition, the Miller divider acts like a frequency doubler, but with very small output

Fig. 3. (a) Schematic of ILFD. (b) Schematic of Miller divider. (c) Simulated result of free running in ILFD and Miller divider. (d) Simulated result of injection pulling in ILFD and Miller divider.

signal. The second harmonic output of the Miller divider is generated by the second harmonic nonlinearity, , of transconductance stage [ and in Fig. 3(b)]. With nonlinear function of and , the second harmonic can be calculated as . The second harmonic signal is small because is small and the frequency is far away from the BPF (four times higher than the center frequency of the

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BPF). Hence, the power detector at the output of the Miller divider can be used as a lock detector. If the output is a small signal, it is operated in the free-running condition or in the unlocked condition. If the output is a large signal, it is operated in the frequency-locked condition. The power detector with a band-selected digital circuit is adopted in the proposed non-self-oscillating calibration circuit. The proposed divider, which consists of the band-switched Miller divider, power-detector, voltage comparator, and finite-state machine (FSM), is shown in Fig. 4(a). The detail of each circuit is described in the following paragraph. III. DESIGN

ANALYSIS OF THE PROPOSED FREQUENCY DIVIDER

AND

A. Band-Switched Miller Frequency Divider The mixer in the Miller divider is the Gilbert-cell topology, as shown in Fig. 4(b). The transconductance stage, – , translates voltage signal to current. The device size of the transconductance stage is chosen for amplifying the input signal appropriately. The output node is connected to the gate of the switching quad, – , to form the feedback loop. Hence, and form the diode-connected loss, and , while and form the negative transconductance, and . The device size of and are the same in this design for circuit symmetry. The same device size of and also ensures the non-self-oscillation of the Miller divider [6] and suits the non-self-oscillating calibration. The device size of the switching quad, with a total width of 80 m, is slightly larger than the transconductance stage for the better current-switching capability. To achieve wide bandwidth, the proposed divider switches the inductor of the resonator – . Using the inductor bank can save the dc power consumption and can achieve wider locking range compared to the varactor bank. The capacitor in the tank comes from the parasitic of the transistors. The switches, , , , and are used to control the resonator. The resonator can be switched to ac ground by and , which are nMOS transistors. and are added to provide better short impedance (virtual short). To keep the control voltage of and lower than the supply voltage, and are implemented using PMOS. The input inductors, and , are used for the input matching network. B. Power Detector The single-ended power detector consists of a diode-connected transistor and charging/discharging load ( and ), as shown in Fig. 4(c). The diode-connected transistor can be modeled as a voltage-controlled current source. The input voltage is sensed by the diode-connected transistor and converted to exponential current through the load. For a high-speed power detector, should be small for faster rising/falling response. However, cannot be shrunk unlimitedly. As shown in Fig. 5, the input signal feeds through to the output if is too small. The feed through signal can be attenuated by adding a low-pass filter or using a balanced topology. However, the additional low-pass filter occupies area. An effective way to improve the isolation is using the balanced power detector, as shown in

Fig. 4. (a) Block diagram of the proposed non-self-oscillating calibration. (b) Schematic of band-switched Miller divider. (c) Schematic of single-ended power detector. (d) Schematic of balanced power detector. (e) Input impedances of the output buffer and the balanced power detector, which is related to the output power and rising/falling time.

Fig. 4(d). Since the output node of the balanced power detector is a virtual-shorted node with respect to the feed-through signal,

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Fig. 5. Simulated output voltage of the balanced power detector, single-ended power detector, and single-ended power detector with LPF. The inject power is 0 dBm.

Fig. 7. Simulated impedance factor

with different

.

Fig. 8. Simulated transient response of the balanced power detector with dif. The injection power is 7 dBm. ferent

Fig. 6. Simulated transient response of the balanced power detector with dif. The injection power is 7 dBm. ferent

the feed-through signal can be suppressed. Compared to the previous power detector [12], the proposed power detector has better dc power and the proposed power detector should select a proper RC load to achieve good input impedance. The symmetric Gilbert-cell mixer in the Miller divider provides a balanced output signal. The simulated rising/falling time with different is shown in Fig. 6. To have short rising/falling time and small feed-through signal between input/output, is chosen to be 0.1 pF in this design. The threshold voltage of voltage comparator is chosen to be 0.38 V considering the temperature variation and the over shoot in the edge of the step response. As for the output power, the power delivered to the buffer is related to the input impedance of the power detector. The power delivered to the power detector and to the output buffer are shown in the following equations and in Fig. 4(e):

Fig. 9. Schematic of voltage comparator.

where and are the real and imaginary parts, respectively, of the input impedance of output buffer, and and are the real part and imaginary parts of the input impedance of the power detector, . Hence, the ratio between power delivered to the output buffer and to the power detector is

(1) (2)

(3)

KUO et al.: DIGITAL-ASSISTED BANDWIDTH-ENHANCED MILLER DIVIDER

Fig. 10. (a) Block diagram of finite state machine. (b) Timing diagram of the proposed digital-assisted circuit.

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Fig. 13. Measured spectrum of the proposed divider at input frequency of 14.8 and 8.2 GHz.

Fig. 14. Measured output power of the proposed divider at injection power of 0 dBm when the digital circuit is enabled/disabled.

Fig. 11. Chip photograph of the proposed frequency divider. The chip size is 0.38 mm including the testing pad.

With the fixed input impedance of the output buffer and fixed input power , the power delivered to the output buffer, , is related to the impedance factor,

(4) in the power Furthermore, the impedance factor is related to detector, as shown in Fig. 7. The impedance factor can be increased by choosing larger . However, the smaller is desirable for a higher speed power detector. Fig. 8 shows the simulated rising/falling time of the power detector with different . Therefore, there is a tradeoff between the output power and the operating speed in the selection of . For good output power and rising/falling time, is chosen to be 10 k in this design. The simulated rising time/falling time of the power detector is 10 ns in this design. C. Voltage Comparator, FSM, and Calibration Time Fig. 12. Measured sensitivity curve of the proposed divider when digital circuit is enabled/disabled.

The schematic of the voltage comparator is a high-gain differential amplifier, as shown in Fig. 9. Due to that, the voltage comparator is an open-loop design, and it does not have the stability

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TABLE I PERFORMANCE COMPARISON AMONG DIFFERENT DIVIDE-BY-2 MILLER DIVIDERS AND ILFD

Fig. 15. Measured phase noise of divide-by-2 output signal at input power of 0 dBm and input frequency of 8.2 GHz.

Fig. 16. Locking range and injection power comparison of Miller dividers and ILFD in Table I.

concern. The state diagram and timing diagram of the digital-assisted circuit are shown in Fig. 10. The number of resonators is equivalent to the number of states, , in the FSM. The “change state” signal is the comparison result between the voltage reference and the output of the power detector . If the “change state” signal is high, the calibrated circuit will change the state every rising edge of the clock. Once the output of the power detector is higher than the voltage reference, the “change state” signal goes to low voltage and the state is unchanged at every clock. Hence, the calibration time, , of the proposed non-self-oscillating calibration can be shown as

tial search algorithm, the calibration time (in worst case) is proportional to the number of the state. Compared to the binary search algorithm , the state number in the proposed calibration should be small for faster calibration. Therefore, the locking range of the digital-assisted Miller divider can be extended with the cost of the locking time. On the other hand, is also related to the calibration time. The highest clock frequency is bounded by the speed of the power detector. The limitation of is shown as follows in (6):

(5)

(6)

where is the number of the state or the number of the resonator in the band-switched Miller divider, and is the period of digital clock. Since the calibration algorithm is a sequen-

is the rising time and falling time of the power where and detector, is the delay time of the voltage comparator, and is the delay time of the FSM. The simulated slew rate

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TABLE II PERFORMANCE COMPARISON AMONG DIFFERENT CALIBRATION TECHNIQUES

of the voltage comparator, which is related to the ratio of bias current and output capacitance, is 3.4 V/ns. As a result, takes about 0.53 ns from low (0 V) to high (1.8 V) voltage. Due to the small output capacitance, the speed of the voltage comparator is high. On the other hand, the simulated gate delay of FSM, , is 0.8 ns. From the above simulated result, the frequency of the digital clock, , is chosen to be 50 MHz ( is 20 ns), and the number of states (resonators) is three. Therefore, the calibration time of the proposed circuit is 40 ns [ 3 1 20 ns] in the worst case. IV. EXPERIMENTAL RESULT The monolithic microwave integrated circuit (MMIC) is implemented in standard mixed-signal and RF 0.18- m CMOS technology [13]. The process provides a single poly layer for the gates of the MOS and six metal layers with the top metallization of 2.34- m thickness for inter-connection. This technology provides a unity current gain cutoff frequency, , of 70 GHz and maximum oscillation frequency, , of 58 GHz. Two types of polysilicon resistors, with several and k are provided by choosing the individual dose of ion implantation separately from the gate electrode doping process. Metal–insulator–metal (MIM) capacitors and spiral inductors are also available in this process. An additional deep -well is used to isolate an -channel metal-oxide semiconductor (NMOS) from the lossy substrate. The chip microphotograph is shown in Fig. 11. The die size is 0.66 0.57 mm . The frequency divider draws a current of 6.5 mA from a 1.8-V supply voltage and consumes 12 mW (without dc consumption of output buffer). The proposed frequency divider does not have a free-running frequency. Fig. 12 shows the measured input sensitivity. When the digital-assisted circuit is disabled, all the switches are turned on and the input operating band is moved toward the higher frequency. In this situation, the measured input operating frequency is from 13 to 14.8 GHz (13%) at 0-dBm input signal power. When the digital-assisted circuit is enabled, the measured input operating frequency is from 8.2 to 14.8 GHz (57.4%) at 0-dBm input signal

power. The proposed non-self-oscillating calibrated circuit extends the locking range from 13% to 57.4%. Fig. 13 shows the output spectrum at the input frequency of 8.2 and 14.8 GHz. The output power of the proposed frequency divider is greater than 15 dBm over the operation range, as shown in Fig. 14. The measured phase noise is shown in Fig. 15. The theoretically 6-dB phase-noise improvement is measured at the output signal. Table I summarizes the recently published CMOS Miller divider. The locking range of the Miller divider is increased with input power [6]. To save the RF power, the input power should be less than the 5 dBm. By utilizing the non-self-oscillating calibration, our MMIC demonstrates the widest locking range of 57.4% at 0-dBm injection power among these published Miller divider. Due to the band-switched technique and the non-self-oscillating calibration, the operating range of the proposed frequency divider is wider than the other topology. Fig. 16 shows the comparison chart of the published Miller divider in Table I. The proposed frequency divider achieves a wider locking range at the same injected power. Table II summarizes the recently published CMOS frequency divider with a calibration technique. Since the proposed digital-assisted divider does not preserve the output pad of digital signal (output of state machine), we cannot measure the value directly. Therefore, the worst case calibration time (5) and simulation result are used to estimate calibration time. Due to the circuit simplicity, the proposed digital-assisted circuit can operate at higher frequency, and hence, the calibration time is faster than the other topology. Since the calibration time of the frequency divider impacts the operation of the PLL, the calibration time is the important design parameter. Therefore, the figure-of-merit (FOM) is defined as Locking Range Calibration Time (ns)

(7)

where the locking range is . The FOM calculates the efficiency of the calibration circuit, which extends the bandwidth with a cost of calibration time.

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V. CONCLUSION The proposed digital-assisted bandwidth-enhanced Miller divider has been fabricated in TSMC 0.18- m CMOS technology and the chip size is 0.66 0.57 mm . By using the non-self-oscillating calibration, the locking range of the proposed Miller divider can be extended. The proposed non-self-oscillating calibration has lower circuit complexity and is suitable for the nonself-oscillating Miller divider. The frequency divider achieves a locking range from 8.2 to 14.8 GHz at 0-dBm injection power while consuming 12-mW dc power. The proposed frequency divider has the widest locking range among the published dynamic frequency dividers.

[15] M. K. Ali, V. Subramanian, T. Zhang, and G. Boeck, “Design of Ka-band Miller divider in 130 nm CMOS,” in IEEE Int. RF Integr. Technol. Symp., Nov. 2011, pp. 205–208. [16] J.-C. Chien and L.-H. Lu, “40 GHz wide-locking-range regenerative frequency divider and low-phase-noise balanced VCO in 0.18 m CMOS,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2007, pp. 544–545. [17] T.-N. Luo and Y.-J. E. Chen, “A 0.8-mW 55-GHz dual-injection locked CMOS frequency divider,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 3, pp. 620–625, Mar. 2008. [18] S. Pellerano, R. Mukhopadhyay, A. Ravi, J. Laskar, and Y. Palaskas, fractional- frequency synthesizer in 90 nm “A 39.1-to-41.6 GHz CMOS,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2008, pp. 484–485. [19] K. Scheir, G. Vandersteen, Y. Rolain, and P. Wambacq, “A 57-to-66 GHz quadrature PLL in 45 nm digital CMOS,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2009, pp. 494–495.

ACKNOWLEDGMENT The chips were fabricated by the Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, Taiwan, through the Chip Implementation Center (CIC), Hsinchu, Taiwan. The authors would like to thank CIC for chip implementation. REFERENCES [1] Y.-H. Kuo, J.-H. Tsai, H.-Y. Chang, and T.-W. Huang, “Design and analysis of a 77.3% locking range divide-by-4 frequency divider,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 10, pp. 2477–2485, Oct. 2011. [2] S. Rong and H. C. Luong, “A 0.8 V 57 GHz-to-72 GHz differentialinput frequency divider with locking range optimization in 0.13 m CMOS,” in IEEE Asian Solid-State Circuits Conf., Nov. 2010, pp. 1–4. [3] H. Zheng and H. C. Luong, “Ultra-low-voltage 20-GHz frequency dividers using transformer feedback in 0.18 m CMOS process,” IEEE J. Solid-State Circuits, vol. 43, no. 9, pp. 2293–2302, Sep. 2008. [4] J. Lee, M. Liu, and H. Wang, “A 75-GHz phase-locked loop in 90-nm CMOS technology,” IEEE J. Solid-State Circuits, vol. 43, no. 6, pp. 1414–1426, Jun. 2008. [5] K. Koivunen and M. Jenu, “A 40-GHz MMIC frequency divide-bytwo,” in Eur. Microw. Conf., Sep. 1997, pp. 662–667. [6] J. Lee and B. Razavi, “A 40-GHz frequency divider in 0.18- m CMOS technology,” IEEE J. Solid-State Circuits, vol. 39, no. 4, pp. 594–601, Apr. 2004. [7] W.-S. Chang, K.-W. Tan, and S.-H. Hsu, “A 56.5–72.2 Ghz transformer-injection Miller frequency divider in 0.13 m CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 7, pp. 393–395, Jul. 2010. [8] Z.-D. Huang, C.-Y. Wu, and B.-C. Huang, “Design of 24-GHz 0.8-V 1.51-mW coupling current-mode injection-locked frequency divider with wide locking range,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 8, pp. 1948–1958, Aug. 2009. [9] T. Shibasaki, H. Tamura, K. Kanda, H. Yamaguchi, J. Ogawa, and T. Kuroda, “20-GHz quadrature injection-locked LC dividers with enhanced locking range,” IEEE J. Solid-State Circuits, vol. 43, no. 3, pp. 610–618, Mar. 2008. [10] K.-H. Tsai, J.-H. Wu, and S.-I. Liu, “A digitally calibrated 64.3–66.2 GHz phase-locked loop,” in IEEE Radio Freq. Integr. Circuit Conf., Jun. 2008, pp. 307–310. [11] B. Razavi, “A study of injection locking and pulling in oscillator,” IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1415–1424, Sep. 2004. [12] A. Zanchi, C. Samori, S. Levantino, and A. L. Lacaita, “A 2-V 2.5-GHz 104-dBc/Hz at 100 kHz fully integrated VCO with wideband lownoise automatic amplitude control loop,” IEEE J. Solid-State Circuits, vol. 36, no. 4, pp. 611–619, Apr. 2001. [13] H.-M. Hsu, J.-Y. Chang, J.-G. Su, C.-C. Tsai, S.-C. Wong, C.-W. Chen, K.-R. Peng, S.-P. Ma, C.-N. Chen, T.-H. Yeh, C.-H. Lin, Y.-C. Sun, and C.-Y. Chang, “A 0.18- m foundry RF CMOS technology with 70-GHz fT for single chip system solutions,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2001, pp. 1869–1872. [14] T. Shima, J. Sato, K. Mizuno, and K. Takinami, “A 60 GHz CMOS PLL synthesizer using a wideband injection-locked frequency divider with fast calibration technique,” in IEEE Asia–Pacific Microw. Conf., Dec. 2011, pp. 1530–1533.

Yen-Hung Kuo was born in New Taipei City, Taiwan, on December 18, 1984. He received the B.S. degree in electric engineering from National Tsing Hua University, Hsinchu, Taiwan, in 2007, the M.S. degree from the Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan, in 2009, and the Ph.D. degree from the Graduate Institute of Communication Engineering, National Taiwan University, in 2012. His research interests are in the field of RF integrated circuits with digital-assisted circuit for wireless communication systems.

Jeng-Han Tsai (S’04–M’08) was born in Tainan, Taiwan, in 1980. He received the B.S. degree in electrical engineering from National Central University, Taoyuan, Taiwan, in 2002, and the Ph.D. degree from the Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan, in 2007. From February 2007 to January 2008, he was a Post-Doctoral Research Fellow with the Graduate Institute of Communication Engineering, National Taiwan University. From February 2008 to July 2009, he was with the Department of Communication Engineering, Yuan Ze University, Taoyuan, Taiwan, as an Assistant Professor. In August 2009, he joined the faculty of the Department of Applied Electronics Technology, National Taiwan Normal University, Taipei, Taiwan, where he is currently an Associate Professor. His research interests include the design and analysis of RF/microwave integrated circuits and wireless communications.

Tian-Wei Huang (S’91–M’98–SM’02) received the B.S. degree in electrical engineering from National Cheng Kung University, Tainan, Taiwan, in 1987, and the M.S. and Ph.D. degrees in electrical engineering from the University of California at Los Angeles (UCLA), in 1990 and 1993, respectively. In 1993, he joined the TRW RF Product Center, Redondo Beach, CA, where he designed RF integrated circuits (RFICs) up to 190 GHz. From 1998 to 2002, he was with Lucent Technologies and Cisco Systems, where he developed high-speed wireless systems. In August 2002, he joined the faculty of the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan. His research interests include millimeter-wave (MMW) RF CMOS design and gigabit wireless systems.

KUO et al.: DIGITAL-ASSISTED BANDWIDTH-ENHANCED MILLER DIVIDER

Huei Wang (S’83–M’87–SM’95–F’06) was born in Tainan, Taiwan, on March 9, 1958. He received the B.S. degree in electrical engineering from National Taiwan University, Taipei, Taiwan, in 1980, and the M.S. and Ph.D. degrees in electrical engineering from Michigan State University, East Lansing, in 1984 and 1987, respectively. During his graduate study, he was engaged in research on theoretical and numerical analysis of electromagnetic (EM) radiation and scattering problems. He was also involved in the development of microwave remote detecting/sensing systems. In 1987, he joined the Electronic Systems and Technology Division, TRW Inc. He has been an MTS and Staff Engineer responsible for MMIC modeling of computer-aided design (CAD) tools, MMIC testing evaluation, and design, and became the Senior Section Manager of the Millimeter-Wave (MMW) Sensor Product Section, RF Product

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Center. In 1993, he visited the Institute of Electronics, National Chiao-Tung University, Hsin-Chu, Taiwan, where he taught MMIC-related topics. In 1994, he returned to TRW Inc. In February 1998, he joined the faculty of the Department of Electrical Engineering, National Taiwan University, as a Professor. From August 2006 to July 2009, he was the Director of the Graduate Institute of Communication Engineering, National Taiwan University. From 2005 to 2007, he was the Richard M. Hong Endowed Chair Professor of National Taiwan University. He is currently a National Chair Professor of the Ministry of Education, Taipei City, Taiwan, for the February 2011–January 2014 term. Dr. Wang is a member of Phi Kappa Phi and Tau Beta Pi. He was an IEEE Distinguished Microwave Lecturer from 2007 to 2009. He was the recipient of the 2003 Distinguished Research Award of the National Science Council, Taiwan, the 2007 Academic Achievement Award of the Ministry of Education, and the 2008 Distinguished Research Award of the Pan Wen-Yuan Foundation.

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Theory and Design of Class-J Power Amplifiers With Dynamic Load Modulation Christer M. Andersson, Member, IEEE, David Gustafsson, Student Member, IEEE, Koji Yamanaka, Member, IEEE, Eigo Kuwata, Hiroshi Otsuka, Member, IEEE, Masatoshi Nakayama, Senior Member, IEEE, Yoshihito Hirano, Senior Member, IEEE, Iltcho Angelov, Member, IEEE, Christian Fager, Member, IEEE, and Niklas Rorsman, Member, IEEE

Abstract—A theory for class-J microwave amplifier operation as a function of drive level and fundamental load impedance is derived. Calculations show that, under appropriate operating conditions, it is sufficient to modulate the transistor load reactance to enable high-efficiency operation ( 70%) over a large output power dynamic range ( 10 dB) with high transistor power utilization. Such dynamic load modulation (DLM) networks are an ideal application of continuously tunable varactor technologies. Multiharmonic load–pull measurements are performed on a GaN HEMT and experimentally verify the theory of operation. A demonstrator amplifier using an SiC varactor technology is then designed and characterized by static measurements. The amplifier has a peak power of 38 dBm at 2.08 GHz and maintains efficiencies above 45% over 8 dB of power dynamic range. An analysis of the load network losses is performed to show the potential of the class-J DLM transmitter concept. Index Terms—Energy efficiency, gallium nitride (GaN), power amplifiers, silicon–carbide (SiC), varactors.

I. INTRODUCTION

C

ONSUMER demand for affordable high data-rate wireless communication is forcing a network densification, resulting in an increasing number of radio base stations. Increasing modulation complexity in transmitted signals reduces the energy efficiency of traditional transmitters due to increasing peak-to-average power ratios. Energy-efficient transmitters capable of supporting modern and future communication stan-

Manuscript received May 29, 2012; revised August 20, 2012; accepted August 27, 2012. Date of publication October 23, 2012; date of current version December 13, 2012. This work was carried out at the GigaHertz Centre in a joint research project supported by Swedish Governmental Agency of Innovation Systems (VINNOVA), Chalmers University of Technology, Comheat Microwave AB, Ericsson AB, Infineon Technologies Austria AG, Mitsubishi Electric Corporation, NXP Semiconductors BV, Saab AB, SP Technical Research Institute of Sweden, and United Monolithic Semiconductors, and by the Sweden–Japan Foundation and Chalmersska Forskningsstiftelsen under grants. C. M. Andersson, D. Gustafsson, I. Angelov, C. Fager, and N. Rorsman are with the Microwave Electronics Laboratory, Chalmers University of Technology, SE-412 96 Göteborg, Sweden (e-mail: christer.m.andersson@chalmers. se). K. Yamanaka, E. Kuwata, H. Otsuka, M. Nakayama, and Y. Hirano are with the Information Technology Research and Development Center, Mitsubishi Electric Corporation, 247-8501 Kamakura, Japan (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2221140

dards are therefore needed to reduce the carbon footprint of an expanding wireless infrastructure. Various techniques have been proposed for improved transmitter efficiency, as reviewed in [1], and good results have been demonstrated, e.g., with envelope tracking [2], Doherty [3], and outphasing [4] transmitter architectures. Dynamic load modulation (DLM) has, more recently, been proposed as another potential solution for improved transmitter efficiency [5]. DLM transmitters employ a varactor-based load network that is dynamically tuned in synchronization with the transmitted signal envelope to maintain high instantaneous efficiency, while linearity requirements can be met by digital pre-distortion techniques [6], [7]. Given the reactive loading, the dynamic varactor control does not consume any significant power, thus limiting its influence on the transmitter efficiency. A modular design approach was used to realize DLM amplifiers at microwave frequencies in [6] and [8], where a tunable matching network is connected to the 50- output of a high-efficiency amplifier. Although this separates the design of the amplifier from the tunable matching network, the long electrical lengths and the filtering by the amplifier output matching network limits the achievable bandwidth and efficiency enhancement in a complete DLM transmitter. An integrated approach, as demonstrated in [7], [9], and [10], can improve the DLM amplifier performance by combining the output matching and tunable networks into one. Typically, DLM amplifier design involves an empirical load–pull type of measurements or simulations to determine an optimal network impedance trajectory. However, the many degrees of freedom in the choice of harmonic impedance environment make it difficult to use load–pull methods to ensure a global optimum in dynamic range, bandwidth, and efficiency. Furthermore, codesign and development of optimal interplaying transistor and varactor technologies will be critical to the success of future DLM transmitters. To speed progress, better theoretical foundations are necessary. Theory and demonstration of pulsewidth modulation class-E DLM was recently published as a step in this direction, addressing the amplifier design space based on technology parameters [11]. In this study, a theoretical basis for class-J DLM amplifier design is derived and demonstrated with experimental results. The class-J amplifier utilizes the parasitic output capacitance of the transistor to achieve high-efficiency operation at microwave frequencies [12]. We show that, given transistor technology and appropriate class-J operating conditions, it is sufficient to modulate the extrinsic load reactance to maintain high back-off efficiency. This is an important discovery as it represents an inher-

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where the dc current given by

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of the rectified current waveform is

(6) presented to The intrinsic fundamental load impedance the current source is given by the parallel connection of the output capacitance and the extrinsic load impedance Fig. 1. Circuit schematic of an ideal class-J amplifier. The transistor is simplified as a rectified current source with some output capacitance. Higher extrinsic load harmonics are assumed open circuit by a low-pass filter.

ently ideal application of varactors for DLM. Furthermore, with a choice of circuit topology, the theory allows for direct evaluation of technology requirements relating to amplifier frequency, bandwidth, and power scaling. II. THEORY In this section, an extension to the class-J theory in [12] is presented. The main contribution is to include a transistor drive level and to solve the equations by directly considering an extrinsic transistor load impedance . Fig. 1 shows the ideal class-J amplifier circuit schematic at angular center frequency . Herein it is assumed that the transistor transconductance is constant and the output characteristic has zero on-resistance. Similar to a class-B amplifier, the transistor is biased at pinch-off, with a source matching resulting in a half-rectified sinusoidal transistor current given by

(7) The fundamental output voltage component is the same over the intrinsic and extrinsic load impedances and in the frequency domain is (8) When is known, e.g., from a choice of are calculated as

and ,

and

(9) (10) The device output voltage waveform domain as

is solved in the time

(1) is the transistor saturation current and is the drive where level factor with the fundamental frequency component given by (2) at the The transistor is loaded by the extrinsic impedance fundamental frequency, i.e., by a load resistance and load reactance (3) It is assumed that the load matching branch is an ideal lowpass filter (higher harmonics are open circuited), i.e., the current flowing through the load has no higher harmonic content and is thus represented by a fundamental sinusoid (4) where and gives the amplitude and phase, respectively. The transistor output capacitance current is solved by Kirchhoff’s law (5)

(11) where is chosen to give the desired dc voltage component . A solution is considered valid if no compression occurs, i.e., , where is the transistor knee voltage. The output power , dc power consumption , and efficiency can then be calculated as (12) (13) (14) By sweeping the transistor drive level at a given load impedance, the efficiency and output power can be calculated when . The result of doing this in the normalized load impedance plane for different ratios are shown in Fig. 2 . Here, equals the

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Fig. 2. Calculated class-J efficiency and output power prior to compression versus fundamental load impedance for different transistor The optimum DLM impedance trajectories roughly follow the placement of the output power labels. Drive level contours were omitted for clarity.

ratios.

well-known optimum class-B load resistance for peak power operation (15) equals the absolute reactance of the effective while transistor output capacitance under large-signal conditions. The output power is normalized to the maximum class-J (and class-B) output power (16) plots are useful in genThese types of normalized eral, covering various operating frequencies, drain biasing conditions, and transistor parameters (see the class-J discussion in [12]). Observe, however, that the ratio is independent of transistor size. The optimum DLM network impedance trajectory can be identified at each ratio by finding and connecting the load impedance points of highest efficiency at each output power level. In Fig. 2, the optimum trajectories roughly follow the placement of the output power labels. It can be seen for low ratios (e.g., 0.5) that the required load resistance at peak power is significantly lower compared to that of class-B operation . In order to maintain high efficiency at significant power back-off, the optimum trajectory requires substantial tuning toward lower load resistance. It can be observed that as the ratio increases (e.g., toward 2), the required peak power load resistance increases. Interestingly, although the optimum trajectory is curving, employing pure reactance modulation at the peak power load resistance still gives efficiencies above 70% over 10 dB of output power dynamic range. The efficiency enhancement in power back-off by employing a reactance modulating

Fig. 3. Calculated efficiency and output power for pure load reactance modulation with a (fixed) load resistance chosen to maximize the peak output power ratio. at the given

load network with a (fixed) load resistance chosen to maximize the peak output power at the ratio is more clearly illustrated in Fig. 3. Increasing the ratio further (e.g., toward 4), the trend of an increasing peak power load resistance continues. Although the efficiency in deep power back-off is high, the transistor power utilization starts to decrease. The peak output power is now 1 dB lower than and the efficiency is degraded. Here, reactance modulation also suffers from efficiency degradation at intermediate back-off levels due to the increasingly curving optimum trajectory. Given that reactance modulation is an ideal varactor application, we conclude that transistors with are the prime candidates for design of high dynamic-range DLM

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amplifiers. However, the ratio for maximum transistor power utilization at a given operating frequency is determined by the transistor technology. This implies that technologies with either too low or too high ratios at the target frequency will not be optimal for class-J DLM implementation. Short of under-utilizing the transistor, this implies that capacitance either needs to be absorbed in the load network (if possible in the circuit topology) or added at the transistor output (on-chip or externally). III. AMPLIFIER DESIGN In this section, one type of amplifier topology is proposed and a 2.14-GHz demonstrator based on the theory in Section II is designed. To reduce the amplifier form factor, 0.38-mm-thick alumina substrates with 5- m-thick gold conductors were used to realize the matching networks. Mitsubishi Electric GaN high electron-mobility transistor (HEMT) and Chalmers University of Technology silicon–carbide (SiC) varactor technologies were employed for the active and tunable elements, as described in more detail in Sections III-A–III-E. A. GaN Transistor Technology A bare die 0.7- m gate-length 3-mm gate-width GaN HEMT from the Mitsubishi Electric Corporation, Kamakura, Japan, was characterized and modeled for use in the demonstrator amplifier design. The device structure is the same as in [13], and it features a power-added efficiency (PAE) of 82% at -band when properly terminated at harmonic frequencies. All device characterization was done in a thru-reflect line (TRL) fixture allowing for de-embedding and straightforward inclusion of bond-wire inductances. An HEMT model [14] was extracted from multiple measured devices and implemented for use in Agilent Advanced Design System (ADS). The modeling procedure followed the practice of extracting voltage independent extrinsics and intrinsics from cold and hot field-effect transistor (FET) -parameter measurements, respectively. DC and pulsed measurements were used for gate leakage, output, and transfer characteristics modeling, allowing for inclusion of thermal and dispersive effects. Voltage-dependent intrinsics, e.g., nonlinear capacitances, were finally extracted from multibias -parameter measurements. From the transistor measurements, key transistor parameters were extracted, A (0.55 A/mm) at knee voltage V gives and dBm (3.4 W/mm) at a drain bias of 30 V. Load–pull simulation on the transistor model gave an effective output capacitance pF (0.27 pF/mm). This results in at 2.14 GHz. The theoretical load impedance dependent output power and efficiency contours for the GaN HEMT (accounting for V) are shown in Fig. 4. To verify the theoretical performance prediction in Fig. 4, load–pull measurements were performed on the GaN HEMT at 30-V drain bias (20-mA quiescent current). Multiharmonic tuners (Focus CCMT-1880/PHT-1808) were used to allow control of three source and three load harmonics at a fundamental frequency of 2.14 GHz. The reactance of the fundamental source impedance was conjugate matched to the transistor input reactance and the resistance was moderated to avoid oscillation. Second and third source harmonic impedances

Fig. 4. Calculated efficiency and output power contours for the Mitsubishi V at all drive levels). The colored Electric GaN HEMT (assuming markers (in online version) correlate with the colored load lines (in online version) in Fig. 6.

Fig. 5. Load–pull drain efficiency contours measured for the Mitsubishi Electric GaN HEMT at 2.14 GHz for different constant output power levels under class-J operating conditions. Efficiencies of 62%–71% (not labeled in figure) region. Measured amplifier load were measured within the small 41-dBm network (Section III-D) control voltage-dependent impedance trajectories at different frequencies are overlaid.

were set close to short circuit. To enable class-J operating conditions, the second and third load harmonic impedances were set close to open circuit. Fig. 5 shows efficiency contours at constant output power levels measured by power sweeps versus fundamental load impedance. Allowing for compression, the real device delivers up to 41 dBm within a limited load impedance region (2 radius). The theoretical prediction of dBm allows for a more relaxed peak power impedance matching. Unlike theory, measurements allow a given output power to be reached for a larger range of load impedances, but at varying gate leakage, efficiency, and compression levels. For each power level, it can be seen that the efficiencies increase with increasing load

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Fig. 7. Class-J DLM amplifier load network topology used in demonstrator.

Fig. 6. Load lines calculated from theory (dashed lines) and load–pull simulations on the nonlinear transistor model (solid lines) under identical class-J con. Efficiencies are listed in the legend ditions and output power at (theoretical results in parentheses). The line colors (in online version) correspond to the colored markers (in online version) in Fig. 4.

reactance, as a higher load reactance pushes the load line further into compression. As predicted by theory, approximately 10 dB of high-efficiency dynamic range can be achieved by pure reactance load modulation, e.g., at . This gives good agreement between theoretical (Fig. 4) and measured (Fig. 5) load impedance matching, power, and efficiency performance. A number of intrinsic current source load lines for a pure reactance modulated load network are shown in Fig. 6 (corresponding to the markers in Fig. 4). These looping class-J load lines are different from the classic straight class-B load line due to a significant fundamental reactive component and the inclusion of even harmonic components that increase the peak voltage. Discrepancies between theoretical and simulated load lines are mainly attributed to distortion of the ideally half-rectified current waveforms. This is the result of transistor nonlinearities and gate feedback. Despite the nonidealities, good agreement is observed for output power and efficiency versus load impedance. This validates the applicability of the theory to nonlinear devices and practical circuit design.

B. SiC Varactor Technology Bare die SiC Schottky diode varactors specifically designed for DLM applications with material improvements to reduce the parasitic series resistance [15] were used for the design. The nonabrupt varactor characteristic allows for significantly higher voltage swings at moderate tuning ratios (4:1) compared to typical diode varactor technologies [16]. These varactors feature a 5.6:1 tuning range and a 2-GHz factor 60 at the 3:1 tuning ratio bias voltage (16 V). Minimum capacitance is reached at the punch-through bias around 52 V, while the breakdown exceeds 100 V. The leakage current is around 10 nA (4 A cm ) at 100 V for typical device sizes. For circuit

simulation, a device model was developed based on the varactor topology in [11] by fitting parameters extracted from on-wafer dc and -parameter measurements. C. Proposed Amplifier Topology The DLM network topology in Fig. 7 is proposed to realize pure fundamental load reactance tuning with low-pass filter functionality. This topology has some useful features, e.g., simple transistor drain biasing and flexibility in the choice of impedance environment depending on available varactor technology. At the fundamental frequency, the reactances of the open- and short-circuited stubs cancel and the transmission line structure functions as a quarter-wave transformer of characteristic impedance . The amplifier extrinsic load resistance (e.g., a broadband load or an impedance transformer to 50 ) is thereby transformed to the required transistor load resistance , i.e., (17) Simultaneously the shunt varactor capacitance formed to a series reactance ,

is trans-

(18) At the second harmonic, the filter open stub short circuits the rest of the load network at the stub intersection and this short circuit is transformed to an open circuit at the transistor reference plane. This makes the second harmonic independent of varactor tuning. Theoretically at higher odd harmonics , the load impedance has no effect on the intrinsic waveforms. At higher even harmonics , the influence is limited, especially as the higher harmonic loading of the current source will be dominated by the increasingly short circuited output capacitance. The critical link between transistor and varactor technology requirements in relation to the circuit topology is the choice of impedance environment (and thereby ). At any given output power, the voltage swing over the varactor equals that over the load. From (17) and (18), the linear relation between varactor capacitance and load reactance allows for a tradeoff between varactor size and voltage swing at a given tuning ratio.

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D. Amplifier Load Network Design eliminates the need for an A choice of output transformer. Based on the transistor characterization in Section III-A, a choice of is well motivated ). To reach the minimum of 15 required for peak power operation, (18) gives a minimum device capacitance of 1.8 pF assuming an antiseries connection of two varactors. A load network was assembled on a CuW carrier with wirebonded varactors attached by solder on top of the alumina lowpass filter substrate. At the time of assembly, only devices with a minimum capacitance of 3 pF were available. This implies a reduction in transistor peak power and dynamic range utilization. Single layer microchip capacitors [120 pF, 0.3 equivalent series resistance (ESR)] were used for RF grounding of the antiseries varactor stack, the low-pass filter stub, and a quarter-wave stub used for dynamic varactor biasing. Microstrip probe substrates (de-embedded by TRL calibration) were bonded to the load network input and output to enable standalone characterization. -parameters were then measured versus varactor control voltage . Measured load network impedance trajectories at a few discrete frequencies are overlaid on the load–pull contours in Fig. 5. As expected, the nonoptimal varactor size results in trajectories not reaching the 40-dBm output power region. Second harmonic open circuit (zero reflection-coefficient phase) occurs at 4.16 GHz. Correlating with a relatively pure reactive trajectory at 2.08 GHz suggests a frequency downshift of the design from 2.14 GHz. Observe that the load–pull contours in Fig. 5 are strictly only valid at 2.14 GHz, but the theory in Section II is quantitatively also valid at limited offset frequencies. Therefore, as the load network trajectory curves toward higher load resistance at higher frequencies, the back-off efficiency performance is expected to decrease.

Fig. 8. Photograph of the assembled demonstrator amplifier (CuW carrier dimensions: 35 mm 20 mm).

Fig. 9. Amplifier efficiency versus output power sweeps at 2.08 GHz for different control voltages. Efficiencies resulting from the optimum control that maximizes the PAE versus output power are indicated, measured (dotted), and simulated (dashed).

E. Amplifier Input Network and Assembly The input network impedances were designed to equal those in the load–pull measurements. Two high-impedance stubs (45 and 30 at 2.14 GHz) are used to present short circuits at the second and third harmonics. Gate biasing is done through a high-impedance quarter-wavelength short-circuit stub. A quarter-wave transformer with an inductive high-impedance transmission line presents the appropriate . fundamental matching The input network, load network, transistor, and a dc biasing substrate were mounted on a CuW carrier for grounding and good thermal conductivity. A photograph of the assembled amplifier is shown in Fig. 8. IV. AMPLIFIER MEASUREMENTS The amplifier was statically characterized versus input power, varactor control voltage, and frequency. Available input and delivered output power [continuous wave (CW)] levels were measured in a setup with couplers and power meters for appropriate de-embedding to the amplifier SMA connector reference planes. Power sweeps at 2.08 GHz for different varactor control voltages are shown in Fig. 9. Observe that relative to the drain bias (30 V), a of 30 V reverse biases the varactors by 60 V.

The amplifier peak power is limited to 38 dBm, due to the available varactor device size, and the load modulation is effective to V, after which there is no more efficiency enhancement in back-off. At 8-dB back-off, the efficiency is improved from 20% to 45% when is tuned from 30 to 4 V. In a transmitter, the input power and varactor bias should be co-controlled in an optimum way to maximize the PAE at each output power level. Efficiencies resulting from this optimum control are indicated in Fig. 9. The maximum input power was constrained to avoid forward gate current flow. This partly explains the discrepancies with simulation at higher power levels, as the transistor is not fully saturated in the measurements. At lower power levels, transistor model inaccuracies close to pinch-off affect the simulation results. The specific optimum input power and varactor voltage control functions are shown in Fig. 10 and the characteristics are typical of DLM amplifiers [6], [7], including gain expansion at high power. Although beyond the scope of this work, these functions form the basis for modulated measurements and transmitter linearization [6]. By keeping the varactor control voltage and input power fixed, the amplifier bandwidth is investigated in Fig. 11. The amplifier efficiency is clearly seen to peak around 2.08 GHz.

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Fig. 10. Optimum control functions of available input power and varactor voltage that maximizes the amplifier PAE versus output power at 2.08 GHz.

Fig. 11. Amplifier output power and efficiency versus frequency when following the optimum control function at 2.08 GHz, but backing off the input power by 2 dB.

This frequency-dependent efficiency behavior was predicted in Section III-D from the load network trajectories. At higher frequencies, the load modulation is not as effective due to trajectories with increasing load resistance when tuning for back-off. The approximate output power slope of 2 dB per 100 MHz is partly related to the design of the input network. Given its narrowband realization (high-impedance stubs), part of the frequency-dependent efficiency behavior can also be ascribed to nonrectified current wave shaping. V. DISCUSSION Simulations indicate that the load network loss at fixed control voltage is relatively independent of the power level (within a few percent). Measured and simulated loss, as a function of the load reactance, is shown with good agreement in Fig. 12. It appears that the losses increase as the low-pass filter becomes more reactively terminated in back-off conditions. The relatively high losses at high load reactance values will significantly decrease the amplifier output power and the efficiency in back-off. Through simulation the impact of various loss mechanisms was therefore studied further. Removing the

Fig. 12. Varactor control voltage-dependent load network power loss from measured -parameters presented together with simulations to break down the various loss mechanisms.

Fig. 13. Output power and efficiencies measured at the amplifier output compared to that at the GaN HEMT drain reference plane de-embedded using measured load network loss (given optimum control at 2.08 GHz).

ohmic losses in the low-pass filter (using ideal transmission lines) approximately halves the losses. Further experimentation indicates that this loss is mainly attributed to the equivalent fundamental harmonic quarter-wave line. Employing thicker and higher conductivity lines seem necessary to mitigate this. The losses are further reduced by 0.2 dB by setting the ESR in the RF grounding microchip capacitors to zero. This loss is mainly attributed to the series grounding capacitor in the varactor stack, where significant reactive current flows. Appropriate choice of capacitor technology, in a tradeoff with form factor, is therefore warranted. Finally the varactor series resistance is set to zero, leaving only the resistive losses through the bond-wires in the varactor stack. These residual losses can be minimized by a reduction in wire length or an increase in count. The load network was characterized by -parameter measurements in Section III-D and the control voltage-dependent power loss is already known. In Fig. 13, the amplifier performance can therefore be de-embedded to the

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transistor drain reference plane. Although not apparent from the amplifier measurements, the transistor DLM effect remains highly effective even when no more efficiency enhancement is observed for the complete amplifier. The de-embedded efficiencies ( 65%) are in line with class-J operation. This highlights the tremendous potential for this type of DLM amplifier architecture if care is taken to minimize the losses. VI. CONCLUSION A theory of class-J operation suitable for design and analysis of DLM amplifiers has been presented. Experimental results verify the practical applicability. Based on the results, in terms of output power and high-efficiency dynamic range, it is shown that operating a transistor near is optimal for DLM implementation. Under these conditions, it is sufficient to realize a pure reactance modulating load network, an ideal application for continuously tunable varactor technologies. This work forms a theoretical foundation, allowing for further evaluation of the potential and limitations of class-J DLM transmitters. ACKNOWLEDGMENT This study has been partially completed by using ADS and EMPro. The authors would like to thank N. Hashimoto and K. Yoshino, both with Agilent Technologies Japan, for their kind support. REFERENCES [1] F. H. Raab, P. Asbeck, S. Cripps, P. B. Kenington, Z. B. Popovic, N. Pothecary, J. F. Sevic, and N. O. Sokal, “Power amplifiers and transmitters for RF and microwave,” IEEE Trans. Microw. Theory Techn., vol. 50, no. 3, pp. 814–826, Mar. 2002. [2] J. Jeong, D. F. Kimball, M. Kwak, P. Draxler, C. Hsia, C. Steinbeiser, T. Landon, O. Krutko, L. E. Larson, and P. M. Asbeck, “High-efficiency WCDMA envelope tracking base-station amplifier implemented with GaAs HVHBTs,” IEEE J. Solid-State Circuits, vol. 44, no. 10, pp. 2629–2639, Oct. 2009. [3] M. J. Pelk, W. C. Neo, J. R. Gajadharsing, R. S. Pengelly, and L. C. N. de Vreede, “A high-efficiency 100-W GaN three-way Doherty amplifier for base-station applications,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 7, pp. 1582–1591, Jul. 2008. [4] J. H. Qureshi, M. J. Pelk, M. Marchetti, W. C. E. Neo, J. R. Gajadharsing, M. P. van der Heijden, and L. C. N. de Vreede, “A 90-W peak power GaN outphasing amplifier with optimum input signal conditioning,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 8, pp. 1925–1935, Aug. 2009. [5] F. H. Raab, “High-efficiency linear amplification by dynamic load modulation,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2003, vol. 3, pp. 1717–1720. [6] H. Cao, H. M. Nemati, A. S. Tehrani, T. Eriksson, J. Grahn, and C. Fager, “Linearization of efficiency-optimized dynamic load modulation transmitter architectures,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 4, pp. 873–881, Apr. 2010. [7] H. M. Nemati, H. Cao, B. Almgren, T. Eriksson, and C. Fager, “Design of highly efficient load modulation transmitter for wideband cellular applications,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 11, pp. 2820–2828, Nov. 2010. [8] H. M. Nemati, C. Fager, U. Gustavsson, R. Jos, and H. Zirath, “Design of varactor-based tunable matching networks for dynamic load modulation of high power amplifiers,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 5, pp. 1110–1118, May 2009.

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[9] W. C. E. Neo, Y. Lin, X. D. Liu, L. C. N. de Vreede, L. E. Larson, M. Spirito, M. J. Pelk, K. Buisman, A. Akhnoukh, A. de Graauw, and L. K. Nanver, “Adaptive multi-band multi-mode power amplifier using integrated varactor-based tunable matching networks,” IEEE J. SolidState Circuits, vol. 41, no. 9, pp. 2166–2176, Sep. 2006. [10] K. Chen and D. Peroulis, “Design of adaptive highly efficient GaN power amplifier for octave-bandwidth application and dynamic load modulation,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 6, pp. 1829–1839, Jun. 2012. [11] M. Özen, R. Jos, C. M. Andersson, M. Acar, and C. Fager, “High-efficiency RF pulsewidth modulation of class-E power amplifiers,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 11, pp. 2931–2942, Nov. 2011. [12] S. C. Cripps, RF Power Amplifiers for Wireless Communications, 2nd ed. Norwood, MA: Artech House, 2006. [13] S. Miwa, Y. Kamo, Y. Kittaka, T. Yamasaki, Y. Tsukahara, T. Tanii, M. Kohno, S. Goto, and A. Shima, “A 67% PAE, 100 W GaN power amplifier with on-chip harmonic tuning circuits for C-band space applications,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2011, pp. 1–4. [14] I. Angelov, L. Bengtsson, and M. Garcia, “Extensions of the Chalmers nonlinear HEMT and MESFET model,” IEEE Trans. Microw. Theory Techn., vol. 44, no. 10, pp. 1664–1674, Oct. 1996. [15] C. M. Andersson, B. Magnusson, N. Henelius, and N. Rorsman, “Epitaxial and layout optimization of SiC microwave power varactors,” in Proc. Asia–Pacific Microw. Conf., Dec. 2011, pp. 1642–1645. [16] C. M. Andersson, N. Ejebjörk, A. Henry, S. Andersson, E. Janzén, H. Zirath, and N. Rorsman, “A SiC varactor with large effective tuning range for microwave power applications,” IEEE Electron Device Lett., vol. 32, no. 6, pp. 788–790, Jun. 2011. Christer M. Andersson (S’11–M’12) received the M.Sc. degree in engineering nanoscience from Lund University, Lund, Sweden, in 2009, the Licentiate degree from the Chalmers University of Technology, Göteborg, Sweden, in 2011, and is currently working toward the Ph.D. degree at the Chalmers University of Technology. His main research topic is processing, characterization, and modeling of wide bandgap varactors. His research also includes the design of high-efficiency power amplifiers.

David Gustafsson (S’12) received the M.Sc. degree in engineering physics from the Chalmers University of Technology, Göteborg, Sweden, in 2009, and is currently working toward the Ph.D. degree at the Chalmers University of Technology. His main research topic is high-efficiency power amplifiers.

Koji Yamanaka (M’98) was born in Hyogo, Japan, in 1971. He received the B.Sc. degree in electric engineering and M.Sc. and Ph.D. degrees in electronic engineering from the University of Tokyo, Japan, in 1993, 1995, and 1998, respectively. In 1998, he joined the Information Technology Research and Development Center, Mitsubishi Electric Corporation, Kamakura, Japan, where he has been engaged in the development of GaAs low-noise monolithic microwave integrated circuit (MMIC) amplifiers and GaN high-power amplifiers. Since 2012, he has managed the Amplifier Group, Mitsubishi Electric Corporation. Dr. Yamanaka is a Senior Member of the Institute of Electronics, Information and Communication Engineers (IEICE), Japan. He was the recipient of the Best Paper Prize of GAAS2005 for his paper “S and C band Over 100 W GaN HEMT 1-Chip High-Power Amplifiers with Cell Division Configuration.”

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Eigo Kuwata was born in Tochigi, Japan, in 1982. He received the B.Sc. and M.Sc. degrees in electrical engineering from Waseda University, Tokyo, Japan, in 2005 and 2007, respectively. Since 2007, he has been with the Mitsubishi Electric Corporation, Kamakura, Japan, where he has been involved with the research and development of microwave amplifiers for radar or telecommunication systems. Mr. Kuwata is a member of the Institute of Electronics, Information and Communication Engineers (IEICE), Japan.

Iltcho Angelov (M’90) received the M.Sc. degree in electronics and Ph.D. degree in physics and mathematics from Moscow State University, Moscow, Russia. He was with the Institute of Electronics, Bulgarian Academy of Sciences, Sofia, Bulgaria, as a Researcher, Research Professor (1982) and Head of the Department of Microwave Solid State Devices. Since 1992, he has been with the Chalmers University of Technology, Göteborg, Sweden. His main interests are device modeling and low-noise and nonlinear circuit design.

Hiroshi Otsuka (A’04–M’04) received the B.Sc. and M.Sc. degrees in physics from Keio University, Tokyo, Japan, in 1999 and 2001, respectively. Since 2001, he has been with the Mitsubishi Electric Corporation, Kamakura, Japan, where he is currently involved with research and development of microwave amplifiers for radar or telecommunication systems. Mr. Otsuka is a Senior Member of the Institute of Electronics, Information and Communication Engineers (IEICE), Japan.

Masatoshi Nakayama (M’97–SM’04) received the B.Sc. and M.Sc. degrees in physics from Tohoku University, Sendai, Japan, in 1986 and 1988, respectively, and the D.E. degree in electronic engineering from Tohoku University, Sendai, Japan, in 1991. In 1991, he joined the Mitsubishi Electric Corporation, Kamakura, Japan, where he has been engaged in research and development of MMICs and solidstate power amplifiers (SSPAs), and is currently the Manager of the Electro-Optics and Microwave Electronics Technology Department, Information Technology Research and Development Center.

Yoshihito Hirano (M’92–SM’04) received the B.E. and M.E. degrees in material physics and D.E. degree in electronics and information engineering from Osaka University, Osaka, Japan, in 1983, 1985, and 2001, respectively. Since 1985, he has been with the Mitsubishi Electric Corporation, Kamakura, Japan, where he has been involved with research on optical communication equipment, solid-state lasers, nonlinear optics, laser radars, and microwave photonics, and where he is currently the Vice General Manager of high-frequency and optical device works. Dr. Hirano is a member of the Japan Society of Applied Physics, the Laser Society of Japan, the Institute of Electrical Engineers of Japan, and the Optical Society of America. He is a Senior Member of the IEEE Photonics Society .

Christian Fager (S’98–M’03) received the M.Sc. and Ph.D. degrees in electrical engineering and microwave electronics from the Chalmers University of Technology, Göteborg, Sweden, in 1998 and 2003, respectively. He is currently an Associate Professor and Project Leader with the GigaHertz Centre, Microwave Electronics Laboratory, Chalmers University of Technology. His research interests are in the areas of large-signal transistor modeling and high-efficiency power-amplifier architectures. Dr. Fager was the recipient of the 2002 Best Student Paper Award of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS).

Niklas Rorsman (M’10) received the M.Sc. degree in engineering physics and Ph.D. degree in electrical engineering from the Chalmers University of Technology, Göteborg, Sweden, in 1988 and 1995, respectively. His doctoral thesis concerned the development of InP-based HEMT and MMIC materials and processes and the modeling of HEMTs. From 1996 to 1998, he was with Ericsson Microwave Systems, Mölndal, Sweden, where he was involved in the modeling of III–V devices and MMIC design. In 1998, he returned to the Chalmers University of Technology, as a Researcher involved in the area of microwave wide-bandgap technology. His current research involves the processing and characterization of wide-bandgap devices and MMICs.

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Widely Tunable High-Efficiency Power Amplifier With Ultra-Narrow Instantaneous Bandwidth Kenle Chen, Student Member, IEEE, Xiaoguang Liu, Member, IEEE, and Dimitrios Peroulis, Member, IEEE

Abstract—This paper reports the first power amplifier (PA) that simultaneously achieves a very narrow instantaneous bandwidth (2%) while being tunable over a 38.5% frequency range (2.1–3.1 GHz) with a measured 50%–60% efficiency in the entire band. Such PAs are in great demand for realizing all-digital burst-mode transmitters that are expected to become critical for the future generation of wireless communication systems. Unlike state-of-the-art planar PAs that cannot simultaneously achieve a narrow bandwidth and high efficiency, the presented PA employs a widely tunable high- ( over the tuning range) cavity resonator as the output matching network. Furthermore, the tunable multiband matching is performed for both the fundamental frequency and the second harmonic to ensure a high efficiency. The measured PA is implemented with a Cree GaN transistor, and it delivers an output power of 36 dBm at a gain of 10 dB. Two-tone testing is further conducted, indicating a good linearity of this PA with an output third-order intercept point greater than 48 dBm over the entire band. This design demonstrates, for the first time, that multiband burst-mode transmitters can be potentially built with widely tunable high-efficiency narrowband PAs. Index Terms—Evanescent-mode (EVA) cavity, GaN, high efficiency, matching network, narrowband, piezoelectric actuator, power amplifier (PA), quality factor, tunable resonator.

I. INTRODUCTION

A

LL-DIGITAL burst-mode transmitters have been recently proposed and demonstrated as an effective method to efficiently and linearly amplify the modern high peak-to-average-ratio (PAR) signals, e.g., long-term evolution (LTE) [1]–[4]. Unlike the conventional supply-modulated transmitters, e.g., envelope tracking (ET) and envelope elimination and restoration (EER), the digital transmitter entirely eliminates the analog part (supply modulator), while the signal’s AM information is encoded into pulse widths, resulting in a quasi-constant-envelope input for the power amplifier (PA), Manuscript received March 22, 2012; revised August 20, 2012; accepted August 22, 2012. Date of publication October 23, 2012; date of current version December 13, 2012. This work was supported by the Defense Advanced Research Projects Agency (DARPA) under the Purdue Microwave Reconfigurable Evanescent-Mode Cavity Filters Study. K. Chen and D. Peroulis are with the School of Electrical and Computer Engineering and the Birck Nano Technology Center, Purdue University, West Lafayette, IN 47906 USA (e-mail: [email protected]; dperouli@purdue. edu). X. Liu was with the School of Electrical and Computer Engineering and the Birck Nano Technology Center, Purdue University, West Lafayette, IN 47906 USA. He is now with the Department of Electrical and Computer Engineering, University of California at Davis, Davis, CA 95616 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2220561

Fig. 1. (a) Typical PA topology with a narrowband resonator. (b) Effect of narwith a constant . (c) Effect of rowing the bandwidth on resonator with a constant bandwidth of 1%. (d) PA efficiency versus resonator’s of a narrowband design [7] and different techniques for resonator implementation.

and thus, a high efficiency [1], [2]. Such a transmitter relies heavily on a narrowband output filter to reconstruct the AM linearity. Nevertheless, the efficiency and linearity are degraded due to the rejection of the out-of-band quantization noise and pulse reflections on the transmission line (TL) between the PA and filter [1]. One possible solution for this issue is to employ a narrowband filter/resonator at the drain node of the PA’s transistor [5], [6], as illustrated in Fig. 1(a). Ideally, the resonator bandwidth needs to be as narrow as the signal bandwidth [1], typically 1%. However, narrowing the resonator bandwidth also degrades its in-band response, shown in Fig. 1(b), which eventually deteriorates the PA efficiency. Thus, a high unloaded quality factor ( , determined by the internal loss term of the resonator) is essential for such a narrowband PA design, as illustrated in Fig. 1(c). The impact of the res-

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TABLE I PERFORMANCE COMPARISON WITH OTHER BAND-RECONFIGURABLE PAs

onator’s on PA efficiency and bandwidth has been studied in [7]. The efficiency versus of a narrowband (3%) PA design is qualitatively illustrated in Fig. 1(d). Fig. 1(d) also exhibits the typical ranges of the quality factor and characteristic size of various microwave-resonator types, such as lumped elements [8], planar TLs [9]–[11], and 3-D cavities [12]–[15]. It is worth noting that the conventional lumped elements or planar TLs are not suitable for realizing narrowband high-efficiency PAs due to their inherently low . Among those techniques, the highly loaded [evanescent mode (EVA)] cavity yields an optimal option for realizing the narrowband PA in terms of size and performance, as shown in Fig. 1(d). Besides the high quality factors (300–1000) demonstrated in [12], [13], [16], and [17], the EVA cavity resonators also exhibit very large spurious-free regions, and they are widely tunable ( 2:1) by employing various tuning methods [13], [16], [17]. More importantly, the EVA cavity can be directly integrated on the same substrate as the PA [13], [16]. Those characteristics make this integrated design particularly practical. In [7], the design concept of a static narrowband PA integrated with a static EVA resonator was experimentally demonstrated at a single frequency of 1.27 GHz with 3% bandwidth. In this research, we extend the authors’ previous work to the PA with a tunable output EVA resonator and increase the operating frequency to the -band. This paper presents, for the first time, a band-reconfigurable PA with ultrahigh output frequency selectivity ( 2% bandwidth) and 38.5% frequency tuning range. Tuning is realized with an integrated piezoelectric actuator [16], [18], and the optimized matching is performed for both the fundamental frequency and the second harmonic over the entire tuning range. Large-signal measurement exhibits an efficient performance of the implemented PA, which compares favorably to those of the reported band-reconfigurable PAs [19]–[23], as presented in Table I. This design uniquely incorporates narrowband filtering in the output matching network and achieves switchless continuous tunability covering the entire 2.1–3.1-GHz band. II. TRANSISTOR SELECTION AND CHARACTERIZATION The 3-D illustration of the reconfigurable narrowband PA with a tunable EVA resonator is shown in Fig. 2. The cavity resonator is fabricated on the same substrate with the rest of the PA circuit, including the transistor, input matching network, and bias networks. The resonant frequency is sensitive to the gap distance between the sealing wall and the post . Thus, a

Fig. 2. 3-D illustration of the PA with a tunable EVA resonator. (a) Front side. (b) Back side with the tuner.

Fig. 3. Tuning mechanism of the reconfigurable EVA resonator.

piezoelectric actuator is integrated on the back side of the circuit board to change the PA’s operation frequency, and the tuning mechanism is described in Fig. 3. By applying a bias voltage between the top and bottom surfaces of the piezoelectric actuator, the membrane moves toward the post or further away from it, changing the gap spacing, and thus the resonant frequency. In this investigation, a commercial 10-W GaN transistor (Cree CGH40010F) is selected as the RF power device. The nonlinear transistor model is provided by the manufacturer. The target frequency band is from 2 to 3 GHz, and the target 3-dB bandwidth is 3%. To prescribe the desired input and output impedances of the transistor, load–pull and source–pull simulations are carried out with the manufacturer’s model using Agilent Advanced Design System (ADS) [24]. Fig. 4(a) shows the extracted optimal input and output impedances of the transistor throughout the target band, where is optimized for efficiency and is optimized for power gain. Fig. 4(b) also shows contours that yield 70% drain efficiency from 2 to 3 GHz. It is seen that the contour moves in the counterclockwise direction as frequency is increased. The shaded area in Fig. 4(b) is the overlap of the contours across the 2–3-GHz band, which is the desired

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Fig. 6. Quantitative impact of resonator quality factor on bandwidth and PA efficiency, evaluated at 2.5 GHz with CHG40010.

Fig. 4. Load–pull and source–pull simulation results of Cree GaN CGH40010F from 2 to 3 GHz. (a) Optimal load and source impedances. (b) Load impedance contours for 70% drain efficiency.

Fig. 5. Simulated load–pull contours of the second harmonic impedance: (a) at GHz, (b) at GHz, and (c) at GHz showing the overlapped region from 2 to 3 GHz.

impedance region for the resonator’s input port. As there is only one tuning freedom in this design, a large overlapped range is critical, which is described in Section III-B. The second harmonic matching is also considered in this multiband design, as it is very important for a high-efficiency PA design [26], [27]. Fig. 5 shows the second-harmonic contours from 2 to 3 GHz. The second harmonic impedance of the output resonator is desired to be located in the high-efficiency region indicated in Fig. 5(a)–(c). Fig. 5(c) shows the overlapped high-efficiency region throughout this band. III. DESIGN OF TUNABLE EVA RESONATOR AS THE OUTPUT MATCHING NETWORK A. Quantified Impact of the Resonator’s In order to investigate the effect of on bandwidth and PA efficiency for this design, harmonic-balance (HB) simulation is performed with the simplified circuit model in Fig. 1(a) at 2.5 GHz, the center frequency of the target band. In this simulation, the load impedance is set to obtained from the load–pull simulation, shown in Fig. 4(a). The HB simulation is

conducted with a variable under different bandwidths from 1% to 15%. In each set of the simulations, constant bandwidth is maintained by selecting proper values of and , which are always resonant at 2.5 GHz. It can be seen from Fig. 6 that for the regular design with , a high PA efficiency of 75% can be achieved even using a low- resonator, e.g., , as is commonly the case with planar printed circuit board (PCB)-based circuits [25]–[27]. However, as the bandwidth decreases, the advantage of using a highresonator becomes much more significant, which leads to a greatly enhanced PA efficiency. Specifically, an effective doubling of the PA efficiency is achieved of the 2% BW PA design by increasing from 100 to 300, indicated by the circled points in Fig. 6. Therefore, the high- cavity resonators are particularly critical for implementing the narrowband high-efficiency PAs. Fig. 6 also underlines the most important tradeoffs between PA efficiency, bandwidth, and according to the specific requirements of the target system. B. Output Matching Scheme Using the Strongly Coupled EVA Resonator The EVA cavity resonator is a distributed implementation of the lumped-element resonator. Fig. 7(a)–(c) shows the geometry of a typical substrate-integrated EVA cavity [13], [18]. The electrical boundary of the cavity is defined by via-holes, and a post is placed at the center. The electromagnetic field is fed into the cavity using input and output coupling apertures. The shape of the slots are aligned with the direction of the magnetic field inside the cavity resonator. The electric field is predominantly concentrated in the gap between the post and the top membrane, which represents an effective capacitor; the magnetic field is truncated between the sidewall and the post, acting as a shorted coaxial line, which represents an effective inductor [13]. The unloaded quality factor of this resonator is inherently high because the - and -field are all distributed in air. The circuit model of the EVA cavity resonator is shown in Fig. 8(a) [13], [18]. The value of can be approximated by the equivalent capacitance formed by the post and top membrane, including parallel and fringing-field capacitances; the equivalent inductance can be calculated following the model expressed in [13]; accounts for the losses in the cavity resonator. The coupling structures are modeled as ideal transformers. The actual model of the EVA resonator contains an internal TL as

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Fig. 7. Geometry of the EVA (HFSS model). (a) Top view. (b) Bottom view. (c) Side view.

, this impedance is around at the resonant frequency because the imaginary part is nullified and is a very large value for a highresonator. At a frequency slightly higher than (this will be the design frequency for the PA, ), has the similar real part as the optimal impedance . The locus [red circle (in online version) in Fig. 8(b)] does not change as the resonator is tuned to different resonant frequencies. However, if a TL (or an inductor) is connected to in series the resonator, the resonator impedance moves clockwise and can be brought to , as described in Fig. 8(c). Here, denotes the input impedance of the entire output matching network. As the resonant frequency changes, the trajectories deviates from each other due to the effect of the internal and external TLs, shown in Fig. 8(c). However, by properly choosing the length of the external TL , the trajectory can always be overlapped with the shaded region when varies from 2 to 3 GHz. Fig. 8(c) plots trajectories with different values of 2, 2.5, and 3 GHz, respectively. Outside the 2–3-GHz band, there is no longer an overlap between and the desired region because the trajectory and load–pull contour (shown in Fig. 4) move in opposing directions versus frequency. Thus, the limitation of the tuning range is found to be around 1.5:1 using this approach with this transistor. A 1.5:1 tuning range may be achieved by incorporating an additional tuning freedom with a variable electrical length of the external TL or by employing a negative refractive index TL. At the harmonic frequencies, the filter behavior of the resonator yields ideally a reflection coefficient of , leading to a rejection of the harmonic powers. The detailed design procedure is described step by step in Section III-C. C. Design Procedure

Fig. 8. Transistor output matching scheme using a strongly coupled tunable evanescent-model cavity resonator. (a) Circuit schematic. (b) Impedance of the with intrinsic resonator and impedance of the actual resonator . . (c) Input impedance of the entire output matching network

the leading structure of the intrinsic resonator, which is also indicated in Fig. 2(a). Another external TL is connected at the resonator input to further tune the input impedance of the resonator to match the transistor output. The tunable resonator-matchingnetwork design scheme is illustrated in Fig. 8. For the intrinsic resonator, the input admittance can be expressed as (1) and denote the input and output coupling coefwhere ficients, and stands for the system admittance . The input impedance moves along the constantconductance circle on the Smith chart when frequency varies. This is denoted by the red circular trajectory (in online version) in Fig. 8(b). For the special case of

Following the matching approach expressed in Fig. 8, the parameters incorporated in the output resonator design are determined in the following sequence. 1) Initial Gap: The initial gap between the post and top membrane is determined by the tuning ratio and actuator displacement range . As the piezoelectric membrane can be actuated bidirectionally, the dependence between , , and is given by (2) where denotes the maximum unidirectional deflection of the top membrane. The piezoelectric actuator (commercially available form Piezosystems Inc., Woburn, MA) used in this design is made by zirconate titanate, and it has a 0.38-mm thickness and 12.7-mm diameter. It can experimentally provide a unidirectional deflection of around 13 m [16], depending on the attachment of the tuner. The dependence of deflection and bias voltage is presented in [13]. Equation (2) implies that a smaller initial gap leads to a larger tuning ratio. However, a smaller gap also worsens the power-handling capability due to the quasielectrostatic force induced by the RF signal, as expressed in [28]. Thus, to achieve a 1.5:1 tuning ratio with the highest

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TABLE II FINAL CAVITY PARAMETERS

Fig. 9. Full-wave simulated

of the tunable resonator with various .

possible power handling, the largest possible value of should be selected, which is approximately 30 m, as calculated from (2). 2) Cavity Dimensions: The geometrical dimensions of the cavity (Fig. 7), including cavity radius and post radius , determine the resonant frequency and unloaded quality factor. An EVA model with the typical dimensions presented in [13] and [16] is utilized in this design and simulated in Ansoft High Frequency Structure Simulator (HFSS) [29]. Specifically, the cavity size needs to match the size of the piezoelectric actuator for packaging considerations, as mentioned in [16]. is then optimized to cover the desired frequency range. The finalized dimensional parameters of the cavity are listed in Table II. Fig. 9 shows the simulated of the resonator when is tuned from 17 to 46 m, indicating a frequency tuning range from 1.98 to 3.12 GHz. The simulated varies from 460 to 680 within this frequency range, which fulfills the requirements presented in Section III-A. 3) Coupling Coefficients and TL Lengths: The input and output coupling coefficients ( and ) mainly determine the resonator bandwidth, and their initial values are identically set to to result in a 2.5 3-dB bandwidth. The internal-TL length in Fig. 8 relates to the cavity size, which is given by mm as extracted from HFSS simulation. This length actually exceeds the desired value for performing the transistor matching using the scheme described in Fig. 8, requiring a negative external-TL length for tuning. However, the shortest is around 2 mm to place the bias line and transistor leading pad. To compensate this effect, the input coupling is enhanced (decreasing ), which changes the trajectory from the case with identical couplings, as illustrated in Fig. 10(a), leading to a more capacitive at . Thus, a longer is required to bring this impedance to the shaded region. The value of remains constant to maintain the bandwidth of the resonator, as indicated in Fig. 10(b). The optimized value

Fig. 10. Effect of changing the input coupling coefficient on: (a) input in Fig. 8) and (b) frequency impedance of the intrinsic resonator ( response of the resonator with a constant bandwidth of around 2.5%.

of is found from the circuit schematic simulation using ADS, given by . Subsequently, the obtained and are transferred into the physical model using HFSS. As the coupling strength is predominantly determined by the length of the slot aperture, the input aperture length is larger than the output one for achieving a stronger coupling. The finalized coupling structures and the relevant dimensions are shown in Fig. 11(a). Fig. 11(b) shows the simulated of the designed resonator with a variable from 17 to 43 m, indicating a good matching quality for the desired fundamental impedances throughout the target band. 4) Bias Line and Harmonic Matching: The dc-bias line needs to be added in order to supply the dc power to the transistor. As the feeding TL of the cavity is grounded at dc (by via-holes), a dc-block capacitor is needed to separate the transistor’s drain and ground, as shown in Fig. 11(a). In the static design [7], the bias line is realized using a suspended conducting wire. In this design, the bias line is designed as a short-ended TL appended to the external TL in order to further tune the second harmonic impedance because the second-harmonic impedance, shown in Fig. 11(b), is not optimized (does not fall into the green-shaded region (in online version) at ). A high-impedance bias TL 76 is chosen here with its length eventually determined by simulation aiming to tune the second harmonic impedance to the green overlapped region (in online version), while maintaining the fundamental impedance in the original gray-shaded region. The finalized bias-line length is 4.5 mm, shown in Fig. 11(a). The input impedance of the output resonator with the bias line is shown in Fig. 11(c),

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Fig. 12. Circuit schematic of the two-stage low-pass input matching network implemented using TL sections.

Fig. 13. Full-wave simulated results of the input matching network. (a) Output impedance at Port2. (b) -parameters with Port1 and Port2 impedances of 50 and at GHz. Fig. 11. Finalized design. (a) Entire output stage. (b) Simulated without the bias line, (c) Simulated with the bias line.

indicating that the desired matching is achieved for both the fundamental and second harmonic, leading to a quasisaturated PA mode over the target band [30]. IV. PA DESIGN AND FABRICATION A. Input Matching Network Design To match the input of the transistor across the 2–3-GHz band, a two-stage broadband low-pass matching network is designed. The synthesis and implementation of multistage low-pass matching networks for PA design has been well studied in detail in [27]. This design follows the same approach. The inductors are replaced by short TLs, and the capacitors are replaced by open-ended stubs (STs). Coplanar-waveguide (CPW) lines are used to build the TL sections of the input matching network. The circuit schematic is shown in Fig. 12. Full-wave simulation is performed for the input matching circuit using HFSS. Fig. 13(a) shows the simulated output impedance provided by this matching network. Fig. 13(b)

shows the -parameters with a 50- termination at Port1 and a Port2 impedance of the conjugate of at GHz (center frequency of the band). B. Schematic Simulation of the Implemented PA Circuit The entire circuit is created by connecting the GaN transistor to the input matching network and output resonator, and the schematic is shown in Fig. 14. The input bias network is composed of a 22-nH inductor in series with a 250- resistor as the amplifier stabilizer. Simulation using manufacturer’s models shows that this network yields an impedance of at a frequency higher than 2 GHz, which presents an effective open. Another 22-nH inductor is connected at the end of the output bias line to prevent RF power leakage. This circuit schematic is simulated using the HB simulator in ADS together with the cavity resonator model extracted from HFSS, and it is assumed that the large-signal response of the cavity resonators is the same as the small-signal response. Fig. 15 shows the simulated output power and efficiency versus frequency under a 26-dBm input stimulus, when varies from 17 to 43 m. Another set of simulations are carried out based on the circuit-schematic

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Fig. 14. Circuit schematic of the PA with a tunable EVA cavity resonator.

Fig. 16. Fabricated tunable PA-resonator module. (a) Front side. (b) Back side.

boundary of the cavity resonator is defined by copper-platted through-substrate vias. The lower surface of piezoelectric actuator is covered by a thin layer 2 m of sputtered gold. The piezo actuator is attached to the substrate using silver epoxy. V. EXPERIMENTAL RESULTS

Fig. 15. Simulated output power and efficiency versus frequency. (a) m, pF. (b) m, pF. (c) m,

pF.

model of cavity resonator (Fig. 8). Fig. 15 indicates a very good agreement between the simulation results of those two models. C. Fabrication The tunable PA module is fabricated in a single 5-mm Rogers TMM3 substrate. The front side and back side of the fabricated circuit are shown in Fig. 16(a) and (b). The transistor is soldered in a metallized slot cut into the substrate. The output tunable resonator fabrication follows a similar process with those of the standalone tunable filters in [13] and [16]. The EVA and the capacitive post are milled out inside the substrate. The electrical

To experimentally evaluate the designed PA-resonator module, the fabricated device is measured under high-power stimulus. In the measurement, the transistor gate is biased at around the threshold of 3.3 V, and the drain is biased at 25 V. The bias voltage on the piezoelectric actuator varies from 150 to 150 V to produce 13- m variation of the gap distance. In the real application, such high voltages can be supplied by integrated charge pumps [31], [32]. A. Continuous Wave (CW) Evaluation To determine the actual frequency tuning range, the smallsignal response of the implemented PA-resonator circuit is first measured using an Agilent E8361C performance network analyzer (PNA). The measured small-signal gain is plotted in Fig. 17, indicating a tuning range from 2.1 to 3.2 GHz and 12-dB small-signal gain at the center frequency over this band. Subsequently, a large-signal measurement is carried out within the same frequency band using the setup illustrated in Fig. 18. A commercial broadband PA (Mini-Circuits,

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Fig. 17. Measured small-signal frequency response. Fig. 19. Measured large-signal frequency response with 25-dBm input power.

Fig. 18. Large-signal testing setup.

16W-43 , 16-W , 41-dB gain, 1.8–4 GHz1) is used to boost the input signal. The PA gain and attenuator’s insertion loss are subtracted from the measured . Fig. 19 shows the measured frequency responses under an input stimulus of 25 dBm, which is fed into the input port of the PA-resonator module. It is important to note that although only a selection of data points are shown in Figs. 17 and 19, the PA resonator is continuously tunable over the entire frequency range. It can also be seen that there is no bifurcation distortion in the measured large-signal response due to the quasi-electrostatic force induced by the high RF signal [28], [33]. It underlines that the piezoelectric tuner is capable of handling around 37-dBm output power over the entire band. A higher output power of up to 10 W may be achieved by reducing the tuning range, i.e., using a larger initial gap. Fig. 20 shows a summary of the small- and large-signal center-frequency gain and 3-dB bandwidth over the entire frequency band. The difference in gain between small- and large-signal results are mainly due to the gain-compression effect of the PA as the transistor is saturated. It is also seen from Fig. 20 that the measured 3-dB bandwidth is around 2%–3%, which fulfills the design target. The input power is then swept from 7 to 28 dBm when the circuit is operating at a center frequency of GHz, and the measured frequency responses are shown in Fig. 21. The measured and simulated center-frequency gain and output power versus various input powers are plotted in Fig. 22, indicating that the gain starts to compress when reaches 20 dBm. A good agreement can be seen between measurement and simulation. Fig. 22 also shows the simulated efficiency performance of the PA, indicating a maximum efficiency of around 68%. 1Mini-Circuits Corporation, Brooklyn, NY. [Online]. Available: http://www. minicircuits.com/

Fig. 20. Measured bandwidth and gain.

Fig. 21. Measured frequency response of gain under various power level.

Fig. 22. Measured and simulated PA performance at input power.

GHz versus

The PA circuit is also measured using a high-power CW testing setup to evaluate the overall efficiency, as shown in

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Fig. 23. High-power testing setup for CW evaluation on the tunable PA resonator.

Fig. 25. Measured and simulated output power and efficiency across the entire band.

Fig. 24. Measured and simulated output power and efficiency under the stimulus of a frequency-swept 26-dBm CW signal.

Fig. 23. A CW signal is generated by an Agilent 4433B signal generator, and it is amplified by the -16W-43 PA. The amplified signal is applied to the input of the tunable PA resonator through a 20-dB bidirectional coupler. The output signal is fed into the power meter through another coupler. The 20-dB coupling ports of the couplers are connected to the input and output ports of the PNA, enabling the detection of the instantaneous frequency response of the circuit module. Fig. 24 shows the output power and overall efficiency when a 26-dBm input power is swept around a center frequency of GHz with a 0.4-GHz span. It is seen that the maximum output power is about 37 dBm and the maximum efficiency is around 62%. The CW measurement is then performed at various resonant frequencies over the entire band. Fig. 25 shows the measured and simulated efficiency at and the corresponding output power under the stimulus of a 26-dBm input power within the entire frequency tuning range. An overall efficiency of around 50%–60%, power-added efficiency (PAE) of 41%–52%, and of around 36.5 dBm are measured. Compared to the simulation results, the degradation of measured efficiency is mainly due to the use of silver epoxy as the bonding material, which has a much smaller conductivity compared to metals, e.g., gold and copper, leading to a reduction of [13]. A modified simulation is carried out again with a 30% reduction of , yielding a better agreement with the measurement, as shown in Fig. 25. Thus, it is estimated that the actual of the implemented resonator is around 70% of the simulated value. B. Linearity Evaluation With Two-Tone Signal The linearity performance of the tunable PA is evaluated using a two-tone signal. The measurement is first conducted

Fig. 26. Linearity measurement. (a) Output spectrum under the stimulus of a 25-dBm 20-MHz two-tone signal centered at 2.7 GHz. (b) Extraction of OIP3.

at 2.7 GHz. The separation of two tones is selected based on the passband of the narrowband PA, which is considered as the measured 1-dB bandwidth. Thus, a 20-MHz spacing is utilized at 2.7 GHz. Fig. 26(a) shows the captured output spectrum of the PA under a 25-dBm two-tone stimulus, indicating a third-order intermodulation (IM3) of 16 dBc at the saturated power level. The output third-order intercept point (OIP3) is extracted by varying the input power of the two-tone signal, as illustrated in Fig. 26, leading to a measured OIP3 of 49 dBm. The same experiment is then conducted at three different frequency points of 2.1, 2.4, and 3 GHz. The measured OIP3 is greater than 48 dBm over the entire tuning frequency range, as shown in the inset of Fig. 26(b). The measured results compare favorable to those of a reported linear PA design [34], indicating a good linearity performance of this PA. It is also important to note that the frequency separation of the two-tone

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signal is much higher than the mechanical resonant frequency of the piezoelectric actuator, i.e., 5 kHz, as mentioned in [33], causing a negligible contribution to the intermodulation (IM) distortion induced by the vibration of the piezo membrane. Thus, the generation of IM products is solely due to the PA’s nonlinear behavior. VI. CONCLUSION This paper has demonstrated, for the first time, a novel bandreconfigurable PA design that incorporates narrowband filtering at the output while achieving a high operating efficiency. These features are of great importance for the PAs in all-digital burstmode transmitters. The key enabler of such a narrowband highefficiency design is the utilization of high- EVA resonator as the output matching network. Furthermore, continuous frequency tunability is realized with an integrated piezoelectric actuator, and both the fundamental and second-harmonic matchings are performed to ensure high efficiency. Experimental results show that the implemented PA simultaneously achieves a very narrow bandwidth of 2% and a continuous tunability from 2.1 to 3.1 GHz, while maintaining an efficient PA performance of 50%–60% efficiency, 36-dBm output power, and 10-dB gain throughout this band. Moreover, the evaluation using a two-tone signal reveals a good linearity performance of this PA. ACKNOWLEDGMENT The authors would like to thank Dr. H. H. Sigmarsson, E. Naglich, and Dr. S. Moon, all with Purdue University, West Lafayette, IN, for helpful discussions and technical assistance. The authors are also grateful to Cree Inc., Durham, NC, for supplying the transistor model. The views expressed are those of the authors and do not reflect the official policy or position of the Department of Defense or the U.S. Government. Approved for Public Release, Distribution Unlimited. REFERENCES [1] P. Reynaert, “Polar modulation,” IEEE Microw. Mag., vol. 12, no. 1, pp. 46–51, Jan. 2011. [2] S. Blasubramanian, S. Boumaiza, H. Sarbishaei, T. Quach, P. Orlando, J. Volakis, G. Creech, J. Wilson, and W. Khalil, “Ultimate transmission,” IEEE Microw. Mag., vol. 13, no. 1, pp. 64–82, Jan. 2012. [3] D. R. Parveg, P. Singerl, A. Wiesbauer, H. M. Nemati, and C. Fager, “A broadband, efficient, overdriven class-J RF power amplifier for burst mode operation,” in Proc. 40th Eur. Microw. Conf., Sep. 2010, pp. 1666–1669. [4] E. Serebryakova, A. Samulak, K. Blau, and M. Hein, “Reconstruction filters for switch-mode power amplifier systems,” in Proc. 39th Eur. Microw. Conf., Oct. 2009, pp. 1453–1456. [5] B. Francois, P. Reynaert, A. Wiesbauer, and P. Singerl, “Analysis of burst-mode RF PA with direct filter connection,” in Proc. 40th Eur. Microw. Conf., Sep. 2010, pp. 974–977. [6] B. Francois, E. Kaymaksut, and P. Reynaert, “Burst mode operation as an efficiency enhancement technique for RF power amplifiers,” in IEEE USI Gen. Assembly Sci. Symp., Aug. 2011, pp. 1–4. [7] K. Chen, X. Liu, W. J. Chappell, and D. Peroulis, “Co-design of power amplifier and narrowband filter using high- evanescent-mode cavity resonator as the output matching network,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2011, pp. 1–4.

[8] K. Entesari, K. Obeidat, A. R. Brown, and G. M. Rebeiz, “A 25–75-MHz RF MEMS tunable filter,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 11, pp. 2399–2405, Nov. 2007. [9] R. H. Geschke, B. Jokanovic, and P. Meyer, “Filter parameter extraction for triple-band composite split-ring resonators and filters,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 6, pp. 1500–1508, Jun. 2011. [10] S. Park, M. A. El-Tanani, I. Reines, and G. M. Rebeiz, “Low-loss 4–6-GHz tunable filter with 3-bit high- orthogonal bias RF-MEMS capacitance network,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 10, pp. 2348–2355, Oct. 2008. [11] K. Entesari and G. M. Rebeiz, “A 12–18-GHz three-pole RF MEMS tunable filter,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 8, pp. 2566–2571, Oct. 2005. [12] S. Park, I. Reines, C. Patel, and G. M. Rebeiz, “High- RF-MEMS 4–6-GHz tunable evanescent-mode cavity filter,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 2, pp. 381–389, Feb. 2010. [13] X. Liu, L. P. B. Katehi, W. J. Chappell, and D. Peroulis, “High- continuously tunable electromagnetic cavity resonators and filters using SOI-based RF MEMS actuators,” J. Microelectromech. Syst., vol. 19, no. 4, pp. 774–784, Jul. 2010. [14] L. Harle and L. P. B. Linda, “A horizontally integrated micromachined filter,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2004, pp. 437–440. [15] M. Stickel, G. V. Eleftheriades, and P. Kremer, “High- bulk micro-band,” IET Electron. Lett., machined silicon cavity resonator at vol. 37, no. 7, pp. 433–435, Mar. 2001. [16] S. Moon, H. H. Sigmarsson, H. Joshi, D. Peroulis, and W. J. Chappell, “Substrate integrated evanescent-mode cavity filter with a 3.5 to 1 tuning ratio,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 8, pp. 450–452, Aug. 2010. [17] M. S. Arif, W. Irshad, X. Liu, W. J. Chappell, and D. Peroulis, “A high- magnetostatically-tunable all-silicon evanescent cavity resonator,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2011, pp. 1–4. [18] H. Joshi, H. H. Sigmarsson, S. Moon, D. Peroulis, and W. J. Chappell, “High- fully reconfigurable tunable bandpass filter,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 12, pp. 3525–3533, Dec. 2009. [19] A. Fuduka, H. Okazaki, and S. Narahashi, “A novel compact reconfigurable quad-band power amplifier employing RF-MEMS switches,” in Proc. 36th Eur. Microw. Conf., Sep. 2006, pp. 344–347. [20] H. Zhang, H. Gao, and G. Li, “Broad-band power amplifier with a novel tunable output matching network,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 11, pp. 3606–3614, Nov. 2005. [21] W. E. Neo, J. Lin, X. Liu, L. C. N. de Vreede, L. E. Larson, M. Spirito, M. Pelk, K. Buisman, A. Akhnoukh, A. de Graauw, and L. Nanver, “Adaptive multi-band multi-mode power amplifier using integrated varactor-based tunable matching network,” IEEE J. Solid-State Circuits, vol. 41, no. 9, pp. 2166–2177, Sep. 2006. [22] H. M. Nemati, J. Grahn, and C. Fager, “Band-reconfigurable LDMOS power amplifier,” in Proc. 40th Eur. Microw. Conf., Sep. 2010, pp. 978–981. [23] K. Chen and D. Peroulis, “Design of adaptive highly efficient GaN power amplifier for octave-bandwidth application and dynamic load modulation,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 6, pp. 1829–1839, Jun. 2012. [24] Advanced Design System (ADS). ver. 9, Agilent Technol., Santa Clara, CA, 2009. [Online]. Available: http://www.agilent.com. [25] H. M. Nemati, C. Fager, M. Thorsell, and H. Zirath, “High-efficiency LDMOS power amplifier design at 1 GHz using an optimized transistor model,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 7, pp. 1647–1654, Jul. 2009. [26] V. Carrubba, J. Lees, J. Benedikt, P. J. Tasker, and S. C. Cripps, “A novel highly efficient broadband continuous class-F RFPA delivering 74% average efficiency for an octave bandwidth,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2011, pp. 1–4. [27] K. Chen and D. Peroulis, “Design of highly efficient broadband class-E power amplifier using synthesized lowpass matching networks,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 12, pp. 3162–3173, Dec. 2011.

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[28] X. Liu, L. P. B. Katehi, W. J. Chappell, and D. Peroulis, “Power handling of electrostatic MEMS evanescent-mode (EVA) tunable bandpass filters,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 2, pp. 270–283, Feb. 2012. [29] High Frequency Structure Simulator (HFSS). Ansoft Cooperation, Pittsburgh, PA, 2011. [Online]. Available: http://www.ansoft.com/products/hf/hfss/ [30] J. Kim, J. Kim, J. Moon, J. Son, I. Kim, S. Jee, and B. Kim, “Saturated power amplifier optimized for efficiency using self-generated harmonic current and voltage,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 8, pp. 2049–2058, Aug. 2011. [31] M. R. Hoque, T. Ahmad, T. McNutt, A. Mantooth, and M. M. Mojarradi, “Design technique of an on-chip, high-voltage charge pump in SOI,” in IEEE Int. Circuits Syst. Symp., Mar. 2006, pp. 133–136. [32] V. Jimenez, J. Pons, M. Domingues, A. Bermejo, L. Castaner, H. Nieminen, and V. Ermolov, “Transient dynamics of a MEMS variable capacitor driven with a dickson charge pump,” Sens. Actuators A, Phys., vol. 128, no. 1, pp. 89–97, Mar. 2006. [33] K. Chen, H. H. Sigmarsson, W. J. Chappell, and D. Peroulis, “Power handling of high- evanescent-mode tunable filters with integrated piezoelectric actuators,” in IEEE MTT-S Int. Microw. Symp. Dig., Jul. 2012, pp. 1–3. [34] A. Sayed, A. A. Tanany, and G. Boeck, “5 W,0.35–8 GHz linear power amplifier using GaN HEMT,” in Proc. the 39th Eur. Microwave Conf., Sep. 2009, pp. 488–491.

Kenle Chen (S’10) received the Bachelor’s degree in communication engineering from Xi’an Jiaotong University, Xi’an, China, in 2005, the Master’s degree in electronics and information engineering from Peking University, Beijing, China, in 2008, and is currently working toward the Ph.D. degree at Purdue University, West Lafayette, IN. From 2007 to 2008, he was with the Institute of Micro Electronics, National Key Laboratory of Micro/Nano Fabrication, Peking University, where his research focused on RF microelectromechanical systems (MEMS) switches, tunable filters, and vacuum packaging. He is currently with the School of Electrical and Computer Engineering and Birck Nanotechnology Center, Purdue University, where his research interests include broadband highly efficient PA design methodologies, adaptive PAs and transmitters, integration of PA and high- filter (co-design technique), and high-power failure mechanisms of microwave devices. Mr. Chen was the recipient of the Second Place Award and Third Place Award of the Student High Efficiency Power Amplifier Design Competition, IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS) in 2012 and 2011, respectively. He was also a recipient of 2012 IEEE MTT-S Graduate Research Fellowship.

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Xiaoguang Liu (S’07–M’11) received the Bachelor’s degree in electrical engineering from Zhejiang University, Hangzhou, China, in 2004, and the Ph.D. degree from Purdue University, West Lafayette, IN, in 2010. He is currently an Assistant Professor with the Department of Electrical and Computer Engineering, University of California at Davis. His research interests include novel MEMS/nanoelectromechanical systems (NEMS) devices, high- tunable components for reconfigurable radio frontends, microwave/millimeter-wave/terahertz electronics, and biomedical applications of microwave/ultrasound technologies. Dimitrios Peroulis (S’99–M’04) received the Ph.D. degree in electrical engineering from The University of Michigan at Ann Arbor, in 2003. Since August 2003, he has been with Purdue University. He leads the Adaptive Radio Electronics and Sensors (ARES) team, which focuses on reconfigurable analog/RF electronics for adaptive communications, signal intelligence, and harsh-environment sensors. He has been a Principle Investigator (PI)/co-PI in over 40 projects funded by government agencies and industry in these areas. Since 2007, he has been a key contributor to the Defense Advanced Research Projects Agency (DARPA) Analog Spectral Processors (ASPs) (Phases I–III) project resulting in the first widely tunable (tuning range 3:1) pre-select radio filters with unprecedented quality factors and power handling 10 W for high-frequency applications (1–30 GHz). A wide variety of reconfigurable filters with simultaneously adaptable features including frequency, bandwidth, rejection level, filter order, and group delay have been demonstrated over the past four years. His group recently codeveloped a ground-breaking concept of field programmable filter arrays (FPFAs). Inspired by FPGAs in digital systems, FPFAs are based on a sea of coupled resonators and multiple ports in order to enable reutilization of the same adaptive resonators to support diverse needs for dissimilar systems. Arbitrary operational modes and multiple operational channels may be created and reconfigured at will. Moreover, he has made significant advances in high-power high-efficient PAs and RF CMOS integrated circuits (ICs) with high-efficiency antennas. In the areas of sensors, he has also demonstrated the first wireless battery-free high-temperature MEMS sensors for health monitoring of sensitive bearings in aircraft engines. These sensors continuously monitor (RF identification (RFID) type) the true temperature of the bearing to over 300 °C or 550 °C (depending on the design) and wirelessly transmit it to a base station. These sensors are based on well-established silicon processing for low-cost high-yield manufacturing. They have demonstrated extremely robust operation for over 1B cycles and continuous loading for over three months without failure. Prof. Peroulis and his team were the recipients of Third Place in the Student PA Design Competition, 2011 IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS). In addition, a student design team led by Prof. B. Jung (lead) and himself (assistant team leader) at Purdue University was awarded the First Place Awards in Phases I and II of the 2007–2008 SRC/SIA IC Design Challenge by demonstrating high-efficiency chip-to-chip wireless links with -band transceivers. Further advances led to bond-wire Yagi antenna arrays with efficiencies exceeding 80%.

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An 8-bit Integrate-and-Sample Receiver for Rate-Scalable Photonic Analog-to-Digital Conversion Timothy D. Gathman, Member, IEEE, and James F. Buckwalter, Member, IEEE

Abstract—Jitter limitations pose significant challenges for highresolution and sampling-rate analog-to-digital converters (ADCs). This paper describes an integrate-and-sample (IAS) receiver suitable for use in an optical parametric photonic ADC. Rate-scalable photonic-sampling techniques provide low-jitter optical sampling and analog-to-digital conversion of the wideband signal up to 10 GHz and beyond. An 8-bit 2-GS/s IAS receive channel is described for a rate-scalable photonic ADC. Electronic measurements are shown for an RF tone and a photonic Gaussian pulse source and compared to simulations. A two-channel IAS array is fabricated in a 120-nm SiGe BiCMOS process and packaged onto a printed circuit board for integration into the photonic-sampling setup. A single 2-GS/s channel achieves a measured performance higher than 8.1 ENOB. The two-channel integrated circuit consumes 890 mA per channel from 5- and 2.5-V supplies and occupies an area of 1.6 2.0 mm . Index Terms—Analog integrated circuits (ICs), analog signal processing, analog-to-digital conversion, analog/mixed signal, broadband communications, optical communication systems, optical sampling.

I. INTRODUCTION

S

AMPLING jitter poses significant limitations for current electrically sampled analog-to-digital converter (ADC) architectures and electronic clock sources trying to push the resolution limits for multigigahertz signals [1]–[3]. Multigigahertz instantaneous bandwidth systems with resolutions higher than 8 bits are desirable for future radar, surveillance, and communication systems, both for wideband high data-rate systems and software-defined radio [4]. The signal-to-noise ratio (SNR) of electronic RF sampling ADCs is constrained by static and dynamic behavior, but ultimately at higher input frequencies aperture jitter degrades the Manuscript received March 16, 2012; revised September 21, 2012; accepted September 24, 2012. Date of publication November 16, 2012; date of current version December 13, 2012. This work was supported by the Defense Advanced Research Projects Agency (DARPA) under Contract HR0011-10-C-0061. This paper is an expanded paper from the 12th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Santa Clara, CA, January 15, 2012.. T. D. Gathman was with the Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA 92093 USA. He is now with Qualcomm Technologies Inc., San Diego, CA 92121 USA (e-mail: [email protected]). J. F. Buckwalter is with the Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA 92093 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2222042

Fig. 1. RMS timing jitter as a function of the input frequency for state-ofthe-art electronic ADCs and photonic-sampling sources/gates.

SNR [3]. This is because thermal noise power increases proportionally to the noise bandwidth of the ADC system, but the jitter noise power increases quadratically with input frequency. Above a certain input frequency, jitter noise limits the sampling resolution. Recently, 100-fs rms jitter has been reported [2] for electrically sampled ADCs; eight effective-number-of-bits (ENOB) has not been reached above 5 GHz. This paper describes a technique to digitize a 10-GHz instantaneous bandwidth with 8-bit ENOB through a rate-scalable photonic-sampling architecture [5]–[9]. Current limits for the state-of-the-art are shown in Fig. 1 [10]. The 8-bit ENOB performance at 10 GHz requires 51 fs of rms aperture jitter, and is slightly above current limits in electronic ADCs, but is well within the performance of photonic sources and sampling gates. Photonic clock sources, such as mode-locked lasers, have been characterized to have attosecond-resolution timing jitter [11], and total converter sampling jitter, including the source and gate, has been measured to be below 16 [12] and below 8.5 fs [13]. In reality, other noise sources (i.e., quantization noise and thermal noise), as well as distortion, are included in the calculation of ENOB and an even more stringent jitter specification must be placed on the clock source and ADC sampling circuitry. In addition to having extremely low jitter clock sources and sampling gates, wavelength interleaving, frequency channelization, and multicasting can be supported in a single fiber [5]–[9]. Photonic-sampling gates have been realized with Mach–Zehnder modulators [13] or highly nonlinear fiber [8]. These photonic-sampling gates have no additive jitter. Multicasting, used in the rate-scalable approach, replicates the RF signal onto multiple wavelengths in a single fiber where interleaved sampling and channelization of the samples occurs. Subsequently, the pulse samples are demultiplexed and processed/digitized in the electrical domain. Interleaving at

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Fig. 2. Photonic-sampling architecture with electrical receiver and quantizer.

multigigasample/second speeds is important since electronic scaling and performance does not scale linearly at high speeds and high sample rates [14]. As an alternative to rate-scalable photonic-sampling architectures discussed in this paper, time-stretching approaches [15] and wavelength-division approaches [16] also seek to improve the state-of-the-art in aperture jitter performance for sampling wideband signals. The photonic time-stretched ADC [15] seeks to reduce the signal bandwidth prior to digitization to mitigate aperture jitter. The approach from [16] seeks to use wavelength demultiplexing to time-interleave low-jitter optical samples to multiple lower sample-rate electronic ADCs. The integrate-andsample (IAS) receiver described in this paper is targeted toward rate-scalable photonic ADC approaches; however, in general, it functions as an electronic receiver suitable for photonic ADCs employing optical pulse sampling such as [16]. In Section II, a photonic-sampling architecture based on wavelength multicasting is presented and the IAS receiver is introduced. In Section III, the electronic circuit limitations for high-linearity receivers are discussed. The high-linearity low-noise electronic IAS receiver is discussed in Section IV. Section V discusses electronic and photonic measurements of the circuit. II. RATE-SCALABLE PHOTONIC-SAMPLING ARCHITECTURE The rate-scalable photonic-sampling architecture is shown in Fig. 2 [5]–[9]. The RF input is modulated onto an optical carrier via the Mach–Zehnder modulator (MZM). Four-wave mixing in a single highly nonlinear fiber replicates the RF input onto multiple optical wavelengths with high fidelity. Subsequently, each wavelength is delayed so that the RF signal is shifted by ps, and a sub-rate clock (relative to 20 GS/s) samples all interleaved wavelengths simultaneously, again in a single fiber. Sharp sampling pulses are dispersively stretched in singlemode fiber, spreading the optical power temporally so that the instantaneous power does not saturate the photodetectors and electronic receivers. After an arrayed waveguide grating, each wavelength is demultiplexed to a separate photodetector and IAS receiver. Sample-and-hold outputs are provided to an array of electronic ADCs. The scalability and potential jitter improvements of this copy-and-sample-all technique are discussed in

Fig. 3. Photonic-sampling pulses at 2-GS/s sampling a dc signal (top) and a 200-MHz sinusoid (bottom) measured on an optical scope. The pulse FWHM duration is approximately 2 ps and is dispersed in SMF to approximately 50 ps for electronic sampling. The data was acquired with an optical equivalent sampling oscilloscope with 800-fs resolution.

[17]; the achieved sample rate for a single channel is significantly higher [9] compared to previous work [12], [18], which would require significantly more sub-rate channels to achieve the same instantaneous bandwidth. To reach a linearity better than 57 dBc requires a photonic link, multicasting, and sampling performance with a spuriousfree dynamic range (SFDR) of 130 dB Hz . This is approximately an order of magnitude higher than state-of-the-art microwave linearized photonic links, which have achieved 120 dB Hz [19]. The bottleneck for SFDR is the RF to photonic modulation process. Since the MZM represents a wellknown nonlinearity, distortion from modulator nonlinearity can be compensated [20], [21]. Fig. 3 shows the optical pulse train for a single-channel sampling a dc signal and a 200-MHz sinusoid at 2 GS/s. Pulses are spaced in time by a period of 500 ps. These amplitude-modulated pulse samples will be applied to a photodetector to convert optical power into current, and then subsequently integrated, sampled, and digitized by the electronic receiver. The amplitude and bandwidth of the pulse are determined by the full-width half-maximum (FWHM) pulsewidth. For the same pulse energy, the FWHM and amplitude are inversely related, as shown in Fig. 4. Dispersion limits the achievable SNR for long pulse widths, but short pulses require high bandwidth

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Fig. 5. Various operating regimes for SNR as a function of optical power. Fig. 4. Gaussian pulsewidths for various FWHM and dispersion, normalized in integrated current (charge). Longer FWHM reduces the peak voltage for the same pulse energy and reduces the subsequent bandwidth and linearity requirements of the photodetector and electronic receiver.

and high peak current excursions, which cause excessive receiver distortion. The pulse 3-dB bandwidth is related to the pulsewidth as . A 50-ps FWHM pulse in the optical domain will have an electrical bandwidth of approximately 6.2 GHz, which is significantly larger than the Nyquist frequency (1 GHz) for a 2-GS/s ADC. To maximize the SNR, an IAS electronic receiver is used, which is the combination of the integrate-and-dump receiver from [22] and a sample-and-hold circuit consisting of two cascaded track-and-holds (TAHs). The photonic pulse is approximated as a Gaussian pulse from an electronic standpoint with an FWHM in optical power and electric current of 50 ps. Mathematically, this is expressed for a sample rate as

(1) The IAS receiver approximates a matched filter for the Gaussian pulse as long as integration persists only when there is considerable optical power. Longer integration periods degrade the SNR since the noise power increases proportionally with the integration time. However, longer integration time mitigates photodetector saturation by continuing integration of the low amplitude tail as the peak pulse is spread over a longer duration in the time domain due to photodetector saturation [23], [24]. Integration also provides the subsequent sampling circuits with a relatively constant waveform after the integration period, relaxing both bandwidth requirements and sampling jitter. Windowed integration is expressed in the time domain with an impulse response of (2) is the transconductance of the integrator, is where the integration capacitance, and is the integration period. Taking the Fourier transform of (2), the frequency response of the ideal Gm-C IAS is

compensation, and distortion mitigation due to windowed integration. III. PERFORMANCE LIMITATIONS PULSE SAMPLING

FOR

GAUSSIAN

A. Noise Sources Noise contributions of the IAS and photonic-sampling system are amplitude spontaneous emissions (ASEs), relative intensity noise (RIN), shot noise, thermal noise from the 50- interconnects, as well as thermal, shot, and channel noise from the Gm-C integrator and TAH stages. As the SNR and signal-to-noise and distortion ratio (SINAD) are established by the electronic receiver response, the SNR is calculated here assuming impulse sampling following the windowed integration. The operating regions for the photonic link noise are shown in Fig. 5. At low optical power, the link is thermal-noise limited. At medium optical powers, the shot noise limits the link as increasing the optical power results in a quadratic increase in electrical power since where is the optical responsivity. At high power, the link is limited by laser amplitude and the RIN; the optimum optical power and peak SINAD is obtained in this region. Further increases in optical power result in photodetector and receiver saturation, ultimately resulting in distortion-limited performance. A model of the front-end noise of the IAS receiver is shown in Fig. 6. The noise current spectral density contains contributions from photodetector shot noise, thermal noise from the source and input resistance, and transconductor noise (4) The IAS receiver provides noise shaping due to the windowed integration. The magnitude of the Fourier transform of the integration window gives a noise transfer function from (3). Adding all noise sources, the SNR is expressed at the output of the Gm-C integrator as

(3) The IAS receiver improves the performance of the photonic ADC front-end from [9] via matched filtering, dc-offset

(5)

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Fig. 6. IAS system for analyzing jitter and SNR.

B. Finite Reset Bandwidth Finite reset bandwidth causes a residue to persist from previous integration periods. This history is expressed by the discrete-time difference equation (6) where

, , and is the reset bandwidth determined by the reset switch resistance and the integration capacitance, and is the reset period duration. The transfer function is expressed from the discrete-time Fourier transform as (7) The signal history results from a low-pass response that boosts both signals and noise at low frequencies and attenuates signals and noise close to the Nyquist frequency. To minimize the effects on both SNR and interleaved SFDR, the residue should be minimized.

varied by the clock jitter , both on the rising and falling edges of the pulse. As a result, the SNR due to jitter is

(8) is the correlation between the rising and falling where edges of the offset current pulse, and is the rms timing jitter. Correlation serves to reduce the impact of jitter for an integrated pulse [25]. 2) Jitter Due to Droop: The output of the integrator will droop due to the finite output resistance of the npn and PMOS load. As such, there is an additional opportunity for droop-induced-jitter for the optical modulated pulse train. During the hold period, the output of the Gm-C integrator follows: (9) where is the time constant of the output impedance of the integrator. Taking the Taylor-series expansions around and integrating a whole period of , the SNR due to leaky integration is (10)

C. Jitter In Sections III-C.1–III-C.3, jitter will be described for the optical sampling front-end with optical pulses. Integration relaxes the jitter requirements in the IAS: the integration window is significantly longer than the pulse FWHM, capturing the entire pulse, as shown in Fig. 6. Therefore, the most important sources of jitter are the dc-offset compensation and the voltage droop in the Gm-C integrator. To compare between windowed integration and the alternative of impulse sampling, the jitter limitations impulse sampling the Gaussian pulse shown in Fig. 6 are described in Section III-C.3. 1) Jitter Due to DC-Offset Compensation: In the photonicsampling architecture, dc imbalance in the photonic sampled pulse creates a jitter issue in the electronic receiver. A sampled discrete-time feedback loop is used in the IAS to instantaneously cancel the dc offset, applying a pulse opposite in polarity to the Gaussian photocurrent pulse, as depicted in Fig. 6. Unfortunately, the duration of this compensation period is

Since the pole frequency due to the output impedance of the integrator is much less than the signal frequency, the SNR degradation due to droop can be neglected. 3) Jitter Due to Impulse Sampling of Gaussian Pulse: Integration and sampling provides significantly better jitter performance compared to impulse sampling of the original Gaussian pulse waveform, which has a bandwidth higher than 6 GHz. If instead impulse sampling is used to sample the peak of the Gaussian pulse, as shown in Fig. 6, jitter and sampling skew impacts the SNR as (11) For instance, for a ps pulse, ps, and fs, the maximum achievable ENOB is 8.5 bits. In contrast, windowed integration has an insignificant impact on SNR if the integration window is longer than the pulse duration, i.e., .

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Fig. 7. IAS receiver with integrated TAH for low-jitter high dynamic-range photonic analog-to-digital conversion.

D. Settling Into ADC Accuracy between the sampled data at the TAH output and the ADC input requires sufficient settling time. The settling accuracy is degraded by finite input and output bandwidth, packaging, interconnect signal integrity, and differential mismatch. With the cascaded master–slave TAH architecture, the output waveform is held constant for most of the clock period of 500 ps. Assuming that the TAH output is settled for approximately 400 ps, the output TAH bandwidth and input bandwidth of the subsequent ADC should exceed 2.75 GHz for proper settling to 10 bits. Packaging inductance also degrades settling as excessive bond-wire inductance causes ringing and instability in the output waveform. Frequency-dependent loss and dispersion in the printed circuit board (PCB) transmission lines and cables produces low amplitude settling tails with relatively long time constants. Differential mismatch converts common-mode noise, distortion, and interference into differential mode. In order to mitigate second-order distortion from appearing in the presence of interconnect and packaging mismatch, a fully differential 50- buffer is implemented with symmetric layout routing to avoid differential mismatch.

E. Distortion The IAS receiver must simultaneously have low noise performance and low distortion. The photonic-sampling architecture provides several obstacles that must be overcome to achieve high dynamic range. First, the single-ended photocurrent from the photodetector must be converted to a differential signal and integrated with minimal distortion. Single-ended signals are especially taxing on the second-order distortion performance of a differential circuit. Additionally, the photodetector swing must be kept to a minimum to avoid distortion, while at the same time maximizing the SNR due to shot and thermal noise requires maximizing the output photocurrent; this tradeoff is expressed in terms of optical power in Fig. 5.

F. SINAD As both noise and linearity contribute to the overall performance, the best performance metric for the hybrid electronic photonic ADC is SINAD/ENOB. SINAD is listed here in terms of the voltage noise spectral density , the effective noise bandwidth , which for the IAS is approximately , the jitter noise power , and the second- and third-order harmonic distortion terms (12) Integration helps to mitigate distortion due to the nonlinearity of the IAS for pulse inputs, as integration of the photocurrent averages the entire pulse. In contrast, impulse sampling samples the photocurrent peak amplitude, which experiences the most nonlinear distortion. IV. CIRCUIT DESIGN A single channel of the IAS receiver is shown in Fig. 7. A photodetector receives the dispersed single-ended Gaussian sampling pulses shown in Fig. 2. The Gm-C circuit integrates the photocurrent and is reset after the integration period, ending the integration period and providing windowed integration. A cascaded master/slave TAH provides a stable output waveform for almost an entire period that is 50 buffered to a commercial ADC for quantization and data capture. The held output of the second TAH allows proper settling at the input to the ADC, relaxing bandwidth, dynamic nonlinearity, and jitter requirements for the commercial ADC. Finally, a discrete-time offset current is provided during the integration period to cancel the dc offset of the photocurrent pulse, as well as the inherent offsets of the Gm-C filter and cascaded TAHs. Each block will be described in detail in Sections IV-A and IV-B. A. Gm-C Integrator MOS-input Gm-C integrators have much better noise-linearity tradeoffs due to the intrinsic linearity of the MOS tran-

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Fig. 9. Double-switched TAH architecture with feedback around the SEF to decrease the pedestal error. Fig. 8. Schematic of the Gm-C integrator with the common-mode feedback amplifier.

sistor compared to the exponentially nonlinear voltage-to-current relation of bipolar devices that must be heavily degenerated to obtain sufficient linearity [26]. However, a photonic system does not readily provide differential signals (i.e., photodetectors are single ended) and the single-ended input places stringent requirements on the second-order distortion required in the front-end integrator. Therefore, highly degenerated bipolar devices must be used to get low second-order distortion at the cost of higher thermal noise due to a reduction in transconductance and the thermal noise of the degeneration resistors. To simultaneously achieve low noise, high linearity, and high (unity gain) bandwidth, a resistively degenerated Gm-C integrator shown in Fig. 8 was used both to convert from single-ended to differential and also to integrate the optical pulse samples. Increasing the degeneration of the differential pair decreases their transconductance and reduces the unity-gain bandwidth (UGB) of the Gm-C integrator. High bandwidth is required to provide sufficient gain between the voltage generated by the photocurrent at the input of the Gm-C integrator and the subsequent TAH, which requires to maximize the SNR. The target UGB of the Gm-C integrator is GHz to achieve a swing at the output. The UGB is expressed with strong degeneration as (13) where is approximately 28 and is the integration capacitance provided mainly by the pFET load. The main source of nonlinearity in the Gm-C integrator is the transconductance of the HBT and is expressed as (14) where is the input voltage and is the combination of the photodetector termination and input termination of the Gm-C integrator. Resistive degeneration is required in this block to provide wideband linearization due to the high-bandwidth single-ended optical pulses.

The second-order harmonic distortion is the most difficult specification due to the inherent dc offset of the photodetector and the single-ended photocurrent. From [22], the distortion analysis in [27] is adapted for second-order harmonic distortion as (15) is the third-order harmonic distortion with resistive where degeneration feedback [22] (16) Increasing the resistive degeneration lowers and , but at the cost of increased thermal, shot, and channel noise [22]. The noise spectral density of the Gm-C integrator for , can be expressed as (17) is the where is a technology-dependent noise parameter, emitter degeneration resistor, is the pFET source degeneration resistor, and is the thermal voltage of the HBT. Degeneration of the pFET current sources is necessary to reduce the noise contribution from the last term in (17), but also to reduce droop and droop nonlinearity due to the nonlinear of the pFET. A reduction in Miller effect is also important for the Gm-C integrator, as the base-to-collector capacitance of the input pair is effectively multiplied by the open-loop gain. Partial cancellation of the Miller capacitance is achieved via cross-coupled neutralization capacitances shown inFig. 8 as a tradeoff between the Miller effect and a degradation in input return loss due to additional capacitance at the input to the Gm-C integrator. The common-mode feedback circuit is shown in Fig. 8. It is important that the common-mode feedback amplifier have a unity-gain frequency approximately equal to the differentialmode unity-gain frequency of the Gm-C integrator to avoid excessive common-mode variations, especially as a single-ended photocurrent is applied to the Gm-C integrator. In this architecture, the unity-gain frequency of the common-mode feedback loop is close to 5 GHz.

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Fig. 10. Schematic of a single TAH; in this design, two TAHs were cascaded to approximate a sample-and-hold.

B. TAH Conventional GS/s TAHs with more than 10-bit linearity typically follow the architecture developed in [28] based on a switched emitter follower (SEF) with a feed-through attenuation buffer. However, this architecture relies on precisely controlled fabrication, gain, and delay mismatch to reduce the hold-mode feed-through. Hold-mode feed-through is a major issue for the TAH in the IAS since it experiences a sharp nonlinear reset waveform due to the switch at the output of the Gm-C integrator. Hold-mode feed-through is itself typically nonlinear even for a sinusoidal input [28]; in addition, the feed-through attenuation network in [28] contributes to pedestal error, and thus to nonlinear distortion [29]. Instead of using the conventional TAH architecture, a new TAH architecture proposed by [30] and [31] is fabricated in SiGe BiCMOS for the first time and is shown in Fig. 9. This architecture not only provides the ability to hard-switch the signal path to the hold capacitor from the input, but also to use feed-forward cross-coupled capacitors to significantly reduce the holdmode feed-through. Feed-forward capacitors alone limit feedthrough [32] as

(18) however, cancellation is imperfect for two reasons. Fabrication and time-delay mismatch limit the precision of cancellation, especially at higher frequencies. In addition, the bias point deviation between the devices comprising and the SEF, Q13/14 in Fig. 10, implies that perfect cancellation cannot be achieved

Fig. 11. Simulation results for the cascaded master/slave double-switched TAH input and output showing an aggregate linearity better than 11 ENOB for a swing [see (11)].

even for devices with no fabrication mismatch. Although imperfect, feed-forward cross-coupled capacitors are necessary to limit the pedestal error and also to limit ringing in the response as the base resistance of the SEF creates a second-order system due to the capacitance at the emitter of the SEF [33]. If improperly designed, this ringing can both degrade the settling behavior of the TAH, but also cause a peaking in the noise response, as of the switched emitter–follower (SEF) contributes a significant amount of noise [34] to the total rms output noise. Pedestal error is also reduced for this architecture because the voltage across the SEF during switching is kept to a differential transition instead of a common-mode transition [30].

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Fig. 12. Schematic of the timing circuits for the integration, reset, and two TAH amplifiers.

The schematic of a single TAH is given in Fig. 10. The main input differential amplifier is in the top center with the SEF on either side. The feedback buffer is shown beneath and contributes the preceding benefits, allowing high-linearity operation due to the pedestal compensation across the SEF. Tradeoffs occur between the voltage droop, voltage noise, and nonlinear distortion due to the modulation of the base-toemitter voltage of the SEF. The output voltage of the SEF is

(19) and the charging curwhere the thermal voltage rent [33]. Second- and third-order distortion are given by

(20) and (21) , as shown in Fig. 10, where the bias current for the SEF is and the input amplitude is . is reduced by using a fully differential architecture, but will still be present due to fabrication, phase, and amplitude mismatch. For a given input amplitude , third-order harmonic distortion can be reduced by either using a larger current or by using a smaller hold capacitor . The hold capacitor and the input base current of the next stage determines the droop, or the discharge current from the hold capacitor, as given by (22) Larger hold capacitors minimize droop from (22), but increase distortion from (15) and (16). Taken differentially, the differential droop will be given by fluctuations in the base current due to

the held voltage, and the mismatch between the emitter followers fed by the hold capacitor. As mismatch is typically higher than other parameters variations, care should be taken to minimize droop. In this architecture, to achieve a precision better than 10 bits, the target performance was 1 mV of differential droop. A hold capacitor of 1 pF was chosen in this design as a tradeoff between hold-mode droop, noise, and distortion. Simulation results for a single Monte Carlo run for the cascaded master–slave TAH are shown in Fig. 11. The simulated SFDR is better than 68 dBc, verifying linearity-only ENOB of better than 11 bits. The simulated ENOB including noise is above 9 bits. C. Timing Circuits To provide relative phase relationships across a broad range of input frequencies, a frequency divider shown in Fig. 12 is used to divide a 4-GHz sinewave into 2-GHz quadrature outputs to the subsequent clock buffers. The reset pulse is formed through a logical AND operation between the 4-GHz input frequency and differential quadrature output of the divider. The integration pulse is formed via the input signal and the in-phase output. The TAH clocks are derived from the in-phase output of the divider; the master, or first-stage TAH samples the integrated signal on the rising edge of the clock, and the slave, or second-stage TAH, samples the held output of the master on the rising edge of its clock. The integration period ps, the offset pulse duration ps, the reset period ps, and the TAH clocks have 50% duty cycles with periods ps. Simulation results indicate proper phase relationships between a clock rate of 1–8-GHz (500 MS/s–4 GS/s) operation. D. Discrete-Time Differential-Mode Feedback Loop for Offset Cancellation The offsets of the photocurrent, Gm-C integrator and cascaded TAH stages are canceled by this discrete-time differential-feedback loop. During the integration period, this feedback loop applies a current pulse at the input to the Gm-C integrator; however, it continuously integrates the offset sensed from the output of the second TAH in Fig. 7. In addition to canceling the

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Fig. 15. Simulated frequency-domain performance for a photonically sampled pulse train. From this simulation, the ENOB for the IAS receiver is approximately 8.1 bits. Fig. 13. Differential-mode feedback amplifier for canceling common-mode current offset of the photodetector.

Fig. 14. Simulated frequency-domain performance for an input frequency sinusoid of 937.5 MHz. The simulated ENOB is 8.35 bits.

dc offset of the photocurrent during this period, it also serves to instantaneously reduce the peak voltage at the input to the Gm-C integrator by creating a bipolar voltage instead of only a unipolar (positive) voltage excursion. The dc balance significantly reduces both second- and third-order distortion in the IAS. The differential-mode feedback amplifier in Fig. 13 is resistively degenerated both to linearize its response and to reduce its unity-gain frequency. A 250-pF MOS capacitor is placed at the output of the amplifier to further limit its bandwidth and noise contribution to the IAS receiver, especially important as the feedback is applied at the input where the signal swings are the lowest and most susceptible to corruption by noise. An extremely low UGB is also necessary for closed-loop stability, as the Gm-C integrator has a pole at low frequencies. E. Simulation Results Simulations are run for a worst case input frequency close to Nyquist for both sinusoidal and optically sampled pulse inputs. Fig. 14 demonstrates the IAS receiver performance with a 937.5-MHz sinusoidal input; the simulated ENOB is 8.35 bits. Fig. 15 displays the results for a 937.5-MHz sinusoid sampled in the photonic domain and impressed upon a optical pulse train. The simulated ENOB is approximately 8.1 bits and displays better linearity performance, but lower ENOB due to the additive noise of the dc-offset compensation loop. The simulated differential output swing is in both cases.

Fig. 16. Microphotograph and PCB layout of the two-channel IAS receiver.

V. MEASUREMENT RESULTS A two-channel IAS receiver is fabricated in a 120-nm SiGe BiCMOS process with a maximum for the npn HBT of 210 GHz. Each channel consumes 890 mA from 5- and 2.5-V supplies. The chip area is 1.6 2.0 mm and is shown in the inset of Fig. 16 along with the test PCB. The test PCB is a four-layer board from a Rogers 4003 substrate with a dielectric thickness of 8 mils for high-frequency transmission lines and to accommodate the dense interconnections. The die is directly mounted on a copper block to dissipate heat. Bond-wire length is minimized to reduce the inductance and possible settling time issues at the input and output. A. Electrical Measurements To validate the circuit packaging, -parameters measurements show the bandwidth for acceptable input and output return loss of the receiver, which is important for packaging with a matched photodetector. To give a worst case scenario for the input matching, single-ended measurements are shown

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Fig. 19. Measured oscilloscope waveform of the differential output of the IAS and TAH with a 605-MHz sinewave input (dotted gray). Fig. 17. Input return loss of the IAS packaged onto the PCB, both measured single ended for each differential input, and also simulated with a PCB package model with 0.5 nH of bond-wire inductance.

Fig. 20. Frequency-domain measurement for ENOB. An ENOB of 8.1 bits is measured with a 223-MHz input frequency.

Fig. 18. Output return loss of the IAS and TAH PCB, measured single ended for each differential output, and simulated with a PCB package model with 0.5 nH of bond-wire inductance.

in Fig. 17 to simulate the single-ended photodetector and includes the effects of the PCB, package parasitics, and extracted parasitics of the Gm-C integrator. PCB connectors were not included in the simulated results and likely account for some of the degradation in measured input return loss. Additionally, the bond-wire inductance to ground and nonideal decoupling on-chip accounts for additional degradation in the return loss. The return loss is better than 10 dB to 5.8 GHz and remains better than 8 dB to 8.8 GHz. The measured output return loss for the TAH is given in Fig. 18 and determines the ability of the circuit to provide fast settling at the input of the ADC. The return loss is better than 10 dB to 6.5 GHz. The TAH output waveforms of the IAS were also captured on a real-time DSA71604C Tektronix scope; the gray dotted line represents the sampled 605-MHz sinusoid. The output of the dual-rank TAH is a staircase waveform with held levels equal to the amplitude of the 605-MHz sinewave. Minimal ringing due to packaging inductance and emitter–follower peaking on-chip is observed during the hold period. The measured output waveform is shown close to its full-scale output of shown in Fig. 19. To assess the frequency-domain performance of the IAS, electrical testing is conducted with a sinusoidal input. The output of the IAS is connected to a single channel of the

Fig. 21. Frequency-domain measurement for SFDR for an input amplitude envelope equal to that measured for peak ENOB.

National Semiconductor ADC1800RF ADC over-clocked to 2 GS/s. Fig. 20 displays the measured frequency-domain results for an input sinusoid of approximately 223 MHz. The measured ENOB is above 8.1 bits and the measured SFDR is approximately 64.6 dBc. The two-tone intermodulation distortion is measured and shown in Fig. 21 for an input of approximately 203 MHz, showing third-order intermodulation (IM3) tones at 51.5 dBc, and an SFDR of 57.6 dBc relative to the amplitude measured at peak ENOB. The ENOB performance of the 2-GS/s IAS receiver is shown in Fig. 22. The peak ENOB is 8.1 bits with a 223-MHz input, shown in Fig. 20. The measured ENOB performance for the electronic ADC at 2 GS/s is also shown in Fig. 22 and gives a baseline for the maximum measurable performance. For both measurements, the input amplitude is adjusted to maximize the ENOB performance, and to compensate for the roll-off in the IAS.

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Fig. 22. ENOB versus frequency.

dummy photodetctor that was not illuminated, but is biased identically to the other photodetector to cancel out common mode, supply, and ambient noise. Modulator distortion from the MZM accounts dominates the distortion found in Fig. 24; the measured SNR is 46.6 dB, including contributions from optical noise, photodetector shot noise, the IAS receiver, and the electronic ADC. With the implementing of digital linearization, this indicates an obtainable ENOB close to 7.5 bits limited by noise for a 2-GS/s (scalable with interleaved channels to 20 GS/s) sampling rate. As a comparison, two interleaved 2-GS/s copy-and-sample-all photonically sampled channels without the IAS receiver were measured to have 6.8 ENOB with digital modulator linearization [9]. VI. CONCLUSION The analysis and design of a 2-GS/s IAS high-linearity optical pulse receiver has been presented for use in a rate-scalable photonic ADC with better than eight ENOB. The electronic IAS receiver is measured to have a measured ENOB better than 8.1 bits and an SFDR better than 64 dBc for a single tone. The two-tone IMD was measured at the same envelope amplitude as that used for peak ENOB and was approximately 57.6 dBc.

Fig. 23. SNR and SFDR measured at peak ENOB versus frequency.

ACKNOWLEDGMENT The authors wish to acknowledge B. Stossel, Lockheed Martin, Goodyear, AZ, B. Jacobs, Program Monitor for the Defense Advanced Research Projects Agency (DARPA) RADER, Arlington, VA, and Prof. S. Radic and Dr. A. Wiberg, both with the Photonic Systems Group, University of California at San Diego, La Jolla. REFERENCES

Fig. 24. Frequency-domain measurement for ENOB with photonic-sampling setup.

The measured SFDR and SNR are shown in Fig. 23 for the IAS and ADC and also with the ADC alone to give the measurement limitations. SFDR and SNR are measured at peak ENOB. Due to the response from (3), higher frequency inputs are attenuated in the IAS, requiring a higher input amplitude and resulting in more distortion (lower SFDR, and thus, lower SNR at peak ENOB). This electrical measurement results in an overestimate of the distortion for a Gaussian pulse input, as the pulse does not experience the distortion. B. Photonic-Sampling Test System To demonstrate the photonic sampled ADC performance, a pulse train was modulated with a standard MZM (not linearized), which was fed with an electrical sinusoid at approximately 200 MHz. The pulses were generated using the cavityless principle [9], i.e., no mode-locked cavity, with a repetition rate of 2 GHz and a pulsewidth of 2.7 ps. The modulated pulse train is connected to a single-ended photodetector and subsequently fed to the IAS. To keep a balanced impedance, the unused differential input of the IAS is connected to a

[1] B. Le et al., “Analog-to-digital converters,” IEEE Signal Process. Mag., vol. 22, no. 6, pp. 69–77, 2005. [2] B. Murmann, “A/D converter trends: Power dissipation, scaling and digitally assisted architectures,” in Proc. IEEE Custom Integr. Circuits Conf., 2008, pp. 105–112. [3] R. H. Walden, “Analog-to-digital converter survey and analysis,” J. Sel. Areas Commun., vol. 17, no. 4, pp. 539–550, 1999. [4] J. Mitola, “The software radio architecture,” IEEE Commun. Mag., vol. 33, no. 5, pp. 26–38, 1995. [5] C.-S. Bres et al., “Low distortion multicasting of an analog signal by self-seeded parametric mixer,” IEEE Photon. Technol. Lett., vol. 22, no. 5, pp. 332–334, 2010. [6] C.-S. Bres et al., “Multicast parametric synchronous sampling,” IEEE Photon. Technol. Lett., vol. 20, no. 14, pp. 1222–1224, 2008. [7] A. O. J. Wiberg et al., “Low distortion and high SNR analog signal multicasting using self-seeded parametric mixer,” in Proc. Lasers ElectroOpt. Conf., 2011, pp. 1–2. [8] A. O. J. Wiberg et al., “Polychromatic sampling for high-speed realtime processing,” in Proc. Opt. Fiber Commun., Collocated Nat. Fiber Opt. Eng. Conf., 2010, pp. 1–3. [9] A. O. J. Wiberg et al., “Demonstration of 40 GHz analog-to-digital conversion using copy-and-sample-all parametric processing,” in Proc. OFC, 2012, Art. ID OW3C.2. [10] P. W. Juodawlkis et al., “Optically sampled analog-to-digital converters,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 10, pp. 1840–1853, 2001. [11] T. K. Kim et al., “Sub-100-as timing jitter optical pulse trains from mode-locked er-fiber lasers,” Opt. Lett., vol. 36, no. 22, pp. 4443–4445, Nov. 2011. [12] J. Kim et al., “Photonic subsampling analog-to-digital conversion of microwave signals at 40-GHz with higher than 7-ENOB resolution,” Opt. Exp., vol. 16, pp. 16509–16515, 2008. modu[13] L. Luh et al., “A 10.24GSPS photonic sampled bandpass lator direct-sampling at 12 GHz,” in Proc. IEEE Custom Integr. Circuits Conf., 2005, pp. 387–390.

GATHMAN AND BUCKWALTER: 8-bit IAS RECEIVER

[14] S. Gupta et al., “Power scaling in photonic time-stretched analog-to-digital converters,” in Proc. IEEE Avion., Fiber-Opt., Phototon. Technol. Conf., 2009, pp. 5–6. [15] Y. Han and B. Jalali, “Photonic time-stretched analog-to-digital converter: Fundamental concepts and practical considerations,” J. Lightw. Technol., vol. 21, no. 12, p. 3085, Dec. 2003. [16] A. Khilo et al., “Photonic ADC: Overcoming the bottleneck of electronic jitter,” Opt. Exp., vol. 20, no. 4, pp. 4454–4469, Feb. 2012. [17] S. Radic, “Parametric Signal Processing,” IEEE J. Sel. Topics Quantum Electron., vol. 18, no. 2, pp. 670–680, 2012. [18] J. Kim et al., “Attosecond-resolution timing jitter characterization of free-running mode-locked lasers,” in Proc. Lasers Electro-Opt. Quantum Electron. Laser Sci. Conf., 2008, pp. 1–2. [19] A. Karim, “Microwave photonic link architectures,” in Proc. IEEE Avion., Fiber-Opt., Photon. Technol. Conf., 2011, pp. 51–52. [20] S. Gupta, G. Valley, and B. Jalali, “Distortion cancellation in timestretch analog-to-digital converter,” J. Lightw. Technol., vol. 25, no. 12, pp. 3716–3721, 2007. [21] S. Gupta and B. Jalali, “2nd order distortion cancellation in photonic time stretch analog-to-digital converter,” in IEEE MTT-S Int. Microw. Symp. Dig., 2007, pp. 229–232. [22] T. D. Gathman and J. F. Buckwalter, “An integrate-and-dump receiver for high dynamic range photonic analog-to-digital conversion,” in Proc. IEEE 12th Silicon Monolithic Integr. Circuits RF Syst. Top. Meeting, 2012, pp. 155–158. [23] P.-L. Liu et al., “Saturation characteristics of fast photodetectors,” IEEE Trans. Microw. Theory Techn., vol. 47, no. 7, pp. 1297–1303, 1999. [24] P. W. Juodawlkis, J. J. Hargreaves, and J. C. Twichell, “Impact of photodetector nonlinearities on photonic analog-to-digital converters,” in Lasers Electro-Opt. CLEO Tech. Dig. (Summaries of Papers), 2002, pp. 11–12. [25] T. D. Gathman and J. F. Buckwalter, “A 45-nm SOI CMOS integrateand-dump optical sampling receiver,” IEEE Transactions Circuits Syst. —Part I, Reg. Papers, to be published. [26] T. Chalvatzis et al., “A low-noise 40-GS/s continuous-time bandpass delta–sigma ADC centered at 2 GHz for direct sampling receivers,” IEEE J. Solid-State Circuits,, vol. 42, no. 5, pp. 1065–1075, 2007. [27] A. A. Abidi, “General relations between IP2, IP3, and offsets in differential circuits and the effects of feedback,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 5, pp. 1610–1612, 2003. [28] T. Baumheinrich, B. Pregardier, and U. Langmann, “A 1-Gsample/s 10-b full Nyquist silicon bipolar track & hold IC,” IEEE J. Solid-State Circuits, vol. 32, no. 12, pp. 1951–1960, 1997. [29] S. Yamanaka, K. Sano, and K. Murata, “A 20-GS/s track-and-hold amplifier in InP HBT technology,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 9, pp. 2334–2339, 2010. [30] H. Dinc and P. E. Allen, “A 1.2 GSample/s double-switching CMOS THA with 62 dB THD,” IEEE J. Solid-State Circuits, vol. 44, no. 3, pp. 848–861, 2009. [31] D. J. Robinson and G. S. Lame, “1 GSps 11-bit track-and-hold in SiGe BiCMOS,” in Proc. IEEE Microelectron. Electron Devices Workshop, 2005, pp. 67–70.

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[32] S. Shahramian, A. C. Carusone, and S. P. Voinigescu, “Design methodology for a 40-GSamples/s track and hold amplifier in 0.18- m SiGe BiCMOS technology,” IEEE J. Solid-State Circuits, vol. 41, no. 10, pp. 2233–2240, 2006. [33] P. Vorenkamp and J. P. M. Verdaasdonk, “Fully bipolar, 120Msample/s 10-b track-and-bold circuit,” IEEE J. Solid-State Circuits, vol. 27, no. 7, pp. 988–992, 1992. [34] E. R. H. Liang and E. Skafidas, “Noise analysis of ultra high speed SiGe BiCMOS track and hold amplifier for fiber optic equalizer,” in Proc. Int. Eng. Comput. Scientists MultiConf., Mar. 17–19, 2010, vol. II.

Timothy D. Gathman (S’09–M’12) received the B.S. degree in electrical engineering and B.M. degree in violin performance from the University of Colorado at Boulder, in 2007, and the M.S. and Ph.D. degrees in electrical and computer engineering from the University of California at San Diego (UCSD), La Jolla, in 2009 and 2012, respectively. He held an internship with SPAWAR SSC, San Diego, CA, where he was involved with modeling RF systems. He is currently with Qualcomm Technologies Inc., San Diego, CA. His research interests include broadband analog, RF, and mixed-signal IC design and analysis. Dr. Gathman was the recipient of the 2012 Silicon-RF Conference Best Student Paper Award. He was a Student Paper finalist of the 2010 IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS).

James F. Buckwalter (S’01–M’06) received the B.S. degree in electrical engineering from the California Institute of Technology, Pasadena, in 1999, the M.S. degree in electrical engineering from the University of California at Santa Barbara, in 2001, and the Ph.D. degree in electrical engineering from the California Institute of Technology, Pasadena, in 2006. From 1999 to 2000, he was a Research Scientist with Telcordia Technologies. During Summer 2004, he was with the IBM T. J. Watson Research Center, Yorktown Heights, NY. In 2006, he joined Luxtera, Carlsbad, CA, where he developed high-speed circuits for optical interconnects. In July 2006, he joined the faculty of the University of California at San Diego, La Jolla, where he is currently an Assistant Professor of electrical engineering. Dr. Buckwalter was the recipient of a 2004 IBM Ph.D. Fellowship, a 2007 Defense Advanced Research Projects Agency (DARPA) Young Faculty Award, and the 2011 National Science Foundation (NSF) CAREER Award.

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Analog Signal Processing for Pulse Compression Radar in 90-nm CMOS Mehmet Parlak, Student Member, IEEE, Michiaki Matsuo, Member, IEEE, and James F. Buckwalter, Member, IEEE

Abstract—This paper presents a pulse-compression radar baseband analog signal processing integrated in a silicon process for low cost and power dissipation. The analog signal-processing circuitry exhibits the autocorrelation properties of the polyphase codes, maximizes the sensitivity and resolution of a pulse radar system, and alleviates speed and resolution requirements of the analog-to-digital converter (ADC) via an analog correlator. The circuitry includes a two-stage variable gain amplifier (VGA) for high dynamic range, a correlator/integrator circuit, a comparator, and offset calibration circuits. The differential 6-bit VGA is designed to adaptively track the Friis path loss through rapid change of the VGA gain and offset calibration, relaxing the dynamic range requirements of the correlator. The measured performance shows a VGA gain variation of 52 dB and a VGA group-delay imbalance of 50 ps over 64 states. The high-speed pulse compression/correlation is performed in analog current domain and the speed requirement on the ADC is reduced by a factor equal to the duty cycle lowering the ADC power consumption. The chip is fabricated in a 90-nm process, wire bonded on the FR4 printed circuit board, and tested with a Stratix IV field-programmable gate-array board to evaluate the system performance for different radar polyphase codes. Index Terms—Analog signal processing, baseband, beamforming, CMOS, comparator, correlator, high resolution, human sensing, millimeter wave, phased array, pulse compression, pulse compressor, radar, radar-on-chip, sensor, silicon integrated circuit (IC), variable gain amplifier (VGA).

I. INTRODUCTION

R

ECENT advances in silicon technology, millimeter-wave integrated circuit (IC)/antenna/package design, and beamforming techniques have enabled lower power consumption, smaller form factor, and lower cost for the consumer electronics products. While silicon integrated beamforming architectures and phased arrays at millimeter-wave frequencies have been demonstrated for the automotive radar system, high-definition content streaming and satellite systems [1]–[3] other commercial applications will include sensing, imaging, and indoor/outdoor surveillance. A millimeter-wave Manuscript received March 20, 2012; revised September 13, 2012; accepted September 24, 2012. Date of publication November 15, 2012; date of current version December 13, 2012. This paper is an expanded paper from the 12th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Santa Clara, CA, January 15, 2012. M. Parlak and J. F. Buckwalter are with the Department of Electrical and Computer Engineering, University of California at San Diego (UCSD), La Jolla, CA 92093 USA (e-mail: [email protected]; [email protected]). M. Matsuo is with the Panasonic Corporation, Yokohama 153-8687, Japan. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2222433

indoor/outdoor surveillance application requires low interference and good angle resolution at low cost. Therefore, radar beamformer sensors can be embedded at several locations to sense, image, and learn the local surroundings in an intelligent environment that is adaptive and responsive to the objects and human beings that occupy it, which is defined as “cognitive radar” by Haykin [4]. The wide spectrum around the millimeter-wave bands, - and -band, offer sufficient bandwidth to allow centimeter-range resolution for the indoor/outdoor surveillance systems. A bandwidth of 0.5 GHz provides a range resolution of 30 cm (1). To detect objects in an indoor/outdoor environment, the video camera imaging (optical) sensors, infrared (IR), and ultrasound radar-based systems have been investigated previously [5], but each has some drawbacks. IR detection has a limited detection range and becomes insensitive in environments with changes in light intensity. Ultrasound sensor power consumption and cost is prohibitive for wide deployment. A traffic surveillance sensor, i.e., a collision avoidance or pedestrian detection system, based on an optical or IR camera is not reliable at nighttime, in rain, snow, or dense fog. The video cameras can operate reliably only at low speeds of the vehicle. Radar technology will not be subject to such weather conditions, but widespread deployment of the surveillance radar sensors is currently costly and demands a low-cost solution. Silicon IC processes promise to make radar chipsets available at low cost. Recent research has investigated ultra-wideband (UWB) radar for short-range vehicular applications, Doppler radar, and vital sign detection [6]–[13]. Architectures of the UWB systems are not compatible with a communication transceiver and the maximum range of UWB systems are limited. This paper investigates a pulse-compression radar approach for a pedestrian detection sensor compatible with a communication transceiver. Vehicle and pedestrian traffic is monitored and traffic data is sent to the nearby vehicles or traffic centers. Radar traffic sensors have tremendous potential for reliable human detection systems, which can localize an object through the information provided by direction and time of the radar signal arrival. Direction and time of arrival is determined through beamforming and analog signal processing, respectively. The radar sensor will require a dedicated baseband signalprocessing circuit to generate and detect the radar signal. A digital baseband approach for pulse-compression radar (PCR) is limited by the power dissipation of a high-resolution highspeed analog-to-digital converter (ADC). The prohibitive performance demands of such an ADC suggests that analog signal processing should be used for lower power consumption. The characteristics of the received radar waveform are exploited

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Fig. 1. (a) Specifications of the pedestrian detection sensor. (b) Block diagram of the overall system, sensitivity, and SNR requirements. (c) Link budget for the radar system with beamforming and pulse compression. (d) Correlation of the input code with the template, and degradation from the peak signal.

through analog pre-processing elements to alleviate speed and power requirements on the ADC and to benefit the low-cost and low-power platform based on a silicon CMOS process. The specifications, maximum and minimum range limitation, and resolution limits of the beamforming pulse-compression radar system in silicon are described in Section II. The proposed overall system architecture and analog processing subsystem implemented in a 90-nm silicon CMOS process and its building blocks are presented in Section III. The measurement results of the baseband signal processor and building blocks of the prototype are presented in Section IV. II. SPECIFICATIONS, MAXIMUM, AND MINIMUM RANGE LIMITATION AND RANGE RESOLUTION OF PCR IN SILICON Fig. 1(a) outlines the maximum and minimum detection range specifications and also range and angle resolution specifications of a PCR system. The range and angular resolution is the ability to distinguish between two neighboring objects on the same bearing or at the same range, respectively. For pedestrian detection, the specification for minimum and maximum detection range is 1 and 48 m, respectively, while the range and angular resolution specifications (i.e., spacing between two pedestrians) are 40 cm and 1 m (1.2 at m), respectively. The achievable range resolution, , of a conventional pulse radar system is determined by the width, , of the transmitted pulse, the types and sizes of targets, and transceiver specifications. In the first order, the range resolution in the propagation direction is approximately (1) where is the radar pulse bandwidth and is the pulsewidth [14]. To improve the range resolution, the bandwidth of the radar signal should be increased (1). To improve the angle resolution, the overall antenna array size, , of the radar system should be increased to boost the antenna directivity and decrease

the half-power beamwidth. However, due to the bandwidth limitations of phased arrays [15], which is shown as (2) the range resolution degrades with the increasing antenna array size and is presented as [substituting (2) in the range resolution (1)] (3) where is the center frequency, is the signal wavelength, is the beam-steering angle, is the total number of elements, and is the inter-element spacing of the antenna array. Neglecting the element factor of the antenna, the angular resolution of the beamformer is determined by the 3-dB half-power beamwidth and is equal to (4) The angular resolution as a distance between two targets is , where is determined by the maximum detection range, . Therefore, range and angular resolution are dependent, (5) Fig. 2 illustrates the maximum beam-steering angle satisfying the range and angle resolution specifications (3–5) with maximum detection distance and radar operating frequency. From (5), when m and GHz, and the maximum beam-steering angle that satisfies both range and angle resolution specifications is . The number of the beamforming elements is determined from the desired resolution specifications for of 78.8 . From (4), the number of elements providing of 1.2 is 252. A 256-element array is proposed to provide a worst case angle resolution

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Fig. 2. Maximum beam-steering angle with maximum detection distance and radar operating frequency.

of 1.16 and range resolution of 33.94 cm for a maximum steerable beamwidth of . Fig. 1(b) illustrates the block diagram of the overall sensor system, which includes the 256 channel transmit/receive beamforming front-end unit, and the analog signal-processing unit composed of the variable gain amplifier (VGA), pulse compressor (correlator and integrator), ADC, noncoherent pulse integrator, and a threshold device. While meeting the specifications, the system requires the desired signal-to-noise ratio (SNR) at the input of the noncoherent integrator to be 0 dB for reliable noncoherent pulse integration [14], as shown in Fig. 1(b). Therefore, the minimum allowable before the noncoherent integration is set to 0 dB at the maximum detection range of 48 m, (6) is the transmitted power, and are the where transmitter and receiver antenna gain, and are the transmit and receive array factors, is the carrier wavelength, is the radar cross section (RCS) of the object, is the range to the object, is the receiver noise figure, is the pulse bandwidth, is , is the signal processing and atmospheric losses, and is the pulse-compression gain. Of these parameters, the range (object distance) and object size (RCS) depend on the object we wish to detect and determine the total dynamic-range requirement. As the range changes from (1 m) to (48 m), the received power varies frpm 112.5 to 45.2 dBm for a dynamic range of 67.3 dB. The RCS of the largest and smallest objects might vary from (0.01 m ) to (1 m ), resulting in an additional dynamic range of 20 dB. Designing circuits for this large dynamic range (i.e., 87.3 dB) is challenging and dominates the choice of circuit architecture for the radar system. Other challenges are increased transmitted power, increased antenna gain, decreased noise figure, decreased radar system losses, and decreased atmospheric losses for a maximum detection range of 48 m. To alleviate the constraints on the transmitted power and beamwidth, beamforming and pulse compression together is an excellent solution to improve the sensitivity, while also allowing for the directional beam to be steered. As shown in Fig. 1(b), the worst case SNR at the input of beamforming is 25.53 dB for

a signal bandwidth of 0.5 GHz and the sensitivity of the system is improved from 80 to 112.53 dBm with 24.08-dB beamforming and 8.45-dB pulse-compression boost. Fig. 1(c) illustrates the numerator and denominator of (6), the link budget of the radar system including 256-channel beamforming, pulse compression, and noncoherent integration. A 256-element phased-array transmitter relaxes the requirements on the effective isotropic radar power (EIRP) and provides 48.16-dB improvement in EIRP (due to spatial power combining) and a 256-element phased-array receiver improves the sensitivity of 26.84 dB. The requirements on the EIRP and SNR are further relaxed by pulse compression. As shown in Fig. 1, when 7-bit pulse compression is used, the effective transmitted power is 8.45 dB lower. As shown in Fig. 1(b), at the input of the signal-processing unit, the VGA is designed to compensate the 67.26-dB dynamic range due to the Friis path loss between m and m, while a pulse-compression circuit would handle the 20-dB dynamic range due to the RCS of the object. The 0 dB of SNR at the input of the noncoherent integrator can be boosted to 15 dB by integrating approximately 50 returns from the desired object to achieve a detection probability of 0.90 and false alarm probability when a single pulse dB [16]. III. PCR, TRADEOFFS IN FRONT-END AND BASEBAND PCR ARCHITECTURES, AND PROPOSED ARCHITECTURE The range resolution is further improved by transmitting a shorter duration pulse in (1). However, the narrow pulsewidth requires wider receiver bandwidth that also de-sensitizes the receiver through increased noise. To transmit the same energy, higher peak power is also required. Silicon-based millimeterwave PAs often have limited peak power, which imposes limitations on the range resolution. The effective transmitted power is multiplied with the pulse compression ratio , as indicated in (6). From (6), the PCR achieves much greater range due to the increase in the effective transmitted power. Unfortunately, the increased effective transmitted power is accounted for by a related increase in in the denominator, which increases with pulse-compression ratio because the bandwidth of the receiver must be wide enough to handle at least the bandwidth, , of the modulation within the pulse. The main benefit of PCR is the maximum range performance of an equivalent narrow-pulse pulse radar with a much lower peak power level. In Fig. 1(d), the PCR code is a 7-bit Barker code and is divided into sub-pulses each having a width of . The echo of the PCR signal is received as a weak RF signal and down-converted to baseband. A baseband signal processing circuit correlates the noisy received baseband echo (in red in online version) with the delayed versions of the transmitted PCR code (template in blue in online version). This implements an analog matched filter to estimate the time of flight (TOF) of the radar signal. The resultant compressed pulse has a width of and the range resolution improves by . Deterministic timing mismatch at the correlator results in a linear decrease in the peak correlator output. When received baseband echo and template are not aligned (less than ), the degradation from the peak is given by in Fig. 1(d), where is the number of sub-pulses or pulse-compression factor, and is

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Fig. 3. (a) Design choices between radar front-end architectures and modulation schemes. (b) Design choices between baseband signal preprocessing. (c) Block diagram of the proposed bidirectional pulse radar front end with the implemented analog signal processing architecture. (a) Front-end architectures. (b) Baseband signal processing architectures. (c) Proposed system.

the number of resolved phases within one sub-pulse, where is the phase resolution. A simple system-level architecture and better isolation between transmitter and receiver are main considerations when selecting the front-end of the radar system. Fig. 3(a) depicts the front-ends of radar systems, frequency-modulated continuouswave (FMCW) radar and pulse radar. Without adequate isolation between the FMCW transmitter and receiver, the transmit energy leaks into the receiver and limits FMCW for long-range detection because the transmit power level must be constrained by the receiver sensitivity. Therefore, it is necessary for FMCW radars to employ two well-isolated antennas, one for transmitting and one for receiving, to allow continuous RF transmission. To use a single antenna for FMCW, a circulator must be introduced to the millimeter-wave front-end. This circulator is a costly discrete element and is not easily integrated. However, space limitations in phased arrays generally suggest a single antenna for both transmit and receive. In pulse radars, the timegated transmit and receive times imply that it is possible for the transmit and receive circuitry to share the same antenna array through transmit/receive switches rather than expensive circulators. Fig. 3(a) illustrates the front-end of the new radar architecture that enables to transmit a radar code with different phases and tune the radar code while time gating the front-end circuits. A single alone amplifier can be time gated by the polyphase radar code to enable the power amplifier (PA) that transmits a burst of RF energy or low-noise amplifier (LNA) to await the echo. In Fig. 3(b), three baseband signal-processing architecture options are shown. Shown in Fig. 3(b), (1), the digital baseband processing performs signal correlation in the digital

domain. This provides the most reconfigurable system, but demands high-speed high-resolution ADCs [17]. The ADC sampling rate must be at least twice the signal bandwidth. In Fig. 3(b), (2) and (3), pulse compression and high-speed correlation is performed in analog domain and the speed requirement on the ADC is reduced by a factor equal to the duty cycle. Overall power consumption is estimated to be over two orders of magnitude lower than the all-digital approach [18]. While the overall scan time is longer in Fig. 3(b), (2), the power consumption is the lowest. Shown in Fig. 3(b), (3), analog pulse compression is performed in parallel using multiple correlators for different delay values to search for objects at different range bins. The block diagram of the proposed PCR architecture is depicted in Fig. 3. At the front-end and back-end, the architectures illustrated in Fig. 3(a) and (b), (1) are proposed, respectively. The front-end circuitry includes a bidirectional RF-phase shifting beamformer—a bidirectional RF amplifier that operates as either an LNA or PA [19] and a bidirectional circuitry that operates as either an analog phase shifter or VGA [20]—and a passive mixer, which is inherently bidirectional [21]. The radar code time gates the LNA and PA, which makes this structure appropriate for the PCR system. Following the RF beamformer and mixer, the analog signal-processing architecture in Fig. 3(b) ,(2) is implemented. The baseband circuitry includes a two-stage VGA for high dynamic range, a correlator/integrator circuit, a comparator, and offset calibration circuits. The switches before the VGA are on and off depending on the receive and transmit operations. To gather data over a maximum detection of a 48-m range, it requires m m range bins for the single cor-

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Fig. 4. Circuit schematic of the VGA.

relator analog-baseband approach. For every transmitted code, different delays are assigned for the template signals of the correlator. For every signal transmission, one range bin is explored and template is swept once. The angle resolution is specified as a beamwidth of 1.16 , as explained in Section II. Assuming the beamformer of the pedestrian sensor system scans for 140 , it requires beam rotations. The detection time can be represented as (7) Assuming a 2-Gb/s 7-bit Barker code with a pulse repetition period of 333 ns is sent via the radar system, the time to scan the maximum detection range and determine the distance of the object—worst case scan time—is ns ms (7). In case multiple parallel correlators are used, the total time to scan corresponds is 120 times less and the power required is 120 times more than the single correlator approach. The time on target is given by , where is the 3-dB beamwidth and is the antenna scan rate in degrees per second. For a 2-Gb/s 7-bit Barker code, time on target is 1.998 ms, therefore the antenna scan rate in degrees per second is ms s. A. VGA VGAs have been demonstrated with discrete gain steps and digital control [22]–[24] or continuous gain control [25]. Discrete gain steps are made through bias current changes through the RF transconductor and the changes in the load impedance. However, this cause a group-delay variation over the bandwidth, which distorts the received signal. The current splitting approach provides a constant load and a constant bias current of the input transistor offering low VGA group-delay imbalance. This approach tends to suffer from higher noise figure, but offers high gain control range and low group-delay imbalance compared to the other techniques. VGAs have been demonstrated with discrete gain steps and digital control [22]–[24] or continuous gain control [25].

Discrete gain steps can be made through changes in the bias current through the RF transconductor and the changes in the load impedance. However, this cause a group-delay variation over the bandwidth, which distorts the received signal. The current splitting approach provides a constant load and a constant bias current of the input transistor offering low VGA group-delay imbalance. This approach tends to suffer from higher noise figure, but offers high gain control range and low group-delay imbalance compared to the other techniques. Therefore, this design was chosen for implementation. Fig. 4 illustrates the schematic of the current splitting VGA topology shown in [26]. The bias current of the input transistor is split into two differential amplifiers. Gain variation is achieved by completely steering the bias current of the input transistors to two transistors, and . The transistors are on and off depending on the digital control voltage. When the control voltage is high, the bias current is steered through and the input signal at the gate of is amplified to the output. When is low, the bias current is steered toward without amplifying the signal to the output. The sizes of the input transistor, as well as the current steering transistors, are binarily scaled so that the transconductance of each stage is (8) where is the transconductance of , is proportional to m nm, is the bias current through the input transistor, and , and is the overdrive voltage, which is same for each input transistor. The minimum gain of the one-stage VGA is defined by the cascode transistor, , which is times smaller than . The VGA voltage gain and gain variation per stage can be written as (9) (10)

respectively, where is the transconductance of is the binary word for the control voltage

, and .

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Fig. 5. Simulated: (a) differential-mode gain and (b) common-mode gain and (c) common-mode rejection of the VGA for 64 states. (d) Theoretical and simulated Friis loss tracking. (e) Simulated input referred noise and (f) dynamic range.

As mentioned in (6), the path loss increases quadratically with the range and the VGA gain is introduced such that the output power of the VGA is constant as the signal makes a round-trip. As the receiver waits for an echo of the transmitted pulse, the VGA gain compensates the path loss and reduces the dynamic range of the echo after the VGA. To adaptively track the Friis loss, two linear-in-magnitude VGA circuits are cascaded with each having 6-bit digital control. Six bits are chosen to provide the calculated 67.2-dB gain variation (33.6-dB per stage) from (10). Fig. 5(a) illustrates the SPECTRE simulated gain states of the VGA. The maximum and minimum gain states provide from 19.1- to dB gain at 1 GHz, respectively, and the VGA has a simulated dynamic range of 67.2 dB. The VGA requires a minimum signal bandwidth of 0.4 GHz, set by the range resolution specification cm , which corresponds to the pulsewidth of less than 2.67 ns and a bandwidth greater than 0.375 GHz. The simulated VGA exhibits a 3-dB bandwidth of 1.25 GHz to support a range resolution of 12 cm, as shown in Fig. 5(a). The common-mode to differential-mode simulated gain is also illustrated in Fig. 5(b). For maximum gain state, the common mode rejection is better than 35 dB and is 60 dB larger than , as illustrated in Fig. 5(c). The theoretical and simulated VGA gain is compared to the Friis loss. As shown in Fig. 5(d), while the signal penetrates from 1 to 48 m, the VGA tracks the 67.2-dB Friis path loss within the minimum and maximum detection range (1 and 48 m) and the simulation follows the theoretical Friis loss curve: 10 . The bias current variation for the current splitting stage causes the impedance at the common source node of the differential pair (labeled node X) to change, but this does not have a significant effect on the insertion phase. The output drain

capacitance changes slightly due to the bias voltage variation at the gate–drain junction. At the largest transistors, the capacitance increases and introduces some phase shift. The simulated time delay of the VGA over various gain states is illustrated in Fig. 5(d). The time-delay imbalance is only 60 ps between the 64 VGA states. The spur-free dynamic range of the VGA is the ratio of the input-referred P1dB compression point to the input-referred noise level. The input referred noise density and integrated noise of the VGA are simulated for the same states, as shown in Fig. 5(e) and (f). The input referred spot noise is 12.6 V Hz and 5.65 nV/ Hz at 1 MHz and input referred integrated noise power is 25 and 64 dBm for minimum and maximum gain states for a noise bandwidth of 1 GHz, respectively. The large-signal circuit response is illustrated in Fig. 5(f). Compression occurs at input power of 10, 9, 7.5, 4.45, 19, and 21.6 dBm for six various gain states , respectively. The spur-free dynamic range is 40–50 dB over 64 gain states. B. Offset Calibration Circuits To compensate the input/output offsets associated with the VGA, a 4-bit offset compensation circuit is introduced. As shown in Fig. 6(a), the offset calibration circuit is a current splitting topology, similar to the VGA design. is controlled through an external bias to decide on the peak value of the offset compensation. The larger devices exhibit smaller mismatches, therefore transistors and have a length of 0.30 m to minimize the mismatch. The offset at the output of the VGA changes for each of the gain states. The offsets for the minimum, medium, and maximum gain states is illustrated in Fig. 7(a). Via Monte Carlo simulations, the standard deviation of the offsets at the VGA

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Fig. 6 (a) Circuit schematic of the offset calibration circuit. (b) Circuit schematic of the correlator and integrator. (c) Circuit schematic of the comparator. (d) Circuit schematic of the interface circuit between correlator and comparator.

output is found as 2.37 and 23.5 mV for minimum and maximum gain states, respectively. To track the Friis loss adaptively, VGA changes gain for every 2.5 ns assuming a maximum distance of 48 m. It is challenging to compensate the offset with a closed-loop architecture settling in every 2.5 ns. The 4-bit offset compensation (16 states) determines the resolution of the calibration, as shown in Fig. 7(c). As shown in Fig. 7(a) and (b),

the offsets of the calibration circuit are negligible compared to the VGA output offsets. The standard deviation is 10–15 V for minimum and maximum calibration states, respectively. The 4-bit input is provided to the circuit through the lookup table generated through manual calibration. In the manual calibration mode, the circuit output is measured without offset compensation and monitoring the correlator output, the offsets of

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Fig. 7 (a) Monte Carlo simulations of the offsets at the output of VGA and (b) at the output of the calibration circuit for various gate states. (c) Simulation of the offset correction control with the calibration bias current and (d) and (e) offset correction at teh correlator and VGA output.

the VGA are recorded into a lookup table via the ADCs in the FPGA. The required values of the 4-bit sequence is then provided to the input of the on-chip offset calibration circuit via the FPGA correcting VGA and correlator output offset, as shown in Fig. 7(d) and (e). C. Correlator Fig. 6(b) illustrates the schematic of the correlator and integrator circuits. The Friis loss is adaptively compensated by the VGA gain preceding the correlator, therefore the signal swing at the input of the correlator is assumed to be constant, 10 mV. The pre-amplification stage—the first stage in the correlator—provides 12-dB gain to boost the signal before the core correlation stage. While and provide the amplification, and operate as pMOS loads. The common mode feedback is provided via the resistors and of 1.5 k while lowering the gain is avoided. The satisfy the specification of minimum bandwidth of 0.4 GHz, the input transistor sizes are selected considerably small, 20–25 m until the core correlation stage. As shown in Fig. 6(b), following the pre-amplification stage, the correlation is performed through a folded cascode current commuting mixer with cascode PMOS loads, . PMOS folded cascode provides a low input flicker noise and better slew rate. Transistors act as current sources, providing a pivot point for folding over the differential-pair output currents. Transistors act as cascode transistors, pinning the drains of transistors . The core correlator output is integrated on a capacitor-bank of 1–12 pF to reduce/increase the correlator output charging time and signal level, depending on the speed of the radar code. Following the core correlation, post-amplification is performed to bring the peak signal to two times the threshold level and the integrated voltage is compared with the threshold

level in the comparator for the signal detection of the incoming signal and calculation of the TOF. The integrated voltage is normally sampled by an ADC after each pulse and the shunt switches resets the correlator at the end of the template pulse transmission for the preparation for the next pulse. The accumulation of multiple signals to achieve higher SNR than 0 dB is performed in the digital domain. A switch, , is also added at the post-amplifier to increase/decrease the signal level due to the RCS changes of various objects. All PMOS transistors have source tied to substrate to avoid increased threshold due to body effect. As illustrated in Fig. 8, different lengths of Barker codes are given as inputs and templates to the chip to investigate the correlator output. When the template signal is aligned with the input, and longer Barker codes are provided, the signal level at the output of the correlator increases, as illustrated in Fig. 8(a). The correlator output is sampled when the template signal returns to zero, and autocorrelation (zero cut in delay when Doppler frequency is zero) of various codes is illustrated in Fig. 8(b). It shows that the simulated results of the circuit exhibit the autocorrelation properties of the Barker codes. The switch increases/decreases the signal level at the output of the correlator depending on the RCS of various objects. Fig. 9(a) illustrates the correlation output when the switch gate control is high and low. The capacitor-bank of 1–12 pF also increases/decreases the correlator output signal level depending on the speed of the radar code. Fig. 9(b) illustrates the correlation output with different combinations of the correlator bank capacitors. D. Comparator The design specifications for the comparator are 30-mV offset voltage and 0.4-GHz sampling speed. The comparator

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Fig. 10. (a) Simulation of the correlation of the input signal with the templates shifted in time. (b) Illustration of the comparator signals and radar signal detection.

Fig. 8. (a) Simulation of the correlation of the incoming signal with aligned/ nonaligned templates. (b) Autocorrelation for various Barker codes.

Fig. 9. (a) Correlation output with the switch control. (b) Correlation output with both varying correlator bank capacitors and switch control.

is designed to provide a 1-bit sample of the correlated output. Fig. 6(c) illustrates the schematic of the comparator. The comparator consists of two differential input pairs , a regenerative flip-flop (CMOS latch circuit), and a set–reset (S-R) latch. The CMOS latch is composed of an n-channel flip-flop with a pair of n-channel transfer gates for strobing, an n-channel switch for resetting, and a p-channel flip-flop (M13, M14) with a pair of p-channel precharge transistors . Set (latch) and reset (latch bar) are the two nonoverlapping clocks. During the reset period, the current flows through the closed resetting switch , which forces the previous two logic state voltages to be equalized. As the input stage settles, a voltage difference is established between nodes A and B and acts as an initial imbalance for the following regeneration time interval. In the meantime, as the n-FET flip-flop is reset, the p-FET flip-flop is also reset by the two closed precharge transistors, which charge nodes C and D to the supply voltage. As a result, the CMOS latch is set to the astable high-gain mode. The regeneration is initialized by the opening of switch M12. Since

the strobing transistors, , isolate the n-FET flip-flop from the p-FET flip-flop, the use of two nonoverlapping clocks perform the regeneration, which is within the short time slot between reset going low and going high when set is low. The second-generation step starts when set goes high and are closed. The n-FET flip-flop together with the p-FET flip-flop regenerates the voltage differences between nodes a and b and between nodes c and d. The voltage difference between node c and node d is soon amplified to a voltage swing nearly equal to the power supply voltage. The following S-R latch is driven to full complementary digital output levels at the end of the regenerative mode and remains in the previous state in the reset mode. Tradeoffs exist for the sizing of switches, . Sizes of have to be kept small enough to prevent the glitches from feeding to the comparator output. Making them large helps in pulling down the active branch quickly. The sizes are selected as 60/0.10 m. The size of the reset switch, , can be kept small, reducing the parasitic capacitance on the regeneration nodes and increasing the gain during the sensing phase because the current difference flowing through it causes a larger voltage imbalance of the sensing nodes. Placing a capacitor in the signal path is not possible since the radar baseband pulses might contain a large dc component. Therefore, a linear interface circuit between the correlator and comparator is placed to shift the voltage level while not distorting the correlator output. The schematic of the circuit is shown in Fig. 6(d). The large resistors, and of 15 k , are selected to increase the linearity while approaching the gain of the buffer to unity. The lengths of the transistors, , are selected as 0.50 m to increase the small-signal output resistance of the current source transistors. The comparator is exhibiting a simulated maximum offset voltage less than 18 mV and simulated sensitivity of 1.5 mV up to a sampling rate of 1.2 GHz within process corner variations. At the expense of comparison speed, the offset voltage can be reduced by increasing the dimensions of the transistors, , which are 80/0.20 m.

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Fig. 11. Die photomicrograph and COB implementation of the prototype.

Fig. 12. (a) Measured differential-to-differential gain, (b) common-to-differential gain, and (c) return loss. (d) Simulated and measured VGA Friis loss tracking. (e) Measured group delay for 64 gain states. (f) Measured linearity characteristics of the VGA for each of the 64 gain states.

TABLE I VGA COMPARISON

E. System Simulation Fig. 10 illustrates the system simulation. As shown in Fig. 10, a 7-bit Barker code with a pulsewidth of 0.5 ns is applied at the input of the baseband system and the sensitivity of the correlator to the timing alignment between the received signal and the template is simulated. The TOF is prearranged as 5.7 ns. The template signal is swept between 1.75–8.75 ns to observe the TOF. The correlated/integrated signal (in green in online version) is compared with the threshold signal, (dark

Fig. 13. (a) Input and template polyphase code parameters. (b) FPGA used for three-level waveform creation.

purple line in online version), which is externally provided to the chip. When the template signal with the right delay is aligned with the input, and the latched comparator employs strong positive feedback for a “regeneration phase” when the clock is high, and have a “reset phase” when the clock is low.

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Fig. 14. Measured VGA output/correlator input, template signals swept in time, and measured correlator output for aligned/nonaligned cases.

In other words, when the maximum correlation voltage is observed, it is observed that the received echo signal is aligned with the template code, a state change is observed at the output of the comparator, and the TOF is found by observing the detect signal (magenta line in online version). A target is detected when the signal envelope exceeds the threshold value and false alarm occurs when a sample of the signal exceeds the threshold voltage when noise alone is present in the radar. The false alarm rate depends on the level of all interferences like noise, clutter, or jamming. The decision hypotheses are Detection False alarm

(11)

is the radar echo signal and is the threshold where voltage. As the design specification, the output referred noise of the correlator summed up with the offset and kickback noise of the comparator is not allowed to pass over half of the threshold level to minimize the probability of a false alarm. During the system simulations, the threshold level is selected as the half of the peak correlation output, as shown in Fig. 10. IV. MEASUREMENT Fig. 11 shows the chip-on-board (COB) implementation of the prototype and the die photomicrograph of the 90-nm CMOS circuitry. The chip has an area of only 0.51 mm excluding the pads. The proposed baseband circuits are fabricated in the TSMC 90-nm CMOS mixed-signal/RF low-power process. Nine metal layers are available with the 3.2- m-thick aluminum top metal layer (M9). The silicon chip is epoxied to a grounded island and wire bonded to a single-layer FR4 printed circuit board. Bondwire coupling is minimized using several ground connections between the RF inputs. The supply is bypassed off-chip with

100-nF capacitors to provide a low impedance. ADS Momentum is used to simulate the transmission lines on the laminate board, which has a substrate thickness of 1.57 mm. The dielectric constant of the substrate is 4.3 and the effective dielectric constant is 3.26. The 50-microstrip line has a width of 3 mm dB cm . The VGA and monitoring buffers consume 14 and 16 mA from a 1.2-V supply. The correlator and monitoring buffers consume 4.1 and 13 mA from a 1.2-V supply, respectively. A. VGA The VGA consumes 14 mA from a 1.2-V supply (monitoring buffers consume 16 mA) and has an area of 0.04 mm . The -parameters are measured using the Agilent N5242A four-port network analyzer calibrated with a four-port E-cal. Illustrated in Fig. 12(a) and (b), and are monitored through the VGA buffers for each of the 64 gain states, respectively. The maximum gain state provides 19-dB gain and the minimum gain state provides 34 dB of attenuation at 1 GHz, providing a total gain range of 52 dB. The VGA measured 3-dB bandwidth is 800 MHz due to underestimated capacitance. The measured differential mode input return loss and isolation is plotted in Fig. 12(c). Across the 64 different gain states, the input return loss is better than 20 dB and the isolation is better than 40 dB. As shown in Fig. 5(d), the measured gain of the VGA tracks the Friis loss within the minimum and maximum detection range very closely (1 and 48 m). In short distances less than 1 m, the VGA is not able to track the Friis loss due to the abrupt changes in the loss. The group-delay variation across gain states of the VGA is important to detect pulse-compression codes and is measured over 1.5 GHz, as shown in Fig. 12(e). Over the 64 gain states, the measured maximum group delay variation is 50 ps. The largest variation occurs at 800 MHz. The measured input power 1-dB compression, , at 1 GHz is plotted in Fig. 12(f). is 26 dBm for the maximum gain state and 15 dBm for the minimum gain state. The saturated output power is 5 dBm for

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Fig. 15. Measured VGA gain states in time domain and the offset correction of the corresponding states.

Fig. 16. Measured autocorrelation for the 1-GB/s 5-bit Barker code.

64 gain states. The overall VGA performance and a comparison with other studies is summarized in Table I.

of the chip is 22.4 mW excluding 34.8 mW of power consumption due to the VGA and correlator monitoring buffers.

B. VGA, Offset Compensation, and Correlator Blocks The three-level input signal and template signal is provided with a Stratix IV FPGA and 16-b 1-Gs/s two-channel DAC on the FPGA board shown in Fig. 13. The commutating transistors in the correlator and VGA input are being driven by the three-level sequences provided by the FPGA board and DACs on the board. The codes to create the Barker and PRN sequences are written in a Quartus environment. To mimic very low-level radar returns at the input, external SMA attenuators are used. The analog pulse compressor is tested in various scenarios to evaluate the system performance for different polyphase codes and parameters—number of sub-pulses, period of the sub-pulses, and pulse repetition frequencies of the pulse. As illustrated in Fig. 14, a three-level template signal (1-GB/s 5-bit Barker code) provided with a Stratix IV FPGA is swept in time via the FPGA registers to monitor the correlation output. The correlator output is sampled at the end of each template code and is monitored to create the 5-bit barker code autocorrelation, as shown in Fig. 14. The correlator output is also monitored with the changing VGA states. For simplicity, the input signal amplitude is kept constant while VGA gains are varied. As illustrated in Fig. 15, the increasing VGA gain increases the signal amplitude at the correlator output; however, it brings different offset values at the output, which is compensated with the offset compensation circuit and FPGA. In Fig. 16, the measured autocorrelation of the 5-bit Barker code is shown. The alignment occurs for the template corresponding to 18 ns, which determines the TOF of the signal and the distance of the object, 5.4 m. As demonstrated, the sidelobes occur when the template is not aligned with the incoming signal. The only nonideality is that the sidelobe at 19 ns should have been placed at much lower values than 60 mV to provide the dynamic range required. The correlator and comparator consume 4.1 and 0.6 mA from the 1.2-V supply, respectively. The overall power consumption

V. CONCLUSIONS An analog baseband circuit for pulse-compression radar has been proposed for an indoor “cognitive radar” application. The PCR analog signal processing is based on a high dynamic-range VGA and template correlation circuit is implemented and fabricated in a 90-nm process. The differential 6-bit VGA is designed to track Friis path loss through rapid change of the VGA gain and reduces the dynamic range on the correlator and ADC. The VGA has a gain variation of 52 dB and a low group-delay imbalance of 50 ps over 64 states. The analog correlator replaces a matched filter and alleviates the speed and resolution requirements of the ADC. The chip is wire bonded on the FR4 printed circuit board and tested with a Stratix IV FPGA board to evaluate the system performance for different polyphase codes and their parameters. ACKNOWLEDGMENT The authors thank H. Mukai, Panasonic Corporation, Tokyo, Japan, for his support and help during measurements, J. Li, University of California at San Diego (UCSD), La Jolla, for discussions, and California Institute for Telecommunications and Information Technology ( Calit2), San Diego, for providing measurement equipments. REFERENCES [1] S. Y. Kim and G. Rebeiz, “A low-power BiCMOS 4-element phased array receiver for 76–84 GHz radars and communication systems,” IEEE J. Solid-State Circuits, vol. 47, no. 2, pp. 359–367, Feb. 2012. [2] J. Kuo et al., “60-GHz four-element phased-array transmit/receive system-in-package using phase compensation techniques in 65-nm flip-chip CMOS process,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 3, pp. 743–756, Mar. 2012. [3] C.-Y. Kim, D.-W. Kang, and G. M. Rebeiz, “A 44–46-GHz 16-element SiGe BiCMOS high-linearity transmit/receive phased array,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 3, pp. 730–742, Mar. 2012.

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[4] S. Haykin, “Cognitive radar,” IEEE J. Solid-State Circuits, vol. 44, no. 12, pp. 3469–3485, Dec. 2009. [5] T. Teixeira, G. Dublon, and A. Savvides, “A survey of human-sensing: Methods for detecting presence, count, location, track, and identity,” ACM Comput. Surveys, vol. V, pp. 1–35, 2010. [6] I. Gresham et al., “Ultra-wideband radar sensors for short-range vehicular applications,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 9, pp. 2105–2122, Sep. 2004. [7] J. Nanzer and R. Rogers, “Human presence detection using millimeterwave radiometry,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 12, pp. 2727–2733, Dec. 2007. [8] A. Droitcour, O. Lubecke, and G. Kovacs, “Signal-to-noise ratio in Doppler radar system for heart and respiratory rate measurements,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 10, pp. 2498–2507, Oct. 2009. [9] C. Li, X. Yu, C. Lee, D. Li, L. Ran, and J. Lin, “High-sensitivity software-configurable 5.8-GHz radar sensor receiver chip in 0.13- m CMOS for noncontact vital sign detection,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 5, pp. 1410–1419, May 2010. [10] C. Lin, S. Chang, C. Chang, and C. Lin, “Microwave human vocal vibration signal detection based on Doppler radar technology,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 8, pp. 2299–2306, Aug. 2010. [11] S. M. Lee, T. Song, J. Park, C. Changhyuk, A. Sangjun, L. Kyutae, and J. Laskar, “A CMOS integrated analog pulse compressor for MIMO radar applications,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 4, pp. 747–756, Apr. 2010. [12] S. Chang, T.-S. Chu, J. Roderick, D. Chenliang, T. Mercer, J. Burdick, and H. Hashemi, “UWB human detection radar system: A RF CMOS chip and algorithm integrated sensor,” in IEEE Int. Ultra-Wideband Conf., 2011, vol. 58, no. 1, pp. 355–359. [13] J. Yang, G. Pyo, C.-Y. Kim, and S. Hong, “A 24-GHz CMOS UWB radar transmitter with compressed pulses,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 4, pp. 1117–1125, Apr. 2012. [14] M. I. Skolnik, Introduction to RADAR Systems, 3rd ed. New York: McGraw-Hill, 2001. [15] K. Koh, J. May, and G. Rebeiz, “A millimeter-wave (40–45 GHz) 16-element phased-array transmitter in 0.18- m SiGe BiCMOS technology,” IEEE J. Solid-State Circuits, vol. 44, no. 5, pp. 1498–1509, May 2009. [16] B. R. Mahafza, Matlab Simulations for Radar Systems Design. Boca Raton, FL: CRC, 2004. [17] R. G. Lyons, Understanding Digital Signal Processing, 3/E. New York: Prentice-Hall, 2010. [18] H. Hashemi and H. Krishnaswamy, “Challenges and opportunities in ultra-wideband antenna-array transceivers for imaging,” in IEEE Int. Ultra-Wideband Conf., Sep. 2009, pp. 586–591. [19] J. Kim, M. Parlak, and J. F. Buckwalter, “A 77-GHz to 90-GHz bidirectional amplifier for half-duplex front-ends,” in IEEE Custom Integr. Circuits Conf., Sep. 2010, pp. 1–4. -band phase [20] M. Parlak and J. F. Buckwalter, “A low-power, shifter in a 0.12- m SiGe BiCMOS process,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 11, pp. 631–633, Nov. 2010. [21] M. Parlak, M. Matsuo, and J. F. Buckwalter, “Bidirectional circuitry for millimeter-wave pulse compression radar,” in IEEE RadarCon Conf., May 2011, pp. 1062–1067. [22] S. Y. Kang, J. Jang, I. Y. Oh, and C. S. Park, “A 2.16 mW low power digitally-controlled variable gain amplifier,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 3, pp. 172–174, Mar. 2010. [23] Q. Q. Lei and Z. M. Chen, “A low-power CMOS VGA with 60-dB linearly controlled gain range for GPS application,” in Proc. IEEE Solid-State Integr. Circuit Technol., Oct. 2008, pp. 1669–1675. [24] H. D. Lee, K. A. Lee, and S. Hong, “A wideband CMOS variable gain amplifier with an exponential gain control,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 6, pp. 1363–1373, Jun. 2007. [25] Y. J. Wang, B. Afshar, and T. Y. Cheng, “A 2.5 mW inductorless wideband VGA with dual feedback DC-offset correction in 90 nm CMOS technology,” in IEEE Radio Freq. Integr. Circuits Symp. Dig., Jun. 2008, vol. 1, pp. 91–94.

[26] M. Parlak, M. Matsuo, and J. F. Buckwalter, “A 6-bit wideband variable gain amplifier with low group delay variation in 90 nm CMOS,” in IEEE Silicon Monolithic Integr. Circuits RF Syst. Top. Meeting, Jan. 2012, pp. 147–150. [27] J. Xiao, I. Mehr, and J. S. Martinez, “A high dynamic range CMOS variable gain amplifier for mobile DTV tuner,” IEEE J. Solid-State Circuits, vol. 42, no. 2, pp. 292–301, Feb. 2007. [28] Q. Duong, Q. Le, C. Kim, and S. Lee, “A 95-dB linear low-power variable gain amplifier,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 53, no. 8, pp. 1648–1657, Aug. 2006.

Mehmet Parlak (S’05) received the B.S. degree in electrical engineering from the Middle East Technical University (METU), Ankara, Turkey, in 2005, the M.S. degree in electrical engineering from the University of California at San Diego (UCSD), La Jolla, in 2008, and is currently working toward the Ph.D. degree at UCSD. He possesses industry experience with Panasonic Wireless Research Laboratories, San Jose, CA, and Nokia–Siemens Networks, Munich, Germany. He is currently with the Broadcom Corporation, Irvine, CA, where he is involved in RF and millimeter-wave ICs in silicon technologies. He was a Bernard and Sophia Gordon Engineering Leadership Scholar at UCSD and a Fulbright scholar. His research interests include high-speed analog/RF circuit design for wireless communications and radar systems. Mr. Parlak was the recipient of the 2009 Best Executive Summary Award and the 2009 Business Plan Competition Award. He was a corecipient of the 2010 Business Plan Competition Award of the UCSD Entrepreneur Challenge Competition. He was also recognized as the 2007 Best Teaching Assistant of the Electrical Engineering Department, UCSD.

Michiaki Matsuo (M’07) received the B.S. and M.S. degrees in electrical engineering from Waseda University, Tokyo, Japan, in 1990 and 1992, respectively. In 1992, he joined the Matsushita Electric Industrial Corporation Ltd., Kawasaki, Japan, where he performed research and development on microwave components, in particular, resonators and filters. In 2008, he was transferred to the Panasonic Research and Development Company of America, San Jose, CA, where he was engaged in the development of millimeter-wave wireless technology and applications. He is currently a Chief Engineer with the Panasonic Corporation, Yokohama, Japan. Mr. Matsuo is a member of the Institute of Electronics, Information and Communication Engineers (IEICE), Japan.

James F. Buckwalter (S’01–M’06) received the Ph.D. degree in electrical engineering from the California Institute of Technology, Pasadena, in 2006. He is currently an Assistant Professor of electrical and computer engineering with the University of California at San Diego (UCSD), La Jolla. From 1999 to 2000, he was a Research Scientist with Telcordia Technologies. During Summer 2004, he was with the IBM T. J. Watson Research Center, Yorktown Heights, NY. In 2006, he joined Luxtera, Carlsbad, CA. In July 2006, he joined the faculty of UCSD. Dr. Buckwalter was the recipient of a 2004 IBM Ph.D. Fellowship, the 2007 Defense Advanced Research Projects Agency (DARPA) Young Faculty Award, and the 2011 National Science Foundation (NSF) CAREER Award.

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245-GHz LNA, Mixer, and Subharmonic Receiver in SiGe Technology Yanfei Mao, Klaus Schmalz, Johannes Borngräber, and John Christoph Scheytt

Abstract—A four-stage common-base (CB) 245-GHz low-noise amplifier (LNA) and a fourth subharmonic 245-GHz transconductance mixer are presented. An integrated subharmonic receiver for sensing applications in the 245-GHz industrial–scientific–medical band is proposed. The receiver consists of a single-ended CB LNA, a fourth transconductance subharmonic mixer, a 60-GHz push–push voltage-controlled oscillator with a 1/32 divider, and an IF amplifier. It is fabricated in an SiGe: C BiCMOS technology and of 300 and 500 GHz, respectively. Its measured with single-ended gain is 21 dB at 243 GHz with a tuning range of 12 GHz, and a noise figure of 33 dB. The input 1-dB compression point is 37 dBm. The receiver dissipates at 358 mW. Index Terms—Common-base (CB) low-noise amplifier (LNA), millimeter-wave circuits, subharmonic mixer (SHM), SiGe technology, subharmonic receiver, 245 GHz, voltage-controlled oscillator (VCO).

I. INTRODUCTION

A

N industrial–scientific–medical (ISM) band at 245 GHz with 2-GHz bandwidth is available in Europe, which could be used for imaging radar for security applications, biomedical sensors for medical diagnostics [1], as well as millimeter-wave gas spectroscopy [2]. In [3], a fully differential 220-GHz integrated receiver front-end without a voltage-controlled oscillator (VCO) has been demonstrated in SiGe technology. Both the LNA and mixer are implemented with differential signaling. Although differential signaling is more robust to common-mode noise, it comes at the expense of higher power and more complicated local oscillator (LO) distributions. In order to reduce power dissipation, a single-ended receiver structure is chosen in this study. Hence, a single-ended LNA and subharmonic mixer (SHM) were studied and implemented. Finally, a single-ended receiver comprising of the single-ended LNA and SHM is proposed. Various LNAs with different topologies, such as common emitter or cascode, are reported. In [4], using SiGe technology, Manuscript received February 28, 2012; revised June 22, 2012; accepted July 03, 2012. This work was supported by EFRE, Land Brandenburg under Project Tele-Diagnostik. This paper is an extended paper from the 12th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, , Santa Clara, CA, January 16–18, 2012. Y. Mao, K. Schmalz, and J. Borngräber are with IHP GmbH, D-15236 Frankfurt (Oder), Germany (e-mail: [email protected]). J. C. Scheytt was with IHP GmbH, D-15236 Frankfurt (Oder), Germany. He is now with the Department of System and Circuit Technology, University of Paderborn, Paderborn 33102, Germany. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2209447

TABLE I PERFORMANCE COMPARISON OF SHMs

a differential three-stage common emitter LNA at 60 GHz with 18-dB gain and 22-GHz 3-dB bandwidth is reported. In [5], a two-stage cascode SiGe LNA with 13.5-dB gain and a noise figure (NF) of 9.6 dB at 122 GHz is reported. In that study, the cascode configuration was chosen for its high gain, high isolation, and wide bandwidth. In [3], a differential three-stage cascode LNA at 220 GHz with 15 dB is reported. This paper investigates a common-base (CB) topology and presents a four-stage LNA with high gain and low NF. Simulations and measurements show that CB LNAs are very sensitive to even a low parasitic inductance at the grounded base node. This effect is theoretically investigated. With respect to mixer design, SHMs offer an alternative solution to fundamental mixers in the millimeter-wave range since they allow for an LO at lower frequency [1]. In [1], a second SHM based on two stacked switching quads with conversion gain of 21 dB at 122 GHz and NF of 21 dB is reported. In [6], second transconductance subharmonic balanced mixers with 0.7-dB conversion gain at 77 GHz are demonstrated. In [7], a fourth transconductance SHM at 650 GHz with 13-dB conversion gain and 42-dB NF is presented. In [8], a fourth passive GaAs monolithic SHM with a maximum conversion loss of 13.2 d dB is achieved at 60 GHz. Table I gives a brief comparison between those different SHMs. Comparing SHMs based on switching cores with transconductance SHMs, switching cores do not behave like switches of the transistsors while transconat frequencies near the ductance SHMs still function well even for frequencies beyond (or ) [7]. A comparison of the transconductance SHM with a passive SHM shows that the transconductance SHM has a better gain performance. Based on these considerations, a transconductance SHM topology is preferable. A fourth SHM was implemented, which can be used with an existing 60-GHz VCO. Using an LNA, fourth SHM, and 60-GHz VCO, a singleended 245-GHz receiver was implemented and measured. This paper is organized as follows. In Section II, semiconductor technologies for the different fabrication runs are briefly described. In Section III, the design of the CB LNA is presented together with a mathematical analysis of the influence of small parasitic

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ground inductance. The SHM and the 60-GHz VCO are then presented. In Section IV, simulation and measurement results of the components and the integrated receiver are shown. This is followed by Section V in which different receiver topologies are discussed and an improved receiver topology is proposed. Finally, conclusions are given in Section VI. II. TECHNOLOGY We used three subsequent fabrication runs (run1, run2, and run3) for the fabrication of the receiver and its standalone subcircuits, LNA, SHM, VCO, and LNA-SHM chain. In the three runs, a different IHP GmbH semiconductor was utilized. In run1, a four-stage CB 245-GHz LNA was designed in an experimental 0.25- m BiCMOS (DotFive) technology. The technology has five metal layers. The five metal layers include three aluminum metal layers and two top-metal layers with 2and 3- m thickness, respectively. Low-loss transmission lines could be designed with the two thick top-metal layers. and of the experimental transistors are reported to be 300 and 500 GHz, respectively [14]. In run2, a fourth transconductance SHM was designed in IHP GmbH’s standard 0.13- m BiCMOS technology (SG13S). The CB LNA from run1 was also redesigned in this technology. The SG13S technology has seven aluminum layers. The seven layers include five thin metal layers and two top-metal layers with 2and 3- m thickness, respectively. The and of the transistors are 250 and 300 GHz, respectively [15]. In run3, a standalone LNA, a fourth transconducatance SHM, an LNA-SHM chain, and an LNA-SHM chain with a VCO were designed in an improved 0.13- m BiCMOS technology (SG13G2). The technology has the same metal layers as that in run2 (SG13S), but with different transistors. The and of the transistor are 300 and 500 GHz, respectively [9]. III. CIRCUIT DESIGN A GoldenGate RF integrated circuit simulator is utilized to design and optimize the receiver. Transmission lines were simulated with Momentum, and the simulation results were fitted to a transmission-line model TLINP in ADS. TLINP was then utilized in the circuit simulation. Inductors and transformers were simulated with 2.5-D planar electromagnetic (EM) simulator (Momentum), and -parameters were obtained and utilized in circuit simulation. The topology of the receiver is shown in Fig. 1. The receiver consists of a 245-GHz CB LNA, a fourth transconductance SHM, an IF amplifier (IFAMP), a 60-GHz push–push VCO, and a 1/32 frequency divider (FD) for the 30-GHz fundamental frequency output of the VCO. Conjugate matching is implemented between the LNA and mixer interface for maximum power transfer, and the VCO output is coupled to the SHM by a transformer. The LNA, SHM, and VCO were designed and tested both as separate components, as well as in their fully integrated configurations as receivers. Besides standalone subcircuits, the LNA-SHM chain without a VCO is also designed and measured.

Fig. 1. Topology of the receiver.

In the following sections, the details of these circuit designs and the complete receiver design are presented. A. CB Low-Noise Amplifier A CB topology is chosen for each stage for its wide bandwidth, high gain, and high isolation at the operating frequency. The CB topology has a much better gain performance per stage than the common emitter topology. When comparing a twostage CB with a cascode topology, it can be shown that due to the influence of the parasitic inductance between the base terminal and the ground, a CB stage can achieve comparable gain with lower power [10]. Fig. 2 shows the schematic of one stage of the four-stage CB LNA. Bond pad capacitances are included in both the input and output matching networks. In run1, provides the base bias for the CB transistor through resistor ladder R1 and R2. In run3, the bias circuit is modified, as shown in Fig. 2. Diode-connected transistor biasing is adopted in run3 in order to realize more accurate bias. Measurement results illustrating the improvement will be shown in Section IV. Transistor Q0 is biased at close to peak collector current density in order to achieve high speed for Q0. provide the dc ground for the emitters of the transistors, and with the and metal–insulator–metal (MIM) capacitors , form the input and inter-stage impedance matching network, where presents the number of the stage in the four-stage CB LNA. Transmission lines represent inductive loads for each CB stage. provides the ac ground for the base connection and the dc supply. For frequencies as high as 245 GHz, minor parasitics like pieces of short interconnects, the terminal connections, parasitic bottom capacitor of the MIM capacitor, etc., will affect the performance of the LNA. A parasitic inductance is utilized in this work to boost the gain of the LNA. The inductance may be caused by the connection between base terminal and bypass capacitor (ac ground) or the nonideal metal 1 ground plane and is in the range of 1–5 pH. At such high frequency, 245 GHz , this inductance has a strong influence on the LNA stability. Fig. 3 shows a small-signal equivalent circuit of one stage of the CB LNA where denotes the parasitic inductance between base terminal and ac ground. The relevant transistor parasitics at high frequencies are , , , and representing base resistance, base–emitter capacitance,

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Fig. 2. Schematic of the one stage of the CB LNA.

becomes negative of the amplifier. In fact, the real part of when the relation (8) is fulfilled as follows: (8)

Fig. 3. Small-signal equivalent circuit of one stage of the CB LNA.

base–collector capacitance, and collector–substrate capacitance, respectively. In Fig. 3 is included in the load impedance . An analysis of the effect of the small parasitic inductance on the CB amplifier stability is given in the following. Since we are mostly interested in the influence of parasitics on the base side of the CB stage and in order to simplify the calculations, we neglect in the analysis. In (1), we define the complex input impedance at the emitter node. In (2), the current is calculated. Applying Kirchhoff’s voltage law to the base–emitter loop, we obtain (3). Rearranging (3) yields (4). Inserting (4) and (2) into (1) yields (5) as follows: (1) (2) (3) (4)

From (8), it can also be seen that the tolerable parasitic inductance becomes smaller at high frequencies and can be increased by reducing . This can be achieved by reducing the dc collector current, and hence, the transconductance . The collector current is determined by the base–emitter bias . Thus, by reducing base–emitter bias voltage , the negative resistance seen at the emitter can be reduced. In this way, the stability of the LNA is improved while reducing at the same time the amplifier gain. On the other hand, this property of the CB amplifier can be used deliberately to increase the CB amplifier gain to some extend. More discussion about the impact of the parasitic inductance on the LNA performance is given in Section IV-A. B. SHM We chose transconductance mixing as the topology for the SHM. The reasons are well explained in [12]. In transconductance mixing, the time-varying transconductance is the dominant contributor to frequency conversion. The LO is a large signal and its voltage across the base and emitter junctions create a time-varying transconductance [6]. In general, is periodic, but not a sinusoidal signal, and can be represented as a Fourier series

(5) , we can approximate For angular frequencies by . Using this approximation and (5), we obtain (6) From (6), we can calculate the real part of

, which yields (7)

indeed From (7), we can see that the parasitic inductance may cause a negative real part of , i.e., a potential oscillation

The collector current is the product of the and input voltage . The output current consists of many mixing products. is the fundamental mixing term, which could be utilized as fundamental frequency translation. In this paper, it is the term that generates the desired subharmonic mixing product and should be maximized for higher conversion gain. In principle, the fourth harmonic signal is a function of conduction duty cycle and its optimum value can be obtained when the transistor is biased close to its turn-on point. The schematic of the 245-GHz subharmonic balanced mixer is shown in Fig. 4. Q1 and Q2 is the mixer core and they are biased close to the turn-on voltage in order to maximize the nonlinearity characteristic of the transistors. Resistor ladders are

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Fig. 4. Schematic of the one stage of fourth SHM.

Fig. 5. Layout of T1, T2 and LO, RF signals feeding.

utilized for the Q1 and Q2 biasing. Two parallel shunt-series stub transmission lines are used to achieve isolation between the LO and RF ports. A quarter-wavelength at the LO open shunt stub and a quarter-wavelength at the LO series stub form an open impedance at the LO frequency. A quarter-wavelength at the RF open shunt stub and a quarter-wavelength at the RF series stub form an open impedance at the RF frequency. The two transmission lines T1 and T2 are used to provide 90° phase delay at 245 GHz and the whole input network makes the RF signals become out of phase, while the LO signals are kept in phase at the input of the transistors. In Fig. 5, layout of T1 and T2 are illustrated. The transmission line on the right of the dotted line DL is T1, the transmission line on the left of DL is T2. feeds at P1. P1 is connected to the base of Q1, and port P2 is connected to the base of Q2. The signal becomes at P2 after it travels through T1 and T2. is out of phase compared with . The LO signal feeds at port P3, and exhibit in-phase signals after traveling the same length of transmission lines T1 and T2, respectively. In order to enable standalone SHM measurement, after the mixing core stage, a differential common emitter buffer stage is utilized as the output buffer stage to provide impedance matching to 50 . 50- resistive loads are used in the buffer for output matching. Filtering capacitors (400 fF) are used parallel to the resistor loads to filter out frequency components

Fig. 6. Schematic of the push–push oscillator with buffer .

higher than IF. Q3 and Q4 are biased with transistor biasing at the base terminal. This standalone SHM is used as well in the LNA-SHM-VCO integrated receiver. A capacitor of 1 pF is placed between the mixer and buffer stage for dc blocking. In Fig. 1, an IFAMP follows the SHM. The IFAMP is a two-stage pseudo-differential common emitter amplifier. The IFAMP utilizes a 300- resistor as the load. C. VCO The oscillator has to provide a 60-GHz single-ended signal to the fourth transconductance SHM. To fulfill all requirements in terms of tuning range, power, and reliability, a push–push oscillator topology was chosen. With this topology, it is possible to provide a signal path with relatively low fundamental frequency of 30 GHz to the FD and to provide the 60-GHz signal via a buffer to the fourth transconductance SHM. The schematic of the push–push oscillator with a buffer is shown in Fig. 6. Buffer stages are CB circuits with the advantage of high gain at 60 GHz and robustness with respect to the supply voltage. A balun is connected to the single-ended LO power input for the fourth SHM. The oscillator in this study has the same topology as the oscillator in [1], but was transferred to the IHP GmbH 0.13- m SG13G2 BiCMOS technology.

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Fig. 7. Chip photograph of CB LNA, run1.

IV. SIMULATION AND MEASUREMENT RESULTS We measured receiver and sub-circuit chips, which were fabricated in three subsequent technology runs: run1, run2, and run3. A. CB LNA in Run1 In run1, 0.25- m SG25 H1 (DotFive) technology is utilized. Fig. 7 shows a chip photograph of the fabricated CB LNA in run1. The chip size is 0.42 0.46 mm , ground–signal–ground (GSG) input and output bond pads with 80- m-pitch length are utilized for on-wafer measurement. Metal1 shielding is adopted for the pad design in order to prevent substrate loss and obtain a high- pad capacitance. On the left and right side are the input and output bond pads. On the top are the and pads. Channel stop implant was blocked at critical places such as input, output pad, transmission lines, and long inter connects, in order to reduce the ohmic loss. Large areas of decoupling MIM capacitors are also included in the chip between the supply and ground. For a frequency as high as 245 GHz, frequency shifts can occur for LNAs even if minor parasitics, such as pieces of short interconnects, the terminal connections, and parasitic bottom capacitor of the MIM capacitor, are introduced [13]. Thus, in order to give some frequency margin for measurement, in run1, two LNAs peaking at 245 and 265 GHz were designed. The two LNAs are both input and output matched to 50 . They can achieve 13- and 10-dB gain, 12- and 14-dB NF, respectively, at the designed frequency. -parameter and noise simulation results of the two LNAs could be referred in [10]. Unconditional stability of the LNA is verified from dc to 300 GHz.

Fig. 8. Measured results of the 265-GHz LNA with different current density: 1.65 V and 14 mA 2 V 1.55 V , run1 . 29 mA 2 V

Fig. 8 shows the measurement result of the 265-GHz LNA. During the measurement with the original bias points in simulation, the LNA is unstable, and by reducing the bias voltage at the base terminal from 1.8 to 1.55 V, the LNA becomes stable again. In order to give complete information, measurement results of two typical bias points are given. The LNA with of 1.65 V is not stable, with at 212 GHz above 0. It has a power dissipation of 29 mA 2 V. The LNA with of 1.55 V is stable while exhibiting a power dissipation of 14 mA 2 V. For the latter, the peak frequency shifts to 235 GHz. It has 12-dB gain at 245 GHz, and a 3-dB bandwidth of 26 GHz. As mentioned in Section III-A, a parasitic inductance is utilized in this study to boost the gain of the LNA, and due to the introduction of the inductance, a negative resistance is introduced at the input of the CB LNA stage. By decreasing the base terminal bias voltage, the negative resistance decreases, gain of the LNA is reduced, and stability of the LNA is improved. This explains well the phenomenon that the LNA becomes stable when base bias voltage reduces from 1.65 to 1.55 V in Fig. 8. In order to further verify the explanation, in simulation, an inductance of 4 pH is inserted between the base terminal and bypass capacitors (ac ground) for the 265-GHz LNA, and biased with the measured bias voltage value. -parameter simulation results of the LNA including the parasitic inductance is shown in Fig. 9. In comparison, the measurement result is also plotted. The peak frequency is shifted to around 245 GHz due to the parasitic inductance, and the LNA could achieve higher gain even with lower collector current density. The simulation confirms the measurement result. Unconditional stability is verified from

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TABLE II PERFORMANCE COMPARISON OF THREE LNAs

Fig. 9. Simulation results (16 mA 2 V, surement results (14 mA 2 V, included, run1.

V) compared with meaV) when the base inductance is

Fig. 10.

, run3.

sensitivity versus base bias

Fig. 11. Chip photograph of the fourth transconductance SHM, run2.

2 to 300 GHz. Nevertheless, between dc and 2-GHz conditional stability is verified for specific frequency range. Furthermore, with a reduced bias voltage value, taking advantage of the parasitic inductance, the LNA can have even smaller simulated NF, which is only 11 dB at 245 GHz. NF simulation results are given in [10]. In run1, the base of the LNA is biased from a resistor ladder rendering the LNA performance very sensitive to . As mentioned in Section III-A, the more accurate diode-connected transistor bias circuit is utilized in run3 to decrease the sensitivity of the gain of LNA. In Fig. 8, of the LNA at 245 GHz changes from 12 to 18.5 dB when changes from 1.55 to 1.65 V. Fig. 10 presents LNA sensitivity versus base bias in run3 in order to give a comparison. In run3, increases from 9.5 to 11 dB when changes from 1.9 to 2.1 V. Therefore, the LNA becomes much less sensitive to with the diode-connected bias circuit.

Due to the limitation of the measurement equipment, the NF is not measured. Table II shows a performance comparison of the 220-GHz LNA in [3] with an LNA of this study. Both the CB LNA in run1 and run3 are included in the table to give a comparison. With comparable gain and bandwidth performance, the LNA in run1 dissipates only 1/5 the power of the LNA in [3], and the LNA in run3 consumes only less than 1/3 the power of the LNA in [3]. The four-stage CB LNA therefore features high gain and wide bandwidth while dissipating little power. The same topology of CB LNA as in run1 was designed and fabricated. However, according to measurement results, this LNA does not work properly and achieves a gain of merely 5 dB in run2. This is because of transistors in IHP GmbH’s SG13S technology is 300 GHz, which is close to the RF operating frequency 245 GHz, and hence, positive power gain is difficult to achieve.

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Fig. 12. Measurement setup. TABLE III PERFORMANCE COMPARISON OF SHMs

Fig. 14. Conversion gain of SHM, LNA-SHM chain.

Fig. 13. Measurement and simulation results of the mixer, run2.

B. CB LNA and Fourth SHM in Run2 Both the four-stage CB LNA and fourth transconductance SHM are designed and fabricated in run2. In run2, IHP 0.13- m SG13S technology was utilized. Fig. 11 shows a chip photograph of the fourth transconductance SHM in run2. Chip size is 1 0.75 mm . On the left are GSG RF input pads, and on the right are the differential ground–signal–ground–signal–ground (GSGSG) IF output pads. At the bottom, the 60-GHz LO input pads are located. On the top, the dc pads are placed [13]. Fig. 12 shows the measurement setup for the fourth transconductance SHM. Four-port network analyzer ZVA6F provides RF signals RF/18 and (RF/16–279 MHz/16) to frequency extender Z325. A 245-GHz RF signal is obtained by the RF signal multiplications in Z325. A 245-GHz RF signal is supplied to

the device-under-test (DUT) through the waveguide transition -band WR 3.4- -band and probe tip WR 3.4-GSG-50. A 61-GHz LO signal is supplied by ZVA6F directly to the DUT. An IF signal is displayed on spectrum analyzer FSV3Q. Measurement and simulation results for the subharmonic mixer are shown in Fig. 13. The mixer was measured with LO power of 8 dBm for saturation. Fig. 13(a) shows the conversion gain of the mixer when the IF is fixed at 1 GHz. It indicates that the conversion gain is 7 dB when the RF frequency is 245 GHz with a 3-dB conversion gain of 96-dB bandwidth from 240.5 to 252.7 GHz. The simulated gain of the buffer is 6 dB, so the conversion gain of the mixer core alone is from 16 to 13 dB in the frequency range from 239 to 253 GHz. Fig. 13(b) shows the IF frequency response. The conversion gain decreases when the IF frequency increases. Gain drops when the IF frequency decreases due to the dc blocking capacitors between the mixer and buffer stage. In Fig. 13(a) and (b), the differences between the simulated and measured conversion gain is about 5 dB at an operating frequency

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of the LNA and

of the standalone LNA, run3. Fig. 18. Conversion gain of the receiver versus IF frequency.

Fig. 16. Oscillator output power versus oscillator output frequency, run3.

Fig. 19. Conversion gain of the receiver versus RF frequency with fixed IF frequency of 1 GHz.

Fig. 20. SSB NF of the receiver versus IF frequency.

Fig. 17. Chip photograph of the receiver, run3.

of 245 GHz, and this could be due to the inaccuracies of the transistor models or the EM simulation of the passives. The simulated output 1-dB compression point is 9.1 dBm. The simulated NF is 39 dB at 245 GHz. Table III gives a performance comparison between the second transconductance SHM and the fourth transconductance SHM of different technologies. For both the second SHM [6] and fourth SHM in run2, the RF frequency is very close to of the technology. Comparing the two SHMs, conversion gain of the fourth SHM is lower than that of the second SHM, and the NF is relatively higher. In run3, a

Fig. 21. Output power versus input power sweep.

fourth SHM is designed and measured, while a second SHM is designed, but not yet measured. Both the measurement results of fourth SHM and simulation results of second SHM in run3 are included in Table III for comparison. Comparing the

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TABLE IV COMPARISON OF STATE-OF-THE-ART

fourth SHM with simulation results of the second SHM in the same technology run3, a similar conclusion such as above can be drawn. Future work will be carried out using a second transconductance SHM and a passive SHM to achieve lower NF.

TABLE V CIRCUIT PERFORMANCE VERSUS TECHNOLOGY

C. Integrated Receiver in Run3 In run3, IHP GmbH 0.13- m SG13G2 technology is utilized. Besides a standalone 60-GHz VCO, a CB LNA, a fourth transconductance SHM and an LNA-SHM chain, an integrated receiver comprised of a CB LNA, a SHM, and a 60-GHz VCO was designed and fabricated in run3. The CB LNA, SHM, LNA-SHM chain, and VCO were designed as separate components. Conversion gain of both the SHM and LNA-SHM chain are measured with external 60-GHz LO sources. Measurement setup of the receiver and SHM is illustrated in Fig. 12. Fig. 14 presents the conversion gain of the SHM and LNA-SHM chain when the IF frequency is fixed at 1 GHz and RF and LO frequencies sweep simultaneously with an LO power of 8 dBm for saturation. Accordingly, of the CB LNA could be estimated by subtracting the conversion gain of the SHM from the conversion gain of the LNA-SHM chain. Fig. 15 presents both the estimated of the CB LNA and of the standalone CB LNA from measurement. In Fig. 15, there are some differences between the estimated and measurement results in the frequency range of 220–240 GHz. This may be due to the small modification in the output matching of the LNA when it is connected to the fourth SHM. However, the rough values of the two are similar. of the CB LNA has a 3-dB bandwidth extending from 237 to 261 GHz. A gain of 11 dB is achieved at 243 GHz, and the simulated NF is 12 dB. Fig. 16 shows the measurement results of the VCO. In Fig. 16, when the VCO tuning voltage changes from 0 to 3 V, the oscillating frequency changes from 57.7 to 60.6 GHz. The VCO has a peak output power of 2.3 dBm at 57.7 GHz, and a minimum output power of 0.2 dBm at 60.4 GHz. The chip photograph of the complete integrated receiver is shown in Fig. 17. The chip size is 1.1 1.3 mm . Large areas of decoupling MIM capacitors are included in the chip between the supply and the ground. The receiver was measured applying 2-V LNA supply voltage with a current of 22 mA, a 3-V SHM supply voltage with current of 16 mA, a 1.3-V supply voltage of IFAMP with

current of 13 mA, and a 3.3-V supply voltage of the VCO with a current of 63 mA. The total chip dissipates 358 mW. Fig. 18 shows the single-ended conversion gain of the receiver with fixed VCO tuning voltage of 2 V with corresponding VCO frequency at 60.4 GHz, when the input RF frequency is swept. The receiver achieves 21-dB peak-conversion gain at IF frequency of 1 GHz. Measurement results agree with the simulation results. The conversion gain decreases when the IF frequency decreases due to the dc blocking capacitor (1 pF) between the fourth subharmonic mixer and the IF buffer amplifier. The 3-dB bandwidth at the upper sideband reaches from 241.8 to 243.9 GHz, with the IF 3-dB bandwidth extending from 0.1 to 2.2 GHz. 3-dB RF bandwidth in the lower sideband extends from 239.7 to 241.3 GHz in the mirror, with the IF 3-dB bandwidth extending from 0.4 to 2 GHz. 1-dB compression point is at 37 dBm with IF frequency of 1 GHz and of 2 V. IFAMP contributes around 16-dB gain in the receiver, which is calculated from the difference between the conversion gain of the subharmonic receiver (21 dB) and that of the standalone LNA-mixer chain (5 dB). Fig. 19 presents the conversion gain of the receiver versus RF frequency with tuning voltage from 0 to 3 V and fixed IF frequency of 1 GHz. The input RF frequency is swept from 234 to 246 GHz while keeping the IF frequency constant. A tuning bandwidth of 12 GHz is achieved, and in the whole frequency range, the conversion gain is nearly flat. With an LO frequency of 60.4 GHz, IF frequency at 1 GHz, corresponding RF frequency of 242.7 GHz, a 121-dBm/Hz output noise power is obtained. According to spectrum analyzer specifications, a 95% confidence level is achieved within 0.28-dB deviation. With 21-dB conversion gain, this corresponds to a 32-dB single-sideband (SSB) NF, which exceeds the simulated SSB NF of the receiver 28 by 4 dB. This is probably due to the inaccuracy in modeling. In simulation, the

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TABLE VI PERFORMANCE COMPARISON UPON DIFFERENT RECEIVERS

NF of the LNA alone is 11.7 dB at 243 GHz, according to Friis equation, the relatively high NF of the fourth SHM leads to the high overall NF 32 dB. Fig. 20 presents the measured and simulated SSB NF of the receiver versus IF frequency. SSB NF increases when IF decrease toward dc due to the reduction of the conversion gain. Measurement results agree well with the simulation results. Fig. 21 presents measurement results of the output power versus input power sweep. A 1-dB compression point is at 37 dBm extrapolated from the power sweep. Table IV gives a performance comparison between the receiver of this study and state-of-the-art. Integrated with a 60-GHz VCO, the subharmonic receiver in this study has a higher integration level compared with the state-of-the-art. Although the fourth SHM in this study leads to high overall NF (32 dB) in the chain, simulation results shows that receiver with a second SHM can achieve unproven NF (19 dB) with smaller power dissipation (145 mW). V. DISCUSSION A.

,

Upon Linear and Nonlinear Circuits

In each technology run, standalone CB LNA and SHM circuit blocks with the same topologies were designed and compared. Table V gives a summary on the comparison of circuit blocks in the three technology runs. From Table V, in three different technology runs, is similar, about 300 GHz for each, but varies a lot. of Run1 and run3 (500 GHz) is nearly twice that of run2 (300 GHz). In Table V, we come to the conclusion that for a linear circuit block such as the LNA, is the main limitation factor for increasing RF operating frequency. Obviously, it is difficult to amplify RF signal power working close or above . In run1 and run3, of transistors are two times the RF frequency of 245 GHz, and hence, the LNA shows a nice gain performance (12 dB) at 245 GHz. While for nonlinear circuits like the frequency translation circuit block SHM, plays a much less important role in the performance. In both run 2 and run 3, SHMs achieve a conversion gain around 5 dB. According to Table III, they also have similar noise performance, although in run3 the transistors have twice the of the transistors in run2. Signal power amplification could be obtained through frequency translation. As the RF operating frequency increases, due to the limitation of , the gain of the LNA decreases and the LNA might be unable to suppress noises from subsequent stages. In this

case, a receiver without an LNA, which directly converts RF signals into IF signals, is possible to obtain better performance, as shown in [7]. B. Systematic Design of a 245-GHz Receiver Topology As mentioned in Section I, besides the fourth transconductance SHM, there exist other mixer topologies like passive SHM and active ones. By combining the CB LNA with different SHMs, receivers with different features could be achieved. In this study, although measurement results from various other receiver topologies are not ready yet, some systematic simulation results are given and discussed. Different receivers, e.g., a receiver comprising of the CB LNA and a second transconductance SHM chain, a receiver comprised of the CB LNA, a second passive SHM, and an IFAMP chain, are simulated and compared. As mentioned in Section V-A, if the LNA could not provide enough gain to suppress noise, it is possible that a receiver without an LNA that directly converts RF signals into IF signals might achieve better performance. Thus, a receiver comprised of the second transconductance SHM-IFAMP chain is also simulated. In summary, Table VI gives a comparison between the different receiver topologies. At 245 GHz, the receiver comprised of the CB LNA and second transconductance SHM, and the receiver comprised of the CB LNA, second passive SHM, and IFAMP have better gain and noise performance than a receiver comprising of the second passive SHM and IFAMP. The LNA has enough gain to suppress noise from subsequent stages. The receiver comprised of the CB LNA, second passive SHM, and IFAMP has the best noise performance. Although Table VI is unproven by measurement results, it gives some guidelines for system design of the receiver at 245 GHz. VI. CONCLUSION A four-stage CB 245-GHz LNA and a fourth subharmonic 245-GHz transconductance mixer have been designed and measured. The LNA has 12-dB gain, 25-GHz 3-dB bandwidth, and a power dissipation of 28 mW, and the mixer has 7-dB conversion gain. The LNA achieves high gain and wide bandwidth while exhibiting small power consumption. A 245-GHz subharmonic receiver comprised of the CB LNA, the fourth transconductance SHM, IF amplifier, and a 60-GHz VCO was presented. The receiver reaches 21-dB gain at 243 GHz with a tuning range of 12 GHz and an NF of 32 dB. A 19-dB NF is feasible in case of a second transconductance SHM.

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ACKNOWLEDGMENT The authors are thankful for the pilot line staff, IHP GmbH, Frankfurt (Oder), Germany, for excellent fabrication of the chip. REFERENCES [1] K. Schmalz, W. Winkler, J. Borngräber, W. Debski, B. Heinemann, and J. C. Scheytt, “A subharmonic receiver in SiGe technology for 122 GHz sensor applications,” IEEE J. Solid-State Circuits, vol. 45, no. 9, pp. 1644–1656, Sep. 2010. [2] L. Persson, M. Sjoholm, G. Hong, M. Andersson, and S. Svanberg, “Tunable diode laser spectroscopy for gas detection inside scattering media,” in Eur. Lasers Electro-Opt. Conf., 2005, p. 646. [3] E. Öjefors, B. Heinemann, and U. R. Pfeiffer, “A 220 GHz subharmonic receiver frond end in a SiGe HBT technology,” in IEEE RFIC Symp. Dig., 2011, pp. 1–4. [4] Y. Sun, J. Borngraber, F. Herzel, and W. Winkler, “A fully integrated 60 GHz LNA in SiGe:C BICMOS technology,” in IEEE BCTM Symp. Dig., 2005, pp. 14–17. [5] W. Winkler, W. Debski, B. Heinemann, F. Korndorfer, H. Rücker, K. Schmalz, J. C. Scheytt, and B. Tillack, “122 GHz low-noise-amplifier in SiGe technology,” in IEEE ESSCIRC Symp. Dig., 2009, pp. 316–319. [6] J.-J. Hung, T. M. Hancock, and G. M. Rebeiz, “A 77 GHz SiGe subharmonic balanced mixer,” IEEE J. Solid-State Circuits, vol. 40, no. 11, pp. 2167–2173, Nov. 2005. [7] E. Öjefors, B. Heinemann, and U. R. Pfeiffer, “A 650 GHz SiGe receiver front-end for terahertz imaging arrays,” in IEEE Int. Solid-State Circuits Conf. Symp. Dig., 2010, pp. 430–431. [8] M. W. Chapman and S. Raman, “A 60-GHz uniplanar MMIC 4 subharmonic mixer,” in IEEE MTT-S Int. Microw. Symp. Dig., 2001, vol. 1, pp. 95–98. [9] H. Rücker, B. Heinemann, and A. Fox, “Half-terahertz SiGe BICMOS technology,” in IEEE BCTM Symp. Dig., 2012, pp. 133–136. [10] Y. Mao, K. Schmalz, J. Borngräber, and J. C. Scheytt, “A 245 GHz CB LNA in SiGe,” in IEEE EuMIC Symp. Dig., 2011, pp. 224–227. [11] R. G. Paul, J. H. Paul, H. L. Stephen, and G. M. Robert, Analysis and Design of Analog Integrated Circuits, 4th ed. New York: Wiley, 2001, pp. 34–36. [12] Y. Mao, K. Schmalz, J. Borngraber, and J. C. Scheytt, “A 245 GHz CB LNA and SHM mixer in SiGe technology,” in IEEE Silicon Monolithic Integr. Circuits RF Syst. Top. Meeting, 2012, pp. 5–8. [13] Y. Mao, K. Schmalz, J. Borngräber, and J. C. Scheytt, “Comparison of 122 GHz LNAs in SiGe with different transmission line topologies,” in IEEE MTT-S Microw. Workshop, 2011, pp. 152–155, Ser. Millimet. Wave Integration Technol.. [14] S. Decoutere, S. Van Huylenbroeck, B. Heinemann, A. Fox, P. Chevalier, A. Chantre, T. F. Meister, K. Aufinger, and M. Schröter, “Advanced process modules and architecture,” in Proc. BCTM, Oct. 2009, pp. 9–16. [15] H. Rücker, B. Heinemann, W. Winkler, R. Barth, J. Borngräber, J. Drews, G. Fischer, A. Fox, T. Grabolla, U. Haak, D. Knoll, F. Korndörfer, A. Mai, S. Marschmeyer, P. Schley, D. Schmidt, J. Schmidt, K. Schulz, B. Tillack, D. Wolansky, and Y. Yamamoto, “A 0.13 m SiGe BICMOS technology featuring of 240/330 GHz and gate delays below 3 ps,” in Proc. BCTM Conf., 2009, pp. 166–169. [16] M. Abbasi, S. E. Gunnarsson, N. Wadefalk, R. Kozhuharov, J. Svedin, S. Cherednichenko, I. Angelov, I. Kallfass, A. Leuther, and H. Zirath, “Single-chip 220-GHz active heterodyne receiver and transmitter MMICs with on-chip integrated antenna,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 2, pp. 466–478, Feb. 2011. [17] S. E. Gunnarsson, N. Wadefalk, J. Svedin, S. Cherednichenko, I. Angelov, H. Zirath, I. Kallfass, and A. Leuther, “A 220 GHz single-chip receiver MMIC with integrated antenna,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 4, pp. 284–286, Apr. 2008.

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[18] E. Öjefors, B. Heinemann, and U. R. Pfeiffer, “Subharmonic 220- and 320-GHz SiGe HBT receiver front-ends,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 5, pp. 1397–1404, May 2012. Yanfei Mao received the Master’s degree in microelectronics from the Technical University of Delft (TU Delft), Delft, The Netherlands, in 2009. She is currently with IHP GmbH, Frankfurt (Oder), Germany, where he has been involved in the field of RF circuit design. Since joining IHP GmbH, she has authored three papers concerning RF circuit design. Her research interest is the 245-GHz receiver in SiGe BiCMOS technology for sensor applications.

Klaus Schmalz received the Ph.D. degree in physics from the Humbolt University of Berlin, Berlin, Germany, in 1978. He is currently with IHP GmbH, Frankfurt (Oder), Germany. He has been involved in the field of silicon semiconductor technologies and research and possesses expertise in the area of thermally induced defects and characterization of Si/SiGe structures. After training in RF circuit design at the University of California at Los Angeles (UCLA), from 1998 to 1999, he changed his scientific focus to RF analog circuit design. He has authored or coauthored over 100 papers. His research interest is the design of SiGe BiCMOS analog circuits for wireless communication with emphasis on RF frontends for different standards and millimeter-wave circuits for sensor applications.

Johannes Borngräber received the Diploma of mathematics degree from Humboldt University, Berlin, Germany, in 1981. Since 1994, he has been with the Department of Circuit Design, IHP GmbH, Frankfurt (Oder), Germany. He is currently especially interested in NF and phase-noise measurement techniques in the millimeter-wave range.

John Christoph Scheytt received the Diploma degree (M.S.) and Ph.D. degree with highest honors) from Ruhr-University Bochum, Germany, in 1996 and 2000, respectively. In 2000, he cofounded advICo Microelectronics GmbH, a German integrated circuit (IC) design house. For six years, he was the Chief Executive Officer (CEO) with advICo Microelectronics GmbH, where he was responsible for various projects in the area of wireless and fiber-optic IC design. From 2006 to 2012, he was with Head of the Circuit Design Department (a group of about 30 researchers involved with high-frequency and broadband IC design), IHP GmbH. In 2012, he became a Professor of circuit design with the University of Paderborn, Paderborn, Germany. He has authored or coauthored over 80 papers. He holds 12 patents. His research interests include RF integrated circuit (RFIC) and broadband IC design, phase-locked loop (PLL) techniques, and design with SiGe BiCMOS technologies.

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CMOS Integrated Antenna-Coupled Field-Effect Transistors for the Detection of Radiation From 0.2 to 4.3 THz Sebastian Boppel, Alvydas Lisauskas, Martin Mundt, Dalius Seliuta, Linas Minkevičius, Irmantas Kašalynas, Member, IEEE, Gintaras Valušis, Martin Mittendorff, Stephan Winnerl, Viktor Krozer, Senior Member, IEEE, and Hartmut G. Roskos

Abstract—This paper reports on field-effect-transistor-based terahertz detectors for the operation at discrete frequencies spanning from 0.2 to 4.3 THz. They are implemented using a 150-nm CMOS process technology, employ self-mixing in the n-channels of the transistors and operate well above the transistors’ cutoff frequency. The theoretical description of device operation by Dyakonov and Shur is extended in order to describe the device impedance, responsivity, and noise-equivalent power for a novel detection concept, which couples the signal to the drain. This approach enables quasi-static (QS) detection and calibration of the detectors. The different transport regimes (i.e., QS, distributed resistive, and plasmonic mixing) and their transitions are theoretically discussed and experimentally accessed. Responsivity values of 350 V/W at 595 GHz, 30 V/W at 2.9 THz, and 5 V/W at 4.1 THz are reported. At 0.595 THz, we determine the optical Hz; at 2.9 THz, the noise equivalent power (NEP) to be 42 pW value is 487 pW Hz. All values are reported for optimum gate bias with respect to NEP at 295 K. For 0.595 THz, theory predicts Hz for ideal coupling a NEP value at threshold as low as 2 pW of the radiation. Index Terms—CMOS, direct terahertz detection, distributed resistive self-mixing, patch antennas, plasmonic detection, submillimeter-wave detectors, terahertz detectors.

I. INTRODUCTION

C

OMMON knowledge suggests that efficient operation of field-effect transistors (FETs) above their cutoff frequency is not feasible. While this is true for transit-time-limited applications such as power amplification and logic switching operations, density waves of charge carriers (plasma waves)

Manuscript received March 19, 2012; revised September 19, 2012; accepted September 24, 2012. Date of publication November 15, 2012; date of current version December 13, 2012. This work was supported in part by the BMBF Project LiveDetect3D, Oerlikon AG, Alexander Humboldt Foundation, and by WI Bank Hessen. This paper is an expanded paper from the 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Santa Clara, CA, January 15, 2012. S. Boppel, A. Lisauskas, M. Mundt, V. Krozer, and H. G. Roskos are with the Physikalisches Institut, Johann Wolfgang Goethe-Universität Frankfurt, D-60438 Frankfurt, Germany (e-mail: [email protected]). D. Seliuta, L. Minkevičius, I. Kašalynas, and G. Valušis are with the Semiconductor Physics Institute, Center for Physical Science and Technology, LT-01108 Vilnius, Lithuania. M. Mittendorff and S. Winnerl are with Helmholtz-Zentrum DresdenRossendorf, 01328 Dresden, Germany. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2221732

relax this limitation when rectifying and mixing phenomena are considered. Plasma waves in 2-D electron gases and their interaction with electromagnetic waves have been the subject of intensive theoretical and experimental studies for over three decades [2] In 1996, Dyakonov and Shur suggested utilizing the excitation of plasma waves in the transistors’ channels for the detection and mixing at frequencies higher than the cutoff frequency, thus paving the way for novel devices for the terahertz frequency range [3]. The viability of this approach was proven soon after with experiments on a GaAs high electron-mobility transistor (HEMT), which was used to detect radiation at 2.54 THz, 30 times above its transit-time-defined cutoff frequency [4]. Numerous studies with HEMTs at various temperatures and for different coupling schemes followed [5]–[11]. The focus of this paper is on terahertz detection with silicon MOSFETs. Such devices, without antenna or grating couplers, were first investigated in 2006 by the Knap group of Montpellier with radiation at 700 GHz [12]. At room temperature, where the measurements were performed, plasma waves are strongly attenuated and can only propagate through a part of the FET’s channel. Since the attenuation prevents standing plasma waves to occur in the channel, this situation was termed the “non-resonant case” of the theory of Dyakonov and Shur [13]. This case can also be understood as a close relative of the well-known “resistive mixing” with FETs. If the frequency is increased, resistive mixing develops into “distributed resistive self-mixing,” where the channel of the FET can no longer be treated as a lumped element, but rather as a ultra-high-frequency waveguide [14]. The practical interest in MOSFET-based terahertz detectors and mixers strongly increased, after the first antenna-coupled MOSFET detectors and few-pixel focal plane arrays were implemented successfully for 645 GHz using a 250-nm CMOS foundry process, which did not need to be supplemented by additional fabrication steps [14], [15]. Device performance was further improved by various means such as the use of a more advanced 65-nm SOI process technology [16] or by modified circuit concepts in combination with cost-efficient 130- or 150-nm CMOS technology, respectively [17], [18]. Typical performance data, presented in [18] for 590-GHz detectors, are an optical noise-equivalent power (NEP) of 43 pW Hz and a maximum (capacitive loading limited) optical responsivity of 970 V/W (both values averaged over a number of individual

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BOPPEL et al.: CMOS INTEGRATED ANTENNA-COUPLED FETs

Fig. 1. Micrograph of a 1.5 2.5 mm large silicon die showing different patch antennas for ten different terahertz frequencies. A close-up photograph shows the high-frequency section (for frequencies larger than 1.4 THz) of the chip, as well as a part of a 200-GHz antenna.

devices), an excellent uniformity, low inter-chip variation of less than 8% among pixels, and a high fabrication yield. The good performance strongly suggests that CMOS detectors are suitable candidates for commercial terahertz cameras applicable to imaging in fields such as nondestructive testing, quality control, medicine, and security [19]. In fact, a 1-kpixel and a 144-pixel focal-plane array, the latter also suitable for heterodyne operation, have recently been implemented and tested at frame rates well above 1 frame/s [20], [21]. Much of the recent work on MOSFET terahertz detectors is focused on the sub-1-THz frequency range. In this paper, we explore operation at higher frequencies and systematically study detection of free-space radiation from 0.2 to 4.3 THz. We exploit the novel detector concept of [18], where the signal received by the antenna is applied between the drain and source terminals. This approach allows for ready detector calibration by measurements of low-frequency signals. In Section II, we provide details on design and implementation of the devices. Sections III–V present the theoretical approach for the description of detector operation, based on the Dyakonov–Shur model, and provide simulation data for different gate-bias voltage regimes, considering device impedance, responsivity, and NEP. The three frequency regimes of quasi-static (QS) mixing, distributed resistive self-mixing, and nonresonant plasmonic mixing, are distinguished from each other. Section VI presents experimental results demonstrating sensitive detection at frequencies up to 4.3 THz, covering all three frequency regimes. Theoretical and experimental data are compared. II. DETECTOR DESIGN AND LAYOUT Detectors for ten different resonance frequencies spanning from 200 GHz to 4.3 THz were implemented on a 1.5 2.5 mm large silicon die (see Fig. 1) using the 150-nm CMOS process provided by LFoundry GmbH. Each detector consists of a monolithically integrated differential patch antenna connected to a pair of transistors acting as rectifying

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Fig. 2. Schematic cross section of a patch-antenna-coupled pair of FETs for the detection at 590 GHz (dimensions not to scale). The antenna is also used for signal readout. : external gate bias voltage.

elements. Low-leakage transistors with a 150-nm channel length and a 320-nm gate width are used. The transistor cutoff frequency is approximately 35 GHz at threshold. Fig. 2 illustrates the design of a 590-GHz detector. The radiation (with its polarization vector in the paper plane) is received by a patch antenna located at the top of the insulation layer of the circuit back-end. From both edges of the patch, terahertz signals are guided downwards vertically to two MOSFETs, which correspondingly are fed with signals of opposing signs. The feeds are realized as vias. In contrast to earlier device implementations described in [14] and [15], the terahertz signals are coupled to the drain terminals of the MOSFETs. The transistors rectify the signals, with each transistor generating a dc source–drain voltage, which is ready for readout through the center of the antenna patch. Note that the transistors do not operate in a differential way, there is no subtraction of signals involved. Two transistors instead of one are used because: 1) the antenna with its immediate vicinity (feeds) remains symmetrical, and thus, also the radiation pattern and 2) lossy high-frequency transmission lines can be avoided. The rectified signal is read out at the center of the antenna against the dc ground connected to the source of the transistors. The gates and sources of both transistors are ac grounded, acting as an ac short between terminals. The gates are connected to an external source for applying a common dc gate bias voltage . This design concept exhibits a couple of advantages. By reading out the detector at the antenna center (ac ground), the antenna itself acts as a low-pass filter, and therefore, additional lossy filter structures are avoided. Furthermore, and already aforementioned, the transistors are placed in proximity to the antenna feeds. Therefore, transmission-line losses are reduced. These changes and the avoidance of long transmission-line structures contribute to minimize performance variations, as we have reported in our earlier study [18], which used the same detector design. Another advantage of drain coupling in contrast to the gate coupling approach discussed by Dyakonov and Shur, and implemented in [14] and [15], is its suitability to detect low-frequency signals, which are applied electronically through the

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readout terminal using a standard signal generator and a bias tee. Comparison of the measured rectified signal with the results of terahertz measurements allows the quantitative determination of high-frequency parasitic circuit effects and of the antenna-to-detector impedance mismatch at terahertz frequencies. With these parameters determined, low-frequency measurements can then be used for detector calibration, in order to correct performance variations of different pixels. We avoid applying a dc bias to the drain, even though the responsivity can significantly be enhanced, because the noise also increases with the consequence that the signal-to-noise ratio can be improved at most by a small amount [22]. Furthermore, additional components such as amplifiers are avoided because they would add noise, which would make the study of the pure MOSFET devices with regard to the NEP more difficult. Essential for highly sensitive detectors is an efficient coupling of the free-space radiation to the MOSFETs. The lossy silicon substrate with a resistivity of 10 cm and the limited thickness of the back-end of standard CMOS technology complicate the design of on-chip antennas. The problem of losses in the silicon substrate can be avoided by using silicon-on-insulator (SOI) technology [16]. Due to the increased costs of the process technology, we discard this possibility in this contribution and rather follow the approach of [14] and [15] employing terahertz patch antennas whose ground planes prevent the radiation field from being exposed to the doped silicon substrate. A positive side effect of this choice is that patch antennas exhibit a relatively high impedance, which somewhat approaches the high device impedance of the MOSFET-based detectors (the latter being in the range of a few k ). The high transistor impedance results: 1) from the fact that the responsivity is highest close to the threshold voltage and 2) from the choice of a short channel width in order to reduce parasitic capacitances at terahertz frequencies. The metal stack of the interconnect back-end of the standard CMOS process becomes highly functional for the implementation of the patch antennas. The LFoundry technology offers an approximately 7- m-thick dielectric layer between metal layers “M1” defined as the lowest layer and the top layer “MT.” While this yields a ratio of dielectric-layer thickness to effective wavelength of the radiation in the material of less than 1% for frequencies below 200 GHz, a ratio of 20% is reached at 4.3 THz. Which ratio is optimal for a specific detector depends on many aspects. Generally, one can say that the design constraints by the thickness of the dielectric layer relax with rising frequency and allow implementation of efficient antenna structures. We fabricated groups of ten different detectors for discrete frequencies chosen to match various available radiation sources. Antenna frequencies below 600 GHz were tailored to our electronic sources, while frequencies above 600 GHz were tailored to meet the discrete emission lines of a CO -pumped molecular gas laser available in Vilnius. The scaling of the antenna area with the square of the wavelength becomes evident when the 200 GHz and the 3.1-THz antennas are compared in Fig. 1. Obviously, multipixel cameras would require significantly less chip space at higher frequencies. Table I summarizes important geometrical data of the antennas, as well as simulation results for them (obtained with

TABLE I ANTENNA SIMULATION PARAMETERS AND RESULTS FOR DETECTORS IMPLEMENTED FOR DIFFERENT FREQUENCIES

CST Microwave Studio). The resonance frequency, impedance at resonance, radiation efficiency at resonance, and power radiation bandwidth are listed. Designs A and B are based on different patch geometries, which is indicated by the * symbol. Designs C to J are—as far as technology permitted—scaled modifications of the 590-GHz detector implementation of [18]. This approach was chosen in order to keep the devices as comparable to each other as possible. For smaller patch sizes, lower metal layers (M2 to MT) were used for the patch, taking the change of the dielectric environment of the patch into account in the simulations. While the area of the patch could be adjusted continuously, the separation of the patch and the ground plane, as well as the thickness of the patch metallization, could not, but were determined by the technology-given values. Especially at higher frequencies, the antenna performance can still be considerably optimized in the future. III. HYDRODYNAMIC DESCRIPTION OF THE TRANSPORT A fundamental theoretical description of the rectification phenomena in FETs has been given in the framework of a hydrodynamical theory in [3]. One finds several approximate treatments in the literature [3], [13]–[15], [23], where the authors introduce simplifications such as the parallel-plate charge-control model or the overdamped-plasmon approach, or the conditions at the drain are treated as open, i.e., the total current is set to be zero. In order to describe detector operation relevant for our design with the signal coupling conditions as shown in Fig. 2, and not to be limited by the above-mentioned simplifications, we return to the basic hydrodynamic description of electron transport, described by the equation of motion and the continuity equation, and follow the methods introduced in [3] for our specific situation. The two constitutive equations are (1) (2) with local drift velocity , local gate-to-channel voltage swing , location in channel , time , elementary charge

BOPPEL et al.: CMOS INTEGRATED ANTENNA-COUPLED FETs

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TABLE II LIST OF PARAMETERS AND CONSTANTS

Fig. 3. Points: measured stationary output characteristics of a nMOS transistor pair with 150-nm channel length and 320-nm width. Lines: fit by (4). The differential detector configuration (see Fig. 2) is taken into account by doubling the channel width in the fit procedure, which reflects the fact that, at dc measurement conditions, the configuration reduces to the parallel connection of two transistors.

, effective mass , and scattering time . All relevant parameters and constants used in the derivations are also summarized in Table II. The electron density in the inversion layer can be described by a unified charge control model [24] (3) being the gate–oxide capacitance per unit area and with and being the gate bias and threshold voltage, respecis the Boltztively; is the thermal voltage, mann constant, is the temperature, and is the so-called subwith the threshold ideality factor. By replacing the global , (3) corresponding local gate-to-channel voltage swing describes the local charge carrier density as a function of the local voltage, assuming immediate response [3], [13]. As a first step, we derive the following expression for the from (1) drain current introduced by a fixed drain voltage and (2), while taking (3) into account

the previously described detectors together with fitted curves calculated with (4) using the following universal bias-independent fitting parameters: , cm V s, and V. The measured data and the fitted curves exhibit good agreement. The extracted dc resistance also agrees well with measured resistances (data not shown). Only close to saturation does one finds slight deviations, which most likely are a result of the fact that the model neither includes diffusion currents, nor takes other aspects into account, which are important for short devices, e.g., channel narrowing or drain-induced barrier lowering [26]. IV. HARMONIC EXCITATION AND DEVICE IMPEDANCE Now let us consider the external oscillatory excitation at frequency and voltage amplitude (exact boundary conditions will be defined later). Let us search for the solutions of the oscillating gate-to-channel voltage, the electron velocity, and the carrier density written in the following forms: (5)

(4)

(6) (7)

Here, bility, ingly.

, , and denote electron motransistor gate width, and length, correspondWe use the complete Fermi–Dirac integrals . Alternatively, the solution can be expressed in terms of the dilogarithm function [25], which directly relates to the Fermi–Dirac integral for , i.e., . At high gate bias, i.e., , (4) simplifies to the well-known triode equation. We use (4) to determine values of , , and for the transistors used in our experiments. Fig. 3 shows experimentally measured FET output characteristics of one of

Here, , and describe stationary quantities, whereas , , and are the amplitudes of oscillations at the th harmonic; denotes the complex conjugate. With no external bias applied to the transistor’s channel, employing a functional dependence between charge and voltage oscillations given by , and approximating to the first order of , (1) and (2) reduce to (8) (9)

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Now, by solving (8) for and using it for (9), we obtain a simple second-order differential equation, which describes the oscillations of the channel potential

(18) The star denotes complex conjugation. For an unbiased channel, the following stationary velocity is obtained:

(10) , (10) Alternatively, employing the relation describes density waves. Here, is defined as the complex quantity

(19) Now, using (17), the induced detector signal can be found from (20)

(11) and

is the phase velocity of the density waves (12)

The solution of (10) has the general form with constants and being defined by the boundary conditions. These reflect the coupling scheme of Fig. 2, with the terahertz signal being coupled to the drain contact, and the source and gate contacts being ac shunted. Hence, the solutions for the amplitudes of both the local channel potential and the velocity oscillations have to fulfill the following boundary conditions: no oscillations at the source terminal , i.e., , and the full swing of the potential at the drain . Note, however, that the terahertz signal on the drain counteracts the gate voltage [see (4)]; hence, . The resulting amplitudes of the channel potential and the velocity exhibit the following form: (13) In this case, we obtain the following channel impedance as the drain voltage divided by the drain current: (14) In the QS limit, with and , the following QS resistance of the unbiased channel is derived:

(15) In the regime of distributed resistive mixing, with and , hence, , the impedance of the channel can be approximated as follows: (16) V. TERAHERTZ SIGNAL RECTIFICATION In order to describe rectification phenomena, we expand (1) and (2) using (5)–(7) and retain all stationary and time-independent terms to the second order of (17)

where the dimensionless efficiency factor feeding and ac-shorted source–gate contacts as follows:

The real and imaginary parts of

for drain is defined

(21) are given by (22)

and the “ ” sign refers to . Here, the “ ” sign refers to Fig. 4(a) illustrates the characteristic device-impedance values of an ac-shorted circuit (14), and Fig. 4(b) presents the resulting efficiency factor in comparison with the efficiency factor for an ac-open case (taken from [3, eq. (24)]). For the quantitative calculations of Fig. 4, we use the device parameters taken from the model fit with (4). We additionally show results for a carrier mobility of 330 cm V s, which is commonly cited in the literature as typical for Si of comparable doping. We first focus on the efficiency factor of (21) shown in Fig. 4(b). The first striking feature of its frequency dependence is that it has unity value over a very broad frequency range. Rectification at low frequencies can be well understood as classical resistive self-mixing of the applied signal with itself. Without ac shunting, as described by Dyakonov and Shur, mixing vanishes, as indicated in Fig. 4(b) by the open symbols. For ac shunting, the device operates as a single lumped element; the reactance increases with frequency. However, this picture breaks down when , i.e., when the frequency of oscillations exceeds . The frequency boundary given by the “ ” sign in this expression is marked in Fig. 4(b). This limit also demarks the maximum of the reactance. The mode of device operation changes here from resistive self-mixing (white background color) to the so-called distributive-resistive mixing (green background color in online version) and the smooth transition of regimes is indicated. The transistor can be described as a distributed RC circuit and a waveguide picture applies [14], [15]. It can be derived from the Dyakonov–Shur equations neglecting the first two terms of (1). In this regime, both the resistance and reactance have a frequency dependence of the form [see Fig. 4(a)]. The value of remains unity in this regime.

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case considered here [3], and the resistance becomes constant [see Fig. 4(a)]. With the expressions given before in this paper, we can now also specify the responsivity to be expected from our detectors

(23)

Fig. 4. (a) Frequency dependence of the resistance and reactance according to (14). Simulation results are given for two different values of the electron mobility: red color (in online version) corresponds to the literature-specified 330 cm V s, blue (in online version) to the mobility value of 110 cm V s extracted from the measurements (compare Fig. 4). (b) Frequency dependence of the detection efficiency factor for drain coupling depending on the boundary conditions: open symbols correspond to ac open [3], lines to ac-short conditions (21), red and blue colors (in online version) encode different mobility values as , as well specified above. Vertical arrows indicate positions where , defining the transitions between classical resistive mixing (white as background color), distributed resistive mixing (green background color in online version), and plasmonic mixing (pink background color in online version). Dashed line: classical-resistive-mixing limit of distributed resistive mixing, as described in [14]; the value is used as reference value and set to unity.

in Equation (23) gives a term for the current responsivity the QS limit in similar terms as is possible for diode-based rectifiers. The expression is derived by converting the detected voltage to a current flowing through the channel. The conversion is achieved with the expression for the impedance for the case that the channel is dc shorted by connecting the detector to a current or transimpedance amplifier. In the deep subthreshold limit , the responsivity approaches the ideal value of A W at room temperature, which is the same as for diode-based rectifiers [27]. In practical terms, this value is not reachable with FETs due to the very high channel impedance in the subthreshold regime. Yet, at the typical operation point of V, the impedance is on the order of several tens of k , and then A W at room temperature. When investigating the high-frequency performance more precisely, one has to take into account that the real part of the impedance is lower than the QS value [see Fig. 4(a)]. One obtains the following expression, when conjugate matching is fulfilled: (24)

With rising frequency, slowly increases. The RC-waveguide model does not account for this rise, but rather predicts unity value, as illustrated by the dashed line in Fig. 4(b). The rise is a consequence of the contribution to mixing by the first two terms of (1), which can no longer be neglected at higher frequencies. Depending in detail on carrier mobility and the length of the channel, the onset of this new regime, indicated by pink background color (in online version), which follows upon the distributed resistive-mixing regime, is found at comparatively low frequencies, long before the condition for one scattering event per plasmon period is fulfilled. This aspect should be even more pronounced for material systems with much higher mobility such as GaN-, GaAs-, or InP-based HEMTs of comparable channel length. When the condition is fulfilled, one can speak of fully developed plasmonic mixing. The absolute value of the efficiency factor continuously increases with frequency. When the last term (the scattering term) in (1) becomes less important relative to the first (time derivative) term, asymptotically approaches the value of 3 [see Fig. 4(b)] for the long-channel

Since FET detectors are coupled to antennas and we refer the responsivity to the power , which would be interacting with an ideal (lossless) and impedance matched antenna, rather than the power , which is delivered to the transistor, we use (25) Here, the factor takes into account the power dissipated in the antennas internal impedance, as well as the power dissipated as heat. The last factor describes the impedance mismatch between the antenna feed-point impedance and the transistor impedance (see [28]). The following prediction for the optical detector responsivity in the unmatched case is reached:

(26)

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Thus far, the device model only includes the channel impedance. For more accurate treatment, additional parasitic effects have to be included. We limit our treatment to an empirical parasitic capacitance by replacing the device impedance with . More details on this effect are discussed later. Finally, the NEP can be derived as (27) For cold MOSFETs (without drain bias), the dominant noise source is thermal Johnson noise, as has been shown for similar devices in [19], and has also been experimentally verified for the LFoundry transistors, which have been used in the experimental part. VI. RESULTS With the expressions given above, we can now quantitatively compare measured data with the results of model calculations. We start with a detector pixel connected to a patch antenna with the resonance at about 583 GHz. The procedure to determine the intensity profile of the terahertz beam at the detection plane has been described elsewhere [29]. It is based on integrating the incoming radiation signal over the whole terahertz beam area by mapping the intensity distribution of the beam via raster scanning of an individual detector pixel, and comparing the resulting integrated signal with the absolute power value measured with a calibrated power meter. Since any responsivity estimate relies on an assumption for the area of the detector, for practical reasons, one often takes the pitch of neighboring antennas of the focal-plane array as detector area. Due to chip size constraints, some pixels have not been arranged in a focal-plane array configuration, for which we use simulated effective areas. In Fig. 5, we present the dependence of the detected current on gate voltage for a low-frequency-modulated terahertz signal (open circles) and an electrically applied 6-MHz signal (solid line), both measured in the small-signal regime. For comparative purposes, the amplitude of the terahertz response has been normalized to the electrical response value at a gate bias voltage of 0.6 V. Note that the responsivities show a near-identical dependence on gate bias because, in both cases, the amplitude of the oscillations was independent from bias conditions. This was the case because both the 50- impedance of the electrical source and the simulated antenna impedance of 236 are much lower than the real part of the detector impedance [see Fig. 4(a)] over the whole bias range. Using (23)–(27), we are then able to estimate a possible NEP in QS and distributed resistive mixing regimes shown in Fig. 5 with the dotted and short dashed lines, correspondingly. Note that because of the two-transistor configuration of the detector, which is shown in Fig. 2, the low-frequency resistance is only half of the channel resistance of a single device. Results indicate that at practical operation point (device impedance controlled by gate bias), the NEP of high-frequency impedance matched detectors can be as low as 2 pW Hz. Similar performance is also expected in detectors based on high mobility transistors [30]. Experimentally determined NEP at the resonance frequency is shown in Fig. 5 with red diamonds (in online version). For this device, its minimum reaches 46 pW Hz. The measured data

Fig. 5. Comparing the gate-bias-dependent detector performance of a single detector device at 6 MHz (lines) and 583 GHz (symbols). In black, the close agreement of the current response in the QS and the terahertz regime is shown. Red diamonds (in online version) represent the measured optical NEP. The red lines (in online version) show the theoretically achievable limit (conjugate impedance matching) in the QS regime (dotted) and distributed-resistive-mixing regime (short dashed), as well as the modeled NEP including impedance mismatch (dashed).

Fig. 6. Optical responsivity of detectors designed for discrete frequencies. Up to 600-GHz detectors have been characterized using electronic sources. Above 595 GHz, we used discrete lines of a CO -pumped molecular gas laser and a pulsed free-electron laser. Crosses show the modeled values. The dashed line indicates simulated roll-off due to parasitic capacitance.

compares well with modeled performance of the unmatched case. The deviation below 0.4 V is due to loading effects. The same pixel on another die, which is used in the characterization below, shows a slightly better minimum NEP of 42 pW Hz. Finally, in Fig. 6, we present voltage responsivity values for otherwise identical detectors, but connected to different patch antennas. For characterizations at 600 GHz and below, we used electronic multiplier-based sources. Detectors at and above 585 GHz have been characterized with continuous-wave radiation from discrete lines of a CO -pumped molecular gas laser. Independently four pixels above 1 THz have been characterized with free electron laser source FELBE at the Helmholtz-Zentrum Dresden-Rossendorf, Dresden, Germany.

BOPPEL et al.: CMOS INTEGRATED ANTENNA-COUPLED FETs

The pulse length was up to few 10 ps, depending on the frequency. In both cases, samples were subjected to a broad Gaussian beam for which the power density was previously determined. Starting from the lower frequency side, performance of resonant detectors strongly increase. Although an ideal patch antenna should perform similarly at this frequency range, the simulations show that the limited conductivity of metal layers result in substantial reduction of both antenna efficiency and impedance. On the higher frequency side, detectors at 0.595, 0.763, 1.4, 1.75, 2.9, and 4.1 THz show optical responsivities of 350, 550, 132, 55, 30, and 4.6 V/W, respectively. The crosses show the modeled values. While there is a good agreement between model and measured data below 1 THz, the performance roll-off is slightly stronger than modeled above 1 THz. The dashed line indicates modeled roll-off limited by the time constant set from an assumed antenna impedance of and parasitic capacitance fF and also taking the increase of mixing efficiency in this frequency range into account. The parasitic capacitance includes the junction, overlap, and fringe capacitance and are considered to be connected in parallel to the transistor channel. By implementing detectors with different channel width at 570 GHz and characterizing the responsivity roll-off with gate width, we estimated a parasitic capacitance of fF. We assumed that the capacitance scale linearly with channel width. We also took into account that thereshold voltage and nonideality change with gate width within our theoretical description used. Despite the somewhat stronger roll-off than indicated, outstanding performance can be achieved as demonstrated by the 2.9-THz result, where a responsivity of 30 V/W and a NEP value of 487pW Hz are reached, respectively. VII. CONCLUSION In conclusion, we have integrated FET-based detectors for operation at discrete frequencies spanning from 0.2 to 4.3 THz using a commercial 0.15- m CMOS process technology. Detectors utilize a novel design in which the signal from the patch antenna is applied between the drain and source terminals. This design enables estimation of detector performance from rectification of electrically applied low-frequency oscillations. We present a unified model based on hydrodynamic transport description to account for rectification efficiency and device impedance over the full range of gate bias and frequencies and apply it for different boundary conditions. The model is supported by experimental results at 6 MHz and 583 GHz and good agreement is achieved between model and measurements. Our results allow estimating the limiting values for room-temperature NEP for detection at 600-GHz radiation of 2 pW Hz for a practical gate bias of 0.7 V. When antenna efficiency and impedance mismatch are taken into account, the derived model is in good agreement at 583 GHz with the measured data. Here, a minimum value of 46 pW Hz is reached. Detectors with scaled antenna designs have been characterized up to 4.3 THz. In particular, detectors at 0.595, 0.763, 1.4, 1.75, 2.9, and 4.1 THz show optical responsivities of 350, 550, 132, 55, 30, and 4.6 V/W, respectively. Accounting for the estimate of total parasitic capacitance and uncertainty in

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matching of antenna resonant frequencies, our results show that the detection concept persists deep into the terahertz gap. The CMOS metal stack also literally leaves room for improvement by relaxing design constraints at higher frequencies. With this in mind, intrinsically fast electronic components seem feasible deep in the terahertz gap, which not only would render possible single color cameras, but also spectroscopic sensors based on frequency-selective antennas tailored for various frequencies. REFERENCES [1] S. Boppel, A. Lisauskas, D. Seliuta, L. Minkevicius, L. Kasalynas, G. Valusis, V. Krozer, and H. G. Roskos, “CMOS integrated antenna-coupled field-effect-transistors for the detection of 0.2 to 4.3 THz,” in 12th IEEE Silicon Monolithic Integr. Circuits RF Syst. Top. Meeting, Santa Clara, CA, 2012, pp. 1–3. [2] A. V. Chaplik, “Absorption and emission of electromagnetic waves by two-dimensional plasmons,” Surface Sci. Rep., vol. 5, no. 7, pp. 289–335, 1985. [3] M. Dyakonov and M. Shur, “Detection, mixing, and frequency multiplication of terahertz radiation by two-dimensional electronic fluid,” IEEE Trans. Electron. Devices, vol. 43, no. 3, pp. 380–387, Mar. 1996. [4] J.-Q. Lu, M. S. Shur, J. L. Hesler, L. Sun, and R. Weikle, “Terahertz detector utilizing two-dimensional electronic fluid,” IEEE Electron Device Lett., vol. 19, no. 10, pp. 373–375, Oct. 1998. [5] S. Nadar, H. Videlier, D. Coquillat, F. Teppe, M. Sakowicz, N. Dyakonova, W. Knap, D. Seliuta, I. Kašalynas, and G. Valušis, “Room temperature imaging at 1.63 and 2.54 THz with field effect transistor detectors,” J. Appl. Phys., vol. 108, 2010, Art. ID 054508. [6] Y. F. Sun, J. D. Sun, Y. Zhou, R. B. Tan, C. H. Zeng, W. Xue, H. Qin, B. S. Zhang, and D. M. Wu, “Room temperature GaN/AlGaN self-mixing terahertz detector enhanced by resonant antennas,” Appl. Phys. Lett., vol. 98, 2011, Art. ID 252103. [7] W. Knap, Y. Deng, S. Rumyantsev, and M. S. Shur, “Resonant detection of subterahertz and terahertz radiation by plasma waves in submicron field-effect transistors,” Appl. Phys. Lett., vol. 81, pp. 4637–4639, 2002. [8] X. G. Peralta, S. J. Allen, M. C. Wanke, N. E. Harff, J. A. Simmons, M. P. Lilly, J. L. Reno, P. J. Burke, and J. P. Eisenstein, “Terahertz photoconductivity and plasmon modes in double-quantum-well fieldeffect transistors,” Appl. Phys. Lett., vol. 81, pp. 1627–1629, 2002. [9] G. C. Dyer, S. Preu, G. R. Aizin, J. Mikalopas, A. D. Grine, J. L. Reno, J. M. Hensley, N. Q. Vinh, A. C. Gossard, M. S. Sherwin, S. J. Allen, and E. A. Shaner, “Enhanced performance of resonant sub-terahertz detection in a plasmonic cavity,” Appl. Phys. Lett., vol. 100, no. 8, 2012, Art. ID 083506. [10] V. V. Popov, G. M. Tsymbalov, D. V. Fateev, and M. S. Shur, “Higherorder plasmon resonances in GaN-based field-effect-transistor arrays,” Int. J. High Speed Electron. Syst., vol. 17, pp. 557–566, 2007. [11] G. C. Dyer, G. R. Aizin, J. L. Reno, E. A. Shaner, and S. J. Allen, “Novel tunable millimeter-wave grating-gated plasmonic detectors,” IEEE J. Sel. Topics Quantum Electron., vol. 17, no. 1, pp. 85–91, Jan. –Feb. 2011. [12] R. Tauk, F. Teppe, S. Boubanga, D. Coquillat, W. Knap, Y. M. Meziani, C. Gallon, F. Boeuf, T. Skotnicki, T. Skotnicki, C. Fenouillet-Beranger, D. K. Maude, S. Rumyantsev, and M. S. Shur, “Plasma wave detection of terahertz radiation by silicon field effects transistors: Responsivity and noise equivalent power,” Appl. Phys. Lett., vol. 89, 2006, Art. ID 253511. [13] W. Knap, V. Kachorovskii, Y. Deng, S. Rumyantsev, J.-Q. Lu, R. Gaska, M. S. Shur, G. Simin, X. Hu, M. A. Khan, C. A. Saylor, and L. C. Brunel, “Nonresonant detection of terahertz radiation in field effect transistors,” J. Appl. Phys., vol. 91, no. 11, pp. 9346–9353, 2002. [14] A. Lisauskas, U. Pfeiffer, E. Öjefors, P. H. Bolívar, D. Glaab, and H. G. Roskos, “Rational design of high-responsivity detectors of terahertz radiation based on distributed self-mixing in silicon field-effect transistors,” J. Appl. Phys., vol. 105, 2009, Art. ID 114511. [15] E. Öjefors, U. R. Pfeiffer, A. Lisauskas, and H. G. Roskos, “A 0.65 THz focal-plane array in a quarter-micron CMOS process technology,” IEEE J. Solid-State Circuits, vol. 44, no. 7, pp. 1968–1976, Jul. 2009. [16] E. Öjefors, N. Baktash, Y. Zhao, R. A. Hadi, H. Sherry, and U. R. Pfeiffer, “Terahertz imaging detectors in a 65-nm CMOS SOI technology,” in IEEE Eur. Solid-State Circuits Conf., Seville, Spain, Sep. 2010, pp. 486–489.

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[17] F. Schuster, D. Coquillat, H. Videlier, M. Sakowicz, F. Teppe, L. Dussopt, B. Giffard, T. Skotnicki, and W. Knap, “Broadband terahertz imaging with highly sensitive silicon CMOS detectors,” Opt. Exp., vol. 19, no. 8, pp. 7827–7827, Apr. 2011. [18] S. Boppel, A. Lisauskas, V. Krozer, and H. G. Roskos, “Performance and performance variations of sub-1 THz detectors fabricated with 0.15- m CMOS foundry process,” Electron. Lett., vol. 47, no. 11, pp. 661–661, 2011. [19] S. Boppel, A. Lisauskas, A. Max, V. Krozer, and H. G. Roskos, “CMOS detector arrays in a virtual 10-kilopixel camera for coherent terahertz real-time imaging,” Opt. Lett., vol. 37, no. 4, pp. 536–536, Feb. 2012. [20] H. Sherry, J. Grzyb, Y. Zhao, R. A. Hadi, A. Cathelin, A. Kaiser, and U. R. Pfeiffer, “A 1 kpixel CMOS camera chip for 25 fps real-time terahertz imaging applications,” in Proc. IEEE Int. Solid-State Circuits Conf. , 2012, pp. 252–254. [21] A. Lisauskas, S. Boppel, M. Saphar, V. Krozer, L. Minkevičius, D. Seliuta, I. Kašalynas, V. Tamošiunas, G. Valušis, and H. G. Roskos, “Detectors for terahertz multi-pixel coherent imaging and demonstration of real-time imaging with a 12 12-pixel CMOS array,” Proc. SPIE, vol. 8496, pp. 84960J–84960J-9, 2012. [22] A. Lisauskas, S. Boppel, J. Matukas, V. Palenskis, L. Minkevicius, G. Valusis, P. Haring-Bolivar, and H. G. Roskos, “Terahertz responsivity and low-frequency noise in biased silicon CMOS detectors,” Appl. Phys. Lett., 2012, submitted for publication. [23] J. D. Sun, Y. F. Sun, D. M. Wu, Y. Cai, H. Qin, and B. S. Zhang, “Highresponsivity, low-noise, room-temperature, self-mixing terahertz detector realized using floating antennas on a GaN-based field-effect transistor,” Appl. Phys. Lett., vol. 100, no. 1, 2012, Art. ID 013506. [24] M. Shur, T. Fjeldly, T. Ytterdal, and K. Lee, “Unified MOSFET model,” Solid State Electron., vol. 35, no. 12, pp. 1795–1802, 1992. [25] M. Abramowitz and I. A. Stegun, Handbook of Mathematical Functions: With Formulas, Graphs, and Mathematical Tables. New York: Dover, 1972. [26] Y. P. Tsivids, Operation and Modeling of the MOS Transistor. New York: McGraw-Hill, 1999. [27] C. Sydlo, O. Cojocari, D. Schönherr, T. Goebel, P. Meissner, and H. L. Hartnagel, “Fast THz detectors based on InGaAs Schottky diodes,” Frequenz, vol. 62, pp. 107–110, 2008. [28] S. J. Orfanidis, Electromagnetic Waves and Antennas. New Brunswick, NJ: Rutgers Univ. Press, 2008. [29] A. Lisauskas, D. Glaab, H. G. Roskos, E. Oejefors, and U. R. Pfeiffer, “Terahertz imaging with Si MOSFET focal-plane arrays,” in Proc. SPIE, San Jose, CA, 2009, Art. ID 72150J. [30] S. Preu, S. Kim, R. Verma, P. G. Burke, M. S. Sherwin, and A. C. Gossard, “An improved model for non-resonant terahertz detection in field-effect transistors,” J. Appl. Phys., vol. 111, no. 2, 2012, Art. ID 024502.

Sebastian Boppel was born in Preetz, Germany, in 1982. He received the Physics degree from the University of Heidelberg, Heidelberg, Germany, in 2008, and is currently working toward the Ph.D. degree in physics at Goethe-Universität Frankfurt, Frankfurt, Germany. He is currently with the Ultrafast Spectroscopy and Terahertz Physics Group, Goethe-Universität Frankfurt, where he is involved in the area of CMOS-transistor-based terahertz detection.

Alvydas Lisauskas received the Diploma degree in physics from Vilnius University, Vilnius, Lithuania, in 1995, and the Ph.D. degree from the Royal Institute of Technology, Stockholm, Sweden, in 2001. From 2001 to 2002, he was a Senior Researcher with the Semiconductor Physics Institute, Vilnius, Lithuania. Since 2002, he has been a member of the Ultrafast Spectroscopy and Terahertz Physics Group, Goethe-Universität Frankfurt, Frankfurt, Germany, where he is involved with fundamental aspects of novel semiconductor devices for terahertz applications.

Martin Mundt was born in Görlitz, Germany, in 1990. He is currently working toward the Bachelor’s degree in physics at Goethe-Universität Frankfurt, Frankfurt, Germany. He is currently with the Ultrafast Spectroscopy and Terahertz Physics GroupGoethe-Universität Frankfurt. His fields of interest include plasma effects and the physics of field-effect transistor (FET) detection.

Dalius Seliuta received the M.S. degree in radio physics and electronics from Vilnius University, Vilnius, Lithuania, in 1991, and the Ph.D. degree in solid-state physics from the Semiconductor Physics Institute, Vilnius, Lithuania, in 1998. Since 2003, he has been a Senior Research Associate with the Center for Physical Sciences and Technology, Vilnius, Lithuania, and since 2004, an Associate Professor with Vilnius Gediminas Technical University, Vilnius, Lithuania. He has coauthored 100 scientific publications. His research interests are quantum semiconductor structures, metamaterial devices, nanoscale terahertz detectors, and carbon nanotube structures.

Linas Minkevičius, photograph and biography not available at time of publication.

Irmantas Kašalynas (M’09) was born in Varėna, Lithuania. He received the B.S. degree in electrical engineering from Vilnius Technical University, Vilnius, Lithuania, in 1995, and the M.S. and Ph.D. degrees in physics from Vilnius University, Vilnius, Lithuania, in 1997, and 2004, respectively. From 2000 to 2004, he was with the Optoelectronics Group, Inhomogeneous Structures Laboratory, Semiconductor Physics Institute, Vilnius, Lithuania, where, since 2006, he has been a Research Associate with the Terahertz Electronics and Terahertz Photonics Group. In 2005, he was a Postdoctoral Fellow with the Terahertz Imaging Group, Faculty of Applied Science, Delft University of Technology, Delft, The Netherlands. His current research interests include compact room-temperature terahertz and subterahertz radiation detectors and sources, passive filters, and plasmon resonance devices.

Gintaras Valušis received the Diploma degree from the Faculty of Physics and Ph.D. degree from Vilnius University, Vilnius, Lithuania, in 1985 and 1992, respectively. From 1995 to 1996, he was a Postdoctoral Researcher with the Institute of Applied Photo Physics, Dresden University of Technology. In 2000, he was an Alexander von Humboldt Fellow with the Physics Institute, J. W. Goethe University, Frankfurt, Germany. He is currently a Deputy Director for development with the Center for Physical Science and Technology, Head of the Terahertz Photonics Laboratory, and Professor with the Semiconductors Physics Department, Physics Faculty, Vilnius University.

BOPPEL et al.: CMOS INTEGRATED ANTENNA-COUPLED FETs

Martin Mittendorff was born in Heilbronn, Germany, in 1979. He studied photonics and image processing and received the Diploma degree from the University of Applied Science, Darmstadt, Germany, in 2010, and is currently working toward the Ph.D. degree at the Helmholtz-Zentrum Dresden-Rossendorf, Dresden, Germany. His current research interests include ultrafast spectroscopy of graphene, especially in magnetic fields. Mr. Mittendorff is a member of the German Physical Society (DPG).

Stephan Winnerl was born in 1970. He received the Diploma degree and Ph.D. degree in physics from the University of Regensburg, Regensburg, Germany, in 1996 and 1999, respectively. For two years, he was a Postdoctoral Member with Forschungszentrum Julich. Since 2002, he has been with the Forschungszentrum Dresden-Rossendorf, Dresden, Germany. His current research interests include ultrafast spectroscopy of semiconductor quantum structures and terahertz research. Dr. Winnerl is a member of the German Physical Society (DPG).

Viktor Krozer (M’91–SM’03) received the Dipl.-Ing. and Dr.-Ing. degrees in electrical engineering from the Technical University of Darmstadt (TU Darmstadt), Darmstadt, Germany, in 1984 and 1991, respectively. In 1991, he became a Senior Scientist with TU Darmstadt, where he was involved with high-temperature microwave devices and circuits and submillimeter-wave electronics. From 1996 to 2002, he was a Professor with the Technical University of Chemnitz, Chemnitz, Germany. From 2002 to 2009, he was a Professor with Electromagnetic Systems, DTU Elektro, Technical University of Denmark, Copenhagen, Denmark, and Head of the Microwave Technology Group. Since 2009, he has been the endowed Oerlikon-Leibniz-Goethe Professor for Terahertz Photonics with Goethe-Universität Frankfurt, Frankfurt, Germany. His research areas include terahertz electronics, monolithic microwave integrated circuits, nonlinear circuit analysis and design, device modeling, and remote sensing instrumentation.

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Hartmut G. Roskos studied physics at the Technical University of Karlsruhe, Karlsruhe, Germany, and the Technical University of Munich, Munich, Germany. He received the Ph.D. degree from the Technical University of Munich, in 1989. His thesis concerned femtosecond spectroscopy in solid-state physics. He received the Habilitation degree from Rheinisch-Westfaelische Technische Hochschule Aachen, Germany. His thesis was entitled “Coherent Phenomena in Solid-State Physics Investigated by Terahertz Spectroscopy.” He is currently a Professor of physics with Goethe-Universität Frankfurt, Frankfurt, Germany, where he heads the Ultrafast Spectroscopy and Terahertz Physics Group. For two-and-a-half years, he was with AT&T Bell Laboratories, Holmdel, NJ, during which time his research was focused on terahertz phenomena. He later started a terahertz research group with the Institute of Semiconductor Electronics, RWTH Aachen. In 1997, he joined Goethe-Universität Frankfurt, as a Full Professor. The central themes of his group’s research are terahertz physics and photonics, terahertz imaging, and the time-resolved optical and terahertz spectroscopy of inorganic semiconductors and organic compounds. In 2005, he spent a sabbatical with the University of California at Santa Barbara, where he was involved with a Bloch-gain terahertz laser. In 2009, OC Oerlikon AG awarded his group a five-year endowed professorship for terahertz photonics. During the winter semester of 2009/2010, he was a Guest Professor with Institute of Laser Engineering, Osaka University, where he performed terahertz spectroscopy on a 1-D organic metal.

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A Unified Theory for -Parameter Uncertainty Evaluation Marco Garelli, Member, IEEE, and Andrea Ferrero, Fellow, IEEE

Abstract—An analytical approach to compute the uncertainty of multiport scattering parameter measurements is presented. First, the various uncertainty causes from the noise to the standard definitions are modeled and characterized, then the uncertainty propagation up to the device-under-test measurement is computed. Experiments confirm the validity of this general approach. Index Terms—Multiport network analyzer, uncertainty, vector network analyzer (VNA) calibration.

I. INTRODUCTION

S

INCE THE early beginning of -parameter measurements, the improvement of calibration techniques has been continuous and substantial, however the problem of vector network analyzer (VNA) residual uncertainty is still lacking of a comprehensive and uniform theory. Several studies approach the problem in particular for two-port VNAs, but a full analytical theory is missing, especially for the multiport network analyzer [1]–[3]. The difficulties in terms of analytical development, as well as the lack of powerful numerical capabilities of past computers, necessitate the use of substantial simplifications, for example, assuming no correlation and same variance for the real and imaginary parts of the -parameters, or more recently, to rely on a heavy numerical approach [4], [5]. Furthermore, even the most updated studies to the authors’ knowledge are all dealing with a specific calibration algorithm and typically only for the two-port VNA [6]–[8]. The complete variance matrix of an -port device-under-test (DUT) contains real numbers, and immediately poses serious computational problems if the uncertainty must be evaluated in real time. For all these reasons, a full analytical approach is welcome rather than a blind Monte Carlo solution that becomes unfeasible as soon as the number of ports increases. In this study, we will consider these uncertainty sources: • measurement noise; • connector (and cable) repeatability; • standard definitions.

Manuscript received April 24, 2012; revised August 30, 2012; accepted September 07, 2012. Date of publication November 15, 2012; date of current version December 13, 2012. M. Garelli is with HFE, High Frequency Engineering Sagl, 6534 San Vittore (GR), Switzerland (e-mail: [email protected]). A. Ferrero is with the Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino, 10129 Turin, Italy (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2221733

Fig. 1. Uncertainty propagation flowchart. Relevant sections and equations of this paper are reported in brackets.

These phenomena interact in a complex way as shown in the flowchart of Fig. 1. For example, the measurement noise occurs during the calibration and the actual DUT measurement, while the standard definition uncertainties affect the estimation of the error coefficients, and only indirectly, that of the DUT. This paper is organized as follows. First, an overview of the multiport VNA error model and calibration equations followed by the derivation of the full DUT -parameters variance matrix as a function of the measurement and error coefficient uncertainties will be presented in Section II. The measurement noise and connector repeatability will be analyzed, modeled, and characterized by a set of specific and simple experiments, as shown in Sections IV and V. In Section VI, a method to compute the uncertainty of a calibration standard due to the standard model definition errors and its connector repeatability will be presented. The uncertainty of the error coefficients will then be computed

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By knowing that the DUT relationships impose error model calibration equation becomes

, the

(5) which is used both during the de-embedding and for the calibration. In the first case, the solution of (5) for is trivial, while during the calibration, to obtain the error coefficients, one must write (5) in scalar form as Fig. 2. Multiport VNA, two-state error model: only two ports, and , in the two possible states are shown.

(6) in Section VII, while Section VIII will give some applications of the theory and some experimental results, and the effects of the various uncertainty elements along with some measurements on different test devices will be highlighted.

A linear system from the whole set of calibration standards measurements is filled up with multiple instances of (6), and it can be written as (7)

II. ERROR MODEL AND DEEMBEDDING The multiport calibration model used in this paper is the twostate hardware model [9], which describes the relationships between the actual and measured waves by separating two distinct hardware states at each port , as in Fig. 2. This is a general model of a -port nonleaky VNA, including the switch terms, and generalizes the well-know ten-term error model of two-port VNAs. For each port, the model equations can be written in form of a transmission matrix as

where

is the vector of error coefficients organized as (8)

while contains the calibration standards’ measurements, and contains the standards’ definitions. Appendix A shows how to build the calibration system in the case of one- or two-port standards. In the following, (5) will be used to compute the uncertainty of the final DUT matrix, while (7) will be used in Section VII to compute the uncertainty of the error coefficients.

(1)

III. DUT UNCERTAINTY The calibration equation (5) can be easily differentiated and the uncertainty term becomes [12]

(2)

(9) being the matrix

. The matrix term

or grouped in a multiport matrix form as (10) (3) (4) where and are diagonal matrices, respectively, containing the and error coefficients, while the and vectors contain the measured quantities and the and vectors contain the incident and reflected waves at the reference planes. This model uses error coefficients, but actually only are independent such that all the coefficients can be scaled to make [9], [10]. In the two-port case, the reduced version of this model was applied as a general solution for all the well-known two-port calibration techniques as thru-reflect-line (TRL), line-reflect-match (LRM), and more [11].

is the contribution due to the error coefficients uncertainties, while the second term

(11) gives the contribution due to the measurement noise during the actual DUT measurement. The two terms are completely independent due to the different uncertainty sources. The variance of each -parameter, as well as the covariance between two -parameters and can be written as (12)

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where (13)

• low-level noise or background noise due to the measurement channel equivalent noise figure; due to the local oscil• high-level noise or jitter noise lator (LO) source phase noise. Each measurement channel ( stands for or ) is modeled as follows:

While the bar indicates an average over the random processes assumed with identical statistical properties [13]. From , the mixed mode parameter uncertainty can be easily obtained as detailed in Appendix B. Note that the above quantities like can be regarded as tensors having elements, and can be better organized as an correlation matrix , where the indexing functions that translates the enuples into the row and column indices are

where is the true value of , which is, in practice, well approx. and are two indeimated by the mean value of pendent complex white Gaussian noise sources, i.e., their real and imaginary parts are uncorrelated with the same variance. The measurement channel variance, from (21), is computed as

Row index

(14)

(22)

Column index

(15)

The idea to characterize the low- and high-level noise contributions is to perform repeated raw measurements in the following two different conditions. 1) A matched load at port , with RF source driving port (isolation measurement); from (21), each measurement gives an equation like

Furthermore, each element is a 2 2 real matrix due to the complex nature of the involved complex-valued quantities, as will be explained in Appendix C. The term in (13) is due to the measurement noise and will be evaluated in Section IV-B, while to compute the term , linked to the error coefficients uncertainty, we write (10) in scalar form as (16) where

is the vector of error coefficients defined in (8) and

(21)

(23) where we have used the mean value as a “true” value . 2) A highly reflective termination, like a short, at port and RF source driving the same port (reflection measurement); each measurement gives equations like (23) (24)

(17)

(18)

The characterization proceeds as follows. First, (23) and (24) are stacked in the system (25)

It follows that (19)

and were deterministic pawhich, if the unknowns rameters, could be solved by matrix inversion; however, in our case, we are focused on the variance matrix of the unknowns, which becomes

where the matrix

(26) (20)

is the variance matrix of the error coefficients. The first contribution , which will be computed in Section VII, depends on the used standards and their interaction given by the calibration procedure. The latter one, , is given by the connector repeatability during the DUT measurement, which perturbs the error box, as explained in Section V-A. IV. UNCERTAINTY DUE TO MEASUREMENT NOISE A. Noise Model and Characterization The measurement noise can be modeled by two independent contributions [14]:

where is the experimental variance matrix of the measurements indexed by (27) and the vectors and

contain the repeated measurements (28) (29)

Furthermore, since the load and short measurements were not taken at the same time, it can be assumed that no correlation is present between the measurement vectors and so that .

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Fig. 3. Low- and high-level noise variances in decibel scale. The VNA is HP8510B with an HP8515A test-set and HP8340B source. RF power is 0 dBm and the averaging factor is 64.

In most VNAs, the measurement channels are pretty balanced, and practically, the low- and high-level noise statistics have negligible differences, as shown in Fig. 3.

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Fig. 4. Repeatability model. (a) State-A configuration. (b) State-B configuration.

independent between different ports. This effect can be modeled by a two-port scattering matrix

(32)

B. Measurement Noise Contribution to Deembedding To obtain the contribution to the DUT uncertainty due to the of (13), let us consider measurement noise, i.e., (11) and note that the error coefficient matrices are diagonal such that each element of the products and reduces like . Furthermore, the matrices and are also diagonal, while has null diagonal elements [9]; these allow us to write , as in (30). Finally, since there is no correlation between measure, if , the variance element ments, i.e., is given by (31), where and are the noise variance of the measurement channels, described above.

(30)

placed between each test port and the corresponding DUT port, as shown in Fig. 4. In (32), and are random variables, which are not completely independent, but are small so that, to the first order, the scattering matrix remains lossless. The effect of the scattering matrix is to slightly distort the waves at the DUT planes, thus the corrected waves and will not properly follow the DUT -matrix. The statistical properties of the two repeatability parameters are generally given by the following three terms: • variance: ; • variance: ; • covariance between and : which should be estimated for each different connector type we have at the VNA ports. Let us organize the random variables as vectors of elements and , which contain the repeatability terms for each port .. .

.. .

(33)

Due to the absence of correlation among the different port repeatability, we obtain three corresponding diagonal variance matrices as (34) (31)

V. CONNECTION REPEATABILITY UNCERTAINTY The connector repeatability effect is due to imperfect connections between each VNA and DUT ports, and it is therefore

These matrices completely describe the uncertainty due to the repeatability effects and they will be used both during the calibration and measurement process. A. Repeatability Affecting the DUT Measurement As already pointed out, the repeatability perturbs the error coefficients variance matrix , which is then used to compute the final DUT uncertainty. The aim of this section is to compute

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the matrix of (20), i.e., the contribution to the error coefficients variance matrix due to the influence of the repeatability term. We proceed by cascading the error box with the repeatability matrix . Let us write as inverted transmission matrix, so to the first order, it becomes (35)

From (1) and (2), we have where

(36)

where

(37)

As done in (8), we organize the perturbed error coefficients as a vectors of elements

where, from (33), (36), and (37), it follows that (38) (39)

vices, we will assume and and limit the following analysis to this case, which reduces the element of the standard’s covariance matrix to

(40)

(45)

(41)

(46)

(42)

(47)

(43) Finally, we obtain the matrix

Fig. 5. Comparison between the error coefficient uncertainty bound (black) (red in online version); the error coeffiand the transmission repeatability cient was obtained by a LRM calibration and APC7 connectors. Peaks above 18 GHz are due to typical resonances affecting 7-mm connectors.

as

Each term has a part that depends on the modeling/machining and ), which will be considered imperfections ( in Section VI, and a part due to the connector repeatability ( and ). In order to compute the latter, we need to join the repeatability matrices that embeds the two-port standard into a 4 4 transmission matrix as (48)

(44) An interesting property of the error model is that all error coefficients can be scaled to make [10]. As will be shown in Section VI, this imposes that the uncertainty of is null; however, in (44), the elements corresponding to of are not null since the repeatability adds an uncertainty contribution to the port 1 error coefficients. This means that is the only error coefficient of which uncertainty is directly and uniquely due to the repeatability effect. The result is shown in Fig. 5, where the frequency plot of magnitude along with its uncertainty is overlapped with the transmission repeatability variance on port 1.

where

is the 2

2 identity matrix and (49)

Recalling that: • is the measurement at the VNA plane; • is the standard definition; from (48), it follows: (50) and

B. Repeatability Affecting a Calibration Standard During the calibration, the repeatability effect is considered as an additional uncertainty of the standard -matrix that is typically computed by an electromagnetic or electrical model. Since two-port standards are used in the vast majority of calibrations, and they are normally symmetrical and reciprocal de-

(51) The uncertainty part is (52)

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In scalar form, this reduces to (53) (54) We now make the assumption that the repeatability will be described by the same statistics on the two ports, i.e., the standard has the same connector type on both ports (55) (56) (57)

(58)

(59)

(60) that, of course, does not imply that or . Finally, since the repeatability effects on the two ports are uncorrelated, i.e., , the covariance formulas of (58)–(60) are obtained. In the case of a matched two-port standards, like “thru” or “line” standards, where , (58)–(60) simplify to

Fig. 6. Repeatability characterization of a 7-mm precision connector. Resonances above 18 GHz are intrinsic of 7-mm connectors. (a) Reflection variance . (b) Transmission variance .

A similar equation is given by the short (65)

(61) (62) (63) Other interesting cases are a one-port load standard , or an ideal open, which has where .

, and

C. Repeatability Characterization The connector repeatability statistical properties can be estimated by repeated calibrated measurements of at least two different one-port devices, one highly reflective (short), and the other one with small reflections (load). Let us consider a generic port and perform measurements of each one-port device where each time we will disconnect and reconnect it. By using (51), the load’s th measurement becomes (64) is the load “true” value, is the corrected measurewhere ment at step , and , are the unknown repeatability terms for port .

which, together with (64), leads to the system (66) that is solved as seen in the case of the measurement noise, using , (26) and computing the experimental data variance matrix as in (27), but in this case, using the following measurement vectors: (67) (68) For example, Fig. 6 shows the results of two repeatability characterizations, one (black trace) made by connecting 20 times a short and a load at port 1 and avoiding any cable movement, the other (red trace in online version) made by a single connection of the load and short, but the cable was moved multiple times for each acquisition. This verifies the well-known experience that the cable effect masks the precision connectors in terms of repeatability, or, by reverse, to obtain very accurate measurements is necessary to firmly hold each component and avoid any cable movement.

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VI. STANDARD DEFINITION UNCERTAINTY In Section V-B, (45)–(47) introduced the standards’ definition uncertainties, and , which are due to perturbations in the standards’ model parameters. A Monte Carlo approach is best suited for their computation for the following reasons. First, the standard response over frequency is an operation not computationally intensive, even if it is done thousands of times, and more important, it is more flexible than any analytical derivation, which is a rather time-consuming approach due to the multitude of electrical models in use today for calibration standards. The uncertainty evaluation using Monte Carlo simulation has proven reliable in evaluating the variance and covariance of multiple output quantities [15]; in our case, the Monte Carlo simulator can compute the variance matrix of one- or two-port standards simply by computing the frequency response several times and then taking the variance, thus, (69) (70) (71) Its implementation is rather straightforward and is omitted in this paper. Due to the limited number of parameters involved in each calibration standard definition, the convergence of the Monte Carlo simulator is rather fast. A reliable uncertainty estimates is obtained with just 200 iterations. The uncertainty magnitude and phase typically vary less than 10% increasing the number of iterations from 200 to 1000. Negligible improvement can be observed by stepping from 1000 to 5000 iterations, while computation time increases from 1 to 5 s on an ordinary computer. As an example, we present an “open” standard, of which an electrical model is shown in Fig. 7(a). It is well known that the standard’s delay value makes the reflection phase change, but it does not affect the magnitude. The Monte Carlo simulator iterates many times (1000 times in this case) and computes the standard’s reflection coefficient real/imaginary variances, as well as their covariance. The phase uncertainty is shown in Fig. 7(b), while Fig. 7(c) shows the reflection coefficent’s uncertainty ellipsoid in the Smith chart at a single frequency (20 GHz). As can be seen, the ellipsoid is tangent to the border of the Smith chart, indicating that only phase variation is present: in fact, the covariance between the real and imaginary parts plays a huge role in setting the standard’s uncertainty properties; for instance, if the covariance would have been omitted, the uncertainty would have been a circle, so an unrealistic magnitude uncertainty would have been added to our open standard.

Fig. 7. “Open” calibration standard uncertainty example. (a) Electrical model. phase and uncertainty. (c) in Smith chart and uncertainty ellipsoid (b) GHz). (

linear system of (7) must first be normalized [10] as to make , with being the first element of

(72) Let us now differentiate the calibration system in (7) as (73) since, from (72), the first element of must be

is known, its error vector

(74) which brings (73) to the form (75)

VII. ERROR COEFFICIENT UNCERTAINTY To end the uncertainty derivation, we need to compute the variance matrix of (20), i.e., the uncertainty on the error coefficients due to the calibration process. In order to accomplish the calibration, as already pointed out, the homogenous

with being a full column-rank matrix containing all the columns of , but the first one, such that its generalized inverse matrix can be computed, which, in turn, leads to (76)

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where the variance matrices and are functions of the standard measurements, definitions, and repeatability, as defined in (83) and (84), and they are the topics of Sections VII-A and VII-B

(83) (84) A. Standard Measurement Noise Contribution Fig. 8. Confidence bounds of the error coefficients and in a TRL calibration using APC7 connectors. The line standard is approximately 4 cm in response is plotted on the red trace (in online length and the real part of its version).

Since the measurement noise is uncorrelated between mea, we note that surement channels, to compute if and only if and , thus each variance term of (83) becomes diagonal and is computed as

Finally, we can compute the error coefficient variance matrix as

(85) (86) (87)

(77)

(88)

where (78) Fig. 8 shows an interesting property of (77); if the condidegrades, the associated error coeffitioning of the matrix cient uncertainties increase. This effect is best shown with a TRL calibration [16] using a line standard outside its frequency range such that its phase difference with respect to the “thru” standard approaches 0° or 180°. At such critical frequencies, the error coefficients computation becomes inaccurate and the computed uncertainty explodes, as is shown in Fig. 8. We will now derive a suitable expression for ; let us write the error coefficient vector as (79) where (80) if follows from (76) that

where the measurement noise variance elements are defined in (22). B. Standard Definition and Repeatability Contribution The error coefficients variance matrix in (84), due to uncertainty in the standards’ definition and repeatability, has fewer terms than , but unfortunately, the elements in may have strong correlations between them. In order to simplify the treatment, we note that , i.e., the vector of the corrected incident waves during the standard’s measurement. Since is block-diagonal, the correlation matrix will be computed in blocks, each block will be identified by the standard’s measurement index. In general, if the same calibration standard has been used at measurements and , the correlation matrix will have nonzero terms corresponding to the blocks and . In Sections VII-B.1 and VII-B.2, we will derive these block correlation sub-matrices corresponding for one- and two-port standards. 1) One-Port Standard: In this simple case, the standard is defined by its reflection coefficient and the full standard variance , as defined in (45), the respective correlation matrix block is if the same standard at otherwise.

(81) and the covariance matrix

becomes (82)

and (89)

2) Two-Port Standard: We will suppose that the standard is connected at ports and the standard is connected at ports . We will identify the wave as the -wave at port with an RF drive to port .

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Thus, the two uncertainty contributions are written as

(90)

(91)

has four sub-blocks, each one and the correlation matrix is 2 2, and it is null if the standards and are different (92) The four terms are similar and the unique difference is the RF drive so we write the elements of the generalized sub-block , where and in (93)–(96) as follows:

(93)

(94)

(95)

(96) VIII. EXAMPLES We performed a comparison between two-port (LRM) and line-short-match (LSM) calibrations [10]. The two calibrations differ only in the measurement of the reflect standard, which is partially unknown in the first case, and it must be measured at both ports, but it is fully known in the latter calibration, and is therefore measured only at one port (in our case, port 1). In order to avoid any repeatability error during the comparison, we measured the standards for the LRM calibration, and used the saved measurements while computing the LSM calibration. In this way, since the reflection standard used was a well-defined APC7 short, we obtained two sets of error coefficients with negligible difference on their values, but the respective uncertainties were not exactly the same, and the greatest difference was found in the error coefficient , which corresponds to the port

Fig. 9. Comparison between the error coefficient calibration kit was a precision 7-mm kit.

from LRM and LSM. The

2 source match. Fig. 9 shows that the uncertainty is generally greater with the LSM calibration, which was as expected since LSM has no reflection connection at port 2. In another example, we measured a differential line, as shown in Fig. 10, where the most significant differential parameters along with their uncertainties are shown. The same measurement has been processed twice, first with both the error coefficients and measurement noise uncertainty contributions [see Fig. 10(a)], and then with just the measurement noise contribution [see Fig. 10(b)]. As shown in the figures, enabling individual uncertainty terms help to identify the main uncertainty source, which, in this case, is due to the calibration standards uncertainties that reflect in a huge contribution to the error coefficients uncertainties. Finally, a more complex example is shown, where an eightport antenna combiner with coaxial (type K, female) connectors was measured by an Anritsu eight-port VNA using the complex calibration scheme of Fig. 11(a), which includes a short-openload reciprocal (SOLR) calibration among two of the eight ports and a set of thru connections to the remaining ports [17]. The first four of the 64 -parameters are shown in Fig. 11(b), where the reciprocity condition is well verified being and the corresponding within the uncertainty limits. Fig. 11(c) analyzes in more detail the uncertainty contributions for a single transmission path . It is shown that the uncertainty due to the measurement noise is compatible with the tiny trace ripple observed in the measurements. Similar results apply as well for the other transmission parameters. IX. CONCLUSION The analytical computation of the uncertainty for -parameter multiport measurements was presented. The approach used in this study separately treats the different error sources in order to rigorously evaluate their individual impacts on the final measurement. Some experiments were shown to highlight the various informations the application of the theory provides apart from the covariance matrix of the -parameters, for example, • calibration comparison; • tracking of the most important cause of uncertainty;

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Fig. 10. Four-port differential line measurement with its uncertainties. (a) Complete uncertainty. (b) Measurement noise only.

• mixed-mode -parameter uncertainty; • impact of the standard uncertanty on the final results. These characteristics give to the presented theory a general approach never presented before to the authors’ knowledge, and that could be applied to many different fields from quality assurance of production testing to model validation for research and development.

APPENDIX A FILLING UP THE MULTIPORT CALIBRATION SYSTEM Let us assume to have standards, the calibration coefficient matrix of (7) will become

.. .

.. .

(97)

where each standard provides a set of rows in given by and . A one-port standard measured at a port provides a single line so becomes (99), and reduces to the standard reflection coefficient .

Fig. 11. More complex example with an eight-port combiner measurements. (a) Calibration scheme with a combination of SOLR and thru chain. (b) Four significant -parameters where the reciprocity condition is well verified and within the uncertainty bound. (c) Detail of one transmission path between ports parameter is shown, with different uncertainty contributions 2 and 6. The enabled (blue trace (in online version): nominal value, red trace (in online version): measurement noise only, black trace: all contributions). Coverage factor . is

Our hardware model implies that each port can toggle between two states, so during the calibration, a two-port standard connected to ports and can be measured in the following two configurations [9]. • Case AA: The standard’s ports are connected to two ports in state A; in this case, the VNA can provide two reflectometers and gives four equations to the calibration system.

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• Case AB: the standard is connected to one port in state A while the other port is in state B; the VNA can provide only one full reflectometer plus one transmission measurement channel. This solution correspond to two measurements (the reflection and trasmission one), but once the source is reversed, the other two measurements are obtained, thus a total of four equations can be defined. In total, the matrix will contain eight rows, as shown in (100) at the bottom of this page. The corresponding matrix is formed by the 2 2 standard’s matrix, as shown in (98)–(100) at the bottom of this page.

APPENDIX B MIXED-MODE PARAMETERS The uncertainty of a generalized mixed-mode scattering matrix is derived from its respective single-ended variance matrix of (12). The generalized mixed-mode scattering matrix is defined as [18] (101) and are known full matrices, uncerwhere tainty free, and are given by [18, eq. (32)]. The differential of (101) is computed as (102)

The variance and covariance terms of the mixed-mode -parameters can be computed as (105)

APPENDIX C VARIANCE MATRICES OF COMPLEX QUANTITIES Most quantities used in this study are complex numbers as ; thus, the complex quantity error term is made of a real and an imaginary component like . However, for the sake of brevity, this study uses mostly complex notation, hiding the dual nature of their uncertainties. The “variance” of the complex number , which has been written as , is not equal to , as one could expect, but it is a 2 2 real matrix as

(106) and, since variance matrices of real quantities must be symmetrical, it follows that . It can be demonstrated that, if a complex number affected by uncertainty is multiplied by a complex constant , the resulting complex number has the following variance matrix: (107)

and the error propagation takes a rather simple form (103)

is the variance matrix of defined by (106) and where the matrix representation of the complex number [19]

is

(108)

which, in scalar form, becomes (104)

Please note that and are real-valued matrices of size 2 2, but here they are not represented in boldface letters to dis-

(98) (99)

(100)

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tinguish them from complex-valued matrices used in this study. In a similar way, every time in this study we wrote a variance product like , it must be translated in matrix form as (109) with

being the covariance matrix between

and , (110)

More details on how to use the covariance matrix of a complex number to plot its uncertainty are given in [20] and [21]. ACKNOWLEDGMENT The authors are indebted to V. Teppati, M. Pirola, B. Grossman, E. Fledell, S. Chow, A. Carullo, S. Corbellini, and N. Ridler for the precious discussions and useful suggestions regarding the development of this paper and related software. REFERENCES [1] U. Stumper, “Uncertainties of VNA -parameter measurements applying the tan self-calibration method,” IEEE Trans. Instrum. Meas., vol. 56, no. 2, pp. 597–600, Apr. 2007. [2] J. Martens, D. Judge, and J. Bigelow, “Uncertainties associated with many-port ( 4) -parameter measurements using a four-port vector network analyzer,” IEEE Trans. Microw. Theory Techn., vol. MTT-52, no. 5, pp. 1361–1368, May 2004. [3] F. Sanpietro, A. Ferrero, U. Pisani, and L. Brunetti, “Accuracy of a multiport network analyzer,” IEEE Trans. Instrum. Meas., vol. 44, no. 2, pp. 304–307, Apr. 1995. [4] “Guidelines on the evaluation of vector network analysers,” EURAMET, Braunschweig, Germany, Mar. 2011. [Online]. Available: www.euramet.org [5] M. Wollensack, “VNA tools II: -parameter uncertainty calculation,” in 35th ANAMET Meeting, Oct. 2011, pp. 1–4. [6] U. Stumper, “Uncertainty of VNA -parameter measurement due to nonideal TRL calibration items,” IEEE Trans. Instrum. Meas., vol. 54, no. 2, pp. 676–679, Apr. 2005. [7] D. Williams and C. Wang, “An optimal multiline trl calibration algorithm,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2003, pp. 1819–1822. [8] A. Lewandowski, D. Williams, P. Hale, C. M. Wang, and A. Dienstfrey, “Covariance-matrix-based vector-network-analyzer uncertainty analysis for time-and frequency-domain measurements,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 7, pp. 1877–1886, Jul. 2010. [9] A. Ferrero, V. Teppati, M. Garelli, and A. Neri, “A novel calibration algorithm for a special class of multiport vector network analyzers,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 3, pp. 693–699, Mar. 2008.

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[10] H. Eul and B. Schieck, “A generalized theory and new calibration procedures for network analyzer self-calibration,” IEEE Trans. Microw. Theory Techn., vol. 39, no. 4, pp. 724–731, Apr. 1991. [11] K. Silvonen, “A general approach to network analyzer calibration,” IEEE Trans. Microw. Theory Techn., vol. 40, no. 4, pp. 754–759, Apr. 1992. [12] A. Ferrero, M. Garelli, B. Grossman, S. Choon, and V. Teppati, “Uncertainty in multiport -parameters measurements,” in ARFTG Microw. Meas. Conf., Jun. 2011, pp. 1–4. [13] H. Haus and R. B. Adler, Circuit Theory of Linear Noisy Networks. Cambridge, MA: MIT Technol. Press, 1959. [14] B. Donecker, Determining the Measurement Accuracy of the HP8510 Microwave Network Analyzer. Santa Rosa, CA: Hewlett-Packard, 1985. [15] J. Randa, “Noise-parameter uncertainties: A Monte Carlo simulation,” J. Res. NIST, vol. 107, pp. 431–444, Sep. 2002. [16] R. Marks, “A multiline method of network analyzer calibration,” IEEE Trans. Microw. Theory Techn., vol. 39, no. 7, pp. 1205–1215, Jul. 1991. [17] A. Ferrero, F. Sampietro, and U. Pisani, “Multiport vector network analyzer calibration: A general formulation,” IEEE Trans. Microw. Theory Techn., vol. 42, no. 12, pp. 2455–2461, Dec. 1994. [18] A. Ferrero and M. Pirola, “Generalized mixed-mode -parameters,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 1, pp. 458–463, Jan. 2006. [19] B. D. Hall, “Calculating measurement uncertainty for complex-valued quantities,” Meas. Sci. Technol., vol. 14, pp. 368–375, Feb. 2003. [20] N. Ridler and M. J. Salter, “A generalised approach to the propagation of uncertainty in complex -parameter measurements,” in 64th ARFTG Microw. Meas. Conf., Dec. 2004, pp. 1–14. [21] Guide to the Expression of Uncertainty in Measurement. Geneva, Switzerland: ISO Press, 1993. Marco Garelli (S’04–M’10) was born in Cuneo, Italy, in 1981. He received the Electronic Engineering degree and Ph.D. degree in metrology from the Politecnico di Torino, Turin, Italy, in 2005 and 2008, respectively. In 2008 and 2009, he was an Independent Consultant. In 2010, he joined HFE, High Frequency Engineering Sagl, San Vittore (GR), Switzerland, as Chief Technical Officer. His main interests are in the area of RF and microwave measurement techniques, calibrations, and large-signal and noise parameter measurements.

Andrea Ferrero (S’87–M’92–F’11) was born in Novara, Italy, on November 7, 1962. He received the Electronic Engineering degree and Ph.D. degree in electronics from the Politecnico di Torino, Turin, Italy, in 1987 and 1992, respectively. In 1988, he joined the Aeritalia Company, as a Microwave Consultant. In 1991, he was with the Microwave Technology Division, Hewlett-Packard, Santa Rosa, CA, as a Summer Student. In 1995, he was with the Department of Electrical Engineering, Ecole Polytechnique de Montréal, Montréal, QC, Canada, as a Guest Researcher. In 1998 and 2006, he became an Associate Professor and a Full Professor in electronic measurements, respectively, with the Dipartimento di Elettronica, Politecnico di Torino. His main research activities are in the area of microwave measurement techniques, calibration, and modeling. Dr. Ferrero is an IEEE Microwave Theory and Techniques Society (IEEE MTT-S) Distinguished Microwave Lecturer (2010–2012). He was the recipient of the 2006 ARFTG Technology Award for the development and implementation of VNA calibration algorithms and nonlinear measurement techniques.

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An Ultra-Thin, High-Power, and Multilayer Organic Antenna Array With T/R Functionality in the -Band Carlos A. Donado Morcillo, Member, IEEE, Chad E. Patterson, Member, IEEE, Benjamin Lacroix, Christopher Coen, Student Member, IEEE, Chung H. J. Poh, Member, IEEE, John D. Cressler, Fellow, IEEE, and John Papapolymerou, Fellow, IEEE

Abstract—The transmit–receive (T/R) operation of an ultra-thin organic antenna array is presented at a center frequency of 9.5 GHz. High transmit power is achieved while maintaining an ultra-low profile in a novel system-on-a-package scheme whereby 32 silicon–germanium (SiGe), transmit/receive integrated-circuit (TRIC) modules have been flip-chip bonded to the array board. Each SiGe TRIC drives a pair of slot-coupled microstrip patch antennas that form an 8 8 rectangular array, which is all packaged in an organic substrate stack of liquid crystal polymer and RT/Duroid 5880LZ. The organic package occupies an area of 30.5 cm 25.4 cm and has a total thickness of only 1.80 mm. The small-signal characterization of the array showed a dB, and a measured receive gain of 20.1 dB with a variation of 0.7 dB over a 1-GHz bandwidth (BW). Finally, far-field large-signal experiments showed a measured effective isotropically radiated power of 47.1 dBm with a variation of 2.36 dB over the same BW, and without the aid of additional thermal management components. Index Terms—Microstrip antenna, organic materials, planar arrays, radar antennas, silicon germanium.

I. INTRODUCTION

R

ECENT developments in antenna arrays [1]–[8] have demonstrated the use of organic substrates as a suitable solution for system-on-a-package (SoP) wireless front ends. Features such as low cost, light weight, and flexibility make organic substrates an attractive option for creating slim microwave systems that can be conformed to the skin of unmanned ground or aerial vehicles. In addition to their flexibility, organic substrates, such as Rogers ULTRALAM 3850 liquid crystal polymer (LCP) (with , and ) [9], can provide a near-hermetic package that is thermally matched to copper and that is suitable for embedding RF integrated circuits (ICs), as demonstrated in [10] and [11]. Moreover, the broadband low-loss characteristics [12] and the large-panel lamination of LCP, along with other organic materials such as RT/Duroid 5880LZ (alternatively referred to in this paper as the “Duroid”

Manuscript received March 29, 2012; revised August 18, 2012; accepted August 22, 2012. Date of publication October 09, 2012; date of current version December 13, 2012. This work was supported by the National Aeuronatics and Space Administration (NASA) under Grant NNX08AN22G. The authors are with the School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0250 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2218119

substrate, with , and ) [9], have allowed the implementation of multichip antenna arrays on a single board [1], [13]. With regard to the maximization of the effective isotropically radiated power (EIRP), current organic SoP efforts are focused on: 1) developing active-circuit technologies with a high output power that 2) can be packaged as close as possible to the radiating elements of the array. Here, we define EIRP as the power radiated by the array system in the maximum gain direction of the main beam dBm

(1)

where is the input power at the RF feed of the transmitis the antenna system, is the antenna directivity, and efficiency of the antenna beam-former network (BFN). In spite of their high-performance characteristics, organic substrates face major packaging challenges when the target of an organic array is to maximize EIRP. From an RF IC perspective, high-power amplifiers (HPAs) generally operate at high temperatures and require proper thermal management. Depending on the RF IC technology chosen, thermal management will, in most cases, consist of a thick and bulky metallic heat sink or ventilation system, which inevitably imposes constraints on the package real estate, and hence, on the level of integration of the array. From a substrate perspective, organic materials are poor thermal conductors, which limits the amount of heat dissipated by the substrate. Altogether, these packaging challenges must be resolved to implement high-power RF front ends that can take advantage of the lightweight and flexibility of organic substrates. In this context, several SoP approaches are found in the available literature to implement transmit functionality in organic antenna arrays. For instance, a membrane phased array is demonstrated at 1.26 GHz [2], where eight gallium–arsenide (GaAs) ICs are mounted on a Pyralux AP substrate with a 50- m thickness. Another approach is undertaken in [3] where high-power unit cells are tiled to form an array at 3.3 GHz using gallium–nitride (GaN) ICs packaged on the organic substrate Rogers 4350B. While a high EIRP (44 dBm) per unit cell is demonstrated in this study, no multicell array operation is shown, and the thick package has a high profile because of the required thermal-management components. System-on-a-chip (SoC) active arrays have also been successfully demonstrated [4], [14] using silicon–germanium (SiGe) chips as a low-cost alternative to conventional active IC technologies. The array in [4] has a high EIRP of 40 dBm in a

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Fig. 1. Simplified schematic diagram of the proposed antenna array.

package that is compact because of the short wavelength of the 58.32–64.8-GHz band. The SiGe active circuitry is integrated on a BGA package that hosts 16 radiating elements and has a footprint size of 2.8 cm 2.8 cm. This study focuses on the development of a lightweight antenna array for snow and ice survey applications [15], which demand a high output power to increase the range of the radar measurements. The array (simplified schematic shown in Fig. 1) was designed at a center frequency of 9.5 GHz with a bandwidth (BW) greater than 1.0 GHz, and implemented on a stack of organic substrates LCP and RT/Duroid 5880LZ. Bulk-size reduction is achieved by distributing the RF power over a thin and wide-area package with low power-consumption SiGe amplifiers that reduce the need for thermal management. In addition, a high EIRP of 47.1 dBm is achieved by flip-chip bonding the SiGe transmit/receive integrated circuits (TRICs) in close proximity to the radiating elements. To the best of the authors’ knowledge, this study reports the highest EIRP using the thinnest organic package in the -band (Section IV), with the largest number of flip-chip bonded SiGe TRICs in an organic package. This paper is organized as follows. Section II will introduce the reader to the design and modeling of the antenna board, including the BFN design and the SiGe TRIC technology. Section III presents the organic antenna board fabrication along with the flip-chip bonding process of the SiGe TRICs. Section IV covers the small- and large-signal characterization of the active antenna board, concluding with a benchmark comparison to similar active arrays. II. ARRAY DESIGN In contrast to previous generations of this array technology [1], [13], [16], [17], significant packaging innovations on the BFN side have allowed a higher level of integration and an ultra-low profile in the proposed array. In this regard, one key achievement has been the successful deployment of a multilayer stripline BFN over a large antenna panel, following the lamination scheme introduced in small scale by the authors in [18]. Since a degradation in the inter-layer alignment accuracy is expected for larger panel sizes (especially for organic substrates

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such as LCP), the design of a BFN scheme with a performance that is immune to fabrication misalignments is crucial to the operation of the array. A multilayer fabrication was necessary in this study because the RF signal needed to be confined into the substrate stack so that the performance of the system would not be affected at crossing points with the digital/dc lines, which run mostly across the top metallization layer of this stack. By allowing the multilayer overlap of RF and digital/dc signals on the same package, the total number of external connectors in this board is reduced to only two: one SMA connector for the RF feed and one digital/dc 9-pin connector, which contains all the necessary lines to operate the 32 SiGe TRICs. We can summarize the general operation of the array by following the schematic in Fig. 1. The RF feed section of the array includes an end-fire SMA connector that is directly connected to a multilayer coplanar waveguide (CPW)-to-stripline transition, which feeds the stripline section of the BFN. The design and characterization of this multilayer CPW-to-stripline transition have been thoroughly discussed in [18]. The stripline section then branches out to 32 paths distributing the RF signal to each SiGe TRIC, which allow the toggled transmit (Tx) and receive (Rx) operation. The interconnection to the SiGe TRICs is achieved through single-layer stripline-to-CPW transitions. Finally, each SiGe TRIC is in turn coupled to a pair of microstrip patch antennas via embedded microstrip lines and slot apertures in the ground plane (Fig. 2). A. Substrate Stack Details The cross-section diagram in Fig. 2 shows the detailed anatomy of the substrate stack and the conceptual distribution of the RF components for one of the 32 active RF paths in the array. This substrate stack architecture was briefly introduced by the authors in [18], and is described in detail below within the context of this application. Following Fig. 2, the stack has a total thickness of 1.80 mm (including the height of the SiGe TRICs) and contains the following three major regions. • Digital/dc region, which is implemented on an LCP core laminate (LCP Core 1) with top (M1) and bottom (M2) copper metallization. M1 contains the TRICs’ digital/dc lines, and the section of the RF feed that connects the BFN to the input SMA connector. M2 contains the top groundplane pattern of the stripline BFN. • BFN region, which is implemented using two LCP core laminates (LCP Core 2 and LCP Core 3), bonded altogether and to the digital/dc region through LCP bond-ply laminates. The LCP Core 3 has a copper metallization on its top (M3) and bottom (M4) faces. M3 contains all the stripline and embedded microstrip components of the BFN, along with the pads on which the SiGe TRICs are mounted. M4 is the bottom ground plane of the RF lines of the array BFN, and has the slot apertures that couple the embedded microstrip lines to the microstrip patch antennas. M4 is also the ground plane of the microstrip patch antennas on the Duroid substrate. • Antenna region, which is implemented on an RT/Duroid 5880LZ core laminate that is bonded to the bottom ground plane of the BFN region with a Taconic fastRise27 prepreg

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Fig. 2. Cross-section view of the array substrate stack showing the conceptual distribution of components for a single RF path from the RF feed to the patch antennas (the thickness of the metallization and substrate layers are shown in parentheses). Excluding the RF feed, 32 of these paths form the 8 8 array.

Fig. 3. Multilayer top view of the stripline 3-dB splitter.

laminate ( , and ) [19]. The 64 microstrip patch antennas are patterned on the copper metallization layer M5, which is at the bottom face of the Duroid substrate. B. Stripline BFN As shown in Fig. 1, the majority of the BFN components of the proposed array are implemented using stripline transmission lines. Via fences are deployed along the stripline network to prevent the excitation of higher order modes and the coupling of electromagnetic radiation onto digital/dc lines. The via fences were designed according to the geometries introduced by the authors in [18], which follow the guidelines presented in [20] and [21]. Extending the results from [18], here we introduce the design and simulated performance of key elements in the BFN, namely, the 3-dB power splitter, the eight-way power splitter, and the single-layer stripline-to-CPW transitions for TRIC interconnection. The basic building block of the corporate BFN is the stripline 3-dB splitter (Fig. 3), which provides an impedance match to 50 looking into the BFN. Quarter-wavelength transformers were used at the junction to present two parallel 100- impedances from Ports 2 and 3, which reduce to a 50- load at Port 1. The length and width of the adapters are obtained initially with [22] and then optimized with [23]. The ability of the via fences to provide the proper confinement of the RF signal in the BFN was also investigated. For this purpose, an eight-way splitter (Fig. 4) was developed using [24], based on the 3-dB splitter geometry proposed above. The

Fig. 4. Electromagnetic model of the stripline eight-way splitter and distribu. tion of

results of a quick time-domain simulation confirm that proper RF-signal confinement is attained by showing that the squared magnitude of the intensity of the electric field ( , plotted in Fig. 4) reaches a level of 90 dB at the fence edges with respect to the maximum , which occurs along the stripline signal conductor as expected. Fig. 5 shows that an match lower than 20 dB is achieved across the band of interest. Including conductor and dielectric losses, the total insertion loss of a single branch is found from simulation at 4.52 dB, which along with the 9.03 dB from the power splits add up to the simulated value of dB (with ). Finally, to provide interconnectivity to the SiGe TRICs, a stripline-to-CPW transition was developed. The proposed multilayer packaging scheme requires that each SiGe TRIC is housed in a recessed cavity that goes through LCP Core 1 and LCP Core 2, to access the RF signal conductor in M3. Hence, a 3-D electromagnetic model was developed in [23] and is shown in Fig. 6. The only criteria in the design of this final transition was to provide a CPW section that is compatible with the pitch of the pins of the SiGe TRIC (250 m) and that can provide ground interconnectivity for the TRIC. The designed 50- CPW line has a signal width of 210 m and a gap width of 217 m. Additionally, a short taper with a length of 100 m is provided to compensate for the width change in the signal conductor at the

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Fig. 5. Simulated -parameters of the stripline eight-way splitter.

Fig. 8. TRIC: (a) block diagram and (b) circuit-layout photograph. Fig. 6. Electromagnetic model of the stripline-to-CPW transition (Duroid substrate not shown).

Fig. 7. Simulated -parameters of the stripline-to-CPW transition.

interconnection with the stripline. The simulated response is shown in Fig. 7.

-parameter

C. SiGe TRIC Technology and Packaged Performance In comparison to the case presented by the authors in [1], where the T/R module consisted of three separate chips (plus required dc lumped-element components), the present study introduces a single-chip custom-made T/R module to meet the array real-estate requirements. The chip includes a three-bit phase shifter (PS), a low-noise amplifier (LNA), a power amplifier (PA), and two complementary metal oxide (CMOS) switches for full T/R operation [see Fig. 8(a) and (b)]. Input and output matching is also performed on die.

With a compact T/R module, the distance between the radiating elements and the TRIC can be minimized and the EIRP can be maximized. Although devices such as microelectromechanical system (MEMS) switches or RF circulators would reduce the loss between the radiating elements and the TRIC, the space and interconnection requirements would translate into an impractical assembly process in the proposed scheme. The TRICs were fabricated at an external facility using the same SiGe technology as in [1]. Since the TRICs were designed to be flip-chip bonded to the antenna board, controlled-collapse chip connection solder bumps (C4 bumps) [25] were placed on all input/output pads during fabrication. The chip occupies a space of 2.13 mm 3.7 mm 0.25 mm, and the spherical C4 bumps have an approximated diameter of 100 m. The LNA, digital control, and PS sections require a bias voltage of 3.5 V and the PA section, 5.0 V. The maximum dc power consumption of the TRIC is 400 mW in the Tx mode. As on-die testing of the SiGe TRICs was not possible because of the C4 bumps, a number of chips were mounted on individual packages that resembled packaging conditions of the antenna. Fig. 9 shows an -parameter comparison between the measured -parameters of a single flip-chip bonded TRIC and the measured -parameters from four flip-chip bonded TRICs with epoxy underfill. In these plots, the measurements with epoxy underfill material are represented by the average -parameters from the four chips, calculated according to [26]. The measurements included a thru-reflect-line calibration [27] to de-embed the measurement-fixture transitions and lines up to the plane of the C4 bumps. From the -parameter

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Fig. 10. Average NF over frequency, extracted from measurements of five singly packaged SiGe TRICs with epoxy underfill.

Fig. 11. Output power and gain linearity measurements of a singly packaged TRIC with epoxy underfill in Tx mode.

Fig. 9. Measured -parameters of singly packaged TRICs in Tx and Rx mode with and without epoxy underfill.

measurements of the epoxy-under-filled samples at 9.5 GHz, in Rx mode, we observed an average of 6.56 dB with a chip-to-chip variation from 6.41 to 6.73 dB, and in Tx mode, an average of 1.01 dB with a variation from 1.36 to 0.50 dB. We also see in Fig. 9 the effect of the epoxy underfill on the return loss of the TRICs, slightly improving the return loss on the RF-feed side, and degrading it on the radiating-elements side. More importantly, we observe that there is an increase in insertion loss of about 0.5 dB in the Rx mode and 1.1 dB in the Tx mode with respect to measurements of the TRIC without epoxy underfill. This is due to the interaction of the epoxy underfill with the on-die circuit of the TRIC. Noise figure (NF), TRIC output power , and gain compression measurements were also performed on five singly packaged TRICs with epoxy underfill. The average Rx-mode NF is shown in Fig. 10 over frequency. In the Tx mode, gain compression and TRIC measurements are shown in Fig. 11 per input-power level. We observe in the Rx mode an average dB from 9.0 to 10.0 GHz with a chip-to-chip variation from 4.97 to 5.87 dB. Finally, we see that in the Tx

mode, at 9.5 GHz, the average TRIC variation from 9.67 to 11.5 dBm.

dBm, with a

D. Microstrip Patch Antennas Since the proposed active array has a large and intricate design, the total BFN simulation has been broken into individual components up to this point, ensuring that the 50- match criteria is met at the RF-feed side. Simulations have included 50terminations deployed at the end of each of the 32 branches, with each termination corresponding to the matched SiGe TRICs. Moving toward the antenna side, we proceed now to explain the design steps to obtain the desired array behavior. The separation between the radiating elements (microstrip patch antennas) was determined using the procedure from [13] to achieve a similar hypothetical phased-array performance.1 The radiating-element spacing is then determined from the center of each patch antenna at 2.3 and 2.7 cm in the - and -directions, respectively. For this 8 8 array, the theoretical 3-dB beamwidth is estimated at 9.2 7.5 . The feed geometry and dimensions of the microstrip patch antennas were optimized using [28], with the target of minimizing the at the RF feed plane across the desired BW. As done in [13], a baseline simulation was performed by replacing 1As the beam-steering capability of a similar package has been already characterized for Tx and Rx modes in [1], this study focuses mainly on the powerhandling capabilities of SiGe circuitry in an organic array package.

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Fig. 12. Multilayer top view of the feed layout for a pair of patch antennas.

the TRICs with 50- thru lines until an acceptable tained. Optimized dimensions are shown in Fig. 12.

was ob-

III. ARRAY FABRICATION PROCESS Vertically integrated antenna arrays, in particular, arrays of slot-coupled microstrip-patch antennas, are versatile structures in the sense that distinct substrates can be used for the radiating elements and for the BFN, which allows the optimization of the antenna response while reducing the size of BFN components. As introduced in [29] and successfully demonstrated in [1], [16], and [17], the higher dielectric constant and thin lamination of LCP allows the reduction of the size of RF transmission lines and transitions on the BFN side, while the lower dielectric constant and thick-lamination capacity of the Duroid substrate permit to attain a higher antenna BW and a better radiation efficiency [29]. Although in theory the two-substrate approach for vertically integrated antennas may seem like an optimal solution, major drawbacks were found during the practical implementation of this concept using distinct organic substrates. With different dielectric constants, the thermal-expansion coefficient mismatch between the substrates will cause an undesired tangential stress during heating and cooling cycles in post-lamination processing, which results in severe board warping of thin substrate stacks. The stress may weaken solder joints in flip-chip bonded components if proper preemptive measures are not implemented. Besides thermal issues during fabrication, the substrate stack must provide enough mechanical robustness to support the flipchip bonded components. In this context, flip-chip bonded approaches such as the one proposed in [10] did not prove suitable for our application, as the thin dielectric and the silver epoxy solder joints would not keep the ICs securely bonded to the larger package. Therefore, we introduce below the key manufacturing and assembly steps that allowed the implementation of the proposed array. A. Antenna Board Lamination The antenna board lamination process started by etching the metallization patterns on the LCP Cores (Fig. 2). Prior to lamination, a thin electroless nickel immersion gold (ENIG) coating was applied to M3 and M5 to prevent oxidation on the metal layers exposed to the environment, and to improve the reliability of the solder joints of the SiGe TRICs. After the LCP Cores were patterned, these were pressed together at 285 C using the two

Fig. 13. Top view of the TRIC zone with photographs of the recessed cavity (upper right) and the mounted TRIC with epoxy underfill (lower right).

LCP bond-ply laminates forming altogether the BFN and digital/dc regions shown in Fig. 2. Subsequently, the bonded LCP regions were pressed together with the Duroid substrate using the fastRise27 prepreg laminate. An LCP bond ply is not used in this step because it would require a 285 C process that would cause the bond ply laminates used in the BFN region to melt again, and hence, deteriorate the alignment of the LCP Cores. The fastRise27 prepreg laminate has a lower melting temperature, and being considerably thinner (50 m) than the Duroid substrate (1.27 mm), has little effect on the antenna performance. After board lamination, laser via-hole perforations were done in the LCP layers and then copper plated to provide the necessary BFN region interconnections. Finally, an ENIG finish was applied to the M1 metallization. The TRIC recessed cavities were then laser milled onto the BFN region. As conventional laser perforations in organic substrates are either hollow through cuts or are cuts terminated in a solid metal sheet, terminating a recessed cavity in a metallization pattern with multiple traces is a remarkable organicpackaging achievement. Using an industrial-level setup, cavities such as the one shown in Fig. 13 were successfully milled with a high yield and optimal repeatability. B. TRIC Flip-Chip Bonding Procedure Throughout the entire flip-chip bonding process, the antenna board was mechanically fixed to a flat and thin plate, which has a low thermal expansion coefficient that prevents board warping during heating stages. With a reliable mechanical support, thin solder-paste drops were manually applied to the metallization pads within the recessed cavities, corresponding to the location of the TRICs’ C4 bumps. An automated chip-placement machine was then used to position the 32 TRICs on the board with an accuracy of 25 m. The process involved automatically grabbing each TRIC, dipping the C4 bumps on thin solder paste and placing the TRICs on the recessed cavities. Afterwards, the board was placed on an X-ray imaging system to verify the proper placement of the

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Fig. 15. Measured and simulated Rx modes.

of the proposed antenna array in Tx and

Fig. 14. Fabricated antenna array board and anechoic chamber setup.

TRICs, and then ran through a reflow oven to provide solid solder joints through the solder paste. The last part of the bonding procedure involved applying high-performance epoxy underfill underneath each TRIC to securely lock them to the antenna board. The antenna board was placed on a hot plate at 80 C, and the epoxy underfill was applied manually using a liquid dispenser. Lastly, the board was kept in an oven at 150 C for 60 min to bring the epoxy underfill to a solid state. The finalized antenna board is shown in Fig. 14. IV. ARRAY PERFORMANCE A. Small-Signal Measurements Using the measured -parameters of the packaged TRIC, we set up a simulation in [30] including all the simulated -parameters from the individual BFN components and input RF transition 3-D models, and compared them to actual measurements of the fabricated array in Tx and Rx mode (Fig. 15). We see that the measurements show roughly the same shape and a larger return loss than in simulation, which occurs because the reflected signal is attenuated by the extra loss of the input network, not accounted for by the simulator. Near-field radiation-pattern measurements in he Tx and Rx modes were performed in an automated anechoic chamber using a waveguide probe, executing a 360 scan in the azimuth direction and a 60 in the elevation direction. The isotropic gain of the antenna was determined then by comparing it to a similar scan performed over a standard horn antenna. The near-field measurements were post-processed using [31], and considering the efficiency of the BFN, the far-field gain radiation patterns were obtained in Tx and Rx modes (Fig. 16). The measured broadside Rx gain is 20.1 dBi, and Tx gain, 14.6 dBi at 9.5 GHz.

Fig. 16. Estimated far-field radiation pattern based on near-field measurements in the azimuthal direction.

Given that a large number of on-board dc and RF interconnects motivated the usage of stripline as the fundamental RF line scheme in the BFN, it is necessary to assess its impact on the efficiency of the antenna array. We can start our analysis by looking at the measured T/R gain over frequency and comparing it to measurements performed on the 8 8 organic array presented in [1] (Fig. 17). The gain curves in Fig. 17 correspond to the maximum broadside far-field gain at each frequency point measured in the anechoic chamber setup. In effect, we see that, for the array proposed in this study, there is a drop in the gain

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Fig. 18. Schematic diagram of EIRP measurement Configuration A and Configuration B. Fig. 17. Measured Tx and Rx broadside gain over frequency and comparison with the T/R phased array presented in [1]. TABLE I ARRAY EFFICIENCY COMPARISON OF EFFICIENCY DROP BETWEEN PROPOSED ARRAY AND THE T/R ARRAY PRESENTED IN [1]

THE

in Rx mode of about 7.42 dB, and in Tx mode, of 3.54 dB at 9.5 GHz with respect to the array in [1]. Further scrutiny lead us to investigate the loss in the transmission lines and active circuits that feed the radiating elements (i.e., the patch antennas) of both arrays. Table I presents a differential comparison of both boards in Tx and Rx modes. We see that the estimated difference in the gain of the Rx path between both prototypes is 6.66 dB, which is in good agreement with the measured Rx efficiency drop of 7.42 dB. Similarly, the estimated gain difference of the Tx path is about 4.16 dB, which matches closely with the measured Tx efficiency drop of 3.54 dB. The estimated quantities in this analysis are validated from previous characterization measurements [18], where the stripline attenuation was measured at 0.26 dB/cm, in contrast to the embedded microstrip and microstrip lines, measured at 0.16 dB/cm and predominantly used in [1]. Besides the stripline BFN, other sources of loss in the proposed array include a longer feed network, a larger number of transitions, deployment of epoxy underfill, and the integration of a CMOS switch in the radiating-element side of the TRIC. It is important to observe that, despite the drop in small-signal gain, the high level of integration of the TRICs and the stripline BFN did allow the incorporation of a large number of TRICs on the antenna board only a few centimeters away from the radiating elements. This strategic technology change caused a significant improvement in the EIRP, as we will see next.

B. Large-Signal Measurements To verify the large-signal performance of the proposed array ) (henceforth, the antenna under test (AUT) with Tx gain and to measure its EIRP, three point-to-point links were set up using two additional reference antennas as follows. • Configuration A: Reference horn antenna 1 (RHA1, with gain ) in the Rx end and AUT in the Tx end. • Configuration B: Reference horn antenna 2 (RHA2, with gain ) in the Rx end and AUT in the Tx end. • Configuration C: RHA2 in the Rx end and RHA1 in the Tx end. The purpose of this experiment, illustrated in Fig. 18, is to build a system of three link-budget equations with the gains of each antenna as the unknowns dB

(2)

dB

(3)

dB

(4)

where (with ) for each measurement configuration. Here, is the Rx power measured by the spectrum analyzer; is the Rx cable loss; and is the free-space loss of the point-to-point link. The system is then solved at different frequency points and levels of input power on the Tx end. The measurements were performed outdoors, and RF absorbers were deployed in strategic positions to minimize reflections that could introduce systematic errors to the measurements. A distance of 7.95 m was left between the Tx and Rx antennas, which is well above the far-field distance of the AUT.2 In addition, the phase center of all the antennas was kept within a height of 1.5 m from the floor level. Environmental conditions were also monitored on the Tx side vicinity with temperatures ranging from 13 C to 16 C and relative humidity, from 49% to 55%. On the Tx side, a signal generator was used in conjunction with an HPA to provide the necessary at different frequencies. Considering the BFN loss and the power splits, a theoretical dBm is necessary at the RF-feed plane to drive all TRIC PAs into compression in the Tx mode. On the Rx side, 2With an AUT maximum dimension of cm at GHz, where is the speed of light in vacuum, the estimated far-field distance m.

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Fig. 19. Measured EIRP with Configuration A and Configuration B for various . values of

Fig. 20. Measured EIRP over frequency using Configuration A for dBm.

C. Estimation of the reference horn antennas were connected to an Agilent PXA spectrum analyzer through a coaxial cable (Rx cable). Prior to the outdoor tests, laboratory measurements were carried out to characterize each component of the Tx and Rx back-ends. The output power of the Tx back end (signal generator HPA RF cables) was characterized by connecting it directly to the spectrum analyzer, and measuring all levels for the test frequencies and signal generator output-power levels. Likewise, the Rx cable was characterized through -parameter measurements with a network analyzer. A sweep was performed from 0.0 to 37.3 dBm at 9.5 GHz, over 15 measurement points. Solutions to the link-budget system of equations showed an average RHA1 gain of 16.57 dBi with a standard deviation of 0.08 dBi—nominal gain declared by the manufacturer of (16.5 0.75) dBi; and an average RHA2 gain of 12.91 dBi with a standard deviation of 0.14 dBi—nominal gain declared by the manufacturer from 13.0 to 13.5 dBi from 9.0 to 10.0 GHz. The AUT Tx gain was found at 14.45 dBi (compared to the anechoic chamber measurements at 14.6 dBi) for low levels of , compressing all the way to 9.7 dBi for a dBm. Having found the gains of each antenna for each power level, the maximum EIRP emitted by the proposed array can be determined from (2) and (3) as follows: (5) where is the gain of the reference horn antenna for a given configuration. Calculations show that EIRP saturates at maximum values of 46.9 and 47.1 dBm, using Configuration A and Configuration B, respectively. Fig. 19 summarizes the EIRP measurements from Configuration A and Configuration B at 9.5 GHz, compared with the ideal EIRP curve that assumes an AUT small-signal gain of 14.45 dBi for all levels. A similar treatment was applied to measurements carried out over frequency to find out the EIRP at each frequency point (Fig. 20). To investigate the behavior of the array in high-Tx power over frequency, a measurement scan was carried out with Configuration A over ten measurement points from 9 to 10 GHz with dBm. Fig. 20 shows the results of this test where an average EIRP of 46.7 dBm is observed with a standard deviation of 0.8 dB over this frequency band.

The NF of the array in Rx mode is calculated through the following equation from [32]: (6) represents the loss of the transmission line between where the radiating elements and the SiGe TRIC (i.e., the loss of the embedded microstrip line); and , the NF and gain of the TRIC in Rx mode, respectively; and , the loss between the RF feed and the TRIC (stripline BFN and CPW-to-stripline transition). All quantities are positive real scalars greater than one (no decibel quantities must be used). The antenna figure-of-merit is then calculated using the following expression, also from [32]: (7) (the system temperature) is assumed to be equal to where (the temperature at which the antenna is pointed at) and equal to the room temperature of 290 K. With dB, dB, dB, and dB, the NF of the array in Rx mode is estimated at 7.99 dB. Hence, with a measured array directivity of 25.98 dB, we obtain a figure-of-merit dB. D. Comparison With Other Studies Including the proposed array, Table II shows the state-ofthe-art of antenna arrays implemented in organic packages, comparing several performance parameters. Some of the key parameters to notice are the Rx gain, the maximum EIRP attained, the dc power consumption, and the total package thickness. In this last parameter, the antenna-board thickness considers only the height of the package including the components in the T/R module, but excluding antenna-board input/output connectors. Some of the quantities in Table II are estimated based on the observation of the photographs of the devices presented in the references, as the authors did not give enough information to fill in the table. Since the fabrication of active Tx antenna arrays using organic substrates is a relatively new topic, and as most of the literature available covers Tx- or Rx-only arrays, it

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TABLE II STATE-OF-THE-ART IN ORGANIC ANTENNA ARRAYS

was challenging to choose meaningful benchmark parameters to compare different devices. On the Tx side, we see that this study presents the thinnest package and achieves the highest EIRP in the -band. On the Rx side, although the estimated of this study is competitive in comparison to other studies, better performance in the Rx mode could be attained by reducing the loss of the BFN. Calculations show that by replacing 10 cm of stripline by embedded microstrip, the insertion loss of the BFN can be decreased by 3 dB, which would, in turn, result in a 1.1-dB increase in . V. CONCLUSIONS For the first time and to the best of our knowledge, this paper has reported on the highest EIRP achieved in an ultrathin organic antenna array in the -band. The packaging architecture and design of the BFN were thoroughly discussed, providing valuable insights on the design steps required to achieve the innovative packaging scheme. The packaging innovations allowed the integration of 32 SiGe T/R modules onto an antenna board that occupies a volume of 0.18 cm 30.5 cm 25.4 cm. Moreover, small-signal near-field measurements showed an Rx gain of 20.1 dB at 9.5 GHz with a variation of 0.5 dB across a 1-GHz BW. Additional far-field measurements demonstrated a maximum EIRP of 47.1 dBm at 9.5 GHz with a standard deviation of 0.8 dB over a 1-GHz BW. This study has also illustrated the performance tradeoffs required for a high level of integration and the achievement of a low-profile ultra-thin organic package. For instance, we showed that although a stripline BFN decreases the efficiency when compared to microstrip for a similar package, a stripline BFN is necessary to minimize RF signal coupling to digital/dc lines in

this densely populated antenna board. The stripline BFN also allows the deployment of multiple TRICs a few centimeters away from the radiating elements of the array. Finally, the results presented in this study can be applied to future efforts in organic antenna arrays, whereby multiple T/R modules are embedded in large antenna boards. ACKNOWLEDGMENT The authors would like to thank Dr. T. Heath, B. Wilson, B. Hudson, and Dr. R. Bales, all with the Georgia Tech Research Institute, Atlanta, for their contributions in the development of this project. LCP and Duroid materials were supplied by the Rogers Corporation, Rogers, CT. REFERENCES [1] C. D. Morcillo, C. Patterson, T. Thrivikraman, B. Lacroix, B. Wilson, B. Hudson, C. Coen, C. Poh, T. Heath, J. Cressler, and J. Papapolymerou, “A lightweight, 64-element, organic phased array with integrated transmit–receive SiGe circuitry in the band,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2011, pp. 1–4. [2] A. Moussessian, L. Del Castillo, J. Huang, G. Sadowy, J. Hoffman, P. Smith, T. Hatake, C. Derksen, B. Lopez, and E. Caro, “An active membrane phased array radar,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2005, p. 4. [3] A. Wegener, C. Fulton, J. Gregory, and W. Chappell, “Large area integration of embedded high power RF amplifiers in a thin organic panel high power RF amplifiers in a thin organic panel,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2009, pp. 801–804. [4] A. Valdes-Garcia, S. Nicolson, J.-W. Lai, A. Natarajan, P.-Y. Chen, S. Reynolds, J.-H. C. Zhan, D. Kam, D. Liu, and B. Floyd, “A fully integrated 16-element phased-array transmitter in SiGe BiCMOS for 60-GHz communications,” IEEE J Solid-State Circuits, vol. 45, no. 12, pp. 2757–2773, Dec. 2010.

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[5] Y. A. Atesal, B. Cetinoneri, K.-J. Koh, and G. M. Rebeiz, -band 8-element phased arrays based on single silicon “ chips,” in IEEE MTT-S Int. Microw. Symp. Dig., 2010, pp. 1258–1261. [6] T. Kamgaing, E. Davies-Venn, and K. Radhakrishnan, “A compact 802.11 a/b/g/n WLAN front-end module using passives embedded in a flip-chip BGA organic package substrate,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2009, pp. 213–216. [7] K.-J. Koh and G. Rebeiz, “An - and -band 8-element phasedarray receiver in 0.18-SiGe BiCMOS technology,” IEEE J. Solid-State Circuits, vol. 43, no. 6, pp. 1360–1371, Jun. 2008. [8] M. Borgarino, A. Polemi, and A. Mazzanti, “Low-cost integrated microwave radiometer front-end for industrial applications,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 12, pp. 3011–3018, Dec. 2009. [9] “Product Catalog” Rogers Corporation, Rogers, CT, Aug. 2012. [Online]. Available: http://www.rogerscorp.com/products/ [10] C. E. Patterson, T. K. Thrivikraman, S. K. Bhattacharya, C. T. Coen, J. D. Cressler, and J. Papapolymerou, “Development of a multilayer organic packaging technique for a fully embedded T/R module,” in 41st Eur. Microw. Conf., Oct. 2011, pp. 261–264. [11] D. G. Kam, D. Liu, A. Natarajan, S. Reynolds, and B. Floyd, “Organic packages with embedded phased-array antennas for 60-GHz wireless chipsets,” IEEE Trans. Compon., Packag., Manuf. Technol., vol. 1, no. 11, pp. 1806–1814, Nov. 2011. [12] D. Thompson, O. Tantot, H. Jallageas, G. Ponchak, M. Tentzeris, and J. Papapolymerou, “Characterization of liquid crystal polymer (LCP) material and transmission lines on LCP substrates from 30 to 110 GHz,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 4, pp. 1343–1352, Apr. 2004. [13] C. Patterson, T. Thrivikraman, A. Yepes, S. Begley, S. Bhattacharya, J. Cressler, and J. Papapolymerou, “A lightweight organic -band active receiving phased array with integrated SiGe amplifiers and phase shifters,” IEEE Trans. Antennas Propag., vol. 59, no. 1, pp. 100–109, Jan. 2011. [14] M. Jahn, R. Feger, C. Wagner, Z. Tong, and A. Stelzer, “A four-channel 94-GHz SiGe-based digital beamforming FMCW radar,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 3, pp. 861–869, Mar. 2012. [15] J. Paden, D. Braaten, and P. Gogineni, “Beneath the ice sheets,” IEEE Spectr., vol. 48, no. 9, pp. 36–42, Sep. 2011. [16] C. Patterson, A. Yepes, T. Thrivikraman, S. Bhattacharya, J. Cressler, and J. Papapolymerou, “A lightweight -band organic antenna array with integrated SiGe amplifier,” in IEEE Radio Wireless Symp. , Jan. 2010, pp. 84–87. [17] C. Patterson, T. Thrivikraman, A. Yepes, S. Bhattacharya, J. Cressler, and J. Papapolymerou, “Implementation of a low cost, lightweight -band antenna with integrated SiGe RF electronics,” in IEEE Int. Geosci. Remote Sens. Symp., Jul. 2010, pp. 681–684. [18] C. D. Morcillo, C. Patterson, and J. Papapolymerou, “Design of stripline beam-former network components for low-profile, organic band,” in IEEE Radio Wireless Symp., Jan. phased arrays in the 2012, pp. 179–182. [19] “Material Catalog” Taconic , Petersburgh, NY, Aug. 2012. [Online]. Available: http://www.taconic-add.com/en-products-fastrise-1.php [20] G. Ponchak, D. Chun, J.-G. Yook, and L. Katehi, “The use of metal filled via holes for improving isolation in LTCC RF and wireless multichip packages,” IEEE Trans. Adv. Pack., vol. 23, no. 1, pp. 88–99, Feb. 2000. [21] K. Wu, D. Deslandes, and Y. Cassivi, “The substrate integrated circuits—A new concept for high-frequency electronics and optoelectronics,” in 6th Int. Telecommun. in Modern Satellite, Cable, Broadcasting Service Conf., Oct. 2003, vol. 1, pp. P-III–P-X, vol.1. [22] Momentum, Advanced Design System. ver. 2009, Agilent Technol., Santa Clara, CA, 2009. [23] High Frequency Structure Simulator (HFSS). ver. 13, Ansys Inc., Canonsburg, PA, 2011.. [24] Microwave Studio, CST Studio Suite. Comput. Simulation Technol., Framingham, MA, 2010. [25] W. D. Brown and R. K. Ulrich, Advanced Electronic Packaging, 2nd ed. Hoboken, NJ: Wiley, 2006, pp. 61, 101. [26] N. M. Ridler and M. J. Salter, “Evaluating and expressing uncertainty in complex -parameter measurements,” in 56th ARFTG Fall Conf. Dig., Nov. 2000, vol. 38, pp. 1–13. [27] R. Marks, “A multiline method of network analyzer calibration,” IEEE Trans. Microw. Theory Techn., vol. 39, no. 7, pp. 1205–1215, Jul. 1991.

[28] Linecalc, Advanced Design System. Agilent Technol., Santa Clara, CA, 2009. [29] D. Pozar, “Rigorous closed-form expressions for the surface wave loss of printed antennas,” Electron. Lett., vol. 26, no. 13, pp. 954–956, Jun. 1990. [30] Schematic Simulator, Advanced Design System. Agilent Technol., Santa Clara, CA, 2009. [31] NSI. Near-Field Syst. Inc., Torrence, CA, 2000. [32] J. Lee, “G/T and noise figure of active array antennas,” IEEE Trans. Antennas Propag., vol. 41, no. 2, pp. 241–244, Feb. 1993.

Carlos A. Donado Morcillo (S’99–M’04) was born in Panama City, Panama. He received the B.S. degree in electronic engineering from the Universidad Catolica Santa Maria la Antigua, Panama City, Panama, in 2002, the Master of Science degree in electrical and computer engineering from the Georgia Institute of Technology, Atlanta, in 2008, and is currently working toward the Ph.D. degree at the Georgia Institute of Technology. From 2002 to 2006, he was with the National Metrology Centre of Panama (CENAMEP), as the Time and Frequency Laboratory Coordinator. Since 2007, he has been with the Microwave Circuit Technology Group, Georgia Institute of Technology. His research focuses on lightweight radar front-end technologies, microwave filter design, thermal modeling of RF circuits, and broadband characterization of novel RF materials. Mr. Donado Morcillo is a reviewer for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. He was the recipient of a 2006 Fulbright Scholarship. He was also the recipient of the Best Student Paper Award of the 2012 IEEE Radio and Wireless Symposium, Santa Clara, CA.

Chad E. Patterson (S’09–M’11) received the B.S. and M.S. degrees in electrical engineering from the Georgia Institute of Technology, Atlanta, in 2006 and 2008, respectively, and is currently working toward the Ph.D. degree at the Georgia Institute of Technology. He is currently a member of the Microwave Circuit Technology (MircTech) Group, Georgia Institute of Technology. His research is focused on the design, fabrication, and characterization of microwave/millimeter-wave passive components and packaging solutions for next-generation communication and radar antennas. Prior to joining the MircTech team, he was an Intern with the Army Research Laboratory, Adelphi, MD, where he was involved with high-frequency antenna design and automated antenna measurement systems. Mr. Patterson was the recipient of the 2012 IEEE Antennas and Propagation Society (AP-S) Harold A. Wheeler Applications Prize Paper Award.

Benjamin Lacroix received the Ph.D. degree in electrical engineering from the University of Limoges, Limoges, France, in 2008. Since 2008, he has been a Post-Doctoral Fellow with the Georgia Institute of Technology, Atlanta. He has developed fast miniature RF MEMS switched capacitors and high-speed reconfigurable low-loss distributed MEMS transmission lines (DMTL) PSs. He has authored or coauthored over 20 publications in peer-reviewed journals and conferences. His current research is focused on reconfigurable microwave filters based on ferroelectric thin-film capacitors. He is also involved in the development of lightweight phased arrays, characterization of next-generation materials, and other microwave and millimeter-wave components. Dr. Lacroix is a reviewer for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES.

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Christopher Coen (S’09) received the B.S. and M.S. degrees in electrical engineering from the Georgia Institute of Technology, Atlanta, in 2009 and 2012, respectively, and is currently working toward the Ph.D. degree at the Georgia Institute of Technology. Since 2008, he has been a member of the SiGe Devices and Circuits Group, Georgia Institute of Technology. His primary research interests include investigating relevant device physics and developing integrated SiGe microwave circuits for space-based radars and radiometers. Mr. Coen was the recipient of the inaugural National Aeronautics and Space Administration (NASA) Space Technology Research Fellowship in 2011.

Chung H. J. Poh (S’08–M’11) received the B.Eng. (Hons) degree in electrical and electronic engineering from Nanyang Technological University, Singapore, in 2005, and the M.S.E.C.E. and Ph.D. degrees in electrical and computer engineering from the Georgia Institute of Technology, Atlanta, in 2009 and 2011, respectively. From 2005 to 2007, he was a Member of Technical Staff with DSO National Laboratories, Singapore, where he is currently a Senior Member of Technical Staff involved in communication and radar system design. His research interests include microwave circuits, and systems for communication and radar applications, SiGe HBT BiCMOS RF front-ends, and packaging of ICs. Dr. Poh was the recipient of the Singapore Defence Technology Prize (R&D Team Award) in 2010.

John D. Cressler (S’86–A’91–SM’91–F’01) received the Ph.D. degree from Columbia University, New York, NY, in 1990. From 1984 to 1992, he was with IBM Research. From 1992 to 2002, he was on the faculty of Auburn University. Since 2002, he has been on the faculty of the Georgia Institute of Technology, where he is currently the Ken Byers Professor of Electrical and Computer Engineering. He and his team have authored or coauthored over 500 papers. He coauthored Silicon-Germanium Heterojunction Bipolar Transistors (Artech House, 2003), authored Reinventing Teenagers: The Gentle Art of Instilling Character in Our Young People (Xlibris, 2004), edited Silicon Heterostructure Handbook: Materials, Fabrication, Devices, Circuits, and Applications of SiGe and Si Strained-Layer Epitaxy (CRC, 2006), authored Silicon Earth: Introduction to the Microelectronics and Nanotechnology Revolution (CRC, 2009), and coedited Extreme Environment Electronics (CRC, 2012). During his academic career, he has graduated 38 Ph.D. students and 36 M.S. students. His research interests include Si-based (SiGe/strained-Si) heterostructure devices and technology, mixed-signal circuits built from these devices, radiation effects, cryogenic electronics, device-to-circuit interactions, noise and reliability physics, device-level simulation, and compact circuit modeling. Dr. Cressler has been an associate editor for the IEEE JOURNAL OF SOLIDSTATE CIRCUITS, the IEEE TRANSACTIONS ON NUCLEAR SCIENCE, and the IEEE TRANSACTIONS ON ELECTRON DEVICES, for which he is currently the editor-inchief. He has been active on numerous IEEE conference program committees, including as the Technical Program chair of the 1998 ISSCC, the 2007 NSREC, and the 2011 BCTM. He has been the recipient of a number of awards for both his teaching and research.

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John Papapolymerou (S’90–M’99–SM’04–F’11) received the B.S.E.E. degree from the National Technical University of Athens, Athens, Greece, in 1993, and the M.S.E.E. and Ph.D. degrees from The University of Michigan at Ann Arbor, in 1994 and 1999, respectively. From 1999 to 2001, he was an Assistant Professor with the Department of Electrical and Computer Engineering, University of Arizona, Tucson. During the summers of 2000 and 2003, he was a Visiting Professor with the University of Limoges, Limoges, France. From 2001 to 2005 and 2005 to 2009, he was an Assistant Professor and Associate Professor, respectively, with the School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, where he is currently a Professor. He has authored or coauthored over 300 publications in peer-reviewed journals and conferences. He is an Associate Editor for The International Journal of Microwave and Wireless Technologies. His research interests include the implementation of micromachining techniques and MEMS devices in microwave, millimeter-wave and terahertz circuits and the development of both passive and active planar circuits on semiconductor (Si/SiGe, GaAs) and organic substrates [LCP, low-temperature co-fired ceramic (LTCC)] for SoC/SoP RF front ends. Dr. Papapolymerou is currently an associate editor for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. From 2009 to 2011, he was chair of Commission D, U.S. National Committee, URSI. He was the associate editor for IEEE MICROWAVE AND WIRELESS COMPONENT LETTERS (2004–2007) and the IEEE TRANSACTIONS ON ANTENNAS AND PROPAGATION (2004–2010). During 2004, he was the chair of the IEEE Microwave Theory and Techniques (MTT)/Antennas and Propagation (AP) Atlanta Chapter. He was the recipient of the 2012 IEEE Antennas and Propagation Society (AP-S) H. A. Wheeler Prize Paper Award, the 2010 IEEE AP-S John Kraus Antenna Award, the 2009 IEEE Microwave Theory and Techniques-Society (MTT-S) Outstanding Young Engineer Award, the 2009 School of Electrical and Computer Engineering Outstanding Junior Faculty Award, the 2004 Army Research Office (ARO) Young Investigator Award, the 2002 National Science Foundation (NSF) CAREER Award, the Best Paper Award of the 3rd IEEE International Conference on Microwave and Millimeter-Wave Technology (ICMMT2002), Beijing, China, and the 1997 Outstanding Graduate Student Instructional Assistant Award presented by the American Society for Engineering Education (ASEE), The University of Michigan Chapter. His students have also been recipients of several awards, including the Best Student Paper Award presented at the 2004 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, the 2007 IEEE MTT-S Graduate Fellowship, and the 2007/2008 and 2008/2009 IEEE MTT-S Undergraduate Scholarship/Fellowship.

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Sensitivity of a Passive Correlation Interferometer to an Angularly Moving Source Jeffrey A. Nanzer, Member, IEEE

Abstract—A derivation of the sensitivity and signal-to-noise ratio of a passive correlation interferometer viewing a radiating point source moving angularly in the plane of the antennas is presented. A new method of measuring the angular velocity of moving objects using a correlation interferometer has recently been developed, and in order to evaluate the detection capabilities of such a sensor, the sensitivity to a fast angularly moving source must be known; such an analysis has not previously been published. It is shown that the spectral sensitivity of the interferometer is dependent on the angular velocity of the source: objects with faster angular velocities result in lower spectral sensitivities. Furthermore, the spectral response does not, in general, extend to dc. The total signal power is constant, however, and when integrated over the response bandwidth, the total sensitivity is independent of the angular velocity and reduces to the theoretical sensitivity of a correlation interferometer viewing a stationary source. The derivation thus proves that the interferometer sensitivity in angular velocity measurements can thus be calculated using the conventional definition of the sensitivity of a correlation interferometer. Index Terms—Correlation interferometer, correlation radiometer, human presence detection, microwave motion detection, object detection.

I. INTRODUCTION

T

HE correlation interferometer has found use in numerous remote sensing applications, including radio astronomy, satellite remote sensing, security sensing, and angular velocity measurement. The passive interferometer, also called a correlation radiometer, consists of two receivers and measures the radiation intensity and the coherence of the radiation incident on the antennas. At microwave and millimeter-wave frequencies, the thermal power measured by the antennas is directly proportional to the temperature of the object [1], and thus can be used to measure the temperature profile of an astronomical object [2]–[4], the surface of the Earth [5], [6], or objects concealed beneath clothing [7], [8]. An interferometer can also be used to detect the presence of a human in a cluttered environment through the human’s temperature and radiation coherence profile [9], [10], and recently the interferometer beam pattern has been utilized to measure the angular velocity of a moving object [11], [12].

Manuscript received May 03, 2012; revised August 24, 2012; accepted August 28, 2012. Date of publication October 04, 2012; date of current version December 13, 2012. The author is with the Applied Physics Laboratory, The Johns Hopkins University, Laurel, MD 20723 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2217982

The temperature resolution of a radiometer is referred to as the temperature sensitivity, and defines the minimum temperature difference that the receiver can reliably detect. The sensitivity has been characterized for a correlation interferometer viewing a static scene [13]; however, in security settings and detection applications, the static-scene assumption is generally not valid. A moving source induces an oscillation on the output signal that represents the interference of the wavefronts as the geometric time delay of reception changes between the two antennas [11]. The oscillation frequency is proportional to the angular velocity of the object and may be used for detection, and potentially, classification of angularly moving objects. In derivations of the sensitivity for radio astronomy applications, the signal oscillation was assumed to be at zero frequency, either due to a nonmoving source, or due to a technique called fringe stopping [3] where the oscillation frequency is artificially reduced to zero by introducing a variable time delay in one receiver channel, which exactly offsets the geometric time delay. In [5], the sensitivity was derived in general for an imaging interferometer without fringe stopping; however, fast angular movement of the source was not considered. This paper presents a derivation of the signal-to-noise ratio (SNR) and the sensitivity of a passive correlation interferometer viewing a radiating point source moving angularly in the plane of the antennas, in the context of close-range security sensing. It is shown that, despite significant differences in the measurement setup, the conventional theory of the sensitivity of a correlation interferometer can be applied in the interferometric measurement of the angular velocity of moving objects. This important result simplifies the analysis of such systems, as established theory can therefore be leveraged. Previously, the author presented the basic theoretical response of an interferometer viewing an angularly moving point source and experimental data of an angularly moving human [11]. A more detailed analysis of the response of a scanning interferometer viewing a stationary source was presented in [14]. In this paper, it is shown that the spectral sensitivity of the interferometer is dependent on the angular velocity of the moving source: lower angular velocities result in narrower response bandwidths with higher spectral sensitivity while higher angular velocities result in wider response bandwidths and lower spectral sensitivity. The sensitivity integrated over the response bandwidth is, however, equal to that derived in previous research when the source has zero angular velocity. Thus, when considering the total signal and noise within the response bandwidth, the sensitivity is independent of the angular velocity. Furthermore, it is shown that when the angular velocity approaches zero, the signal spectra reduces to that

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receivers, disregarding noise contributions, can then be given by (2) (3)

Fig. 1. Two-element correlation interferometer detecting an angularly moving point source.

derived in previous studies where the angular velocity is zero, which can thus be considered to be a special case of the results presented herein. Measurement of the angular velocity depends on the relative motion between the interferometer and the source, not the absolute angular motion of either. It matters not whether one of the two is stationary; one or both could be moving angularly. In [11], the interferometer was stationary while the source moved in angle; in [14], the source was stationary while the interferometer beams scanned the source. The response is reciprocal and depends only on the relative angular velocity between the interferometer and the source, in the same way the measurement of the Doppler frequency shift depends only on the relative radial velocity between the object and the sensor. In this paper, the interferometer is taken to be stationary, while the source is taken to move in angle; the result is the same in the inverse case. In Section II, the response of the correlation interferometer to a moving point source is presented in the time and frequency domains, as well as an analysis of its spectral behavior to changing angular velocities. The power spectral density of the interferometer signal response is also derived. Section III derives the sensitivity and SNR of an interferometer to an angularly moving point source. II. CORRELATION INTERFEROMETER SIGNAL RESPONSE A. Time-Domain Signal Response The two-element correlation interferometer consists of two nominally identical receivers each of which include an antenna and have transfer functions that alter the frequency and amplitude response of the collected signal. The received signal may be coherently transmitted and reflected off the object of interest, or, as in the case of a radiometer considered here, the signal may be intrinsic noise-like broadband thermal radiation emitted by the object. A general block diagram of a correlation interferometer viewing a moving point source is given in Fig. 1. If the object is moving in the plane defined by the interferometer antennas, the radiation received by the two antennas will differ in phase due to the additional distance the radiation travels to reach one antenna relative to the other. This phase difference corresponds to a time delay given by (1) where is the baseline separation of the antennas, is the speed of light, and is the angle off broadside of the point source. The normalized monochromatic voltage signals present in the two

where a quadrature receiver is implied to reconstruct the complex signal. The interferometer correlates the two voltage signals through a multiplication and integration process. The response of the interferometer is, in general, given by (4) where the angled brackets indicate the time averaging of the of the two integrator. Equation (4) is the cross-correlation signals with the delay variable set to zero, which is given by (5) and includes only the signal components; the noise of the receivers is analyzed in Section III. The multiplication can be implemented by a simple signal multiplier (mixer), while the integration can be performed using a low-pass filter, the corresponding ideal integration time of which is [15] (6) where is the low-pass filter integration bandwidth. The general broadband response of the correlation interferometer to a moving point source is given by [11] (7) is the antenna where is the amplitude of the response, pattern, is the wavelength of the radiation, and is the receiver bandwidth. The sinc function in (7) derives from the bandwidth of the system, assumed to be ideally rectangular, and is referred to as the bandwidth pattern. It spatially filters the response similar to the antenna pattern. If the bandwidth is narrow, the bandwidth pattern becomes approximately constant over angle. In terms of the antenna temperature, the amplitude of the response is given by [3] (8) is the noise temperature of the antenna on receiver where . The amplitude given by (8) represents the noise power at the antenna resulting from the incident radiation of the source and the surrounding environment. In a passive radiometric system, the antenna temperature represents the desired signal. If an active system were implemented, the signal reflected off the source would generally be greater in power than the environmental signals, and (8) would effectively represent the signal power backscattered off the source and collected by the receiving antennas. There are a number of special cases that affect the response depending on whether the antennas track the source and whether the antenna pattern is much narrower than the bandwidth pattern [14]. In this research, the interferometer is used to detect

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sources, rather than track known sources. Thus, the antennas are considered stationary. In general, a system beam pattern may be defined, which is a combination of both the antenna and bandwidth patterns (9) The response of the interferometer is then given by (10) If the point object is moving with constant angular velocity relative to the sensor, the response can be given in terms of time by noting that (11) and thus the response is (12) The amplitude of the signal depends on the broadband thermal radiation properties of the source and is thus a Gaussian random variable. The system beam pattern and the interference pattern represent the system frequency response of the interferometer receiver. The real part of the interferometer response is plotted in Fig. 2 for an interferometer with a 10 system beamwidth approximated by a sinc function viewing a point source moving with angular velocity rad s . The baseline in Fig. 2(a) is while that of Fig. 2(b) is . The oscillation of the signal manifests as a frequency shift resulting from the angular velocity of the source, and is derived in Section II-B. It is apparent, however, that increasing the antenna baseline results in an increase in the oscillation frequency. B. Power Spectral Density The response of the interferometer in the frequency domain is found by taking the Fourier transform of (12). If the angle away from broadside is small such that , the Fourier transform of (12) can be shown to be [14] (13) where and

is the Fourier transform of the system beam pattern

Fig. 2. Real part of the response of an interferometer with a 10 sinc-function and (b) to a point system beamwidth and an antenna baseline of: (a) rad s . The frequency of the source moving with angular velocity oscillation of the response is the frequency shift , which increases proportionally to the baseline.

frequency, and the system beam pattern, which defines the frequency envelope of the response. The system beam pattern is, in general, the product of the antenna pattern and the bandwidth pattern, as given by (9), and in practice will have a shape similar to an antenna pattern. To more easily analyze the frequency response of the interferometer, a simple example is used here, where the system beam pattern is modeled as a sinc function. Such a model will be shown to result in a rectangular frequency response, thereby affording a direct analysis of the frequency response in an ideal case. The system beam pattern is modeled as (15)

(14) is the frequency shift imparted by the motion of the source through the fringe pattern. The spectral response is therefore simply the Fourier transform of the time-dependent system beam pattern shifted by the frequency of the fringe function. The subscript in (13) is used to denote the response to the signal of interest, and differentiate the signal response from that of the noise, discussed in Section III. The frequency response is dependent on the motion of the object through (14), which defines the location of the response in

where is a scaling factor, which defines the width of the sinc function. The half-power beamwidth of the system beam pattern is, therefore, (16) where 1.896 is the value where the sinc function is equal to 0.5. The system beam pattern can be represented in terms of the frequency shift by replacing the angular velocity in (15) using its relationship to the frequency shift (14). Under the small-angle assumption, is small, and therefore, , and

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results in an increase in the frequency resolution, it also results in an increase in measurement uncertainty; detections away from broadside incur an error due to the cosine variation in (14), as described in [11]. III. SENSITIVITY

Fig. 3. Frequency response of the interferometer for a range of frequency shifts for an interferometer with a 10 sinc-function system beamwidth and an antenna . The center of the signal bandwidth is equal to the frequency baseline of . The amplitude shows an inversely proporshift, while the bandwidth is tional relationship with , while the bandwidth is directly proportional to .

the system beam pattern can be given in terms of the frequency shift and the quantity by

The sensitivity of a correlation interferometer has been previously derived from the perspective of the rms variations of the noise (e.g., [16]). A more intuitive approach taken here is to analyze the interferometer response in terms of its power spectrum, as done by Thompson et al. [3] and Tiuri [13]. In previously published derivations of the SNR, however, it has been assumed that the object is not moving. When detecting moving objects, such as is the case in intruder detection or vehicle detection, the object is generally not tracked, and thus the response must include the frequency shift. The following derives the SNR of the interferometer response to an object moving with nonzero angular velocity. In a nonideal interferometer, the receivers contribute noise such that the voltage signals present in the receivers can be given by

(17) where, using (14) and (16), and the assumption that , (18) The frequency response is then given by (19) where the rectangular pulse function is defined by (20) otherwise.

(22) indicates the receiver. The signal components where derive from the same source being viewed by both antennas; however, is not necessarily equal to (in real systems, they will never be equal due to differences in the receiver amplitude and frequency responses); the two signals will, however, generally be highly correlated unless the receivers are significantly different. The noise components generated by each receiver are independent and uncorrelated. The sensitivity is determined by the power spectra of the signal and noise components of the interferometer output signal (4). The Wiener–Khinchin theorem states that the power spectra and the autocorrelation of a random process are related through a Fourier transform

repThrough (19) and (20), it can be seen that the quantity resents the bandwidth of the signal response. The interferometer response is a nonstationary function of time, and thus the frequency response given by (19) represents the energy spectral density of the response. The power spectral density may be found by taking the squared magnitude of the energy spectral density, which gives (21)

(23)

(24) The autocorrelation of the multiplier output is (25)

The frequency response (19) is plotted in Fig. 3 for a 10 system beamwidth and baseline over a range of frequency shifts. The peak amplitude of the frequency response is inversely proportional to , while the bandwidth is proportional to . Thus, higher frequency shifts result in wider bandwidth signals; however, the total signal power does not decrease. As the beamwidth is increased, the temporal duration of the signal is correspondingly increased. This results in detection of more oscillation periods, which increases the resolution of the frequency; this is equivalent to decreasing the signal bandwidth. It should be noted that while increasing the system beam pattern

where the angle brackets denote the expectation operator, which, for infinite integration time, is equal to the expectation value [17]; in practice, finite integration times approximate the expectation value. The voltage signals each represent the combination of the signal and noise voltages in (22). The autocorrelation (25) results in [5]

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(26) Each term of (26) can be written in terms of the autocorrelation or cross correlation it represents, yielding

information given by the antenna noise temperature. The signal power spectrum due to the antenna temperature in one receiver is thus (31) and the signal cross-power spectrum of the two receivers is

(27) is the cross-correlation of the signal components, where is the autocorrelation of the component, and is the autocorrelation of the component. Using (23) and (24) in (27), the power spectral density of the response in general can be given by

(32) The power spectral density of the response can therefore be given by

(28) where signals

is the cross-power spectral density of the voltage and .

A. Power Spectra of the Interferometer Response The magnitudes of each term in (27) and (28) can be determined by analyzing amplitudes of the terms of (26). The amplitudes of the voltage signals (2) and (3) are proportional to the square root of the signal powers, which for a passive system is added to the receiver noise power, given by (29) is the system equivalent where is Boltzmann’s constant, noise temperature, and is the frequency response of the receiver. The system equivalent noise temperature, given by (30) , which, in the is a combination of the antenna temperature case of a radiometer, represents the desired signal, and the receiver noise temperature , which acts to corrupt the desired

(33) The first term of (33) results from the autocorrelation of the signal components with a correlation delay of zero, and is thus simply the squared magnitude of the signal components, which is the power spectrum (21). The other terms of (33) represent noise in the form of system noise and cross-correlated antenna noise powers. The second term of (33) is the convolution of the signal response given by (19) and the cross-correlation of the receiver frequency responses. Since the correlation delay in the second term is nonzero, unlike in the first term, the receiver responses are cross-correlated. The autocorrelation therefore results in the signal response given by (19) being multiplied by the cross-correlation of the receiver responses since only the cross-power spectral densities result in the signal response given in Section II. The third term of (33) represents the cross-correlation of the signal components and generate responses at baseband and twice the carrier frequency. The fourth and fifth terms represent

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The power spectrum of the third term is the convolution of the magnitude of the receiver frequency responses. If the receiver passbands are perfectly rectangular, the resulting power spectrum consists of a triangular pulse centered at dc and with a bandwidth of . The bandwidth of the receiver is typically a few orders of magnitude greater than the frequency shift, which is on the order of hundreds of hertz, thus the signal spectrum is approximately a delta function centered at dc in comparison to the noise spectrum. The convolution of the signal and noise spectra is then approximately equal to the noise spectrum. If the frequency shift were less than an order of magnitude smaller than the receiver bandwidth, the resulting noise spectrum would be flat from dc to and the tails of the spectrum would broaden. If the receiver passbands are identical,

(35)

Fig. 4. (a) Power spectrum of the input signals. (b) Power spectrum at the output of the correlator for a stationary source. (c) Power spectrum at the output of the correlator for an angularly moving source. (d) Power spectrum of the signal close to dc for an angularly moving source. The signal components are denoted in red (in online version), while the noise components are in grey.

the cross-correlation of the signal and noise components, while the sixth term represents the cross-correlation of the noise components. Each of the five noise components is modulated by the auto- or cross-correlation of the receiver passbands. If the passbands are rectangular, the noise spectra is triangularly shaped and located at dc and twice the carrier frequency. This is illustrated in Fig. 4, where the input and output power spectra are shown for passbands that are rectangular and identical. The receiver passband responses are Hermitian, and thus by combining the last four terms of (33), the power spectrum can be given by

The power spectra of the input and output signals are depicted in Fig. 4, including positive and negative frequencies. The input spectrum consists of the band-limited signals at the carrier frequency. The output spectrum contains the cross-power spectra of the noise and signal components. For a stationary source, the signal component is a delta function at dc, as depicted in Fig. 4(b). The noise is triangularly shaped with twice the bandwidth of the input spectrum. The noise centered around dc contains components from both the signal and noise power, while that centered around twice the carrier frequency is a result of the convolution of the input power spectra. For a moving point source, the output spectrum is as depicted in Fig. 4(c) and (d). The noise components are unchanged; however, the signal component is now modulated by the frequency shift, with its bandwidth increasing proportionally to the frequency shift. The receiver bandwidth is generally at least two orders of magnitude greater than the maximum frequency shift, and thus the noise is approximately constant over the signal frequency range, as depicted in Fig. 4(d). B. SNR The sensitivity is found by first calculating the SNR. The first term of (35) represents the signal, while the second term represents the noise, thus the power spectrum can be given generally by (36) where

is the signal spectrum given by (21) and

(34) , and the first term is unchanged where from (33) and represents the signal spectrum given in Section II.

(37)

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defines the maximum frequency of the signal component in terms of the maximum frequency shift and the bandwidth of the signal . The lowest noise for a static filter is achieved by setting

The interferometer spectral SNR is thus given by

(43) (38) As indicated by (38), the spectral SNR is inversely dependent on the square of the frequency shift. The total SNR integrated over the signal bandwidth does not change; however, as the signal bandwidth increases, the spectral power of the signal decreases, while the noise spectral power remains constant. The result is a decrease in the SNR per unit bandwidth. C. Sensitivity The spectral sensitivity is found in terms of the antenna temperature, which represents the signal of interest to be detected over the noise. In the microwave and millimeter-wave regions, the thermal radiation power of natural objects is typically at least an order of magnitude less than the receiver noise power, and therefore , and . If the antennas are identical and receive the same radiation power, , and the spectral SNR (38) can be given by

(39)

The signal component is thus unaffected, while the noise fluctuations are integrated over the low-pass filter bandwidth. In considering the integration time, the time over which the object is present in the antenna beams must be considered [10]; objects present in the beam for durations shorter than the integration time will result in degraded sensitivity. As the baseband filter bandwidth is typically at least two orders of magnitude less than the receiver bandwidth, when , the noise power is approximately constant with frequency. Additionally, the derivation of the signal response assumed ideal square receiver frequency passbands of bandwidth . The integration over the RF passband in (37) therefore results simply in the noise power multiplied by the bandwidth and the power can be written

(44) The signal is present only within the bandwidth , which is contained within the filter bandwidth by (41), and thus integration of the power spectral density of the signal (21) over the low-pass filter bandwidth results in

The sensitivity is the minimum detectable temperature difference, found by setting ; thus, the spectral sensitivity is

(45) (40) The spectral sensitivity is linearly proportional to the response bandwidth , and thus increases monotonically with the bandwidth. This increase is due to the response amplitude being inversely proportional to both and ; as either increases, the amplitude of the response decreases, resulting in an increase in spectral sensitivity. The total sensitivity is found by considering the SNR over the bandwidth of the interferometer output. The output of the multiplier is passed through a low-pass filter, which acts as an integrator with integration time given by (6). The low-pass filter of the correlator reduces the noise fluctuations by limiting the fluctuation frequency to , which is designed to pass all possible signal frequencies by setting

This result is independent of the frequency shift; i.e., the total signal power is unchanged by the motion of the object, as is expected. Note that as the frequency shift approaches dc, the rectangular function approaches a delta function (46) and

(41)

(47) which is the result obtained when assuming the source is not moving, as derived in [3] and [13]. The SNR is given by the ratio of the signal power and noise power

(42)

(48)

where the baseband signal frequency bandwidth

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Fig. 5. Sensitivity given by (50) normalized by for a: (a) low-pass filter with cutoff frequency given by (42) and (b) bandpass filter . with bandwidth

normalized sensitivity between the low-pass and bandpass filters is small. As an example, a system with identical receiver noise temperatures of 500 K and a 100-MHz bandwidth is considered. For and Hz, the resulting normalized sensitivity for a low-pass filter is 11 K, resulting in a sensitivity of 0.55 K. For a bandpass filter, the normalized sensitivity is 6 K, with a sensitivity of 0.3 K. As shown above, the sensitivity of the correlation interferometer viewing an angularly moving source reduces to that of an interferometer reducing a stationary source, given by (50), when the angular velocity goes to zero. This important result shows that conventional theoretical approaches to the calculation of the sensitivity can be utilized in the new measurement of angularly moving objects. The analysis of future systems can thus be simplified by leveraging existing theory. The fact that the sensitivity is the same whether the source is moving or stationary implies that the baseband filter passes the full bandwidth of the signal response. In the presented analysis, the response was considered to be rectangular; however, in practice, the bandwidth will not have such defined edges. In such a case, the upper end of the signal spectra may be filtered, reducing the sensitivity. IV. CONCLUSION

With

, and , the SNR is (49)

If the antennas are identical and receive the same radiation power, , and the sensitivity is thus given by (50) This is the sensitivity of a correlation interferometer that is derived when the source has zero angular velocity [3], [15]. D. Discussion The spectral sensitivity is directly dependent on the frequency shift , as indicated in (40), and as can be discerned from Fig. 3. As the frequency shift increases, the spectral power in the response decreases, resulting in lower spectral sensitivity. Furthermore, the response does not extend to dc unless the angular velocity is zero (and the response is a delta function at dc). The shape of the spectral response thus places constraints on the baseband filter: since the maximum response frequency is dependent on the angular velocity, the filter must be selected in order to pass all the necessary frequencies for the application at hand. Utilizing a low-pass filter has the effect of integrating additional noise power in the region between dc and the lower frequency extent of the signal. The use of a bandpass filter removes this additional noise power if the filter is designed to pass only the bandwidth of the response. Fig. 5 shows the sensitivity (50) normalized by for a low-pass filter with cutoff given by (42) and a bandpass filter of bandwidth . It can be seen that for low values of , the bandpass filter results in better sensitivity than the low-pass filter. When , the difference in the

A derivation of the sensitivity of a passive correlation interferometer to an angularly moving point source has been presented. It was shown that the spectral sensitivity of the interferometer is dependent on the frequency shift imparted on the signal by the angular motion of the source, and that faster moving objects result in lower spectral sensitivity. The total sensitivity was shown to reduce to that derived when the source is stationary, as is the case in conventional derivations in radio astronomy. Thus, in considering the total sensitivity of a correlation interferometer in the measurement of the angular velocity of moving objects, the conventional form of the theoretical sensitivity applies. The author is currently planning experimental point target measurements to achieve a wider range of frequency shifts than were measured in previous experiments. Data from these measurements will be used as verification of the results presented herein, and are expected to be published in a forthcoming paper. ACKNOWLEDGMENT The author would like to thank Dr. M. D. Sharp, Applied Physics Laboratory, The Johns Hopkins University, Laurel, MD, for helpful discussions in the development of this paper. REFERENCES [1] J. A. Nanzer, Microwave and Millimeter-Wave Remote Sensing for Security Applications. Norwood, MA: Artech House, 2012. [2] W. N. Christiansen and J. A. Högbom, Radiotelescopes. Cambridge, U.K.: Cambridge Univ. Press, 1969. [3] A. R. Thompson, J. M. Moran, and G. W. Swenson, Interferometry and Synthesis in Radio Astronomy. New York: Wiley, 2001. [4] , G. B. Taylor, C. L. Carilli, and R. A. Perley, Eds., Synthesis Imaging in Radio Astronomy II. San Francisco, CA: Astron. Soc. Pacific, 1999. [5] C. S. Ruf, C. T. Swift, A. B. Tanner, and D. M. Le Vine, “Interferometric synthetic aperture microwave radiometry for the remote sensing of the Earth,” IEEE Trans. Geosci. Remote Sens., vol. 26, no. 5, pp. 597–611, May 1988. [6] D. M. Le Vine, “Synthetic aperture radiometer systems,” IEEE Trans. Microw. Theory Techn., vol. 47, no. 12, pp. 2228–2236, Dec. 1999.

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[7] S. Dill, M. Peichl, and H. Suss, “Study of passive MMW personnel imaging with respect to suspicious and common concealed objects for security applications,” Proc. SPIE, vol. 7117, no. 1, 2008, Art. ID 71170C. [8] D. A. Andrews, N. D. Rezgui, S. E. Smith, N. Bowring, M. Southgate, and J. G. Baker, “Detection of concealed explosives at stand-off distances using wide band swept millimetre waves,” Proc. SPIE, vol. 7117, no. 1, 2008, Art. ID 71170J. [9] J. A. Nanzer and R. L. Rogers, “Human presence detection using millimeter-wave radiometry,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 12, pp. 2727–2733, Dec. 2007. [10] J. A. Nanzer and R. L. Rogers, “Applying millimeter-wave correlation radiometry to the detection of self-luminous objects at close range,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 9, pp. 2054–2061, Sep. 2008. [11] J. A. Nanzer, “Millimeter-wave interferometric angular velocity detection,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 12, pp. 4128–4136, Dec. 2010. [12] J. A. Nanzer, “Interferometric detection of the angular velocity of moving objects,” in IEEE MTT-S Int. Microw. Symp. Dig., 2010, pp. 1628–1631. [13] M. Tiuri, “Radio astronomy receivers,” IEEE Trans. Antennas Propag., vol. AP-12, no. 7, pp. 930–938, Jul. 1964. [14] J. A. Nanzer and R. L. Rogers, “Analysis of the signal response of a scanning-beam millimeter-wave correlation radiometer,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 9, pp. 2357–2368, Sep. 2011. [15] J. D. Kraus, Radio Astronomy. New York: McGraw-Hill, 1966. [16] J. M. Wrobel and R. C. Walker, “Sensitivity,” in Synthesis Imaging in Radio Astronomy, ser. ASP Conf., G. B. Taylor, C. L. Carilli, and R. A. Perley, Eds. Orem, UT: ASP, 1999, vol. 180, pp. 171–186. [17] R. E. Ziemer and W. H. Tranter, Principles of Communications, 5th ed. New York: Wiley, 2002.

Jeffrey A. Nanzer (S’02–M’08) received the B.S. degree in electrical engineering and B.S. degree in computer engineering from Michigan State University, East Lansing, in 2003, and the M.S. and Ph.D. degrees in electrical engineering from The University of Texas at Austin, in 2005 and 2008, respectively. From 2002 to 2003, he was a Research Assistant with Michigan State University, where he developed testing procedures for genetic-algorithm-based selfstructuring antennas. From 2003 to 2008, he was a Graduate Research Assistant with the Applied Research Laboratories, The University of Texas at Austin, where he researched techniques of human presence detection using millimeter-wave radiometers and radars. From 2008 to 2009, he was a Post-Doctoral Fellow with the Applied Research Laboratories, The University of Texas at Austin, where he designed electrically small high-frequency (HF) antennas and communications systems. In 2009, he joined the Applied Physics Laboratory, The Johns Hopkins University, Laurel, MD, where his research involves advanced radar and communications technology. He has authored or coauthored over 25 journal and conference papers. He authored Microwave and Millimeter-Wave Remote Sensing for Security Applications (Artech House, 2012). His research interests are microwave and millimeter-wave remote sensing, millimeter-wave photonics, radiometry, antennas, and electromagnetics. Dr. Nanzer is a member of USNC/URSI Commission B, the IEEE Antenna Standards Committee, and the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) Microwave Systems Technical Committee (MTT-16). He was a founding member and the first treasurer of the IEEE AP-S/MTT Central Texas Chapter.

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Terahertz Aperture Synthesized Imaging With Fan-Beam Scanning for Personnel Screening Shengming Gu, Chao Li, Xiang Gao, Zhaoyang Sun, and Guangyou Fang

Abstract—A novel active terahertz imaging scheme based on the combination of fan-beam scanning and aperture synthesized reconstruction techniques is presented. In the horizontal direction, high resolution is obtained by the narrow side of the fan-beam based on real aperture focusing with special pillbox-like quasi-optics. In the vertical direction, high resolution is achieved by the aperture synthesized focusing techniques based on the broad side of the fan-beam. Appropriate focusing algorithms are proposed both for the single-frequency 2-D case and wideband 3-D imaging. With a 0.2-THz heterodyne transceiver, a prototype imager is developed and proof-of-concept experiments are performed. The experimental results on the resolution, specular reflection, and concealed threat objects detection are given in detail, which demonstrate the performance of the proposed imaging scheme and its potential application for fast personnel screening. Index Terms—Aperture synthesized focusing, fan-beam scanning, personnel screening, terahertz imaging.

I. INTRODUCTION

T

ERAHERTZ imaging has many advantages due to its unique electromagnetic waveband. Unlike optical and infrared radiation, terahertz waves can “see through” obscuring materials such as clothing, cardboard, plastics, and wood with relatively little loss. Compared to microwave and lower RF waves, terahertz waves have shorter wavelengths, which result in much better spatial resolution and make the objects much easier to be identified. Different from familiar X-ray imaging, terahertz imaging is generally regarded as harmless to humans [1]–[3]. Due to the above advantages, plenty of terahertz antennas and prototype imagers have been designed and developed for various applications, especially for nondestructive materials detection and security inspection [4]–[13]. To exploit the potential applications of terahertz imaging, spatial resolution, imaging speed, and system cost are three important aspects to be considered in a practical system. In recent years, different kinds of techniques and approaches have

Manuscript received September 05, 2012; revised September 17, 2012; accepted September 20, 2012. Date of publication October 22, 2012; date of current version December 13, 2012. This work was supported by the National Natural Science Foundation of China (11174280, 60990323, and 60990320) and the Knowledge Innovation Program of Chinese Academy of Sciences (YYYJ1123). The authors are with the Key Laboratory of Electromagnetic Radiation and Sensing Technology, Institute of Electronics, Chinese Academy of Sciences, Beijing 100190, China (e-mail: cli@ mail.ie.ac.cn). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2221738

been employed by scientists and engineers to improve the performance of the imaging systems in the terahertz band. The first is the focal-plane-array (FPA) technique [14], [15], which can acquire an entire image at once with high frame rates. The second is the synthetic-aperture technique, which improves the spatial resolution at a far imaging distance without large focusing quasi-optics [3], [15]. To our knowledge, the FPA technique in the terahertz band is still limited by the high cost of the array receivers or transceivers. The implementation of the synthetic-aperture technique in terahertz imaging is also at its beginning with rarely reported systems until now, and needs to be further investigated. The third technique uses some advanced optical-mechanical scanners with large focusing quasi-optics to improve the frame rate and reduce the system cost with a single transceiver [16], [17]. To achieve such purpose, we have recently proposed an active imaging scheme with a fast scanning spot-beam [18]. In this paper, a new terahertz imaging scheme is presented based on the combination of real aperture imaging in the horizontal direction with a focused narrow beam and aperture synthesized imaging in the vertical direction with a broad beam. This scheme matches well with the topology of a person’s body, which is long in the vertical direction and narrow in the horizontal direction. Therefore, it becomes a suitable candidate for personnel screening. To realize such a scheme, pillbox-like quasi-optics that can generate a quick-scanning fan-beam are employed. Compared to the spot-beam scanning system [18], several advantages can be evidently addressed due to the application of the synthetic-aperture technique in the vertical direction. Firstly, the target can be well focused with a better vertical resolution than the previous spot-beam version, which identifies objects directly with the diffusing beam along the vertical direction. Consequently, the imaging distance can be more freely increased to a moderate range because of the adaptive focusing of the synthetic-aperture imaging, and the antenna can also be tailored to a smaller dimension in the range direction ( -direction, as shown in Fig. 1). Thirdly, the darkness effects resulting from specular reflections of smooth targets in the spot-beam scanning scheme can be reduced in the vertical direction to improve the image quality. This paper is organized as follows. Details about the imaging scheme are presented in Section II. 2-D and 3-D image reconstruction algorithms for such a special imaging scheme are developed in Section III. In Section IV, some simulation and proof-of-concept experimental results in the 0.2-THz band are given to demonstrate the performance of the proposed imager. Finally, a conclusion is drawn in Section V.

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Fig. 1. Terahertz imaging scheme based on the combination of fan-beam scanning and aperture synthesized techniques.

II. DESCRIPTION OF THE IMAGER WITH FAN-BEAM SCANNING Fig. 1 shows the fundamental diagram of the proposed terahertz imaging scheme. The system employs a pillbox-like transceiver antenna to generate a fan-beam with its wide side lying along the vertical direction ( -direction) and narrow side lying along the horizontal direction ( -direction). The topology of this transceiver antenna is similar to the fan-beam scanning antenna proposed in our previous paper [5]. The major improvement is that the consistency of the antenna’s beam direction is optimized based on the combination of a reversed ray tracing algorithm (RRTA) and a modified physical optics method developed in [5]. This avoids the quality loss resulting from the undesirable effect of the image nonuniformity that may exist in most beam-rotating imaging systems. For the final designed fan-beam antenna, the beam in the – -plane is well focused at the distance mm from the antenna aperture by a concave main reflector, with its minimum half-power beamwidth (HPBW) of 7 mm along the -direction. In the – -plane, the wave diffuses from the antenna aperture to form a wide side of the fan-beam in the -direction. Fig. 2 shows the photograph of the final designed antenna, which has a size of 760 890 60 mm with 10-mm separation by two parallel metal plates. The total volume is reduced compared to the transceiver antenna employed in our previous spot-beam scanning system [18], which is about 1100 780 60 mm . Based on the quick rotation of the small sub-reflector, the fan-beam can quickly scan along the -direction. With the combination of line scan along the -direction by the motorized stage, the phase and amplitude of echoed signal can be collected over a large 2-D aperture to reconstruct a focused image of target. For the above imaging scheme, high resolution in the -direction can be directly achieved based on focusing of the main reflector, and high resolution in the -direction can be obtained by the aperture synthesized technique. Details about the imaging algorithms, which are effective for the special imaging scheme, are developed in Section III. To perform the proof-of-concept experiments, a 0.2-THz heterodyne transceiver with 10-GHz bandwidth is fabricated based on a microwave vector network analyzer (VNA). The simplified schematic for the transceiver is shown in Fig. 3. -band RF

Fig. 2. Photograph of the pillbox-like transceiver antenna.

Fig. 3. Simplified 0.2-THz heterodyne transceiver.

and local oscillator (LO) continuous wave swept sources with 833-MHz bandwidth are provided by the VNA. The RF signal is upconverted with a 12 multiplier and becomes in the 0.2-THz band. The signal is then split, one of which is directly transmitted by the transmitting horn to feed the fan-beam antenna and illuminate the target. The LO, which tracks the RF oscillator’s frequency sweep with a fixed frequency difference of 25 MHz, is also upconverted and split. One part is mixed with the signal coupled from to generate the reference IF. The other part is mixed with the echoed signal to obtain the measured IF signal. Both of the reference and measured IF signals are sent to the in-phase/quadrature (I/Q) demodulator in the VNA to generate the resulting scattering parameters. Finally, the data are transferred to a PC for data and image processing.

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A. 2-D Imaging Algorithm

Fig. 4. Geometry for the theoretical analysis.

Consider the imaging geometry in Fig. 4. A general target with a reflectivity cell is assumed to be at position function , where is a constant value, which lies between 350–550 mm for the single-frequency case. Assume that a single-frequency continuous-wave signal expressed as is radiated from the aperture of the antenna, where is the carrier angular frequency. Only when the fan-beam is steered to can the echoed signal backscattered by the target cell be captured by the same antenna. Besides, the target cell is located in the far-field of the antenna in the -direction so the phase center coordinate is seen as . For a set of targets in the plane, the baseband echoed signal is (1)

III. ALGORITHMS FOR THE APERTURE SYNTHESIZED IMAGING WITH FAN-BEAM SCANNING As mentioned above, the minimum HPBW in the – -plane of the special fan-beam antenna is 7 mm, which is several times larger than the wavelength at 0.2 THz (about 1.5 mm). According to the quasi-optical theory, the focused beam is fairly well collimated with gradual dispersion. Therefore, a good compromise between high resolution in the -direction and the depth of focusing along the -direction can be achieved, which results in the suitable distance lying between 350–550 mm away from the antenna aperture for 2-D and 3-D imaging. This is enough for a typical personnel screening application. Consider the imaging geometry in Fig. 4. The radiation aper, ture of the fan-beam antenna is in a range plane labeled as and a general target cell is assumed to be at position with a reflectivity function . Since the beam is focused to the imaging plane in the -direction by the main reflector of the antenna, the echoed signal backscattered by the target cell at can be captured only when the fan-beam is steered to . To obtain 2-D images for the objects distributed in the fixed range distance , a quasi-1-D wavefront reconstruction algorithm in the -direction with single frequency echoed data can be effective. Similarly, to obtain 3-D images of the objects, the frequency-wavenumber migration for image reconstruction in the proposed scheme can be simplified to a quasi-2-D algorithm. Compared to the conventional aperture synthesized algorithms applied in the imaging systems with spherical transmitting waves [19]–[23], the computation complexity of the fan-beam imaging scheme can be reduced due to the degradation of the dimensions of the image reconstruction algorithm and is more suitable for fast or real time imaging. The acquired scattering parameter in the 0.2-THz band is sampled over the 2-D scanned aperture and becomes the input data of the aperture synthesized reconstruction algorithms. It is labeled as in the following, where is the usual wavenumber, is the temporal angular frequency, and is the propagation speed of the electromagnetic wave in free space.

where is the wavenumber with respect to the carrier angular frequency . The range-dependent amplitude decaying term in (1) has been ignored since it will have little impact on image reconstruction. Next, using the method of stationary phase (MSP) to accomplish a 1-D Fourier transform over the variable and ignoring the term , we get (2) where is the spatial frequency variable corresponding to variable and its support bandwidth is (3) where is the available beamwidth of the fan-beam antenna in the -direction (about 20-dB beamwidth for near-field imaging). To reconstruct the image, a term needs to be used for matched filter

(4) Using the 1-D Fourier-transform relations (5) (6) where and indicate the 1-D Fourier transformation and inverse Fourier transformation over the variables and , respectively. Thus, the reconstruction algorithm is summarized as

(7) From (7), we know that the above algorithm is a quasi-1-D wavefront reconstruction method and extensively relied on the Fourier transform technique. The reconstructed image is only well in focus over the depth of field so it will be suitable for imaging thin objects. The input data can be obtained from the experimental system by taking out a single frequency from the scattering coefficient .

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B. 3-D Imaging Algorithm The frequency wavenumber migration, also known as Stolt migration, was firstly proposed by Stolt in 1978 for seismic signal processing [24]. Here, we extend the migration algorithm for near-field 3-D imaging for our unique imaging scheme with fan-beam scanning. The basic imaging configuration is also shown in Fig. 4. However, the transmitted signal is not a single frequency signal, but a wideband stepped frequency signal to realize high-range resolution in the -direction. A general target cell is also assumed to be at position with a reflectivity function . Here, is a variable that lies between 350–550 mm. Similar to 2-D imaging, the echoed baseband signal is

(8) The range-dependent amplitude decaying term is also ignored in (8). In fact, we can also transmit and collect data in the time domain. In this case, (8) will be obtained by the Fourier transform of the echoed data in the time domain. Performing a 1-D Fourier transform to over the variable , and utilizing the MSP and suppressing the term ,

(9) Now the support bandwidth of

is (10)

The value of in (10) can be approximately taken as for the imaging system due to the relatively narrow fractional bandwidth, which is always well satisfied in a terahertz imaging system, and is the center wavenumber with respect to the center angular frequency . Here, is also called the carrier angular frequency. We define as (11) Using a matched filter term (9), we get

to multiply both sides of

proposed fan-beam scanning imager. The advantage makes the data easy to process. In practical imaging processing, the data are discretely sampled with uniform intervals in the space and frequency domain. Therefore, the data are uniformly sampled in each variable and the 1-D fast Fourier transform (FFT) of over can be directly applied. However, the 2-D inverse FFT in (15) will not be directly used because the sampling data are nonuniformly spaced in the domain. Although some interpolation techniques, such as linear interpolation, are necessary, real-time data processing can be readily achieved for the 3-D algorithm in our proposed fan-beam scanning system. The reasons are as follows. Firstly, for personnel screening at checkpoints in security applications, the amount of the sampled data is limited due to the relatively small effective depth of the objects in the -direction. Secondly, the 3-D image reconstruction here is just a quasi-2-D problem because of the 1-D real aperture focusing so the computation complexity can be reduced compared to the conventional 3-D interpolation-FFT reconstruction algorithm [23]. Besides, some advanced computer technology such as multicore technology can be applied to further reduce the time of data processing during imaging. To quantitatively evaluate the computational complexity of the proposed 2-D and 3-D algorithms, the echoed data are assumed to be recorded at positions in the – -plane with sampling points in the frequency domain. The computational cost for the algorithms can be represented in the total times of real multiplications and real additions, as given in Table I by the comprehensive analysis of (7) and (15). Consider potential applications for personnel screening, the scanned aperture is about 600 mm 2000 mm. As mentioned in Section IV, the sampling intervals in the horizontal, vertical, and frequency domains are 4 mm, 2 mm, and 50 MHz, respectively. Therefore, the sampling data consist of 150 1000 201 data points for the imager with 10-GHz bandwidth. To employ the FFT technique, the data need to be zero padded and finally consist of 150 1024 256 data points. According to the Table I, the proposed 3-D algorithm requires about 2.5 10 real multiplies and 3.5 10 real adds. As mentioned in [23], the time for image reconstruction is very dependent on the type of computer system. For a Lenovo PC with 4 Intel core i5-2400 CPUs, the final 3-D data can be directly divided into four parts along the horizontal direction and the entire reconstruction requires less than 3 s. For the proposed 2-D algorithm, only single-frequency sampling data are needed and the reconstruction requires definitely less than 0.1 s.

(12) C. Resolution and Sampling

Using the Fourier-transform relations (13) (14) The algorithm can be summarized as (15) From (15), we know the 3-D image reconstruction is just a quasi-2-D problem. This is a very important advantage for the

For real aperture imaging, the resolution is mainly determined by the size of the effective radiation aperture. Especially for our focused fan-beam real aperture imaging, the resolution in the -direction of images for different distance planes such as and are slightly different, and can be seen as equal to the projected widths in the -direction of the 3-dB beam at the corresponding distance. Therefore, the sampling interval in this direction should satisfy the following equation: (16)

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TABLE I COMPUTATIONAL COST OF THE PROPOSED ALGORITHMS

where and are the sampling interval and the smallest resolution in the -direction, respectively, and is a sampling coefficient, which is smaller than 1. For aperture synthesized imaging in the -direction, the resolution obtained is determined by the support bandwidth in the domain and can be written as (17)

is the wavelength of the electromagnetic wave in free where space with respect to the carrier angular frequency . Details about the sampling interval can be found in several references [25], [26]. The range resolution in the -direction is (18) where is the bandwidth of the transmitted signal. The frequency sampling interval should satisfy (19) where is the maximum target range. With the suitable value of , some small interference power such as the coupling between the two horns, scattering from the sub-reflector, and discontinuous reflection on the antenna aperture can be removed by adding a proper range window, to further improve the imaging quality in the 3-D imaging algorithm. For the prototype imaging system designed in the 0.2-THz band, the value of is chosen as 3 m and the corresponding frequency sampling interval is 50 MHz. IV. SIMULATED AND EXPERIMENTAL RESULTS A. 2-D Reconstruction Based on Simulated Data To demonstrate the effectiveness of the proposed imaging scheme, the single-frequency algorithm is simulated based on

Fig. 5. (a) Ideal two fan-shaped metal patches. (b) 0.2-THz single-frequency reconstructed image based on simulated data.

the designed parameters of the prototype imager. Two ideal fanshaped metal patches are set as test targets at the mm imaging plane. Positions and sizes of the patches are shown in Fig. 5(a). The working frequency of the imager is set as 0.2 THz. Sampling intervals in both the - and -direction are 2 mm. To make the simulated data close to that obtained from the imaging system, we employed a modified physical optics method proposed in the literature [5] to simulate the radiated field of the fan-beam antenna. Combined with the reciprocity theorem, the backscatter echoed data are computed over a 2-D aperture that is large enough for 2-D reconstruction. A well-focused image on a decibel scale is shown in Fig. 5(b). The image demonstrates the performance of the proposed imaging scheme and validates the algorithm. Besides, it is also shown that the resolution size, especially in the vertical direction, is better than 4 mm. B. Laboratory Imaging Results To test the performance of an actual aperture synthesized imager with fan-beam scanning and the effectiveness of the algorithms, a 0.2-THz experimental imaging system with 10-GHz bandwidth has been developed based on a VNA, as mentioned in Section II. To avoid aliasing, the sampling intervals in the and -directions are chosen as 2 and 4 mm, respectively. The frequency sampling interval is chosen as 50 MHz, and all of

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Fig. 6. (a) Optical image and (b) 0.2-THz single-frequency reconstructed image of four fan-shaped metal patches.

Fig. 7. (a) Optical image and (b) 0.195–0.205-THz image of metal strips.

the reconstructed images in the following experiments are on a decibel scale. Fig. 6 shows the optical image and 0.2-THz single-frequency reconstructed image of four fan-shaped metal patches on a plastic board. The aperture of the target is about 120 mm 120 mm, and the depth is about 0.4 mm, which is far smaller than the range resolution. The well-focused image demonstrates the simulated result and verifies that the quasi-1-D reconstruction technique is suitable for thin object reconstruction. To obtain the resolution of the experimental imaging system with frequency sweeping, a plastic board with many metal strips was imaged. The size of the target is about 150 mm 120 mm with 2-mm thickness. The gaps between the adjacent metal strips vary from 9 to 3 mm along the horizontal direction and from 7 to 2 mm along the vertical direction, respectively. The wideband reconstructed image is shown in Fig. 7(b). The image shows the resolution is about 7 mm in the horizontal direction and better than 4 mm in the vertical direction. Compared to Fig. 6(b), it is found that the imaging qualities for the front view of a thin target are almost the same for the single-frequency 2-D and wideband 3-D cases. The reason is obvious that the best focusing distances for different parts of a flat and thin target are uniform. Hence, it can be well focused just with a 2-D image reconstruction technique, as mentioned in [23]. Specular reflection is the reflection of the transmitted signal away from the system by targets that are smooth reflectors [27]. For an active imager working in the terahertz band, the specular reflection may seriously reduce the probability to find concealed objects in practical applications. To evaluate the effect of spec-

Fig. 8. (a) Optical image and 0.195–0.205-THz images of six square metal sheets with: (b) no tilt in either the horizontal or vertical direction, (c) 10° tilt in the horizontal direction, (d) 10° tilt in the vertical direction, (e) 30° tilt in the horizontal direction, and (f) 30° tilt in the vertical direction.

ular reflection in our aperture synthesized imager with fan-beam scanning, six 20-mm square metal sheets are used as smooth reflectors seen in Fig. 8(a). Fig. 8(b) is the wideband reconstructed image with no tilt in either the horizontal or vertical direction. Fig. 8(c) and (e) shows the wideband images with 10° and 30° tilt in the horizontal direction, and Fig. 8(d) and (f) shows wideband images of the same targets with 10° and 30° tilt in the vertical direction. All the above five reconstructed images are normalized to the maximum value in Fig. 8(b), which approximately represents the reflectivity density of a metal plane, and are then shown on a decibel scale. From the above images, it is obvious that the quality of Fig. 8(d) is much better than

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Fig. 9. (a) Optical image, (b) 0.2-THz single-frequency image, and (c) 0.195–0.205-THz image of a plastic cap gun.

Fig. 8(c) with higher amplitude and fewer darkness effects (speckles) resulting from specular reflections. Compared to Fig. 8(f), the impact of specular reflections on Fig. 8(e) is more serious and the maximum amplitude is about 10 dB lower. There are two reasons for the phenomena. Firstly, the vertical resolution is better than the horizontal resolution, which means a larger size of equivalent antenna aperture along the vertical direction can be obtained to allow the imager observe the target from a larger inspection angle [27]. Secondly, the specular reflections are related to the backscattering dips of the smooth targets when it is tilted with some specific angles. For the aperture synthesized imaging in the vertical direction, the images are reconstructed from the combination of the monostatic backscatter signals in different directions, and hence, the effects of the dips will be reduced. Compared to Fig. 8(b), the quality of the other four reconstructed images seems poor. However, we can still distinguish the six metal sheets from all these images. Here, the impact of some concealing layers such as clothing in practical applications has not been considered. In fact, these smooth metal sheets with large tilt angles such as 30° tilt in the horizontal direction is hard to be found when concealed behind layers of clothing especially with high reflectivity. Fortunately, some signal-processing techniques utilizing the range resolution capability such as the peak-finding algorithm proposed in [8] has been investigated to help the identification of targets from concealing layers of clothing. Fig. 9 shows the optical image and reconstructed terahertz images of a plastic cap gun. This gun is entirely plastic and its maximum depth along the -direction is about 50 mm. Fig. 10 shows the optical image, 0.2-THz single frequency 2-D image, and 0.2-THz frequency sweeping 3-D images of a mannequin wearing a T-shirt with a concealed plastic cap gun. Fig. 10(c) is a typical front view. Based on the obtained 3-D image data, we can observe the mannequin from other directions with interpolation operations such as a 35° left- and right-side view shown in Fig. 10(d) and (e), respectively. Both of the images seem poor when compared to Fig. 10(c) due to the relatively coarse range resolution (about 15 mm). This scan uses an aperture of

Fig. 10. (a) Optical image, (b) 0.2-THz single-frequency image, and (c)–(e) wideband (0.195–0.205 THz) 3-D images of a mannequin wearing a T-shirt and concealing a plastic cap gun with front view, 35° left-side view, and 35° right-side view, respectively.

approximately 530 mm 900 mm. The gun can be clearly recognized in these images. Comparing Fig. 9 with Fig. 10, it is

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seen that the quality of the reconstructed images with frequency sweeping operation is much better than the single frequency operation in several aspects. Firstly, the speckles that may be caused by a lack of focus over many parts of the targets in 2-D imaging can be greatly eliminated by the matched filter in the range domain in 3-D imaging. Secondly, the darkness effects resulting from specular reflections by smooth targets may be reduced based on the averaging from the scattering in different frequencies. Thirdly, the proper range-window can be employed in 3-D imaging to remove some small interference coming from the unwanted reflection, scattering, or coupling of the antenna’s inner structures to make the final images more clear. V. CONCLUSION A novel active terahertz imaging scheme was proposed in this paper. The proposed design employs special pillbox-like quasi-optics, which can generate a quick-scanning fan-beam. The natural match between the geometry of a standing person and the geometry of the fan-beam that has its wide side lying along the vertical direction make the imaging scheme suitable for standoff security applications. The combination of real aperture focusing in the horizontal direction and aperture synthesized focusing in vertical direction is the first demonstrated in the 0.2-THz band and the corresponding 2-D and 3-D reconstruction algorithms, which are suitable for the unique imaging scheme, are developed. A 0.2-THz prototype imager is designed for the proof-of-concept experiments. The results of numerical simulations and numerous experiments verify not only the reconstruction algorithms, but also the performance of the imaging scheme, and demonstrate its potential application for fast personnel screening. REFERENCES [1] N. Berrah et al., “Ultraintense X-ray induced multiple ionization and double core-hole production in molecules,” in Lasers Electro-Opt. Conf., 2011, pp. 1–2. [2] C. F. Cull, D. A. Wikner, J. N. Mait, M. Mattheiss, and D. J. Brady, “Millimeter-wave compressive holography,” Appl. Opt., vol. 49, no. 19, pp. 67–82, Jul. 2010. [3] V. Krozer et al., “Terahertz imaging systems with aperture synthesis techniques,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 7, pp. 2027–2039, Jul. 2010. [4] S. G. Hay, J. W. Archer, G. P. Timms, and S. L. Smith, “A beam-scanning dual-polarized fan-beam antenna suitable for millimeter wavelengths,” IEEE Trans. Antennas Propag., vol. 53, no. 8, pp. 2516–2524, Aug. 2005. [5] X. Gao, C. Li, S. M. Gu, and G. Y. Fang, “Design, analysis and measurement of a millimeter wave antenna suitable for stand off imaging at checkpoints,” J. Infrared Millim. Terahertz Waves, vol. 32, pp. 1314–1327, 2011. [6] N. Llombart, K. B. Cooper, R. J. Dengler, T. Bryllert, and P. H. Siegel, “Confocal ellipsoidal reflector system for a mechanically scanned active terahertz imager,” IEEE Trans. Antennas Propag., vol. 58, no. 6, pp. 1834–1840, Jun. 2010. [7] R. Appleby and H. B. Wallace, “Standoff detection of weapons and contraband in the 100 GHz to 1 THz region,” IEEE Trans. Antennas Propag., vol. 55, no. 11, pp. 2944–2956, Nov. 2007. [8] K. B. Cooper, R. J. Dengler, N. Llombart, T. Bryllert, G. Chattopadhyay, E. Schlecht, J. Gill, C. Lee, A. Skalare, I. Mehdi, and P. H. Siegel, “Penetrating 3-D imaging at 4- and 25-m range using a submillimeter-wave radar,” IEEE Trans. Antennas Propag., vol. 56, no. 12, pp. 2771–2778, Dec. 2008.

[9] K. B. Cooper, R. J. Dengler, N. N. Llombart, B. Thomas, G. Chattopadhyay, and P. H. Siegel, “THz imaging radar for standoff personnel screening,” IEEE Trans. Terahertz Technol., vol. 1, no. 1, pp. 169–182, Sep. 2011. [10] Q. Song, Y. J. Zhao, A. Redo-Sanchez, C. L. Zhang, and X. H. Liu, “Fast continuous terahertz wave imaging system for security,” Opt. Commun., vol. 282, pp. 2019–2022, 2009. [11] J. B. Jackson, J. Bowen, G. Walker, J. Labaune, G. Mourou, M. Menu, and K. Fukunaga, “A survey of terahertz applications in cultural heritage conservation science,” IEEE Trans. Terahertz Technol., vol. 1, no. 1, pp. 220–231, Sep. 2011. [12] D. Zimdars, J. S. White, G. Stuk, A. Chernovsky, G. Fichter, and S. Williamson, “Large area terahertz imaging and non-destructive evaluation applications,” in Proc. 4th Int. Ultrason. Adv. Methods for Nondestructive Testing and Mater. Characterization Workshop, North Dartmouth, MA, 2006, pp. 63–66. [13] C. Zandonella, “Terahertz imaging: T-ray specs,” Nature, vol. 424, pp. 721–722, Aug. 2003. [14] E. Grossman et al., “Passive terahertz camera for standoff security screening,” Appl. Opt., vol. 49, no. 19, pp. 106–120, Jul. 2010. [15] F. Friederich et al., “THz active imaging systems with real-time capabilities,” IEEE Trans. Terahertz Technol., vol. 1, no. 1, pp. 183–200, Sep. 2011. [16] G. P. Timms et al., “Design and testing of an active 190-GHz millimeter-wave imager,” J. Electron. Imag., vol. 19, no. 4, Dec. 2010, Art. ID 043019. [17] K. B. Cooper, R. J. Dengler, N. Llombart, T. Bryllert, G. Chattopadhyay, I. Mehdi, and P. H. Siegel, “An approach for sub-second imaging of concealed objects using terahertz radar,” J. Infrared Millim. Terahertz Waves, vol. 30, pp. 1297–1307, 2009. [18] X. Gao, C. Li, S. M. Gu, and G. Y. Fang, “Study of a new millimeterwave imaging scheme suitable for fast personal screening,” IEEE Antennas Wireless Propag. Lett., vol. 11, pp. 787–790, 2012. [19] J. Y. Song, Q. H. Liu, K. Kim, and W. R. Scott, “High-resolution 3-D radar imaging through nonuniform fast Fourier transform,” Commun. Comput. Phys., vol. 1, no. 1, pp. 176–191, Feb. 2006. [20] J. M. Lopez-Sanchez and J. Fortuny-Guasch, “3-D radar imaging using range migration techniques,” IEEE Trans. Antennas Propag., vol. 48, no. 5, pp. 728–737, May 2000. [21] L. J. Busse, “Three-dimensional imaging using a frequency domain synthetic aperture focusing technique,” IEEE Trans. Ultrason. Ferroelectr. Freq. Control, vol. 39, no. 2, pp. 174–179, Mar. 1992. [22] Y. Sakamoto, K. Tajiri, T. Sawai, and Y. Aoki, “Three-dimensional imaging of objects in accumulated snow using multifrequency holography,” IEEE Trans. Geosci. Remote Sens., vol. 26, no. 4, pp. 430–436, Jul. 1988. [23] D. M. Sheen, D. L. McMakin, and T. E. Hall, “Three-dimensional millimeter-wave imaging for concealed weapon detection,” IEEE Trans. Microw. Theory Techn., vol. 49, no. 9, pp. 1581–1591, Sep. 2001. [24] R. Stolt, “Migration by Fourier transform,” Geophys., vol. 43, no. 1, pp. 23–48, 1978. [25] M. Soumekh, Synthetic Apertue Radar Signal Processing With Matlab Algorithm. New York: Wiley, 1999, ch. 2. [26] D. Sheen, D. McMakin, and T. Hall, “Near-field three-dimensional radar imaging techniques and applications,” Appl. Opt., vol. 49, no. 19, pp. 83–93, Jul. 2010. [27] D. M. Sheen, T. E. Hall, R. H. Severtsen, D. L. Mcmakin, B. K. Hatchell, and P. L. J. Valdez, “Active wideband 350 GHz imaging system for concealed-weapon detection,” in Proc. SPIE–Passive mmW Imag. Technol., 2009, vol. 7309, pp. 73090I-1–73090I-10.

Shengming Gu received the B.E. and M.S. degrees from the Nanjing University of Aeronautics and Astronautics, Nanjing, China, in 2007 and 2010, respectively, and is currently working toward the Ph.D. degree at the Institute of Electronics, Chinese Academy of Sciences (CAS), Beijing, China. His research interests include the analysis and design of terahertz quasi-optical antennas and millimeter-wave and terahertz imaging technology.

GU et al.: TERAHERTZ APERTURE SYNTHESIZED IMAGING

Chao Li received the B.S. degree in physics from Qingdao Ocean University, QingDao, China, in 2000, and the M.S. and Ph.D. degrees in electrical engineering from the Chinese Academy of Sciences (CAS), Beijing, China, in 2003 and 2008, respectively. Since 2004, he has been with the Key Laboratory of Electromagnetic Radiation and Sensing Technology, CAS, where he became an Associate Professor in 2011 and currently leads a group on the research of terahertz imaging theory and technology with projects supported by the National Natural Science Foundation of China, National High Technology Research and Development Projects (863 Projects) of China, and the Knowledge Innovation Program, CAS. He has authored or coauthored over 60 peer-reviewed papers. He authored one book. His research interests include terahertz imaging technology, antenna and wave propagation, computational electromagnetics, and artificial metamaterials in microwave and terahertz bands. Dr. Li was the recipient of numerous awards and honors, including the 2009 Outstanding Doctoral Dissertation Award, CAS, the 2010 National One-Hundred Excellent Doctoral Dissertation Nomination Award, the 2010 Advanced Researcher of 863 Projects, and the 2012 Lu Jiaxi Young Talent Award.

Xiang Gao was born in Jiang Su, China, in 1985. He received the B.E. degree in electronics science and technology from the Nanjing University of Posts and Telecommunications, Nanjing, China, in 2006, the M.S. degree in electromagnetic field and microwave technology from Beijing Jiao Tong University, Beijing, China, in 2009, and the Ph.D. degree in electromagnetic field and microwave technology from the Institute of Electronics (IE), Chinese Academy of Sciences (CAS), Beijing, China, in 2012. He is currently with the IE, CAS, where he is engaged in research on terahertz antennas and terahertz imaging methods.

3885

Zhaoyang Sun received the B.E. degree from the University of Electronic Science and Technology of China, Chengdu, China, in 2010, and is currently working toward the Ph.D. degree at the Institute of Electronics, Chinese Academy of Sciences (CAS), Beijing, China. His research interests include signal processing and millimeter-wave and terahertz imaging technology.

Guangyou Fang received the B.S. degree in electrical engineering from Hunan University, Changsha, China, in 1984, and the M.S. and Ph.D. degrees in electrical engineering from Xi’an Jiaotong University, Xi’an, China, in 1990 and 1996, respectively. From 1990 to 1999, he was an Engineer, an Associate Professor, and a Professor with the China Research Institute of Radiowave Propagation. From 2000 to 2001, he was a Visiting Scholar with the University of Trieste, Trieste, Italy, and with the International Center for Science and High Technology—United Nations Industrial Development Organization, Trieste, Italy. From 2001 to 2003, he was a Special Foreign Research Fellow of the Japan Society for the Promotion of Science, working with Tohoku University, Sendai, Japan. Since 2004, he has been a Professor with the Institute of Electronics, Chinese Academy of Sciences (CAS), Beijing, China, and the Director of the Key Laboratory of Electromagnetic Radiation and Sensing Technology. He has authored or coauthored over 100 publications. His research interests include ultra-wideband radar, ground-penetrating radar signal-processing and identification methods, terahertz imaging technology, and computational electromagnetics.

Editor-in-Chief George E. Ponchak, Ph.D., FIEEE IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES Editorial Office c/o Mrs. Kim Tanger, Editorial Assistant Ohio Aerospace Institute 22800 Cedar Point Road Cleveland, Ohio 44142 E-mail: [email protected] or [email protected] Phone: 440-962-3023 Fax: 440-962-3057

Information for Authors The IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES is published monthly with a focus on that part of engineering and theory associated with microwave/millimeter-wave technology and components, electronic devices, guided wave structures and theory, electromagnetic theory, and Radio Frequency Hybrid and Monolithic Integrated Circuits, including mixed-signal circuits, from a few 100 MHz to THz. I. Paper Submission in Electronic Form Authors need to visit the website http://www.mtt.org/transactions/34-author-information-transactions.html for the author instructions. To reduce time from submission to publication of papers, the editorial office accepts manuscripts only in electronic form as .pdf files and all communications with authors will be via email. The files must not be larger than 1MB and no *.zip files are accepted. Submissions should be submitted through the ScholarOne Manuscripts site at: http://mc.manuscriptcentral.com/tmtt-ieee and use the templates provided under http://www.ieee.org/publications_standards/publications/authors/authors_journals.html (Template for all Transactions (except IEEE Transactions on Magnetics), two-column template; can also be requested from the editorial office). Figures, graphs and all other necessary information for reviewing the manuscript must be included in this file (as opposed to being attached to it as separate files) and placed at appropriate locations within the text rather than at the end: • • • • • • • • • •

Figures should be large enough to be easily readable on a computer screen and on paper when printed out. A photograph of any component or circuit presented must be included. If, at the decision of the Editor, the component or circuit can be fabricated, measured characteristics must be included. All papers with theoretical contributions must have independent verification with measurement-based validation strongly preferred. Instrument screen captures are not suitable for publication and the data should be replotted. The print version of the paper will be in black and white, but color figures may be used in the electronic version of the paper. Axes should be labeled with large lettering. Whenever possible, theory and corresponding experimental results should be printed on the same graph for easy comparison. Follow the Guidelines for Author-Supplied Electronic Text and Graphics available for download at the above website. The minimum paper length is 4 pages, excluding the authors’ photos and biographies. Short papers of three pages or less should be sent to the IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS. The font size is specified in the templates. TeX and LaTeX users must use scalable fonts rather than bitmapped fonts to allow easy reading of .pdf files on the computer screen.

Note: Manuscripts that are related to material submitted to or published at conferences are considered only if the content is significantly updated or contains material of substantially complementary nature. Authors must reference all of their previous papers that are similar. Please attach .pdf files of previous papers and clearly state (on a separate page) the difference with respect to the current submission. Failure to disclose prior papers by the authors that are similar will be rejected. II. Final Submission Format After a manuscript has been accepted for publication, the author will be requested to provide an electronic copy of the final version of the manuscript in pdf format; Microsoft Word is the preferred format for this final submission, although TEX and LATEX formats are also acceptable. Note: Although we require a .pdf file of the manuscript for the review process, this format is not acceptable (neither is .ps) for the final submission. Some additional guidelines must, however, be followed for the submission of the final manuscript in electronic form: • Include all macros (/def) that are required to produce your manuscript (TEX and LATEX). • IEEE Transaction/Journal style dictates a 21-pica (3.5 inch) column width. If mathematical expressions are produced with this in mind, they are more aesthetically pleasing in the final version. • Figures and tables must be submitted as separate files in .ps, .eps, .doc or .tiff format III. Open Access This publication is a hybrid journal, allowing either Traditional manuscript submission or Open Access (author-pays OA) manuscript submission. Upon submission, if you choose to have your manuscript be an Open Access article, you commit to pay the discounted $1,750 OA fee if your manuscript is accepted for publication in order to enable unrestricted public access. Any other application charges (such as over-length page charge and/or charge for the use of color in the print format) will be billed separately once the manuscript formatting is complete but prior to the publication. If you would like your manuscript to be a Traditional submission, your article will be available to qualified subscribers and purchasers via IEEE Xplore. No OA payment is required for Traditional submission. IV. Page Charges Papers will be reviewed for their technical merit, and decisions to publish will be made independently of an author’s ability to pay page charges. Page charges of $110 (U.S.) per printed page will be requested on papers of six printed pages or less. Overlength page charges of $200 per page are mandatory for each page in excess of six pages. If the author’s organization agrees to honor the total page charge, which includes the page charges on the first six pages plus the mandatory overlength charge, the author will receive 100 reprints. If the supporting organization honors only the mandatory charge, no free reprints will be sent. Digital Object Identifier 10.1109/TMTT.2012.2234394

Digital Object Identifier 10.1109/TMTT.2012.2234395

Digital Object Identifier 10.1109/TMTT.2012.2234399

EDITORIAL BOARD Editor-in-Chief: GEORGE E. PONCHAK Associate Editors: H. ZIRATH, J.-S. RIEH, Q. XUE, L. ZHU, K. J. CHEN, M. YU, C.-W. TANG, N. S. BARKER, C. D. SARRIS, C. FUMEAUX, D. HEO, B. BAKKALOGLU, T.-S. HORNG, R. GOMEZ-GARCIA The following members reviewed papers during 2011

P. Aaen A. Abbaspour-Tamijani A. Abbosh D. Abbott A. Abdipour M. Abe M. Abegaonkar R. Abhari A. Abramowicz M. Acar L. Accatino R. Achar E. Ackerman J. Adam K. Agawa M. Ahmad H.-R. Ahn B. Ai M. Aikawa J. Aikio C. Aitchison M. Akaike T. Akin S. Aksoy I. Aksun A. Akyurtlu G. Ala L. Albasha A. Alexanian W. Ali-Ahmad F. Alimenti R. Allam K. Allen A. Alphones A. Alu A. Álvarez-Melcon A. Al-Zayed S. Amari H. Amasuga R. Amaya H. An D. Anagnostou M. Andersen K. Andersson M. Ando Y. Ando P. Andreani M. Andrés W. Andress K. Ang C. Angell I. Angelov Y. Antar G. Antonini H. Aoki V. Aparin F. Apollonio R. Araneo J. Archer F. Ares F. Ariaei T. Arima M. Armendariz L. Arnaut F. Arndt E. Artal H. Arthaber F. Aryanfar U. Arz M. Asai Y. Asano A. Asensio-Lopez K. Ashby H. Ashoka A. Atalar A. Atia S. Auster I. Awai A. Aydiner M. Ayza K. Azadet R. Azaro A. Babakhani P. Baccarelli M. Baginski I. Bahl S. Bajpai J. Baker-Jarvis B. Bakkaloglu M. Bakr A. Baladin C. Balanis S. Balasubramaniam J. Balbastre J. Ball P. Balsara Q. Balzano A. Banai S. Banba R. Bansal D. Barataud A. Barbosa F. Bardati I. Bardi J. Bardin A. Barel S. Barker F. Barnes J. Barr G. Bartolucci R. Bashirullan S. Bastioli A. Basu B. Bates R. Baxley Y. Bayram J.-B. Bégueret N. Behdad F. Belgacem H. Bell D. Belot J. Benedikt T. Berceli C. Berland M. Berroth G. Bertin E. Bertran A. Bessemoulin M. Beurden A. Bevilacqua A. Beyer M. Bialkowski

E. Biebl P. Bienstman S. Bila D. Blackham R. Blaikie M. Blank P. Blockley P. Blondy P. Blount D. Boccoli G. Boeck L. Boglione R. Boix G. Bonaguide F. Bonani G. Bonmassar O. Boos B. Borges V. Boria-Esbert O. Boric-Lubecke A. Borji S. Borm J. Bornemann W. Bosch R. Bosisio H. Boss G. Botta N. Boulejfen S. Boumaiza J. Bouny C. Boyd C. Bozler M. Bozzi R. Bradley D. Braess N. Braithwaite M. Brandolini G. Branner T. Brazil J. Breitbarth M. Bressan K. Breuer B. Bridges D. Bridges J. Brinkhoff E. Brown S. Brozovich E. Bryerton D. Budimir G. Burdge P. Burghignoli N. Buris C. C. Galup-Montoro B. Cabon P. Cabral L. Cabria C. Caloz C. Camacho-Peñalosa V. Camarchia E. Camargo R. Cameron M. Camiade C. Campbell M. Campovecchio F. Canavero A. Cangellaris A. Cantoni C. Cao F. Capolino F. Cappelluti G. Carchon J. Carmo K. Carr F. Carrez R. Carrillo-Ramirez P. Carro R. Carter N. Carvalho P. Casas R. Castello J. Catala M. Cavagnaro R. Caverly D. Cavigia J. Cazaux M. Celuch Z. Cendes D. Chadha M. Chae S. Chakraborty C. Chan C. Chang H. Chang K. Chang S. Chang T. Chang W. Chang E. Channabasappa H. Chapell W. Chappell C. Charles M. Chatras I. Chatterjee G. Chattopadhyay S. Chaudhuri S. Chebolu A. Cheldavi A. Chen C. Chen H. Chen J. Chen K. Chen M. Chen N. Chen S. Chen Y. Chen Z. Chen Z.-N. Chen H. Cheng K. Cheng M. Cheng Y. Cheng C. Cheon C. Chi M. Chia Y. Chiang J. Chiao A. Chin K. Chin H. Chiou Y. Chiou C. Chiu

H. Chiu A. Chizh C. Cho K. Cho T. Cho A. Choffrut C. Choi J. Choi W. Choi C. Chong M. Chongcheawchamnan C. Chou D. Choudhury E. Chow Y. Chow C. Christodoulou C. Christopoulos Q. Chu T. Chu H. Chuang M. Chuang Y. Chun S. Chung Y. Chung D. Chye A. Cidronali T. Cisco C. Cismaru O. Civi S. Clavijo M. Clénet D. Cogan P. Colantonio M. Cole J. Coleman J. Collantes R. Collin C. Collins B. Colpitts R. Compton G. Conciauro M. Condon D. Consonni A. Constanzo M. Converse K. Cools F. Cooray I. Corbella A. Costanzo S. Cotton C. Courtney G. Coutts J. Cowles J. Craninckx C. Crespo-Cadenas J. Cressler S. Cripps T. Crowe J. Cruz T. Cui E. Cullens T. Cunha W. Curtice J. Dabrowski W. Dai G. Dambrine P. Dankov F. Danneville I. Darwazeh A. Darwish N. Das M. Davidovich L. Davis D. Dawn J. Dawson H. Dayal F. De Flaviis D. De Zutter B. Deal A. Dearn J. Deen M. Dehan C. Dehollain C. Deibele G. Dejean M. DeLisio N. Deltimple S. Demir V. Demir J. Deng A. Dengi T. Denidni W. DeRaedt H. Deshpande Y. Deval R. Dey T. Dhaene L. Diaz A. Diaz-Morcillo L. Ding M. Dionigi C. Diskus A. Djordjevi T. Djordjevic J. Dobrowolski H. Dogan S. Donati X. Dong A. Dounavis P. Draxler R. Drayton A. Dreher J. Drewniak J. Duchamp A. Duffy L. Dunleavy J. Dunsmore S. Durden L. Dussopt C. Duvanaud J. East J. Ebel K. Eccleston I. Ederra R. Egri I. Ehrenberg N. Ehsan T. Eibert H. Eisele W. Eisenstadt G. Eleftheriades

F. Ellinger G. Ellis T. Ellis M. El-Nozahi M. Elsbury S. Elschner M. El-Shenawee T. Enoki K. Entesari L. Epp I. Erdin O. Ergul T. Eriksson C. Ernst D. Erricolo I. Eshrah M. Essaaidi H. Esteban C. Eswarappa W. Eyssa A. Ezzeddine C. Fager M. Fahmi Y. Fan D. Fang M. Farina A. Fathy M. Faulkner P. Fay A. Fazzi E. Fear P. Fedorenko D. Feld Y. Feng A. Feresidis A. Fernandez T. Fernandez M. Fernández-Barciela M. Ferndahl F. Fernez P. Ferrari E. Ferre-Pikal A. Ferrero M. Ferriss H. Fetterman J. Fiedziuszko S. Fiedziuszko G. Fikioris J. Fikioris I. Filanovsky F. Filicori D. Filipovic R. Fletcher B. Floyd H. Foltz N. Fong B. Fornberg F. Fortes K. Foster P. Foster P. Franzon A. Frappe J. Freire M. Freire A. Freundorfer F. Frezza I. Frigyes R. Frye J. Fu O. Fu R. Fujimoto O. Fujiwara C. Fumeaux C. Furse V. Fusco D. Gabbay E. Gad M. Gadringer N. Gagnon J. Gajadharsing A. Gala C. Galbraith B. Galwas J. Gambini A. Gameiro O. Gandhi B. Gao J. Gao S. Gao C. Gaquiere H. Garbe J. Garcia M. Garcia P. Garcia-Ducar F. Garcia-Vidal K. Gard P. Gardner P. Garland P. Gaudo J. Gautier S. Gedney B. Geelen F. Gekat B. Geller R. Genov A. Georgiadis N. Georgieva J. Gerdes W. Gerhard S. Gevorgian H. Ghali M. Ghanevati F. Ghannouchi K. Gharaibeh R. Gharpurey G. Ghione M. Ghovanloo F. Giannini A. Gibson I. Gil P. Gilabert B. Gimeno D. Ginste A. Goacher E. Godshalk A. Goel C. Goldsmith M. Golio M. Golosovsky R. Gómez-García A. Goncharenko X. Gong

R. Gonzalo S. Goodnick S. Gopalsami A. Gopinath A. Görür K. Gosalia M. Gouker K. Goverdhanam W. Grabherr J. Graffeuil L. Gragnani J. Grahn J. Grajal V. Granatstein A. Grbic A. Grebennikov I. Gresham A. Griol D. Grischowsky S. Grivet-Talocia E. Grossman S. Gruszczynski T. Grzegorczyk S. Guenneau T. Guerrero S. Gunnarsson J. Guo Y. Guo C. Gupta M. Gupta R. Gupta R. Gutmann W. Gwarek R. Habash S. Hadjiloucas D. Haemmerich M. Hagmann S. Hagness A. Halappa P. Hale D. Ham E. Hamidi O. Hammi H. Han T. Hancock A. Hanke G. Hanson Y. Hao Z. Hao R. Harjani L. Harle H. Harris P. Harrison O. Hartin J. Hasch H. Hashemi K. Hashimoto J. Haslett G. Hau S. Hauptmann L. Hayden L. He Y. He R. Heath E. Hegazi G. Hegazi S. Heinen W. Heinrich G. Heiter M. Hella R. Henderson F. Henkel B. Henning D. Heo K. Herrick F. Herzel J. Hesler J. Hesthaven K. Hettak H. Heuermann P. Heydari A. Hietala A. Higgins A. Hirata J. Hirokawa M. Ho K. Hoffmann R. Hoffmann E. Holzman V. Hombach J. Hong S. Hong W. Hong K. Honjo G. Hopkins Y. Horii J. Horng T.-S. Horng J. Horton K. Hosoya M. Hotta J. Hoversten J. Howard M. Høyerby H. Hsieh L. Hsieh C. Hsu H. Hsu J. Hsu C. Hsue R. Hu C. Huang F. Huang H. Huang P. Huang T. Huang J. Hubert W. Huei A. Hülsmann A. Hung C. Hung J. Hung I. Hunter I. Huynen H. Hwang J. Hwang K. Hwang R. Hwang G. Iannaccone K. Ikossi M. Isaksson T. Ishizaki

Digital Object Identifier 10.1109/TMTT.2012.2234393

S. Islam M. Ito K. Itoh T. Itoh Y. Itoh A. Ittipiboon F. Ivanek D. Iverson M. Iwamoto D. Jablonski D. Jachowski C. Jackson D. Jackson R. Jackson A. Jacob K. Jacobs S. Jacobsen D. Jaeger J. Jaeger S. Jagannathan N. Jain G. James M. Janezic S. Jang M. Jankovic D. Jansen L. Jansson H. Jantunen H. Jardon-Aguilar J. Jargon N. Jarosik B. Jarry P. Jarry A. Jastrzebski B. Jemison W. Jemison S. Jeng A. Jenkins S. Jeon D. Jeong J. Jeong Y. Jeong A. Jerng T. Jerse T. Jiang X. Jiang G. Jianjun D. Jiao J. Jin J. M. Jin J. Joe T. Johnson B. Jokanovic U. Jordan K. Joshin J. Joubert S. Jung T. Kaho S. Kanamaluru K. Kanaya S. Kang P. Kangaslahti B. Kapilevich I. Karanasiou M. Karim T. Kataoka A. Katz R. Kaul R. Kaunisto T. Kawai S. Kawasaki M. Kazimierczuk L. Kempel P. Kenington P. Kennedy A. Kerr D. Kettle A. Khalil W. Khalil S. Khang A. Khanifar A. Khanna R. Khazaka J. Khoja S. Kiaei J. Kiang B. Kim C. Kim D. Kim H. Kim I. Kim J. Kim S. Kim T. Kim W. Kim N. Kinayman R. King N. Kinzie S. Kirchoefer A. Kirilenko M. Kishihara T. Kitazawa J. Kitchen T. Klapwijk E. Klumperink D. Klymyshyn L. Knockaert R. Knoechel M. Koch K. Koh N. Kolias J. Komiak A. Komijani G. Kompa A. Konanur A. Konczykowska H. Kondoh B. Kopp B. Kormanyos J. Korvink P. Kosmas Y. Kotsuka S. Koziel A. Kozyrev V. Krishnamurthy H. Krishnaswamy C. Krowne J. Krupka D. Kryger H. Ku H. Kubo A. Kucar A. Kucharski

C. Kudsia A. Kudymov D. Kuester B. Kuhn W. Kuhn T. Kuki A. Kumar J. Kuno C. Kuo J.-T. Kuo H. Kurebayashi F. Kuroki L. Kushner S. Kusunoki D. Kuylenstierna Y. Kwon G. Kyriacou A. Lacaita J. Lamb P. Lampariello U. Langmann T. Larsen L. Larson J. Laskar C. Lau K. Lau A. Lauer D. Lautru P. Lavrador A. Lavrinenko A. Lazaro G. Lazzi R. Lech B. Lee C.-H. Lee C. Lee H. Lee J. Lee J.-H. Lee K. Lee R. Lee S. Lee T. Lee Y. Lee D. Leenaerts Z. Lei G. Leizerovich K. Leong Y. Leong R. Leoni C. Ler G. Leuzzi B. Levitas R. Levy C. Li L. Li M. Li X. Li L. Lianming C. Liao S. Liao D. Lie E. Lima E. Limiti F. Lin J. Lin K. Lin T. Lin Y. Lin S. Lindenmeier A. Lindner F. Ling D. Linkhart P. Linnér D. Linten D. Linton D. Lippens F. Little V. Litvinov C. Liu H. Liu J. Liu K. Liu Q. Liu S. Liu Y. Liu Z. Liu A. Llewandowski O. Llopis I. Lo L. Locht A. Loke K. Lonngren T. Lopetegi N. Lopez U. Lott G. Lovat D. Lovelace Z. Low C. Lu L. Lu S. Lu Y. Lu V. Lubecke S. Lucyszyn D. Ludwig N. Luhmann M. Lui J. Luy G. Lyons A. M. Niknejad K. Ma T.-G. Ma Z. Ma S. Maas P. Maccarini G. Macchiarella J. Machac B. Machiels M. Madihian A. Madjar G. Magerl S. Magierowski R. Mahmoudi I. Maio F. Maiwald A. Majedi H. Majedi M. Majewski M. Makimoto R. Makinen D. Malocha J. Manges

R. Mansour D. Manstretta J. Mao S. Mao F. Maradei A. Margomenos D. Markovic E. Márquez-Segura J. Martens F. Martin E. Martini K. Maruhashi J. Marzo D. Masotti A. Massa G. Massa F. Mastri J. Mateu A. Matsushima M. Mattes G. Matthaei K. Mayaram M. Mayer U. Mayer W. Mayer J. Mazeau S. Mazumder A. Mazzanti G. Mazzarella K. McCarthy G. McDonald I. McGregor M. McKinley J. McLean D. McQuiddy A. Mediano F. Medina M. Megahed I. Mehdi K. Mehrany A. Melcon R. Melville F. Mena D. Mencarelli C. Meng R. Menozzi W. Menzel P. Mercier B. Merkl F. Mesa R. Metaxas A. Metzger P. Meyer P. Mezzanotte E. Michielsen A. Mickelson D. Miller P. Millot J. Mingo F. Miranda D. Mirshekar A. Mirzaei S. Mitilineos R. Miyamoto K. Mizuno J. Modelski W. Moer M. Moghaddam A. Mohammadi S. Mohammadi A. Mohammadian P. Mohseni E. Moldovan M. Mollazadeh M. Mongiardo P. Monteiro J. Montejo-Garai G. Montoro J. Monzó-Cabrera J. Morente T. Morf D. Morgan M. Morgan A. Morini A. Morris J. Morsey A. Mortazawi M. Moussa M. Mrozowski Q. Mu J.-E. Mueller J. Muldavin K. Murata S.-S. Myoung M. Myslinski B. Nabet V. Nair K. Naishadham Y. Nakasha M. Nakatsugawa M. Nakhla J.-C. Nallatamby I. Nam S. Nam J. Nanzer T. Narhi A. Nashashibi A. Natarajan J. Nath A. Navarrini J. Navarro J. Nebus R. Negra J. Neilson B. Nelson P. Nepa A. Neri H. Newman G. Ng D. Ngo E. Ngoya C. Nguyen E. Nicol A. Nicolet S. Nicolson E. Niehenke M. Nielsen K. Nikita P. Nikitin N. Nikolova M. Nisenoff K. Nishikawa T. Nishino

G. Niu B. Noori C. Nordquist B. Notaros K. Noujeim D. Novak I. Novak G. Nusinovich K. O I. Obeid J. Obregon R. O’Dea M. O’Droma M. Odyniec J.-E. Oh T. Ohira E. Öjefors H. Okazaki V. Okhmatovski A. Oki M. Okumura G. Olbrich S. Olson F. Olyslager A. Omar K. Onodera B.-L. Ooi S. Ootaka H. Oraizi G. Orengo A. Orlandi R. Orta J. Ortega-Gonzalez S. Ortiz S. Otaka B. Otis K. Ozdemir T. Ozdemir O. Ozlem P. Paco R. Paknys S. Pal Y. Palaskas D. Palmer S. Pamarti G.-W. Pan S.-K. Pan A. Panariello K. Pance J. Papapolymerou S. Parisi C.-S. Park E. Park J.-S. Park M.-J. Park S. Park W. Park A. Parker T. Parker D. Pasquet M. Pastorino H. Pau S. Paulotto A. Pavio D. Pavlidis W. Pearson J.-C. Pedro S. Peik S. Pellerano G. Pelosi M. Pelosi D. Pelz R. Pengelly J. Pereda F. Pereira A. Perennec B. Perlman D. Peroulis L. Perregrini K. Per-Simon M. Persson M. Petelin A. Peterson A. Petosa O. Peverini U. Pfeiffer A.-V. Pham J. Phillips H. Pickett M. Pieraccini L. Pierantoni B. Pillans S. Pinel Z. Ping M. Pirola S. Pisa G. Pisano D. Pissoort D. Plant C. Plett J. Plumridge C. Pobanz A. Poddar F. Podevin R. Pogorzelski G. Ponchak A. Poon D. Popovic Z. Popovic J. Portilla M. Pospieszalski A. Pothier K. Pourvoyeur J. Powell H. Powen R. Prabhu L. Pradell S. Prasad D. Prather A. Priou S. Pruvost Y. Qian R. Qiang J. Qiu T. Quach X. Quan R. Quay C. Queck C. Quendo R. Quéré F. Quesada F. Raab V. Radisic

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