Practical Transistor Circuit Design and Analysis 0070996725, 9780070996724

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practical transistorcircuit design and analysis Geraid E. Williams RiversideCity College

NILA

TATA McGRAW-HILL PUBLISHING COMPANY LTD. New Dethi

To my wife Patty for turning a long and difficult project into a loving and sharing experience

PRACTICAL TRANSISTOR CIRCUIT DESIGN AND ANALYSIS

Copyright © 1973 by McGraw-Hill, Inc. All Rights Reserved.

Nopart ofthe publication may be reproduced, stored in a

retrieval system,or transmitted, in any form or by any means,

electronic, mechanical, photocopying,recording, or otherwise, withoutthe prior written permission of the publishers.

T MH Edition 1976 Ninth Reprint 1991

RZRQLRYMRLLXD

Reprintedin India by arrangementwith McGraw-Hill, Inc., New York.

This edition can be exported form India only by the publishers, Tata McGraw-Hill Publishing Company Limited.

Published by Tata McGraw-Hill Publishing Company Limited 4/12 Asaf Ali Road, New Delhi 110 002/andprinted at

Raj BandhuIndustrial Co., C-61, Phase-II, Mayapuri New Delhi 110064.

contents ;

BOOK ONE FOUNDATIONS

1

Chapter 1 A Bit of Physics

3

4-1

TheStructure of Semiconductor Crystals

1-3

Conduction in Semiconductors

The Structure of Semiconductor Materials

1-2.

n-type Semiconductors p-type Semiconductors

1-4 1-5

5

6

9

9 11

at

Chapter 2 The p-n Junction (

.

2-1

TheJunction Diode

20

The Forward-biased Diode

23

Junction Switching Time

30

2-2 2-3 2-4

The Transition Zone The Reverse-biased Junction Junction Capacitance

2-6 2-7

Reverse-bias Leakage Current Forward-bias Leakage Current

2-5

2-8

TheResistance of a Junction Diode

2-9

17 20 22 23 25 26 30

The Transistor as a Practical Amplifier

35

3-1 3-2. 3-3 3-4 3-5

TheStructure of the Transistor The Nature of Transistor Amplification Maximum Collector Current {I¢(Max)] Maximum Collector Voltage (Ec(Max)] Leakage Current, Icy

38 39 44 45 46

3-8

Input Impedance R,, (Common Emitter and Common Collector)

Chapter 3

3-6 3-7

3-9 3-10 3-11 3-12 3-13

Current Amplification in the Common-emitter Circuit Output Resistance in the Common-emitter Circuit

Voltage Amplification in the Common-emitter Circuit Power Amplification in the Common-Emitter Circuit The Common-base Circuit The Common-collector Circuit The Hybrid Parameters

47 51

55

58 62 63 65 66

vii

4 Biasand Stability 41

4-2 4-3 4-4 4-5

The Conceptof Transistor Bias The Causes of QuiescentCollector-current Drift

An Introductionto the Principles of Feedback Stabilization

Holding the Quiescent Collector Current Steady in Spite

of Base-emitter Voltage Variations Holding the Quiescent Collector Current Steady in

94

Analysis ofthe Current-mode Common-emitter Circuit 7 “The Second Example and Explanation theEmitter-biased Circuit (an Example) the Voltage-mode Common-emitter Circuit (an

Spite of Variations in Leakage Current and 8 (Using

Current-mode Feedback)

TheStability Factor: Its Meaning and Implications

Voltage-mode Feedback

Nonlinear Compensation—an Alternative Scheme

_ BOOK TWO TECHNIQUES

Chapter 5 Practical Design Procedures for

Amplifiers with Current-mode Feedback

5-1 5-2

5-3 5-4 5-5

A Flowchart of the Design Process

Howto Select and Use Important Parameters

The Design Procedure

The Current-mode Universal Design Sheet How to Avoid the Impossible

103 109 118

yhase Amplifier

mon-collector Circuit with Base Bias

ommon-base Circuit

125

‘a Circuit Where Both Voltage-mode and

modeFeedback Are Used d Multistage Circuits

127

"The FullyBypassed R-C-coupled Amplifier

134

Cascading Split Emitter Stages

134 142 154 163

_ R-C-coupled Circuit with Two-stage Feedback Inductive Coupling

Untuned Transformer Coupling

TunedTransformer Coupling

nanepter 6 Designing for Higher Voltage Gains

q m7 eae

ke Be

61

6-2 6-3 6-4

Chapter 7 7-1 7-2

7-3 7-4

The Fully Bypassed Circuit

Designing the Fully Bypassed Common-emitter Circuit Designing a Split Emitter Circuit

The Common-emitter Circuit with Emitter Bias Potpourri

7-6

Designing the Emitter-follower Circuit with Emitter Bias Bootstrapping the Emitter Follower

UsingDiodes as Coupling Elements Collector-to-base Direct-coupled Circuit with Two-stage

207

221

231

Designing the Common-collector (the Emitter-follower) Circuit

346 3

_ The Collector-to-base Direct-coupled Circuit

187 198

back Circuit

with Base Bias

7-5

183

222

TheSplit-load (Paraphase) Amplifier

44

181

Designing with Voltage-mode Feedback

Designing the More Versatile Case of the Voltage-mode Feed-

340

242 248

258 262

Pe

Voltage-mode Feedback

The Darlington Pair Compound

Chapter 11 The Amazing Differential Amplifier Some Basic Theory

A Design Example: The Basic Differential Amplifier

_ The Active Emitter Resistor Practical Gain Control and Balance Control

Increasing the Input Impedance ofthe Differential Amplifier

Cascading Stages of the Differential Amplifier

371

378

385

12 Power Amplifiers and Regulators 12-1

Power and Efficiency

12-3

Improving the Performance of the Basic Direct-coupled

12-2 12-4

12-5 12-6 12-7.

421

423

The Direct-coupled Class A Emitter Follower Power Amplifier

425

Class A Amplifier

430

The Complementary Symmetry Power Amplifier

435

An Improved Version of the Complementary Symmetry Amplifier with 13 W rms Output Power

446

The Class A Amplifier Applied to Regulator Service

452

The Quasi-complementary Symmetry Amplifier

Appendix

451

455

Part 1

Tables of Possibilities

455

Part 3

Sample Design and Analysis Sheets

472

Part 2

Miscellaneous Tables

Answers to Selected Problems and Questions Index Book One Book Two

463

481 483 483 486

‘

e this book by explaining that this is a totally different

transistors. Designers who are familiar with the intricacies of| device parameters, and device-oriented procedures, may ther at first, but a little study will convince them that the t .s a new breed of methods and procedures that are not only far e older established procedures, but are also more powerful, in

mn technological developments.

“uswho have gone through the agony of learning to design d parameters are bound to resent learning a new system and ‘effort, but I personally have gone entirely to the system book, and the results have been so spectacular that I no about it. I have also found that the effort of learning r was not entirely wasted because that knowledge helped me n the methods I present here, and has provided valuable insights these methods work so well. In this book I offer you a simple, practo the design and analysis of transistor circuits. What is r important, I hope to give you anintuitive “feel” for transistors.

This book is designed for anyone who must make transistor circuits

either as a primary part of his profession or simply as something necestoget on with the job at hand. The methods | offer you here have been Jaboratory-tested by hundreds of students over an eight-year period, and they work consistently and well. In addition to time-proven results, these thods ofdesign and analysis have the added advantage of much greater y than any other methods I know of. The approach is unique in that ted, not device-oriented, and there are several advantages to a

circuit-oriented scheme.

To begin with, the parameters of a transistor vary so greatly both in manufacturing tolerances and with changes in temperature that knowledge of the parameters of a typical transistor of a given type number is of dubious value. Secondly, any design process based on device parameters must ultimately design outthe transistor’s parameters, if the circuit is to function and be stable with changes in temperature. The desired endresult is always a circuit which performs a particular job as the designer intended, and whatever the design process (and there are several), it eventually, often after much ef-

fort, becomes circuit-oriented.

A circuit-oriented approach does not require precise knowledge of tran-

sistor parameters; this simplifies things considerably. The methodsof analysis in this book are intimately related to circuit-oriented methods ofdesign (a logical extension of them) and as such do not require a knowledge of the parameters ofthe transistors involved to analyzea transistor circuit quantitatively. This is of great practical advantage, because circuits encountered in xi

‘the field’ which must be analyzed often containtransistors about which nothing atall

is known. Integrated circuitry is part of the current technical cene, and device-oriented analysis techniques are almost certain tofall short _ as tools for the analysis of integrated circuits. It is almost a certainty that parametersof individual transistors on a chip will not be availabl e to the technician or designer.

And, if history is any guide, even overall integrated circuit perfor mance

data will often be lacking when the IC is a part of a commercial sys tem. If a schematic diagram of the IC is available, the important performance data can be analyzed out of the schematic. Device-oriented methods cou ld be used by making educated guesses about parameters and plugging thoseinto the appropriate equations. Atbestthis is a makeshift procedure. WhatI off er youhere is a tool which is appropriate to the new technology, and one whic his far faster and simplerto use than anyof the device-oriented approaches. The methods of analysis presented in the book are tools for toda y’s technology, equally useful for integrated circuits and discrete systems. With this circuit-oriented design approach it is sufficient, for mos t design purposes, to know all maximum ratings and to have a rough idea of the transistor’s B.

Now, before you get the impression that the approach in this boo k is some newfangled, limited, and possibly totally unscientific approach, let me assure you thatis not the case atall. Virtually every technique in this book has been used for years by those people who work withtransistor s for a living, but they have, until now,been used sporadically, pragmaticall y, inconsisB- tently, and perhaps somewhat unscientifically. Wha t I have done in this book is to take those practical techniques and integrate them into a coherent, logical, and consistent scheme for designing andanalyzingtransisto rcircuits. But more than that, I have also tried to explain the theory behind each equation and the system in general. When I have taken the libe rty of dropping some variable, representing some small-order effect, from an equation, I have explained the reasoning behind that liberty. Those things that I cannot adequately explain I have tried to be honest about. The book has grownout of a one-semester second cour se in semicon-

ductors with heavy emphasis on practical applications in the laboratory. companion book, Student Exercises, is available.

Although the book

A

is complete in the sense that all the background required for desi gn and analysis is containedin the earlier chapters, this background is fairly brie f and primarily

intended for review and orientation. It is notpractical to try to coverall the

material in the book in a single semester, unless the stud ent has had some Previous transistor theory or unless unusually large time blocks are used. There will, of course, be some mathematics involved. Withou t mathematics you could not design a bread box or a birdhouse, for design is by definition a process by which the details of something to be constructed are

good, allelements will fit together

Paapintended for it. ‘That is what this here work! They have been tested nted they were right, and results have been Some basic electronics math anda little ding of network theory will help in the faith, butit is not absolutely essential.

divisions: theory, design, and analysis. ) serve the dual purpose of reviewing basic

snt to the kind of thinking necessary for under- —

ign, design and analysis are interdigitated throughout re-

‘ ‘ of the book(“Techniques”). of the outstanding features of the book is the branching linear

ym andits associated linear branching analysis program, which years of trying to unify the system. The book is not a protext, but the fact the design method evolved into such an iterative possible a kind of highly effective cross-referencing among 1 ised a set problems. | have devise i 8 worked examples,‘pF and design ets where a few basic steps with minor branches permit the deon transistor circuit (I have done the samefor analysis prob-

A linear segment in the design procedure (a short of graphic stepby-step procedure). A single step in the design procedure. f A short sequence of design (or analysis) steps which departs from the main program. It is these branches which accommodate individual differences amongvarioustransistorcircuits.

Thave used the same headings, field, frame, and branch, for worked a is tomatic i auto ing and problems, so that cross-referencing i explanations, 9 amples, m and oie Theiterative design and analysis programsalso allow a significant spiral reinforcementsituation that is pedagogically desirable, but not noimally easy to obtain. This basic structure makes individualized instruction’ practical approach, becauseofits inherentflexitility.

and

to the instructor

TABLES OF POSSIBILITIES One of the mostdifficult areas in design is that of designing within practical limits. ; When there are as many different parameters involved as there are in a transistor circuit, it is often possible that the finished circuit will require some voltage, current, or impedance whichis either impossible or impractical. Onesignificant contribution of this bookis a set of tables of possibilities

These tables substitute for years of experience in that even the most inex ert

enced designer éan, with their aid, always come up with not only a Ganka

circuit, but also a convenient circuit design, one which meetsall s: ccifica,

tions without demanding inconvenient voltages, currents, or fapedanes In sense, the tables of possibilities allow the designer to look into the future andto be certain of a practical finished product. The absenceof welldefined workinglimits has always been (in my view) one of the most serious omissions of design-oriented textbooks. I have tried to remedythat fault in this book. Perhaps the most important aspect of the approach in this bookis

ter along with

ing of each chap inn beg e th t eda lud inc are s ive ect obj al or vi ha Be

through 12 the emphasis is 5 s. ap Ch In s. od th me ion uat val f-e sel °¥ one or more circuits, and so there are ire ent e yz al an or gn si de to y lit abi t's ‘the studen l-world self-

d the finalrea an rs te ap ch e es th of ch ea in s ive ect obj ted sta analysis) are (or gn si de in ms le ob Pr y. tor ora lab e comes in th used as a prelimbe to ed end int are t bu rs, pte cha e es th at the endof laboratory. The e th in nd ha his es ri het ore bef ion uat ‘student self-eval circuits that really gn si de t en ud st e th n Ca : nd ou gr g in ov pr e th ory is Student to specifications?

performance. These le ab pt ce ac for s ine del gui me so e id ov pr to s used in this text is ‘cannot be absolute, because the method espo pend upon your fect, like everything in this world. I must de ation to help you form , but I have tried to supply statistical inform

that it works so well with students. My colleagues and I have been delighted

ae = ali In the end, the crucial question about any textbook is, Does rir do the students learn from it?” The answer here is a most Tables of possibilities and design (and analysi: appropriate in the text, but they are eed ane faeGeesethe:ate make reference to these essential items easy, I have put them all together as oe at the back of the book. You will also find other often-used Gerald E. Williams

I have tried in both the text and

listic evaluation standards.

long overdue, on indiThere is much emphasis these days, and it is in conjunc!tion with the laboratory manual

vidualized instruction. This text ide an ov pr n ca e) ag ck pa e th of rt pa l ia nt se es an be (which I consider to claim credit for ly st ne ho ’t can 1 on. cti tru ins in ty li bi xi degree offle

‘unusual and tables of ets she ign des the but , ion ect dir s thi in ght esi any unusual for ce for individualized our res y mar pri a as le uab val t tex s thi ke possibilities ma instruction. ined text and Student mb co the of ial ent pot he dt ize ogn rec I s na ‘As soo whatI could to did I on, cti tru ins ed liz dua ivi ind of ion ect dir the in Exercises ent that this book is detem sta the de ma ve ha I . ial ent pot t ha tt augmen have designed the text with I gh hou alt , son rea t tha For t. den stu the to voted tted nearly all the jaromi e hav I d, min in s que hni tec al ion cat edu est the lat Answers to the questions ed. olv inv gy olo min ter al ion cat edu l ia ec sp gon and ended to function as a modint are ) ons sti que e (th y the d an ed, vid pro are not dent must search out answers stu the e er wh g in mm ra og pr t unc adj of rm fo ified and analysis problems are priign Des . wer ans not can he ons sti que se tho to t the stated me has he l wel w ho te lua eva t den stu the p hel marily intended to the back of the provided in behavioral objectives, and selected answers are

book.

pare

kys b.

acknowledgments I would like to express my gratitude to those who havecontributed so mucl

ee . of themselves in helping me with this book: To my wife Patty for her contribution in making all the many line—

drawings and schematic diagrams, which are so essential to a work os

this kind.

To Professor Denton Titus for his faith and encouragement.

To Edward Youngfor his careful and excellent laboratory work.

To Professor W. Paul Matthewsfor his courage in teaching the ideas in

this book whenthey were onlyhalf-baked,for his faith that those ideas would someday becomefully baked, for his ability always to teach a good course in spite of constantly changing and evolving ideas, and for his many ideas which helped so much to makethis text possible. To Toni Ducasfor all her help.

To Lenore Gibson for outstanding typing ofa difficult manuscript.

To mychildren Geoffrey and Kelly for being so patient, understanding, — andhelpful whentheir dad wasn’t giving them theattention they so deserve. To Professor R. T. Burchell for his computer work in correcting the problemsin the split emitter table of possibilities. To Mr. Roy Carrfor translating the design and analysis sheets into com-

puter programs.

1 a bit of physics _ SELF-EVALUATION ‘In thesefirst few chapters I shall often ask you to make somesketches, define some terms, and perhaps do a few other things, and then I will ask you to explain something to another person, using your drawings, definitions, etc. — You probably will be reluctant, at first, to involve someone else in this way, and you will-find any numberof excuses to avoid doing it, or willtry to con. vince yourself that writing the explanation or explainingit to yourself will do well. This kind ofreluctance is almost universal, andit is not because st re don’t want to bother another person, but rather that we are afraid of

makingerrors,,faltering, getting confused, showing our ignorance, or seeming — . The reason for trying to explain things to someone is to help spot gs that you do not really understand. Anyteachercantell you that ter way to learn something than tryingto explain it to someone. lecture on a subject for thefirst time, I spot holes and inlecture and find myself doing some additional studying for my ego the students seldom catch mein these aati e problems before I give that lecture again. (They t me.) If I didn’t do someadditions! study and give the , sooner or later, some bright student would catch me,

and my Be

get bruised. It is not necessary that the person you use

should know ee aboutthe subject; he must simply be a goodlistener. You will catch your own deficiencies, and if you don’t follow upin correcting them,youtoo will someday get caught. An alternative procedure (although not as good)is to lecture to a tape recorder and then play it back as though you were a student and this was a disliked instructor, whom you would like to catch, in a mistake—any mistake. Ask yourself, “If 1 were paying $40 per unit to hear this

guy lecture, would I be satisfied with this performance?” Try these methods

andsee if they don’t provide you with a goodself-evaluation of how well you understand what you have learned. I have also prepared some questions for you to answeras a self-test. You may combine these methods in any waythat suits your particular learning style.

3

A BIT OF PHYSICS 5

; the nature of conduction in semiconductors and theeffect of heat uponthat conduction. Our preoccupation with temperature may seem at

OBJECTIVES: ,

(Things you should beable to do upon completion of this chapter.)

1.

e

influence heat has upon the operating characteristics of semiconductor deA 3 vices.

List the three classifications of matter according to conductivity.

2. Define semiconductor. 3. Name the primary factor which governs the amount of current flow throughan intrinsic semiconductor material. 4. List the two ways in which semiconductorcircuits can be made less tem-

1-1 THE STRUCTURE OF SEMICONDUCTOR CRYSTALS There are three moreor less distinct classes of materials according to their conductivity:

perature-dependent.

5. Define doping.

6.

7.

_ _

times to border on paranoia; this is only natural because of the tremendous

Define n-type semiconductor.

Define p-type semiconductor.

8. 9. 10. 11.

Define valenceelectrons. Define covalent bonds. Define hole. Define donor.

13. 14. 15. 16.

Define electron-hole pair. Define dangling bond. Define majority carrier. Define minority carrier.

12.

17. 18.

1. 2.

3. Semiconductors, which are really insulators driven into conduction by heat

Define acceptor.

At absolute zero (—273°C) semiconductors would be excellent insulators.

From there on up, the higher the temperature, the better conductors semicon-

ductor materials become.

Define intrinsic semiconductor.

List the common dopant elements.

SELF-TEST

&

;

INTRODUCTION

There are two aspects of semiconductor physics which are ofvital im-

um

gel

an increase in temperature of only 10°C will double its conduc-

So you see, the temperature, over which we have no control, exert more influence upon the current than the voltage, which we customarily di

The physics of semiconductor materials is a frighteningly complex subject,

pee concepts whichwill be essential later on, along with a few necessary etails.

Within the range of temperature in which humanlife can exist, semiconductors range from poorto fair conductors. And yet the picture is not quite complete because this change in conductivity with temperature is not a simple linear relationship. By this I mean that doubling the temperature does not double the conductivity of a piece of semiconductor material. In fact, in

Tfwe take a block ofsilicon or germanium, the two currently most imit semiconductors, and connectit in the circuit in Fig. 1-1, we will find that the currentin the circuit will gradually increase as the temperature of the block increases. We would also expectthe currentto increaseif the voltage is increased, and it does. But increasing the voltage increases the current only proportionally, obeying Ohm's law, while increasing the temperature in creases the current (without changing the voltage) at an exponential rate

Describe conduction in an intrinsic semiconductor block, in a p-type semiconductor, and in an n-type semiconductor to someone,usingthelists, definitions, etc., in objectives 1 to 18.

but no matter how complex you makethe explanation, it is bound to be only partly the truth. If we mustbe liars by omission, let us try to adopt those half-truths that will be the most useful. I shall hit the high points and leave you to spend aslittle or as much timeas you likeinfilling in the valleys I leave between. WhatI shall try to do is provide you with the shape and form

Conductors, which are mostly metals Insulators, which include manykinds of materials from wood, a complex organic material, to glass, whichislargely silicon and oxygen

oe

control.

There are two ways in which wetry to cope with this temperatur

problem and make the current more voltage-dependent than temperature dependent. First, free electrons are made available in large quantities b ‘In silicon each 10°C increase in temperatureresults in three times the conductivity of the 1(

lower temperature.

A BIT OF PHYSICS 7

their normal prescribed boundaries, but small enough to enable thermal — energy to moveelectrons beyond the normal boundaries. These so-called valence electrons are only lightly bound to the atom. These inertial forces are

small (about 0.05 electron volt), but it is not natural for the electrons to be bound within a solid by these minimal forces alone. Large numbersof atoms,

>

especially in certain crystalline solids, tend to form additional electrostatic

Block of semiconductor material

bonds which keep the electrons belonging to a specific “grain” within the

boundaries of that grain. The behaviorof electrons in this situation is too

complex for easy comprehension. Atthis point we reach fork in the road.

Heatsource Fig. 1-1 Heat and conductivity in a semiconductor adding certain impurities in controlled amounts to the semiconductor mate-

1-2 THE STRUCTURE OF SEMICONDUCTOR MATERIALS Two semiconductor materials have been the mainstayof the transistor industry for as long as there has been a transistor industry. These aresilicon and germanium, and they are both elements. Compounds suchas gallium arsenide and silicon carbide have been used, but they have not yet presented any real threat to germanium andsilicon. Germanium and silicon are both tetra-valent elements. This simply meansthat there are four electrons in the

seanee

tial. These impurity-produced electrons are not temperature-dependent, but voltage-dependent, and they are under our control. The device manufacturer takes care ofthis part; we, as users of the device, have no responsibility for it. The second method ofrestricting temperature-controlled current will be the main topic of the rest of this book; it simply involves proper circuit design.

Onefork leads in the direction of nearly unending complexity, where human imagination becomes strained and understandingis traded for “rigor.” The other path leads to a model which, though far from complete,has the distinct advantage of beingeasy to visualize. We shall take this more understandable route, for it is quite adequate for our purposes —it will serve. Germanium andsilicon are both tetra-valent. That is, they each have four free electrons in their outer orbits. When there are many atomsofsilicon or germanium in their natural crystalline form, an electron-sharing phenomenon occurs. Theresultofall this complex sharing behavior is as though the formerly free valenceelectrons had become bound to their particular places in the crystal structure. Figure 1-2 showsa stylized diagram of this so-called covalent bond. An electron around an individual silicon atom would require only 0.05 electron voltto free it from the atom. A large numberof atoms form covalent bonds which bindthe electron to a pair of atomssotightly that it

takes about 0.7 eV to break the electron free.

These covalentbonds, in semiconductors, arestill so weak that many of themare broken at any temperature above absolute zero. The higher the tem-

atom’s outermost orbit. These outlander electrons ar¢ the only ones that can

leave the atom. A In whatever “model” we choose to adopt, we shall find that electrons behavedifferently when there are many atomsin close proximity. In the vase of metals, the valence electrons retain nearly complete freedom of movement _all through thestructure. This high degree of freedom of valence electrons makes metals good conductors. Insulators, on the other hand, tend to form telatively strong electrostatic forces (bonds) which prevent valence electrons

from leaving specific grain boundaries within the solid. Aggregates of semiconductor atomsform crystalline structure in which the electrostatic forces that tend to restrict electron movement within specific grain boundaries are

only moderately strong. These forces in semiconductors are great enough to Tequire quite large external electric fields to force valence electrons beyond

— electrons sis ates! by only, oe Seaton volt

Covalent bonds are bound by about 07 electron volt

O33} c)

() o) Fig. 1-2 Covalentbonds. (a) Isolated germanium atomshowing the nucleus and valence electrons; (b) a group of germanium ‘atoms with additionalcovalent bonds

A BIT OF PHYSICS 9

perature, the more covalent bonds are broken . Whenever a i fuptured by thermal energy, an electron becomes free to eae,earee be moved by an electric field, if one is pre sent. When the electron leavesits home in thelattice? it leaves behind a dan gling bond. This dangling bond has a definite attraction for any electron passing close by, and may captureit if it strays too near. The dangling bondis called a hole, in semiconductor parlance, and becauseofits attraction for ele ctrons it is conveniently treated as though it were a positively charged body. Onceweagree to treat the hole as a bonafidepositively charged particle, we must accord it all the rights and privileges of a duly authorized, charged bod y. Strange as it may seem, one of these privileges is mobility; the hole must hav ethe freedom to move through the us: just as the electron does. a

1-3 CONDUCTION IN SEMICONDUCTORS Whenthere is noelectric field involved,free electrons are pretty evenly distributed throughoutthe block of semiconductor. Electrons are also being cap-

tured by dangling bonds (holes), and each capture results in the afnihilation of an electron-hole pair. You see, when an electron is captured by d hole, the hole no longer exists and the electron is no longer a free electron. Electronhole pairs are constantly created and destroyed in about the same numbers. A kindof equilibrium is established. This uniform distribution is upset whenan electric potential is applied across the block. Electrons zip to the positive end of the block as soon as they becomefree. Now,electron-hole pairs are being formed at both ends of the block (in the middle, too) at about the samerate, but owing to the electric | field, there is a heavy concentration of electrons at the positive end and a deficiency of electrons at the negative end. Meanwhile, those holes which are beingcreatedat the negative endofthe blockare not capturing electrons, for there are almost none available to capture. They have defected to the other side. So, at the negative end of the block we have an excess ofholes. At the positive end of the block there is such an abundance of electrons that holes are filled as soon as thermal energy generates them. Wenowhavea block of semiconductormaterial with a high concentration ofelectrons at one end and high concentrationof holes at the other. Is it so farfetched to say that electrons have movedto the positive end of the block while holes have movedto the negative end? Well, perhapsit is, but it

r is concept of hole mobility is, of course, a fiction, but a ve

an bit offiction. Although wecannotreally visualize holes mariage Heo He an electric field, we can eas ily visualize changing concentraSuppose we make a simple sketch to demonstrate. See Fig. 1-3, in wh v ich is an electron whose covalent bondh as been brok id its freedom. The dangling bondA is the hol e. ih mace eee * The geometric structure of a crystal.

is a very convenientwayto viewthe situation. It is so convenient that every-

bodydoes it. As a matter of fact, we shall find it a hard view to do without.

AsI said before,in the pure semiconductorall available carriers, holes

and electrons, are the result of heat-ruptured bonds. Conduction characteristics can be controlled by providing controlled amounts of electrons (or holes) which do not depend uponheatfor their freedom.

Ifa small quantity of some impurity with five valenceelectronsis introduced into the crystal, we gain onefree electron. Figure 1-4 is a sketch of howthis

comes about.

»

)

(s)

1-4 n-TYPE SEMICONDUCTORS

The atom in the centeris called a donor, because it donatesa free electron to the cause. In addition to having five valence electrons, the donor atoms mustfit into the crystal structure comfortably. Thisrestricts available donors to a few members of the ninety-odd natural elements. Two of the

Fig. 1-3 The formingof electron-hole pairs

Pee @

A-A dangling bond (hole) 8~An electron which has been freed by thermal energy

most commondonoratoms are arsenic and phosphorus. There may be somewhere in the neighborhood of one impurity atom to each one hundred thousandto one million atoms ofsilicon or germanium. If this relatively small

electron-hole pairs, has only free electrons. At ab wouldbea picture,but at normal temperatures heat-ruptut

yield electron-hole pairs. The thermally produced electrons simp]

»donor electrons and become members of the group. The holes are

formists; they form a small minority that always takes a direct opposition to the direction taken by the majority. E SEMICONDUCTORS

# to make practical semiconductor devices, we need another type of tor which is the complementof the n type. This complementary — the p type; it has only free holes (at absolute zero) and no free lize that this all sounds more like alchemythan science, but let me e details of our “model” for p-type semiconductors and youwill see ; at least a convenient model ofreality. p-type semiconductors are by doping the pure semiconductor material. In this case, however, atoms have only three valence electrons. The trivalent doping

aF REPS Tee ee

A-Afive-valent impurity atom B-Afree electron (not bound by ‘a covalent bond)

Fig. 1-4 The n-type semiconductorcrystal

called acceptors, because each one contributes a dangling bond (or

the structure. These holes can accept electrons supplied from out2 the block. Again, weshall resort to a simple sketch. See Fig. 1-5.

In doping the semiconductor crystal with trivalent atoms, such as alu- ;

_ quantity of donor atoms seems hardly worthwhile,i t is because your perspec_ tive is shaped by the macroscopic world in which we live—a world where a million dollars is a lot of money, and where dollar profit for a million invested would be sloppy business indeed. In the realm of the atom, the perspective is different. For example, there are roughl y 10% atoms in a cube of

u

we have created a crystal which has, at absolute zero, no free elec-

only an abundance of holes (dangling bonds).

_ silicon 1 by 1 by 1cm. That is 10,000,000,000,000,000,000, 000 atoms in 1cm*. At the rate of one donor atom per million silicon atoms, our 1-cm*

block would havereceived 10'* free electrons from the donors. In addition to

the donatedelectrons, there are perhaps some 10" electr ons which have been freed owing to heat-ruptured bonds between silico n atoms. The majority of the electrons available to participate in conductio n are detived from the donors and are free at all temperatures above absolu te zero. In fact, at room temperature we have a system with 10' donor ele ctrons and about onemillionth of that number which are the-result of broken bonds. Donorelectrons are in the majority, and their number is essentially con stant at all usual temperatures; this is because they are not part of a cov alent bond and only 0.05

eV is required to free them. Sofar all we have accomplished by adding

donoratoms, a process called doping, is to make a less temp erature-sensitive

semiconductor with an abundanceof electrons. Because electrons are the

majority carriers—there being more electrons than hol es—and because the electrons-carry a negative charge, a semiconductor doped with donoratomsis _ called n type {n for negative). The n-type semicondu ctor, if we ignore the

i

ini

be

¢ 9

C 5

¢ )

A-Atri-valent impurity atom 8-A dangling bond(hole) Fig. 1-5 The p-type semiconductorcrystal

)

Those dangling

ds can acceptelectrons, which must be supplied by an external battery’or er source of electrons if currentis to flow through a p-type crys tal.

summary ofcon:duction in semiconductors

Be aiecaducter witt-uo field applied,

If we connect abattery across a p-type crystal, electrons jump off the

negative electrodeof the battery into nearby holes in the crys tal because they are attracted by the positive field. However, the positive end of the block not

1

, electrons and holes, are thermally generated.

holes are generated in pairs, and are distributed evenly « throughout the block.

only has holesto attractthe electrons, but also the positive field of the batt ery. Thenetresult is that electrons rush to the positive end ofthe block,fi lling nearlyall the holes at the positive end of the block but leaving many unfi lled holes at the negative end of the block.

‘Semiconductorblock

Notonly are there enough electronsat the positive end of the bloc k to fill all available holes, there are also many electrons that find no hole to fall _ into. Theresultis a high concentration offree electrons at the posi tive end of

(a)

the block. Atthe negative endofthe block theelectronsthat are injected race to the positive end of the block, bouncing lightly in and outofthe hole s at the negative end ofthe block. Theresult is a high concentration of holes at the negative end of the

b.

block and a high concentration of electrons at the positive end. It is as _ though the electrons had migrated to the positive end ofthe bloc k, while the holes had migrated to the negative end of the block. The concep t of hole Movementis crucial to the forthcoming discussion of junction diodes and transistors. Again, in the p-type semiconductor, electron-hole Pairs are being formed by heat-ruptured bonds. The holes that are generated by thermal activity join the p (positive) carriers (holes), which are the majority carr iers. Theelectrons so generatedjoin the injected electrons. In the p-ty pe semiconductor, electrons are called minority carriers, because all electrons eith er originate from outside or are the result of thermally broken bonds. There are no free electrons at absolute zero in an electrically isolated crystalof p-type semiconductor. Of course, what I have justsaid is a smallfabrication, for in practice it is rare to have such ideal control as to have no p-type impurities in an n-type crystal, and vice versa. Such mixed impurities maybendour imaginati ons a bit, but in point of fact, when one kind of impurity is sufficiently dom inant, the minor impurity may be ignored. Table 1-1 shows the most common dopantelements. Figure 1-6 shows a pictorial summary of conduction in semiconductors. TABLE 1-1. t

F

COMMON DOPANT ELEMENTS FOR SILICON AND GERMANIUM

p Type

n Type

Aluminum (Al) Boron(B) Gallium (Ga) Indium(In)

Phosphorus(P) Arsenic (As) Antimony (Sb)

%%

Intrinsic semiconductorwith field applied:

s, electrons and holes, are thermally generated. andholes are equal in number becausetheyare always formed on-hole pairs. ctrons from within the block are attracted to the positive end of the block,filling nearly all the holes in the positive end of the block.

ok er electrons in the positive end of the block, which have not been capaot by holes, are returned to the positive plate of the battery. Electrons enter the negative end of the block from the battery and rush from hole to hole toward the positive end of the block.

ae

5. The amountof current,for 4 given supplyvoltage, is a function of temperature and increases exponentially as the temperature increases. ‘The arrow shows the direction of electron travel ‘Semiconductor block

oO a0 °

"

The n-ee ietaleaiductoy has only free sletsions,: no bled at absolute

zero. Even at room temperature there would be only one thermally gen-

erated hole for each million or so dopant-supplied electrons. These free electrons are free at most ordinary temperatures, and conduction is not dependent on temperature, when a potential is applied.

=

“te

es

d.

n-type semiconductor with field applied:

Electrons are attracted to the positive end of the block. Electrons in the block are supplied by five-valent impurity atoms andare so lightly bound that they are free at most temperatures much above absolute zero. Conduction is not much influenced by temperature. A few holes, perhaps one for each million electrons, exist as the result of thermally ruptured covalent bonds. The number of gee is an exponential function of temperature.

Battery

ee a

e. p-type semiconductor with nofield appliéd: The p-type semiconductorhas only holes, no electrons, at absolute zero. Holes.are providedby trivalent impurity atoms, and their numberis not a function of temperature. Someelectrons exist in the free state owing to thermally ruptured covalent bonds, but the number is very small compared-to the quantity of holes supplied by the dopant atoms.

semiconductor with field applied:

ved in conduction through the block must be block,in this case by the battery. block move freely in and outofavailable holes.

upplied by trivalent dopant atoms, there is no d electrons captured by holes are only very

function of temperature, except that owing to addi-

Jed by thermally ruptured covalent bonds. This is a

on completion of this chapter.) junction.

carrier movement when the junction is

zone potentials for silicon and germanium.

condition of a p-n junction according to the fol-

:

ng the distribution and direction of travel in the

sed p-n junction. p ends of the block.

Show bias potential as

g the relationship between current(vertical axis) axis). Draw the graph to show conduction in ontal forward-bias directions. Label each major area of eachpoint where the curve makes an abrupt change in

time. ias failure mechanismsin a junction diode. rse-bias condition of a p-n junction. showing the junction, p and n zones,carrier distribubias potentials, direction of carrier movement (both ), and carrier distribution in the depletion zone.

zone.

2 capacitor plates and the dielectric which. form the junction capacitance.

ite numerical relationship between temperature

kage current.

showing the formationofan electron-hole pair on each Show thedirection oftravelforall four carriers: miting factors in switching time in a diode junc-

17

; ;

xe

FOUNDATIONS b. Define recovery time. c. Define junction capacitance. Write the equation for the resistance of a forward-biased p-n junction and relate the equation to the E vs. I conduction curve in objective 2c.

Define dynamic impedanceandstatic impedance. Complete the followingself-test with a score ofat least 90 percent.

affect the amountof forward current in an opercircuit? voltage affect the amountof current through a reverse-biased

circuit?

capacitance?

>storage, and whatis storage time?

ty

SELF-TEST: {Watch for the answers to these questions.) a

a:

we

oe

3.

Describe the formation of a p-n junction.

Whatis the hook voltage or potential hill at a p-n junction?

How does a semiconductor junction prevent current flow in the reverse-

bias state? Whatis the depletion zone? What happensto thermally generated electron-hole pairs when the junction diode is reverse-biased? How does conduction take place in the forward-bias Condition? Whathappensto thermally generated electron-hole pairs when the junction is forward-biased?

;

voltage affect the amountof current through a forward-biased circuit?

SELF-EVALUATION Explain junction formation to someone, using your drawing, definitions, etc. 2, Explain to someone how conduction takes place in a forward-biased diode. Start your explanation by using the E vs. I conduction curve (as a visual aid) at E= 0 V, and describe conduction events as the forward-bias voltage is increased. Explain the failure mechanism(s), and howfailure can be avoided. Useall the appropriate definitions and sketches you have preparedfor objective 2, a through e. Explain to someone how reverse bias keepslarge currents from flowing in the externalcircuit. Also explain leakage current,relating it to temperature. Describe what goes on in the depletion zone when electron-hole pairs are formed by thermal energy. Explain the relationship between temperature and leakage current. Use the sketches and definitions from objective 3a, b, and c. Explain junction capacitance. Usingthe definitions in objective 4a, b, and c, describe and explain the factors which requirea finite time (greater than simple carrier transit time) to make a diode switch from a forward-to a reverse-bias condition, and from a reverse-bias to a forward-bias condition.

affect the amountof reverse current in an oper-

ure

shies influence the junction capacitance? hip and explain its meaning.

ae whatis the zener knee in a junction diode?

e condition?

importantelectrical ratings of a junction diode?

failure mechanisms in a forward-biased diode? failure mechanisms in a reverse-biased diode?

d- and reverse-bias resistances computed?

difference betweenstatic and dynamic resistance?

, read thelonglist of preview objectives and wondered why so long and involved an account of diodes when the e of this bookis transistor circuit design. The reason is simmon transistor is composed of two diode junctions back to uous crystal structure. In normal operation one junction is in

d or conducting state, while the other junction is in the or nonconducting state. It is important to understand inised t junction behavior as thoroughly as possible before tackling the

For, you see, the transistor is more than the simple sum ofits than two junctions back to back. It has a property called gain or whichgreatly magnifies someof the effects of normal junction

addition, the two junctionsin transistor are not quite indepen-

ther.

not very familiar with normal junction properties, we may

Magnified normal junction behavior for some new entity pecuar, or be confused by the relative magnitudes of amplified

quantities. We shall first examinethe basic themeandlater is upon the theme, rather than attemptto study all the varithemewill somehow emerge. So whatwearereally

.

;

eee doing in this chapteris studying junction behavior rather than the device

called a junction diode. Weshall examine the simplest two-element semiconductor device, the junction diode,butourinterest will be more in junction properties than in the device proper.

QOL

0.2or 06 typical

2-1 THE JUNCTION DIODE Thejunction diode is made by joining a block of p-type semiconductorwith a block of n-type semiconductor in a continuous crystalline structure.

There are literally dozens of manufacturing methods for accomplishing this, but most of them start by diffusing donor and acceptor impurities into a block of “pure” silicon or germanium. Thediffusion is accomplished at temperatures near 1000°C. More p-type(acceptor) impurities are introduced into one end while n-type (donor) impurities dominate the other end of the block. Within the block there is a more or less abrupttransition from p type to n material. This transition is called a junction. Figure 2-1 diagrams the junction diode. The junction diode is essentially a one-way electrical valve , a rectifier in electronics jargon. Of course, our primary interestis in the junction properties rather than the device properties; but device properties (with the exception of some powerconsiderations) are the junction properties. Therefore any disti nction

between device characteristics and junction characteristics is largely a semantic one.

2-2 THE TRANSITION ZONE If you will now glanceat Fig. 2-1, you will notice that I have drawn a vert ical line between the n-type area and the p-type area. The line seems to impl y * This requirementprecludes mechanical Joining methods.

n type

[

Ohmic connection

to semiconductor block

Junction

°o oO

O°

Wire

°

° eae p type Transition zone

O- Hole @ - Electron Region of the crystal which is depleted of 8 aren either by the absence of donor electrons or by the filling of acceptor holes '—

Fig. 2-2. The transition zone

between the two regions;i; and indeed there must be such a one whatis to preventall thefree electrons in the n-type ly diffusing into the holes in the p region, leaving neither nor holes? The question now concernsthe nature of this barng, whenthe crystal was formed,it was without a barrier began to diffuse into holes, forminga transition zone which had trons nor holes. But the process wasself-arresting and ceased a very

narrowtransition zone.

fet ihesketch in Fig. 2-2, you can see that, as the transition

wider, electrons must cross a widening area where the carriers

holes) are few and far between. The amountof recombination

p type ° ° ° °

°

°

fo}

)

Wire

Ohmic

@ — Electrons O — Holes Fig. 2-1. The semiconductor junction diode

tially as the distance from the junction increases. The ex-

rf own by the curve in Fig. 2-2. n oe are electrically neutral in the beginning, but as formed,electrons diffuse across the junction andfall into holes The side loses someofits free electrons to holes on the p n side slightly positive. This makes the area next to the side slightly negative because of the electrons that have the n side. In silicon a potential barrier equal to approxiformed, and further movementacross the junction is prohibal potential greater than the 0.6 V barrier potential is The barrier potentialis largely a function of the semin

conductor material used, and all silicon devices will have a barrier potential _ of 0.6 V,give or take a few hundred millivolts depending upon the temperature. Germanium devices will all have a barrier Potential of about 0.2 V. We Cannot mea sure this potential with a voltmeter, but we can verify its existence by applying a voltage across the device starting at zero volts, increasing the voltageto a little more than 0.6 V, and plotting cur rent against voltage on a graph. little later I will show you whatthat graph looks like.

zone. The higher the reverse-bias voltage, the wider the depleThe depletionzoneis essentially an insulator; it has no . No current flows through the junction area in the reverse-

The important thing to remember about the transition zone, from a design standpoint,

is that it establishes a minimum threshold pot ential. Current cannot flow throughthe device until a Potent ial of approximately 0.6 V is app

ON CAPACITANCE

lied across the silicon junction. This critic al voltage is sometimes called the hook voltage or potential hill.

2-3

THE REVERSE-BIASED JUNCTION

The reverse-bias condition is the “off” or non conducting condition.

7

‘consists of two (or mone) conductive plates separated by an al called the dielectrit. Although the physical dimensions erse-biased diode meetsall the requirements to become a fullor. It has two areas whichare rich in free carriers (conductors parated by the depletion zone, whichhas noavailable carri-

Figure

2-3 showsthe reverse-bias battery polarity and the hole and electron distributions in a reverse-biased junction diode. As the diagram (Fig. 2-3) shows, electrons are att racted to the posi! field (provided by the battery) at the right end of the drawing. eeu the holesin the p end of the blockare attracted to the negative pole of the bat. tery, which is connected to the left end of the drawing. Thecarriers, both _ holes and electrons, withdraw from the juncti on, leaving a kind of no-man’sDepletion zone Pe Se

ges 1080 +

E

1o°S “Ih @ — Electron

O = Hole The schematic symbol for the junction diode

Anode

Fig. 2-3.

diode

The dielectric constant of a

zone is approximately 12. The amountof capacitance in a is small enough sothat it becomesa factor only at quite high Special junction diodes are manufactured in such a way as to high capacitances (in the order of 10 pF, moreorless). e diodes are used as voltage variable capacitors in oscillator tank other applications. The capacitance of a reverse-biased junction varying the bias voltage. Increasing the voltage increases the depletion zone (dielectric), decreasing the capacitance. relatively small capacitance in a diode junction can become the a fairly large capacitor in a transistor, because capacitive effects

d along with the signal and someother intrinsic parameters.

-FORWARD-BIASED DIODE ird-bias condition is the conducting condition. Figure 2-4 shows Polarity and the distribution of electrons and holes in the forwardion. Perhaps the best way to explain the action taking place is to its involved.

Battery

P type ope

bydefinition, an insulator.

os type

Cathode

The reverse-biased junction

negative field at the n end of the device repels the free electrons oward the junction (the voltage mustbe higher than the hook voltage or © process ends atthe transition zone). positive field at the p end of the block repels the holes toward the

ction.

The arrows within the block show the direction of carrier

ements within the block. The arrows outside the block show the on of electron movement. battery voltage is higher than the hook voltage (0.6 for silicon), ons are forced through the transition zone across the junction and

s bi rse|- and revea

i

mine a x e to w o e n m i t . is s It r e i r r a ed c li lt tha supp x r a e h b th ily pr ‘electron-hole pairs. Remem thind. hole be a es av le r; ene l ma er th d ee fr been true in both p is is Th a s e e 2 e a aes with crystal. Figure 2-5 shows a saree

pib ppBattery @ — Electrons

© — Holes

@© — Electrons moving in to fill holes

Fig. 2-4 The forward-biased junction diode

into the p region. An electron crossing the junction into/the p region is promptly captured by a hole. Theelectron has left the n region,leaving it oneelectron short. The n crystal, which waselectrically neutral, now becomes oneunit positive by virtue of the fact that the crystal now has one more proton than it has electrons. This positiva charge draws an

generated within the depletion zone, thermally the direction of carrier ow sh 5 2. Fig , e n n e ' y. If you ter bat he byt ed uc od pr ld fie e th of e nc ue fl the in moves Bae on tr ec el e th t tha e se ll wi u yo A, ir pa e ol -h electron oup. The ho! ae gr n e th in s on tr ec el e th f to es ther n joi on to the hole is is B r pai e ol -h on tr ec el In . on ti nc ju e th ‘ e p group. The i junction to join the rest of the holes in th nction, where it com! i ju e th rd wa to ed ll pe re s ,i nd ha r he ot e hside of the oe . ; le from pair A. This upsets the balancein eac P a o Ss e th to on tr ec el an rs ve li de y er tt ba e th of itive pole pretal ; e th of de si n e th om fr e on s aw dr le po the positive carriers (the 4lec+ e es th d an , ed as bi dar rw fo is A r pai le ho ctronte a cane am tu ti ns co ) 2-5 . Fig in ft le he ont le ho e th d right an does rse-biased and ve re is r pai ch ea of f hal r he ot e Th t. en rr cu vae htayih = w. lo tf ren ny cur e-bias direction; it rs ve re e th in t ren cur le so e th s ti ren cur is Eloce Depletion zone

electron from the negative terminal of the battery. Oné-electron left the battery. Meanwhile, back at the p side of the block, our wandering electron has dropped into a hole. Once the holeisfilled, it is, of course, no longer a hole. Forall practical purposes, one hole has been lost while an electron has been gained by the p crystal. The p part of the crystal now has an excess electron and consequently a unit negative charge. The positive terminal of the battery draws an electron out of the righthand end of the

block to restore the charge balance in the p end of the crystal (see Fig. 2-4). Oneelectron has now left the negative battery terminal, and oneelectron has returnedto the positive battery terminal. If we can visualize some 10" to 10” electrons crossing the junction and jumping into the holes in the p region near the junction, while a like numberof electronsleave the negative terminalof the battery and a like number are returned to the positive pole of the battery, we have a rough picture of a

forward-biased diode in action. Forwardbiasis the conducting condition

for a junction diode.

@ = Electron

© — Hole Fig. 2:5 Reverse-bias leakage current

;

ae THE P-NJUNCTION 27

Nature being what it is, it is too much to expect

hip

a simple one.

each 10°Crise in temperature. However, a germanium device at 20°C has about 1,000 times the lea kage current of a similar silicon de vice; therefore, a silicon device co uld operate at over 80°C before it would have the same leakage current as a germanium device

; to eee pes relationships is to draw a graph, | examine the upper righthand quadrant, you will notice flows until the hookvoltage is reached. The small curis mostly due to thermally generated carriers within the

undesirable fact of life, silicon is gradually displacing germanium in most applications. Production purification and doping are more difficult to control with silicon than with ger manium. As result, silicon device s have only fairly recently become economically competitive with germaniu m.

quite straight, and that means that the resistance of the

at a little above Toom temperature (water boils at 100°C). Since leakage currents are generally an

2-7 FORWARD-BIAS LEAKAGE CU RRENT Thave attempted to make several sk etches illustrating leakage currents in the forward-bias condition. The tesult has been a compendium of confusion, and perhaps I have discovered the outsid e exception where one word is worth a thousand pictures. Curiously enough, it is almost as dif ficult to measure leakage currents in the forward direction as itis to illustrate them. Asa result, leakag e currents are al

ways measured in the Teverse-bias condition, and the magnitude of the forward-bias leakage is assu med, with good theoretical reason s, to be equal to

the reverse-bias leakage (at any give n temperature). The number of thermally generated electron-hole pairs is a function of temperature, not bias condit ion,

In the forward-bias condition all el ectrons

area, are reverse-biased and do not Participate in conduction in the forw ardbiased condition. As a result, ea ch time there is one electron-hole pair generated in the p area and one pair ’generated in the n area, there is one electron leaving the negative terminal of the battery and one returningtoits positive terminal. And so the leakage current is simply added to the forw ardconduction current. When

there is perhaps 1 A of current flowing in -the forward-bias direction, the addition of 1 HA or even 1 mA of leakage cu rrent will ha

rdly be significant.

soon as the hook voltage is reached,a small increase in

results in a large increase in current. But you will notice nonlinear fashion as the voltage across the junction

ues and we were to calculate junction Dugain the graph, we would find that the ses as the voltage increases. Again this change in

of little concern in a junction diode; but when it is the tion in a transistor that we are concerned with, wefind is magnified many times by the amplification of the

tice that the forward-conduction curve rises steeply and

of leveling off, implying thatthere is no limit to the current. If Forward bias current

Forward conduction

Barrier potential (hook voltage) (06 V for silicon)

'

In a junction diode leakage curren ts are generally oflittle importance , but the transist

or has the ability to amplify, and leak age currents amplified by a factor of 100 or more can be a sign ificant problem. It is timeto take a quantitative look at the nature of forward-conduction

26 The curve showingthe diode conduction behavior

we could keep the junction cool, we could run the current up quitehigh; and to some extent we do provide for junction cooling in the form of heatradiating fins and such. Butin spite ofall practical cooling efforts, junction temperature determines the upperlimits of current flow. The principal failure mechanism in a forward-biased junction is excessive junction tempera-

ture. Excessive junction temperature may occur beforeit is noticeable on the

outside of the device.

:

To avoid’ excessive junction temperature, we must pay attention to the manufacturer's instructions concerning maximum voltage, current, and mounting arrangements. The manufacturer has probably burned out a numberof the devices in determining theseratings, andit is foolish for us to repeat his efforts. However, it is wise to assume that his tests were con-

ducted in outer space or under some other conditions which weare notlikely

to encounter and to operate only up to 80 percent or so of the manufacturer’s maximum ratings. How conservative we canbe is often determined by

cost factors; and although a 100 percentsafety factor might be desirable, it

mightalso cost too much. conduction curveare: 1. 2. 3.

E i os

The principal points of interest on the forward-

The hook voltage ° The variation in junction resistance (the nonlinearity and slope of the

curve)

The failure mechanism: excessive junction temperature.

Now, let us take a look at the reverse-bias part of the curve in the lower Teft quadrantof Fig. 2-6. You will notice that increasing the reverse-bias voltage increases the reverse current only slightly until a critical voltage called

the zener point is reached. At the zener knee of the curve the current suddenly rises from microamperes to milliamperes or amperes. There are actually two principal mechanisms involved in production of this current: field

emission and ionization bycollision.

_

As we increase the voltage in the reverse-bias direction, the depletion

zone becomes wider and wider. At some critical point the field is large enough and the path a carrier can travel without colliding with an atom is

long enough so that an electron can gain enough momentum tostrip electrons from atoms with which it collides. The dislodged electrons pick up speed until they collide with other atoms, liberating still more electrons. Figure 2-7

is a sketch of this process, whichis often called an avalanche because unless it is controlled, it will continue building up like an avalancheuntil the device

is destroyed. The carriers that initiate the avalanche process are thermally generated

minority carriers in the depletion zone. The increase in current at the begin-

ning of the avalanche process causes an increase in temperature, because any

increase in current through a given resistance causes a larger voltage drop and

— Region of heavy electron concentration : Oo in the lattice @ — Electrons (under acceleration)

_—— = The direction of electron travel

Fig. 2-7 The avalanche process

uced prodl lly a n rma the re mo , ses rea re: inc inc re atu per tem the As : in heat. s heat, ear, the currentincreases and oes e

ermal regeneration or thermal runaway. — a and collision, do Bok l ma er th , ses ces pro e n e Se riers lowers car of er mb nu sed rea inc the r; the ano e on nt me d complex one. Hos an c mi na dy a s ces pro e ol wh the s ke ma d an alanche ney conjured up by the thermal and collision av cate it with further quate for our purposes. We need not compli mechanism. It has the as r ne Ze by ed iz es th po hy i d emission ie ld Fie — es. iti hor aut st mo by cs la y ia laopee e out

literally io concept that atoms can have their electrons occur, By pe o nt ow kn is on si is em ld Fie . gh ou en ge lar is er of some oe i nt ce the l il st is ion dit con e ch an al av e th to is a limited avalanc silicon devices are designed to operate in

as the junction avalanche operation is permissible as long mplished co ac ly al rm no s si Thi h. hig too go to d te it rm not pe ng resistance iti lim a e en Be by ce vi de the h ug ro th t ren the cur oving the heat that is generated.

—

e of the chief failure _ on be n ca ion rat ope e e a n i e cause reverse-biased junetion. This is the case be

is in a transistor’s

i

at higher currents, the junction resistance drops to a d the bulk resistance becomes dominant. In low-current the junction resistance is fairly high and the bulk resis-

small enough to ignore. The complete equation for the vard-biased junction diode is R ~ r;+ rg, where r; is the

e and r, is the bulk resistance.*

relationship is really only a useful approximation,but it kley avery important approximation in many design and analysis

e Shockleyrelationship is not overwhelmingly precise,butit is

itative description of the resistance of a forward-biased junction has come up with.

Static Resistances junction is a complex system;a part of its complexity is that ct resistances in both the forward- and reverse-bias directions. these two resistances are dependent upon howtheresistance is in a broadersense the tworesistances reflect different reactions erating conditions. Static resistance is easy to understand olves the simplest form of Ohm’s law, R = E/I. resistance is a little more difficult to understand becauseit in terms of the changes in current caused by changesin voltmatical form,

the dynamic resistance (in ohms), AE is the changein voltage (in 1 Al is the changein current (in amperes).

case of the forward-biased diode, for operation anywhere beyond

the diode conduction curve (Fig. 2-6), we can considerthe static

constant. The junctio zone, and it is depe:

_ Operating current. tion resistance as

Tesistances to be the same.

:

re

perature, this resistance is fairly

This is a satisfactory assumption

|conditions encountered in transistors (where A is assumed to be

jiased junction (such as the collector-base junction in a a different story. Thestatic resistance of a reverse-biased

R=E/I, where is the voltage impressed across the junc-

ent through the junction, which in a simple diode is only

of this topic can be found in Albert P. Malvino, Transisto

-Hill Book Company, New York, 1968.

*

e

the leakage current. In a transistor I ismade up oftwo components, theleak-

age currentand a second current which is injected across the junction by the

eres emitter. The static impedance (resistance) controls the quiescent ae aves drops, the ones we normally measure with a meter, ne 1e dynamicresistance is a measure of how changes in voltage affect eeein current. If you will look again at the reverse-bias part of the diode ie ae re will notice that the reverse leakage current ery S

ly as

the reverse-bias voltage

i

less typical case wef would ex) ‘pect no more than a 10 eie iee fora a percent increase in the applied voltage. Bes becaresahi

X

ct that the depletion zone iers must rr ca e th t ha net zo n io et pl de e nc ta is es path through the high-r tential. The po d se ea cr in e th of ct fe ef e th t ou arly balances

al very ne s law would lead m' Oh as ch mu as se ea cr in t no es do t en It is that the curr c and dynamic resisti ta es Th e. ag lt vo in se ea cr in n ve gi for a rse-biased diode is not at ve re a ut ,b me sa e th e ar or ist res ry na of an ordi

juppose we f try a numerical example.: Letus as: sum:

diode connected in the reverse-bias direction and that, with he oi : measurea current of 10 pA. ; ae

| S

F

an ordinary resistor.

Computethe static resistance of the junction.

RY

R,==

l, part of which is sta cry us uo in nt co a of ed os mp co is e od di junction t ich is doped to be ann ty, pe. The poin to be a p type, and part of wh ion from n to is called the junction.

—_10-V

By 10 wA

e junction from the n th s os cr ons ctr ele n io at rm fo l sta cry e During th the juncof de si r he it one ne zo ge ar ch l al sm a ng e to the p side, developi transition zone. e th led cal is d an rs rie car ive act ‘of e a. This region is fre racteristic of

R,=1M0 Now, assumethat a doubling of the voltage results in a current increase of 10

percent, and compute the dynamic resi whenthevoltage is ined 20 ee iy Gherperiieed sot 1,

10 percent of 10 wA=1 pA

2, AE=10V 3. Al=1yA

tion zone is cha nsi tra e th in d te la mu cu ac ge ar ch of nt amou proximately 0.6 V, ap is it n ico sil In r. to uc nd co mi se of particular kind ard-biased by a rw fo be st mu on ti nc ju e Th V. 0.2 t ou ab nd in germanium re forward conduction fo be ial ent pot r rie bar s thi an th er gh hi is ge which

take place. se in current causes the ea cr in an n io it nd co on ti uc nd co dar rw fo e In th across the op dr e ag lt vo e th t tha y wa a ch su in ance to drop

tion resist potential for r rie bar e th as e lu va ) te ma xi : ro pp (a me ction remainsat the sa scribes this de p hi ns io at el eyr kl oc Sh e Th . ts en rr cu al ‘entire range of norm n as resistance drop in a quantitative fashio

7, = 2a mV 4

ek ee fest a made-up example, but the results are reasonable

:

>i an poo solute values will vary over a wide range, but the implicaes yee. resistance is always greater than thestatic resistance in

pp pondin le = ae reverse-bias state is a valid one. Thestatic resistance peeee eee controlled by temperature. (In a transistor temPe er part.) The dynamicresistance is mostly independent So far I have only described the dynamic resistance of a reverse-biased

T(mA)

junction may be ed as bi dar rw fo a in es nc ta is es cr mi The static and dyna small. considered equal if the increment (A) is s withdraw from on tr ec el and s le ho ed, ias e-b ers rev is When the diode d ofcarriers. This — re ea cl is ch whi de si her eit on ea ar an g the junction, leavin of a small c tri lec die e th s rm fo it d an , ne area is called the depletion zo capacitor.

depletion zone, e th ns de wi e ag lt vo as bi ers ve re Increasing the biased junction, the dynamic resis-

rsedecreasing the capacitance. Ina reve for small increments. en ev e, anc ist res tic sta e th an th er gh hi tance is nt bonds, which le va co of e ur pt ru l ma er th by ed us ca is Leakage current Leakage current isa rs. pai e hol onctr ele of on ti ra ne ge the always results in

:

ti

temperature.

It in Y of 2 in germanium fo creases r each Wee s have only about 0. 001 of the |

a factor of 3 in silicon and by a in temperature.

Silicon Current(at 20°C) that we’ would

© current, inadequate he at dissi; ati I mM excessive junction temperatu: Seca ia: re results from unre

|3|

:

a

the transistor asa practical amplifier gs you should be able to do upon completion of this chapter.) ain the amplifying mechanismin transistor. Draw a block diagram of an npntransistor showing the two junctio1

the terminals, and the external bias potentials. Label collector, base, — and emitter. Draw arrowsin the external circuit showing the direc- _

tion of current(electron) flow in each leg of the device. Draw arro

inside the device showingdirections and relative magnitudes of el

: ‘ tron flow. Define the following termis: I, Ip, Ie, Ico, Ie max, E- max, Zin, By Ig, Ros Reor

Vo; Re, Bins Rew Riaes RiDefine the Shockley relationship.

a Draw the schematic diagram ofeach of the three configurations. Write the equations for the following parameters for each circuit in objec- _ a1.

The equation for the voltage gain of a complete circuit, including the

i

working load Ri..

b. The equation for the input impedance, including an external emitter

resistor.

;

Compute important parameters. Given the schematic diagram in Fig. 3-16, compute the parameters ted in Problems 3-1 to 3-5. ATION omeone how a small base-emitter current controls a larger colcurrent. Use the drawingin objective 1a to aid your explana-

SELF-TEST 1. 2.

3.

4.

Why are device parameters, such as the hybrid parame ters, more important to the manufacturer than they are to the designer or technician? Define I,,.

Define [,,..

Define l,.

5. 6. 7.

Define I... Define R,. Define Rio.

9.

Define V,.

8.

Define I,.

actual circuits.

10. Define Z,,.

11.

12.

Define R; in the form of an equation.

Whatis the range of voltage gains for the common-emitter circuit?

13. 14.

Whatis the range of voltage gains for the common-collector circuit? Whatis the rangeof voltage gains for the common-base circuit?

16.

should be operated at? Whatis a heat sink? ANS: It is a large-area high-thermal-condu ctivity metal(usually copper oraluminum) structure, whichis clamped toa tran-

15.

If a manufacturer lists the maximum collector current I, (max) at 100 mA, what is the highest steady-state current that the tra nsistor

sistor to carry away internally generated heat.

17. 18. 19. 20.

21.

The heat sink often has

heat-radiating fins to compress a large area into a small volume. Define avalanche andzener breakdown. What is punch-through? Is it always a failure mechanism? In normal transistor operation, which junction is forward-bias ed and whichis reverse-biased? Define power gain.

Define barrier potential.

d Sor these models and ‘ blems. T ation ic if pl am h c i h w y s b c n i t r a eettaatinsech portant im s us sc di d an e, ur ct ru st transistor, examineits ansistors tr e th t en es pr to y ar om st cu . It is importance r ei th t ou ab t en mm co t ou th enuetaaatt wi t t ¢also discuss cee’’s parameters, bubu t the devi‘ic is is a realistic Th . rs te me ra pa t ui rc ci to n e of eeecanm farta) from: are rs te me ra pa t an rt po im istor's ic cirbas ee thr are re the on, iti add . valuesn rcuit e cie ed in the st li e, as -b on mm co d an , or Batter, common-collect values for ent fer dif es id ov pr ion it at ur ig ity—and each conf i po! rtant param. These im on so d an , ce ; tor voltage, and ec ll co m mu xi ma , a n o Ee Se e re o a ie ly al re ot nn ca rs te me ra pa on haves vf the To thalit end d wewill e. ur ct ru st i t cu ui ir rc ci ic i 1 i three basic eer e th of ch ea th wi n e r oe ca t to be the ee ui rc ci er tt mi -e on mm co e th er id ill cons There is coe er st. fir t ti ea tr ll wi we so nd ‘a = ie tack urations, - I ae aeae ig nf co e re th e th ng o c Pi -2 write the ly i s mp si l i ll wi i I n, ai ag up s me co it ‘and the one th wi g in al de t en gm se e Th it. egies sic exp a ba e th all n ai nt co ll wi it e us ca be tote longest equations ant le ab ic pl ap all t lis ll wi ns io other two sect s. ieee on ti ua eq er tt mi -e on mm co om fr er which diff

What causesit?

22. Define depletion zone. 23, Write the nearest hybrid-parameter symbol for each of the following: a,

B, Zin, Ro.

INTRODUCTION

Transistor technology has provided a bewildering jungle of elec trical and mathematical models to describe howtransistors behave. There are three basic types of models, each of concern to different people.

The physicist is

interested in models and descriptions of the complex happening s within the device itself, The manufacturer needs models which lend themse lves to practical measurements (of device parameters) which aré reasonably ind ependent of the circuits in which they are measured. The engineer and technician

mant

i

hnology

does not permit very ¢

uld be but oe ee wo e er th e o if l fo a ly moder : ie e simportant parameters due to on variatic in thes blesome _ ee ou tr as t bi y er ev t i b o a ce da Penehica cl oser : tolerances, : holdd cl ld| cou s er ur ct fa nu ma i if n a

ie ape p an is it y; it iv it ns se e ur at er fo ee.ait temp ae iques uset : c hn te e th s, en pp ha it i as t bu s, or duct

ing e rge manufacture ,also serve to accommodate la rent hee

in ited for those a the circuiit designer has compensat large manufacturing ry ve r' 4 fo d te sa en mp co so al s he ha mis, rte7 -— e u m e th s es pr t no es do er gn si de |result he iclo‘ aex hold to e e v i iv nt ce in i no s ha er ur ct fa manu s some importa , ns io at ri va e ur at nce g to the in rd co ac ed ct le se is h ic wh t, Mingcorrec

needs of the designer, but these variations also yield to the same basic techniques which allow for large to lerance and temperature variatio ns. The military electronics industry of te n demands close tolerances, but then it is a case of selecting de vices that fall within military standards, a Process that is far to

o expensive for commercial purposes, and one which actually allows designers to pr oduce designs which are Possib ly less reliable, and less servic

eable in the field, than they mi ght be. Military procedures have always been strange to all but those people whoare orient ed to them, and transistor electronics is no exce ption. I am trying to prepare you for th e idea thatspecifications in the tr ansistor manual are only “helpful” gu ides (they are not to be taken too seriously), and at the same time to Prepare you for the even more importanti dea that “exact” specifications oftransisto r. parameters are not necessary, nor would they even be very helpful. Exact specifications are neverlikely to be come an economic possibility anyway, but we don’t teally care.

Emitter Junction

Important Symbols and Terminolog y ~: approximately equal to Example: A ~ B, A is approximately equal to B A: A change orvariation in some qu antity Example: AI, a change (or variation ) in the current I | or//: in parallel with

Example: R,||R2, resistor R, in parallel with resistor R, Typ.: Typically, or typical value

3-1

THE STRUCTURE OF THE TRANSI STOR

Thetransistor consists of twojun ctions in a continuous crystal. figuration ma

The cony be pnp ornpn. See Fig. 3-1. An ohmic contact is made to each crystal area, making a three-termin al device. One “end”block is call ed the emitter, the middle block is called th e base,and the other “end”block is ca lled the collector. The middle sectio n is alwayscalled the base. Theo retically either “end”could be called the emitter orcollector. In practice, one “end” is designated by the manufacturer as the collector and one “end” as th e emitter. If you will take a real transist or and exchange the emitter and co llector leads, you will still have a functional transistor. It will not conform to the specific ations published by the manufactur er, but it will still be a transistor. The differences are due to the fact that th e manufacturer has, perhaps, doped one “end” block more heavily th an the other, and he has definitely made ce rtain that the block he calls the coll ector has been arranged in such a waytha tit is easily cooled. By this I mean that there is a good thermal connection between the area designated “colle ctor”

Collector

Junction

Base

Emitter

(ec)

(a)

Big 7p ond ps wanaator srectaies. {a) The pnpstructuctural

f

; (b} the pnpschematiic diagram;; (c)t the npnstru

ral eee { the npn schematic diagram

e, which is exposed to the openair. eee ae

are: heat away into the atmosphere. a ec in its ability to getrid of internally generated ne te' d transistor is most -connec i of an inverse i 3 rating oe ele connected transistor. Other parameters will eae f redictably so. STaceos a crystal is very thin, 0.8 microns orless. ae a fe sential to normal transistor operation, as weshall see s! f us microns is approximately equal to 0.001 in. Manufacturing ec! ical geometry could well provide material for at least one ; 1

go into that aspect here, but I shall provide you with a ref-

for this information.'

\TURE OF TRANSISTOR AMPLIFICATION n

i please keep these two things in mind: j i sion discus es region is very thin and lightly doped; as a result, it has Transistor Manual, Semiconductor Products Department, Electronice Pa,

-Abunidant supply

Holes are sparse.

ofelectrons

EMITTER i)

Emitter current =I, +h

‘Ab

ant sup ly Dund s

Jease| te)

COLLECTOR (a)

Collector cu

Base current (/,) ——< ]B \Base current (/,)

panels

&, =06V

Collector current (/,)———
S 1 a : 1.6 0 to 64.90 Xo

1.6-2.9

3.06-4.9

6.5-11.9

C. uF

2,000

12-20.9

1,000

21-31.9

500

250

32-64.9

150

100

‘fo = 90 Hz— Range: 65 0) to 6 kf —Xe 2 Tae

65-119

120-299

300-649

50

_650-1.59K

25

10

1.6K-3.19K

5

2

Sy = 00 HZ—Range: 1.5 0 to 109.9 0 C.uF

15-25

26-49

5-109

2,000

11-12.9

1,000

500

250

3.2K-6K 1

13-25.9

26-54.9

_55-109.9

ee

pel

=o

2.6K-5K —

51k

(a1Vv)

Ay 4.7 kQ (4.7)

20 uF

|

i , 3

S

13 kQ

(a eRe

== —V

The Fully Bypassed Emitter-biased Circuit

‘ice

type: al nc

If Eyias is much larger than Vyp, and wewill see that it always is, we can drop Vz» from the equation.

E, max ircuit Parameters

goodstability. ‘ 3. And ifI, ~I., whichit always is, we can write the equation in the follow-

Voltage gain

ing form:

. Maximum expected temperature

The samesignal equation and someof

the de equations apply to both the base-biased circuit and the emitter-biased version. Theprincipaldifference, in the collector side voltage distribution, is that the power supply voltage E, is distributed only between Ep, and Eg, and the bias voltage supplies the entire voltage drop across the emitter resistor In more concise terms, these conditions always prevail:

1. Egt+Ex, =E, 2. Epes ~ Evias Because the base-emitter bias is taken care of at the emitter, we only need to providea return resistance from base to ground which meets the usual stability requirement. The stability requirement states that R, = S x a, where S is within a range of from 1 to10. This circuit frequently has stability

100 mA

25Vv

140

‘

Allowable quiescentcurrentvariation at 75°C Stability factor

(6-7)

Thecircuit is normally a fully bypassedcircuit, but a split emitter ver-

npnsilicon 100 (minimum 8 minus 10%)

I, max

Andif R,/é is much smaller than R,,, and it must be if we are to have

(Exes).

stability.

Design a fully bypassed emitter-biased amplifier with the following specifications.

(NOTE: R, and R,, are the samequantity.)

sion is a rare but possible variation.

Vg

In the desig Sahay we will start the process by computing the tinimum value of Ege; as we have donebefore; butin this case it is only to be in that we know what the minimum acceptable value is. We will almost revise the value of Ene, upward when we makethebias calculation. rays sr, you may wish to skip some of the early steps involving the value of Forthe time being, the extra steps can be used to provide the perspective to omit them intelligently later.

Bias — IpRy — 1-Re — Vg = 0

AE Qe = =e

srfectly per bare eet

internal resistance of the source must be low enough to meet the stability — requirement. In general, bias supply voltages are high enough so that is quite a large voltage drop across the emitter resistor, resulting ins

wegot from Fig. 4-6 was

2.

reat

aioe field Oey geounl tar path; but if that is the case,

We wrote the loop equation forthe bias circuit in Chap. 4, in the discussion of stability, and derived this equation from the loop equation. If you have forgotten, refer to Fig. 4-6 and the discussion that goes with it. The equation

1.

\ on un result in any significant improvement

not

(6-6)

\

;

6.

7.

. Working load (Ry) Low-frequency cutoff (f,)

75°C

5% 5

10 kn 25 Hz

3V

Maximum outputvoltage (E,) p-p

10V

Power supply voltage (E,)

e basic circuit is shown in Fig. 6-7. Figure 6-8 shows the completed design sheet. 1 [E 1

pute the minimum valueof the emitter resistor Epes. iam AVae x 100

QI.

AVge = 2.5 mV/C°

At = 75°— 20° = 55°

AVgg = 2.5 X 55°= 137.5 mV

total

‘

“Hye = 2875 x10"x

Specifications

5 (%)

Epes = 2.75 V

STOP HERE

9

sabe cont.)

rievo1 (cont.)

(6 |_s3Ka Fis Slag

acceptable bias voltage. See Frame 3.

load

FRAME 2

resior

BASE BIAS

53

CIRCUITS

ONLY Bias Resistor _ ;

Et

Maximum signal

be

oxo

voltage

FIELD 2

aa

_53V

Eq

.

Eq, = Ol, x Ry Eq. 0.5 & core Eq

_4TV

pp £g=1+6,

8

FIELD 1 Note: If an active emitter resistor is

:

Hele

ee Sait) oe, KD os 10

co

Sabai ey resistor

= }

| Fe teeN

8

2

hae

:

t i d. Differential amp.

Ruse = Vy x 2.5

R,_252 Re eet Si

Re, 10k2

Rex = Eas / Ql, For differential amplifiers, use:

Res = Evy, | 204,

Fig. 6-8 The design sheetfor the emitter-biased circuit, Example 6-3

equals or ex ch whi e tag vol t ien ven con Any V. 1 s plu y, ilit stab Vax for ed requir : com can we ore bef on isi dec at eth mak t mus we but do, l il ntw this requireme stability requ Vas s bia r tte emi of on ati lic app r ula tic par s thi In . R,, for ue val voltages for bias will usually. ply sup er pow t ien ven con and , ing and dem y ver are not ever, the muchhigher than the minimum required for Vag stability; how

7

re stability requirements will whe , ier lif amp ial ent fer dif the as h suc ts cui cir ity bil sta ae s more, for Eze:-

demand up to 10 V, and perhap addian s plu V 5 2.7 of ply sup s bia a d nee l il wew e mpl exa s thi of in the vase ger than this will do.

Let Eyjas equal10 V. 2.

Emitter bias

Select Exay é are * Epes

Compute the value of the emitter resistor Res. Use the emitter bias branch. 1. The bias voltage decision al to the Exe, volt The bias supply must provide a voltage at least equ

Suppose we assume that a 10-V supply is availa

bilities.

requirements

ry 1 mA, that it states that a maximum valuefor E, is10V. If wet this circuit, the _ in , hat ert emb Rem Eg. for V 4.6 g vin lea R,, oss acr V 5.4 get by with ween Ri, and the tran-

Any voltage lar tional volt (or 50) for Ve and Ey, or 3.75 V. ble for bias use and work from there.

current decision.

‘Base bias— See table of possiVoltage gain

possibility and it wou 10 k@ at a collector currentof 0.5 mAis a wou the is mA 0.5 d ory act isf sat be ld s thi y ril ina Ord V. 6 drop across R, of 11. of specifiset al gin ori the r, eve How . job the do l wil t tha e) abl thet (on t lowest curren in ion cis tde ren cur tor lec col he nt upo t ain str con l ona iti add an d uce cations has introd wefind that we can

FRAME 3

Ease —— al, | al,__1ma Make the coliector

6-2.) Makethe collector current decision. (See Table t a V, of 140 and Ryy of _ tha d fin we s, tie ili sib pos of le tab e eth min exa we If ld require a voltage

bias supply covers the voltage drop across R,, and E,is split bet sistor (Eq). QI, must be 1 mA.

used, skip steps 1 & 3.

ee

; Ry 50k Reg (max) =S*R,, For active emi arta sds of 50 to 500 k® for Re.

tage must be at le vol s bia the t tha an me to ed ret erp int be This step may , but at least we know’ the low her hig bly era sid con be l wil it es as yc man 3.75 V. In

E,10Vv_¢| Rig

Collector

Enos * Rios

aa

3 =

Computing Res

little Ohm's law Now that we have made the bias voltage decision, a provide us with a valuefor Res.

= Evuas 10V _ oxo

Re= Qi.

1mA

d across the emitter rpsis! ppe dro is e tag vol s bia the ll ata dth ume ass e hav Here we 0.6 V (for silicon) drop across th This is not quite true, because there will be about oss Ry. We would expect some acr p dro e tag vol l smal e som and on, cti jun ter mit e-e bas

and ll sma te qui is or err the e aus bec but n, tio ump ass this e mak we if QI. error in involved, the error, in practice.

because of the large amount of negative feedback

negligible.

i

=

ie lidsaig de ey

the base-to-ground resistance Rp2-

mpute the value of the ac load resistance R rac ‘Use Branchb on the design sheet. 140 x 25

=SXR_=5X 10k2 = 50k

e stability requirement. th y isf sat ll wi r we lo r ko 50 e lu va ‘Any e there is no Ry, and we aus bec , ons ati cul cal e sid e bas the of e ‘That takes car nch to Field 3. RS FIELD 3 INPUT IMPEDANCE AND CAPACITO

mpute the value of the de load resistor Ry.

“Rie X Rise _ 10KOX Rie Ria 100 5.3 k0

kA

7 ute the voltage drop across the dc load x,-

= QI. X Ry = 1 107 x 5.3 x 10° 5.3 V

F

{Ei

‘Compute the input impedance.

bin = RallRe

-Z, = 50 k|(100 x 25) Zin =25k0

FRAME 2

m. Ce r to ct pa ca ng li up co t pu in e th of e lu va e th e Comput

2 OF Com ~ O.1 Zu, at fa eat f= 5areko = 2500 a

Cm anfke 1

C= 25 C= 25 pF

emberthat in the emitter bias circuit, none of E, is dropped across R,,. The difbetween thecalculated E, of 9.3 V and the desired E, of 10 V is 0.7 V. If we

the leftover 0.7 V to the computed 4-V Eg, we get a new value for Eg of 4.7 V.

“

FRAME 3

— r. to ci pa ca ng li up co ut tp ou e th , C,, e ut mp ~ Co Xp OF Ceo ~ 0-1 Ruy at fo

= 10ekQ =1k ie0 ee 1

npute E,, the power supply voltage.

Wehavealready decided on an E, of 10 V.

=10V

OF ahs

ft sen

C= G28 x 25 x1 x 10°

C=6uF

ee

_

5

”

Compute the value of the bypass capacitor Cy). In this caselet us bea little cheap and lazy, and use

X, ~ Re atf,

Because this circuit is a fully bypassed circuit, all the equations and comments made in the last exampleapply. X, at Hz= 25 2 (Ri)

Fe 2nfX-

C ~ 250yuF

6.28 X 25 X 25

Figure 6-9 showsthe complete circuit with all values indicated. - SUMMARY

lin

2

The addition of a bypass capacitor across the emitter resistor of what is basically an unbypassed common-emitter circuit can increase the voltage gain from 10- to 50-fold (morein very lightly loaded circuits). Theprice we pay for raw gainsof 40 to 400 (even several thousand in a

the voltage gain during the design process, poor input impedance predict_ ability and stability, and more distortion. None of the stability requirements are affected by the addition ofthe 3 bypass capacitor. In fact, the added capacitor causes twosets of parameters to exist, stability and signal. Below the lowest frequencyof interest V,, ‘Ss; Ip, Zin, and Voge stability are the same as though the capacitor were not there. For frequencies above this cutoff frequency these parameters are the

same as though R,, were 0 Q. Table 6-1 compares these twosets of param-

eters.

Thesplit emitter circuit is a good compromise between the unbypassed and the fully bypassed configurations. This variation also has a definite lowfrequency cutoff value, and below that frequency it has the parameters of the unbypassed circuit, including Q-point stability. Predictability of signal parameters is almost as goodas it is in the una bypassed circuit. Available voltage gains range from about 10 to 50 for moderate loads. Thesignal input impedance is lower than in the unbypassed circuit and higher than in the fully bypassed circuit. The emitter-biased circuit provides somewhat better Q-pointstability than base bias, and provides considerable basecircuit flexibility because of the absence of R,,. It is presented here as a fully bypassed circuit and has” signal parameters nearly identical to the base-biased fully bypassed circuit. a

_ Later this mode of bias will be used in the differential amplifier, whereit is far _ more practical than basebias.

few instances) is lack of gain stability, considerable uncertainty in predicting

_ QUESTIONS _ _

.

6-1 Whyare signal parameters somewhatunpredictablein the fully bypassed circuit? 6-2 Are signal parameters influenced more by temperature in the fully bypassed and

6-3

split emitter circuits than in the unbypassed circuit? Why?

Whyis the fully bypassed circuit likely to produce more distortion than the

unbypassed circuit? 6-4 Whateffect does the bypass capacitor have on Q-pointstability? 6-5 Match the following characteristics with the appropriatecircuit configuration. 1. Unbypassed

BE

Fig. 6-9 The completecircuit for Example 6-3, with values of resistances and voltages

2. Split emitter 3.

Fully bypassed

rpm Pp ae ee

=

The highest voltage gain The highest input Z

Thebest ac predictability

Thelowest voltage gain The lowest input Z The poorest ac predictability Modest voltage gain Modest input Z

Modest ac predictability

Y

Riw . Stability factor . %AQI, to be allowed

ae ee Daneseeene facets re ris

Transistor Parameters 1. (min) 2. I, (max)

3. E, (max) He Meou r

Circuit Parameters Voltage gain

E, p-p Riw

Stability factor

%A QI. to be allowed

Maximum operating temperature

fo

. Maximum operating temperature

fo

100 mA

20V

100

3.0V

5 ko 10

85°C 30 Hz

| Problem 6-2 ‘SITLE:

Designing the Split Emitter Circuit

Transistor Parameters 2.

B (min) © I, (max)

3. E, (max)

Nog bone

Circuit Parameters

Voltage gain

100

100 mA 30V 15

E, p-p

3.0V

%AQI. to be allowed

5% 90°C 30 Hz

Rw Stability factor

Maximum operating temperature

fo

15 kN 10

Problem 6-3

‘TITLE: Designing the Emitter-biased Fully Bypassed Circuit | PROCEDURE: Design the circuit, using the following specifications. See Fig. 6-7. Transistor Parameters

1. B (min)

2. 3.

I, (max) E, (max)

100

50 mA

30V

Z

ae

oe

ee

nee

ee

se

a el

a

_ OBJECTIVES: (Things you should beable to do upon completion of this chapter)

NOTE: Specific design problemsare included in the chapter.

4.

Design the simplest case (case 1) of the voltage-mode feedback commonemitter amplifier circuit.

Be

2. Design the more versatile case (case 2) of the voltage-mode feedback common-emitter amplifier circuit. ; Design the split-load (paraphase) amplifier. Design a common-collector circuit with both emitter and base bias, and ‘ including bootstrappingfor increased input impedancefor ac signals. a 5. Design two kinds of common-base circuit, one with base bias and one with emitter bias.

_ EVALUATION: :

1. There are self-test questions and design problems included in this chapter.

2. Thefinal evaluation will be based upon yourability to design thecircuits

in this chapter and have them workin the laboratory according to the criteria and specifications set forth in the laboratory manual.

__ INTRODUCTION

This chapteris called potpourri for good reason. We will examine a number of circuits and methods, somerelated and somenot. To begin with, we will examine practical design procedures for circuits _ using voltage-mode feedback. There are two cases of voltage-mode feedback, a very simple but very limited case, and a more complex but more versatile "case. It is sometimesdifficult to meet exact specifications with voltage-mode _ feedback, and in most cases, with a pair of notable exceptions, current-mode feedback is preferred to voltage-modefeedback. Thefirst exception involves _ the case where very low power supply voltages are involved, say 3 V orless, here current-mode circuits are simply not practical. The second case in221

ae volves power amplifier drivers, where the absolute maximum E, p-p is $

required for a given Eg. Voltage-mode circuits can provide about 50 percent

more £, p-p for a given Eg than can be had from current-modecircuits.

Wewill examine a Circuit éalledthe split-load (paraphase) amplifier,

whichis esseniially a current-mode common-emittercircuit with one output

taken from the collector and one from the emitter. It is really a combination common-emitter and common-collector circuit which provides two output

voltages with equal amplitude which are 180° out of phase with each other, but for design purposesit is treated as a special case of the common-emitter circuit. It is treated as a common-emitter circuit because noneof the special

Fig. 7-1. The circuit for the simplest case (case 1) of voltage-mode feedback

characteristics of the common-collector part of the circuit can normally be taken advantageofin the instances wherethis circuit is used. _.. Next, we will look at the common-collector circuit and its special im-

pedance-elevating characteristics. The common collector, often called the emitter follower, is a particularly important buffer circuit between low-level stages and power amplifier stages. Often, when we use an emitter-follower _(common-collector) circuit, we are interested in getting the highest possible __ input impedance. Whenthis is the case, wefind thatbias resistors.and, at a i little higher impedancelevel, collector-base junction resistance tend to limit > that maximum possible input impedance. We shall.see how bootstrapping ; {for ac signals) can help solve this problem. ; There are two common-basecircuits, one with base bias and one with emitter bias. The emitter-biased circuit is “true” common-base because the base is returned directly to ground, for both dc and signal currents. ‘The base-

biased circuit is really a common-emitter circuit for dc parameters, but a capacitor returns the signal current to: ground, making it a common-base circuit, insofar as the signal is concerned. Bothcircuits are designed like their common-emitter counterparts, with ane or.two minor deviations from the

common-emitter design sheet,

7-1

DESIGNING WITH VOLTAGE-MODE FEEDBACK — THE SIMPLEST CASE

The circuit for voltage-mode feedback in its simplest form is shown in Fig. 7-1. The outstanding virtue of this circuit is its simplicity. However, it does have three inherent characteristics. which limit its application. 1. 2.

Because ofthe Miller effect its input impedanceis generally somewhere

on the order of 5009 or less, which is about one-quarter of the input

impedanceofa fully bypassed current-mode circuit. The maximum value for Eg (for many, practical situations) is 3 V or less. This is because of an inherent conflict between acceptable base currents and necessary stability factors.

¥

ility Because R,; (See Fig. 7-1) serves the dual purpose of meeting stab pared to Egy, requirements and setting the quiescentpoint, keeping Eg low com QI,. Even is necessary if weare to be able to choose a value for S and one for However,it if we restrict Eg, it is difficult to get the exact value of S required. l to is not too difficult to get the desired QI, and some value of S which is equa ler than the one specified. generally * aes spite of the Bae simplicity (in fact, becauseofit), it is not icult to cone diff very is it fact, In tly. exac ns atio ific spec all meet to ible poss ty, 1 have" up with a really good compromise in all cases. To avoid this difficul es it quite, prepared Table 7-1, the voltage-mode stability table, which mak application easy to come up with an acceptable compromise circuit for any

for whichthis simple configuration is suitable. Applications for Voltage-mode Feedback

r second to ; Iq the majority of applications voltage-mode circuits run a poo re are only current-mode circuits, at least from a designer's point'of view. The ode designs. three instances when voltage mode has the edge on current-m Y CAN BE TAKEN ADVANTAGE CIT PLI SIM IC BAS S UIT' CIRC ODE E-M TAG VOL THE N WHE

i

cally

means that a very low input impedance must be accept-

le to that aia:ameioltaiebain: even with this simplest circuit, is comparab ssed of the current-mode fully bypassed circuit. We will use the fully bypa ‘ {current-mode) table (Table 6-2) for design purposes. s Stability against Vj, variationsis inherently very good, and it depend

drop across an upon the voltage drop across R, instead of upon the voltage

adequate 3 extra emitter resistor. The voltage drop across R,, is nearly always ge ratio of for Vz, stability. However, 6 and I,, stability depends upona lar Eg. FortuEx, to Eg, which in many cases means a relatively low value for m as itis in — ble pro a ous seri as not is uit circ mode agevolt 4 in Eq low a ly nate current-mode circuits.

-

oy

53.

o1P0

Designingthe Simplest-case Voltage-mode Circuit(Refer to Fig. 7-1)

_ ‘TABLE 7-1. VOLTAGE-MODE STABILITY TABLE 3

:

Eo=1.6V Sat

B=50

Sat

Sat

f=100 B= 200

e,let me Before I give you the design procedure and a design exampl simplest case. the for ons ati equ ant ort imp the ize mar sum to ent mom 1.

Voltage gain (V,):

R V,= ae

“

take a

*

for the fully You will notice that this is the same equation as that used the fully bypassed current-mode circuit, which means that we can use aid our design bypassed (current-mode) table of possibilities, Table 6-2, to

—

process.

Vagstability:

By, = AV ne % 100 %AQIe

aL

In current-mode circuits the maximum p-p outputvoltage.is about Eg —

1V, whereas in the case of voltage-mode feedback the maximum p-p output voltage is about 1.5 Eg.

R s meee Ry This equation was derived in Chap.4. I,, the circuit current gain:

cuits.

1~S~ Be

_ WHEN THE ABSOLUTE MAXIMUM OUTPUT VOLTAGE(E, p-p) FOR A GIVEN E, IS

REQUIRED. Because saturation does not occur in voltage-modecircuits in the

abruptfashion that is commonin current-modecircuits, the maximum output

voltage, for a given Eg, is greater for voltage-modecircuits than it is for

current-modecircuits. Thisis particularly importantin certain power amplifier driver applications, where the value of Eg is dictated by required voltage distributions in the power amplifier. As a general rule such power amplifiers require fairly large values for Eg, precluding the use of the simplest case for these applications. We will examine more elaborate variations of the simplest case of voltage-modefeed-

back which will be suitable for these applications.

one

are interThis equation is also familiar except that the voltage drop we a emitter i ested in is the drop across R,, and notthe voltage across an extr her with? = = bot to ary ess nec is eit wher s case the are eed ind e Rar . resistor think of a can I ance inst y onl The . case st ple sim the for on ati this equ s 3 Vor would bea circuit designed to operate with a very low E,, perhap plest case less. This equation is omitted from the design sheet for the sim because it is so seldom necessary to useit. S, the stability factor:

WHEN THE CIRCUIT MUST OPERATE FROM A VERY LOW VOLTAGE POWER SUPPLY.

Voltage-modecircuits can operate with collector-emitter voltages (Eg) of 1 V orless; this is somethingthat cannot be done,reliably, with current-modecir-

’

oximately equal to Asin previouscircuits, the circuit current gain is appr the stability factor. E, p-p, the maximum p-p output voltage:

E, p-p ~ 1.5 E@

The maximum Ee This is a fairly satisfactory figure for 5 to 20 V of Eg. her for higher — hig ly ght sli and es, tag vol Eq er low for s les le litt a will be values of Eg. The input impedance Zn: R

, BRE Zn ~ 77,

_ NOTE: Ry, should be divided by V, andthe multiplication of B x Ri 23= should be accomplished before the paralleling operation

utp, voltage 0.5 V. ‘We could use @ higher value of Ea rN %

X Ry R,

Eg=1.6V

is performed. Theleft side of the || sign is R,,/V,. This is the Miller effect as discussed in Chap. 4. On the righthandside ofthe || sign is the inputresistanceof thetransistor; this should already be familiar to you.

FRAME 3

RitR;

Dobie a voltage-modefeedback circuit with the following specifications.

| Transistor Parameters

Compute R:.

See Fig. 7-1. FRAME 4

50

Compute Ryac-

100 mA npn silicon

Rie =V.%R:

15V

100

10

500 mV

4kQ

Brac = 100 X 25 = 2,500 2

FRAME 5

_ Compute R,. Ruw X Ruae

hehe,

p, aS k2 X25 ko t 4k —2.5 ko

of

Consult the fully bypassed table of possibilities, Table 6-2, for Eg, and Ql..

Here, as usual, we cannot have a supply voltage greater than the transistor maximum

0

12 V.

r voltage. If we allow 3 V orso for Eg, we cannot have an Ep, of more than

If we examine Table6-2, we find a QI, of 1 mA, and 6.6 V for Ex, looks favor-

able. Wecould shootfor a higher Ep, in order to get a larger E, p-p. If you will examTable 7-1, the voltage-modestability table, you will see that stability involves a large ratio of Eg, to Eq: if we need a large E, p-p, we also need a large Eg, and if

_ we havea large Eg, we must havea larger Ep, in order to have a stable circuit. For

15 V maximumE,, 6.6 V for Ex: is fairly reasonable, and so weshall use thatfigure.

10 ka R,= Lekn 6.6 kd

_ FRAME 6

. Compute Ezz.

Ep, = QUA, Eg =1mAx 66k

Re, = 1 X 107° X.6.6 X 10°

Ex, = 6.6 V FRAME 7

Computethe required power supply voltage.

Consult the voltage-modestability table, Table 7-1, for an appropriate value for According to the values under 8 = 50,we canget stability factor of 8.3 with an eof 1.6 V and an Em, of 6 V. 8.3 is a perfectly satisfactory stability factor, because it "isless than the S of10 specified. An Eg of1.6 V is also adequate for the specified p-p

«E,=Eqt+ Ew ee POG m82¥ At this pointthe designer is faced with lack offlexibility in the power supply voltage

selection. In the case of previous current-mode designs we could conveniently elevate

toobtain a comfortable value for E,. We cannot do that here withouta sacrifice in "stability; in fact, we cannot do anything without alteringcircuit parameters. Themost “convenient, and at the same timethe simplest, approach to adjusting E, to a conve-

nientvalue is to elevate Eq, and to recalculate R,. The results of such an adjustment d, are all in a favorable direction. The voltage gain and stability factor will be altere with thestability factor being made smaller and the voltage gain increasing. Suppose, in this case, we adjust F, to 9 V.

VOLTAGE MODE DESIGN SHEET

Case 1

FIELD 1 Consult the fully bypassed tabie of possibilities for QI, and a tentative value for En, :

pe Ql, 1 mA En 66

Thecalculated value for E, is 8.2 V.

2. The desired value for E,is 9 V. + 3. The difference is0.8V. 4,

Theoriginal Eg, = 6.6 V plus 0.8 V, yielding a new value for Ex; of 7.4 V.

5. Recalculating R,,

‘Consult the Voltage Mode Stability table, Table 7-1 for @ workable value of Eq.

Fo 1.6

3

Compute theintrinsic emitter resistance A, :

V7459 78 Beeer a in =

Ry = 26/01,

‘The recalculated value for R,, (7.4 k@)is not a standard value, butthis is no problem

because the difference in circuit parameters due to the use of the nearest standard value will be a negligible one.

compared to theoriginally specified 100. And, as a matter of fact, we could have adjusted E, to 20 V or so withoutanyvery significant change in voltage gain. If you are hs

Rize 28 KO

Fuse * Vo Be

Jy 2% 103 A

The new voltage gain after the adjustmentof R,, for this example, is’ only about 103

R, 259

[Compute the required ac load resistance Asc:

FIELD 2

E, (adjusted) = 9 V Ep, (adjusted) 7.4 V R, (adjusted) = 7.4 kO

2

£,_82V@V) YE = fo + Em

ie

E,_9V__

fy = OI,/8

in doubt, you can always recalculate the voltage gain using the adjusted value of Ry:

rn,

Vy =RuaclRi, where Rroc equals RixllR i (adjusted).

any

FIELD 2

4

4

Adjusted

66 ko (7.4 ko) |S

the estes

0a = Fig

FRAME 1

Compute the base current required for the desired QI.

eee

1mA =.

= . eo

-s 2X 0A

FIELD 3

It is good practice always to use a design value of about 50 for # even though the transistor manualspecifies a considerably higher value. FRAME 2

Compute the value of Rn. Eo-V, Ru=

Fo 18V.

-

Leg

Zp 3502

Zin = Pox 1 Vy 11 ORs With Ry, split and bypassed: Zn Rosa 11 BR,

=

OEM.

Fax 2 ee

Eq, _1.4.V_ Adjusted

Fig. 7-2 The completed design sheet for Example 7-1

(8

Ry =

16-06 V_« 2x10*

1¥

2x10

=5x 102

Ry, = 50 kO FIELD 3 FRAME 1

Coin

Compute the input impedance.

wert input

ae

Zn ~

50 kO {50 x 100

Fig. 7-3 The modified voltage-mode

25

feedback circuit for higher input

impedances

Zin ~ 500/1,250

Za ~ 3500 FRAME 2

Compute the valueof the input coupling capacitor.

split in two, and a capacitor value computed which has an X, at f, of about

0. R,,a.

becausethe input impedanceofthe modified circuit will be higher (~ 1,190 9).

Xe Of Cein at fo ~ 0.1Zin ‘Thisis the samerule of thumb wehave used consistently for the determination of Ccin

Coin ~ 200 uF Figure 7-2 showsthe completed design sheetfor the example.

The input capacitor C,,, will be smaller in the modified circuit

‘Problem 7-1

TITLE: Designing the Simplest Case (Case 1) of Voltage-mode Feedback _ PROCEDURE: Design the circuit, iaiag te Gllewiegeoeunerions See Fig. 7-1. Transistor Parameters

4. B (min) _ 2. I, (max)

. E, (max)

Increasing the Input Impedanceof the Simplest Case The input impedance(at signal frequencies) in the simplest-case circuit can be increased to almost exactly the samelevel as that of a current-modefully bypassedcircuit, (operating at the same QI.) by splitting Ry andfiltering out the ac Miller effect feedback with a capacitor. The modified circuit is shown in Fig. 7-3. At this point the circuit complexity’ is nearly the same as that of the fully bypassed current-modecircuit. Theresistor Rp, should normally be split near its center so that Ry,a ~ R,,b. Other splits are possible, but a 50-50 split is generally considered to be the best compromise. Moving the tap too far toward the collector increases the collector loading and reduces the voltage gain; movingit toward the base tendsto lower the input impedance. The equation for the input impedanceof the modified circuitin Fig. 7-3

is Zin ~ RoallB x Re.

The modified circuit is designed by the same procedure as the simplest case in the previous example. After the basic design is completed, Ry,is

‘ Componentcount and approximatecost.

. Transistor type Circuit Parameters

100 0) 100. a vo

25V

npn silicon

. Voltage gain

140

_ 4. Stability factor

10

2. Eop-p . Ri

5. %AQI.to be allowed

_

6.

Maximum operating temperature

- fo

1Vv 5 kl = -

30 Hz

7-2 DESIGNING THE MORE VERSATILE CASE OF THE . VOLTAGE-MODE FEEDBACK CIRCUIT he principal deficiency of the simplest case is that R,, must provide the sired base current andan appropriatestability factor at the same time. This requirement forces us to have large ratio of Eg, to Eg. The neteffect is an inadequate degree offlexibility in the selection of values for Eg. There

are some applications where the ratio of Eg, to Eg is dictated by other circuit Tequirements and where the ratio of Ex, to Eg cannot be high enough for acceptable stability. In such cases an additional resistor can be added from base to ground; this allows us to select a value of R,, which will provide a desired stability factor, without producing excessive base bias current, for any desired value of Eg. The additionofthis resistor formsa current divider which shunts any excess R,, current to ground. The circuit is shown in Fig. 7-4. : Because of the Miller effect, R,, will provide the necessary stability, and although Ry» will contribute to stability, its contribution will be relatively small. In general, for large values of Eg, when R,,is selected for a reasonable

stability factor (S ~ R,,/R,), the value of R,, will be so low that the transistor

will be biased nearly into saturation and normaltransistor action will cease.

The resistor Rj» can be computed to shunt any amountof excess current to ground, allowing just the proper amount of base current for any desired quiescentcollector current. The input impedance of this variation is somewhat lower than it is in the simplest case. The input impedance can be raised in this circuit by the same method usedin the simplest case, by splitting R,, and addinga large capacitor. This modification is shown in Fig. 7-5. The basic performance equations for the unmodified, case 2 (without R,, being split and the capacitor omitted), form of the more versatile circuit are the same as for the unmodified simplest case, case 1. The design procedureis different because of the addition of Ry, and because of the greater design flexibility this addition allows.

e n I. %AQ =e Ex, (miti ) n) ae AV

X 100

This step can often be bypassed because E,,, more often than not, is

more than adequate. For the time being I suggest that you include the step. Later with bit of experience you can leaveit out routinely and go back to itif: a

En, from the table of possibilities seems suspiciously low.

FRAME 2

ie Makethe collector current decision. Consult the current-mode fully bypassed table of possibilities, sae Table 6-2. The voltage gain equation for this circuit is V, ~ Riac/R¢. This is the

sameequation as that used for the fully bypassed current-mode circuit and the

simplest-case voltage-mode circuit, and the sametable of possibilities is used

?

for all three circuits. FRAME 3

x

Compute R; (the Shockleyrelationship). 25

Heh, FRAME 4

Compute R,.c, the equivalent (signal) ac load. Riac = Vo X Re Nothing new here.

FRAME 5

Compute R,, the collector load resistor value.

Fig. 7-4 The more versatile case of the voltage-modefeedbackcircuit (case 2)

Fig. 7-5 The more versatile case of voltage-modefeedback, modified for higher input impedances (modified case 2)

"

Ruw X Rye

Bee Rio Rtac This is the same equation we haveusedin all previous designs.

IE 6

- Compute Ex, (the voltage drop across the collector load resistor).

ease

(Ohm's law)

=QI. xR,

This particular design approachtreats R», as a stability resistor

almost always yields acceptable input impedancelevels.

Compute Eg (min).

a

Wecould write an equation involving all three variables, bias current

S, and input impedance, for each resistor, but the gain in accuracy would

}q (min) ~ 0.66 E, p-p

far from worth theeffort.

Thisis different from the equation we used in current-mode designs because

:

FRAME 2

of the voltage-modecircuit's different saturation characteristics. The maximum output voltage (E; p-p) equation is

Compute the voltage drop across R,,.

Enn =Eq—V;

P-Pp ~ 1.5Eg

The voltage applied acrosstheresistors R,, and Ry» in series is the voltage Eq. Ry is in parallel with the base-emitter junction of the transistor and, because of the nature of the diode forward bias conduction curve, R,2 will always have the junction voltage (0.6 V for silicon) V, across it. The balance of the voltage Eg musttherefore appear across R»,.

Rr If we solve this equation for Eo, we get

E, p-p = 0.66 E, p-p

FRAME 3

Compute E,, the supply voltage.

ee

stability is no great inconvenience.

and deals with R,, as a bias controlresistor only. The amountof error in approach is negligible, but even more importantis the fact that this appro

FRAME 7

-E,=Em+Eo

in

Compute I ,,:, the current through R,,.

(the sum ofthe voltage drops)

Tan = re

2

Atthis point we may adjust Eg, just as we did in current-mode circuits,

to yield a more suitable supply voltage. In somecases Eg will be dictated by tage distribution requirements of a following stage. This more versatile

configuration makes this kind of adjustment in Eg possible also _ FIELD 2 BIAS AND STABILITY CALCULATIONS

FRAME 1

FRAME 4

_ ComputeI,, the base current.

E 1,-%

__ This is simply an algebraic variation of the definition of 8.

~ Compute the valueof R,,.

Rn =SXR, This resistor provides for the stability factor, but it will normally provide ore current than is appropriate for base current. It is the function of Ry. to divide the current and drain off the excess. R,, is of course involved in the _ bias current, but because ofthe Miller effect, it is overwhelmingly dominant _ in controlling the stability factor; it is best thought of as a stability resistor rather than as a bias resistor. Ry: also contributes something, but not much,

(Ohm's law)

B = Qe 1 _

Weare simply computing the required base current to yield the desired ; collector current.

_

FRAME 5.

_ ComputeIg»2, the current through Rp. Tae = Tan — In

(simple subtraction?

ee

At this point we knowhow muchcurrentwill be flowing down R»,, and how much of that current we needas base-emitter current. What we must determine here is how muchexcess current we mustsiphon off through Rye, that is,the current through Ry». FRAME 6 Compute Rp2.

V, Ru= Tn

100 « 25V. 100 mA

a.8 2. E, (max) 3. I, (max)

4, Type

(Ohm’s law)

_ We knowthat the voltage drop across Ry» is always V;, and we computed the current through R,. in Frame 5. FIELD 3

Compute the input impedance Z;,.

Zu ~ FP [BRARa The only difference between this and the equation for the input impedanceof _ the simplest case is the addition of R,, in parallel With the rest of the input circuit.

3

Compute thevalue of the input capacitor Cin.

Ke at f. Of Con ~ 0.1Z im

npnsilicon

‘Circuit Parameters 1.

Voltage gain Stability factor

100 10

Maximum operating temperature

80°C

3. %AQI. 4. Eopp Ri, 6.

i _ FRAME 1

Ate

a _ Example 7-2 Designing the More Versatile Voltage-mode Circuit (Case 2) "Design a voltage-mode feedback circuit with the following specifications. See Fig. 7-5 Transistor Parameters

10% 6V 6ko

FIELD 1 COLLECTOR SIDE CALCULATIONS (E 1

“Compute Eg. (min).

Ep, (min) =

AVng X 100 %AQI.

“t= 80°— 20°= 60°C

Vis = 60 x 2.5 mV = 150 mV

seBax (min) =

1.5 X 107! x 10?

"59 %)

Ep, (min) =1.5 V E 2

e the collector current decision (see Table 6-2).

Increasing the Input Impedance of the More Versatile Case

of Voltage-mode Feedback

_

Theprocedure here is exactly the sameas that used for the simplest case. Ry _ is split into two equal-valueresistors (each one half of the computedvalue for R,;), and a bypass capacitor is placed between the junction of the two resistors and ground. See Fig. 7-5. The input impedance now becomes

Zin ~ RoaliBRalRoe The input capacitor is X, at ¥, ~ 0.1Zj,. The reactance ofthe bypass capaib citor C,, is (again) approximately 0.1R,,b. :

Here we wantvalues for QI, and an approximate Ex,. An examination of Table

6-2 showsthat a 1-mA QI, and 4.3 V for Ey will yield a voltage gain of 100. Frame 1

equired atleast 1.5 V of Ex, to satisfy Vgg stability requirements. Since the 4.3 V in-

cated in the table of possibilities is greater than the 1.5 V required by Vgstability, our

ction of 1.0 mA with an Eg, of 4.3 V is satisfactory.

FRAME 3

‘Com pute R (the Shockleyrelationship).

Rue = Vg X RE

Riac = 100 X 25 = 2.5 kD

y

a

RSE PTRREY Tet 4 p

FRAME 5 Compute R,

Rise Ry Tigh Riw ~ Rrac Ri

_ Bk x 2.5 kO 6kN—2.5 kO

R, ~ 4.3k0

FRAME 6 Compute Ex,.

Eg. = Ql. X Rp =1X 10AX 4.3 X 109 =4.3 V

FRAME 7 Compute E, (min). Eq ~ 0.66E, p-p

Eg =~ 0.66 X 6 V= 3.96 V min

Adjusted Eg=5.7V

i

(see next frame)

18 X 10-4) — (1 x 10-*)

FRAME 8

x 10-*

Compute E,.

10-*

E,=Eq X Eg=4.3 V+ 3.96 V

E,= 8.26 V

4

Now,sincé 8.26 V is not a particularly convenient power supplyvoltage, let us adjust

:

te Fi. 6X10 V

E, upward to 10 V. This meansthat we mustadd thedifference between 8.26 V and —

fmm 1.08 X 10-*

pie mae = 174

7-6 showsthe completed design sheet for Example 7-2.

10 V to Eg. Thedifference:

The minimum Eg computed in Frame 7 was 3.96 V.

Adding 1.74 V to 3.96 V gives us

a

Be siisind a 08 57. E,=10V

3 INPUT IMPEDANCE AND COUPLING CAPACITOR CALCULATIONS

FIELD 2

ute the input impedanceZn.

FRAME 1

R,

ComputeRp. Ry, =S XR,

Ry = 10 X 4.3 kN = 43 kO

VIBERoe o

e them,in _ Suppose we examine each factor independently before we combin tder to studythe relative importance of each.

PorrouRt 241

J, max) 100 mA

T (max)_ 80°C

‘*AQ/,__10

E, pp_8

4

FIELD:

1 is the Miller effect, and as you can see,it dominates the scene to

7

Z —ima oh Make the collector

that factors 2 and 3 will have butlittle effect on the total input im-

or this circuit we will have an input impedance of about 400. If we

7

cade two ofthese stages, we would findit difficult, to say the least. The

yedance of the secondstage would be R,. for thefirst stage, and an examina-

current decision. See

‘table of possibilities (Table 6-2) indicates that the first stage would have ‘quiescent collector current in the neighborhood of 10 mA. Its resistor

bypasted table of possibilities.

(6-2)

Eng must be greater

FIELD 2

Roy

than Eg, (min) from

43k

cascade this circuit, it is almostessential that we split Rj, and add

roel.

us

Ry = Sx Ry

A, __252 ae

| Enos

| quite low, and the first stage would have an input impedance of

2

4

ne

Ro.

aes

5.1 V

citor as shown in Fig. 7-5. ake that modification, the input impedance for Example 7-2 becomes

aa

(assuming a 50-50 split in Ry.)

z

En = Eq —V,

ee Inox_1.18 x 10+

13

+=

5

E,on

s

sie

Rin = Rac

:

100 X 25=2.5kN

tS

thé same as before, but it now is the dominant factor. =6kn also the sameas before, butit has a greatertotal influence.

Em _43V .

tots ita Wa

aed,

fore

A

Fin,

ta]

Em, = Ol, x R,

642 y,

ia * Tre

[6 eo

|

_ The net result of splitting R,, and adding the bypass capacitor is an input im-

ance

near 1.5 kf instead of near 400 2. This is an increase of abouta factor of

is almost the sameas the input impedanceofa fully bypassed current-mode

With this modification cascading is possible.

71 z 3e6v [7 fo 7d Z

Epp

Adjusted Eq 5.7

Fig. 7-6 The-completed design sheet for Example 7-2

=

Designing the More Versatile Case (Case 2) of Voltage-mode Feedback

E: Design the circuit, using the following specifications. See Fig. 7-4.

Baier Parameters

100 100 mA

30 V npnsilicon

aaa TECHNIQUES Circuit Parameters

1. Voltage gain

2.

E, p-p

porrounn 20

_

140 5V

3. Riv 4. Stability factor

5 ka 10

5. %AQI. to be allowed

6.

is “don’t load afisi ashicnirig tie paresis 0 aeauily.” Sines this is the only real hazard, a good starting

Maximum operating temperature

7. fo

10%

65°C

30 Hz

take some pains to avoid the problem. y ane start the design by establishing a collector load care . 4 be too heavily loaded by the expected working me e us aeoe st er s at t tha ng thi any ng doi t hou wit s thi do to of these param: ot other parameters. One of the more important lance. Thebest overall results come about when

7-3. THE SPLIT-LOAD (PARAPHASE) AMPLIFIER

This circuit uses equal values of emitter and collec tor resistances. The circuit is normally used to feed two loads simult aneously 180° out of phase. This is a common requirementin push-pull circuits and a number of other phasesensitive circuits. The circuit is shown in Fig. 7-7 . The two loads R,, and R,. are nearly always equ al where the output _ impedances ofthe two outputs are inherent}: 'y differ ent. The collector output has an output impedanceof Z o ~ R, while the ou tput impedanceofthe emitter output conforms to emitter-follower (commoncollector) output impedance, which is some

what lower, as wewill see in Secs. 7-4 and 7-5. Because the working loads are generally the sa me, we must design the circuit around the loadingin the collector circuit becauseit is the least tolerant

of heavy loading. Other than being careful not to load the collectorcircuit excessively, there are almost no problems in designing the circuit. The gain is about unity

for both outputs, and the voltage drop across Ex. ,is fairly high, ensuring good Vy» stability. We should treat the stability factor according to the rules for the common-emitter circuit (see Chap. 5).

Rig, where K is betwoon 1 and 5.

value

ke

ches 7-2 to enable you to select a reasonable value aia ade input impedance. The table can be easily scaled up or y ene of Ex, (and Exes). It is based upon a 5-V drop se circuit has a 10-V E,,, the input impedance et oe eainp anb ; olt t Ex, Er: will yield value shown in the table, a 2.5-V-Vol -half that shown in the table, etc. Please ni n shown are onlyestimatesfor the purpose of helping eesespdaoi

eeu

‘

a decision on the valueof K.

. design procedure is simple, and the design sheet for currel ent approac! di . circuits can be used if we ignoreField 1 and usea differ PARAPI 'HASE 7-2. TABLE OF APPROXIMATE INPUT IMPEDANCES FOR THE

AMPLIFIER

‘Approximate Input Impedances K=1

Fig. 7-7, The paraphase amplifier

it, danceof the circuit, i determi ine the fina}i input impe

2

1k

2k

3kn

6kO

2.5 ko

ska

Ska 65 ko 13k 25 kn 50 kn 65 kN

10 ka 13 ka 26 kA 50 kf 100 kA 130 kN

4

3

4akn

3kn

10 kA ee

75k2

12 kQ

oka

15 ka 19 ka 39 kn 75 ko t *

i

20k 26 ka 52k 100 ka *

5

5 a7

12.5 io 15

25 kf 32 ko 65 is 125 .

The table is based on thefollowing conditions: 10 n= 5 V, Bo=5V. Bra =5V Bt oedances which are high enough for the collector junction impedance to ne involved.

where R, = K X R,,, Since there is very little reason to use any stability factor but 10,let us make an S$ of 10 our standard.

__ Example 7-3 Designing the Paraphase Amplifier Design a paraphase amplifier to the following requirements. - Transistor Parameters

Cae SB

100

2, I, (max)

100 mA.

3. E, (max)

25V

4. Type

npnsilicon

Circuit Parameters

1. Stability factor

ME 6

10

‘eee £8: By p-p 4,

[Bra = Ex = 1.5 V pute Eg (min).

5ko 3V

Input impedance

25 kO orgreater

ME 7

ALTERNATIVE FIELD 1 COLLECTOR SIDE CALCULATIONS

.

ympute E, (min).

FRAME 1 Select a value for K. (R,, =K X Ry)

Using Table 7-2, find a value of K which will meet our input impedance Tequirement with a 5-kQ working load (R,.). An examination of Table 7-2 reveals that 5 kQ is

not listed but 4 k@ and 8 kQ are, and 5 k® lies so mewhere between. ‘Under the K = 1 colu

mn in the table wefind an input impedanceof 25 kQ for a 4-kO

Toad and a 50-k9 Z,, for an 8-kQ load. Since a 5-kQ load is somewhere between 4 koa

and 8 kQ, our input impedance for a 5-kQ load will be between 25 kQ and 50 kQ, which meets the input impedancespecificat ion. For this problem let us select a K of 1. In somecases we may get to the stage wh ere we compute QI. and wish we had used a higher value of K which would have yielded a lower value for Ql. This happens only occasionally, and any guideline s I might give you would probably be more troubl torily.

K=1

e than they are worth. little experience will guide you quite satisfac-

E, (min) = Ener + Ex, + Eo

54+15+4=7V

J

ME 8

“Select a convenient E,. > E, (min) to work witith. For this example let us assume we have a 15-V power supply

‘The voltage distribution must conform tothe following rules:

Eq > Eq (min) Ex =Enee

ateterr than the 3 V grea V gre ird of 15 is i ar example one-thir f thisi particul

aa ie Ee aod so wecan set up thefollowing voltagedistribution:

Em =5V Eg =5V

Bre=5V

Beyond having enough Eg and enough Ep, to satisfy the output volt age requirement, the voltage distribution is completely arbitrary. The volt age drops across _and R,, must be equal, but Eg can hi lave any reasonable value above the minimu R, m.

Compute QI,.

ha 58 N.

Pe Sies 65Q 7S FIELD 2 BASE SIDE CALCULATIONS

From here on the procedure is identical to that of designing a currentmode common-

emitter circuit (with base bias),

FRAME 1

Compute Rye.

Rr=SXR,

Ry =10X 5 kN Rye = 50 kO

FIELD 1

Note: If an active

FRAME 2

FIELD 2

Compute jn.

Rin = RrallBRes 50 kQ x 500 ka Ra= 50 kOQ +500 kN Rin ~ 45 kO FRAME 3

emitter resistor is

used, skip steps 1&3.

Enos = Ene

50 kQ

Rig (max) = $ * Rey For active emitter

resistor, use a value

‘of 50 to 500 k2 for

R,

Compute Ep,,.

Een =Eo+Ex,—V; En =5+5-06=9.4V FRAME 4

Compute R,,.

Ry,

if

EaX Rane Enea +V;

Ry= 94x 45k0

"5 +06

Ry =75 ka

The completed design sheet is shownin Fig. 7-8.

Fig. 7-8 The completed design sheet for Example 7-3

ff

os Herat A NEUT IMPEDANCE AND COUP LING CAPACITOR CALCULATIONS

pedalince and capacitors C,, and C,, are andled for the ordinary current-mode commmonraraiier cinade enn am e Way 28 input

the cost of a transistor increases in proportion to its currenty; resistors must dissipate more power and are therefore more more power is wasted, and this makes power supply costs in-

im)

Xe at fo fCom~O.1Z,

and

they

ical

xX, atf, Of Cog = 0.1Ryy

cond E 1d almost universally used approach is to drive the power an emitter-follower (common-collector) stage which can raise the

levelof the load bya factor of 10 to 100 (in some cases even more),

Problem 7-3

‘where we can use low-level voltage amplifiers for all the stages

the emitter-follower buffer.

‘TITLE: Designing the Paraphase Amplif plifiier PROCEDURE: Design the circuit, using the follow ing specifications. See Fig. 7-7.

B (min)

3k (max)

aoe

4. Transistor type

npn iiliog

it it has somedistinct advantages overtransformers for low-frequency

"I

Circuit Parameters 1. Voltage gain 2. E,p-p

A

4. Stability factor

ae

3. Rie

e co po g

he

temperature

10%

70°C

25 Hz

7-4 DESIGNING THE COMMON-COLLECTOR (THE EMITTER. FOLLOWER) CIRCUIT WITH BASE BIAS The emitter follower has a low output impedance an d a high i

i This pair of characteristics makeit an ideal circuit for detcus te tee

impedance of a load bya factoras great as 8. Sof ar in this book wehave been working with circuits that have been primarily voltage amplifiers, operatin;

at relatively low quiescent collector currents, and with working loads R of no les

s than 1 kA or so. bitlater on we will be working wit h clrcuits designed

to deliver high currents or high powersinto a ver y low impedance load. This kind of operation demands high quiesc ent collector currents and usually the use of powertransistors. The input imp edance of a powertransistor may be from less than 1 Q to a few hundred ohms. In an amplifier with many Stages and a heavy final load we have two des ign options. The first involves the gradual reduction of QI. from output toward input, using low collector currents for only the first few stages. This route is expensive for rc

emitter follower is much like an impedance-matching transformer

be

2. I, (max)

The common-collector circuit has a

of approximately unity, a power gain of V, (1) x I,, and a current Sac, where Sac ~ Roe/Ryac, which is generally larger than the de

Transistor Parameters

eS

costs increase because of the need to mount thetransistors

‘of heat-radiating body; and finally design becomes more dif-

PROBLEMS

1.

ae

It is cheaper than an iron-core transformer, it presents no special

1 mounting problems, it has a very wide bandwidth(starting at 0 Hz), is not subject to ‘core saturation distortion. Exact impedance matching not practical with an emitter follower, but it is also very rare to

exact impedance matching with conventional transformers, as we

‘see later.

Designing the emitter follower is very much like designing the current-

common-emitter circuit, at least in so far as the bare mechanics are

wned. The common-collector circuit has a voltage gain which is always close to, but always less than, unity except when the ac load Ryac apthe value of R;, where it may be considerably less than unity. Voltn is not one of our primary concernsas it has been in the commoner circuit; although we will calculate it as a routine part of the design dure, it will only occasionally be of any real importance. Instead, ourattention will shift to the problem of getting the desired utput voltage. The p-p output voltage is a function of Ryac, the total load, and a valid selection of the quiescent collector current for the load at Here weare again, back to the old problem ofselecting a suitable d. to make thecircuit do the particular job we have in mind. Weare con-

ned with the p-p outputvoltage equation instead of the voltage gain equabut QI, is still the key to proper design. In order to help you make the

er QI, selection for each set of specifications you may encounter, I have a table of possibilities for the common-collector circuit, Table 73. The |

is quite different from the other tables of pussibilities, because the probere is a relationship between load impedance andE, p-p and not between ce and V,, which wasthe problem in previous cases. Thetable

es for the emitter follower provides values of QI, for p-p output tage vs. Rj... It is simply a tabulation of the equation E, p-p = 2QI-Ruac-

Many of the figureshave been rounded off to make th fit better, physical into the table. All QI, values are in milliamperes ti lowed Hens

which denotes amperes. ; a Ae Supp gar ose we comb: ine the desig d n explanation with h a desig ign n exam) ple. 1 isne the current-modeuniversal design sheet (Fig. 7-10) with minor

The purpose of making this calculation is simply to make certain that when make a choice for R.,, it will always have a voltage drop sufficient for the specified Vye stability. After you have had little experience, you may wishto omit this: me

Example 7-4

(E 2

agaa eppinn-calincins (emitter-follower) circuit with the following specifications.

Transistor Parameters Lg 2. I, (max) 3. E, (max)

Use the common-collectortable of possibilities, Table 7-3. The specifications call for a working load value Ry... of 500 0 and a peak-to-peak itput voltage of 800 mV. Here, as in all previous QI. decisions, we will select the

oo

‘age

eat

Vol ,1. zea gain

ose

65°C

| am proud of you. You are thinking. In

of QI, slightly to 1.0 mA. This is not the lowest possible value for QI. butit is and wewill call it the lowest practical value. Thisis in line with our general

licy of not working too close to any limit and of keeping the arithmetic simple whenever there is no compelling reason to do otherwise.

25 Hz 20 KO orgreater

2

‘you are wondering whyI first referred to the working load R,» and then looked up

e the assumption that Ry» ~ Riac is only an approximation, we will increase the

10%

oa pe operating temperature

of 800 mV with an Ry. of 500 0 requires a quiescent collector currentof 0.8 mA.

to get away with such a thin I ha to make the assumption that Rie ~ Ryac fe are going to make R., (,) at least 10 times Riu: this will make that assumption lid. However, 0.8 mA for QI, is not the most comfortablefigure to work with, and

5000 10

factor 5. %AQI. to be allowed

practical QI,. If you will look at Table 7-3, youwill see that a p-p output volt-

value, Rac in the table using the same ohmic d g,

1 (not too important)

a4. Stability Rie Z ue

the QI, decision.

fi

Circuit Parameters

except for very special cases.

FIELD 1

1mA

FRAME 1

FRAME 3

pute the value for the emitter resistor R., (R,). Here we will use the usual equa-

Compute the minimum voltage drop across the emitter resistor

tion, Res = Eges/Qle. but only to determine a minimum acceptable value for Vpg stabil. Again with a bit of experience you can avoid this minor computation except in

‘unusualcases. But for now go along with it.

E

OK, 1.1 kf is our minimum, butit is not what we need for the common-

collector circuit. In almost all cases which are capacitor-coupled to the load we will

tis “wantto make R,, (R,) at least 10 times Ri. Remember thatthe object of this circui etically get the highest possible input impedancefor a given load impedance. Theor

re can transform the load impedance up to a value f times the load value. Wea

t. "interested in transforming R)., but we mustalso havethe resistor R,, in the circuiing

e (leav _ See Fig. 7-9. If we were to make R., 500 0, the theoretical input impedanc

Ros and Rj, outof the picture for now) would be

Fig. 7-9

The base-biased

collector circuit

iia

e

in ~ BX (Resi)

Zim ~ 100 X 250 = 25 kO

pe moranotthatonices, Rare

16 A

ig * in~ BX Ri = 100 X 500 = 50 kO

56 28 14

175 140

900

14A 6A 3A

q the parallel combination of R., and Ri, is almost equal to Ry» alone.

34A 13 A 17A|20A BA 10A/12 4 3A 4A 5A 2A 2A 2A 1A 1A 2A 800 1A 1A 500 700| 750 160 | | 200 240 100 130 150 80 100 120 50. 70 75 32 40 48 16 20 24 10 12 1.6 24 08 1.2

example, if an R,, of 10 kQ is put in parallel with the 500-0 R,., we get an equivaat resistance of about 470 0.

tor

i

70 ~ 500

12 0.6

0.8 0.4

Ruwe = RealRiw

can maximize the input impedance for a given load R,, by making Re, large com-

d to Ri» aud by making R,, and Ry, as high as possible.

Table 7-4 provides a tabulationof estimated input impedance values. The table

0.2 0.1

ot intended to yield precise values but only to provide a guideforselecting a value

3.2 1.6 0.8 0.16 0.08

Res elt this example the specifications call for an input impedance of 20 kM or

:

1, Ri» = 5009, and B= 100. -

aput impedance of 33Rie. Rie = 500, 33 X 500 = 16.5 kO,a little lower than the

1.6 0.8 0.4 0.08 0.04

* Impossible design conditions

0.003,

0.005,

0.025

0.05

0.2 0.12 0.05 0.012 0.005 01

100 160 250 500 1,000 5, 000 10, 000

|

0.16

0.25

os | 80

bin ~ RuillReall X Ria

kQ specified. Suppose we see what an R,, of 20 X Ry» will do. Thetable tells us

0.8 04 0.2 0.04 0.02 0.4 0.2 0.1 0.02 0.01

25 1.2

1,2 0.6 0.5 05

1.6

2.5

8.0 10 16 50

10

2.5

40

the value of Ry, will be. The actual input impedance of a base-biased \mon-collector circuit is given by the formula

If we make R,, = 10 X Ry,» with our £ of 100, wefind (in Table 7-4) an estimated

16A 14A

400 800 333 666 160 320 100 200 40 __| 80 20 |40 12 25 10 20 42.5

Wewill normallyset R,, at a value of somewhere between 10R,. and 50R,.~, not for the reasonjustcited, but also because Ry =S XR... The higher we make Re,

oa 02

20

13

25

40

20 12.5 10 6.3

125 63

400 250

200

1A 750 600 380 120 75 60 38 24 12

800 500 400 250 80 50 40 25 16

2A 800

2A 1A 400 200 125 100

2A

2A

6A

10 A

13. A 7A 4A

7A 3A

3.24 27A 640 14A 400 800 160 320 80 160 50 100 40 80 25 50 16 5.0 10

3A

~

= Riw

200 166 80 50 20 10 100

0.25 0.3 0.6

aS

e can’t leave R,, out of the circuit, but we can makeits value high enough so that

27A

20 A

16

12 400 200

100 [Re a Ts

E, p-p Volts E, p-p Millivolts

TABLE OF POSSIBILITIES FOR THE COMMON -COLLECTOR CIRCUIT TABLE 7-3.

anaes

’ :

7-4.

APPROXIMATE INPUT IMPEDANCES FOR BASE-BIASED EMITTER

FOLLOWERS

ee .

Estimated Input Impedances

i

4

Ro=

Rea=

Re=

Ra=

2ORie

25Riw

SOR.

16Riw

20K.

21Rie

23Rie

WOR

ee 2

T 25Rie

BBR

35Rew

40Riy

33Ruw

SORi

55Rue

70R i

37Riw

BOR

68Ri6

GORi6

40Kie

66Rie

TERine

100R

Big ~ BRic\ (S/2)RRise = ReslBiwe

fa based on an S of 10. Formula andtable both assume Eg., ~ Eg-

i

%

Ca ‘a h

ted input impedance is 50R;.. 50x 500 = 25 ka. So it looks as if a choice of 20 x Rix is a good one.

anc, 1tofairly

the

h

for 2.8 of 100 and R., = 20 x Ri~, our estima

e of the ‘less than Ene, can easily defeat the basic purpos Epes

ee

Kes = 20 X 500= 10 kN Re=10k0.

equal to or greater than Eg ke Ma b: um th of le Ru t. cui cir er ter follow — i

which is much larger than the minimum valuef or Vp, stability. The figure we have written down in Frame 1 is not the actual vol tage drop across Res.

Let Eqg= 10 V.

10

Compute the power supply voltage E,.

FRAME 9

Wehadbetter take a moment to comput e the actual voltage drop across the kO, Ry. We will ne

ed this figure later. By Ohm's law,

E,=Enei+ Em +£Ea

Exes = UcRer

fe 10+0+10=20V E,=20V

1x 10-"x 1x 104 Exes = 10 V

FRAME 4

FIELD 2

y

_ Compute the base-emitter junction resistance Ri.

FRAME 1

Compute Ry», the stability resistor.

Rm = 3X Ree

R= 23 25.0

fe FRAME 5 Compute Rac.

Ry. =10 x 10 k@= 100 kA

-

FRAME 2

Rine= Ros||BRes

Ra, = 100 k0)}100 x 10 ka Rig = 91-0. | ‘This s is a de calculation, and because of the coupling capacitor Ceo, Rim a part of Rin

FRAME 6

Comipute the value of the tollector load resistor.

Since there is no collector load resistor, skip this step. In a later example we ae a collector resistor

boots trapping purposes, esistor, and we will call it Ry for insteadofR,

;

Rin Compute the partial input resistance

* Skip this frame Jf R,, (R,) is 10 R,,, or mor e.

but it will not be a load

FRAME 7

FRAME 3

_ Compute Ex,.Obviously if there is no collector loau resistor, there is no voltage drop across it. Skip this frame (or enter 0 V).

Compute Eq», the voltage drop across Ra.

Em =Eqt+Em—Vs

si

Ban = 10+ 0-06 Em =94V

FRAME 8

Computethe collector-to-emitter volt age drop Eq.

Eq (min) ~ 1+,p-p Eg(min)~1+08V Eq (min) ~ 1.8 V

lr

(geo mV)

This is another-step which will prove unnecessar y in manycases, but it is quite

important that we don’t overlook it on tho se occasions whenit is important. Such a small Eg voltage would yield

a very low value for Ry, which woul d drastically reduce the input impedance. One of the best compromises is to set Eq~ Ens A higher value of Eq would yield a larger value for Ry, but because R,, is in Par allel

FRAME 4

Compute the value of Rai. r

Bp X Rie

Ro Baex +91Vsk0 94

Ru=~q9-06

Ry ~ 91kO

for Example 7-4. Figure 7-10 shows the completed design sheet

© Epes + Em + E,

FIELD 2

Sn Fey hee!

(cont.)

Ri

4

£20v

Far * Raa 1B Pay

gone to someeffort to make R., greater than 10 times as large as Ryo,

Collector

2

KD

Ri. Now wecan rewrite the Z, equation as follows:

has

BASE BIAS

Yrgesc

CIRCUITS

ONLY

RA, 02

g

Bias Resistor

Ry,

e

e have managed toelevatea load fromits actual value of 500 © to an value of 25,000 ©, a 50-fold increase.

‘

91 KD

Cae ok

voltage

1

| ee

i

a

oeFS

Fea 108

ag Imax) = 8 xR,

For active emitter

oe Re.

mitter stage and the 500-2 load, the common-emitter stage would have seen

used, skip steps 1 & 3.

FY

7

[. ot keep the voltage gain downto a low value. If we elect a high QI, for the son-emitter stage, it will present a heavyload to the stage driving it, and so on. ‘other hand, if we had placed the emitter follower wejust designed between a

FIELD 1 mate ervitior resistor fe

FIELD 2

|.

500-€ load, for a common-emitter amplifier, would either demand a fairly

Fag 100 KS Feit

tr

3

Tas

oe stability

resistor Fe 1OkD

Stability resistor

"3

Voltage gain

requirements

id of 25 kQ, which would allow comfortable operation at 1 mA orso with a very

|

Bi

Vee x 100 eas

,

MeOH l 1mA

2

Designing the Base-biased Emitter Follower E: Design the circuit, using the following specifications. See Fig. 7-9. Try for the highest practical input impedance. tor Parameters

Make the collector | Sraaee rs bias See able of posi pine: Rae ee ©

cent currents with high voltage gains.

Ene 125V 11

Ql,

&

voltage gain. Furthermore, all prior stages could be operated at low

. § (min)

LG

3

_ I, (max) 3. E. (max) . Transistor type

as bias

Select Ey 1

&,

=

E°

ine

L. Voltage gain E, p-p

Bes = Evias | Ol,

; differenti

!

Pe Eq, / 201,

ft

For

satires

Fig. 7-10 The completed design sheet for Example 7-4

uit Parameters

i

}

Ri, eG

Stability factor

%AQI. to be allowed

Maximum operating temperature fo

100

100 mA. 25V npnsilicon

1

16V

100 2 10

10%

65°C

ae

i

4

i | Somewhathigher input impedances

1. Voltage gain

;

version of the common-collector ren) Tie smitter-biased as in Fig. 7-11a, the input impedanc e can

1

2. E.p-p

4Vv

4. Stability factor

ae

a Rip

5. %AQI. to be allowed

6. Maximum operating temperature 7. fo 6. Zu

500 2 10%

65°C 25 Hz

;

40 kO orgreater

FIELD 1

; efforts on the circuit in Fig, 7 Pa Cuit isn soasimp1)lehs pawe that tioncia oul co well do away with thee desi r gn sha eeg t, ad but Y design sheet anyway, eliminati necessary sieps, fo

r the Purpose of Maintaining a uniform Peetu: ae lat er, wh en have sheet, ttahall yo som@ experience, you elect to ignore th aout be ctiha ecidca, e design

_ Example 7-5 - Given the circuit in Fig, 7-1

hin

"specifications.

design a common-collector circuit to the following

FRAME 1

Coinpute the minimum E ge, for V gg stability.

eo

AVae X 100 =

Bs

= 212:5.X 10° x 10 10 “-. Epes = 1.125 V __ Anyvoltage higher than this will be acceptable. Bye,

FRAME 2

:

Make the quiescent collector current decision, QI,

Transistor Parameters

1B

100

2. I, (max)

100 mA

3. B. (max)

25V

See the common-collectortable of possibilities, Table 7-3.

Ql.=4mA FRAME 3

Find the value of Re. a

Here again we want R,, to be somewhere between 10R,., and 50Riw- In that case

the estimated inputimpedanceforthis circuit is approximately equal to AR,» and does not vary much(because there is no Ryz) between 10R,,.and 50R;». The thing that does

become importanthere is the dc voltage drop across Re. In this example, we are talking

about a QI, of 4mA. If we make F,,, equal to 50R.», we get anR., of 25kQ. 25 kQata QI. of 4 mA yields a voltage drop of Inpur|

E=IR (Ohm’slaw) = 4 X 10~* x 2.5 x 10*= 100 V In most cases a 100-V bias supply would be a bit too much. Our real concern

here is the bias supply voltage; so let us try the minimum of Res= 10Rip:Ree=10X te)

Fig. 7-11 The common-collectorcircuit, The circuit with a direct(a) ator emitter coupled generator; (b) the ciroult with corn capacitorcouplbias. ed gener

500=5kQ. Thisyields a voltage drop of 5k x4mA=20V. Twenty voltsismuch

more reasonable. Let R..=5 kQ.

FRAME 4

Compute R:.

Compute the value of the collector load resistor R,.

3

> Omit this frame. _ FRAME 7

cc

: Compute thevoltage drop across Ry, Ep,.

Eg, =OV_

BASE BIAS CIRCUITS ‘ONLY Bias Resistor

F

because R, = 00

os

Pax

as

Maximum al

Enos * Rin

‘output

Ena + Vy

_ FRAME 8

_} voltage

_ Compute Eg (min).

FIELD 2

Ba~ 1+, pp Eq (min)=1+4=5V

oo

Ryg

FRAME 9 Compute E,, the collector supply voltage. 2 For the emitter bias branch,

-E,=Em,+Eq

E,=0V+5V=5V

i

-

SOK

Ryz (max) = $ XR,

3

mle.

For active emitter resistor, use a value of 50 to 500 KS for R,

LC]

Note: if an active emitter resistor is used, skip steps 1.8 3.

50 k2

Pez SOKO

Band 1.5

Stability “Aare

Because there is no collectorresistor in this circuit, E,=E. E, can be increased up to E, maximum to accommodate available powersupply voltages.

FIELD 2

;

FRAME 1

Rw=SX Re,

The generator must have a dc resistance equal to or less than the computed

"value of Ry» if 8 stability is to be adequate. Ry = 10 X 5 k= 50 kQ.

|

7, 6.25.94

br

R, = 28/ Ol,

FIELD 3

FRAME 1

Compute the input impedance.

5

FIELD 1

Fig. 7-12 The completed design sheet for Example 7-5

Fee

BX (RrodlRie)

Zin ~ 100 x (500/50 kQ)

; ,

___

SS Because wedecided to make R,, equal to 10R,., the input impedance shouldbe about 10 percentlower than the 50 kwecalculated here. In practice, if we have been con-

servative enough in our selection of a working 8, the chances are that the input impedancewill actually be a bit higher than calculated; this isall to the good. Whenever we get involved with that elusiveentity 8, we must expect someerror. Thebest we can do is to try totilt the balance in the most favorable direction by always assuming a conser -

vative value for B.

i

Figure 7-12 shows the completed design sheet for Example 7-5.

The effectiveresistanceofRwis Rm Beef 7 Sy,

The voltage gain approaches 1. The total input impedance is

Zig = FieFtTARa

“1

5 bashers Ryac is Res||R tro

The capacitors should have a reactance of

Bia: 0.1R,b atf,.. the highest practical input impedance.

1. Voltage gain E, p-p

Se , Stability factor %AQI. to be allowed Maximum operating temperature fo

_

100

100 mA 25V

Transistor type

Circuit Parameters

xcy=O0ARyb otf,

The voltage gain of an emitter follower is

Transistor Parameters B (min) 4.

and.

npnsilicon .

1 4v

5000 1 5% 60°C 25 Hz

_ Forthose conditions where V,is very close to unity and the values of Ry, and Ry are large, Zin ~ BR ac: Obviously high input impedances are much moreeasily obtained with _ _ the emitter-biased circuit, but there are times whenthe second powersupply

Figure 7-13 shows a modified base-biased emitter-follower circuit where

both R,, and Ry, are bootstrapped to increase the input impedance. Inpu t impedances of about the sameorder of magnitude as those for emitter-biased circuits are possible using this variation,

The circuit is designed exactly as though the bootstrapping was not

there, except that, after values for Ry: and Ry have beencalculated , each one

_issplit into twoparts to form the junction for the bootstrap capacitors C, and

_ C;. Ry,a and Ra should be somewhere between 20 and 50 perc entof the

whole resistance (R»,a = 20 to 50 percentR,,total). The effective resistance of Ry,because of the feedback from the emitter, is

Fig. 7-13 Bootstrapping Ry, and Ryy in the emitter-followercircuit

for bias is simply not available. Under those circumstances bootstrapping Ry, and'Rg, can bea practical answer to the input impedance problem. 7-7. THE COLLECTOR-BASE JUNCTION IMPEDANCE PROBLEM Up until now the collector-base junction impedance has notbeen taken into accountin input impedanceequations, because the impedanceof that reversebias junction has generally been 10 to 100 timés as high as the combination of base-to-ground resistance and BRya- values. The collector-base junction impedance is usually somewhere between 500 kQ and 2 MQ,and so no matter what we do with therest of the inputcircuit, we cannotrealize an input

__where R, isthecollector-basejunction dynamic impedance without _ strapping.

Example

_ Find R,effective when R, = 500 kQ and V, = 0.9. x 10! R, off ~ 52"~

strapping is

R,eff

5 Ma

Had V, been 0.99, it would have been raised by abouta factorof 100.

Actually we never really know whatthe collector-base junction value is, and _ all we can dois to raiseits effective value so high that, again, we no longer needto _ include it in our input impedance equations.

.

The resistor Rg must be added to the circuit to prevent the output

of the output circuit. The reactance of C, should be approximately equal to 0.1 Rq at fo. The effective collector-base junction impedance with boot-

%

Here the effective junction impedance has been increased bya factor of 10.

impedance any higher than the collector-base junction impedance. There are cases that require input impedances higher than the collector-base junction impedance, and again bootstrapping can come to the rescue. Figure 7-14 showsan emitter follower with the collector bootstrapped.

signal from being shorted to groundthrough the low impedanceof the power supply. R, should be 10 times (or more) greater than R,,, to prevent loading

“

_ 7-8 DESIGNING THE COMMON-BASE CIRCUIT _

There are twopractical versions of the common-basecircuit. One is common_ base for both bias andsignal, with the base returned directly to ground and "emitter bias. The emitter-biased common-basecircuit is shownin Fig, 7-15. Thecircuit here is designed exactly as if it were an emitter-biased com-

4 ‘mon-emitter circuit, except that Ry, is set to 0 2; thatis, the base is returned

R. Phase

Bas

‘

_ directly to ground. The input impedance is Z,, ~ Ri.

Nowlet’s take a look at the second practical common-base configura-

_ tion. Figure 7-16 showsthiscircuit.

Input Fig. 7-14

Bootstrapping the collector-base

junction impedance

.

Eves

=

Fig. 7-15 The emitter-biased common-

base circuit

Fig. 7-16 The base-biased commonbase circuit

___ This circuitis basically a common-emittercircuit insofar asthe bias

Poa eitbanierinihd!Foy Yen Pedy

circuitry is concerned. For signal frequencies the base is grounded through

towne

a large capacitor, making it a grounded base circuit for ac. The circuit is

eit oes it

WIT

designed exactly as if it were a current-mode common-emitter circuit, with

the exception that the input impedance is Z,, ~ R and an Ry» bypass capacitor

E: This is Zi, for the common-base circuit.

es sce.

Lin ~ 25.02 ~ Re

Design a base-biased common-base circuit, using the following specifications. See

s

te Ria:

Transistor Parameters

4. B (min)

.

1. (max)

E, (max)

. Voltage gain

100 mA

FRAME 6 ympute R,.

5 Vp-p

nae

Stability factor

510k

Maximum operating temperature

75°C

%AQIT, to be allowed

Raw X Rive _ 10k X 5 kM _

; fRie—Rin tomn—sin oO

10%

milterhs

FRAME 7

“Compute E,,.

50 Hz

ee 4

=V,R; = 200 x 25=5 kO

200

2, Epp |.

100

30V

Circuit Parcmeters

:

[ES

Fig. 7-16.

F

Eg, = QUeR, = 1X 10° AX 10x 10° =10V

;

FI

Compute Eper: ee Nag 400 _ 137 10x10? ay

aes

GATS

10

os

F

Ene ~ 1.4V FRAME 2

Make the QI. decision. See the fully bypassed table of possibilities (Table 6-2).

— Qle=1mA FRAME 3 ComputeR,, (base bias branch),

14 aca R= Set Mose, 4A

{

f

(E 8

mpute minimum Ey.

Eg (min)=1+E, p-p=1+5=6V min

=

r Compute E,. Assumean E,of 22 V.

PB,=22V

Epg=14V

Eg=10V

_ and Eg must then be 10.6 V, whichis well above the minimum.

FIELD 2 :

:

ME 1

Compute Rp.

; Re =SXRy=5%X 14kN=7k0 '

‘Wecan use S values down to unity in this circuit without adding anyinput impedance

problems. However, low values of Ry» will increase the voltage divider current drain,

i may be important, particularly in battery-operated circuits. _which

‘Base biasE, = Ene + Em + Eo 9] ciety

Emitter bias E,- En, + Eo

pao

£, 22N.

Rint = RoallBRes = 7 kO||100 x 1.4 kD

Collector load

Bye = 6.6 kQ ~ 7 kO

: Beke Eq, _10V Em. = Ol, x Ry

BASE BIAS

FRAME 3

7

Compute Ego.

3

CIRCUITS ONLY

Eni? 0.5 Eo

Bias Resistor

V, = 10.6+ 10—0.6

Maximum

Fy 20m

Fro X Rie 20VX7kO ZV

signal output voltage

J++ Z,,= 252

= 70k

Eq_106 V

Fa =I +E, pp

=

FIELD 1 Note: If an active

emitter resistor is

used, skip steps 1 & 3.

eS)

and

‘of 50 to 500 k2 for ae

aa

a a c= 2nfx, 6.28% 50X25 ~ 2,000 uF FRAME 3 - Compute C,,. X¢ Of Cyp at fy ~ 0.1R pe

X= 0.7kN

Cy ~ 5 uF

Figure 7-17 shows the completed design sheet to provide a summary ofthe results of our calculations.

Aioc__5k2 2. Unbypassed Ruse = Vy Res b. Bypassed Buse = Vy Re

=. Split emitter: see table of possibilities

4d. Differential amp. Ruse = Vy X 2.5 Ry

5 Voltage gain requirements

Cp a

ee hee ee: ‘%AQI,le

Ol,_1 mA. fl

Xe Of Coin at fo = 0.1Z in

;

Rey “a LAK a =

- af Compute Cin

x, at 25 Hz ~ 2.502

el i ae

ee ’ Stability

ee fesistor, use a value

_ -FRAME2

"7

Pea oa

(max) S*R, Rip =

|

Make the collector

[2

current decision.

‘Base bias—) See table of possibilities. ] fue ax a, fe Oy, Select Eris

B]

Figs T+ Ege Ri Bu OR

For differential

amplifiers, use:

Rar = Ey | 201,

_ Fig. 7-17. The completed design sheet for the common-base example (Example 7-6)

va ae “2

Designing the Base-biased Common-base Circuit PROCEDURE: Design the circuit, using the following specifications. See Fig. 7-16.

Transistor Parameters

1.

‘

100

£6 (min)

100 mA

2, I. (max)

30V

3. E, (maxi

TABLE 7-5. SUMMARY FOR CHAPTER 7+CURRENT-MODE CIRCUITS:

‘iiest

Designed as:

Possibilities

Table 5-5 b Fully

bypassed, Table 6-2

Emitter

c Split

emitter,

Table 6-4

Pully bypassed, ‘Table 6-2

base

Fully

Common collector, Table 7-3

collector

bias

bias

emitter

Base bias

Common| Base emitter bias

Emitter

Common Emitter

bias

bypassed, Table 6-2

Base bias

None

Common| Emitter

emitter

.

Zin =

bias

Common| Base bias emitter

JUESTIONS 1. =

3.

4

5.

Common collector, Table 7-3

Common | Emitter collector bias

Common emitter

Zi, ~ Re

Poni very few new ideas or methods involved. are The voltage-mode circuit design is most different from what we have. < ntered before, but even here there was onlya little new. Voltage-m its come in twoclasses: case 1, the simplest case, and case 2, a sli e complex but much moreversatile version. The simplestcase is limited situations where E’s of 2.6 V or less are acceptable. The case 2 circuit be used whengreaterversatility is required. Both circuits have very low t impedances unless the resistor R,, is split and a bypass capacitor is _ ' ed to eliminate the Miller effect problem for signal frequencies. Table 7-5 is a summary ofthe equations involved in this chapter (ex. cluding voltage-modecircuits) and compares them to the current-mode comnon-emitter circuit equations from previous chapters.

Reec = ResllRiw Rey > 10Riw Bua ~ Rie

Zin ~ Ron|lRre|BRow

R=0

Eq =O0V

be 1. Rise = RealRue Ree > 10Rie 2. ©-Ruae ~ Rise 3. 4. 5.

Sta

7-1 Describe the limitations of the case 1 voltage-mode feedbackcircuit. 7-2 Whatcauses the very low input impedanceof the voltage-mode feedbackcircuit, and what can be done aboutit?

7-3 Compare the maximum E,p-p for a voltage-modecircuit with the E, p-p of a current-modecircuit.

7-4 Whatis the purpose of the paraphase amplifier?

7-5 Describe the voltage distributions onthecollector sideof the paraphase amplifier.

_ 7-6 Whatare the primary reasons for using a common-collector circuit? _ 7-7 Whyis the emitter follower tableof possibilities (Table 7-3) so very different from the othertables of possibilities?

7-8 Inthe emitter-follower circuit, whyis R,, (Fig. 7-9) made 10 times(or more)larger than Rw?

7-9 Whatare the advantages of an emitter-biased common-collector circuit over a base-biased common-collectorcircuit?

7-10 Whatis the purposeof bootstrapping the emitter-followerbias circuit?

of

272 TECHNIQUES 7-1

7-12 7-13

744

Describe the collector-base junction impedance problem for very high input

ipedance emitter followers. Weed Kind ot Gentine otetive & swatlive) te avelvod in boomer Compare the circuit characteristics of the common-base circuit to those of the common-emitter circuit. What are the similarities in the design procedures for common-base and common-emitter circuits?

oe

the design _ process asa _ troubleshooting tool 4 Phi ngs you should beable to do upon completion ofthis chapter) 1. Analyze the base-biased common-emitter circuit in all three variations :

unbypassed, fully bypassed, and split emitter. Analyze the emitter-biased version of the common-emitter fully bypassed

circuit.

. Analyze the voltage-mode (feedback) common-emittercircuit. _ Analyze the paraphase amplifier circuit.

«Analyze the common-collector circuit (both emitter and base bias versions). 5. Analyze both emitter and base bias versions of the common-base circuit.

VALUATION: Thereare questions and analysis problems in the chapter. The final evaluation rests upon the ability of the student to analyze cirr | Cuits, build them, and havehis analysis figures come significantly close to

_Measured valuesin the laboratory. The laboratory manual contains speGific circuits to be analyzed and operatingcriteria.

RODUCTION chapter is devoted to thefine art of analyzingcircuits designed by somefe else. In many ways this is a more difficult art than that of desi gn, ele

ie

=

peel

274 TECHNIQUES

because we are not privy to the designer's philosophy, methodology, or decision-making process. The methodpresented here is dependent upon an understanding of the design methods you have been studying and is an outgrowth of those

methods. Thedistinct advantage of the method weshall learn in this chapter

is that we need not have any knowledge of the designer’s thinking, and in

accuracyof quiescent voltage It totell exactlyhowaccurate your calculations will be, because so much ds

or allof this vital information, and frequently no schematic is available. The

schematic can, of course, be drawn and componentvalues obtained from the (discrete) equipment being serviced; but it is often essential to know what voltages and other circuit parameters should be, so that measured values can be compared with what those values should be in the properly operating

circuit. By turning the design procedures inside out, we can determine with a

good degree of accuracy what these circuit parameters should be. With a little practice, good estimates of parameters can be made with verylittle actual computation. These easily obtained estimates will serve for all but the

most subtle malfunctions.

The analysis process can be quite simple or nearly as complex as the design process, depending upon the degree of accuracy required. In perhaps 99 percent of the usual routine troubleshooting problems, a first approximation is adequate, and this can be madewithonlya little calculation and with no knowledge of the parameters ofthe transistor involved. Weshall begin by seeing howthisfirst approximation is made and then follow it up with more carefulcalculations. I warn you nowthat the increase in the effort required to achieve that greater accuracy will be greater than the improvement in that accuracy. The basic philosophy of good design is making the circuit parameters as independent as possible of the transistor parameters. Then, by implication, we can analyze a well-designed circuit to

at least a fair approximation without including transistor parameters in our

analysis. Frequently, the first approximation yields accuracies within 20 percent. The second approximation includes the transistor's 8, either as an

’ educated guess or taken from the manual.

It makes very little difference

which, since either approach involves considerable possibility of error. The

upon how well the circuit is designed in the first place. Some are compromised by economic considerations; but as a rule these are

sot critical circuits, and the error involved is not apt to be troublesome.

The third approximation requires an exact knowledge of f for the parar transistor involved andyields very accurate results. Because is such shifty character, the third approximation is seldom used and seldom

most cases we do not even need to know the transistor type number to

analyzethe circuit successfully. Thefact that the analysis process presented here does not require any knowledge of transistor parameters has far-reaching implications in the field of integrated circuit technology. Data on the parameters of individual transistors on an IC chip are nearly absolutely unavailable. The methodweshall studyis ideally suited to this new technology, as well as being a simple and effective tool for the analysis of discrete circuits. The technician is all too often faced with the problem oftroubleshooting a circuit when such things as stage gain, quiescent voltages, and maximum output swing are not known. Schematicsare often lacking in some

eee.

part

a spite of some uncertainty in predicting the amount of error, the d has yielded surprisingly good and consistent results for my students ing the six years it has been in use in my laboratory. Integrated circuitry

of the current technical scene, and device-oriented analysis techniques

almost certain to fall short as tools for the analysis of integrated circuits.

almosta certainty that parameters of individual transistors on a chip will

ot be available to the technician or designer. And if history is any guide, even overall integrated circuit performance will often be lacking whenthe IC is‘a part of a commercial system. If a

chematic diagrain of the IC is available, its important performance data can

‘analyzed outof the schematic. Device-oriented methods could be used by ng educated guesses about parameters and plugging those into the approite equations. Atbestthis is a makeshift procedure. WhatI offer youhere s a tool which is appropriate to the new technology, and one whichis far and simpler to use than any of the device-oriented approaches. The methods of analysis presented in the book are tools for today's nology, equally useful for integrated circuits and discrete systems. With this circuit-oriented approach it is sufficient, for most design poses, to know all maximum ratings and to have a rough idea of the tran-

or’s B.

Now,before you get the impression that the approach is somehow less tific than the moretraditional device-oriented methods, Jet me present

i following ideas for your consideration. Critical transistor parameters vary so greatly both in manufacturingtolfrances and with changes in temperature that knowledgeof the parameters of typical transistor of a given type numberis of dubious value. Secondly, any ign process based on device parameters mustultimately design out the stor's parameters, if the circuit is to function and be stable with changes

A temperature. The desired endresult is always a circuit which performs a lar job as the designer intended, and whatever the design process (and are several), it eventually, often after much effort, becomes circuit-

nted.

A circuit-oriented approach does not require precise knowledgeof trantor parameters; this simplifies things considerably. The methods of analy-

sis in this book are intimately related to circuit-oriented met hods of design (a

logical extension of them), and as such do not require a knowledge of the parameters of the transistor involved to analyze a tran sistor circuit quantitatively. This is of great practical advantage, because cir cuits encountered in the field, which must be analyzed, often contain tran sistors about which nothingatall is known. 8-1

o

back and se how it fits in with the rest of the circuits. The 3

ee aie andthe flowchart and analysis sheet _ respondstep bystep. UNIVERSAL ANALYSIS SHEET Current Mode

THE ANALYSIS OF THE CURRENT-MODE COMMON-EMITTER CIRCUIT Rigg

Figure 8-1 showsa universal analysis sheet forall circuits usin g current-mode

feedback. £ Field 1 is used only for base-biased circuits, butit applies to common-

Rn = Rag HBX Reg

emitter, common-collector, and common-base circuits so long as they are

base-biased. Field 2 starts with the computation of the quiescent collector curr ent Ql-. There are two branches, one for base-biased and onefor emitter-biased circuits. If we were analyzing an emitter-biased circuit, the emitter bias branch of Frame1, Field 2, would bethestart of the anal ysis since we would have skipped Field 1 altogether. Frames 2, 3, and 4 are common to all current-mode circuits. Frame 5 involves the calculation of Eq. Here there are two branches, onefor base-biased circuits and one for emitter-biased circuits. The difference is that the voltage drop across R,, in base-biased cir-

Re x Bw Fuse" RT Rag Ena

cuits is supplied by E,, whereas in the emitter-biased circui t that voltage drop is provided by the emitter bias supply and is nota part of E,.

Ema = E,— Ene

Field 3 covers the signal parameters P-p output voltage, voltage gain, and input impedance. Frame1, the P-p output voltage, is common to all current-mode circuits. Frame 2 involves the voltage gain. There are two branches, onefor all current-mode circuits except the common-collector circuit, and one for the common-collector circuit. The gene ral equation for the

Ens .

Eq.

eee .

|

(base bias)

=

Eq = E, Ea, + Em!

:

iter bias) Eq___emitter

Enea * Enea— Vi

i

LE}

Fg = E- Em

voltage gain of all common-emitter and common-base circuits is V, = RiacRS where Ryac is the effective ac load impedance and R? is the effective ac

ES

“Note: Fordifferential

impedance for all the various configurations.

:

#al,

emitter impedance.

branches.

The note marked * NOTE: specifies the effective emitter Frame 3 contains three

Branch a is valid for computing the input impedance ofall

common-emitter and common-collector circuits.

Again the NOTEis used to

get the effective emitter resistance value for the particul ar circuit being analyzed. If the circuit you are dealing with in this fra me does not have an Ry

resistor, simply expunge R,, from the equation with out altering the equation

otherwise.

Similarly if the circuit has no Ry, it may be dropped from the

equation also.

Branch of Frame3 is used for the common-base circuit only,

both emitter-biased and base-biased versions. Branch b is used for differential amplifiers only. Wewill examine the differential amplifier in another

al

e

amplifiers, use

: % :

BASE BIAS Start here

ol,ts —*} gy, = =A Rus

: a

FIELD 2. ;

a

< EMITTER BIAS __

\ Start here

a

= hae

1

R= Tor

al, =

Fig. 8-1 Current-modeanalysis sheet

x

|

UNIVERSAL ANALYSIS SHEET

Current Mode

_Given the schematic diagram inFig, 8-2, compute the following:

Field 3

— Enos, Enea: Eres: Ems Ba, Re, and Rive . Compute the voltage gain, the maximum outputvoltage, and Zin.

.

Because this is a base-biased circuit, we will start with Field 1. For emitter-

d circuits we would skip Fie!d 1 altogethe: and begin with the emitter bias h (Frame 1) in Field 2. See Fig. 8-3.

Compute Zi, : ‘Common emitter Zan = Pos HBog lB RS

Compute Zi, Differential amp. Zq = 28

37

z 6

Fig. 8-2. The schematic for Example 8-1

6

Compute Ziq:

Po)

2, = Fe “Note:

2. b, ¢. 4. @.

3 ©

ars

For unbypassed circuits, Ry = Re, For fully bypassed circuits, R, = Ry For split emitter circuits, Ry = Ryze For differential amplifiers, R, = 2.5 R; For common collector circuits, Ry = Rey |! Riw Fig, 8-1 (Cont.)

In order to give you someintuitive feel for the differences between the

three approximations, I will work an example: Example 8-1a, without including 8; 8-1b, with a 8 of 30;-and 8-1c, with a B of 60. 1 will also have the circuit built and provide you with a table comparing the measured values with the values computed in all three cases.

There is only one reasonablestarting place. Knowing the supply voltage and

Ry, and Rye form a voltage divider and that a voltage divider can be analyzed

ithout knowing the current, wecan solve for the voltage drop across either Ry, or Roa.

will begin with the voltage across R,;. Figure 8-4 showsa voltage divider, which case would be the divider composed of Rp, and Rye, and B X Res. n In this instance we assume that we do not know the @ ofthe transistor, and so e cannotdeterminethe partial inputresistance Rj.;. This is thefirst approximation We can solve the proportion

—Exn m+Ry, E, ye can write it in the more convenient form generally used for unloaded voltage

UNIVERSAL ANALYSIS SHEET Current Mode

FIELD 1

For base bias only Rin

*.

&10v

=

~—

1

gersned

FIELD 2 (cont)

En, 28

Rig = Pig BX Prag

3

Em, = °Ol, x Ry Enos __8V.

R,Aw [4] Mes 80s Fea

sat

= Rape EnosTe | pag

e

A

ote * Pew

200

RL + Ay

BN

FoS8V (base bies)

Enea = E,— Ener

, let us look at Frame 1 :i Fig. 8-3 (the analysis sheet) and begin the example in

|®

rol Peal!FAT

|

Pee TOMS

4

J

|g

|

Fig. &4 The voltage divider Ruw-Rye

ternttine bias) LS.

a

[ELD 1 BASE SIDE COMPUTATIONS (BASE BJAS CIRCUITS ONLY)

u

ompute the valueof the partial input resistance iy.

R,

500,

“Note: Fordifferential

amplifiers, use

In this case, we are assumingthat we do not know £. If is sufficiently high, as

ten is,it will be reasonably accurate to assume that Rj, ~ Ry,. We will make that

ssumption in this case in order to demonstrate that fairly large errors in our knowlof result in only small errors in our analyses of practicalcircuits. We shall ys assume that Rj, ~ Rye, when we use the first analysis. Rj, ~ 4.7 kQ.

(E 2

BASE BIAS Start here

for the voltage drop across R,,.

FIELD 2;

EMITTER BIAS.

Start here

.

mt = RealBRee

Eq = E,- En.

Enos = Enea Vj

1

Ben =|

Fig. 8-3 The analysis sheet for current modecircuits

a

Rn

Bt Ra

=10

18.8 kQ

18.8k0 + 4.7kO

=68.0V (E

3

Compute E gus, the voltage drop across R pe. Atthis stage, we knowthe supply voltage andthe voltage drop across f,,; so it

isa simple matter of subtracting the voltage drop across Ry, from the supplyvolta ge, whi ch leaves us with the voltage drop across Ry».

Enm = E.— Eno

Enm = 10-8 =2V En =2V FRAME 4

Find Epes, the voltage drop across the emitterresistor. The voltage drop across the emitter resistor will be either 0.6 or 0.2 V lowe r

than the voltage drop across Rog. It will be 0.6 V lowerforsilicon and 0.2 V for ger-

manium devices. If it should happenthat you do not know whetherthetransistor is

germanium orsilicon, you can measure the base-to-ground voltage, measure the

emitter-to-groundvoltage, and take the difference between the two. This voltage will almost always be close enough to make the determination, even in a badl y malfunctioningcircuit. Exes = Egy2 — Vs, where V,is the junction voltage drop. Wewill as-

sume thatthis unitis a silicon device. Exes =2V—0.6V

Ena =1.4V

mpute Ey, the voltage

drop across the collector load resistor.

ee

oy tea nicer caricet aad the load voslavanicdy aad again Oba w will tell us the voltage drop.

ac =QI- XR,

(Ohm's law)

p=2.8mAX1k0 =2.8V

(E 4 pute the valueofthe ac collector load Rac.

=RiNRuw

FIELD 2 COLLECTOR SIDE COMPUTATIONS

FRAME 1

Computethevalueofthe quiescentcollector current Ql.

Because we are dealing with a base-biased circuit, we will take the base bias branch. Weigno re the emitter bias branch altogether; it does not apply.

Here we must make the assumptionthatthe collector current is the sameas the emitter current, whichis a very close approximation for most practical circuits. If we know tlie voltage drop across the emitter resistor andits resi stance, Ohm’s law will

give us the emitter current; andsincethis is about the same as thecolle ctor current, we

will know thatas well.

Qie~ 22

AME 3

(Ohm's law)

Rix Rue Ri + Riv s case, R;,, is so high that R,q- is effectively equal to R, alone. =1ko

(E 5 ute the transistor’s collector-emitter voltage drop Eg. Wehave to get at this value indirectly, because we do not know theactual

ector-emitter resistance. But we do know that when we havethree resistances in

, and knowthevoltage drops across two of them, the balance of the supply volt-

‘must appear across the remaining resistance.

=E,— (Exes + Ex)

=10—(2.8+ 1.4) Bg = 5.8 V

FIELD 3 SIGNAL PARAMETERS (SEE FIG. 8-1)

FRAME 2

Compute R;, the transistor’s internal junction resistance.

In some instances wewill not need this value, but in mos t cases we will need it

when we compute input impedance and voltagegain. The calculation is a simple one and worth the effort in the interest of forming a consistent order of analysis steps. This example is a case in point, but we will do it anyway.

(E11

mpute the maximum output voltage E,.

;

P E, is the maximum peak-to-peak output voltage without distortion.

imumoutput voltage is a (Eq — 1) or b (2QI-R rac), Whicheveris less. Eg—1=5.8—1=4.8V p-p

2QIR rac = 2(2.8 X 10-* X 1X 10°) = 5.6 V

RO

“284 TECHNIQUES ‘The lesser of the two is 4.8 V p-p.

“

.

E, ~ 4.8 V p-p FRAME 2 Compute the voltage gain V,.

In this case the emitter resistor is unbypassed, and so R, = Res.

B

UNIVERSAL ANALYSIS SHEET

a

‘Current Mode

a>

eee

Field 3

Eq —10r

|

Compute V,:

(2)

‘The lesser of:

Ql, 2.8 mA

20, Rise

E, pp 4.8V

:

eee 2

FRAME 3 : Compute the input impedance Zm.

Zum = RolRodlBRer

Zen = 18.8 kO|/4.7 kQI2?

Common collector

Y

lv, ==!

(8 is unknown)

Atthis point we come to another branch, one for the differential amplifier, a

Special case, which we will discuss in a later chapter. Wewill ignore that branch and 5 use the one that applies to all other current-mode circuits. j. om Here again we do not know 8,and so we will consider only Roy{Roe-

coon sine

Zen= Boy HM Bag BRE

Zm ~ RoilRie

Zum ~ 3.76k2

a

a

ca)

Compute Z;,:

That is about everything we might need to analyze, or know, to troubleshoot a stage. ‘The completed analysis sHeets are shown in Figs. 8-3 and 8-5. Now, let us work the same example including the one significant transistor

Compute Z,. : Differential amp. Zin = 28 Re

Zn

Compute Z,,: ‘Common base Zn = Ri

Z,

Parameter, 8. Wewill assume af of 30. (Follow Figs. 8-6 and 8-7.)

Example 8-1b Given the schematic in Fig. 8-2, find the following:

Env, Enves Exes: Ents Ea, Qle: Vo, and Ey. FIELD 1 BASE SIDE COMPUTATIONS (SEE FIG. 8-6) FRAME 1

Compute the value of the partial input impedance Rij.

This partial input impedance includes Ra, and 6 X R.,, but does not include Ray.

“Note:

c

a. For unbypassed circuits, Ry = Rey b. For fully bypassed circuits, ¢. For split emitter circuits, Ry = Aege d., For differential amplifiers, R, = 2.5 A, @. For common collector circuits, Ry = Res lI Aw Fig. 8-5 Field 3 of the current-modeanalysis sheet for Example 8-18

FIELD 1 For base bias only

Fm

UNIVERSAL ANALYSIS SHEET

UNIVERSAL ANALYSIS SHEET Current Mode

3.6 k

:

Current Mode Field 3

FIELD 2 (cont.)

Em 22V VAN

Fn = Rag BX Pay

Em = °OI, x Ry

Ruse

| 1k

Rex Bw

4 200 Fue ko

BRey

|

Eq87 V (base bias) Enea = E,—Enyy

Fig

TAY

LE

Fa = E,—(Em, + Eq.) =

-

Eg.

|

(emitter bias) ‘|

Faq = E,~En

“Note: For differential amplifiers, use

BASE BIAS

‘Start here

FIELD 2.

EMITTERBIAS Start here

Fig. 8-6 Analysis sheet for Example 8-1b

Compute Z,,,:

Common emitter

a

Zin = Roy HI Req 1B RE

Zn 7 BR;

ism

LG)

see

Goo)

Compute Z;,.:

Compute Z\,: Zn = ™%

a. For unbypassed circuits, Ry = Re b. For fully bypassed circuits, A, c. For split emitter circuits, Ry

a. For differential amplifiers, A, = 2.5 Ry e . For common collector circuits, Ry = Rar | Ruw Fig. 8-7 Field 3 for Example 8-1b

280 TECHNIQUES

Rau = RralBRe ;

Ry =(BR) Rae + (BRes)

0 3 =( 4.7 kO + (30 x 500)

ry =~ 11.30

E 3

load resistor. omput the voltage drop across the collector we can find the voltage drop by Ohm's law.

‘Knowing the current and resistance,

x Qe Em =F,kQ

x 2.2 mA

=1

Teako+a6kn = (ov) Fig. 8-25 The emi mittte terr-b -biias ase:ed eg collectorcircuit

8-7 ANALYZING THE COMMON-BAS E CIRCUIT The common-base circ uit generally tak es one of two practii cal cir i cuit forms, both of whichutilize c a ae feedba ck for bias stabilization. The circuit shown in Fig. 8-26 is ally a base-biased common-emitter circuit for dc.

8-26 circuit

=

Res (10 k2)

(13 kQ) The base-biased common-

Evin (IOV) Fig.

6-27

The

common-base circuit

=

_emitter-biased

e ac signal, and the th for l ia nt te po nd ou gr at se ba e th es ac capacitor C,, pl making the circuit , nd ou gr d an r te it em n ee tw be d ie pl nput signal is ap ommon-base for signal frequencies. same as the analysis e th y tl ac ex is n io at ur ig nf co s thi of is The analys ent-mode circuit, rr cu ed ias e-b bas er tt mi -e on mm co the for yrocedure used cal versions cti pra all rly nea In e. nc da pe im ut inp ith a single exception: the this configuration Z;, ~ Ri. and is ed as bi rte it em is t cui cir se ba on mm The second practical cé F 27. The 8. Fig in n ow sh s ti ui rc ci The s. bia d an al common-base for both sign itter-biased em an of is ys al an e th as me sa e th y tl ac ex is analysis ofthis circuit put impedance, in e th of n io pt ce ex le so e th th wi n ai ag t, common-emitter circui whichis Zi, ~ Re. ess because, for all oc pr is ys al an e th in ed ud l inc t no is in t ga en rr The cu e stability

o S, th lt ua y eq el at im ox pr ap s ,i in tga ren cur e th I,, s, on "configurati bias configuration is e th e er wh t, en em ng ra ar id br hy e th in r, ve we - factor. Ho es (see Fig. 8-26). not common-base, a small complication aris y the value el at im ox pr ap is dc r fo nd ou gr to se ba om The impedancefr r, is

cause of the bypass capacito be , nd ou gr to e nc da pe im e th ac for t bu », of Ry erent curis two different stability factors and two diff

near 0. Theresult d S as the ratio ine def ve ha We . nal sig for e on d an dc _tent gains, one for ac it becomes Rye/R.s, whichis still OK for the dc value, but for

& impedance, base-ground

Res

ourselves in an arithd fin to ng goi are we on, ati equ s thi use we However, if g currentgain of zero, din pon res cor a d an o zer of S an lds yie t ha dt metical bin

which is just not true. In fact, the current gain of the common-base circuit is always approximately equal to unity. You will rem emberthat back in Chap. 41 said that S ranged roughly from R,/R,» to 1+ R,/R¢, along thatpart of the cur ve in which wewere interested.

We selected R,/R,, to use for convenience.

Here, however, to keep usout of trouble, we hav e to use 1 + R,/Res. Remember

_I, common-base ~ 1.

me

Ee Vi

ee eae

“PROBLEMS 8-7 Analyze the circuit in Fig. 8-26.

Values are shown in parentheses on the

88 Analyze the circuit in Fig. 8-27,

Values are shown in parentheses on the

drawing. Assume a f of 100.

drawing. Assume a 8 of 100.

88 HOW TO ANALYZE A CIRCUIT WHERE BOTH VO LTAGE-MODE _ AND CURRENT-MODE FEEDBACK ARE USED 4

_

adding R,, to the denon eW n can alter this equation to include R,, by simply ator:

Occasionally a base-biased circuit, common-emitter, common-collector, or common-base, will have a resistor in the emitter circuit and return Ry, to the collector. Both current-mode and voltage-mode fee dback are used at the same time. See Fig, 8-28. To analyzethis hybrid,treat it as a voltage-mode cir cuit. However, the input impedance equation will have to be modified and Re» will have to be includedin the QI, equation. The original equation for QI. on the analysis she et (Fig. 8-16) (Field 2, Frame 1) is

Fig. 8-28 The current-mode and voltagemode hybrid

ing R,,, and solve ud cl , in on ti ua eq op lo e th e it wr u yo if s thi ify ver n yu ca o a simple a es input impedance equation modification is als e-mode design re arfocdapat impedance equations on the voltag pee se d3, Frame 3). Both contain the term 6R,. For the ae

ae oy ee “be included (if it is unbypassed) and the term becomes al

ee If R,, is large enough with respect to R;, Re can be e io ae quation. “However, you can’t depend upon that on i as impet t inpu the ed, ass byp is stor resi r tte emi the If hybrid circuit. tions are correct as they stand on the analysis sheet. PROBLEMS Current-mode Analysis Procein ces ren ffe ofDi y mar Sum “A ed titl le tab e Mak 8-9 4 dures.”

ss

d e l p u o c ac — s t i u c r i c e g a t s i t mul

.

_ OBJECTIVES: of this chapter) (Things you should be able to do upon completion in the chapter. NOTE:Specific design problems are included

1. 2. 3. 4, 5.

. Design a multistage iterative R-C-coupled amplifier Design a multistage split emitter amplifier circuit. age current-mode feedDesign a two-stage R-C-coupled circuit with two-st

back.

ncy (untuned) transDesign a multistage (two or more stages) audio-freque former-coupled amplifier. o or more stages) (tw e tag tis mul d ple cou erorm nsf tra RF ed tun a Design < amplifier.

EVALUATION: design the circuits in thi to y lit abi r you on ed bas be l wil ion uat val f-e 1. Sel problem sections of the chapter. r ability to design functional you n upo ed bas be l wil n tio lua eva al fin The 2, laboratory the in ia ter cri and ns tio ica cif spe the to ing amplifiers accord

manual.

be

INTRODUCTION

stages is ier lif amp r sto nsi tra ng pli cou of s hod met r ula pop One of the most of coupling is d kin s thi of s age ant adv ef chi the of e On ng. capacitor coupli does notaffect the and ac for y onl ge sta g vin dri the ds loa ge sta ven that the dri acitor coupling also Cap ge. sta g vin dri the of t ren cur tor lec col quiescent collector voltages and the m fro ge sta ven dri the in ors ist res s bia the es isolat t each stage, driving and tha is lt esu tr ne The ge. sta g vin dri the n esi anc resist s are concerned, indepenter ame par de all as r ofa ins ed, ign des be can , ven dri this indepenof e anc ort imp the for son rea The . ges sta er dently of the oth

oe1

| -922 TECHNIQUES ‘dencewill become moreclear later, when we exam ine direct-coupled amplifiers. In

effect, capacitor coupling eliminates the ne ed for a numberof often not-too-

happy compromises between dc and signal para meters. Capacitor coupling has the disadvantage that it is not us able much below 10 Hz. This fr equency limitation is not very often a prob lem.

For radio freq

uencies, transformer coupling is sometimes a distinct adva ntage, especially when tunedcir-

cuits are involved, but often capacitor coup ling can be used at radio frequencies. It is important to understand that in capacitor-coupled circuits there is no effort made to match impedances, and th at impedance matchingis oflittle im portance unless maximum powertransfer is esse ntial, and this is

seldom the case. What is important in capaci tor-coupled stages is that the input impedance ofthe driven stage becomes the Ry » (ac load) for the driving stage. This fact leads to the iterative concept of ca scading stages, where the bulk of the voltage amplification in an amplifie r is provided by a string of identical stages. This not only makes the designer wo 's rkeasier, butit also is the only practical way to go for fully bypassed st ages, and is often a good ch oicefor split emitter stages.

For inexpensive audio equipment the fully bypass ed circuit is generally in order, and it is also in order for much RF circuitry, ot her than some high-

quality broadcast equipment. Fortrue high-fid elity audio equipment the split emitter circuit is often a good choice. The unby passed circuit should generally be reserved for instrumentation circuitry wh ere its very low distortion and good bandwidth are worth the sacrifice in gain.

3 : a F to be designedon an iterative basis. ‘The split emitter circuit can be designed — : et either one stage at a time or on an iterative basis. Sey age

- does not lend itself well to iterative methods and is almost always

a The teal voltage gain of «cascade of coupled stages isthe product of

x V, the individual voltage gains. For iterative stages the total gain is V,""" umber of iterative stages. Thelast stage is treated stage] ant hae it is identical to the rest of the stages es ally, it aay well have a working load value whichis different from that of : rest of the stages, Wewill see shortly why that happens. The input impedance ofthe entire circuit is simply the input imped‘ ‘input stage). ance Wess aie can be used to achieve higher voltage gains a stage than can be had with capacitor coupling. Transformer coupling is quite : important in radio-frequency circuits, because transformers si i 2 frequencies are inexpensive and provide essential bandwidth control. design of transformer-coupled stages is no more difficult than the se by capacitor-coupled circuits except for problems and limitations impo: sere railable transformers. commerci: Wealcoe the design of transformer-coupled circuits in Secs. 9-5

and 9-6.

The fully bypassed circuit almost must be desi gned as an iterative cir-

_ cuit. If it is designed a stage at a time, the diff erences from onestage to the next will be quite superficial, and you will have done a lot of extra work for very lit tle profit.

The fully bypassed circuit has the largest volt age gain, the

9-1 THE FULLY BYPASSED. R-C-COUPLED AMPLIFIER

highest distortion, and the poorest predictabi lity of the three configurations (gain and input impedance). The fully bypass ed circuit is cheap and dirty and is quite naturally, in our mass-product ion-oriented society, the most

itor, , the input Z of each 5 When full bypassed stages are coupled by a capacitor

The split emitter circuit may be designed a stag ata e timeor it may be iterated. In this chapter we will examine the iterative design problems because you already know howto design the spli t emitter circuit a stage at a time. In order for a one-stage-at-a-time design to be practical, each stage (working from thelast to the first) must have a hi gher input impedance than the stage following it. Because we can control th e value of the input impedance by varying Regc, we can have it either way, as cending input impedances or the same in

for the fully bypassed circuit are limited to a single row inTable 6-2. me input impedance of a fully bypassed circuit with a 1-mAae- eareaely et e inpul Ry, and Rys. AtAt 0.5 i resistors i thebias i 2 kQ,including 5 imately 4k, for 2 mA the input impedance is ance and ieonifin Table 6-2 we examine the row R,,. at 1 mA equals 2 oe see that the highest listed voltage gain is a Dee ad at ai ne kQ. this would yield an R, value of 6 S

commonof the three circuits.

put impedance forall stages in the string.

I will give you a special formula for finding an appropriate value for Ro . for iterative design purpos

es.

The unbypassed circuit does not lend itself well to iterative design procedures, and because of the kind of applicatio fo ns r which it is most suitable,it is not a good practice anyway. Wewill de sign it one stage at a time. In summary, the fully bypassed circuit (capacit or-coupled) almost has

driven st: y is the R,. for the driving stage. Lis in the ay coon : riesc f Ri controls the input impedance, an h circuil

FeerstcaitauieMNy Re oe HRA THe SHR on tte table of possibilities

askedtikins which are biased at @ 1-mA Ql. have an, of 10 KA. 10 kA

for R, has become so commonas to be almost ead ae oe ia Ay 2 Lb yiel La tt show a 10 V Ex, which wou! i Ppossil 1 eeThanediprsiod that part of the table of possibilities (Table 6-2) which applies to iterative fully bypassed circuits a eeoetl V, = 66, which yields a 10-V Ep, and a 10-1

1a

mn

A

- ein oe 66 perstage is the limit for iterative fully bypassed circuits. The modified table of possibilities is Table 9-1.

va

.

(324 TECHNIQUES TABLE 9-1.

THE EXPANDED TABLE OF POSSIBILITIES FOR ITERAT IVE FULLY BYPASSED CIRCUITS

2K

Riw at 2.0 mA

[ix

Rie at 4.0 mA

| s00

Various Voltage Gains

iterative stages. It is not usually hard to live with a bit too much voltage gain,but too little gain can be a problem. It may seem little wasteful to add an emitter follower, which provides novoltage gainat all, but it just: followeri economically soundif the final load is lower than 1 korso.

Voltage Drop Across R, for

Working Loads at Various Values of QI. Ric at 1.0 mA

Riv at 10mA

| 200

Rie at 20mA

Rieat 40mA

Eq, at V,=40|

100

50

2.0

Ey, at V,=60

[6.0

di

Egy at V,—66

10

Thereis nota great deal of difference between V, = 60 and V, = 66,especially in view of the variability of R/, but now the table con forms to what has become commonpractice in the industry. If you will take ano ther look at Table 9-1, you will observe that V, = 66is the magic number no matter what QI. is selected, because when weincrease the quiescent collecto r current, we reduce R; (and consequently the stage input impedance) propor tionally, putting us exactly back where westarted, insofar as voltage gain is concerned. The only problem with iterative stages is that the string mus t eventually end, and the load for the very last stage is likely to be different from the input impedance of the iterative stages. There are three basic solutions to this problem: 1.

Abandontheiterative idea altogether. This is really not (in this case) a solution, for two reasons: First, each stage in the chain would have to be designed individually, and second, it would take many sta ges in cascade to reduce QI, by a factor of 2, and even then the inputstage cou ld have an unsatisfactorily low input impedance. 2. Design theentire iterative chain to operate at a QI, commen surate with the final load Ri». This is a satisfactory solution when the fin al R,,. is between 4 and 1kQ. The problem here for heavy loadsis that amplifier inputimpedanceis likely to end up so low that an input emitter follower will be required. An input emitter follower should be avoided if possible because theiterative stages will consume larger currents. If an emitter follower must be used,it is best to putit as near to thelast stag e as possible.

3,

higher—as much as 100 percent is OK—than the input impedance ofthe

Use an emitter follower to elevate the final load (Ry) resi stance to about the same impedance asthe input impedanceoftheitera tive stages, 2kQ

for this circuit. The last two approachesare generally the mos t satisfactory. Chapter 7 details the methodfor designing emitter foll owers with more or less specific input impedances. There is no grea t need for

precision in the input impedance of the impedanceelevatin g emitter follower because the individual voltage gains arenotreally very dependable anyway; and because the total voltage gain is the product of the individ-

ual voltage gains, these errors are also multiplied. Thebest policy is to make the input impedance of the emitter follower buff er somewhat

't

work out that way in most cases. Generally, adding an emitter

Suppose wetry an example with the assumptionthatthefinal load was either intrinsically about 2 kor has beenelevated to that value by a buffer emitter follower. Wewill follow the usual current-mode design sheet. Example 9-1 The Iterative Fully Bypassed Current-mode Circuit with Base

Bias

Design an iterative-amplifier fully bypassed circuit, using the following specifications.

oo Parameters

A

2. I, (max)

aaa

3.

E, (max)

_ Circuit Parameters

1.

2.

oA

Voltage gain perstage

=

Ne

E,p-p

:

3. Ry» (final)

4. Stability factor

5. %AQI. to be allowed

pa

.

100

6. Maximum operating temperature A

20 Hz &

Ro Output

Com e Input

2

Faw

Rea

Fig. 9-1 The R-C-couplediterative fully bypassed common-emitter cascaded amplifier

V, 88 Ay,242 &, max 25 ¢ max 100°C

s 8

‘The circuit for Example 9-1 is shown in Fig. 9-1. The completed design sheet is

shown in Fig. 9-2.

6.100 saa/, 10 pp 4V

[ELD 1 COLLECTOR SIDE CALCULATIONS

[E 1

CIRCUITS ONLY

ng 2.5 MV/C°, we have a total At of 100°— 20°= 80°C and total AVgg of —

Bias Resistor

x 2.5 mV or 200 mV.

Ry 100 k2

=

200 x 10-* x 10? 10

Eres =2V mee

FIELD 1 Note: If an active emitter resistor is

It is worthwhile to note here that a 10 percentvariation in QI, due to AVagis

‘quite satisfactory for this kind of circuit provided that Eq is greater than 3V.

used, skip steps 1 & 3.

Rigg 10K

Band Ie

Stability resistor

Make Vee

QI.=1mA

stability resistor

Ry 2K

_ FRAME 3

_ Compute R,,, the value of the emitter stability resistor.

Qi,_1 mA.

F.a a Ere E, 2V ima Re OL 2

Make the collector

current decision.

Base bias—| See table of possi-

Rize 1.856 2. Unbypassed

Emitter bias

Rue = Vy Rey

Bue Me Ae

¢. Split emitter: see table of possibilities d. Differential amp. Bug = Vy x 25 R;

Select Enigs Eves > 1+ Epes

Res * Evins | Ole For differential amplifiers, use: Rex = Eras! 201

Fig. 9-2. The completed design sheet for Example 9-1

(Ohm's law)

R..=2k02

bilities.

(6. Bypassed

(E 2 thecollector current (QI.) decision. (See Table 9-1.)

FRAME 4 3

_ ComputeR;:.

25 _25 259

oO

1

(the Shockley relationship)

_ FRAME 5

Compute Rye. (Use Branchb.) Reo = VR; = 66 X 25 = 1.65 kD

— 2kO x 1.65 ko 2KQ— 1.65 ka e.

pute Roy.

This, of course, does not come out to exactly 10 kQ, but in view of the probable inac-

curacyin Rj, it is a respectable, . a ante useful, figure. If you wantto calculate it a little

closer, go ahead; youwill stil

end up building the circuit with a 10-kQ resistor

5

=* Ene — Vs

0 = x1 14

=QI. x Rp =1mAX 10kN=10V

En, =10V FRAME 8

Compute Eg.

Eq=1+E,p-p

_Eg=1+4=5 V (min) FRAME 9

_ Compute E,(base bias).

By= Epa + Em, +Eq

ompute Z;,, the input impedance.

Zin ~ RosliRrelBRe

input impedanceof the entire string is simply the input impedance ofthe first

‘mn ~ 100 kQ||10 k@I}100 x 25 Zn = 2KO

E,=2+10+5=17V

FRAME 1

Compute Ry».

Ri =SXR.=5 X 2kN=10kN

FRAME 2

Xe of Com ~ 0.1Zin

_ X, of Cem ~ 200 2 atfy

Consulting Table 6-3,

Compute Rin, (Base bias, so we go on.)

C~504F

Rin = Rol X Res Rig = 10 kQ|100 x 2k Rin = 10 kQ//200 k0 Rig ~ 10 kO

FRAME 3

~ Compute C,..

into the input ks wor it and r, cito capa ng pli cou ge rsta inte an is C,, e cas this In : eas the sam the s andi ge sta g vin dri the for Riw is ch whi ge sta ven dri _ impedance of the

will have the same value as Cem it ore ref The e. stag t firs the of nce eda imp t pu in

FRAME 4 wfelelelelealalelalale lola lelole le

Compute C,,.

_ Refer to the discussion of the bypass capacitor calculations in Chap. 6 if you have forgotten.

eas

X, ~ Ri at 20 Hz= 250.

X, at 20 Hz= 25

Consulting Table 6-3, we find that 25 9 of X, at 20 Hz requires a capacitor of 500 uF.

Cop = 500 uF

Figure 9-3 shows the complete circuit (tw o stages).

os

Table 9-2 isa rapid-design table for fully bypassed iterative stages. The table also includes some extra colu mns for the design of single-stage unbypassed circuits. Thetable is constr ucted around a QI, of 1 mA, but it can be scaled up or down

easily for other values. R,,. is the same as Zin. The _ tableis actuallyfairly limited but can be very handyattimes.

PROBLEMS

E,17V

‘

Problem 9-1 e Designing the Two-stage Iterative Fully Bypassed Circuit ‘TITLE: PROCEDURE: Design the circuit, using the following specifications. See Fig. 9-1.

| Transistor Parameters

"eo 50 uF

Output Paw 2kQ

1. B (min)

2. I, (max) 3.

4.

E, (max)

3

Transistor type

Circuit Parameters 1, Voltage gain 2. E, p-p 3.

Total voltage gain ~ 66 x 66 ~ 4,356

Fig. 9-3. The complete circuit with values fo r Example 9-1

Riw

4, Stability factor 5. %AQI, to beallowed 6. Maximum operating temperature 7. fo _ NOTE:Usethe expandedtableofpossibilities, Table 9-1.

100

100 mA.

30V

npnsilicon 40 per stage 5V

10

5%

65°C

25 Hz

There are two ways in which to cascade split emitter stages. In the case of the fully bypassed circuit there is no real choice butto useiterative stages, - because even if they are designed one at a time, they will come out almost identical anyway. So there is no point to it.

FIELD 2 (cont.)

The split emitter circuit can be designed one at a time, or it can be

designed in an iterative fashion-with an emitter follower at the endof the chain if necessary. In Chap. 6 we examined the process for designing individual (one-at-a-time) split emitter stages, and so in this chapter we will examine onlytheiterative approach. The big problem here is the final working load value, Ry». In the case of the fully bypassed circuit we knew in in advance that the final load hadto be raised to about 2 kQ, for a QI, of 1 mA

theiterative stages, so that the gain of each stage, including thelast one, would be the same, making the problem ofdesigning in the desired total voltage gain

an easy one.

Here we cannot, so easily, predict the input impedancein ad-

vance, anid so we cannot know to what value to raise the final working load ‘to make the last stage have the same voltage gain as therest oftheiterative stages. There are twosolutionsto the problem, depending upon the circumstances. For this problem wewill use the split emitter table (Table 6-4) and proceed with the design just as we would with a single stage, with the exception that we havea special problem with eu. Theiterative string is unlike asingle-stagecircuit in that we do not know Rj,., except for the last stage, until after we have computed R,,, and Ry», becausethe input impedance ofthe driven stage is R,, for the driving stage.

|

Rigg 18 KD Rin = Rag 1B Rey

=

Eno

22.4 V

3

| 155 KS

4]

Eno = Eq + Em ~ V; Ry

“Eos Bas

Bias Resistor Ay, 155 kQ

OO Ene * Vj

FIELD 1 Note: If an active ‘emitter resistor is used, skip steps 1 & 3.

FIELD 2

ie

Raq 2042 Rag (max) = S «Ry, i “or active emitter resistor, use a value of 50 to 500 KM for

1

Rox

Ro k@) (155

BASE BIAS CIRCUITS ONLY

|

ayes on 20K Band 13 Stability, reer

ea ay stability.

Ry, 2kD oe

Bow (5 kQ)

ie

‘Base bias—

2

Rise 442 a. Unbypassed

Riise = Vy Rex

b. Bypassed

Emitter bias

requirements

Select Exis

c. Split emitter:

Rr, 259 [4

see table of

Fig. 9-4 Thesplit emitter cascade (figures in parentheses are values for the completed

Example 9-2)

Makethe collector currentdecision. See table of possibilities.

Voltage gain

Rese = Vy R

(1.7 kQ)

eee @i,_1 mA

one

Coin

AVae 100 . ee ROT

U1

possibilities

d. Differential amp.

Rise = Vy x 2.6 Ry

ol eetad .

:

Evian 71+ Epes

= Ea/ Ole For differential

Fig. 9-5 The completed design sheet for Example 9-2

=

The input impedance is

1

wg Zin = Rie = Ron||Roe||BReac :

Even after we have values for R,, and R,y2, we are far from being out of the woods because eae is a part of both Zi, and Ryac-

Remember

Ruac=RillRiw

Riw = Zin

—«S.

6. 7.

Stability factor

% AQI, to be allowed

Maximum operating temperature

Bey

FIELD 1 COLLECTOR SIDE CALCULATIONS

FRAME 1

and

Compute E,.,, the voltage drop across the emitter stability resistor.

: R =a Reac Sy ae

AVoe X 100

%AQn p Bae =—_—

With little substitution we get

ey

Bull uy R Rene Rea — RoillRrelBReae -

2. 3. 4.

Nowisn’t that a fine mess? R,.- appears on both sides of the equation. _ Obviously we must manipulate this thing so that R,,, no longer appears on both sides. Now that you see the problem, you should be prepared for the fact that the revised equation for finding Ra will be a bithairy. Some of - my students throw up their handsin despair thefirst time they see it, but the time you actually have to use the equation, there is no more to it than F substituting in all the values and doinga little arithmetic. It is not really bad at all. Here it is, the great split emitter formula:

ey

V,is the gain of each stage. If you have enough time, patience, and curiosity, you can practice a your algebra and manipulate Eq. (9-1) into Eq. (9-2). Nowlet us try a design example. The schematic is shown in Fig. 9-4. . Figure 9-5 shows the completed design sheet.

, Example 9-2 Designing a Two-stage Iterative Split Emitter Circuit

Eie=2V

FRAME 2

: Make the quiescent collector current decision. Consulting thetable ofpossibilities (Table 6-4), we find we can use 1 mA with 20 V for Ep.

Ql. = 1.0 mA FRAME 3

Compute R,,. (Use thebase bias branch.)

FRAME 4 -

Compute R: (the Shockley relationship).

Compute R,c, the total ac load resistance.

Here, wego backto thetable ofpossibilities (Table 6-4) and lookin the table’s

1. 6 (min) 2. I, (max)

100 50 mA

4.

npnsilicon

Type

ia

FRAME 5

Design thecircuit, using the following specifications. 3. E, (max)

E32 10-* x 10?

(9-2)

Rew = VIR, + VolR+ Velen

Transistor Parameters

Rae X 2.5 MV) )

(total 1 AV nx: = 80°

30V

superstructureto find an R,9- value of 4kQ. We must wait until later to compute the

values for Reac and Reuce-

Ryac = 4 kQ

— a ina

FRAME 6

Compute the valueofthe de collector load Ry. R, = Rue X Ruse _ 5kOx4k0 Riw—Rrae 5kN-4kO

R,=20k2

FRAME 7

Now that we have all the values we need for the great split emitter formula, we

Compute the voltage drop across R,.

Em =QI. X R, =1 mA xX 20k0 Ex, =20V

FRAME 8

Computethetransistor’s collector-emitter voltage drop Eg.

Eg=1+E, p-p=1+2 Eo=3V FRAME 9

Compute E,, the power supply voltage.

Enes + Ex, +Eg (base bias) 2+20+3=25V

FIELD 2 BASE SIDE CALCULATIONS FRAME 1

Compute Ry..

Ra = SX R= 10X 2k Rm = 20 KO Becausethis is a basebiascircuit, we will go on to Frame 2. FRAME 2

ComputeR jn,. Rin = Reali X Re, = 20 kQ/100 x 2 kA

Rin, ~ 18 kD FRAME 3

Computethevoltage drop across Ry. =EgtEg—V; 3+ 20-06 22.4V

Ive for Reac and eae:

a

1-V,

wee = VIR, + V/A+ Vila

a e

a

“1 (20/100)

20/20,000 + 20/155,000 + 20/20,000

8x 107

(i x 10) + (0.13 x 10-*) + (1 x 107)

Be 107! 2,00 x 107

= 4X 10®

= 4000

sLD 3 INPUT IMPEDANCE AND CAPACITORS

Ei pute the input impedance.

= RailRoallBReae = 155 kQQ|/20 kQ\\100 x 400 ~=13k9

needthis figure to compute the inputcapacitor value, and weneed it also to deter-

e whether a Young-Albertson loading correction is necessary. We canalso use it

verify Rene because Zin = Riv. First let us check the value of Rac.

jy = Rese Reac

Rioc for theiterative stages is Rij\R ie, Where Rie = Zi, = 13 kO.

Rune = RullZy = 20 kO [13 kO

=sko

ene = 400 2

ako _

oon 7° "Nowlet us see about the Young-Albertson correction.

‘TECHNIQUES:

Ry, = 20k

Rie = 13k

Ay _20k0 Rw

13k

™*

33percent.

andit is not entirely an arbitrary one. I might mention here oe! yr practice to get the highest possible voltage gain in anypartic erall f al ee the heading “V, range.” For example, if we wanted

le

Beis|would nottry to get it out of the saeco Ve eeeap ‘i es A ks ON [lo 4 a : over to the second-column V,range, id move

400 x 0.33 = 132.0

Reducing Reac by 132 , we get a new Ree of

h . The second question is, how do we gel i Mm! ayetigd a nie final stage of the iterative chain is going to be dif-

1e

fro he gain ofall the rest of the stages in the chain? And more i re do we cope with it? In the case of our present example the e gain ofthe last stage will be

400 — 132= 268.0

Rea ~ 2702

Nowfor ReueReac 2 kQ— 2700 Reac = 1,730 2

Pre a oon experience that has formed my ee

1

If welook at the Young-Albertson curve (Fig. 6-5) at the correction for Ry, = 1.5R jn. we see that weneed a cor

rection of about 33 percent. This means a reduction in Rac of

it of experience, you need no longer : go along with my:

Bree

7.

5 kM)20kO _ 4kO _

400

400

°°

for the rest of the stages will be equal to