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Table of contents :
TITLE
CONTENT
1 BASIC CIRCUIT ANALYSIS AND NETWORK TOPOLGY
2 NETWORK THEOREMS FOR DC AND AC CIRCUITS
3 AC CIRCUITS, RESONANCE AND COUPLED CIRCUITS
4 TRANSIENT ANALYSIS
5 TWOPORT NETWORKS
Appendix
Question Paper
Index
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CIRCUIT ANALYSIS
About the Author Prof. Nagoor Kani is a multifaceted personality with an efficient technical expertise and management skills. He obtained his BE in EEE from Thiagarajar College of Engineering, Madurai, and MS (Electronics and Control) through Distance Learning program of BITS, Pilani. He started his career as a selfemployed industrialist (1986–1989) and then moved to teaching in 1989. He has worked as lecturer in Dr MGR Engineering College (1989–1990) and as an Assistant Professor in Sathyabama Engineering College (1990–1997). He started his own coaching centre for BE students, named as Institute of Electrical Engineering and was renamed as RBA Tutorials in 2005. He started his own companies in 1997 and his currently running companies are RBA Engineering (manufacturing of lab equipment and microprocessor trainer kits), RBA Innovations (involved in developing projects for engineering students and industries), RBA Tutorials (conducting coaching classes for engineering and GATE students) and RBA Publications (publishing of engineering books). His optimistic and innovative ideas brought up RBA GROUP successfully. He is an eminent writer and till now he has authored thirteen engineering books which are popular among engineering students. He is known by name through his books in all engineering colleges in South India and in some colleges in North India.
CIRCUIT ANALYSIS
A. Nagoor Kani Founder, RBA Educational Group Chennai
McGraw Hill Education (India) Private Limited CHENNAI McGraw Hill Education Offices Chennai New York St Louis San Francisco Auckland Bogotá Caracas Kuala Lumpur Lisbon London Madrid Mexico City Milan Montreal San Juan Santiago Singapore Sydney Tokyo Toronto
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McGraw Hill Education (India) Private Limited Published by McGraw Hill Education (India) Private Limited 444/1, Sri Ekambara Naicker Industrial Estate, Alapakkam, Porur, Chennai 600 116 Circuit Analysis Copyright © 2018, by McGraw Hill Education (India) Private Limited. No part of this publication may be reproduced or distributed in any form or by any means, electronic, mechanical, photocopying, recording, or otherwise or stored in a database or retrieval system without the prior written permission of the publishers. The program listings (if any) may be entered, stored and executed in a computer system, but they may not be reproduced for publication. This edition can be exported from India only by the publishers, McGraw Hill Education (India) Private Limited. ISBN (13): 9789387572720 ISBN (10): 9387572722 Director—Science & Engineering Portfolio: Vibha Mahajan Senior Portfolio Manager—Science & Engineering: Hemant K Jha Associate Portfolio Manager—Science & Engineering: Vaishali Thapliyal Production Head: Satinder S Baveja Copy Editor: Taranpreet Kaur General Manager—Production: Rajender P Ghansela Manager—Production: Reji Kumar Information contained in this work has been obtained by McGraw Hill Education (India), from sources believed to be reliable. However, neither McGraw Hill Education (India) nor its authors guarantee the accuracy or completeness of any information published herein, and neither McGraw Hill Education (India) nor its authors shall be responsible for any errors, omissions, or damages arising out of use of this information. This work is published with the understanding that McGraw Hill Education (India) and its authors are supplying information but are not attempting to render engineering or other professional services. If such services are required, the assistance of an appropriate professional should be sought.
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Dedicated to Wife, Mrs. C. Gnanaparanjothi (B.Sc., M.L.) Elder Son, N. Bharath Raj Younger Son, N. Vikram Raj
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CONTENT PREFACE.............................................................................................. xv ACKNOWLEDGEMENT............................................................................ xvii LIST OF SYMBOLS AND ABBREVATIONS................................................. xix CHAPTER 1  BASIC CIRCUIT ANALYSIS AND NETWORK TOPOLOGY......... 1.1 1.1
1.2
1.3
1.4
Introduction to Circuits and Networks....................................................................... 1. 1 1.1.1
Basic Phenomena...........................................................................................
1. 1
1.1.2
Ideal Elements ................................................................................................
1. 1
1.1.3
Electric Circuits ..............................................................................................
1. 1
1.1.4
Units ................................................................................................................ 1. 4
1.1.5
Definitions of Various Terms.......................................................................... 1. 5
1.1.6
Symbols used for Average, RMS and Maximum Values.............................. 1. 7
1.1.7
Steady State Analysis and Transient Analysis.............................................
1. 8
1.1.8
Assumptions in Circuit Theory......................................................................
1. 8
Basic Concepts of Circuits and Networks ................................................................ 1. 9 1.2.1
Basic Elements of Circuits............................................................................. 1. 9
1.2.2
Nodes, Branches and Closed Path................................................................. 1. 10
1.2.3
Series, Parallel, Star and Delta Connections................................................. 1. 12
1.2.4
Open Circuit and Short Circuit....................................................................... 1. 15
1.2.5
Sign Conventions ............................................................................................ 1. 16
1.2.6
Voltage and Current Sources.......................................................................... 1. 17
1.2.7
Ideal and Practical Sources............................................................................ 1. 17
1.2.8
DC Source Transformation............................................................................. 1. 18
1.2.9
Power and Energy............................................................................................ 1. 19
Ohm’s and Kirchhoff’s Laws........................................................................................ 1. 20 1.3.1
Ohm’s Law........................................................................................................ 1. 20
1.3.2
Kirchhoff’s Current Law (KCL)........................................................................ 1. 20
1.3.3
Kirchhoff’s Voltage Law (KVL)........................................................................ 1. 20
Resistive Elements........................................................................................................ 1. 21 1.4.1
Resistance........................................................................................................ 1. 21
1.4.2
Resistance Connected to DC Source ............................................................. 1. 22
viii
1.5
1.4.3
Resistance in Series........................................................................................ 1. 22
1.4.4
Resistance in Parallel...................................................................................... 1. 23
1.4.5
Analysis of Resistors in SeriesParallel Circuits........................................... 1. 23
1.4.6
Single Loop Circuit.......................................................................................... 1. 26
1.4.7
Single Node Pair Circuit.................................................................................. 1. 26
1.4.8
Solved Problems.............................................................................................. 1. 27
Mesh Current Method of Analysis for DC and AC Circuits....................................... 1. 36 1.5.1
Mesh Analysis of Resistive Circuits Excited by DC Sources........................ 1. 36
1.5.2
Mesh Analysis of Circuits Excited by Both Voltage and Current Sources........................................................................................ 1. 62
1.5.3
Supermesh Analysis........................................................................................ 1. 62
1.5.4
Mesh Analysis of Circuits Excited by AC Sources (Mesh Analysis of Reactive Circuits)............................................................. 1. 68
1.5.5
Mesh Analysis of Circuits Excited by Independent and Dependent Sources.................................................................................. 1. 75
1.6
Node Voltage Method of Analysis for DC and AC Circuits....................................... 1. 86 1.6.1
Node Analysis of Resistive Circuits Excited by DC Sources........................ 1. 87
1.6.2
Node Analysis of Circuits Excited by Both Voltage and Current Sources.......................................................................... 1. 105
1.6.3
Supernode Analysis......................................................................................... 1.106
1.6.4
Node Analysis of Circuits Excited by AC Sources (Node Analysis of Reactive Circuits).............................................................. 1. 120
1.6.5
Node Analysis of Circuits Excited by Independent and Dependent Sources.................................................................................. 1. 124
1.7
1.8
Network Terminology................................................................................................... 1. 131 1.7.1
Graph of a Network ......................................................................................... 1. 131
1.7.2
Trees, Link, Twig and Cotree.......................................................................... 1. 132
1.7.3
Network Variables .......................................................................................... 1. 134
1.7.4
Solution of Network Variables........................................................................ 1. 134
1.7.5
Link Currents (Independent Current Variables)............................................ 1. 135
1.7.6
Twig Voltages (Independent Voltage Variables)........................................... 1. 135
Incidence and Reduced Incidence Matrices............................................................... 1. 135 1.8.1
Network Analysis using Incidence Matrix..................................................... 1. 138
ix 1.9
1.10
CutSets........................................................................................................................
1. 143
1.9.1
Fundamental CutSets ...................................................................................
1. 143
1.9.2
CutSet Matrix and CutSet Schedule............................................................ 1. 148
1.9.3
Node Analysis Using CutSets....................................................................... 1. 151
TieSet..........................................................................................................................
1. 164
1.10.1 TieSet Matrix and TieSet Schedule............................................................. 1. 165 1.10.2 Mesh Analysis Using TieSets....................................................................... 1. 168 1.11
Duality..........................................................................................................................
1. 180
1.11.1 Dual Graphs....................................................................................................
1. 181
1.11.2 Duality of Network.......................................................................................... 1. 184 1.12
Summary of Important Concepts................................................................................ 1. 194
1.13
Shortanswer Questions.............................................................................................. 1. 200
1.14
Exercises....................................................................................................................... 1. 213
CHAPTER 2  NETWORK THEOREMS FOR DC AND AC CIRCUITS 2.1
Network Reduction....................................................................................................... 2. 1 2.1.1
Resistances in Series and Parallel.................................................................. 2. 1
2.1.2
Voltage Sources in Series and Parallel .......................................................... 2. 3
2.1.3
Current Sources in Series and Parallel .......................................................... 2. 6
2.1.4
Inductances in Series and Parallel................................................................. 2. 8
2.1.5
Capacitances in Series and Parallel............................................................... 2. 11
2.1.6
Impedances in Series and Parallel ................................................................. 2. 14
2.1.7
Reactances in Series and Parallel .................................................................. 2. 16
2.1.8
Conductances in Series and Parallel ............................................................. 2. 17
2.1.9
Admittances in Series and Parallel ................................................................ 2. 19
2.1.10 Susceptances in Series and Parallel .............................................................. 2. 22 2.1.11 Generalised Concept of Reducing Series/Parallelconnected Parameters... 2. 22 2.2
Voltage and Current Division ...................................................................................... 2. 25 2.2.1
Voltage Division in Seriesconnected Resistances ....................................... 2. 25
2.2.2
Voltage Division in Seriesconnected Impedances ....................................... 2. 26
2.2.3
Current Division in Parallelconnected Resistances ..................................... 2. 26
2.2.4
Current Division in Parallelconnected Impedances..................................... 2. 27
2.3
Source Transformation ................................................................................................ 2. 28
2.4
StarDelta Conversion.................................................................................................. 2. 29
x 2.4.1
Resistances in Star and Delta ........................................................................ 2. 29
2.4.2
Impedances in Star and Delta ........................................................................ 2. 31
2.5
Solved Problems in Network Reduction ....................................................................
2. 32
2.6
Network Theorems....................................................................................................... 2. 49 2.6.1
Thevenin’s and Norton’s Theorems................................................................ 2. 49
2.6.2
Superposition Theorem .................................................................................. 2. 76
2.6.3
Maximum Power Transfer Theorem .............................................................. 2. 99
2.6.4
Reciprocity Theorem ....................................................................................... 2. 126
2.6.5
Reciprocity Theorem Applied to Mesh Basis Circuit.................................... 2. 126
2.6.6
Reciprocity Theorem Applied to Node Basis Circuit .................................... 2. 127
2.6.7
Millman’s Theorem.......................................................................................... 2. 137
2.7
Summary of Important Concepts................................................................................ 2. 141
2.8
Shortanswer Questions .............................................................................................. 2. 144
2.9
Exercises....................................................................................................................... 2. 159
CHAPTER 3  AC CIRCUITS, RESONANCE AND COUPLED CIRCUITS 3.1
AC Circuits.................................................................................................................... 3. 1
3.2
Sinusoidal Voltage........................................................................................................ 3. 1 3.2.1
Average Value................................................................................................... 3. 2
3.2.2
RMS Value........................................................................................................ 3. 2
3.2.3
Form Factor and Peak Factor........................................................................... 3. 3
3.3
Sinusoidal Current........................................................................................................ 3. 3
3.4
Inductance..................................................................................................................... 3. 4
3.5
Capacitance................................................................................................................... 3. 4
3.6
VoltageCurrent Relation of R, L and C in Various Domains..................................... 3. 5 3.6.1
VoltageCurrent Relation of Resistance.......................................................... 3. 5
3.6.2
VoltageCurrent Relation of Inductance......................................................... 3. 6
3.6.3
VoltageCurrent Relation of Capacitance....................................................... 3. 7
3.7
Sinusoidal Voltage and Current in Frequency Domain.............................................. 3. 8
3.8
Power, Energy and Power Factor................................................................................. 3. 8
3.9
Impedance..................................................................................................................... 3. 11
3.10
Solved Problems in AC Circuits.................................................................................. 3. 12
3.11
Resonance .................................................................................................................... 3. 16
3.12
Series Resonance ......................................................................................................... 3. 16 3.12.1 Resonance Frequency of Series RLC Circuit ................................................. 3. 16
xi 3.12.2 Variation of Current and Impedance with Frequency in Series RLC Circuit ........................................................................................... 3. 17 3.12.3 QFactor (Quality Factor) of RLC Series Circuit ........................................... 3. 18 3.12.4 Bandwidth of Series RLC Circuit ................................................................... 3. 21 3.12.5 Selectivity of Series RLC Circuit .................................................................... 3. 25 3.12.6 Variation of Voltage across L and C with Frequency..................................... 3. 26 3.12.7 Solved Problems in Series Resonance ........................................................... 3. 27 3.13
Parallel Resonance ...................................................................................................... 3. 32 3.13.1 Resonant Frequency of Parallel RLC Circuits ............................................... 3. 33 3.13.2 Variation of Current and Impedance with Frequency in Parallel RLC Circuit ......................................................................................... 3. 41 3.13.3 QFactor (Quality Factor) of RLC Parallel Circuit .......................................... 3. 42 3.13.4 Bandwidth of RLC Parallel Circuit ................................................................. 3. 45 3.13.5 Selectivity of Prallel RLC Circuit .................................................................... 3. 51 3.13.6 Variation of Current through L and C with Frequency.................................. 3. 52 3.13.7 Solved Problems in Parallel Resonance.......................................................... 3. 53
3.14
Coupled Circuits ........................................................................................................... 3. 61
3.15
SelfInductance and Mutual Inductance ..................................................................... 3. 62 3.15.1 SelfInductance ................................................................................................ 3. 62 3.15.2 Mutual Inductance ........................................................................................... 3. 62 3.15.3 Coefficient of Coupling .................................................................................... 3. 64
3.16
Analysis of Coupled Coils ............................................................................................ 3. 65 3.16.1 Dot Rule ........................................................................................................... 3. 66 3.16.2 Expression for Selfand Mutual Induced EMFs in Various Domains .......... 3. 69 3.16.3 Writing Mesh Equations for Coupled Coils .................................................... 3. 70 3.16.4 Electrical Equivalent of Magnetic Coupling (Electrical Equivalent of a Transformer or Linear Transformer) ................... 3. 71 3.16.5 Writing Mesh Equations in Circuits with Electrical Connection and Magnetic Coupling ................................................................................... 3. 74 3.16.6 Analysis of Multiwinding Coupled Coils (Coupled Inductors) .................
3.17
3. 75
Series and Parallel Connections of Coupled Coils (Coupled Inductors) .................. 3. 76 3.17.1 Series Aiding Connection of Coupled Coils ................................................... 3. 76
xii 3.17.2 Series Opposing Connection of Coupled Coils .............................................. 3. 77 3.17.3 Parallel Aiding Connection of Coupled Coils ................................................. 3. 78 3.17.4 Parallel Opposing Connection of Coupled Coils ............................................ 3. 80 3.18
Tuned Coupled Circuits ................................................................................................ 3. 82 3.18.1 Single Tuned Coupled Circuits....................................................................... 3. 82 3.18.2 Double Tuned Coupled Circuits ...................................................................... 3. 87
3.19
Solved Problems in Coupled Circuits .......................................................................... 3. 90
3.20
Summary of Important Concepts. ................................................................................ 3. 116
3.21
Shortanswer Questions ............................................................................................... 3. 123
3.22
Exercises ........................................................................................................................ 3. 134
CHAPTER 4  TRANSIENT ANALYSIS 4.1
4.2
4.3
Transient Response....................................................................................................... 4. 1 4.1.1
Natural and Forced Response .......................................................................... 4. 1
4.1.2
First and Second Order Circuits ...................................................................... 4. 2
Transient Analysis Using Laplace Transform............................................................. 4. 3 4.2.1
Some Standard Voltage Functions................................................................... 4. 3
4.2.2
sDomain Representation of R, L, C Parameters............................................. 4. 5
4.2.3
Solving Initial and Final Conditions Using Laplace Transform.................... 4. 9
Transient Response of RL Circuit................................................................................ 4. 10 4.3.1
Natural or SourceFree Response of RL Circuit.............................................. 4. 10
4.3.2
Step Response of RL Circuit (Response of RL Circuit Excited by DC Supply)............................................. 4. 11
4.4
4.3.3
Impulse Response of RL Circuit....................................................................... 4. 16
4.3.4
Response of RL Circuit Excited by Exponential Signal................................. 4. 18
4.3.5
RL Transient With Initial Current I0 ................................................................ 4. 19
Transient Response of RC Circuit ............................................................................... 4. 22 4.4.1
Natural or SourceFree Response of RC Circuit.............................................. 4. 22
4.4.2
Step Response of RC Circuit (Response of RC Circuit Excited by DC Supply)............................................. 4. 24
4.4.3
Impulse Response of RC Circuit....................................................................... 4. 28
4.4.4
Response of RC Circuit Excited by Exponential Signal ................................. 4. 30
4.4.5
RC Transient With Initial Voltage V0 .............................................................. 4. 31
xiii 4.5
Transient Response of RLC Circuit............................................................................. 4. 35 4.5.1
Natural or SourceFree Response of RLC Circuit............................................ 4. 35
4.5.2
Step Response of RLC Circuit (Response of RLC Circuit Excited by DC Supply)........................................... 4. 35
4.6
4.5.3
sDomain Current and Voltage Equation of RLC Circuit................................ 4. 42
4.5.4
Initial Conditions in RLC Circuit ..................................................................... 4. 43
4.5.5
Final Conditions in RLC Circuit....................................................................... 4. 45
Complete Response of Circuits Excited by Sinusoidal Source................................... 4. 47 4.6.1
RL Circuit Excited by Sinusoidal Source......................................................... 4. 47
4.6.2
RC Circuit Excited by Sinusoidal Source......................................................... 4. 49
4.6.3
RLC Circuit Excited by Sinusoidal Source....................................................... 4. 51
4.7
Solved Problems in RL Transient ................................................................................. 4. 53
4.8
Solved Problems in RC Transient................................................................................. 4. 69
4.9
Solved Problems in RLC Transient .............................................................................. 4. 90
4.10
Summary of Important Concepts.................................................................................. 4. 100
4.11
Shortanswer Questions................................................................................................ 4. 103
4.12
Exercises ........................................................................................................................ 4. 106
CHAPTER 5  TWOPORT NETWORKS 5.1
TwoPort Networks........................................................................................................ 5. 1
5.2
Parameters of a TwoPort Network............................................................................... 5. 2
5.3
Impedance Parameters (or ZParameters)..................................................................... 5. 6
5.4
Admittance Parameters (or YParameters).................................................................... 5. 7
5.5
Transmission Parameters (or ABCDParameters)........................................................ 5. 8
5.6
Inverse Transmission Parameters (or A’B’C’D’Parameters)........................................ 5. 9
5.7
Hybrid Parameters (or hParameters)............................................................................ 5. 10
5.8
Inverse Hybird Parameters (or gParameters) .............................................................. 5. 12
5.9
Relationship Between Parameter Sets.......................................................................... 5. 13
5.10
Properties of TwoPort Networks.................................................................................. 5. 19
5.11
InterConnection of TwoPort Networks....................................................................... 5. 19
5.12
T and P Networks.......................................................................................................... 5. 21 5.12.1 Symmetrical Properties of T and P Networks................................................. 5. 22
5.13
Solved Problems ............................................................................................................ 5. 24
xiv 5.14
Summary of Important Concepts.................................................................................. 5. 59
5.15
Shortanswer Questions................................................................................................ 5. 61
5.16
Exercises......................................................................................................................... 5. 65
APPENDIX 1
 USING CALCULATOR IN COMPLEX MODE .................................. A. 1
APPENDIX 2
 IMPORTANT MATHEMATICAL FORMULAE ................................. A. 3
APPENDIX 3
 LAPLACE TRANSFORM ............................................................ A. 5
APPENDIX 4
 CRAMER’S RULE ..................................................................... A. 8
APPENDIX 5
 EQUIVALENT OF SERIES/PARALLEL CONNECTED PARAMETERS ......................................................................... A. 10
APPENDIX 6
 STARDELTA TRANSFORMATION .............................................. A. 12
APPENDIX 7
 SUMMARY OF THEOREMS ........................................................ A. 13
APPENDIX 8
 IMPORTANT EQUATIONS OF SERIES RESONANCE....................... A. 14
APPENDIX 9
 PARALLEL RESONANT CIRCUITS ............................................... A. 15
APPENDIX 10  ELECTRICAL EQUIVALENT OF COUPLED COILS ........................... A. 16 APPENDIX 11  EQUIVALENT OF SERIES AND PARALLEL CONNECTED COUPLED COILS....................................................................... A. 17 APPENDIX 12  INITIAL AND FINAL CONDITIONS IN RLC CIRCUITS EXCITED BY DC SUPPLY......................................................................... A. 18 APPENDIX 13  R,L,C PARAMETERS AND VI RELATIONS IN VARIOUS DOMAINS ................................................................. A. 19 APPENDIX 14  SUMMARY OF PARAMETERS OF TWOPORT NETWORK .............. A. 20 APPENDIX 15  RELATIONSHIP BETWEEN PARAMETER SETS .............................. A. 21 APPENDIX 16  TWOPORT NETWORK PARAMETERS OF T AND PNETWORK....... A. 22 ANNA UNIVERSITY QUESTION PAPERS...............................................................
Q. 1
INDEX..............................................................................................................
I. 1
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Preface The main objective of this book is to explore the basic concepts of Circuit Analysis in a simple and easytounderstand manner. This text on Circuit Analysis has been crafted and designed to meet students’ requirements. Considering the highly mathematical nature of this subject, more emphasis has been given on the problemsolving methodology. Considerable effort has been made to elucidate mathematical derivations in a stepbystep manner. Exercise problems with varied difficulty levels are given in the text to help students get an intuitive grasp on the subject. This book, with its lucid writing style and germane pedagogical features, will prove to be a master text for engineering students and practitioners. Salient Features The salient features of this book are:  Proof of important concepts and theorems are clearly highlighted by shaded boxes  Wherever required, problems are solved using multiple methods  Additional explanations for solutions and proofs are provided in separate boxes  Different types of fonts are used for text, proof and solved problems for better clarity  Keywords are highlighted by bold and italic fonts  Easy, concise and accurate study material  Extremely precise edition where concepts are reinforced by pedagogy  Demonstration of multiple techniques in problem solvingadditional explanations and proofs highlighted  Ample figures and examples to enhance students’ understanding  Practice through MCQ’s  Pedagogy: Solved Numerical Examples: 232 Shortanswer Questions: 228 Figures: 1517 Practice Problems: 143 Review Questions (T/F): 117 MCQs: 139 Fill in the blanks: 118
. . . . . . .
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Organization of the Book This text is designed for an undergraduate course in Circuit Analysis for engineering students. The book is organized into five chapters. The fundamental concepts, steady state analysis and transient state analysis are presented in a very easy and elaborative manner. Throughout the book, carefully chosen examples are presented so that the reader will have a clear understanding of the concepts discussed. Chapter 1 starts with explanation of fundamental quantities involved in circuit analysis, standard symbols and units used in circuit analysis. The basic concepts of circuits are also presented in this chapter. The mesh and node analyses of circuits are discussed with special attention on dependent sources. The second half of Chapter 1 is devoted to basic concepts of network topology with detailed explanation about formation of tiesets and cutsets, and development of mesh and node analyses from tiesets and cutsets. The concepts of dual graph and dual circuits are presented at the end of the chapter. The concepts of series, parallel and stardelta network reduction are discussed in Chapter 2. The analysis of circuits using theorems is also presented in this Chapter. Chapter 3 starts with fundamental concepts of AC circuits which is a prerequisite for understanding resonance and coupled circuits. The concepts of resonance are discussed in detail in this chapter. The analysis of coupled circuits is also discussed. The transient analysis of circuits is explained in Chapter 4 through Laplace transform. Transient analysis of circuits excited by impulse, step and exponential signals is also presented in the chapter. The concept of twoport network parameters and its properties are presented in Chapter 5. The relationship between various twoport parameters and symmetrical properties of T and P network is also presented in this chapter. The Laplace transform has been widely used in the analysis of electric circuits. Hence an appendix on Laplace transform is included in this book. All the calculations in this book are performed using calculator in complex mode. An appendix is also included to help the readers to practice calculations in complex mode of calculator. Online Learning Center The OLC of the book can be accessed at http://www.mhhe.com/nagoorkani/ca/au The author hopes that the teaching and student community will welcome the book. The readers can feel free to convey their criticism and suggestions to [email protected] for further improvement of the book.
A. Nagoor Kani Publisher’s Note McGraw Hill Education (India) invites suggestions and comments from you, all of which can be sent to [email protected] (kindly mention the title and author name in the subject line). Piracyrelated issues may also be reported.
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acknowledgement I express my heartfelt thanks to my wife, Mrs. C. Gnanaparanjothi Nagoor Kani, and my sons, N. Bharath Raj alias Chandrakani Allaudeen and N. Vikram Raj, for the support, encouragement and cooperation they have extended to me throughout my career. I thank Ms. T. A. Benazir for the affection and care extended during my daytoday activities. I am grateful to Ms. C. Mohana Priya for her passion in book work and typesetting of the manuscript and preparing the layout of the book. It is my pleasure to acknowledge the contributions of our technical editors, Ms. E. R. Suhasini and Ms. R. Jenniefer Sherine, for editing and proofreading of the book. I thank all my office staff for their cooperation in carrying out my daytoday activities. My sincere thanks to all the reviewers for their valuable suggestions and comments which helped me to explore the subject to a greater depth. I am also grateful to Ms. Vibha Mahajan, Mr. Hemant K Jha, Ms. Vaishali Thapliyal, Mr. Ganesh, Mr. Asarab, Mr. Satinder Singh and Ms. Taranpreet Kaur, of McGraw Hill Education (India) for their concern and care in publishing this work. Finally, a special note of appreciation is due to my sisters, brothers, relatives, friends, students and the entire teaching community for their overwhelming support and encouragement to my writing.
A. Nagoor Kani
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List of Symbols and Abbreviations P

Active power
Y

Admittance
AC, ac

Alternating current
A

Ampere
ω

Angular frequency
ωr

Angular resonance frequency
S

Apparent Power
I ave

Average value of current
Vave

Average value of voltage
β

Bandwidth
B

Branch
C

Capacitance
XC

Capacitive reactance
BC

Capacitive susceptance
Q

Charge
k

Coefficient of coupling
j

Complex operator (j =  1)
S

Complex Power
G

Conductance
C

Coulomb
kC

Critical coefficient of coupling
RC

Critical resistance
I

Current
i(0+)

Current at t = 0+
i(0−)

Current at t = 0–
i(∞)

Current at t = ∞
CC

Current Coil
I (jω), I

Current in frequency domain
I(s)

Current in Laplace domain
i(t)

Current in time domain
xx ζ

Damping ratio
E

DC source voltage
D

Determinant of matrix
DC, dc

Direct current
Y

Driving point admittance
Z

Driving point impedance
hB

Efficiency of battery
W

Energy
Req

Equivalent resistance
F

Farad
φ

Flux
Ψ

Flux linkage
kf

Form factor
p

Half period
H

Henry
Hz

Hertz
ωh

Higher cutoff angular frequency
fh

Higher cutoff frequency
j

Imaginary part
Z

Impedance
θ

Impedance angle
L

Inductance
XL

Inductive reactance
BL

Inductive susceptance
e, e(t)

Instantaneous value of ac source voltage
q

Instantaneous value of charge
i, i(t)

Instantaneous value of current in time domain
iC

Instantaneous value of current through capacitor
iL

Instantaneous value of current through inductor
iR

Instantaneous value of current through resistor
w

Instantaneous value of energy
p

Instantaneous value of power
xxi vC

Instantaneous value of voltage across capacitor
vL

Instantaneous value of voltage across inductor
vR

Instantaneous value of voltage across resistor
v, v(t)

Instantaneous value of voltage in time domain
J

Joule
K

Kelvin
kWh

kilowatthour
KCL

Kirchhoff’s Current Law
KVL

Kirchhoff’s Voltage Law
L

Laplace operator
L

Links
IL

Load Current
VL

Load Voltage
RL

Load Resistance
ωl

Lower cutoff angular frequency
fl

Lower cutoff frequency
Z

Magnitude of impedance
Y

Magnitude of admittance
Im

Maximum value of current
Vm

Maximum value of voltage
m

Mesh

Mho
M

Mutual inductance
ωn

Natural frequency
IN

Neutral current
N

Neutral point
N

Nodes
Ω

Ohm
Ωm

Ohmmetre
OC

Open circuit
kp

Peak factor
φ

Phase difference between voltage and current
xxii pf

Power factor
φ

Power factor angle
P

Power or Active power
PC

Pressure Coil
Q

Quality factor
Qr

Quality factor at resonance
rad/s

Radians/second
X

Reactance
Q

Reactive Power
R

Resistance
ρ

Resistivity
fr

Resonance frequency
s

Second
SC

Short circuit
S

Siemen
SPDT

Single Pole Double Throw
RS

Source Resistance
B

Susceptance
T

Tesla
t

Time
τ

Time constant
V

Volt
VAR

VoltAmpereReactive
V

Voltage
v(0 +)

Voltage at t = 0+
v(0−)

Voltage at t = 0−
v(∞)

Voltage at t = ∞
V ( jx ) , V

Voltage in frequency domain
V(s)

Voltage in Laplace domain
W

Watt
Wh

Watthour
Ws

Wattsecond
Wb

Weber/Weberturn
Chapter 1
BASIC CIRCUIT ANALYSIS AND NETWORK TOPOLGY 1.1
Introduction to Circuits and Networks
1.1.1 Basic Phenomena The energy associated with flow of electrons is called electrical energy. The flow of electrons is called current. The current can flow from one point to another point of an element only if there is a potential difference between these two points. The potential difference is called voltage. When electric current is passed through a device or element, three phenomena have been observed. The three phenomena are, (i) opposition to flow of current, (ii) opposition to change in current or flux, and (iii) opposition to change in voltage or charge. The various effects of current like heating, arcing, induction, charging, etc., are due to the above phenomena. Therefore, three fundamental elements have been proposed which exhibit only one of the above phenomena when considered as an ideal element (of course, there is no ideal element in nature). These elements are resistor, inductor and capacitor.
1.1.2 Ideal Elements The ideal resistor offers opposition only to the flow of current. The property of opposition to the flow of current is called resistance and it is denoted by R. The ideal inductor offers opposition only to change in current (or flux). The property of opposition to change in current is called inductance and it is denoted by L. The ideal capacitor offers opposition only to change in voltage (or charge). The property of opposition to change in voltage is called capacitance and it is denoted by C.
1.1.3 Electric Circuits The behaviour of a device to electric current can be best understood if it is modelled using the fundamental elements R, L and C. For example, an incandescent lamp and a water heater can be modelled as ideal resistance. Transformers and motors can be modelled using resistance and inductance. Practically, an electric circuit is a model of a device operated by electrical energy. The various concepts and methods used for analysing a circuit is called circuit theory. A typical circuit consists of sources of electrical energy and ideal elements R, L and C. The practical energy sources are batteries, generators (or alternators), rectifiers, transistors, opamps, etc. The various elements of electric circuits are shown in Figs 1.1 and 1.2.
Circuit Analysis
1. 2 Elements of Electric Circuits
Parameters or Loads
Energy Sources DC (Direct Current) Sources DC Voltage Sources
E Independent DC Voltage Source,
+
Dependent DC Voltage Source Voltage Controlled DC Voltage Source,
mVx + 
RM Ix = Vx Current Controlled DC Voltage Source,
+ 
DC Current Sources I Independent DC Current Source, Dependent DC Current Source GM Vx = Ix Voltage Controlled DC Current Source, AI Ix Current Controlled DC Current Source, AC (Alternating Current) Sources AC Voltage Sources Independent AC Voltage Source,
o E+= EÐq  V
~
Dependent AC Voltage Source
mVx
Voltage Controlled AC Voltage Source, Current Controlled AC Voltage Source,
+ 
RM Ix = Vx + 
AC Current Sources I = IÐq o A
Independent AC Current Source,
~
Dependent AC Current Source GM Vx = Ix
Voltage Controlled AC Current Source, Current Controlled AC Current Source,
AI I x
Fig. 1.1 : Elements of electric circuits  Energy source.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 3
Elements of Electric Circuits
Energy Sources
Parameters or Loads Fundamental Parameters R
Resistance, Inductance
SelfInductance,
L
Mutual Inductance, M C Capacitance, Derived Parameters ± jX
Reactance,
Inductive Reactance,
+jXL = +j2pfL
Capacitive Reactance,
 jX C =  j
1 2pfC
Z = R ± jX
Impedance, Inverse Parameters G=
Conductance, m jB =
Susceptance,
1 R 1 ± jX
Inductive Susceptance,
 jB L =  j
1 2pfL
+jBC = +j2pfC
Capacitive Susceptance, Y = G m jB
Admittance, Y=
1 1 = = G m jB Z R ± jX
Fig. 1.2 : Elements of electric circuits  Parameters or loads.
Circuit Analysis
1. 4
Elements which generate or amplify energy are called active elements. Therefore, energy sources are active elements. Elements which dissipate or store energy are called passive elements. Resistance dissipates energy in the form of heat, inductance stores energy in a magnetic field, and capacitance stores energy in an electric field. Therefore, resistance, inductance and capacitance are passive elements. If there is no active element in a circuit then the circuit is called a passive circuit or network. Sources can be classified into independent and dependent sources. Batteries, generators and rectifiers are independent sources, which can directly generate electrical energy. Transistors and opamps are dependent sources whose output energy depends on another independent source. Practically, the sources of electrical energy used to supply electrical energy to various devices like lamps, fans, motors, etc., are called loads. The rate at which electrical energy is supplied is called power. Power, in turn, is the product of voltage and current. Circuit analysis relies on the concept of law of conservation of energy, which states that energy can neither be created nor destroyed but can be converted from one form to other. Therefore, the total energy/power in a circuit is zero.
1.1.4 Units SI units are followed in this book. The SI units and their symbols for various quantities encountered in circuit theory are presented in Table 1.1. In engineering applications, large values are expressed with decimal multiples and small values are expressed with submultiples. The commonly used multiples and submultiples are listed in Table 1.2. Table 1.1 : Units and Symbols Quantity
Symbol for quantity
Unit
Unit symbol
Equivalent unit
Equivalent unit symbol
Charge
q, Q
Coulomb
C
Current
i, I
Ampere
A
Flux linkages
ψ
Weberturn
Wb


Magnetic flux
φ
Weber
Wb


Energy
w, W
Joule
J
Newtonmeter
Nm
Voltage
v, V
Volt
V
Joule/Coulomb
J/C
Power
p, P
Watt
W
Joule/second
J/s
Capacitance
C
Farad
F
Coulomb/Volt
C/V
Inductance
L, M
Henry
H
Weber/Ampere
Wb/A
Resistance
R
Ohm
Ω
Volt/Ampere
V/A
Conductance
G
Siemens
S
Ampere/Volt or mho
A/V or M
Coulomb/second
C/s
Chapter 1  Basic Circuit Analysis and Network Topology
1. 5
Table 1.1: Continued... Quantity
Symbol for quantity
Unit
Unit symbol
Time
t
Second
s
Frequency
f
Hertz
Hz
Angular frequency
ω
Radians/second
rad/s
Magnetic flux density

Tesla
T
Temperature

Kelvin
o
Equivalent unit
Equivalent unit symbol


cycles/second



Weber/ meter square
Wb/m2


K
Table 1.2 : Multiple and Submultiple used for Units Multiplying factor
1012 10
9
10
6
103 10
2
101
Prefix
tera giga
Symbol
Multiplying factor
T
10 −1
G
−2
Prefix
Symbol
deci
d
centi
c
milli
m
micro
µ
nano
n
pico
p
10
femto
f
10 −18
atto
a
10
−3
mega
M
10
kilo
k
10 − 6
hecto
h
10
−9
deca
da
10 −12 −15
1.1.5 Definitions of Various Terms The definitions of various terms that are associated with electrical energy like energy, power, current, voltage, etc., are presented in this section. Energy :
Energy is defined as the capacity to do work. It can also be defined as stored work. Energy may exist in many forms, such as electrical, mechanical, thermal, light, chemical, etc. It is measured in joules, which is denoted by J (or the unit of energy is joules). In electrical engineering, one joule is defined as the energy required to transfer a power of one watt in one second to a load (or Energy = Power ´ Time). Therefore, 1 J = 1 Ws. In mechanical engineering, one joule is the energy required to move a mass of 1 kg through a distance of 1 m with a uniform acceleration of 1 m/s2.
Circuit Analysis
1. 6
Therefore, 1 J = 1 N  m = 1 kg  m2  m s In thermal engineering, one joule is equal to a heat of 4.1855 (or 4.186) calories, and one calorie is the heat energy required to raise the temperature of 1 gram of water by 1o C. Therefore, 1 J = 4.1855 calories Power :
Power is the rate at which work is done (or it is the rate of energy transfer). The unit of power is watt and denoted by W. If energy is transferred at the rate of one joule per second then one watt of power is generated. An average value of power can be expressed as, Energy = W Time t A time varying power can be expressed as,
Power, P =
Instantaneous power, p = dw dt dq w w d d Also, p = = = vi # dt dq dt Hence, power is also given by the product of voltage and current.
.....(1.1)
.....(1.2) .....(1.3)
Charge :
Charge is the characteristic property of elementary particles of matter. The elementary particles are electrons, protons and neutrons. There are basically two types of charges in nature: positive charge and negative charge. The charge of an electron is called negative charge. The charge of a proton is called positive charge. Normally, a particle is neutral because it has equal number of electrons and protons. The particle is called charged if some electrons are either added or removed from it. If electrons are added then the particle is called negatively charged. If electrons are removed then the particle is called positively charged.The unit used for measurement of charge is coulomb. One coulomb is defined as the charge which when placed in vacuum from an equal and similar charge at a distance of one metre repels it with a force of 9 × 10 9 N. The charge of an electron is 1.602 × 10 −19 C. Hence, 1/(1.602 × 10 −19) = 6.24 × 10 18 electrons make up a charge of one coulomb.
Current :
Current is defined as the rate of flow of electrons. It is measured in amperes. One ampere is the current flowing through a point if a charge of one coulomb crosses that point in one second. In SI units, one ampere is defined as that constant current in two infinite parallel conductors of negligible circular crosssection, one metre apart in vacuum, which produces a force between the conductors of 2 × 10 − 7 newton per metre length. A steady current can be expressed as, Charge Q Current, I = = Time t
.....(1.4)
A time varying current can be expressed as, Instantaneous current, i =
dq dt
.....(1.5)
Chapter 1  Basic Circuit Analysis and Network Topology
Voltage :
1. 7
where, Q = Charge flowing at a constant rate t = Time dq = Change in charge in a time of dt dt = Time required to produce a change in charge dq Every charge will have potential energy. The difference in potential energy between the charges is called potential difference. In electrical terminology, the potential difference is called voltage. Potential difference indicates the amount of work done to move a charge from one place to another. Voltage is expressed in volt. One volt is the potential difference between two points, when one joule of energy is utilised in transfering one coulomb of charge from one point to the other. A steady voltage can be expressed as, Energy = W Charge Q A time varying voltage can be expressed as,
Voltage, V =
.....(1.6)
Instantaneous voltage, v = dw dq
.....(1.7)
Also, 1 V = 1 J = 1 J/s = 1 W 1C 1 C/s 1A ` Voltage, V = Power = P I Current
.....(1.8) .....(1.9)
One volt is also defined as the difference in electric potential between two points along a conductor carrying a constant current of one ampere when the power dissipated between the two points is one watt.
1.1.6 Symbols used for Average, RMS and Maximum Values The quantities like voltage, current, power and energy may be constant or varying with respect to time. For a time varying quantity we can define the value of the quantity as instantaneous, average, rms and maximum value. The symbols used for these values are listed in Table 1.3. Table 1.3 : Symbols of DC and AC Variables AC or Time varying Quantity
DC
Instantaneous value
Average value
Maximum value
RMS value
Phasors or Vectors
Current
I
i
Iave
Im or Ip
I
I
Voltage
V
v
Vave
Vm or Vp
V
V
Power
P
p
P
Pm

S
Energy
W
w
W
Wm


1. 8
Circuit Analysis
1.1.7 Steady State Analysis and Transient Analysis Circuit analysis can be classified into steady state analysis and transient analysis. The analysis of circuits during switching conditions is called transient analysis. During switching conditions, the current and voltage change from one value to the other. In purely resistive circuits this may not be a problem because the resistance will allow sudden change in voltage and current. In inductive circuits, the current cannot change instantaneously. In capacitive circuits, the voltage cannot change instantaneously. Hence, when the circuit is switched from one state to the other, the voltage and current cannot attain a steady value instantaneously in inductive or capacitive circuits. Therefore, during switching conditions there will be a small period during which the current and voltage will change from an initial value to a final steady value. The time from the instant of switching to the attainment of steady value is called transient period. Physically, the transient can be realised in switching of tubelights, fans, motors, etc. In certain circuits, the transient period is negligible and we may be interested only in steady value of the response. Therefore, steady state analysis is sufficient. The analysis of circuits under steady state (i.e., by neglecting the transient period) is called steady state analysis. Steady state analysis of circuits is discussed in this book in all chapters except Chapter 4. In certain circuits the transient period is critical and we may require the response of the circuit during the transient period. Some practical examples where transient analysis is vital are starters, circuit breakers, relays, etc. Transient analysis of circuits is discussed in Chapter 4.
1.1.8 Assumptions in Circuit Theory In circuit analysis the elements of the circuit are assumed to be linear, bilateral and lumped elements. In linear elements, the voltagecurrent characteristics are linear and the circuit consisting of linear elements is called linear circuit or network. The resistor, inductor and capacitor are linear elements. Some elements exhibit nonlinear characteristics. For example, diodes and transistors have nonlinear voltagecurrent characteristics, capacitance of a varactor diode is nonlinear and inductance of an inductor with hysteresis is nonlinear. For analysis purpose, the nonlinear characteristics can be linearised over a certain range of operation. In a bilateral element, the relationship between voltage and current will be the same for two possible directions of current through the element. On the other hand, a unilateral element will have different voltagecurrent characteristics for the two possible directions of current through the element. The diode is an example of a unilateral element. In practical devices like transmission lines, windings of motors, coils, etc., the parameters (R, L and C) are distributed in nature. But for analysis purpose we assume that the parameters are lumped (i.e., concentrated at one place). This approximation is valid only for low frequency operations and it is not valid in the microwave frequency range. All analysis in this book is based on the assumption that the elements are linear, bilateral and lumped elements.
Chapter 1  Basic Circuit Analysis and Network Topology
1.2
1. 9
Basic Concepts of Circuits and Networks
1.2.1 Basic Elements of Circuits Circuits and Networks
An electric circuit consists of Resistors (R), Inductors (L), Capacitors (C), voltage sources and/or current sources connected in a particular combination. When the sources are removed from a circuit, it is called a network. R1
R1
+ E
~
L
R2
C
L
R2
C
E
Fig. a : Circuit.
Fig. b : Network.
Fig. 1.3 : Example of circuit and network.
DC Circuits
The networks excited by dc sources are called dc circuits. In a dc source, the voltage and current do not change with time. Hence, the property of capacitance and inductance will not arise in steady state analysis of dc circuits.This chapter deals with steady state analysis of dc circuits. Therefore, only resistive circuits are discussed in this chapter. Active and Passive Elements
The elements of a circuit can be classified into active elements and passive elements. The elements which can deliver energy are called active elements. The elements which consume energy either by absorbing or storing are called passive elements. The active elements are voltage and current sources. The sources can be of different nature. The sources in which the current/voltage does not change with time are called direct current sources or in short dc sources. (But in dc sources, the current/voltage changes with load). The sources in which the current/voltage sinusoidally varies with time are called sinusoidal sources or alternating current sources or in short ac sources. The passive elements of a circuit are resistors, inductors and capacitors, which exhibit the property of resistance, inductance and capacitance, respectively under ideal conditions. Resistance, inductance and capacitance are called fundamental parameters of a circuit. Practically, these parameters will be distributed in nature. For example, the resistance of a transmission line will exist throughout its length. But for circuit analysis, the parameters are considered as lumped. The resistor absorbs energy (and the absorbed energy is converted into heat). The inductor and the capacitor store energy. When the power supply in the circuit is switched ON, the inductor and the capacitor store energy, and when the supply is switched OFF, the stored energy leaks away in the leakage path. (Hence, inductors and capacitors cannot be used as storage devices).
Circuit Analysis
1. 10
+
+ +
Is
E
E 
E = EÐq
Fig. a : dc voltage source.
Vs
Is = Is Ðq
~


+ 
Fig. b : dc current source.
Fig. c : ac voltage source.
Is
Vs = RI or A vV
R
~
Fig. d : ac current source.
L
C
Is = GV or A II
Fig. e : Dependent voltage source.
Fig. f : Dependent current source.
Fig. g : Resistance.
Fig. h : Inductance.
Fig. i : Capacitance.
Fig. 1.4 : Symbols of active and passive elements of circuits.
Independent and Dependent Sources
Sources can be classified into independent and dependent sources. The electrical energy supplied by an independent source does not depend on another electrical source. Independent sources convert energy in some form into electrical energy. For example, a generator converts mechanical energy into electrical energy, a battery converts chemical energy into electrical energy, a solar cell converts light energy into electrical energy, a thermocouple converts heat energy into electrical energy, etc. The electrical energy supplied by a dependent source depends on another source of electrical energy. For example, the output signal (energy) of a transistor or opamp depends on the input signal (energy), where the input signal is another source of electrical energy. In the circuit sense, the voltage/current of an independent source does not depend on voltage/ current in any part of the circuit. But the voltage/current of a dependent source depends on the voltage/current in some part of the same circuit.
1.2.2 Nodes, Branches and Closed Path A typical circuit consists of lumped parameters, such as resistance, inductance, capacitance and sources of electrical energy like voltage and current sources connected through resistanceless wires. In a circuit, the meeting point of two or more elements is called a node. If more than two elements meet at a node then it is called the principal node. The path between any two nodes is called a branch. A branch may have one or more elements connected in series. A closed path is a path which starts at a node and travels through some part of the circuit and arrives at the same node without crossing a node more than once. The nodes, branches and closed paths of a typical circuit are shown in Fig. 1.5. The nodes of the circuit are the meeting points of the elements denoted as A, B, C, D, E and F. The nodes A, B, C and D are principal nodes because these nodes are meeting points of more than two elements.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 11 +
E2
R3 E F
+
E2
A
R3
C
E R2
R2
A
F
B
R4
B
R4
B
C
B
A
A
C
C R1
R1 R6
R5
E
R6
R5
E + E1 E
+ E1 E D
+
D
D
Fig. a : Typical circuit.
D
Fig. b : Branches of the circuit in Fig. a.
E2
R3 E R2
R4
B
R1 R5
R4
R2 A
C
E
+ E1 E
R5
R1
R6
R6
+ E1 E D +
E2
R3 E F
Fig. c : Nodes of the circuit in Fig. a. +
E2
R3
+
E
E2
R3 E
F R2
F R4
B
B
A
A
C
+
C
E2
R3 E F
R1 R6
R5
R2 R5
E
+
D
R4 C
+ E1 E D
B
A
E2
R3 E F
R2
B
R4
B
A
C
A
R1
C R1
R5
R5
E + E1 E
R6
R6
E + E1 E
D
D
D
Fig. d : Closed paths of the circuit in Fig. a. Fig. 1.5 : A typical circuit and its branches, nodes and closed paths.
Circuit Analysis
1. 12
1.2.3
Series, Parallel, Star and Delta Connections
The various types of connections that we may encounter in electric circuits are series, parallel, star and delta connections. Series Connection
If two or more elements are connected such that the current through them is the same then the connection is called a series connection. In a circuit if the current in a path is the same then the elements in that path are said to be in series. R1
I
R3
R2
I
Fig. a : Resistances in series. V1 E
V3
V2
+
E
+
L3
L2
I
Fig. b : Inductances in series. L
R
I
I
L1
C3
Fig. c : Capacitances in series. C
R
I
C2
C1
I
C
L
R
+
E
Fig. d : Voltage sources in series.
Fig. e : Resistance and inductance in series.
Fig. f : Resistance and capacitance in series.
Fig. 1.6 : Examples of series connected elements. Ic
Ic
R2
B Id
R4
A C
A Ie
Ia
~
C If
Ia
R1
R6
R5
+
C
A
If
R1
L
R3
L
R3 Ib
Fig. g : Resistance, inductance and capacitance in series.
R6
+
E
~
E
E
E R7
D
C
D
D
R7
C
Fig. b : Series paths in the circuit of Fig. a.
Fig. a : Typical circuit.
Fig. 1.7 : A typical circuit and its series paths.
Parallel Connection
If two or more elements are connected such that the voltage across them is the same then the connection is called a parallel connection. In a circuit if the voltage across two or more paths is the same then, they are said to be in parallel. + V
+ R1
R2
R3
E
Fig. a : Resistances in parallel.
V
+
+ L1
L2
L3
E
Fig. b : Inductances in parallel.
V
C1
C2
C3
E
Fig. c : Capacitances in parallel.
V
R
L
E
Fig. d : R and L in parallel.
Chapter 1  Basic Circuit Analysis and Network Topology +
1. 13
+ C
R
V
R
V
C
L
I1
I2
I3
E
E
Fig. f : R, L and C in parallel. Fig. g : Current sources in parallel. Fig. e : R and C in parallel. Fig. 1.8 : Examples of parallel connected elements. + E
R1
+
R2 E
~ E
L
E
~ E
C
+
R2 R1
R1 R2
~ E
C
Fig. a : The voltage source, series Fig. b : The voltage source, Resistance combination of R1 and L and series R1 and series combination of R2 combination of R2 and C are in parallel. and C are in parallel.
L
Fig. c : The voltage source, series combination of R1 and L and resistance R2 are in parallel.
Fig. 1.9 : Simple circuits with parallel branches. R6
G
L
R2
B
R3
A
C
R6
G
R3
B B +
L
C
R1
E
R5
R4
F +
R4 VAC
~
C
E
D
A A
_
+
E
C C B
R2
R5
V BD
_
C
D
R3
E
D
Fig. a : A typical circuit. Fig. b : The path AGC is parallel Fig. c : The path BCD is parallel to the path ABC. to the path BED. R2
A
A
A
+
+
R1
R1 F
R4
V AE
+ E
R2
A
B
~
B
E
_ E
+
VBC
~
C
R5 C
E
E
C _
R4
R4
F
E
B
VAB
+
R3
B
_ B
D E
E
Fig. d : The path ABE is Fig. e : The path AFEB is parallel Fig. f : The path BEDC is parallel to the resistance R3 . to the resistance R2 . parallel to the path AFE. Fig. 1.10 : A typical circuit and its parallel paths. A
R1
R3
B
R5
C
R5
CC
D
D
+ + R2
E
R6
R4
VCE
R4
R6
E _ E
E
Fig. a : A typical circuit.
E
EE
E
Fig. b : R4 in parallel with series combination of R5 and R6.
Circuit Analysis
1. 14 R3
B B
C
R1
A
+ +
VBE
R2
B B +
R4
VBE
E
R2
E _
_
E E
E
E E
Fig. d : The path EAB is in parallel to resistance R2 .
Fig. c : The path BCE is in parallel to resistance R2 .
Fig. 1.11 : A typical circuit and its parallel paths.
StarDelta Connection
1 R1
N
R2 2
1
R1
If three elements are connected N R3 R2 to meet at a node then the three R3 elements are said to be in a star 2 3 connection. If three elements with 3 3 a node in between any two elements Fig. a : Star connection. Fig. b : Tconnection. are connected to form a closed path 1 1 1 2 then they are said to be in a delta R2 R1 R2 connection. The star connection R1 R3 is also called Tconnection and 3 2 2 R3 delta connection is also called 3 3 3 Pconnection. Fig. d : connection. Fig. c : Delta connection. Fig. 1.12 : Basic star and delta connections. R5
R1
R5
R3
B
R1
A
R3
B
A
C
B A
C
R3 C
+ R4
R2
E
R4
R2
E
D
D
Fig. a : A typical circuit.
D
Fig. b : Star connections in circuit of Fig. a.
R5
R3
B
C
R1 A
B
R3
R2
C
R4
D
Fig. c : Delta connections in circuit of Fig. a. Fig. 1.13 : A typical circuit and its star and delta connections.
Chapter 1  Basic Circuit Analysis and Network Topology
1.2.4
1. 15
Open Circuit and Short Circuit
In a circuit if there is an open path or path of infinite resistance between two nodes then that path is called an open circuit (OC). Since current can flow only in closed paths, the current in the open circuit will be zero. 2
5 A
A
A Circuit N1
1 10 V +E
OC
4
OC
OC 20 V +E
B B
B
3
1
Fig. 1.14 : Examples of open circuit (OC).
While applying KVL to closed paths, the open circuit can be included as an element of infinite resistance in the path because a voltage exists across the two open nodes of a circuit. In a circuit if there is a closed path of zero resistance between two nodes then it is called short circuit (SC). Since the resistance of the short circuit is zero, the voltage across the short circuit is zero. 2
5
A
A
A Circuit N1
I
1 10 V +E
SC
4
SC
SC 20 V +E
B 3
1
B
B
Fig. 1.15 : Examples of short circuit (SC).
In a circuit if there are elements parallel to a short circuit then they will not carry any current because the current will prefer the path of least resistance (or opposition) and so the entire current will flow through the short circuit. Hence, the elements parallel to a short circuit need not be considered for analysis as shown in the example circuit of Fig. 1.16. 1W
10 V +
2W
4W
A
2W
1W
2W
1W
SC
1W
Þ
2W
+
2W
10 V 
2W
3W
SC
B
B
5 V +
A
2W
A
4W
SC
Þ
A
5 V +
SC
6W B
Fig. 1.16 : Examples of short circuit.
6W
B
Circuit Analysis
1. 16
1.2.5 Sign Conventions The elements of a circuit are two terminal elements. When a circuit is excited (i.e., power supply is switched ON) a voltage is developed across the two terminals of the element such that one end is positive and the other end is negative, and a current flows through the element. When an element delivers energy, the current leaves the element from the positive terminal and when an element absorbs energy, the current enters at the positive terminal. In a circuit, normally the sources deliver energy and the passive elements−resistance, inductance and capacitance absorb energy. Therefore, in a voltage/current source, when it delivers energy, the current leaves from the positive terminal. In the parameters R, L and C, the current enters at the positive terminal when they absorb energy. + +
E E
V
I
R
E
I
I
+
+
V E
L
I
+ C
V
V
E
E
Fig. a :Voltage Fig. d : Inductance Fig. c : Fig. b : Current source absorbing Resistance source delivering energy. delivering energy. absorbing energy. energy.
Fig. e : Capacitance absorbing energy.
Fig. 1.17 : Sign conventions for sources when they deliver energy and parameters when they absorb energy. I A chargeable battery is the best example E for understanding the concept of energy delivery V E +E I + and absorption by sources. When the battery is connected to a load, it delivers energy. When the battery is charged, it absorbs energy. When a Fig. a :Voltage source Fig. b : Current source absorbing energy. source absorbs energy, the current enters the source absorbing energy. Fig. 1.18 : Sign conventions for sources when at the positive terminal, as shown in Fig. 1.18. they absorb energy. The resistance always absorbs energy but the inductance and capacitance can deliver the stored energy temporarily. The inductance and capacitance store energy when the supply is switched ON and when the supply is switched OFF the stored energy is discharged in the available paths or leakage paths. When the inductance and capacitance discharge energy, the current leaves from the positive terminal as shown in Fig. 1.19. I
I
+
+
L
V
E
Fig. a : Inductance discharging energy.
C
V
E
Fig. b : Capacitance discharging energy.
Fig. 1.19 : Sign conventions for inductance and capacitance parameters when they discharge energy.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 17
1.2.6 Voltage and Current Sources Voltage and current are two quantities that decide the energy supplied by the sources of electrical energy. Usually, the sources are operated by maintaining one of the two quantities as constant and by allowing the other quantity to vary depending on the load. When voltage is maintained constant and current is allowed to vary, the source is called a voltage source. When current is maintained constant and voltage is allowed to vary, the source is called a current source.
1.2.7 Ideal and Practical Sources In ideal conditions the voltage across an ideal voltage source should be constant for whatever current is delivered by the source. Similarly, the ideal current source should deliver a constant current for whatever voltage across its terminals. Is E I
+ +
V
Is
E E
E V
I
Fig. a : Characteristics of an ideal voltage source. Fig. b : Characteristics of an ideal current source. Fig. 1.20 : Characteristics of ideal sources.
In reality, ideal conditions never exist (but for analysis purpose, the sources can be considered ideal). In a practical voltage source, the voltage across the source decreases with increasing load current and the reduction in voltage is due to its internal resistance. In a practical current source, the current delivered by the source decreases with increasing load voltage and the reduction in current is due to its internal resistance. E
Is
V
I
Fig. a : Characteristics of a practical voltage source.
Fig. b : Characteristics of a practical current source.
Fig. 1.21 : Characteristics of practical sources.
Let, Es Is V I Rs
= = = = =
Voltage across ideal source (or internal voltage of the source) Current delivered by ideal source (or current generated by the source) Voltage across the terminals of the source Current delivered through the terminals of the source Source resistance (or internal resistance).
Circuit Analysis
1. 18
A practical voltage source can be considered as a series combination of an ideal voltage source and a source resistance, Rs. The reduction in voltage across the terminals with increasing load current is due to the voltage drop in the source resistance. When the value of source resistance is zero, the ideal condition is achieved in voltage sources. Hence, “the source resistance for an ideal voltage source is zero”.
+
IRs
V, E
I E +
Rs
E Vs I
E +E
sI
E
I
V = E E IRs
Fig. 1.22 : A practical dc voltage source. Is, I
I
A practical current source can be considered as a parallel combination of an ideal current source and a source resistance, Rs. The reduction in current delivered by the source is due to the current drawn by the parallel source resistance. When the value of source resistance is infinite, the ideal condition is achieved in current sources. Hence, “the source resistance for an ideal current source is infinite”.
}IRs
VV
V
+
Ish Is
Is Vs V Rs
I Vs
V
}Ish V
E
V
I = Is E Ish
Fig. 1.23 : A practical dc current source.
1.2.8 DC Source Transformation A practical voltage source can be converted into an equivalent practical current source and vice versa, with the same terminal behaviour. In these conversions the current and voltage at the terminal of the equivalent source will be the same as that of the original source, so that the power delivered to a load connected at the terminals of original and equivalent source is the same. Rs +
A
A +
IRs 
E +
V
+
I
RL
Ish
Þ
Rs
Is
V
B
I
RL
Is = E/Rs
B
Fig. a : Voltage source.
Fig. b : Equivalent current source of the voltage source in Fig. a. Fig. 1.24 : Conversion of voltage source to current source.
A voltage source with series resistance can be converted into an equivalent current source with parallel resistance as shown in Fig. 1.24. Similarly, a current source with parallel resistance can be converted into an equivalent voltage source with series resistance as shown in Fig. 1.25. The proof for source conversions are presented in Chapter 2.
Chapter 1  Basic Circuit Analysis and Network Topology Rs
A
IRs
I
Rs
Is
+
+
V Rs
1. 19
V
RL
Þ
E +


A + I
V
RL
E = Is R s
B
B
Fig. a : Current source.
Fig. b : Equivalent voltage source of the current source in Fig. a. Fig. 1.25 : Conversion of current source to voltage source.
1.2.9
Power and Energy Power is the rate at which work is done or it is the rate of energy transfer. Let, w = Instantaneous value of energy q = Instantaneous value of charge. dq Now, Instantaneous power, p = dw = dw # dt dq dt We know that, dw = v dq
and
dq = i dt
Refer equations (1.5) and (1.7).
` p = vi
Therefore, power is the product of voltage and current. In circuits excited by dc sources, the voltage and current are constant and so the power is constant. This constant power is called average power or power and it is denoted by P. \ In DC circuits, Power, P = VI Power is the rate of work done and Energy is the total work done. Hence, energy is given by the product of power and time. When time is expressed in seconds, the unit of energy is wattsecond and when the time is expressed in hours, the unit of energy is watthour. \ Energy, E = P t in Ws or Wh The larger unit of electrical energy is kWh and commercially one kWh of electrical energy is called one unit. ` Energy, E =
Pt in kWh 1000 # 3600
Circuit Analysis
1. 20
1.3 Ohm’s and Kirchhoff’s Laws The three fundamental laws that govern the electric circuit are Ohm’s law, Kirchhoff’s Current Law (KCL) and Kirchhoff’s Voltage Law (KVL).
1.3.1 Ohm’s Law Ohm’s law states that the potential difference (or voltage) across any two ends of a conductor is directly proportional to the current flowing between the two ends provided the temperature of the conductor remains constant. The constant of proportionality is the resistance R of the conductor. \V a I ⇒ V = IR
..... (1.10)
From equation (1.10), we can say that when a current I flows through a resistance R, the voltage V, across the resistance is given by the product of current and resistance.
1.3.2 Kirchhoff’s Current Law (KCL)
(AU Dec’15, 2 Marks)
Kirchhoff’s Current Law states that the algebraic sum of currents at a node is zero. ∑I=0 I4
Hence, we can say that current cannot stay at a point. While applying Kirchhoff’s Current Law (KCL) to a node we have to assign polarity or sign (i.e., + or −) for the current entering and leaving that node. Let us assume that the currents entering the node are negative and currents leaving the node are positive.
R4 Node I1
R1
I3
R3 R2
With reference to Fig. 1.26, we can say that currents I1 and I2 I2 are entering the node and the currents I3 and I4 are leaving the Fig. 1.26 : Currents in a node. node.Therefore, by Kirchhoff’s Current Law we can write, −I1 − I2 + I3 + I4 = 0 ∴ I1 + I2 = I3 + I4
..... (1.11)
From equation (1.11), we can say “the sum of currents entering a node is equal to the sum of currents leaving that node”. This concept is easier to apply while solving problems using KCL.
1.3.3 Kirchhoff’s Voltage Law (KVL) Kirchhoff’s Voltage Law states that the algebraic sum of voltages in a closed path is zero.
R2
C + I
IR2
R3
D +
E
IR3
+
E
∑V=0
R1
IR4
IR1 +
A closed path may have voltage rises and voltage falls when it is traversed or traced in a particular direction.While applying KVL to a closed path we have to assign polarity or sign (i.e., + or ) to voltage fall and rise. Let us assume voltage rise as positive and voltage fall as negative.
E
I E
R4
E F E E2
B + E1 E A
E
IR5 R5
+
+ I
G
Fig. 1.27 : A circuit with a single closed path.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 21
Consider the circuit shown in Fig. 1.27. Let us trace the circuit in the direction of current I. In the closed path ABCDEFGA, the voltage rise are E1 and E2 and voltage fall are IR1, IR2, IR3, IR4 and IR5. Therefore, by KVL we can write, E1 + E2  IR1  IR2  IR3  IR4  IR5 = 0 ∴ E1 + E2 = IR1 + IR2 + IR3 + IR4 + IR5
..... (1.12)
From equation (1.12) we can say “the sum of voltage rise in a closed path is equal to the sum of voltage fall in that closed path”. This concept is easier to apply while solving problems using KVL.
1.4
Resistive Elements
The devices that can be operated by electrical energy can be modelled by fundamental parameters R, L and C. In certain devices L and C are negligible and such devices can be modelled by pure resistance and so can be called resistive elements. Examples of such devicces are incandescent lamp, water heater, ironbox and copper and aluminium wires.
1.4.1
(AU May’15, 2 Marks)
Resistance
Resistance is the property of an element (or matter) which opposes the flow of current (or electrons). The current carrying element is called a conductor. The resistance of a conductor (in the direction of current flow) is directly proportional to its length l and inversely proportional to the area of cross section a. ` Resistance, R α l a The proportionality constant is the resistivity r of the material of the conductor. ` R =
ρl a
The unit of resistivity is ohmmetre(Ωm). The resistivity of a material at a given temperature is constant. For example, the resistivity of copper is 1.72 ´ 10–8 Wm and that of aluminium is 2.69 ´ 10−8 Ωm at 20o C. Lumped resistance The resistance of a conductor is distributed throughout the length of the conductor. For analysis R purpose, the resistance is assumed to be concentrated at one place, which is called lumped resistance. For connecting the lumped resistance to the other part resistanceless wire of the circuit, resistanceless wires are connected to Fig. 1.28 : A lumped resistance with its ends as shown in Fig. 1.28. (Normally, the term resistanceless wires connected to its ends. resistance in circuit theory refers only to lumped resistance).
Circuit Analysis
1. 22
1.4.2
Resistance Connected to DC Source
Consider a resistance R connected to dc source of voltage V volts as shown in Fig. 1.29. Since the resistance is connected across (or parallel to) the source, the voltage across the resistance is also V volts. By Ohm’s law, the current through the resistance is given by, I = V ⇒ V = IR R
..... (1.13)
Power in the resistance, P = VI
I
..... (1.14) +
Using equation (1.13), equation (1.14) can also be written as, 2
P = VI = V # V = V R R
` Power, P = VI
+
V
V E
R
E
and P = VI = IR ´ I = I2 R 2 or P = V R
or P = I2 R
Fig. 1.29 : Resistance connected to a DC source.
1.4.3 Resistance in Series R1
Req = R1 + R2
R2
Consider a circuit with + E E + IR1 IR2 series combination of two resistances R 1 and R 2 connected to a dc source of voltage V as I I E E + shown in Fig.1.30(a). Let the + V V current through the circuit be I. Fig. a : Resistances in series. Fig. b : Equivalent circuit of Fig. a. Fig. 1.30 : Resistances in series. It can be proved that the seriesconnected resistances R 1 and R 2 can be replaced by an equivalent resistance R eq given by the sum of individual resistances R 1 and R 2 as shown in Fig. 1.30(b). The proof for resistance in series is presented in Chapter 2.
Voltage Division in Series Connected Resistances Equations (1.15) and (1.16) given below can be used to determine the voltages across series connected resistances shown in Fig. 1.31 in terms of total voltage across the series combination and the values of individual resistances. Hence, these equations are called voltage division rule. The proof for voltage division rule is presented in Chapter 2.
R2
R1
I +
V1
+
E
E V2
+E
V
Fig. 1.31 : Resistances in series.
V1 = V #
R1 R1 + R2
.....(1.15)
V2 = V #
R2 R1 + R2
.....(1.16)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 23
The following equation will be helpful to remember the voltage division rule. In two series connected resistances, Total voltage across Value of the # series combination resistance Voltage across one of the resistance = Sum of the inidvidual resistances
1.4.4
Resistance in Parallel
I I2
I1
Consider a circuit with two resistances in parallel and connected to a dc source of voltage V as shown in Fig. 1.32(a). Let I be the current supplied by the source and I 1 and I2 be the current through R1 and R2, respectively. Since the resistances are parallel to the source, the voltage across them will be the same.
+
+ V
+ E
R1
V
E
R2
V
E
Fig. a : Resistances in parallel. I
+ V
V
+ E
R
eq It can be proved that the inverse of the equivalent E R R 1 Req a a 1 2 1 1 R1 C R2 resistance of parallel connected resistances is equal to the C R1 R2 sum of the inverse of individual resistances. The proof for Fig. b : Equivalent circuit of Fig. a. resistance in parallel is presented in Chapter 2. Fig. 1.32 : Resistances in parallel.
Current Division in Parallel Connected Resistances Equations (1.17) and (1.18) given below can be used to determine the currents in parallel connected resistances shown in Fig. 1.33 in terms of total current drawn by the parallel combination and the values of individual resistances. Hence, these equations are called current division rule. The proof for current division rule is presented in Chapter 2. I1 = I #
R2 R1 + R2
.....(1.17)
I2 = I #
R1 R1 + R2
.....(1.18)
I I1
I2 +
+ +
V E
R1
V E
R2
V E
Fig. 1.33 : Resistances in parallel.
The following equation will be helpful to remember the current division rule. In two parallel connected resistances, Total current drawn by Value of the # parallel combination other resistance Current through one of the resistance = Sum of the inidvidual resistances
1.4.5
Analysis of Resistors in SeriesParallel Circuits
A typical circuit consists of a seriesparallel connection of passive elements like resistance, inductance and capacitance and excited by voltage/current sources. The sources circulate current through all the elements of the circuit. Due to current flow, a voltage exists across each element of the circuit.
Circuit Analysis
1. 24
Basically, circuit analysis involves the solution of currents and voltages in various elements of a circuit. The currents and voltages can be solved using the three fundamental laws: Ohm’s law, Kirchhoff’s Current Law (KCL) and Kirchhoff’s Voltage Law (KVL). Now, the questions are: What will be the direction of current and polarity of voltage of an element in a circuit and how to find them ? In practical cases we may come across circuits with a single source or circuits with multiple sources. In circuits excited by a single source, with some experience it is possible to predict the direction of current because the current will leave from the positive end of the source and flow through available paths and then return to the negative end of the source. In circuits with multiple sources, it will be difficult to find the direction of current through various elements. A common procedure to determine the current and voltage in various elements of a circuit is presented in the following section. Procedure for Analysis of Circuits Using Fundamental Laws
1. Mark the nodes of the given circuit as A, B, C, D, etc. We can mark all the nodes including the meeting point of two elements. 2. Determine the number of branches in the given circuit. Attach a current to each branch of the circuit and arbitarily assume a direction for each branch current. Let, the branch currents be Ia, Ib, Ic, Id,etc. 3. Write Kirchhoff’s Current Law (KCL) equations at each principal node of the circuit. (Remember that a principal node is the meeting point of three or more elements.) The KCL equation is obtained by equating the sum of currents leaving the node to the sum of currents entering the node. Therefore, by KCL, Sum of currents entering the node = Sum of currents leaving the node. 4. Any circuit will have some independent currents and the remaining currents will depend on the independent currents. Hence, using the KCL equations, try to minimise the number of unknown currents by expressing some branch currents in terms of other branch currents. (The ultimate aim is to choose some independent currents and to express other currents in terms of independent currents.) 5. Let, the number of independent currents in the given circuit be M. Now we have to identify or choose M number of closed paths in the given circuit. For each closed path write a Kirchhoff’s Voltage Law (KVL) equation. The KVL equation is formed by equating the sum of voltage fall in the closed path to the sum of voltage rise in that closed path. Therefore, by KVL, Sum of voltage fall in a closed path = Sum of voltage rise in a closed path.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 25
6. The M number of KVL equations can be solved by any technique to find a unique solution for M independent branch currents. 7. From the knowledge of independent branch currents, determine the dependent branch currents. 8. Once the branch currents are known it is easy to find the voltage across the elements by Ohm’s law. The voltage across an element is given by the product of resistance and current, i.e., by Ohm’s law, Voltage = Resistance ´ Current 9. If we are interested in calculating the power of an element then the power can be calculated from the knowledge of voltage and current in the element. In purely resistive circuits excited by dc sources, Power = (Current)2 ´ Resistance or
Power =
^Voltageh2
Resistance
or Power = Voltage # Current
Some Important Basic Concepts
1.
When a source delivers energy, the current will leave from the positive end of the source and return to the negative end.
2.
In series connected elements, the same current will flow.
3.
In parallel connected elements, the voltage across them will be the same.
4.
When a current flows through a resistance, the polarity of voltage across the resistance will be such that the current entering point is positive and the leaving point is negative as shown in Fig. 1.34.
I
5.
R E
If the total voltage across two resistances R1 and R2 in series is V volts Fig. 1.34. and V1 and V2 are the voltage across R1 and R2, respectively then, V1 = V #
6.
+ V
R1 R1 + R2
and
V2 = V #
R2 R1 + R2
If the total current through two resistances R1 and R2 in parallel is I amperes and I1 and I2 are the current through R1 and R2, respectively then, I1 = I #
R2 R1 + R2
and
I2 = I #
R1 R1 + R2
Circuit Analysis
1. 26
1.4.6
Single Loop Circuit R1
A single loop circuit is one which has only one closed path. In a single loop circuit all the elements are connected in series and so current through all the elements will be the same. A single loop circuit can be analysed using Kirchhoff’s Voltage Law (KVL) and Ohm’s law.
+ IR1
R2 +
E
IR2
+
E2 E
E
+ E1 E
I IR4 E
+
E
IR3
+
A single loop circuit is shown in Fig. 1.35. Let, I be the R3 R4 current through the circuit. By Ohm’s law, the voltage across a Fig. 1.35 : Single loop circuit. resistance is given by the product of resistance and current through the resistance. Now, using KVL we can write, IR1 + IR2 + E2 + IR3 + IR4 = E1 ` I =
⇒
I(R1 + R2 + R3 + R4) = E1  E2
E1 − E2 R1 + R2 + R3 + R4
From the above equation, the current through the single loop circuit of Fig. 1.35 can be estimated. From the knowledge of current and resistance, the voltage across various elements can be estimated. From the knowledge of voltage and current, the power can be estimated.
1.4.7
Single Node Pair Circuit Node1
V
A single node pair circuit is one which has only one independent node and a reference node. In a single node pair circuit all the elements are connected in parallel and so voltage across all the elements will be the same. A single node pair circuit can be analysed using Kirchhoff’s Current Law (KCL) and Ohm’s law.
I1
V R1
V R2
V R3
R1
R2
R3
V R4
I2
R4
0V
Reference node A single node pair circuit is shown in Fig. 1.36. Let, V be the voltage of the independent node (node1) with respect Fig. 1.36 : Single node pair circuit. to the reference node.The voltage of the reference node is always zero. By Ohm’s law, the current through the resistance is given by the ratio of voltage and resistance.
Now, using KCL we can write, V V V V 1 1 1 1 + + + I2 + = I1 ⇒ V c + + + m = I1 − I2 R1 R2 R3 R4 R1 R2 R3 R4 ` V =
I1 − I2 1 + 1 + 1 + 1 R1 R2 R3 R4
From the above equation the voltage of the independent node (node1) can be estimated. This voltage is the voltage across all the elements in the single node pair circuit. From the knowledge of voltage and resistance, the current through various resistances can be estimated. From the knowledge of voltage and current, the power in various elements can be estimated.
Chapter 1  Basic Circuit Analysis and Network Topology
1.4.8
1. 27
Solved Problems
I
EXAMPLE 1.1 2
9V
+ E
Battery
A 9 V Battery with internal resistance of 2 Ω is connected to a 16 Ω resistive load. Calculate a) power delivered to load, b) power loss in the battery and c) efficiency of the battery.
16
SOLUTION Fig. 1. The battery connected to resistive load can be represented by the circuit shown in Fig. 1. Let, I = Current delivered by the battery. Now, by Ohm’s law, I =
9 = 0.5 A 2 + 16
Power delivered to load, PL = I2 ´ 16 = 0.52 ´ 16 = 4 W Power loss in the battery, PLB = I2 ´ 2 = 0.52 ´ 2 = 0.5 W % Efficiency of battery, ηB = =
Load power # 100 Load power + Power loss PL 4 # 100 = # 100 = 88.9% PL + PLB 4 + 0.5
EXAMPLE 1.2 An 8.4 A current generator with internal resistance of 200 Ω is connected to a 10 Ω resistive load. Calculate a) power delivered to load, b) power loss in the current generator and c) efficiency of the current generator.
SOLUTION The current generator connected to resistive load can be represented by the circuit shown in Fig. 1. Let, VL = Voltage across the load. Now, by Kirchhoff’s current law, VL V + L = 8.4 ⇒ VL c 1 + 1 m = 8.4 ⇒ 0.105 VL = 8.4 200 200 10 10 Current generator
` VL =
8.4 = 80 V 0.105
VL
V2 Power delivered to load, PL = L 10
8.4 A
VL
VL
200
10
200
E
2
= 80 = 640 W 10 Power loss in current generator, P LCG =
2 VL2 = 80 = 32 W 200 200
+ VL
Fig. 1.
10
Circuit Analysis
1. 28 % Efficiency of current generator, ηCG =
=
PL Load power # 100 = # 100 Load power + Power loss PL + PLCG 640 # 100 = 95.2% 640 + 32
EXAMPLE 1.3
IL = 160A
Two batteries A and B with internal emf EA and EB and with
IA
IB
+
+
internal resistance RA and RB are properly connected in parallel to supply a current of 160 A to a load resistance RL. Given that, EA = 120 V, RA = 0.15 Ω, RB = 0.1 Ω and IB = 60 A. Calculate a) EB and
+ EA, RA +E VA
EB, RB +E
VB
VL
RL
E
b) load power. E
SOLUTION
E
Fig. 1. IL = 160 A
Let, EA, EB = Internal (or generated) voltage of sources IA
IL
= Load current
RA = 0.15
+
E
+
RB = 0.1 VA
RBIB
= Current supplied by the sources
RAIA
IA, IB
+ IB = 60 A
E
VA, VB = Terminal voltage of sources
+
+ VB
VL
RL
E EA = 120 V +E
VL = Voltage across the load.
E
EB +E
E
Fig. 2.
The sources are connected parallel to the load as shown in Fig. 1. In Fig. 2, the sources are represented as ideal sources with source resistance connected in series with ideal source. By KCL, we can write, IL = IA + IB ∴ IA = IL − IB = 160 − 60 = 100 A By KVL, we can write, EA = RAIA + VA ∴ VA = EA − RAIA = 120 − 0.15 ´ 100 = 105 V Since the sources and load are in parallel, VA = VB = VL = 105 V By KVL, we can write, EB = RB IB + VB = 0.1 ´ 60 + 105 = 111 V
Chapter 1  Basic Circuit Analysis and Network Topology
1. 29
Load power, PL = VL IL = 105 ´ 160 = 16800 W = 16800 kW = 16.8 kW 1000 VL IL = 105 = 0.65625 Ω 160
Also load resistance, RL =
RESULT EB = 111 V,
PL = 16.8 kW,
RL = 0.65625 Ω
(AU Dec’15, 8 Marks)
EXAMPLE 1.4
4V E
2
+
Determine the magnitude and direction of the current in the 2 V battery in the circuit shown in Fig. 1. +
SOLUTION
2V
3
E
Let us assume three branch currents Ia, Ib and Ic as shown in Fig. 2. The currents are assumed such that they leave from the positive terminal of the sources.
+
3V
The nodes in the circuit are denoted as A, B, C, D and E.
Fig. 1.
By KCL at nodeA we get, Current leaving nodeA
1.5
E
: Ia
Currents entering nodeA : Ib, Ic ∴ Ia = Ib + Ic
..... (1) 4V C
Ia
Voltage fall
: 2Ia, 3Ib
Voltage rise
: 4 V, 2 V
+ 2Ia
E D
Ib
E
3V +
Put, Ia = Ib + Ic
Ic
⇒
5Ib + 2Ic = 6
..... (2)
E
3
2V +
A
∴ 2Ia + 3Ib = 4 + 2
∴ 2(Ib + Ic) + 3Ib = 6
2
+
E
With reference to Fig. 2, in the closed path ACBDA we get,
+
B
3Ib 1.5
E E
E
+ 1.5Ic
Fig. 2.
With reference to Fig. 2, in the closed path ADBEA we get, Voltage fall
: 2 V, 1.5Ic
Voltage rise
: 3Ib, 3 V
∴
2 + 1.5Ic = 3Ib + 3 −3Ib + 1.5Ic = 3 − 2 −3Ib + 1.5Ic = 1
..... (3)
Circuit Analysis
1. 30 Equation (2) ´ 1.5
⇒
Equation (3) ´ (2)
⇒
On adding
7.5Ib + 3Ic =
9
6Ib  3Ic = 2 13.5Ib
= ` Ib =
7
7 = 0.5185 A 13.5
Therefore, the current supplied by the 2 V battery is 0.5185 A in the direction B to A (Refer Fig. 2.). The currents supplied by other sources can be estimated as shown below: 1 + 3Ib = 1 + 3 # 0.5185 = 1.7037 A 1.5 1.5 From equation (1), Ia = Ib + Ic = 0.5185 + 1.7037 = 2.222 A
From equation (3), Ic =
EXAMPLE 1.5 10
In the circuit shown in Fig. 1, the current in 5 Ω resistor is 5 A. Calculate the power consumed by the 5 Ω resistor. Also determine the current through 10 Ω resistance and the supply voltage E.
20
5
SOLUTION
30 5A
Power consumed by 5 Ω resistor = (Current)2 ´ Resistance = 52 ´ 5 = 125 W
E
+ E
Fig. 1.
The resistances 20 Ω and 30 Ω in parallel in Fig. 1, can be replaced by a single equivalent resistance as shown in Fig. 2. [Refer Chapter 2 for calculating equivalent resistance]. Let, Is = Current supplied by source I1 = Current through 10 Ω I2 = Current through 12 Ω V1 = Voltage across 5 Ω V2 = Voltage across 10 Ω and 12 Ω in parallel. In Fig. 2, the current Is divides into I1 and I2 and flows through parallel resistances 10 Ω and 12 Ω. The currents I1 and I2 can be calculated by current division rule.
I1
By current division rule, I1 = Is #
5W
12 12 = 5 # = 2.7273 A 10 + 12 10 + 12
By Ohm’s law,
+ V1
By KVL, we can write, E = V1 + V2 = 25 + 27.273 = 52.273 V
V2
Is
+
Is = 5 A
I2
V1 = 5 ´ 5 = 25 V V2 = 10 ´ I1 = 10 ´ 2.7273 = 27.273 V
10 W +
V2

20 ´ 30 = 12 W 20 + 30

+ E
Fig. 2.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 31
RESULT Power consumed by 5 Ω resistor = 125 W Current through 10 Ω resistor = 2.7273 A Supply voltage, E = 52.273 V
EXAMPLE 1.6
8
In the circuit shown in Fig. 1, the voltage across 8 Ω resistor is 20 V. What is the current through 12 Ω resistor?. Also calculate the supply voltage.
+
E +E
SOLUTION
20 V
E
18
12
Let, Is be the current supplied by the source. The Is divides into I1 and I2 and flows through parallel connected 18 Ω and 12 Ω resistances as shown in Fig. 2.
Fig. 1.
The current supplied by the source flows through 8 Ω resistance. Since the voltage across 8 Ω is known, the current Is can be calculated by Ohm’s law.
Is
Is = 20 = 2.5 A 8
Let,
+ 12 V2
E
+
E
V2
18 18 + 12
= 2.5 #
I2 I1
18
E +E
By current division rule, I2 = Is #
8 E + V1 = 20 V
By Ohm’s law,
Fig. 2.
18 = 1.5 A 18 + 12
V1 = Voltage across 8 Ω resistance. V2 = Voltage across parallel combination of 18 Ω and 12 Ω.
Given that, V1 = 20 V By Ohm’s law, V2 = 12 ´ I2 = 12 ´ 1.5 = 18 V With reference to Fig. 2, by KVL we can write, E = V1 + V2 = 20 + 18 = 38 V
RESULT Current through 12 Ω resistor = 1.5 A Supply voltage, E = 38 V
EXAMPLE 1.7 In the circuit of Fig. 1, show that the power supplied by the current source is double of that supplied by the voltage source when R = (10/3) Ω.
SOLUTION Since the voltage source, current source and R are in parallel, the voltage across them will be the same, as shown in Fig. 2.
+ 10 V
R E
Fig. 1.
2A
Circuit Analysis
1. 32 Let, I1 = Current supplied by voltage source
I1
I2 = Current supplied by current source I
I
I2 = 2 A + 10 V E
+ 10 V +E
R
10 V E
= Current through R.
2A
By Ohm’s law, I =
Fig. 2.
Voltage across resistance = 10 = 3 A Resistance 10/3
By KCL, we can write, I = I1 + I2 Given that, I2 = 2 A ∴ I1 = I − I2 = 3 − 2 = 1 A Now, Power supplied by 10 V source = 10 ´ I1 = 10 ´ 1 = 10 W Power supplied by 2 A source
= 10 ´ I2 = 10 ´ 2 = 20 W
From the above results it is clear that the power supplied by the current source is 20 W, which is double the power supplied by the voltage source. C
EXAMPLE 1.8
10 A
Find the power dissipated in each resistor in the circuit of Fig. 1. 2
SOLUTION The power dissipated in the resistors can be calculated from the knowledge of current through the resistors. Let us denote the current
1
2
30 A
through the resistors as Ia, Ib and Ic as shown in Fig. 2.
20 A B
A
Fig. 1.
In the closed path ACBA using KVL, we can write, I Ia + b = Ic 2
2Ia + Ib = 2Ic ⇒
∴ Ic = Ia + 0.5Ib
..... (1)
At nodeA, by KCL, we get,
C
..... (2)
Ib
On substituting for Ic from equation (1) in equation (2), we get,
2
+ Ia 2
30 A
At nodeC, by KCL, we get, Ib + 10 = Ia ⇒ Equation (3) ´ 1
⇒
Equation (4) ´ 0.5
⇒
On adding
A
Ia − Ib
= 10
2Ia + 0.5Ib = 30 0.5Ia − 0.5Ib = 2.5Ia
5
= 35 ` Ia = 35 = 14 A 2.5
..... (4)
+ 1 Ib
2Ia
2Ia + 0.5Ib = 30 ..... (3)
E
⇒
Ia + Ia + 0.5Ib = 30
E
Ia + Ic = 30
10 A
Ic
+
2Ic
20 A E
Fig. 2.
B
Chapter 1  Basic Circuit Analysis and Network Topology
1. 33
From equation (4) we get, Ib = Ia − 10 = 14 − 10 = 4 A From equation (1) we get, Ic = Ia + 0.5Ib = 14 + 0.5 ´ 4 = 16 A We know , Power consumed by a resistor = ^Currenth 2 # Resistance Power consumed by 2Ω resistor between nodes A and C = Ia2 # 2 = 142 # 2 = 392 W Power consumed by 2Ω resistor between nodes A and B = Ic2 # 2 = 162 # 2 = 512 W Power consumed by 1Ω resistor between nodes B and C = Ib2 # 1 = 4 2 # 1
= 16 W
EXAMPLE 1.9 In the circuit shown in Fig. 1, find a) the total current drawn from the battery, b) voltage across 2 W resistor and c) current passing through the 5 W resistor.
2 1 7
5
+ 10 V E
SOLUTION Let, IT be the total current supplied by the source. This current flows through 1 W and 2 W in series and then it divides into I1 and I2 and flows through the parallel combination of 7 W and 5 W as shown in Fig. 2. The parallel combination of 7 W and 5 W can be reduced to a single equivalent resistance as shown in Fig. 3. (Refer Chapter 2 for calculating equivalent resistance.)
Fig. 1. 2
+
I1
7
IT
I2
5
10 V E
Fig. 2.
By Ohm’s law, we can write, IT =
IT
1
10 = 1.6901 A 1 + 2 + 2.9167
∴ Voltage across 2 Ω resistor = IT ´ 2 = 1.6901 ´ 2
2W
5´7 5+7 = 2.9167 W
IT
By current division rule,
+
7 Current through 5 Ω resistor, I 2 = I T # 5 + 7 = 1.6901 #
IT
1W
= 3.3802 V
7 = 0.9859 A 5 + 7
RESULT a)
Total current supplied by the source, IT = 1.6901 A
b)
Voltage across 2 Ω resistor = 3.3802 V
c)
Current through 5 Ω resistor = 0.9859 A
10 V 
Fig. 3.
Circuit Analysis
1. 34
EXAMPLE 1.10 Calculate the current in all the elements of the circuit shown in Fig. 1.
2
6
+ E 10 V
SOLUTION Since the circuit has only one source. The direction of current through the elements can be found as shown in Fig. 2.
4 3
8
By applying KCL at nodeA we get,
Fig. 1. A
Currents leaving nodeA
:
Ib, Ic
Ib
Ic
Ia
Current entering nodeA
:
2
Ia
\ Ib + Ic = Ia
+ E 10 V
6
B
D
\ Ic = Ia  Ib
..... (1)
4 3
8
From equation (1) we can say that current Ic can be expressed in terms
Fig. 2.
of Ia and Ib. Hence, the circuit has only two independent currents, Ia and Ib and
C
they can be solved by writing two KVL equations in the closed paths ABCA and ADCA. A Ib
With reference to Fig. 3, in the closed path ADCA we get, Voltage fall
: 2Ib, 3Ib, 4Ia
Voltage rise
: 10 V
Ia
2Ib +
+ 10 V E
E D
E 4Ia
+ 3Ib
4Ia + 5Ib = 10
E
\ 2Ib + 3Ib + 4Ia = 10
C
..... (2)
Fig. 3. A
With reference to Fig. 4, in the closed path ABCA we get, : 6(Ia  Ib), 8(Ia  Ib), 4Ia
Voltage rise
: 10 V
I c = I a E Ib + 6(Ia E Ib)
Ia
+ E 10 V
E
Voltage fall
+
B
\ 6(Ia  Ib) + 8(Ia  Ib) + 4Ia = 10
E
14(Ia  Ib) + 4Ia = 10
+
E
+
4Ia
14Ia  14Ib + 4Ia = 10 18Ia  14Ib = 10
..... (3)
C
Fig. 4.
8(Ia E Ib)
Chapter 1  Basic Circuit Analysis and Network Topology Equation (2) ´ 14
⇒
56Ia + 70Ib = 140
Equation (3) ´ 5
⇒
90Ia  70Ib =
On adding
146Ia
1. 35
50
= 190 ` Ia = 190 = 1.3014 A 146
10 − 4Ia 5 = 10 − 4 # 1.3014 = 0.9589 A 5
From equation (2), we get, Ib =
From equation (1), we get, Ic = Ia  Ib = 1.3014 – 0.9589 = 0.3425 A
RESULT The current through the elements (i.e., branch currents) are, Ia = 1.3014 A
;
Ib = 0.9589 A
;
Ic = 0.3425 A
(AU June’14, 8 Marks)
EXAMPLE 1.11
A
Determine the current in all the resistors of the circuit shown in Fig 1.
SOLUTION
50 A
I1
I2
I3
2
1
5
Let, voltage at nodeA be VA
Fig. 1.
Now, by Ohm’s law, VA 2
I1 =
; I2 =
VA 1
; I3 =
VA 5
By KCL, at nodeA, I + I + I = 50
&
` 1.7 VA = 50
&
1
2
3
VA VA VA + + = 50 2 1 5
&
0.5VA + VA + 0.2 VA = 50
VA = 50 = 29.4118 V 1.7
` I1 =
VA = 29.4118 = 14.7059 A 2 2
I2 =
VA = 29.4118 = 29.4118 A 1 1
I3 =
VA = 29.4118 = 5.8823 A 5 5
RESULT The current in the resistors are, I1 = 14.7059 A
;
I2 = 29.4118 A
;
I3 = 5.8823 A
B
1. 36
Circuit Analysis
1.5 Mesh Current Method of Analysis for DC and AC Circuits Mesh analysis is a useful technique to solve the currents in the various elements of a circuit. Mesh analysis is preferred if the circuit is excited by voltage sources and the current through various elements is unknown. Mesh analysis can also be extended to circuits excited by both voltage and current sources and to circuits excited by both independent and dependent sources. In a circuit, each branch will have a current through it. Hence, the number of currents in a circuit is equal to the number of branches. In a circuit some of the currents will be independent and the remaining currents depend on independent currents. The number of independent currents in a circuit is given by number of links in the graph of the circuit. (Refer Section 1.7.2.) In mesh analysis, independent currents are solved by writing Kirchhoff’s Voltage Law (KVL) equations for various meshes in a circuit. If the graph of a circuit has B branches and N nodes then the number of links L is given by L = B − N + 1. Hence, L number of meshes are chosen in a given circuit. “Mesh is defined as a closed path which does not contain any other loops within it”. Let us denote the number of meshes by m. In a circuit the number of meshes m is equal to links L. For each mesh, an independent current is assigned called mesh current and for each mesh, an equation is formed using Kirchhoff’s Voltage Law. The equation is formed by equating the sum of voltage rise to the sum of voltage drop in a mesh. These m number of mesh equations are arranged in a matrix form and mesh currents are solved by Cramer’s rule. A simple procedure to form mesh basis matrix equation directly from circuit by inspection without forming KVL equations is also discussed in this chapter. Mesh analysis is applicable to planar circuits. “A circuit is said to be a planar circuit if it can be drawn on a plane surface without crossovers”.
1.5.1 Mesh Analysis of Resistive Circuits Excited by DC Sources A circuit with B branches will have B number of currents and in this some currents are independent and the remaining currents depend on independent currents. The number of independent currents m is given by m = B − N + 1, where N is the number of nodes. In order to solve the independent currents of a circuit we have to choose m meshes (or closed paths) in the circuit. For each mesh we have to attach a current called mesh current. The mesh currents are the independent currents of the circuit. Let, I1, I2, I3, ......,Im be mesh currents. For each mesh, a KVL equation is formed by equating the sum of voltage rise to the sum of voltage fall in the mesh. Since there are m meshes we can form m equations. In resistive circuits excited by dc sources, the voltages and currents are real (i.e., they are not complex). For resistive circuits, the m number of equations can be arranged in the matrix form as shown in equation (1.19), which is called mesh basis matrix equation. The formation of mesh basis matrix equation from the KVL equations is explained in some of the solved problems ahead.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 37
The mesh basis matrix equation (1.19), can be written in a simplified form as shown in equation (1.20). Note : The bold faced letters represent matrices. R12 R22 R32 h R m2
R13 R23 R33 h R m3
g R1m VW RS I1 VW g R2m W S I2 W g R3m W S I3 W = W S W h W Sh W k R mm W SI m W X T X
R E11 V S W S E22 W S E33 W S W S h W SE W T mm X
..... (1.19)
↓
↓
↓
R R11 S S R21 S R31 S S h SR T m1
RI=E
..... (1.20)
where, R = Resistance matrix of order m × m I = Mesh current matrix of order m × 1 E = Source voltage matrix of order m × 1 m = Number of meshes. In equation (1.19), the elements of the resistance matrix and source voltage matrix can be determined from the given circuit. Hence, the unknowns are mesh currents, which have to be solved by any standard technique. Alternatively, equation (1.19) can be formed directly from the circuit by inspection without writing KVL equations. A procedure to form mesh basis matrix equation by inspection is given below: Procedure to Form Mesh Basis Matrix Equation by Inspection Consider the mesh basis matrix equation shown below for a circuit with three meshes. Let, I1, I2, I3 be the mesh currents. R11 R12 R13 R > 21 R22 R23 H R31 R32 R33
I1 E11 I E = > 2 H > 22 H I3 E33
The elements of equation (1.21) for circuits with independent sources are, R11 = Sum of resistances in mesh1 R22 = Sum of resistances in mesh2 R33 = Sum of resistances in mesh3 R12 = R21 = Sum of resistances common between mesh1 and mesh2 R13 = R31 = Sum of resistances common between mesh1 and mesh3 R23 = R32 = Sum of resistances common between mesh2 and mesh3 E11 = Sum of voltage sources in mesh1
..... (1.21)
Circuit Analysis
1. 38
E22 = Sum of voltage sources in mesh2 E33 = Sum of voltage sources in mesh3. The resistances R11, R22, R33 are called selfresistances of mesh1, mesh2, mesh3, respectively. The resistances R12, R13, R21, R23, R31, R32 are called mutualresistances between meshes. The formation of the elements of resistance matrix and source voltage matrix are explained below: i) The selfresistance R jj is given by the sum of all the resistances in the jth mesh. The selfresistances will be always positive. ii) The mutualresistance R jk is given by the sum of all the resistances common between meshj and meshk. The common resistance R jk is positive if the mesh currents Ij and Ik flow in the same direction through the common resistance as shown in Fig. 1.37 and it is negative if the mesh currents Ij and Ik flow in the opposite direction through the common resistance as shown in Fig. 1.38. In a circuit with only independent sources (reciprocal circuit), Rjk = Rkj. meshk
meshj Rjk
Ij
Ik
Fig. 1.37 : Example for positive Rjk .
meshk
meshj Rjk
Ij
Fig. 1.38 : Example for negative Rjk . meshj
meshj + E
Ij
Fig. 1.39 : Example for positive source voltage.
Ik
+ E
Ij
Fig. 1.40 : Example for negative source voltage.
iii) The source voltage matrix element E jj is given by the sum of all the voltage sources in the j th mesh. A source voltage is positive if it is a rise in voltage in the direction of mesh current as shown in Fig. 1.39. A source voltage is negative if it is a fall or drop in voltage in the direction of mesh current as shown in Fig. 1.40. Note : In a circuit with both independent and dependent sources (nonreciprocal circuit) Rjk ! Rkj Solution of Mesh Currents In the mesh basis matrix equation [i.e., equation (1.19)], the unknowns are mesh currents I 1, I2 , I 3 ... Im. The mesh currents can be obtained by premultiplying equation (1.19) with the inverse of resistance matrix. Consider equation (1.20), RI=E
Chapter 1  Basic Circuit Analysis and Network Topology
1. 39
On premultiplying both sides by R −1, we get, R−1 R I = R−1 E U I = R−1 E
R−1 R = U = Unit matrix
∴ I = R−1 E
UI = I
..... (1.22)
Equation (1.22) will be the solution for mesh currents. Equation (1.22) can be solved by Cramer’s rule, by which the kth mesh current Ik is given by equation (1.23). ∆ ∆1k ∆ ∆ E11 + 2k E22 + 3k E33 + ...... + mk E mm = 1 ∆ ∆ ∆ ∆ ∆
Ik =
m
/
∆ jk E jj
..... (1.23)
j =1
where, Djk = Cofactor of Rjk Ejj = Sum of voltage sources in meshj D = Determinant of resistance matrix. Proof for Cramer’s Rule Consider equation (1.22), for a circuit with three meshes. I = R 1 E
I1
R11 R12 R13
I3
R31 R32 R33
1
⇒ > I2 H = >R21 R22 R23 H
E11
>E22 H
..... (1.24)
E33
We know that, R 1 =
T Transpose of Rcof Adjoint of R Rcof = = Determinant of R Determinant of R ∆
where, ∆
= Determinant of R
R cof = Cofactor matrix (matrix formed by cofactor of elements of R matrix). Let, ∆ 11 = Cofactor of R 11 ∆ 12 = Cofactor of R 12 and in general, ∆ jk = Cofactor of Rjk `
Rcof =
`
R 1 =
>∆21
∆11 ∆12 ∆13 ∆22 ∆23 H ∆31 ∆32 ∆33
T Rcof
∆
=
Transpose
T Rcof =
>∆12
∆11 ∆21 ∆31 ∆22 ∆32 H ∆13 ∆23 ∆33
∆11 ∆21 ∆31 1 ∆12 ∆22 ∆32 H > ∆ ∆13 ∆23 ∆33
..... (1.25)
On substituting for R–1 from equation (1.25) in equation (1.24), we get, I1
>I2 H I3
=
∆11 ∆21 ∆31 1 ∆ ∆ ∆ > ∆ 12 22 32 H ∆13 ∆23 ∆33
E11
>E22 H E33
On multiplying the matrices on the righthand side of the above equation and equating to the terms on the lefthand side we get, I1 =
∆ ∆ ∆11 E11 + 21 E22 + 31 E33 ∆ ∆ ∆
Circuit Analysis
1. 40 I2 =
∆ ∆12 ∆ E11 + 22 E22 + 32 E33 ∆ ∆ ∆
∆13 ∆ ∆ E11 + 23 E22 + 33 E33 ∆ ∆ ∆ The above equations can be used to form a general equation for mesh current. In general, the k th mesh current of a circuit with m meshes is given by, I3 =
Ik =
m
∆1k ∆ ∆ ∆ E11 + 2k E22 + 3k E33 + ...... + mk Emm = 1 ∆ ∆ ∆ ∆ ∆
/
∆ jk E jj
j =1
Shortcut Procedure for Cramer’s Rule A shortcut procedure for Cramer’s rule is shown below: Let us consider a circuit with three mesh. The mesh basis matrix equation for a three mesh circuit is, R11 R12 R13 I1 E11 R R R I E = > 21 22 23 H > 2 H > 22 H R31 R32 R33 I3 E33
Let us define three determinants as shown below: E11 R12 R13 ∆1 = E 22 R 22 R 23 ; E33 R32 R33
R11 E11 R13 ∆2 = R 21 E 22 R 23 ; R31 E33 R33
R11 R12 E11 ∆3 = R 21 R 22 E 22 R31 R32 E33
Here, ∆ 1 = Determinant of resistance matrix after replacing the first column of resistance matrix by source voltage column matrix. ∆ 2 = Determinant of resistance matrix after replacing the second column of resistance matrix by source voltage column matrix. ∆ 3 = Determinant of resistance matrix after replacing the third column of resistance matrix by source voltage column matrix. Let, ∆ = Determinant of resistance matrix R11 R12 R13 ∆ = R21 R 22 R 23 R31 R32 R33
Now mesh currents I 1 , I 2 and I 3 are given by, I1 =
∆1 ∆
;
I2 =
∆2 ∆
;
I3 =
∆3 ∆
CrossCheck The equation for mesh currents obtained by shortcut procedure is the same as equation (1.23), and verified as shown below: E11 R12 R13 ∆ I1 = 1 = 1 E 22 R 22 R 23 Expanding along first column ∆ ∆ E33 R32 R33 ∆31 ∆11 ∆21 = 1 6 E11 ∆11 + E 22 ∆21 + E33 ∆31 @ = ∆ E11 + ∆ E 22 + ∆ E33 ∆
Chapter 1  Basic Circuit Analysis and Network Topology
I2 =
R11 E11 R13 ∆2 = 1 R 21 E 22 R 23 ∆ ∆ R31 E33 R33
1. 41
Expanding along second column
∆32 ∆ ∆ = 1 6 E11 ∆12 + E 22 ∆22 + E33 ∆32 @ = ∆12 E11 + ∆22 E 22 + ∆ E33 ∆ I3 =
R11 R12 E11 ∆3 = 1 R 21 R 22 E 22 ∆ ∆ R31 R32 E33
Expanding along third column
= 1 6 E11 ∆13 + E 22 ∆23 + E33 ∆33 @ = ∆13 E11 + ∆23 E 22 + ∆33 E33 ∆ ∆ ∆ ∆
Various Steps to Obtain the Solution of Mesh Currents and Branch Currents in a Circuit Step 1 :
Draw the graph of the circuit.
Step 2 :
Determine the branches B and nodes N. The number of mesh currents m is given by m = B − N + 1.
Step 3 :
Select m number of meshes of the circuit and attach a mesh current to each mesh.
Step 4 :
In the given circuit choose arbitrary direction for branch and mesh currents. Let us denote mesh currents by I1, I2, I3,....., and branch currents by Ia, Ib, Ic, Id, Ie,...... Write the relationship between mesh and branch currents. Preferably, the directions of mesh currents are chosen in the same orientation. For example, the direction of all the mesh currents can be chosen clockwise (alternatively, the direction of all the mesh currents can be chosen anticlockwise). When all the mesh currents are chosen in the same orientation, all the mutualresistances (Rjk) will be negative.
Step 5 : Form the mesh basis matrix equation by inspection and solve the mesh currents using Cramer’s rule. For a circuit with three meshes, the mesh basis matrix equation and solution of mesh currents using Cramer’s rule are given below:
>R21
R11 R12 R13 I1 E11 R 22 R 23 H >I 2 H = >E 22 H R31 R32 R33 I3 E33
I1 =
E11 R12 R13 ∆1 = 1 E 22 R 22 R 23 ∆ ∆ E33 R32 R33
R11 E11 R13 ∆2 1 I2 = R 21 E 22 R 23 = ∆ ∆ R31 E33 R33
I3 =
R11 R12 E11 ∆3 = 1 R 21 R 22 E 22 ∆ ∆ R31 R32 E33
Circuit Analysis
1. 42
Step 6 : Solve the branch currents using the relationship between branch and mesh currents. Note : 1. After solving the branch currents (if any, of the current) are found to be negative, then the actual direction is opposite to that of the assumed direction. If interested we can draw the circuit by indicating the actual direction of current. 2. If the directions of the current are already given in the circuit then we have to solve for the given direction of the current. EXAMPLE 1.12 5 + 3 50 V E 4
Solve the currents in various branches of the circuit shown in Fig. 1, by mesh analysis.
SOLUTION
2 6 20 V
E
+
The graph of the given circuit is shown in Fig. 2. It has six branches and four nodes. Hence, the number of meshes m in the circuit is, m = B − N + 1 = 6 − 4 + 1 = 3. The circuit has six currents (corresponding to six branches) and in this three currents are independent (corresponding to three meshes).
8
Fig. 1.
Let us assume three mesh currents I 1 , I 2 and I 3 as shown in Fig. 2. The directions of the current are chosen arbitrarily. The circuit with chosen mesh currents is shown in Fig. 3. 2
5 e
a
b
+ 50 V
I2
c
E
I1
I1
I2
3
4
6
20 V + E
d I3
I3
8
f
Fig. 2.
Fig. 3.
Method I : Formation of mesh basis equation by applying KVL In this method, the mesh equations are formed using Kirchhoff’s Voltage Law. The mesh equation for a mesh is formed by equating the sum of voltage fall to the sum of voltage rise. The voltage rise and fall are determined by tracing the circuit in the direction of the mesh current. 5I 1
With reference to Fig. 4, the mesh equation for mesh1 is formed as shown
+
below :
E + E
+
Voltage fall : 5 I 1 , 3I 1 , 4I 1
I1
50 V
3I1 E +
E
Voltage rise : 50, 3 I 2 , 4I 3
4I1 E +
∴ 5 I 1 + 3 I 1 + 4 I 1 = 50 + 3 I 2 + 4 I 3 12 I 1 − 3 I 2 − 4 I 3 = 50
4I3
+ E
I2 3I2
I3
Fig. 4.
..... (1)
With reference to Fig. 5, the mesh equation for mesh2 is formed as shown
+ 2I2 E
below : Voltage fall : Voltage rise :
I1 3I1
3 I1
6I2
I2
3I2
E +
∴ 3 I 2 + 2 I 2 + 6 I 2 + 20 = 3 I 1 −3 I 1 + 11 I 2 = −20
+
+ E
3 I 2 , 2 I 2 , 6 I 2 , 20
E E
..... (2)
20 V
+
Fig. 5.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 43
With reference to Fig. 6, the mesh equation for mesh3 is formed as shown below :
I1
I2
Voltage fall :
4 I3 , 8 I 3
E 4I1 +
Voltage rise :
20, 4 I 1
+
∴ 4 I 3 + 8 I 3 = 20 + 4 I 1
4I3 E
−4 I 1 + 12 I 3 = 20
..... (3)
E
20 V E
+
I3 8I3 +
Fig. 6.
Equations (1), (2) and (3) are the mesh equations of the circuit shown in Fig. 3. The mesh equations are summarised here for convenience. 12 I 1 − 3 I 2 − 4 I 3 =
50
−3I 1 + 11 I 2 = − 20 −4 I 1 + 12 I 3 = 20 The mesh equations can be arranged in the matrix form as shown below and then solved by Cramer’s rule. 12 − 3 − 4 I1 50 11 0 H >I 2 H = >− 20 H 20 − 4 0 12 I3
>− 3
..... (4)
Method II : Formation of mesh basis matrix equation by inspection In this method, the mesh basis matrix equation is formed directly from the circuit shown in Fig. 3 by inspection. The circuit has three meshes. The general form of mesh basis matrix equation for three mesh circuit is shown in equation (5). R11 R12 R13 I1 E11 R 22 R 23 H >I 2 H = >E 22 H R31 R32 R33 I3 E33
>R21
..... (5)
The elements of resistance matrix and source voltage matrix are formed as shown below: R 11 = 5 + 3 + 4 = 12
R12 = R21 = −3
E 11 = 50
R2 2 = 3 + 2 + 6 = 11
R 13 = R31 = −4
E 22 = −20
R3 3 = 4 + 8 = 12
R 23 = R32 = 0
E 33 = 20
On substituting the above terms in equation (5), we get equation (6) and the solution of equation (6) will give the mesh currents. 12 − 3 − 4 I1 50 11 0 H >I 2 H = >− 20 H 20 − 4 0 12 I3
>− 3
..... (6)
Solution of mesh currents It is observed that the mesh basis matrix equation obtained in method I and II are the same. In equation (6), the unknown are I 1, I2 and I3. In order to solve I1 , I 2 and I3, let us define four determinants ∆, ∆ 1 , ∆ 2 and ∆3 as shown below : 12 − 3 − 4 ∆ = − 3 11 0 ; − 4 0 12
50 − 3 − 4 ∆1 = − 20 11 0 ; 20 0 12
12 50 − 4 ∆2 = − 3 − 20 0 ; − 4 20 12
12 − 3 50 ∆3 = − 3 11 − 20 − 4 0 20
Circuit Analysis
1. 44
The determinants are evaluated by expanding along first row and the mesh currents are solved by Cramer’s rule. 12 − 3 − 4 ∆ = − 3 11 0 = 12 # 611 # 12 − 0 @ − (− 3) # 6 − 3 # 12 − 0 @ + (− 4) # 60 − (− 4) # 11 @ − 4 0 12 = 1584 − 108 − 176 = 1300 50 − 3 − 4 ∆1 = − 20 11 0 = 50 # 611 # 12 − 0 @ − (− 3) # 6 − 20 # 12 − 0 @ + (− 4) # 60 − 20 # 11 @ 20 0 12 = 6600 − 720 + 880 = 6760 12 50 − 4 ∆2 = − 3 − 20 0 = 12 # 6 − 20 # 12 − 0 @ − 50 # 6 − 3 # 12 − 0 @ − 4 20 12 + (− 4) # 6 − 3 # 20 − (− 4) # (− 20) @ = −2880 + 1800 + 560 = − 520 12 − 3 50 ∆3 = − 3 11 − 20 = 12 # 611 # 20 − 0 @ − ^− 3h # 6 − 3 # 20 − ^− 4h # ^− [email protected] + 50 # 60 − (− 4) # 11 @ − 4 0 20 = 2640 − 420 + 2200 = 4420
I1 = ∆1 = 6760 = 5.2 A ∆ 1300 I2 =
∆2 = − 520 = − 0.4 A ∆ 1300
I3 =
∆3 = 4420 = 3.4 A ∆ 1300
Here, the mesh current I 2 is negative. Hence, the actual direction of I 2 is opposite to that of assumed direction. Since there are six branches in the given circuit, we can assume six currents I a , I b , I c , I d , I e and I f as shown in Fig. 7. The direction of branch currents are chosen such that they are all positive. The relation between mesh and branch currents can be obtained from Fig. 7 and the branch currents are evaluated as shown below: Ia = I1 = 5.2 A Ib = I1 – I2 = 5.2 – (–0.4) = 5.6 A Ic = I1 – I3 = 5.2 – 3.4 = 1.8 A I d = –I2 = – (–0.4) = 0.4 A I e = I3 – I2 = 3.4 –(–0.4) = 3.8 A I f = I3 = 3.4 A
2
5
Id
Ib
Ia + I1
50 V E
4
I2
3
20 V I e
Ic I3 8
Fig. 7.
If
6
Chapter 1  Basic Circuit Analysis and Network Topology
1. 45 Id
1
+
5
If
E
E
10
V
Determine the currents in various elements of the bridge circuit shown in Fig. 1 using mesh analysis.
Ib Ia
SOLUTION
1
EXAMPLE 1.13
V +
1
Ic
1 1
The graph of the given circuit is shown in Fig. 2.
Ie
It has six branches and four nodes. Hence, the number of meshes m in the circuit is,
+
m = B – N + 1 = 6 – 4 + 1 = 3.
1
E 5V
Fig. 1.
The circuit has six currents (corresponding to six branches) and in this three currents are independent (corresponding to three meshes).
Let us assume three mesh currents as shown in Fig. 2. The direction of the current are chosen arbitrarily. The circuit with chosen mesh currents is shown in Fig. 3. I d
E Ib
I3
I2 Ic
Ie
E
1 I2
V
I3
Ic
1 1
Ia
Ia
If
1 + 0
5V
Id
+
If
1
1 Ib
Ie
I1 I1
Fig. 2.
1
+
E 5V
Fig. 3.
Method I : Formation of mesh basis equation by applying KVL In this method, the mesh equations are formed using Kirchhoff’s Voltage Law.
I2
+
+
E +
E
I1
E + I1
I1 E
+
I3
2
I1
The voltage rise and fall are determined by tracing the circuit in the direction of the mesh current. With reference to Fig. 4, the mesh equation for mesh1 is formed as shown below:
I
E
The mesh equation for a mesh is formed by equating the sum of voltage fall to the sum of voltage rise.
I3
+ 5V E
Fig. 4.
Voltage fall : I1, I1, I1 Voltage rise : I2, I3 , 5 ∴ I1 + I1 + I1 = I2 + I3 + 5 .....(1)
I2
With reference to Fig. 5, the mesh equation for mesh2 is formed as shown below: + +
5
V
Voltage fall : I2, I2, I2
E
Voltage rise : I1, I3 , 5
I2
+
∴ I2 + I2 + I2 = I1 + I3 + 5 −I1 + 3I2 − I3 = 5
E
3I1 − I2 − I3 = 5
I1
..... (2)
E
I2 +
+ E I2 I3 E +
I1 E
Fig. 5.
I3
Circuit Analysis
1. 46
+
With reference to Fig. 6, the mesh equation for mesh3 is formed as shown below: I3, I3, I3
I3
E E
+ E
Voltage rise : I1, I2 , 10
I2
I2
10 V
+
Voltage fall :
I3 I 3 + I3 E
E +
∴ I3 + I3 + I3 = I1 + I2 + 10
E
−I1 − I2 + 3I3 = 10
+
I1 I1
..... (3)
Fig. 6.
Equations (1), (2) and (3) are the mesh equations of the circuit shown in Fig. 3. The mesh equations are summarised here for convenience. 3I1 − I2 − I3 = 5 −I1 + 3I2 − I3 = 5 −I1 − I2 + 3I3 = 10 The mesh equations can be arranged in the matrix form as shown below and then solved by Cramer’s rule. 3 − 1 − 1 I1 5 3 − 1 H >I 2 H = > 5 H 10 − 1 − 1 3 I3
>− 1
..... (4)
Method II : Formation of mesh basis equation by inspection In this method, the mesh basis matrix equation is formed directly from the circuit shown in Fig.3 by inspection. The circuit has three meshes. The general form of mesh basis matrix equation for three mesh circuit is shown in equation (5). R11 R12 R13 I1 E11 R 22 R 23 H >I 2 H = >E 22 H R31 R32 R33 I3 E33
>R21
..... (5)
The elements of the resistance matrix and source voltage matrix are formed as shown below: R11 = 1 + 1 + 1 = 3
R12 = R21 = −1
E11 = 5
R22 = 1 + 1 + 1 = 3
R13 = R31 = −1
E22 = 5
R33 = 1 + 1 + 1 = 3
R23 = R32 = −1
E33 = 10
On substituting the above terms in equation (5), we get, 3 −1 −1 I1 5 >− 1 3 − 1 H >I2 H = > 5 H I3 10 −1 −1 3
..... (6)
Solution of mesh currents It is observed that the mesh basis matrix equation obtained in method I and II are the same. In equation (6) the unknowns are I 1, I2 and I 3 . In order to solve I 1 , I 2 and I 3 , let us define four determinants ∆, ∆ 1 , ∆ 2 and ∆ 3 as shown below: 3 −1 −1 ∆ = −1 3 −1 ; −1 −1 3
∆1 =
5 −1 −1 5 3 −1 ; 10 − 1 3
3 5 −1 ∆2 = − 1 5 − 1 ; − 1 10 3
3 −1 5 ∆3 = − 1 3 5 − 1 − 1 10
The determinants are evaluated by expanding along first row and the mesh currents are solved by Cramer’s rule.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 47
3 −1 −1 ∆ = − 1 3 − 1 = 3 # 63 # 3 − (− 1) # (− 1) @ − (− 1) # 6 − 1 # 3 − ^− 1h # (− 1) @ −1 −1 3 + (− 1) # 6 − 1 # ^− 1h − ^− 1h # 3 @ = 24 − 4 − 4 = 16 ∆1 =
5 −1 −1 5 3 − 1 = 5 # 63 # 3 − (− 1) # (− 1) @ − (− 1) # 65 # 3 − 10 # (− 1) @ + (− 1) # 65 # ^− 1h − 10 # 3 @ 10 − 1 3 = 40 + 25 + 35 = 100
3 5 −1 ∆2 = − 1 5 − 1 = 3 # 65 # 3 − 10 # (− 1) @ − 5 # 6 − 1 # 3 − (− 1) # (− 1) @ + (− 1) # 6 − 1 # 10 − ^− 1h # 5 @ − 1 10 3 = 75 + 20 + 5 = 100 3 −1 5 ∆3 = − 1 3 5 = 3 # 63 # 10 − (− 1) # 5 @ − (− 1) # 6 − 1 # 10 − (− 1) # 5 @ + 5 # 6 − 1 # (− 1) − (− 1) # 3 @ − 1 − 1 10 = 105 − 5 + 20 = 120 I1 =
∆1 = 100 = 6.25 A 16 ∆
I2 =
∆2 = 100 = 6.25 A 16 ∆
I3 =
∆3 = 120 = 7.5 A 16 ∆
The relation between mesh and branch currents can be obtained from Fig. 3 and branch currents are evaluated as shown below: Ia = I1 = 6.25 A Ib = I2 = 6.25 A Ic = I1 − I2 = 6.25 − 6.25 = 0 Id = I3 = 7.5 A Ie = I1 − I3 = 6.25 − 7.5 = −1.25 A If = I2 − I3 = 6.25 − 7.5 = −1.25 A
EXAMPLE 1.14
(AU Dec’14, 16 Marks)
In the circuit shown in Fig.1, find (a) mesh currents in the circuit, (b) current supplied by the battery and (c) potential difference between terminals B and D.
A 2
SOLUTION
+
6
10 V E
Since the given circuit has only one source, it is possible to predict the exact directions of the current. The current will start from the positive end of the supply and when it enters nodeA, it will divide into two parts. These two currents will again meet at nodeC and enter the negative end of the supply through 4 Ω resistor.
D
B 4 3
8 C
Fig. 1.
Circuit Analysis
1. 48 The circuit has three branch currents and in this two are independent. Hence, we can take two mesh currents.
2
The actual directions of mesh and branch currents are shown in Fig. 2. Using the circuit shown in Fig. 2, the mesh basis matrix equation is formed as shown below:
Ic
+ 10 V E I1
B
Ia
6
I2
D
4
R11 R12 I1 E = G = G = = 11 G R 21 R 22 I 2 E 22
..... (1)
3
8 C
The elements of the resistance matrix and source voltage matrix are formed as shown below: R11 = 2 + 4 + 3 = 9
A
Ib
R12 = R21 = 4
Fig. 2.
E 11 = 10
R22 = 4 + 6 + 8 = 18
E 22 = 10
On substituting the above terms in equation (1), we get,
=
9 4 G 4 18
I1 = G I2
=
10 = G 10
..... (2)
In equation (2), the unknowns are I 1 and I2 . In order to solve I 1 and I 2 , let us define three determinants ∆, ∆ 1 and ∆ 2 as shown below: ∆ =
9 4 ; 4 18
∆1 =
10 4 ; 10 18
∆2 =
9 10 4 10
The determinants are evaluated by expanding along first row and the mesh currents are solved by Cramer’s rule. ∆ =
9 4 = 9 # 18 − 4 # 4 = 146 4 18
∆1 =
10 4 = 10 # 18 − 10 # 4 = 140 10 18
∆2 =
9 10 = 9 # 10 − 4 # 10 = 50 4 10
I1 =
∆1 = 140 = 0.9589 A 146 ∆
I2 =
∆2 = 50 = 0.3425 A 146 ∆
b) To find the battery current With reference to Fig. 2, the battery current is given by, Ia = I1 + I2 IB
∴ Battery current, Ia = I1 + I2 = 0.9589 + 0.3425 = 1.3014 A + E
+
∴ VBD = 3 × 0.9589 − 8 × 0.3425 = 0.1367 V
3
+
I C
Fig. 3.
D
2
4
I 1 E
VBD = 3I1 − 8I2
3
E
VBD
B
+
⇒
6
10 V
The given circuit is redrawn as shown in Fig. 3. With reference to Fig. 3, using KVL , we can write, VBD + 8I2 = 3I1
I2
2
E 8
c) To find potential difference between the termianals ‘’B’’ and ‘’D’’
A I1
8
Chapter 1  Basic Circuit Analysis and Network Topology
EXAMPLE 1.15 7
Use branch currents in the network shown in Fig. 1 to find the current supplied by the 60 V source. Solve the circuit by the mesh current method.
1. 49
(AU May’15, 16 Marks)
60 V
+ E
I4
I3
I2
I1 12
6
12
SOLUTION The direction of the mesh currents are chosen to match the given branch currents as shown in Fig. 2. With reference to Fig.2, the mesh basis matrix equation is formed as shown below: R11 R12 R13 I1 >R21 R22 R23 H >I2 H = R31 R32 R33 I3
E11 >E22 H E33
Fig. 1. 7 I4 I1 60 V + E
I2
12
6
I3
12
..... (1)
Fig. 2.
Now, I4 = I1 − I2 − I3
The elements of the resistance matrix and source voltage matrix are formed as shown below: R11 = 7 + 12 = 19
R12 = R21 = – 12
E11 = 60
R22 = 12 + 12 = 24
R13 = R31 = −12
E22 = 0
R33 = 6 + 12 = 18
R23 = R32 = +12
E33 = 0
On substituting the above terms in equation (1), we get, R VR V R V S 19 − 12 − 12 W SI1 W S60 W S W S− 12 24 12 W I2 = S 0 W S WS W S W ..... (2) SS− 12 12 18 WW SSI3 WW SS 0 WW T XT X T X In equation (2), the unknowns are I1, I2 and I3. In order to solve I1, I2 and I3, let us define four determinants ∆, ∆1, ∆2 and ∆3 as shown below: 19 − 12 − 12 60 − 12 − 12 19 60 − 12 19 − 12 60 ∆ = − 12 24 12 ; ∆1 = 0 24 12 ; ∆2 = − 12 0 12 ; ∆3 = − 12 24 0 0 12 18 − 12 12 18 − 12 0 18 − 12 12 0 The determinants are evaluated by expanding along first row and the mesh currents are solved by Cramer’s rule. 19 − 12 24 12
3 = − 12 − 12
− 12 12 = 19 # 724 # 18 − 122 A − _− 12i # 7 − 12 # 18 − _− 12i # 12 A 18 + _− 12i # 7 − 12 # 12 − _− 12i # 24 A = 5472 − 864 − 1728 = 2880
31 =
60 − 12 − 12 0 24 12 = 60 # 724 # 18 − 122 A = 17280 0 12 18
Circuit Analysis
1. 50 19
60
3 2 = − 12 − 12
0 0
19 − 12 3 3 = − 12 24 12 − 12
− 12 12 = − 60 # 7 − 12 # 18 − _− 12 i # 12 A = 4320 18 60 0 = 60 # 7 − 12 # 12 − _− 12i # 24 A = 8640 0
I1 =
31 = 17280 = 6 A 2880 3
I2 =
32 = 4320 = 1.5 A 2880 3
I3 =
33 = 8640 = 3 A 2880 3
I4 = I1 − I2 − I3 = 6 − 1.5 − 3 = 1.5 A Current supplied by 60 V source = I1 = 6 A 6
2
EXAMPLE 1.16 Solve the mesh currents shown in Fig. 1.
+ 25 V E
SOLUTION The mesh currents and their direction are given in the problem and so we need not assume the currents. Using the circuit shown in Fig. 1, the mesh basis matrix equation is formed as shown below: R11 R12 R13 I1 R 22 R 23 H >I 2 H = R31 R32 R33 I3
4 I1
2
5
I2
+ 10 V E
I3
Fig. 1.
E11
>R21
>E22 H E33
..... (1)
The elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 2 + 4 = 6
R12 = R21 = −4
E11 = 25
R22 = 4 + 6 + 5 = 15
R13 = R31 = 0
E22 =
R33 = 5 + 2 = 7
R23 = R32 = −5
E33 = −10
0
On substituting the above terms in equation (1), we get, 6 −4 0 15 − 5 H 0 −5 7
>− 4
I1
>I2 H I3
=
>
25 0H − 10
..... (2)
In equation (2), the unknowns are I1, I2 and I3. In order to solve I1, I2 and I3, let us define four determinants ∆, ∆1, ∆2 and ∆3 as shown below: 6 −4 0 ∆ = − 4 15 − 5 ; 0 −5 7
∆1 =
25 − 4 0 0 15 − 5 ; − 10 − 5 7
6 25 0 ∆2 = − 4 0 −5 ; 0 − 10 7
6 − 4 25 ∆3 = − 4 15 0 0 − 5 − 10
The determinants are evaluated by expanding along first row and the mesh currents are solved by Cramer’s rule.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 51
6 −4 0 ∆ = − 4 15 − 5 = 6 # 615 # 7 − (− 5) # (− 5) @ − (− 4) # 6 − 4 # 7 − 0 @ + 0 0 −5 7 = 480 − 112 = 368
∆1 =
25 − 4 0 0 15 − 5 = 25 # 615 # 7 − (− 5) # (− 5) @ − (− 4) # 60 − (− 10) # (− 5) @ + 0 − 10 − 5 7 = 2000 − 200 = 1800
6 25 0 ∆2 = − 4 0 − 5 = 6 # 60 − (− 10) # (− 5) @ − 25 # 6 − 4 # 7 − 0 @ + 0 0 − 10 7 = −300 + 700 = 400 6 − 4 25 ∆3 = − 4 15 0 = 6 # 615 # (− 10) − 0 @ − (− 4) # 6 − 4 # (− 10) − 0 @ + 25 # 6 − 4 # (− 5) − 0 @ 0 − 5 − 10 = −900 + 160 + 500 = −240 I1 =
∆1 = 1800 = 4.8913 A 368 ∆
I2 =
∆2 = 400 = 1.0870 A 368 ∆
I3 =
∆3 = − 240 = − 0.6522 A 368 ∆
(AU June’16, 8 Marks)
EXAMPLE 1.17
4V
3
E+
In the circuit shown in Fig. 1, find I L by mesh analysis.
3
IL
3
8V
1
1 6V
Fig. 1.
E11 >E22 H E33
4V I1 3 +
E11 = 4
R22 = 3 + 5 + 1 = 9
R13 = R31 = −3
E22 = 8
R33 = 5 + 3 + 1 = 9
R23 = R32 = −5
E33 = −6
IL
3 I3 1 5 +
8V
R12 = R21 = −3
I2
1
E
The elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 3 + 3 + 3 = 9
3
E+
..... (1)
E
R11 R12 R13 I1 >R21 R22 R23 H >I2 H = R31 R32 R33 I3
5 +
Let us choose mesh currents as shown in Fig. 2. The mesh basis matrix equation is formed as shown below:
E
SOLUTION
E
+
6V
Fig. 2.
On substituting the above terms in equation (1), we get, 9 −3 −3 9 − 5H −3 −5 9
>− 3
I1
>I2 H I3
4
=
> 8H −6
..... (2)
Circuit Analysis
1. 52 Here, IL = I2 − I3.
In order to solve the mesh currents I2 and I3, let us define three determinants ∆, ∆2 and ∆3 as shown below: 9 −3 −3 ∆ = −3 9 −5 ; −3 −5 9
9 4 −3 ∆2 = − 3 8 − 5 ; −3 −6 9
9 −3 4 ∆3 = − 3 9 8 −3 −5 −6
The determinants are evaluated by expanding along first row and the mesh currents are solved by Cramer’s rule. 9 −3 −3 ∆ = − 3 9 − 5 = 9 # 69 2 − (− 5) 2 @ − (− 3) # 6 − 3 # 9 − (− 3) # (− 5) @ −3 −5 9 + (− 3) # 6 − 3 # (− 5) − (− 3) # 9 @ = 504 − 126 − 126 = 252 9 4 −3 ∆2 = − 3 8 − 5 = 9 # 68 # 9 − (− 6) # (− 5) @ − 4 # 6 − 3 # 9 − (− 3) # (− 5) @ −3 −6 9 + (− 3) # 6 − 3 # (− 6) − (− 3) # 8 @ = 378 + 168 − 126 = 420 9 −3 4 ∆3 = − 3 9 8 = 9 # 69 # (− 6) − (− 5) @ # 8] − (− 3) # 6 − 3 # (− 6) − (− 3) # 8 @ −3 −5 −6 + 4 # 6 − 3 # (− 5) − (− 3) # 9 @ = −126 + 126 + 168 = 168 IL = I 2 − I 3 =
T − T3 T2 T 3 − = 2 = 420 − 168 = 1 A 252 T T T
EXAMPLE 1.18
2
In the circuit shown in Fig. 1, find E such that I 2 = 0.
E
+ E
3
4
I1
SOLUTION In mesh analysis, when the solution of mesh current is obtained by Cramer’s rule, the mesh current I 2 is given by, I2 =
∆2 ∆
2
I2
+ E
8.4 V
5 I3
..... (1)
1
Fig. 1.
In equation (1), if I2 = 0, then ∆2 = 0. Therefore, in order to find the value of E, we can form the mesh basis matrix equation. Then form the determinant ∆2 and equate the determinant to zero. Using Fig. 1, the mesh basis matrix equation is formed by inspection as shown below: R11 R12 R13 I1 R 22 R 23 H >I 2 H = R31 R32 R33 I3
>R21
E11
>E22 H E33
..... (2)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 53
The elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 2 + 4 + 2 = 8
R12 = R21 = −4
E11 = E
R22 = 4 + 3 + 5 = 12
R13 = R31 = −2
E22 = −8.4
R33 = 2 + 5 + 1 = 8
R23 = R32 = −5
E33 = 0
On substituting the above terms in equation (2), we get, 8 −4 −2 12 − 5 H −2 −5 8
>− 4
I1
>I2 H
E
=
I3
>− 8.4 H 0
..... (3)
In equation (3) by Cramer’s rule, the unknown current I 2 is given by, 8 E −2 ∆2 , where ∆2 = − 4 − 8.4 − 5 ∆ 0 8 −2 On expanding ∆ 2 we get, I2 =
8 E −2 ∆2 = − 4 − 8.4 − 5 = 8 # 6 − 8.4 # 8 − 0 @ − E # 6 − 4 # 8 − (− 2) # (− 5) @ + (− 2) # 60 − (− 2) # (− 8.4) @ 0 8 −2 = −537.6 + 42E + 33.6 = −504 + 42E On equating ∆2 = 0, we get, − 504 + 42E = 0 ∴ 42 E = 504 E = 504 = 12 V 42
EXAMPLE 1.19
12
Solve the current in 12 Ω resistor by mesh analysis. 4
SOLUTION The mesh currents and their directions are given in the problem and so we need not assume the currents. Using the circuit shown in Fig. 1, the mesh basis matrix equation is formed as shown below: R11 R12 R13 I1 R 22 R 23 H >I 2 H = R31 R32 R33 I3
+ E
40 V
+ E
>E22 H
5 10 V
I2
I3
+ E
60 V
7
E11
>R21
I1
Fig. 1. ..... (1)
E33
The elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 12 + 4 + 5 = 21
R12 = R21 = −4
E11 = 0
R22 = 4 + 7 = 11
R13 = R31 = −5
E22 = 40 − 10 = 30 V
R33 = 7 + 5 = 12
R23 = R32 = −7
E33 = 10 − 60 = −50 V
On substituting the above terms in equation (1), we get, 21 − 4 − 5 I1 11 − 7 H >I 2 H = − 5 − 7 12 I3
>− 4
>
0 30 H − 50
..... (2)
Circuit Analysis
1. 54
The current through 12Ω resistance is I1 . To solve the current I 1 by Cramer’s rule let us define the determinants ∆ and ∆1 as shown below: 21 − 4 − 5 ∆ = − 4 11 − 7 ; − 5 − 7 12
∆1 =
0 −4 −5 30 11 − 7 − 50 − 7 12
The determinants are evaluated by expanding along first row and the mesh current I1 is solved by Cramer’s rule. 21 − 4 − 5 ∆ = − 4 11 − 7 = 21 # 611 # 12 − (− 7) # (− 7) @ − (− 4) # 6 − 4 # 12 − (− 5) # (− 7) @ − 5 − 7 12 + (− 5) # 6 − 4 # (− 7) − (− 5) # 11 @ = 1743 − 332 − 415 = 996 ∆1 =
0 −4 −5 30 11 − 7 = 0 − (− 4) # 630 # 12 − (− 50) # (− 7) @ + (− 5) # 630 # (− 7) − (− 50) # 11 @ − 50 − 7 12 = 40 − 1700 = −1660
I1 =
∆1 = − 1660 = − 1.6667 A 996 ∆
EXAMPLE 1.20
2
8
Solve the mesh currents in the circuit shown in Fig. 1.
4
SOLUTION
I1
With reference to Fig.1, the mesh basis matrix equation is formed as shown below: R11 R12 R13 I1 >R21 R22 R23 H >I2 H = R31 R32 R33 I3
+ E
10
4
10 V
I3
I2 + E
3
1
+ E
5V
8V
20 V
+ E
Fig. 1.
E11 >E22 H E33
..... (1)
Note : Here, the directions of the mesh currents are given in the problem itself . The elements of the resistance matrix and source voltage matrix are formed as shown below: R11 = 4 + 8 + 4 = 16
R12 = R21 = – 4
E11 = 10 − 5 = 5
R22 = 4 + 2 + 1 = 7
R13 = R31 = 0
E22 = 5 − 8 = −3
R33 = 1 + 10 + 3 = 14
R23 = R32 = 1
E33 = 20 − 8 = 12
On substituting the above terms in equation (1), we get, 16 − 4 0 7 1H 0 1 14
>− 4
I1
>I2 H I3
5
=
>− 3 H
..... (2)
12
In equation (2), the unknowns are I1, I2 and I3. In order to solve I1, I2 and I3, let us define four determinants ∆, ∆1, ∆2 and ∆3 as shown below: 16 − 4 0 ∆ = −4 7 1 ; 0 1 14
5 −4 0 ∆1 = − 3 7 1 ; 12 1 14
16 5 0 ∆2 = − 4 − 3 1 ; 0 12 14
16 − 4 5 ∆3 = − 4 7 − 3 0 1 12
Chapter 1  Basic Circuit Analysis and Network Topology
1. 55
The determinants are evaluated by expanding along first row and the mesh currents are solved by Cramer’s rule. 16 − 4 0 ∆ = − 4 7 1 = 16 # 67 # 14 − 1 # 1 @ − (− 4) # 6 − 4 # 14 − 0 @ + 0 0 1 14 = 1552 – 224 = 1328 5 −4 0 ∆1 = − 3 7 1 = 5 # 67 # 14 − 1 # 1 @ − (− 4) # 6 − 3 # 14 − 12 # 1 @ + 0 12 1 14 = 485 – 216 = 269 16 5 0 ∆2 = − 4 − 3 1 = 16 # 6 − 3 # 14 − 12 # 1 @ − 5 # 6 − 4 # 14 − 0 @ + 0 0 12 14 = –864 + 280 = – 584 16 − 4 5 ∆3 = − 4 7 − 3 = 16 # 67 # 12 − 1 # (− 3) @ − (− 4) # 6 − 4 # 12 − 0 @ + 5 # 6 − 4 # 1 − 0 @ 0 1 12 = 1392 – 192 –20 = 1180 I1 =
∆1 = 269 = 0.2026 A 1328 ∆
I2 =
∆2 = − 584 = − 0.4398 A 1328 ∆
I3 =
∆3 = 1180 = 0.8886 A 1328 ∆
(AU Dec’15, 8 Marks)
EXAMPLE 1.21 Determine the power dissipation in the 4 Ω resistor of the circuit shownin Fig. 1.
SOLUTION
5
2
6
+ 3
50 V E
The graph of the given circuit is shown in Fig. 2. It has five branches and three nodes. Hence, the number of meshes m in the circuit is, m = B − N + 1 = 5 − 3 + 1 = 3.
4
+ 10 V E
Fig. 1.
The circuit has five currents (corresponding to five branches) and in this three currents are independent (corresponding to three meshes). Let us assume three mesh currents I1, I2 and I3 as shown in Fig. 2. The direction of the currents are chosen arbitrarily. The circuit with chosen mesh currents is shown in Fig. 3. Now, the current through 4 Ω resistor is (I2− I3) in the direction shown in Fig. 3. b d a
I2
I3
I1
2
5 +
e c
50 V I1
I2
Fig. 2. `
4
3 E
Power dissipated in 4Ω resistor = I 2 − I3
Fig. 3. 2
I2 E I3 6
# 4
I3
+ 10 V E
Circuit Analysis
1. 56
Using the circuit shown in Fig. 3, the mesh basis matrix equation is formed as shown below: R11 R12 R13 I1 R 22 R 23 H >I 2 H = R31 R32 R33 I3
E11
>R21
>E22 H
.....(1)
E33
The elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 5 + 3 = 8
R12 = R21 = −3
E11 = 50
R22 = 3 + 2 + 4 = 9
R13 = R31 = 0
E22 =
R33 = 4 + 6 = 10
R23 = R32 = −4
E33 = −10
0
On substituting the above terms in equation (1), we get, 8 − 3 0 I1 9 − 4 H >I 2 H = 0 − 4 10 I3
>− 3
>
50 0H − 10
..... (2)
Here, we have to solve the mesh currents I2 and I3. In order to solve I2 and I3, let us define three determinants ∆, ∆2 and ∆3 as shown below: 8 −3 0 ∆ = −3 9 −4 ; 0 − 4 10
8 50 0 ∆2 = − 3 0 −4 ; 0 − 10 10
8 − 3 50 ∆3 = − 3 9 0 0 − 4 − 10
The determinants are evaluated by expanding along first row and then the currents I2 and I3 are solved by Cramer’s rule. 8 −3 0 ∆ = − 3 9 − 4 = 8 # 69 # 10 − (− 4) # (− 4) @ − (− 3) # 6 − 3 # 10 − 0 @ + 0 0 − 4 10 = 592 − 90 = 502 8 50 0 ∆2 = − 3 0 − 4 = 8 # 60 − (− 10) # (− 4) @ − 50 # 6 − 3 # 10 − 0 @ + 0 0 − 10 10 = −320 + 1500 = 1180 8 − 3 50 ∆3 = − 3 9 0 = 8 # 69 # (− 10) − 0 @ − (− 3) # 6 − 3 # (− 10) − 0 @ + 50 # 6 − 3 # (− 4) − 0 @ 0 − 4 − 10 = −720 + 90 + 600 = −30 I2 =
∆2 = 1180 = 2.3506 A 502 ∆
I3 =
∆3 = − 30 = − 0.0598 A 502 ∆
`
Power dissipated in 4 Ω resistor = I 2 − I3
2
= 2.4104
# 4 = 2.3506 − (− 0.0598) 2
2
#4
# 4 = 2.41042 # 4 = 23.2401W
Chapter 1  Basic Circuit Analysis and Network Topology
1. 57
EXAMPLE 1.22
6 2
Determine the voltage E which causes the current I1 to be zero for the circuit shown in Fig. 1.
6
I2 20 V
+ E
I1 1
SOLUTION
5 4
I3 E
In mesh analysis, when the solution of mesh currents is obtained by Cramer’s rule, the mesh current I 1 is given by,
+ E
Fig. 1.
∆ I1 = 1 ∆
..... (1)
In equation (1), if I1 = 0, then ∆1 = 0. In order to find the value of E, we can form the mesh basis matrix equation. Then form the determinant ∆1 and equate the determinant to zero. Using the circuit shown in Fig. 1, the mesh basis matrix equation is formed by inspection. R11 R12 R13 I1 R 22 R 23 H >I 2 H = R31 R32 R33 I3
E11
>R21
>E22 H
..... (2)
E33
The elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 6 + 2 + 5 = 13
R12 = R21 = −2
E11 = 20 − E
R22 = 2 + 6 + 1 = 9
R13 = R31 = −5
E22 = 0
R33 = 5 + 1 + 4 = 10
R23 = R32 = −1
E33 = E
On substituting the above terms in equation (2), we get, 13 − 2 − 5 I1 9 − 1 H >I 2 H = − 5 − 1 10 I3
>− 2
Now, ∆1 =
>
20 − E 0H E
20 − E − 2 − 5 0 9 −1 E − 1 10
..... (3)
On expanding ∆1 along column1, we get, ∆1 = (20 − E) # 69 # 10 − (− 1) # (− 1) @ − 0 + E # 6 − 2 # (− 1) − 9 # (− 5) @ = (20 − E) × 89 + 47 E = 1780 − 89 E + 47 E = 1780 − 42 E On equating ∆1 to zero, we get, 0 = 1780 − 42 E ` 42E = 1780
⇒
E = 1780 = 42.381V 42
EXAMPLE 1.23 10
5
4
For the circuit shown in Fig. 1, find (a) the power delivered to 4 Ω resistor using mesh analysis and (b) to what voltage should the 80 V battery be changed
60 V
+ E
40 V
+ E
80 V
so that no power is delivered to the 4 Ω resistor?
Fig. 1.
+ E
Circuit Analysis
1. 58 SOLUTION
I2
Let us assume two mesh currents I1 and I2 as shown in Fig. 2. The direction of the currents are chosen as clockwise. Now, the current through 4 Ω resistor is I2. `
Power delivered to 4 Ω resistor = I 2
2
4
5
10
I2
I1 60 V
+ E
40 V
+ E
80 V
+ E
# 4
Fig. 2.
a) To find the power delivered to 4 Ω resistor
Using the circuit shown in Fig. 2, the mesh basis matrix equation is formed as shown below: R11 R12 I1 E = G = G = = 11 G R 21 R 22 I 2 E 22
..... (1)
The elements of resistance matrix and source voltage matrix are formed as shown below: R12 = R21 = −5
R11 = 10 + 5 = 15
E11 = 60 − 40 = 20 E22 = 40 − 80 = −40
R22 = 5 + 4 = 9 On substituting the above terms in equation (1), we get, 15 − 5 I1 20 = G = G = = G − 5 9 I2 − 40 Let us solve I2 by Cramer’s rule. Now, I 2 =
∆2 ∆ where,
∆ =
15 − 5 = 15 # 9 − (− 5) # (− 5) = 110 −5 9
∆2 = ` `
I2 =
15 20 = 15 # (− 40) − (− 5) # 20 = − 500 − 5 − 40
∆2 = − 500 = − 4.5455 A ∆ 110 # 4 = − 4.5455 2 # 4 = 4.54552 # 4 = 82.6463 W
Power delivered to 4 Ω resistor = I 2
2
b) To find the change in voltage in 80 V source such that power delivered to 4 Ω resistor is zero Let us take the new value of 80 V source as E. Now in equation (1), E22 is given by, E22 = 40 − E. Equation (1) for case (b) is given below:
=
15 − 5 I1 20 G = G = = G 40 − E − 5 9 I2
..... (2)
In equation (2), by Cramer’s rule, I2 is given by I2 = ∆2 / ∆. If power delivered to 4 Ω is zero then I2 should be zero. For I2 to be zero, the determinant ∆2 should be zero. Now, ∆2 =
15 20 = 15 # (40 − E) − (− 5) # 20 − 5 40 − E = 600 – 15E + 100 = 700 – 15E
On equating ∆2 to zero, we get, 0 = 700 − 15 E
Chapter 1  Basic Circuit Analysis and Network Topology
1. 59
15 E = 700 E = 700 = 46.6667 V 15 ∴ The value of 80 V should be reduced to 46.6667 V to make the power delivered to 4 Ω resistor as zero.
EXAMPLE 1.24 +
In the circuit shown in Fig. 1, find the current I by mesh method and the power supplied by each battery to the 1.25 Ω resistor.
5
I
10 V
15 1.25
E
+ 20 V E
Fig. 1.
SOLUTION Let us assume two mesh currents as shown in Fig. 2. Now the current I is given by the sum of I1 and I2. Using the circuit shown in Fig. 1, the mesh basis matrix equation is formed as shown below:
+ 10 V E
5 I1
15
I
1.25
+ 20 V E
I2
Fig. 2.
R11 R12 I1 E = G = G = = 11 G R 21 R 22 I 2 E 22
.....(1)
The elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 5 + 1.25 = 6.25
R12 = R21 = 1.25
R22 = 15 + 1.25 = 16.25
E11 = 10 E22 = 20
On substituting the above terms in equation (1), we get,
=
6.25 1.25 G 1.25 16.25
I1 = G I2
=
10 = G 20
..... (2)
In equation (2), the unknowns are I1 and I2. In order to solve I1 and I2, let us define three determinants ∆, ∆1 and ∆2 as shown below and the mesh currents are solved by Cramer’s rule. ∆ =
6.25 1.25 = 6.25 # 16.25 − 1.25 # 1.25 = 100 1.25 16.25
∆1 =
10 1.25 = 10 # 16.25 − 20 # 1.25 = 137.5 20 16.25
∆2 =
6.25 10 = 6.25 # 20 − 1.25 # 10 = 112.5 1.25 20
I1 =
∆1 = 137.5 = 1.375 A 100 ∆
I2 =
∆2 = 112.5 = 1.125 A 100 ∆
∴ I = I1 + I2 = 1.375 + 1.125 = 2.5 A Let P10 and P20 be the power delivered by 10 V and 20 V sources. Now, P10 = 10 × I1 = 10 × 1.375 = 13.75 W P20 = 20 × I2 = 20 × 1.125 = 22.5 W
Circuit Analysis
1. 60
Let P5 and P15 be the power consumed by 5 Ω and 15 Ω resistances, respectively. 2
Now, P5 = I12 × 5 = 1.375 × 5 = 9.4531 W 2
P15 = I22 × 15 = 1.125 × 15 = 18.9844 W Let PL10 and PL20 be the power delivered to load (i.e., to 1.25 Ω resistor) by the 10 V and 20 V sources, respectively. Now, PL10 = P10 − P5 = 13.75 − 9.4531 = 4.2969 W PL20 = P20 − P15 = 22.5 − 18.9844 = 3.5156 W
CrossCheck Power consumed by 1.25 Ω resistance, PL = I2 × 1.25 = 2.52 × 1.25 = 7.8125 W Also, PL = PL10 + PL20 = 4.2969 + 3.5156 = 7.8125 W
EXAMPLE 1.25
(AU June’16, 16 Marks)
3
In the circuit shown in Fig. 1, find voltage across 5 Ω resistor using source transformation technique and verify the results using mesh analysis.
+
VL
7
+ E
E
6
4
+
42 V
57 V
5
E
4V E
+
E
25 V
SOLUTION
+
70 V
+
Method 1: Source Transformation Technique
E
Fig. 1.
Let, VL = Voltage across 5Ω resistor. The voltage sources in Fig. 2 are converted into current sources as shown in Fig. 3. 57 V
5W
3W
5 W +57V 
7W
+ 

+
6W
4W 
4V
42 V
+

+
+
25 V
70 V
+
Þ
42 A 3
3W
25 A 4
VL

4 W 70 A 6
+
42 A 3
25 A 4
3W
The current sources in Fig. 5 are converted into voltage sources as shown in Fig. 6.
+
VL
93 12 ´ 12 7 + 93 V = 7
4W
+ +
466
42
´ + 13  42 =
Fig. 6.
70 A 6
4 A 7
466 V 13
Ü
42 25 3 4 16875 93 A = = 12 12

6W
57V
5W

42 W 13
VL
+ 
Fig. 4. ß
57V 
7W
57V
5W
12 W 7
7W
Fig. 3. ß
The parallel current sources in Fig. 4 are converted into a single equivalent current source in Fig. 5. Similarly, the parallel resistances in Fig. 4 are converted into a single equivalent resistance in Fig. 5.
+
4 A 7

Fig. 2.
5W
6W
3´4 3+4 12 = W 7
VL


6´7 6+ 7 =
Fig. 5.
42 W 13
70 4 6 7 49024 466 A = = 42 42
Chapter 1  Basic Circuit Analysis and Network Topology
1. 61
The circuit of Fig. 6 is redrawn as shown in Fig. 7. With reference to Fig. 7 by voltage division rule, we can write, 5W
5 VL = − 7240 # 91 5 + 450 91 7240 5 =− # 91 5 # 91 + 450 91 = − 7240 # 5 = − 40 V 5 # 91 + 450
+
93 466  57 7 13 + 1209  3262  5187 = 7´13 7240 =V 91
Method 2: Mesh Analysis
Fig. 7.
Now, VL = 5I2
E
57 V
5
Let, VL = Voltage across 5Ω resistor.
VL
+ E
I1
E
25 V
6 I2
+
70 V
+
For the circuit of Fig. 8, the mesh basis matrix equation is formed as shown below: R11 R12 R13 I1 R 22 R 23 H >I 2 H = R31 R32 R33 I3
>R21
7
E
4
+
12 42 + 7 13 156 + 294 7´13 450 = W 91
+
42 V

=
3
Let us choose mesh currents as shown in Fig. 8.
VL
E
I3 4V+
E
Fig. 8.
E11
>E22 H E33
..... (1)
The elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 3 + 4 = 7
R12 = R21 = −4
E11 = 42 + 25 = 67
R22 = 4 + 5 + 6 = 15
R13 = R31 = 0
E22 = −25 − 57 − 70 = −152
R33 = 6 + 7 = 13
R23 = R32 = −6
E33 = 70 + 4 = 74
On substituting the above terms in equation (1), we get, 7 −4 0 15 − 6 H 0 − 6 13
>− 4
I1
>I2 H I3
67
=
>− 152 H
..... (2)
74
In order to solve I2 by Cramer’s rule, let us define two determinant ∆ and ∆2 as shown below: 7 −4 0 ∆ = − 4 15 − 6 ; 0 − 6 13
7 67 0 ∆2 = − 4 − 152 − 6 0 74 13
The determinants are evaluated by expanding along first row and the mesh current I2 is solved by Cramer’s rule. 7 −4 0 ∆ = − 4 15 − 6 = 7 # 615 # 13 − (− 6) 2 @ − (− 4) # 6 − 4 # 13 − 0 @ + 0 = 1113 − 208 = 905 0 − 6 13 7 67 0 ∆2 = − 4 − 152 − 6 = 7 # 6 − 152 # 13 − 74 # (− 6) @ − 67 # 6 − 4 # 13 − 0 @ + 0 = −10724 + 3484 = −7240 0 74 13 ` I2 =
T2 = − 7240 = − 8 T 905
` VL = 5I 2 = 5 # (− 8) = − 40 V
Circuit Analysis
1. 62
1.5.2 Mesh Analysis of Circuits Excited by Both Voltage and Current Sources The mesh analysis can be extended to circuits excited by both voltage and current sources. In such circuits if each current source has a parallel impedance then it can be converted into an equivalent voltage source with series impedance. After conversion, the circuit will have only voltage sources and so the procedure for obtaining mesh basis matrix equation by inspection and its solution discussed in Sections 1.5.1 and 1.5.4 can be directly applied to these circuits. In certain circuits excited by both voltage and current sources, the current source may not have a parallel resistance. In this situation the current source cannot be converted into a voltage source. In this case the value of each current source is related to mesh currents and one of the mesh currents can be expressed in terms of the source current and other mesh currents. The remaining mesh currents can be solved by writing Kirchhoff’s Voltage Law (KVL) equations. Alternatively, the mesh basis matrix equation can be formed directly by inspection, by taking the voltage of the current sources as unknown and relating the value of each current source to mesh currents. Here, for each current source, one mesh current is eliminated by expressing the mesh current in terms of the source current and other mesh currents. While forming the mesh basis matrix equation, the voltage of current sources should be entered in the source matrix. Now in the matrix equation, some mesh currents will be eliminated and an equal number of unknown source voltages will be introduced. Thus, the number of unknowns will remain the same as the number of meshes m. On multiplying the mesh basis matrix equation, we get m equations which can be solved to give a unique solution for unknown currents.
1.5.3 Supermesh Analysis In circuits excited by both voltage and current sources, if a current source lies common to two meshes then the common current source can be removed for analysis purpose and the resultant two meshes can be considered as one single mesh called supermesh. In order to solve the two mesh currents of a supermesh, two equations are required. One of the equations is the KVL equation of the supermesh and the other equation is obtained by equating the source current to the sum or difference of the mesh currents (depending on the direction of the mesh currents). An example of formation of supermesh is shown in Fig. 1.41. Also, Example 1.27 is solved using the supermesh analysis technique. 5W
2W +

+ 5I2
2I1 +
10 V 
Mesh1 I1  6I1 +
Mesh2 + 3I2 
4A
5W
2W +


+
2I1 3W
I2
6W
Fig. a : Two mesh circuit with mesh currents in same orientation.
Þ
+
10 V 
Supermesh
5I2 + 3I2 
3W
Supermesh equations 2I1 + 5I2 + 3I2 + 6I1 = 10
 6I1 + 6W
Fig. b : Supermesh of circuit shown in Fig. a and its equations.
I1  I2 = 4
Chapter 1  Basic Circuit Analysis and Network Topology 5W
2W + +
10 V 
+
5I2
2I1 I1
_ 3W
Þ
+


5I2
2I1
I2 3I2 +
4A
5W
2W +


1. 63
_
+
10 V 
 6I1 +
Supermesh
3W
3I2 +
Supermesh equations 2I1 + 6I1 = 5I2 + 3I2 + 10 I1 + I 2 = 4
 6I1 +
6W
6W
Fig. c : Two mesh circuit with mesh currents in opposite orientation.
Fig. d : Supermesh of circuit shown in Fig. c and its equations.
Fig. 1.41 : Examples of formation of supermesh. A
EXAMPLE 1.26
5
4
Find the voltage between A and B of the circuit shown in Fig. 1 using mesh analysis.
4
10 A
4 1 E 10 V +
B
SOLUTION
+ 20 V E
Fig. 1.
The graph of the given circuit is shown in Fig. 2. It has five branches and three nodes. Hence, the number of meshes m in the circuit is m = B − N + 1 = 5 − 3 + 1 = 3. The circuit has five currents (corresponding to five branches) and in this three currents are independent (corresponding to three meshes). Let us assume three mesh currents as shown in Figs 2 and 3. A
c 5
4 b a
I2
+
d I3
I1
e
10 A
4
E1 E
I1
Fig. 2.
I2 B
4 E
1 E
20 V
I3 +
10 V +
Fig. 3.
The directions of mesh currents are chosen arbitrarily. Here, one of the mesh has 10 A current source which cannot be converted into a voltage source because the source does not have parallel impedance. Hence, we can take this current as a known mesh current, but the voltage across the source E 1 is unknown. Therefore, the number of unknowns remain as three (i.e., unknowns are E1, I 2 and I3) and so we can write three mesh equations using KVL (corresponding to three meshes) and a unique solution is obtained by solving the three equations. The mesh equations can be obtained by two methods. Note : While solving simultaneous equations a unique solution can be obtained only if the number of unknowns are equal to the number of equations.
Method I : Formation of mesh equations by applying KVL In this method the mesh equations are formed using Kirchhoff’s Voltage Law. The mesh equation for a mesh is formed by equating the sum of voltage fall to the sum of voltage rise. The voltage rise and fall are determined by tracing the circuit in the direction of the mesh current.
Circuit Analysis
1. 64
With reference to Fig. 4, the mesh equation for mesh2 is formed as shown below: Voltage fall : 4 I 2 , 5I 2 , I 2
+ 4I1
Voltage rise : 4I1, I3, 10 V I1
∴ 4 I 2 + 5I 2 + I 2 = 4I1 + I 3 + 10 − 4I1 + 10I 2 − I3 = 10 − 4 # 10 + 10I2 − I3 = 10
⇒
5I2
+ E
E
4I2 I2
E +
I1 = 10A
+ E I2 I3 I3 E + E 10 V +
Fig. 4.
10I2 − I3 = 50
..... (1)
With reference to Fig. 5, the mesh equation for mesh3 is formed as shown below: +
+ E
Voltage fall : I3, 4I3, 10 V
I2
Voltage rise : I2, 20 V
I2
∴ I3 + 4I3 + 10 = I2 + 20 ⇒ − I2 + 5I3 = 10
..... (2)
4I3
E
I3
E
E + E 10 V +
20 V
I3 +
Fig. 5.
Mesh equations (1) and (2) are sufficient for solving I2 and I3.
Method II : Formation of mesh equations by inspection In this method the mesh basis matrix equation is formed by inspection using the circuit shown in Fig. 3. R11 R12 R13 I1 R 22 R 23 H >I 2 H = R31 R32 R33 I3
>R21
E11
>E22 H
..... (3)
E33
R 11 = 4 + 4 = 8
R 12 = R 21 = − 4
E 11 = E 1
R 22 = 4 + 5 + 1 = 10
R 13 = R 31 = 0
E 22 = 10
R 33 = 1 + 4 = 5
R 23 = R 32 = − 1
E 33 = − 10 + 20 = 10
I1 = 10
On substituting the above terms in equation (3), we get, 8 − 4 0 10 10 − 1 H > I 2 H = 0 −1 5 I3
>− 4
E1
>10 H
..... (4)
10
On multiplying the matrices on lefthand side of equation (4), and equating to terms on righthand side, we get the following equations: From row  2,
−40 + 10I2 − I3 = 10
From row  3,
−I2 + 5I3 = 10
⇒
10I2 − I3 = 50
..... (5) ..... (6)
Solution of mesh currents It is observed that the mesh equations obtained by both the methods are the same. From equation (5), we get, I3 = 10I2 – 50
..... (7)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 65
On substituting for I3 from equation (7) in equation (6), we get, – I 2 + 5(10 I 2 – 50) = 10
⇒
49I 2 − 250 = 10
I2 = 260 = 5.3061 A 49
`
I3 = 10I2 − 50 = 10 × 5.3061 − 50 = 3.061 A
To find voltage across A and B Let us denote the meeting point of 4 Ω and 5 Ω as nodeC and the meeting point of 1 Ω and 10 V source as nodeD as shown in Fig. 6. There are two short paths to find the voltage across A and B. They are closed path ABCA and ABDA. Let voltage across A and B be denoted as VAB. With reference to Fig. 6, in pathABCA by KVL we can write,
C
+
5I2
A
E +
VAB + 4I2 + 5I2 = 4I1
+ E
+ E 4I1
E +
In pathABDA by KVL we can write,
I3
E + E D
AB
I1
I2
4I2
V
∴ VAB = 4I1 − 9I2 = 4 × 10 − 9 × 5.3061 = −7.7549 V
I2
10 V
E
+
B
VAB + 10 + I3 = I2
Fig. 6.
∴ VAB = I2 − I3 − 10 = 5.3061 − 3.061 − 10 = −7.7549 V
EXAMPLE 1.27
3
5
2
In the circuit shown in Fig. 1, find the current supplied by the voltage source and the voltage across the current source by mesh analysis.
+ 10 V
10 A
4
4
E
SOLUTION
Let us assume three mesh currents as shown in Fig. 2. Fig. 1. The current delivered by the voltage source is I 1 . Let the voltage across the current source be E with current leaving point as positive. Also, the voltage across various elements of the circuit are shown in Fig. 2. 2 + I1 + 10 V _
2I1
3
5 E
+
+
E 5I2
2
E
+
3I3
_ + Mesh3 + Mesh1 + Mesh2 4I1 4I2 4I3 4 E _ + _ 10 A _ I2 I1 I3
Fig. 2.
2I1
+ 10 V _
3
5 E
+
+ _ 4I1 4I2 _ + Mesh1
E
+
5I2
E 3I3
Supermesh
+ 4I3 4 _
Fig. 3.
With reference to Fig. 2, the relation between mesh currents I2 and I3 is I 3 – I 2 = 10
⇒
I 3 = 10 + I 2
..... (1)
Let us combine mesh2 and mesh3 and form a supermesh as shown in Fig. 3. The KVL equation for the supermesh is formed as shown ahead:
Circuit Analysis
1. 66 ⇒ 4 I1 = 9I2+ 7I3
4 I2 + 5I2 + 3 I 3 + 4 I 3 = 4 I 1 ∴ 4 I1 = 9I2+ 7(10 + I2)
Using equation (1)
∴ 4 I1 = 16I2 + 70
⇒ 16I2 = 4I1 – 70
` I 2 = 4 I1 − 70 16 16
⇒
..... (2)
I 2 = 0.25I1 − 4.375
The KVL equation for the mesh1 is formed as shown below: 2I1 + 4I1 = 10 + 4I2 ∴ 6I1 = 10 + 4(0.25I1 – 4.375)
⇒
` 6I1 = 10 + I1 − 17.5
Using equation (2)
5I1 = − 7.5
I1 = − 7.5 − 1.5 A 5
⇒
∴ I2 = 0.25I1 – 4.375 = 0.25(– 1. 5) – 4.375 = –4.75 A ∴ I3 = 10 + I2 = 10 – 4.75 = 5.25 A With reference to Fig. 2 by KVL, E = 3I3 + 4I3 = 7I3 = 7 × 5.25 = 36.75 V ∴ Current supplied by the voltage source, I1 = –1.5 A Voltage across the current source, E = 36.75 V
EXAMPLE 1.28
(AU June’14, 8 Marks)
Find the current in each branch of the circuit shown in Fig 1.
3
1
SOLUTION +
Let us assume the four branch currents are Ia, Ib, Ic and Id as shown in Fig. 2. The current source of Fig.2 can be represented by an equivalent voltage source of value 50 V with a source resistance of 10 Ω in series as shown in Fig. 3. Let us assume two mesh currents I1 and I2 as shown in Fig. 3. Ia 3 W Ib 5A
Id
10 V 
Þ
10 V
5
Fig. 1. 1W
10 W
+
5W
10
E
3W
Ic 1 W
10 W
5A
+
5 ´ 10 + = 50 V 
5W
I1
I2
10 V 
Fig. 3.
Fig. 2.
Using the circuit shown in Fig. 3, the mesh basis matrix equation is formed as shown below : R11 R12 I1 E = G = G = = 11 G R 21 R 22 I 2 E 22
..... (1)
The elements of the resistance matrix and source voltage matrix are formed as shown below: R11 = 10 + 3 + 5 = 18 R22 = 5 +1 = 6
R12 = R21 = − 5
E 11 = 50 E 22 = − 10
Chapter 1  Basic Circuit Analysis and Network Topology
1. 67
On substituting the above terms in equation (1), we get,
>
18 −5
I1 50 −5 H > H = > H I2 6 − 10
.....(2)
In equation (2), the unknowns are I 1 and I2 . In order to solve I 1 and I 2 , let us define three determinants ∆, ∆ 1 and ∆ 2 as shown below: ∆ =
18 − 5 ; −5 6
∆1 =
50 − 5 ; − 10 6
18 50 − 5 − 10
∆2 =
The determinants are evaluated as shown below and the mesh currents are solved by Cramer’s rule. 3 = 18 −5 31 =
32 =
− 5 = 18 6 − _− 5 i2 = 108 − 25 = 83 # 6 50
− 10
− 5 = 50 6 − − 10 − 5 = 300 − 50 = 250 _ # # i 6
18 −5
50 = 18 _− 10 i − − 5 50 = − 180 + 250 = 70 _ # # i
− 10
I1 =
31 = 250 = 3.012 A 83 3
I2 =
32 = 70 = 0.8434 A 83 3
The branch currents are, Ia = I1 = 3.012 A Ib = 5  Ia = 5 − 3.012 A = 1.988 A Ic = I2 = 0.8434 A Id = I1 − I2 = 3.012 − 0.8434 = 2.1686 A
EXAMPLE 1.29
(AU June’14, 8 Marks)
+
Determine the current in each mesh of the circuit shown in Fig. 1.
E
3
10 A
10 V
2
SOLUTION Let, voltage across 10 A curret source be VS and I1 , I2 and I3 be mesh currets as shown in Fig. 2. Here I1 = 10 A.
Fig. 1.
Using the circuit shown in Fig. 2, the mesh basis matrix equation is formed as shown below:
+
+ 10 A
R11 R12 R13 I1 >R21 R22 R23 H >I2 H = R31 R32 R33 I3
E11 >E22 H E33
1
VS E
E
I1
..... (1)
3
I2
10 V
2 I3
Fig. 2.
The elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 3
R12 = R21 = −3
R22 = 3 + 2 = 15
R13 = R31 = 0
E22 = −10
R33 = 2 + 1 = 7
R23 = R32 = −2
E33 = 10
E11 = VS I1 = 10 A
1
Circuit Analysis
1. 68 On substituting the above terms in equation (1), we get, R 3 −3 0 VW RS10 VW R Vs V S S W S− 3 5 − 2 W S I2 W = S− 10 W S W S W S W S 0 −2 3 W S I3 W T 10 X T X T X From row2, we get,
.....(2)
−30 + 5I2 − 2I3 = −10 ∴ 5I2 − 2I3 = 20
.....(1)
From row3, we get, − 2I2 + 3I3 = 10 Equation (1) × 3 Equation (2) × 2
.....(2)
⇒ 15I2 − 6I3 = 60 ⇒ − 4I2 + 6I3 = 20 Add
11I2
= 80
` I 2 = 80 = 7.2727 A 11 10 + 2 I 2 From equation (2), I3 = = 10 + 2 # 7.2727 = 8.1818 A 3 3 The mesh currents I1 , I2, and I3 are given by, I1 = 10 A I2 = 7.2727 A I3 = 8.1818 A
1.5.4 Mesh Analysis of Circuits Excited by AC Sources (Mesh Analysis of Reactive Circuits) The reactive circuits consist of resistances, inductive and capacitive reactances. Therefore, the voltage and current of reactive circuits are complex (i.e., they have both real and imaginary components). In general, the elements of these circuits are referred to as impedances. The general mesh basis matrix equation for reactive circuit is ZI=E ..... (1.26) where, Z = Impedance matrix of order m × m I = Mesh current matrix of order m × 1 E = Source voltage matrix of order m × 1 m = Number of meshes. Equation (1.26) can be expanded as shown in equation (1.27). R V R V R V S Z11 Z12 Z13 g Z1m W S I1 W S E11 W S Z 21 Z 22 Z 23 g Z 2m W S I 2 W S E 22 W S W S W S W S Z31 Z32 Z33 g Z3m W S I3 W = S E33 W S h S h W h h h W Sh W SS W S W SS W Z m1 Z m2 Z m3 g Z mm W SI m W E mm W T X T X T X
..... (1.27)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 69
Note : The over bar is used to denote complex quantities. The formation of the mesh basis matrix equation and the solution of mesh and branch currents are similar to that of resistive circuits except that the solution of currents involves complex arithmetic. Therefore, the kth mesh current of a reactive circuit with m meshes is given by, Ik = 1 ∆
m
/∆
jk E jj
..... (1.28)
j =1
where, ∆ jk = Cofactor of Z jk th
E jj = Sum of voltage sources in j mesh
∆ = Determinant of impedance matrix. Note : Refer equation (1.23). Instead of using the above equation for solution of mesh currents, a shortcut for Cramer’s rule can be followed. Consider the mesh basis matrix equation for a three mesh circuit consisting of reactive elements. Z11 Z12 Z13 I1 E11 >Z21 Z22 Z23 H >I2 H = >E22 H Z31 Z32 Z33 I3 E33 Let us define the four determinants as Z11 Z12 Z13 E11 Z12 Z13 Z11 E11 Z13 Z11 Z12 E11 ∆ = Z 21 Z 22 Z 23 ; ∆1 = E 22 Z 22 Z 23 ; ∆2 = Z 21 E 22 Z 23 ; ∆3 = Z 21 Z 22 E 22 Z31 Z32 Z33 E33 Z32 Z33 Z31 E33 Z33 Z31 Z32 E33
Here,
∆ = Determinant of impedance matrix ∆1 = Determinant of impedance matrix after replacing the first column of impedance matrix by source voltage column matrix ∆2 = Determinant of impedance matrix after replacing the second column of impedance matrix by source voltage column matrix
∆3 = Determinant of impedance matrix after replacing the third column of impedance matrix by source voltage column matrix. Now mesh currents I1, I2 and I3 are given by, ∆1 ∆ ∆ I2 = 2 ∆ I1 =
I3 =
∆3 ∆
Circuit Analysis
1. 70
EXAMPLE 1.30
(AU Dec’16, 12 Marks)
j2 W
In the circuit shown in Fig. 1, find I 2 and voltage drop across 1 Ω resistor.
j8 W
1W +
SOLUTION
o
8Ð20 V
With reference to Fig. 1, the mesh basis matrix equation is formed by inspection as
=
Z11 Z12 I1 E11 G = G = = G Z 21 Z 22 I 2 E 22
~
4W
I1

I2
j6 W

~
+
10Ð0oV
Fig. 1.
..... (1)
o o E11 = 8∠20 + 10∠0 = 7.5175 + j2.7362 + 10
Z11 = 1 + j2 − j8 + 4 = 5 − j6 Z12 = Z 21 = − (−j8 + 4) = − 4 + j8
= 17.5175 + j2.7362 o E 22 = −10∠0 = −10
Z 22 = 4 − j8 + j6 = 4 − j2
On substituting the above terms in equation (1), we get,
=
5 − j6 − 4 + j8 G − 4 + j8 4 − j2
17.5175 + j2.7362 I1 = G = = G − 10 I2
..... (2)
To solve the unknowns (i.e., mesh currents) of equation (2) by Cramer’s rule, we can define three determinants ∆, ∆1 and ∆2 as shown below: ∆ =
5 − j6 − 4 + j8 − 4 + j8 4 − j2 5 − j6 − 4 + j8
∆2 =
;
∆1 =
17.5175 + j2.7362 − 4 + j8 4 − j2 − 10
17.5175 + j2.7362 − 10
The determinants are evaluated by expanding along first row and the mesh currents are solved by Cramer’s rule. ∆ =
5 − j6 − 4 + j8 − 4 + j8 4 − j2
= (5 − j6) # (4 − j2) − (− 4 + j8) 2 = 56 + j30
∆1 =
17.5175 + j2.7362 − 4 + j8 4 − j2 − 10
= [(17.5175 + j2.7362) # (4 − j2)] − [(− 10) # (− 4 + j8)] = 35.5424 + j55.9098
∆2 =
5 − j6 − 4 + j8
17.5175 + j2.7362 − 10
= (5 − j6) # (− 10) − (− 4 + j8) # (17.5175 + j2.7362) = 41.9596 − j69.1952
I1 =
35.5424 + j55.9098 ∆1 = 0.9087 + j0.5116 = 1.0428+29.4 o A = ∆ 56 + j30
I2 =
41.9596 − j69.1952 ∆2 = 0.0679 − j1.272 = 1.2738+ − 86.9 o A = 56 + j30 ∆
Let, V1 = Voltage drop across 1Ω resistor. Now, V1 = I1 × 1 = I1 = 1.0428+29.4 o V
Chapter 1  Basic Circuit Analysis and Network Topology
1. 71
EXAMPLE 1.31 Solve the currents in various branches of the circuit shown in Fig. 1 using mesh analysis.
j5 W
5W
4W
+ 100Ð0oV 
4W j2 W
2W
~
2W
SOLUTION Fig. 1. The graph of the given circuit is shown in Fig. 2. It has five branches and three nodes. Hence, the number of meshes m in the circuit is m = B − N + 1 = 5 − 3 + 1 = 3.
Ib Ia
The circuit has five currents (corresponding to five branches) and in this three currents are independent (corresponding to three meshes).
b
Ic
c
a
I2
Id
d I3
I1
Let us assume the mesh currents I1, I 2 and I3 and the branch currents Ia, Ib, Ic, Id and Ie as shown in Figs 2 and 3. The directions of the currents are chosen arbitrarily. With reference to Fig. 3, the mesh basis matrix equation is formed as shown below: Z11 Z12 Z13 >Z21 Z22 Z23 H Z31 Z32 Z33
I1 E11 >I2 H = >E22 H I3 E33
j5 W
5W
+ o 100Ð0 V
~

..... (1)
e
Fig. 2. Ib
Ia
Ie
Ie
Ic
4W
2W
j2 W
2W
I1
Id 4 W
I2
I3
Fig. 3. Z11 = 5 + j5 + 2 = 7 + j5
Z12 = Z 21 = − 2
o E11 = 100∠0 = 100
Z 22 = 2 + 4 − j2 = 6 − j2
Z13 = Z31 = 0
E 22 = 0
Z33 = −j2 + 4 + 2 = 6 − j2
Z 23 = Z32 = − (− j2) = j2
E33 = 0
On substituting the above terms in equation (1), we get, 7 + j5 − 2 0 j2 H − 2 6 − j2 0 j2 6 − j2
>
>I2 H I1
=
I3
100 0H 0
>
..... (2)
In equation (2), the unknowns are I1, I 2 and I3 . In order to solve I1, I 2 and I3 by Cramer’s rule, let us define four determinants ∆, ∆1, ∆2 and ∆3 as shown below: ∆ =
7 + j5 0 −2 j2 ; − 2 6 − j2 0 j2 6 − j2
∆1 =
100 0 −2 0 6 − j2 j2 0 j2 6 − j2
∆2 =
7 + j5 100 0 0 j2 ; −2 0 0 6 − j2
∆3 =
7 + j5 − 2 100 0 − 2 6 − j2 0 j2 0
The determinants are evaluated by expanding along first row and the mesh currents are solved by Cramer’s rule. 7 + j5 − 2 0 ∆ = j2 = (7 + j5) # 6(6 − j2) # (6 − j2) − j2 # j2 @ − 2 6 − j2 0 j2 6 − j2 − (− 2) # 6 − 2 # (6 − j2) − 0 @ + 0 = (7 + j5) × [36 − j24] + 2 × [−12 + j4] = 348 + j20 Note : All calculations are performed using the calculator in complex mode.
Circuit Analysis
1. 72 ∆1 =
∆2 =
∆3 =
100 − 2 0 0 6 − j2 j2 = 100 # 6(6 − j2) 2 − (j2) 2 @ − (− 2) # 60 − 0 @ + 0 0 j2 6 − j2 = 100 # (36 − j24) = 3600 − j2400 7 + j5 100 0 0 j2 = (7 + j5) # 60 − 0 @ − 100 # 6 − 2 # (6 − j2) − 0 @ + 0 −2 0 0 6 − j2 = − 100 # 6 − 12 + j4 @ = 1200 − j400 7 + j5 − 2 100 0 = (7 + j5) # 60 − 0 @ − (− 2) # 60 − 0 @ + 100 # 6 − 2 # j2 − 0 @ − 2 6 − j2 0 j2 0 = 100 # (− j4) = − j400
I1 =
3600  j2400 ∆1 = 9.9157 − j7.4664 = 12.412+ − 37 o A = ∆ 348 + j20
I2 =
1200  j400 ∆2 = 3.3711 − j1.3432 = 3.629+ − 21.7 o A = ∆ 348 + j20
I3 =
− j400 ∆3 = − 0.0658 − j1.1456 = 1.147+ − 93.3 o A = 348 + j20 ∆
With reference to Fig. 3, the following relations between mesh and branch currents are obtained. Now the branch currents are evaluated using the mesh currents I1, I 2 and I3 . Ia = I1 = 12.412+ − 37 o A I b = I 2 = 3.629+ − 21.7 o A Ic = I1 − I 2 = 9.9157 − j7.4664 − (3.3711 − j1.3432) = 6.5446 − j6.1232 = 8.962+ − 43.1 o A I d = I 2 − I3 = 3.3711 − j1.3432 − (− 0.0658 − j1.1456) = 3.4369 − j0.1976 = 3.443+ − 3.3 o A I e = I3 = 1.147+ − 93.3 o A
EXAMPLE 1.32 +
In the circuit shown in Fig. 1, find the mesh currents.
o
100Ð0 V
SOLUTION
I1
With reference to Fig. 1, the mesh basis matrix equation is formed by inspection as shown below:
>Z21
Z11 Z12 Z13 Z 22 Z 23 H Z31 Z32 Z33
>I2 H I1
+
~
o
50Ð90 V

I2
I3
Fig. 1.
>E22 H E11
=
I3
Z11 = 5 + j2 Z 22 = j2 + 4 − j12
2W j12 W
j2 W
~

4W
5W
4 − j10
Z33 = −j12 + 2 = 2 − j12
..... (1)
E33
Z12 = Z 21 = − j2
o E11 = 100∠0 = 100
Z13 = Z31 = 0
E 22 = 0
Z23 = Z32 = − (− j12) = j12
o E33 = −(50∠90 ) = −j50
Chapter 1  Basic Circuit Analysis and Network Topology
1. 73
On substituting the above terms in equation (1), we get, 5 + j2 0 − j2 j12 H − j2 4 − j10 0 j12 2 − j12
>
>I2 H I1
>
=
I3
100 0H − j50
..... (2)
To solve the unknowns (i.e., mesh currents) of equation (2) by Cramer’s rule, we can define four determinants ∆, ∆1, ∆2 and ∆3 as shown below: ∆ =
5 + j2 0 − j2 j12 − j2 4 − j10 0 j12 2 − j12
;
∆1 =
100 0 − j2 0 4 − j10 j12 j12 2 − j12 − j50
∆2 =
5 + j2 100 0 0 j12 − j2 0 − j50 2 − j12
;
∆3 =
5 + j2 − j2 100 0 − j2 4 − j10 0 j12 − j50
The determinants are evaluated by expanding along the first row and the mesh currents are solved by Cramer’s rule. ∆ =
5 + j2 0 − j2 j12 = (5 + j2) # [(4 − j10) # (2 − j12) − j12 # j12] − (− j2) # 6 − j2 # (2 − j12) − 0 @ + 0 − j2 4 − j10 0 j12 2 − j12 = 296 – j276 + 8 − j48 = 304 − j324
100 0 − j2 ∆1 = 0 4 − j10 j12 = 100 # [(4 − j10) # (2 − j12) − (j12) 2] − (− j2) # 60 − (− j50) # j12 @ + 0 j12 2 − j12 − j50 = 3200 – j6800 − j1200 = 3200 − j8000
∆2 =
5 + j2 100 0 0 j12 − j2 0 − j50 2 − j12
= (5 + j2) # [0 − (− j50) # j12] − 100 # [− j2 # (2 − j12) − 0] + 0 = − 3000 − j1200 + 2400 + j400 = −600 − j800
∆3 =
5 + j2 − j2 100 0 = (5 + j2) # [(4 − j10) # (− j50)] − 0] − (− j2) # [− j2 # (− j50) − 0] − j2 4 − j10 0 j12 − j50 + 100 # 6 − j2 # j12 − 0 @ = –2100 – j2000 – j200 + 2400 = 300 − j2200 I1 =
3200 − j8000 ∆1 = 18.0595 − j7.0682 = 19.393∠−21.4 o A = ∆ 304 − j324
I2 =
− 600 − j800 ∆2 = 0.3891 − j2.2169 = 2.251∠−80 o A = ∆ 304 − j324
I3 =
300 − j2200 ∆3 = = 4.0731 − j2.8958 = 4.998∠−35.4 o A ∆ 304 − j324
Circuit Analysis
1. 74
10 W
(AU May’17, 8 Marks)
EXAMPLE 1.33
Io
j8 W
j4 W
In the circuit shown in Fig. 1, find Io using mesh analysis.
o
2Ð0 A 50Ð0oV
+ 
SOLUTION
5W
j6 W
Fig. 1.
Let us assume three mesh currents I1, I 2 and I3 as shown in Fig. 2.
10 W
With reference to Fig. 2, the mesh basis matrix equation is formed by inspection as shown below:
Io
j4 W
j8 W
I2 o
2Ð0 A
Z11 Z12 Z13 >Z21 Z22 Z23 H Z31 Z32 Z33
I1 >I2 H = I3
E11 >E22 H E33
o 50Ð0 V
+ 
..... (1)
E2
5W
Z11 = 10 − j4 + 5 = 15 − j4
Z12 = Z 21 = − (− j4) = j4
E11 = 50∠0o = 50
Z 22 = j8 − j4 = j4
Z13 = Z31 = − 5
E 22 = − E 2
Z33 = 5 − j6
Z 23 = Z32 = 0
E33 = E 2
Here, I 2 = − 2+0 o = − 2

I1
+
I3
j6 W
Fig. 2.
I3 = 2+0 o = 2
and
On substituting the above terms in equation (1), we get, 15 − j4 j4 − 5 j4 j4 0 H 0 5 − j6 −5
>
>− 2 H I1
=
2
50 − > E2 H E2
.....(2)
From row1 we get (15 − j4)I1 + j4(−2) − 5(2) = 50 (15 − j4)I1 = 50 + 10 + j8 ∴ I1 =
60 + j8 = 3.6017 + j1.4938 = 3.8992+22.5 o A 15 − j4
I0 = 3.8992+22.5 o A
EXAMPLE 1.34 In the circuit shown in Fig. 1, find E 2 such that the current in (1 + j1) Ω branch is zero.
3W
~
o
30Ð0 V
6W 2W
j4 W
+
~
E2

Fig. 1.
Let us assume three mesh currents I1, I 2 and I3 as shown in by inspection as shown below:
j1 W

SOLUTION
Fig. 2. With reference to Fig. 2, the mesh basis matrix equation is formed
1W
+
3W
1W
o
j4 W
j1 W
6W
+
~

30Ð0 V I1
I2
Fig. 2.
+
~
2W I3

E2
Chapter 1  Basic Circuit Analysis and Network Topology
>Z21
Z11 Z12 Z13 Z 22 Z 23 H Z31 Z32 Z33
>I2 H I1
>E22 H
1. 75
E11
=
I3
..... (1)
E33
Z11 = 3 + j4
Z12 = Z 21 = − j4
o E11 = 30∠0 = 30
Z 22 = j4 + 1 + j1 + 2 = 3 + j5
Z13 = Z31 = 0
E 22 = 0
Z33 = 2 + 6 = 8
Z 23 = Z32 =
2
E33 = E 2
On substituting the above terms in equation (1), we get, 3 + j4 − j4 0 − j4 3 + j5 2 H 0 2 8
>
>I2 H I1
I3
30
=
> 0H
..... (2)
E2
It is given that the current through (1 + j1) Ω impedance is zero and so the mesh current I 2 is zero. When the mesh currents are solved by Cramer’s rule, I 2 is given by ∆2 / ∆. For I 2 to be zero, the determinant ∆2 should be zero. Therefore, the value of E 2 can be obtained by equating ∆2 to zero. ∆2 =
3 + j4 30 0 − j4 0 2 = (3 + j4) # 60 − 2 # E2 @ − 30 # 6 − j4 # 8 − 0 @ + 0 0 E2 8 = − E2 (6 + j8) + j960
Put ∆ 2 = 0, ∴ 0 = −E 2 ( 6 + j8 ) + j960 E 2 (6 + j8) = j960 `
E2 =
j960 = 76.8 + j57.6 = 96+36.9 o V 6 + j8
The value of voltage source, E 2 = 96∠36.9o V
1.5.5 Mesh Analysis of Circuits Excited by Independent and Dependent Sources Mesh analysis can be extended to circuits excited by both dependent and independent sources. When a circuit has a dependent source, the dependent variable should be related to mesh currents and then the dependent source should be treated as a source while forming the mesh basis matrix equation. If a dependent source depends on a voltage Vx in some part of a circuit then the voltage Vx should be expressed in terms of mesh currents. If a dependent source depends on a current I x in some part of a circuit then the current Ix should be expressed in terms of mesh currents. Circuits with Dependent Voltage Source If a circuit has a dependent voltage source then express the value of the source in terms of mesh currents. While forming the mesh basis matrix equation, enter the value of the dependent source at the appropriate location in the source matrix on the righthand side.
Circuit Analysis
1. 76
Now, some of the terms in the source matrix on the righthand side will be a function of mesh currents and so they can be transferred to the lefthand side with the opposite sign. Then the mesh basis matrix equation can be solved using Cramer’s rule. This procedure is explained below with an example. Consider a circuit with three meshes and a dependent voltage source in mesh2. Let the mesh basis matrix equation without considering the dependent voltage source be as shown in equation (1.29). R11 R12 R13 R > 21 R22 R23 H R31 R32 R33
I1 I > 2H = I3
E11 E > 22 H E33
..... (1.29)
Let the value of the dependent source in mesh2, when expressed in terms of the mesh currents, be 2I1 − 2I3. Let the voltage of the dependent source be such that it is a rise in voltage in the direction of mesh current I2. Hence, the value of the dependent source 2I1 − 2I3 is added as a positive quantity to the element in the second row of the source matrix as shown in equation (1.30).
>R21
R11 R12 R13 R 22 R 23 H R31 R32 R33
>I 2 H I1
I3
>E22 + 2 I1 − 2 I3 H E11
=
E33
..... (1.30)
From row2 of equation (1.30), we get, R21I1 + R22I2 + R23I3 = E22 + 2I1 − 2I3 R21I1 − 2I1 + R22I2 + R23I3 + 2I3 = E22 ∴ (R21 − 2)I1 + R22I2 + (R23 + 2)I3 = E22
..... (1.31)
Using equation (1.31), equation (1.30) can be written as shown in equation (1.32). R11 R 21 > −2 R31
R12 R 22 R32
R13 R 23 + 2 H R33
I1 I > 2H = I3
E11 E > 22 H E33
..... (1.32)
In equation (1.30), the terms 2 I 1 and − 2I 3 on the righthand side are functions of mesh currents I1 and I3, respectively. In equation (1.32), these two terms are transferred to the lefthand side with the opposite sign. Now equation (1.32) can be solved by Cramer’s rule. Circuits with Dependent Current Source When a circuit has a dependent current source then express the value of the source in terms of mesh currents. If the dependent current source has parallel impedance then it can be converted into a dependent voltage source with series impedance and the analysis can be proceeded as explained in Section 1.5.5.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 77
If the dependent current source does not have parallel impedance then it cannot be converted into a voltage source. In this case the value of the current source is related to mesh currents. Then for each current source one mesh current is eliminated by expressing the mesh current in terms of the source current and other mesh currents. The mesh basis matrix equation can be formed by inspection, by taking voltage across the dependent current source as unknown. While forming the mesh basis matrix equation, the voltage of current sources should be entered in the source matrix. Now in the matrix equation some mesh currents will be eliminated and an equal number of unknown source voltages will be introduced. Thus, the number of unknowns will remain the same as the number of meshes m. On multiplying the mesh basis matrix equation we get m number of equations which can be solved to give a unique solution for unknowns and hence mesh currents. +
2
Solve the mesh currents of the circuit shown in Fig. 1.
10 V
1
I1
SOLUTION
2
2VX
+
VX
2
+ E
E
EXAMPLE 1.35
I2
3 1
E
I3
Fig. 1.
The given circuit has three meshes. The general form of mesh basis matrix equation for threemesh circuit is shown in equation (1). R11 R12 R13 I1 R 22 R 23 H >I 2 H = R31 R32 R33 I3
>R21
E11
>E22 H
.....(1)
E33
With reference to Fig. 1, the elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 2 + 2 = 4
R12 = R21 = −2
E11 = 10
R22 = 2 + 1 + 3 = 6
R13 = R31 = 0
E22 = −2Vx
R33 = 3 + 2 + 1 = 6
R23 = R32 = −3
E33 = 0
On substituting the above terms in equation (1), we get, 4 − 2 0 I1 6 − 3 H >I 2 H = 0 − 3 6 I3
>− 2
10
>− 2Vx H
..... (2)
0
The value of dependent voltage source −2Vx should be expressed in terms of mesh currents. With reference to Fig. 1 we can write, Vx = 3(I2 − I3) ∴ −2Vx = −2 × 3(I2 − I3) = − 6I2 + 6I3
..... (3)
Using equation (3), equation (2) can be written as shown in equation (4). 4 − 2 0 I1 6 − 3 H >I 2 H = 0 − 3 6 I3
>− 2
10
>− 6I2 + 6I3 H 0
..... (4)
Circuit Analysis
1. 78
In equation (4), the terms on the righthand side which are a function of mesh currents are transferred to the lefthand side with the opposite sign as shown in equation (5). 4
0 I1 −2 6 + 6 − 3 − 6 H >I 2 H = 0 −3 6 I3
>− 2
4 − 2 0 I1 12 − 9 H >I 2 H = 0 − 3 6 I3
>− 2
10
> 0H 0
..... (5)
10
> 0H
..... (6)
0
In equation (6), the unknowns are I1, I2 and I3. In order to solve I1, I2 and I3, let us define the four determinants ∆, ∆1, ∆2 and ∆3 as shown below: 4 −2 0 ∆ = − 2 12 − 9 ; 0 −3 6
∆1 =
10 − 2 0 0 12 − 9 ; 0 −3 6
4 10 0 ∆2 = − 2 0 − 9 ; 0 0 6
4 − 2 10 ∆3 = − 2 12 0 0 −3 0
The determinants are evaluated by expanding along first row and the mesh currents are solved by Cramer’s rule. 4 −2 0 ∆ = − 2 12 − 9 = 4 # 612 # 6 − (− 3) # (− 9) @ − (− 2) # 6 − 2 # 6 − 0 @ + 0 0 −3 6 = 180 − 24 = 156 ∆1 =
10 − 2 0 0 12 − 9 = 10 # 612 # 6 − (− 3) # (− 9) @ − (− 2) # 60 − 0 @ + 0 = 450 0 −3 6
4 10 0 ∆2 = − 2 0 − 9 = 4 # 60 − 0 @ − 10 # 6 − 2 # 6 − 0 @ + 0 = 120 0 0 6 4 − 2 10 ∆3 = − 2 12 0 = 4 # 60 − 0 @ − (− 2) # 60 − 0 @ + 10 # 6 − 2 # (− 3) − 0 @ = 60 0 −3 0 ∆1 450 = 2.8846 A = ∆ 156 ∆ I 2 = 2 = 120 = 0.7692 A ∆ 156 ∆ I3 = 3 = 60 = 0.3846 A ∆ 156
EXAMPLE 1.36
3
E
4Vx
Determine the current I L in the circuit shown in Fig. 1, using mesh analysis.
3 +
SOLUTION The graph of the given circuit is shown in Fig. 2. It has six branches and four nodes. Hence, the number of meshes m in the circuit is, m = B − N + 1 = 6 − 4 + 1 = 3.
+
I1 =
3 E
Vx
IL
1
8V
+
E
+ E
Let us assume three mesh currents I 1, I2 and I3 as shown in Fig. 3. Now, the current, IL = I1 − I2
1
5
Fig. 1.
6V
Chapter 1  Basic Circuit Analysis and Network Topology
1. 79
E
c
b
d
+ I2
3 E
Vx
IL I2
I1
1 e
I3
3
3
2 I1
3
4Vx
I3 1
+
a
1
5
f 8V
4
+
E
+ E
6V
Fig. 3.
Fig. 2.
The general mesh basis matrix equation for three mesh circuit is shown in equation (1). R11 R12 R13 I1 R 22 R 23 H >I 2 H = R31 R32 R33 I3
E11
>R21
>E22 H
..... (1)
E33
With reference to Fig. 3, the elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 1 + 3 + 5 = 9
R12 = R21 = −5
E11 = 8
R22 = 5 + 3 + 1 = 9
R13 = R31 = −3
E22 = −6
R33 = 3 + 3 + 3 = 9
R23 = R32 = −3
E33 = 4Vx
On substituting the above terms in equation (1), we get, 9 − 5 − 3 I1 9 − 3 H >I 2 H = − 3 − 3 9 I3
>− 5
>
8 − 6H 4 Vx
..... (2)
Let us express the value of dependent sources in terms of mesh currents. With reference to Fig. 3, we can write, Vx = 3(I1 − I3) ∴ 4Vx = 4 × 3(I1 − I3) = 12I1 − 12I3
..... (3)
On substituting for 4Vx from equation (3), in equation (2) we get, 9 − 5 − 3 I1 9 − 3 H >I 2 H = − 3 − 3 9 I3
>− 5
8 − 6H 12 I1 − 12 I3
>
..... (4)
In equation (4), the terms on the righthand side which are a function of mesh currents are transferred to the lefthand side with the opposite sign as shown in equation (5).
>
9 −5 − 3 I1 −5 9 − 3 H >I 2 H = − 3 − 12 − 3 9 + 12 I3
>
9 − 5 − 3 I1 − 5 9 − 3 H >I 2 H = − 15 − 3 21 I3
8
>− 6 H 0
.....(5)
8
>− 6 H 0
.....(6)
Circuit Analysis
1. 80
In equation (6), the unknowns are I1, I2 and I3. In order to solve I1 and I2 let us define three determinants ∆, ∆1 and ∆2 as, ∆ =
9 −5 −3 −5 9 −3 ; − 15 − 3 21
8 −5 −3 ∆1 = − 6 9 − 3 ; 0 − 3 21
∆2 =
9 8 −3 −5 −6 −3 − 15 0 21
The determinants are evaluated by expanding along the first row and the mesh currents are solved by Cramer’s rule. ∆ =
9 −5 −3 − 5 9 − 3 = 9 # 69 # 21 − (− 3) 2 @ − (− 5) # 6 − 5 # 21 − (− 15) # (− 3) @ − 15 − 3 21 + (− 3) # 6 − 5 # (− 3) − (− 15) # 9 @ = 1620 − 750 − 450 = 420
8 −5 −3 ∆1 = − 6 9 − 3 = 8 # 69 # 21 − (− 3) 2 @ − (− 5) # 6 − 6 # 21 − 0 @ + (− 3) # 6 − 6 # (− 3) − 0 @ 0 − 3 21 = 1440 − 630 − 54 = 756 ∆2 =
9 8 −3 − 5 − 6 − 3 = 9 # 6 − 6 # 21 − 0 @ − 8 # 6 − 5 # 21 − (− 15) # (− 3) @ − 15 0 21 + (− 3) # 60 − (− 15) # (− 6) @ = −1134 + 1200 + 270 = 336
` IL = I1 − I 2 =
EXAMPLE 1.37
∆1 ∆2 ∆ − ∆2 756 − 336 = 1 A − = 1 = ∆ 420 ∆ ∆
(AU Dec’16, 8 Marks)
Determine the current Io in the circuit shown in Fig. 1, using mesh analysis.
8
2 +
Vx
_
Io 4
6
4 I2
I1 + E
SOLUTION The given circuit has two meshes. The general form of mesh basis matrix equation for twomesh circuit is shown in equation (1). E11 R11 R12 I1 = G = G = = G E 22 R 21 R 22 I 2
Vs = 12 V
E +
3Vx
Fig. 1. .....(1)
With reference to Fig. 1, the elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 6 + 2 + 4 = 12
E11 = −12
R12 = R21 = −4
E22 = 3Vx + 12
R22 = 4 + 8 + 4 = 16 On substituting the above terms in equation (1), we get,
=
− 12 12 − 4 I1 G G = G = = 3Vx + 12 − 4 16 I 2
..... (2)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 81
The value of dependent voltage source 3Vx should be expressed in terms of mesh currents. With reference to Fig. 1 we can write, Vx = 2I1 ∴ 3Vx = 3 × 2I1 = 6I1
..... (3)
Using equation (3), equation (2) can be written as shown in equation (4).
=
..... (4)
− 12 12 − 4 I1 G G = G = = 6I1 + 12 − 4 16 I 2
In equation (4), the terms on the righthand side which are a function of mesh currents are transferred to the lefthand side with the opposite sign as shown in equation (5).
=
12 − 4 I1 − 12 G = G = = G − 4 − 6 16 I 2 12
=
12 − 4 I1 − 12 G = G = = G − 10 16 I 2 12
..... (5)
..... (6)
To determine current Io From Fig. 1, we get, Io = I2 In order to solve I2, let us define the two determinants ∆ and ∆2 as shown below: 12 − 10 The determinants by Cramer’s rule. 12 ∆ = − 10 ∆ =
∆2 = I2 =
12 − 12 −4 ; ∆2 = 16 − 10 12 are evaluated by expanding along the first row and the mesh currents are solved −4 = 12 # 16 − (− 4) # (− 10) = 152 16
12 − 12 = 12 2 − (− 12) # (− 10) = 24 − 10 12 ∆2 24 = 0.1579 A = ∆ 152
∴ Io = I2 = 0.1579 A
EXAMPLE 1.38
2Vx Iy
+
to the 4 Ω resistor using mesh analysis.
SOLUTION The graph of the given circuit is shown in Fig. 2. It has six branches and four nodes. Hence, the number of meshes m in the circuit is, m = B − N + 1 = 6 − 4 + 1 = 3.
3Iy E
In the circuit of Fig. 1, determine the power delivered
2
1 + + E
12 V
Vx 2 _
4
Fig. 1.
Let us assume three mesh currents I1, I2 and I3 as shown in Fig. 3. Now the current through 4 Ω resistor is I3.
Circuit Analysis
1. 82 ∴ Power delivered to the 4 Ω resistor = I3
2
#4 2Vx = 2 ´ 2(I1  I3)
d
_
+ E2
I2 f
Iy = I1 +
I2
a
b
I1
1W I3

e
3Iy = 3I1
c + 
12 V I1
Fig. 2.
+
Vx _
2W 4W
2W I3
Fig. 3. The general mesh basis matrix equation for three mesh circuit is shown in equation (1). R11 R12 R13 I1 R 22 R 23 H >I 2 H = R31 R32 R33 I3
>R21
E11
>E22 H E33
..... (1)
Let the voltage across dependent current source be E 2 as shown in Fig. 3. With reference to Fig. 3, the elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 1 + 2 = 3
R12 = R21 = 0
E11 = 12 − 3Iy
R22 = 2
R13 = R31 = −2
E22 = 3Iy − E2
R33 = 2 + 2 + 4 = 8
R23 = R32 = −2
E33 = 0
On substituting the above terms in equation (1), we get,
>
3 0 − 2 I1 0 2 − 2 H >I 2 H = − 2 − 2 8 I3
12 − 3 I y
>3 Iy − E2 H
..... (2)
0
Let us express the value of dependent sources in terms of mesh currents. With reference to Fig. 3, we can write, Iy = I1
⇒ 3Iy = 3I1
Vx = 2(I1 − I3)
⇒ 2Vx = 2 × 2(I1 − I3) = 4I1 − 4I3
..... (3)
In mesh2, I2 = −2Vx ∴
I2 = −(4I1 − 4I3) = −4I1 + 4I3
..... (4)
Using equations (3) and (4), equation (2) can be written as shown in equation (5).
>
3 0 −2 0 2 − 2H −2 −2 8
I1 4 I 4 I − + > 1 3H I3
12 − 3 I1
=
From row3 of equation (5), we get, −2I1 − 2(−4I1 + 4I3) + 8I3 = 0 ∴ 6I1 = 0
⇒
I1 = 0
>3 I1 − E2 H 0
..... (5)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 83
From row1 of equation (5), we get, 3I1 − 2I3 = 12 − 3I1 ∴
−2I3 = 12
Put, I1 = 0
I3 = 12 = − 6 A −2
`
2
Power delivered to the 4 Ω resistor = I3
2
× 4 = −6
2
× 4 = 6 × 4 = 144 W
EXAMPLE 1.39
2
2 +
Determine the voltage VL in the circuit shown in Fig. 1, using mesh analysis.
VL
Ix + E
5V
2 E
1
3Ix
1
SOLUTION Fig. 1.
The graph of the given circuit is shown in Fig. 2. It has five branches and three nodes. Hence, the number of meshes m in the circuit is,
m = B − N + 1 = 5 − 3 + 1 = 3. Let us assume three mesh currents I1, I2 and I3 as shown in Fig. 3. 2
e b
I2
a
Ix
c I3
I1
+ E
d
VL
I1
Fig. 2.
E E
E2
1
5V
2
2 +
3Ix +
I2
1 I3
Fig. 3.
Now, the voltage, VL = 2 I 2 The general mesh basis matrix equation for three mesh circuit is shown in equation (1). R11 R12 R13 I1 R 22 R 23 H >I 2 H = R31 R32 R33 I3
>R21
E11
>E22 H E33
..... (1)
Let the voltage across dependent source be E2 as shown in Fig. 3. With reference to Fig. 3, the elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 2 + 1 = 3
R12 = R21 = –1
E11 = 5
R22 = 1 + 2 = 3
R13 = R31 = 0
E22 = E2
R33 = 2 + 1 = 3
R23 = R32 = 0
E33 = –E2
On substituting the above terms in equation (1), we get, 3 − 1 0 I1 3 0 H >I 2 H = 0 0 3 I3
>− 1
>
5 E2 H − E2
..... (2)
With reference to Fig. 3, we can write, I x = I1 Also,
3 I x = I2 − I3
⇒
3 Ix = 3 I1
⇒
3 I 1 = I2 − I3
⇒
I3 = −3 I 1 + I2
..... (3)
Circuit Analysis
1. 84 On substituting for I 3 from equation (3) in equation (2), we get, 3 −1 0 3 0H 0 0 3
>− 1
>
I1 I2 H = − 3 I1 + I 2
>
5 E2 H − E2
..... (4)
From row2 of equation (4), we get, −I 1 + 3 I 2 = E2
..... (5)
From row3 of equation (4), we get, 3 (−3I 1 + I2 ) = −E 2
⇒
−9 I 1 + 3 I 2 = −E2
..... (6)
On adding equations (5) and (6), we get, ∴
−10 I 1 + 6 I 2 = 0
I1 = 6 I 2 10
⇒
..... (7)
From row1 of equation (4), we get, 3I 1 – I 2 = 5 3 # 6 I2 − I2 = 5 10
⇒
∴ 0.8 I 2 = 5 ∴
Using equation (7)
I2 = 5 = 6.25 A 0.8
VL = 2 I 2 = 2 × 6.25 = 12.5 V
EXAMPLE 1.40
(AU May’17, 10 Marks)
10
Determine the voltage Vx and current Ix as shown in Fig. 1, using mesh analysis.
Ix
VX
3A
5
4 + E
50 V
+ VX E
SOLUTION The graph of the given circuit is shown in Fig. 2. It has six branches and four nodes. Hence, the number of meshes m in the circuit is
2
+ E
4Ix
Fig. 1.
m = B − N + 1 = 6 − 4 + 1 = 3. Let us assume three mesh currents I1, I2 and I3 as shown in Fig. 3.
10
b
Ix 3A
I1
I c 2 d
50 V e
a
I3
+ E
+ I2 + E2 E3 E E
VX E
Fig. 2.
5
4 I3
+
f
VX
2
+ E
4Ix
Fig. 3.
The general mesh basis matrix equation for three mesh circuit is shown in equation (1). R11 R12 R13 I1 R 22 R 23 H >I 2 H = R31 R32 R33 I3
>R21
E11
>E22 H E33
..... (1)
Let the voltage across indepent current source be E2 and voltage across dependent current source be E3.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 85
With reference to Fig. 3, the elements of resistance matrix and source voltage matrix are formed as shown below: R11 = 10 + 2 = 12
R12 = R21 =
0
E11 = 50 − E2
R22 = 0
R13 = R31 = −2
E22 = E 2 − E3
R33 = 5 + 2 = 7
R23 = R32 =
E33 = E3 − 4I x
0
On substituting the above terms in equation (1), we get, R V 12 0 − 2 I1 S 50 − E 2 W > 0 0 0 H >I2 H = S E2 − E3 W SSE − 4I WW − 2 0 7 I3 x 3 T X
..... (2)
With reference to Fig. 3, we can write the following equations: I2 − I1 = 3
⇒
Vx = 2(I1− I3) ⇒ I3 − I 2 =
Vx 4
I2 = 3 + I1
.....(3)
Vx = 2I1 − 2I3
.....(4)
⇒ I3 − I 2 =
∴ I3 − I2 = 0.5I1 − 0.5I3 Ix = I1
⇒
2I1 − 2I3 4
Using equation (4)
⇒ 1.5I3 = 0.5I1 + I2
I ⇒ I3 = 0.5 I1 + 2 = 0.3333I1 + 0.6667I 2 1.5 1.5
∴ 4Ix = 4I1
.....(5) .....(6)
On substituting equations (3), (5) and (6) in equation (2) we get, R V R V I1 S W S 50 − E 2 W S W = S E 2 − E3 W 3 + I1 SS0.3333I + 0.6667I WW SSE − 4I WW 1 2 3 1 T X T X From row1 of equation (7), we get, 12 > 0 −2
0 −2 0 0H 0 7
..... (7)
12I1 − 2 (0.3333I1 + 0.6667I 2) = 50 − E 2
..... (8)
From row2 of equation (7), we get, 0 = E2 − E3
..... (9)
From row3 of equation (7), we get, −2I1 + 7(0.3333I1 + 0.6667I2) = E3 − 4I1
..... (10)
On adding equation (8), (9) and (10) we get, 10I1 + 5(0.3333I1 + 0.6667I2) = 50 − 4I1 10I1 + 4I1 + 1.6665I1 + 3.3335I2 = 50 15.6665I1 + 3.3335 (3 + I1) = 50 19I1 = 50  10.0005 ∴ I1 = 50 − 10 = 2.1053 A 19 ∴ I2 = 3 + I1 = 3 + 2.1053 = 5.1053 A
Using equation (3)
Circuit Analysis
1. 86 I3 = 0.3333I1 + 0.6667I2 = 0.3333 × 2.1053 + 0.6667 × 5.1053 = 4.1054 A ∴ Ix = I1 = 2.1053 A Vx = 2I1 − 2I3 = 2 × 2.1053 − 2 × 4.1054 = −4.0002 V = − 4 V Alternate method
A Ix 10
With reference to Fig. 4, by KCL at node E, we get, V Vx = − 2 d3 + x n 4
V Ix+3+ X 4
B
+ 10I E
50 V
+ E
Vx = − 6 − 0.5Vx 1.5Vx = − 6
x
VX
3A
4
E
I1
3+ + VX E
VX 4
C + V 5(Ix+3+ X ) 4 E
5
+ E
4Ix
2 D
` Vx = − 6 = − 4 V 1.5
Fig. 4.
With reference to Fig. 5, by KVL in the closed path ABCDA we get, 10I x + 5 dI x + 3 +
Vx n + 4I x = 50 4
10I x + 5I x + 15 + 5 19I x +
Vx + 4I x = 50 4
5 # (− 4) = 50 − 15 4
` 19I x = 50 − 15 + 5 ` I x = 40 = 2.1053 A 19
1.6 Node Voltage Method of Analysis for DC and AC Circuits Node analysis is a useful technique to solve the voltage across various elements of a circuit. Node analysis is preferred when the circuit is excited by current sources and the voltage across various elements is unknown. Node analysis can also be extended to circuits excited by both voltage and current sources and to circuits excited by both independent and dependent sources. In a circuit, each branch will have a voltage across it. Hence, the number of voltages in the circuit are equal to the number of branches. In a circuit, some of the voltages will be independent and the remaining voltages depend on the independent voltages. The number of independent voltages in a circuit can be determined from the graph of the circuit. It is given by the branches of the tree (or twigs) of the graph. The voltages of the tree branches are the same as the node voltages. (Refer Section 1.7.4.) In nodal analysis, the independent voltages are solved by writing Kirchhoff’s Current Law (KCL) equations for various nodes in the circuit. A tree of the graph with N nodes will have N – 1 branches or twigs. Hence, the number of independent voltages n = N − 1. The nodes of the circuit are the same as the nodes of the graph and so a circuit will also have N number of nodes. “A node is meeting point of two or more elements. When more than two elements meet at a point then the
Chapter 1  Basic Circuit Analysis and Network Topology
1. 87
node is called a principal node”. The voltage of a node can be expressed only with reference to another node. Hence, one of the nodes is chosen as the reference node and the node voltages are expressed with respect to the reference node. For each node except the reference node, a voltage is assigned called node voltage. The voltage of the reference node is always zero. Using KCL, an equation is formed for each node by equating the sum of currents leaving the node to the sum of currents entering the node. These equations are arranged in the form of a matrix and node voltages are solved by Cramer’s rule. A simple procedure to form a node basis matrix equation directly from the circuit by inspection without forming KCL equations is also discussed in this chapter.
1.6.1 Node Analysis of Resistive Circuits Excited by DC Sources A circuit with N nodes and B branches will have N − 1 independent voltages and B – (N – 1) dependent voltages which depend on independent voltages. Let us denote the number of independent voltages by n, where, n = N − 1. In order to solve the independent voltages of a circuit we have to identify the N nodes of the circuit and choose one of the node as the reference node. For each node, except the reference, we have to attach a voltage called node voltage. The node voltages are the independent voltages of the circuit. Let V1, V2, V3, ....., Vn be the node voltages. For each node except the reference node, a KCL equation is formed by equating the sum of currents leaving the node to the sum of currents entering the node. Since there are n independent nodes, we can form n equations. In resistive circuits excited by dc sources, the voltages and currents are real (i.e., they are not complex). For resistive circuits, the n equations can be arranged in a matrix form as shown in equation (1.33), which is called the node basis matrix equation. The formation of the node basis matrix equation from KCL equations is explained in some of the solved problems. The node basis matrix equation (1.33), can be written as shown in equation (1.34). Note : The bold faced letter represent matrices. G12 G22 G32 h G n2
G13 G23 G33 h G n3
..... (1.33)
↓
RI V g G1n V RV1 V W S W S 11 W g G2n W S V2 W SI22 W g G3n W S V3 W = S I33 W W S W S W h W Sh W Sh W SI W g G nn W S Vn W X T X T nn X ↓ ↓
RG S 11 SG 21 SG31 S S h S G n1 T
GV=I
where, G = Conductance matrix of order n × n V = Node voltage matrix of order n × 1 I = Source current matrix of order n × 1 n = Number of nodes except reference node.
..... (1.34)
Circuit Analysis
1. 88
In equation (1.33), the elements of conductance matrix and source current matrix can be determined from the given circuit. Hence, the unknowns are node voltages, which have to be solved by any standard technique. Alternatively, equation (1.33) can be formed directly from the circuit by inspection without writing KCL equations. A procedure to form node basis matrix equation by inspection is given below : Procedure to Form Node Basis Matrix Equation by Inspection Consider the node basis matrix equation shown below for a circuit with three nodes excluding the reference node. Let V1, V2, V3 be the node voltages. G11 G12 G13 V1 G > 21 G22 G23 H >V2 H = G31 G32 G33 V3
I11 I > 22 H I33
..... (1.35)
The elements of equation (1.35) for circuits with independent sources are, G11 = Sum of conductances connected to node1 G22 = Sum of conductances connected to node2 G33 = Sum of conductances connected to node3 G12 = G21 = Sum of conductances connected between node1 and node2 G13 = G31 = Sum of conductances connected between node1 and node3 G23 = G32 = Sum of conductances connected between node2 and node3 I11 = Sum of current sources connected to node1 I22 = Sum of current sources connected to node2 I33 = Sum of current sources connected to node3 The conductances G11, G22, G33 are called selfconductances of node1, node2 and node3, respectively. The conductances G12, G13, G21, G23, G31, G32 are called mutualconductances between nodes. The formation of the elements of conductance matrix and source current matrix are explained below: i) The selfconductance G jj is given by the sum of all the conductances connected to the jth node. The selfconductances will always be positive.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 89
ii) The mutualconductance G jk is given by negative of sum of all the conductances connected between nodej and nodek. In a circuit with only independent sources (Reciprocal network), G jk = Gkj. iii) The source current matrix element I jj is given by the sum of all the current sources connected to the jth node. A current source is positive if it drives current towards a node as shown in Fig. 1.42, and it is negative if it drives current away from the node as shown in Fig. 1.43. V V j
j
Ij
Ij
Reference node
Fig. 1.42 : Example for positive current source.
Reference node
Fig. 1.43 : Example for negative current source.
Note : In a circuit with both independent and dependent sources (nonreciprocal circuit) Gjk ! Gkj Solution of Node Voltages In the node basis matrix equation [i.e., equation (1.33)], the unknowns are node voltages V1,V2,V3 ... Vn. The node voltages can be obtained by premultiplying equation (1.33), with the inverse of conductance matrix. Consider equation (1.34), GV=I
On premultiplying both sides by G−1, we get, G−1 G V = G−1 I U V = G−1 I
G−1G = U = Unit matrix
\ V = G−1 I
UV=V
.....(1.36)
Equation (1.36), will be the solution for node voltages. Equation (1.36), can be solved by Cramer’s rule, by which the kth node voltage Vk is given by equation (1.37). Vk =
∆l ∆l1k ∆l ∆l I11 + 2k I22 + 3k I33 + ...... + nk I nn = 1 ∆l ∆l ∆l ∆l ∆l
n
/
∆l jk I jj
j =1
where, ∆′jk = Cofactor of Gjk Ijj = Sum of current sources connected to nodej ∆′ = Determinant of conductance matrix
..... (1.37)
Circuit Analysis
1. 90
Proof for Cramer’s Rule Consider equation (1.36) for a circuit with three nodes excluding reference node. V1
G11 G12 G13
V3
G31 G32 G33
1
⇒ >V2 H = >G21 G22 G23 H
V = G–1 I
I11
>I22 H
.....(1.38)
I33
We know that, G 1 =
Transpose of Gcof GTcof Adjoint of G = = Determinant of G Determinant of G ∆l where, ∆’
= Determinant of G.
Gcof = Cofactor matrix (matrix formed by cofactor of elements of G matrix). Let, ∆’11 = Cofactor of G11 ∆’12 = Cofactor of G12 and in general, ∆’jk = Cofactor of Gjk
`
Gcof =
` G 1 =
∆l 11 ∆l 12 ∆l 13 ∆l 22 ∆l 23 H ∆l 31 ∆l 32 ∆l 33
>∆l 21
Transpose
T Gcof =
∆l 11 ∆l 21 ∆l 31 ∆l 22 ∆l 32 H ∆l 13 ∆l 23 ∆l 33
>∆l 12
∆l 11 ∆l 21 ∆l 31 T Gcof = 1 >∆l 12 ∆l 22 ∆l 32 H ∆l ∆l ∆l 13 ∆l 23 ∆l 33
.....(1.39)
On substituting for G–1 from equation (1.39) in equation (1.38), we get, V1
>V2 H V3
=
∆l 11 ∆l 21 ∆l 31 1 ∆l 12 ∆l 22 ∆l 32 H > ∆l ∆l 13 ∆l 23 ∆l 33
I11
>I22 H I33
On multiplying the matrices on the righthand side of the above equation and equating to the terms on the lefthand side we get, V1 =
∆l ∆l 11 ∆l I + 21 I22 + 31 I33 ∆l 11 ∆l ∆l
V2 =
∆l ∆l 12 ∆l I + 22 I22 + 32 I33 ∆l 11 ∆l ∆l
V3 =
∆l 13 ∆l ∆l I + 23 I22 + 33 I33 ∆l 11 ∆l ∆l
The above equations can be used to form a general equation for node voltage. In general, the k th node voltage of a circuit with n nodes excluding reference is given by, Vk =
∆l 1k ∆l ∆l ∆l I + 2k I22 + 3k I33 + ...... + nk Inn = 1 ∆l 11 ∆l ∆l ∆l ∆l
n
/
j=1
∆l
jk I jj
Chapter 1  Basic Circuit Analysis and Network Topology
1. 91
Shortcut Procedure for Cramer’s Rule A shortcut procedure for Cramer’s rule is explained below: Let us consider a circuit with three nodes excluding reference. The node basis matrix equation for this case is, G11 G12 G13 V1 G22 G23 H > V2 H = G31 G32 G33 V3
>G21
>I22 H I11
I33
Let us define three determinants as shown below : I11 G12 G13 ∆l1 = I22 G22 G23 I33 G32 G33 G11 I11 G13 ∆l2 = G21 I22 G23 G31 I33 G33 G11 G12 I11 ∆l3 = G21 G22 I22 G31 G32 I33
Here, ∆l1 = Determinant of conductance matrix after replacing the first column of conductance matrix by source current column matrix ∆l2 = Determinant of conductance matrix after replacing the second column of conductance matrix by source current column matrix ∆l3 = Determinant of conductance matrix after replacing the third column of conductance matrix by source current column matrix.
Let, ∆l = Determinant of conductance matrix G11 G12 G13 ∆l = G21 G22 G23 G31 G32 G33
Now, node voltages V1, V2 and V3 are given by, V1 = ∆l1 ∆l V2 = ∆l2 ∆l l V3 = ∆ 3 ∆l
Circuit Analysis
1. 92
CrossCheck The equation for node voltages obtained by shortcut procedure is the same as equation (1.37), and verified as shown below: V1 =
I11 G12 G13 ∆l1 = 1 I 22 G 22 G 23 ∆l ∆l I33 G32 G33
Expanding along first column
= 1 6 I11 ∆l11 + I 22 ∆l21 + I33 ∆l31 @ ∆l =
V2 =
∆l ∆l11 ∆l I + 21 I 22 + 31 I33 ∆l 11 ∆l ∆l
G11 I11 G13 ∆l 2 = 1 G 21 I 22 G 23 ∆l ∆l G31 I33 G33
Expanding along second column
= 1 6 I11 ∆l12 + I 22 ∆l22 + I33 ∆l32 @ ∆l =
V3 =
∆l ∆l12 ∆l I + 22 I 22 + 32 I 33 ∆ 11 ∆l ∆l
G11 G12 I11 ∆l 3 = 1 G 21 G 22 I 22 ∆l ∆l G31 G32 I33
Expanding along third column
= 1 6 I11 ∆l13 + I 22 ∆l23 + I33 ∆l33 @ ∆l =
∆l13 ∆l ∆l I + 23 I 22 + 33 I33 ∆l 11 ∆l ∆l
Various Steps to Obtain the Solution of Node Voltages and Branch Voltages in a Circuit Step 1 : Draw the graph of the circuit. Step 2 : Determine the branches B and nodes N. The number of node voltages n is given by n = N – 1. Step 3 : Choose one of the nodes as reference. Let us denote the reference node as 0 (zero) and other nodes as 1, 2, 3, ....., n. Step 4 : Let us denote the node voltages as V1, V2, V3,....., and the branch voltages as Va, Vb, Vc, Vd, Ve,...... Write the relationship between node and branch voltages. Step 5 : Form the node basis matrix equation by inspection and solve the node voltages using Cramer’s rule. For a circuit with three nodes excluding the reference, the node basis matrix equation and solution of node voltages using Cramer’s rule are given below: G11 G12 G13 V1 I11 >G21 G22 G23 H >V2 H = >I22 H G31 G32 G33 V3 I33
Chapter 1  Basic Circuit Analysis and Network Topology
1. 93
I11 G12 G13 ∆l1 1 V1 = I G G = ∆l ∆l 22 22 23 I33 G32 G33 V2 =
G11 I11 G13 ∆l 2 = 1 G 21 I 22 G 23 ∆l ∆l G31 I33 G33
V3 =
G11 G12 I11 ∆l 3 = 1 G 21 G 22 I 22 ∆l ∆l G31 G32 I33
Step 6 : Solve the branch voltages using the relationship between branch and node voltages. Note : After solving the node voltages if any of the voltage is found to be negative then that node has a potential lesser than the reference node. EXAMPLE 1.41
V1
Write and solve the node voltage equations for the circuit shown in Fig. 1.
V2 1
2A
2A
2
1
SOLUTION 0
With reference to Fig. 2, the node equation for node1 is formed as shown below: Currents leaving node1 : V1 − V2 , V1 1 1 Current entering node1
Fig. 1. V1 V2 2A
: 2A
` V1 − V2 + V1 = 2 1 1
V1 E V2 1
V1 1
2A
0
V1 − V2 + V1 = 2 2 V1 − V2 = 2
Fig. 2.
..... (1)
Reference node
With reference to Fig. 3, the node equation for node2 is formed as shown below: V2 E V1 1
Currents leaving node2 : V2 − V1 , V2 , 2 A 1 2 Current entering node2 : Nil
V2
V1
2A
` V2 − V1 + V2 + 2 = 0 1 2
V2 2
V2 − V1 + 0.5V2 = −2
2A
0
−V1 + 1.5 V2 = −2
..... (2)
Fig. 3.
Equations (1) and (2) are the node equations of the circuit, which are summarised below for convenience. 2 V1 − V2 = 2
..... (1)
−V1 + 1.5 V2 = −2
..... (2)
Equation (1) × 1
⇒
2 V1 − V2 = 2
Equation (2) × 2
⇒
− 2V1 + 3V2 = − 4
On adding
2V2 = − 2
Circuit Analysis
1. 94 ` V2 = − 2 = − 1V 2 From equation (2), we get, V1 = 1.5V2 + 2 = 1.5 × (−1) + 2 = 0.5 V The node voltages are, V1 = 0.5 V V2 = −1 V
EXAMPLE 1.42
5A
(AU Dec’16, 8 Marks)
Write and solve the node voltage equations for the circuit shown in Fig. 1.
SOLUTION
4
V1
V2
10A
6
2
With reference to Fig. 2, the node equation for node1 is formed as shown below:
Fig. 1. 5A
Currents leaving node1
: V1 − V2 , V1
Current entering node1
: 5A
4
2
` V1 − V2 + V1 = 5 4 2
0.75V1 − 0.25V2 = 5
Reference node
0
Fig. 2. 5A V2 EV1 4
5A V2
10A
4
10 A
V2 6
` V2 − V1 + V2 + 5 = 10 4 6 0.25V2 − 0.25V1 + 0.1667V2 = 10 − 5 − 0.25V1 + 0.416V2 = 5
V1 2
.....(1)
With reference to Fig. 3, the node equation for node2 is formed as shown below: Currents leaving node2 : V2 − V1 , V2 , 5 A V1 4 6
V2
V1EV2 4
2
0.25V1 − 0.25V2 + 0.5V1 = 5
Current entering node2 :
4
V1
.....(2)
6
0
10A
Reference node
Fig. 3.
Equations (1) and (2) are the node equations of the circuit, which are summarised below for convenience. 0.75V1 − 0.25V2 = 5
..... (1)
− 0.25V1 + 0.416V2 = 5
..... (2)
Equation (1) × 1 ⇒
0.75V1 − 0.25V2 = 5
Equation (2) × 3 ⇒ − 0.75V1 + 1.25V2 = 15 On adding
V2 = 20
Chapter 1  Basic Circuit Analysis and Network Topology
1. 95
∴ V2 = 20 V From equation (1), we get, V1 =
5 + 0.25V2 0.75
= 5 + 0.25 # 20 = 13.3333 V 0.75
EXAMPLE 1.43 Determine the voltages across various elements of the circuit shown in Fig. 1, using the node method.
2A 1 4
1 2
SOLUTION
1 2
1 3
9A
1 4
The graph of the given circuit is shown in Fig. 2. It has seven branches and four nodes.
Fig. 1.
Let us choose one of the node as reference as shown in Fig. 2. Let the voltages of other three nodes be V1,V2 and V3. The reference node is denoted by 0 to indicate that its voltage is zero volt. The circuit with chosen node voltages is shown in Fig. 3. g 2A V2
e
V1
V3
f
a
b
c
0
V1 1 2 1 2
d
Reference node
Fig. 2.
V2
1 4 1 3
9A
0
V3 1 4
Reference node
Fig. 3.
Method I : Formation of node basis matrix equation by applying KCL In this method, the node equations are formed using Kirchhoff’s Current Law. The node equation for a node is formed by equating the sum of currents leaving that node to the sum of currents entering that node. While writing the node equation for a node it is assumed that all the resistances connected to that node will draw current from that node. Hence, the current in the resistances will always leave the node. With reference to Fig. 4, the node equation for node1 is formed as shown below: V1 V1 − V2 2A Currents leaving node1 : , , 2A 1/2 1/2 Current entering node1 :
Nil
V1 ` + V1 − V2 + 2 = 0 1/2 1/ 2
2A V2
V1 V1 E V2 1/ 2
V1 1/ 2
2 V1 + 2 V1 − 2V2 + 2 = 0 4V1 − 2V2 = −2
0
..... (1)
Fig. 4.
V3
Circuit Analysis
1. 96
With reference to Fig. 5, the node equation for node2 is formed as shown below: Currents leaving node2 :
V2 − V1 V2 − V3 V2 , , 1/2 1/4 1/3
Current entering node2 :
9A
V2 E V1 1/ 2
V2
V1
V3
9A
V2 − V1 + V2 − V3 + V2 = 9 1/2 1/4 1/3
`
V2 E V3 1/ 4
V2 1/ 3
9A
2V2 − 2V1 + 4V2 − 4V3 + 3V2 = 9 − 2V1 + 9V2 − 4V3 = 9
0
0
..... (2)
Fig. 5.
With reference to Fig. 6, the node equation for node3 is formed as shown below: Currents leaving node3 :
2A
V3 − V2 V3 , 1/4 1/4
2A
Current entering node3 : 2 A
V1
V2
V3 − V2 + V3 = 2 1/4 1/4
`
V3 V3 E V2
V3 1/ 4
1/ 4
4V3 − 4V2 + 4V3 = 2
Fig. 6.
−4V2 + 8V3 = 2
0
..... (3)
Equations (1), (2) and (3) are node equations of the circuit shown in Fig. 3. The node equations are summarised below for convenience. 4V1 − 2V2 = −2 −2V1 + 9V2 − 4V3 = 9 −4V2 + 8V3 = 2 The node equations can be arranged in a matrix form as shown below and then solved by Cramer’s rule. 4 − 2 0 V1 −2 9 − 4 H >V2 H = > 9 H 0 − 4 8 V3 2
>− 2
..... (4)
Method II : Formation of node basis matrix equation by inspection In this method, the node basis matrix equation is formed by inspection using the circuit shown in Fig. 3. The general node basis matrix equation for a circuit with three nodes excluding the reference is shown in equation (5). G11 G12 G13 V1 I11 G 22 G 23 H >V2 H = >I 22 H G31 G32 G33 V3 I33
>G21
..... (5)
The elements of conductance matrix and source current matrix are formed as shown below: G11 = 2 + 2 = 4
G12 = G21 = –2
I11 = –2
G22 = 2 + 3 + 4 = 9
G13 = G31 = 0
I22 = 9
G33 = 4 + 4 = 8
G23 = G32 = – 4
I33 = 2
Chapter 1  Basic Circuit Analysis and Network Topology
1. 97
On substituting the above terms in equation (5), we get, 4 − 2 0 V1 −2 9 − 4 H >V2 H = > 9 H 0 − 4 8 V3 2
>− 2
..... (6)
Solution of node voltages It is observed that the node basis matrix equations obtained in methods  I and II are the same. In equation (6) the unknowns are V1, V2 and V3 . In order to solve V1, V2 and V3, let us define four determinants ∆l , ∆l1, ∆l2 and ∆l3 as shown below: 4 −2 0 4 −2 0 4 −2 −2 −2 −2 0 ∆l = − 2 9 − 4 ; ∆l1 = 9 9 − 4 ; ∆l2 = − 2 9 − 4 ; ∆l3 = − 2 9 9 0 −4 8 2 −4 8 0 2 8 0 −4 2 The determinants are evaluated by expanding along first row and the node voltages are solved by Cramer’s rule. 4 −2 0 = 4 # 69 # 8 − (− 4) 2 @ − (− 2) # 6 − 2 # 8 − 0 @ + 0 ∆l = − 2 9 − 4 = 224 − 32 = 192 0 −4 8 ∆l1 =
−2 −2 0 = − 2 # 69 # 8 − (− 4) 2 @ − (− 2) # 69 # 8 − 2 # (− 4) @ + 0 9 9 −4 = − 112 + 160 = 48 2 −4 8
4 −2 0 = 4 # 69 # 8 − 2 # (− 4) @ − (− 2) # 6 − 2 # 8 − 0 @ + 0 ∆l 2 = − 2 9 − 4 = 320 − 32 = 288 0 2 8 4 −2 −2 = 4 # 69 # 2 − (− 4) # 9 @ − (− 2) # 6 − 2 # 2 − 0 @ + (− 2) # 6 − 2 # (− 4) − 0 @ ∆l 3 = − 2 9 9 = 216 − 8 − 16 = 192 0 −4 2 V1 =
∆l1 = 48 = 0.25 V 192 ∆l
V2 =
∆l 2 = 288 = 1.5 V 192 ∆l
V3 =
∆l 3 = 192 = 1V 192 ∆l
To solve branch voltages The given circuit has seven branches. Let us denote the branch voltages as Va, Vb, Vc, Vd, Ve, Vf and Vg as shown in Fig. 7. The sign of branch voltages are chosen such that they are all positive. The relation between the branch and node voltages are obtained using the circuit shown in Fig. 7 and the branch voltages are solved as shown below:
_
Va = V1 = 0.25 V Vb = V2 = 1.5 V Vc = V2 = 1.5 V
+ Va _
+ +
Vb
+
2A
_ Ve +
V1
Vg
V2
_ 9A
Vf _ V3
+
+
Vc _
_
Vd = V3 = 1 V
Fig. 7.
Vd
Circuit Analysis
1. 98 Ve = V2 − V1 = 1.5 − 0.25 = 1.25 V Vf = V2 − V3 = 1.5 − 1 = 0.5 V Vg = V3 − V1 = 1 − 0.25 = 0.75 V Note : The branch voltages are voltages across various elements in the circuit.
EXAMPLE 1.44
2
In the network shown in Fig. 1, find the current through the 2 Ω resistor, using the node method.
1 5A
SOLUTION
4
4 1 4
The given circuit is redrawn as shown in Fig. 2. The graph of the circuit is shown in Fig. 3. It has seven branches and four nodes. Let us choose one of the nodes as reference as shown in Fig. 3. Let the voltages of other three nodes be V1, V2 and V3. The reference node is denoted by 0. V1
2
V2
V1
Fig. 1. V2
f
1 5A
4 4
Reference node
a
4
1
b
V3
0
Reference node
Fig. 2.
0
d
c
g
e
V3
Fig. 3.
In the 2 Ω resistor, the current will flow from node1 to node2 if V1 > V2, and when V2 > V1, the current will flow from node2 to node1. Let the current through 2 Ω resistance be Ix. If V1 > V2 , then Ix =
V1 − V2 . 2
If V2 > V1,
V2 − V1 . 2
then Ix =
In both the cases it is enough if we solve the node voltages V1 and V2. The node basis matrix equation is formed by inspection using the circuit shown in Fig. 2. The general node basis matrix equation for a circuit with three nodes excluding the reference is shown in equation (1). G11 G12 G13 G 22 G 23 H G31 G32 G33
>G21
V1
>V2 H V3
I11
=
>I22 H
..... (1)
I33
The elements of conductance matrix and source current matrix are formed as shown below : G11 = 1 + 1 + 1 = 1.75 4 1 2
G12 = G 21 = − 1 = − 0.5 2
I11 = 5
G 22 = 1 + 1 + 1 = 1.75 2 4 1
G13 = G31 = − 1 = − 1 1
I 22 = 0
G33 = 1 + 1 + 1 = 1.5 4 1 4
G 23 = G32 = − 1 = − 0.25 4
I33 = 0
Chapter 1  Basic Circuit Analysis and Network Topology
1. 99
On substituting the above terms in equation (1), we get, 1.75
− 0.5 −1 1.75 − 0.25 H 1.5 − 1 − 0.25
>− 0.5
V1
>V2 H V3
5
=
>0 H 0
In order to solve the node voltages V1 and V2, let us define three determinants ∆’, ∆’1 and ∆’2 as shown below: 1.75 − 0.5 −1 ∆l = − 0.5 1.75 − 0.25 ; 1.5 − 1 − 0.25
5 − 0.5 −1 ∆l1 = 0 1.75 − 0.25 ; 0 − 0.25 1.5
1.75 5 −1 ∆l2 = − 0.5 0 − 0.25 1.5 −1 0
The determinants are evaluated by expanding along the first row and the node voltages are solved by Cramer’s rule. 1.75 − 0.5 −1 = 1.75 # 61.75 # 1.5 − (− 0.25) 2 @ − (− 0.5) # 6 − 0.5 # 1.5 − (− 1) # (− 0.25) @ ∆l = − 0.5 1.75 − 0.25 1.5 − 1 − 0.25 + (− 1) # 6 − 0.5 # (− 0.25) − (− 1) # 1.75 @
= 4.4844 − 0.5 − 1.875 = 2.1094 5 − 0.5 − 1 = 5 61.75 1.5 − (− 0.25) 2 @ − 0 + 0 # # ∆l1 = 0 1.75 − 0.25 0 − 0.25 1.5 = 12.8125 1.75 5 − 1 = 0 − 5 # 6 − 0.5 # 1.5 − (− 1) # (− 0.25) @ + 0 ∆l2 = − 0.5 0 − 0.25 1.5 = 5 −1 0 ` V1 =
∆l1 = 12.8125 = 6.074 V 2.1094 ∆l
V2 =
∆l 2 5 = = 2.3703 V ∆l 2.1094
` Ix =
V1 − V2 = 6.074 − 2.3703 = 1.8519 A 2 2
Since V1 > V2, the direction of current I x is from node1 to node2.
EXAMPLE 1.45
5A
In the circuit shown in Fig. 1, find the potential difference between A and D.
SOLUTION
4A
3A B C
A 3
2
The given circuit has four nodes. Let us choose the nodeD as reference node and so the voltage of nodeD is zero volt. All other node voltages are expressed with respect to the reference node. Let the voltages of node A, B and
2
4
5
C be V1, V2 and V3 , respectively. Now the voltage between A and D is V1. D
Fig. 1.
Circuit Analysis
1. 100
5A
The node basis matrix equation is formed by inspection using the circuit shown in Fig. 2. The general node basis matrix equation for a circuit with three
4A
3A
nodes excluding the reference is shown in equation (1).
V2
0.75
1 = 0.75 4 1 + 1 = 1.33 2 3
0 − 0.5 1.33 − 0.33 H 0 − 0.33 0.53
V1
>V2 H V3
2
4
Reference node 0
5
Fig. 2.
G12 = G 21 = − 1 = − 0.5 2
I11 = 5 − 4 = 1
G13 = G31 = 0
I 22 = 4 − 3 = 1
G 23 = G32 = − 1 = − 0.33 G33 = 1 + 1 = 0.53 3 3 5 On substituting the above terms in equation (1), we get,
>− 0.5
3
2
..... (1)
The elements of conductance matrix and source current matrix are formed as shown below: G11 = 1 + 2 G 22 = 1 + 2
V3
V1
G11 G12 G13 V1 I11 >G21 G22 G23 H >V2 H = >I22 H G31 G32 G33 V3 I33
I33 = 3 − 5 = − 2
1
=
> 1H
..... (2)
−2
In order to solve the node voltage V1, let us define two determinants D’ and D’1 as shown below: 0.75 − 0.5 0 ∆l = − 0.5 1.33 − 0.33 ; 0 − 0.33 0.53
∆l1 =
1 − 0.5 0 1 1.33 − 0.33 − 2 − 0.33 0.53
The determinants are evaluated by expanding along the first row and the node voltage V1 is solved by Cramer’s rule. 0.75 − 0.5 0 = 0.75 # 61.33 # 0.53 − (− 0.33) 2 @ − (− 0.5) # 6 − 0.5 # 0.53 − 0 @ + 0 ∆l = − 0.5 1.33 − 0.33 = 0.447 − 0.1325 = 0.3145 0 − 0.33 0.53
∆l1 =
1 − 0.5 0 = 1 # 61.33 # 0.53 − (− 0.33) 2 @ − (− 0.5) # 61 # 0.53 − (− 2) # (− 0.33) @ + 0 1 1.33 − 0.33 = 0.596 − 0.065 = 0.531 − 2 − 0.33 0.53
` V1 =
∆l1 = 0.531 = 1.6884 V 0.3145 ∆l
Voltage between node A and D = VAD = V1 = 1.6884 V 2
EXAMPLE 1.46 In the circuit shown in Fig. 1, determine the power supplied by the current sources.
SOLUTION The given circuit has four nodes. Let us choose one of the node voltage as reference node, which is indicated by 0. Let the voltages of the other three nodes be V1, V2 and V3 as shown in Fig. 2.
2 8A
4 10 A
2
Fig. 1.
Chapter 1  Basic Circuit Analysis and Network Topology The power supplied by 8 A source in watts = V1 × 8
1. 101 2
V1
V2
2
The power supplied by 10 A source in watts = (V2 −V3) × 10
4 10 A
8A
The node basis matrix equation is formed by inspection using the circuit shown in Fig. 2. The general node basis matrix equation for a circuit with three nodes excluding the reference is shown in equation (1). G11 G12 G13 V1 I11 G 22 G 23 H >V2 H = >I 22 H G31 G32 G33 V3 I33
>G21
2
V3
0 Reference node
Fig. 2. ..... (1)
The elements of conductance matrix and source current matrix are formed as shown below: G11 = 1 + 1 = 1 2 2
G12 = G 21 = − 1 = − 0.5 2
I11 = 8
G 22 = 1 + 1 = 0.75 2 4
G13 = G31 = − 1 = − 0.5 2
I22 = 10
G33 = 1 + 1 = 1 2 2
G 23 = G32 = 0
I33 = − 10
On substituting the above terms in equation (1), we get, 1 − 0.5 − 0.5 0.75 0H 0 1 − 0.5
> − 0.5
V1
>V2 H
=
V3
>
8 10 H − 10
..... (2)
In equation (2), the unknowns are V1, V2 and V3. In order to solve V1, V2 and V3, let us define four determinants, ∆l , ∆l1, ∆l2 and ∆l3 as shown below: 1 − 0.5 − 0.5 ∆l = − 0.5 0.75 0 0 1 − 0.5
∆l1 =
;
1 8 − 0.5 ∆l2 = − 0.5 10 0 1 − 0.5 − 10
;
8 − 0.5 − 0.5 10 0.75 0 0 1 − 10
1 − 0.5 8 ∆l3 = − 0.5 0.75 10 0 − 10 − 0.5
The determinants are evaluated by expanding along the first row and the node voltages are solved by Cramer’s rule. 1 − 0.5 − 0.5 ∆l = − 0.5 0.75 0 = 1 # 60.75 # 1 − 0 @ − (− 0.5) # 6 − 0.5 # 1 − 0 @ + (− 0.5) # 60 − (− 0.5) # 0.75 @ 0 1 − 0.5
= 0.75 − 0.25 − 0.1875 = 0.3125
∆l1 =
8 − 0.5 − 0.5 10 0.75 0 = 8 # 60.75 # 1 − 0 @ − (− 0.5) # 610 # 1 − 0 @ + (− 0.5) # 60 − (− 10) # 0.75 @ 0 1 − 10
= 6 + 5 − 3.75 = 7.25 1 8 − 0.5 ∆l2 = − 0.5 10 0 = 1 # 610 # 1 − 0 @ − 8 # 6 − 0.5 # 1 − 0 @ + (− 0.5) # 6 − 0.5 # (− 10) − (− 0.5) # 10 @ 1 − 0.5 − 10
= 10 + 4 − 5 = 9
Circuit Analysis
1. 102
1 − 0.5 8 1 # 60.75 # (− 10) − 0 @ − (− 0.5) # 6 − 0.5 # (− 10) − (− 0.5) # 10 @ ∆l3 = − 0.5 0.75 10 = + 8 # 60 − (− 0.5) # 0.75 @ 0 − 10 − 0.5
= −7.5 + 5 + 3 = 0.5 V1 =
∆l1 = 7.25 = 23.2 V 0.3125 ∆l
V2 =
∆l 2 9 = = 28.8 V ∆l 0.3125
V3 =
∆l 3 = 0.5 = 1.6 V 0.3125 ∆l
Power supplied by 8 A current source = V1 × 8 = 23.2 × 8 = 185.6 W Power supplied by 10 A current source = (V2 − V3) × 10 = (28.8 − 1.6) × 10 = 272 W 1
EXAMPLE 1.47 Find the power in the 4 Ω resistor of the circuit shown in Fig. 1, using the node method.
1
1
10 A
SOLUTION
20 A
4
To estimate the power in the 4 Ω resistor, first we have to determine
Fig. 1.
the voltage across 4 Ω resistor. The given circuit has four nodes. Let us
1
choose one of the node as the reference node and it is indicated by 0. Let the voltages of other three nodes be V1, V2 and V3 as shown in Fig. 2. Now the voltage across 4 Ω resistor is V2 volts. ∴ Power in the 4 Ω resistor in watts =
V 22 . 4
The node basis matrix equation is formed by inspection using the
V1
1
1
V2
10 A
4
0
V3 20 A
Reference node
Fig. 2.
circuit shown in Fig. 2. The general node basis matrix equation for a circuit with three nodes excluding the reference is shown in equation (1). G11 G12 G13 G 22 G 23 H G31 G32 G33
>G21
V1
>V2 H V3
I11
=
>I22 H
.....(1)
I33
The elements of conductance matrix and source current matrix are formed as shown below: G11 = 1 + 1 = 2 1 1
G12 = G 21 = − 1 = − 1 1
I11 = 10
G 22 = 1 + 1 + 1 = 2.25 1 1 4
G13 = G31 = − 1 = − 1 1
I22 = 0
G33 = 1 + 1 = 2 1 1
G 23 = G32 = − 1 = − 1 1
I33 = 20
Chapter 1  Basic Circuit Analysis and Network Topology
1. 103
On substituting the above terms in equation (1), we get, 2
10 − 1 − 1 V1 2.25 − 1 H >V2 H = > 0 H 20 − 1 − 1 2 V3
>− 1
..... (2)
In order to solve the node voltage V2 , let us define two determinants D’ and D’2 as shown below: 2 −1 −1 ∆l = − 1 2.25 − 1 −1 −1 2
;
2 10 − 1 ∆l 2 = − 1 0 − 1 − 1 20 2
The determinants are evaluated by expanding along the first row and the node voltage V2 is solved by Cramer’s rule. 2 − 1 −1 ∆l = − 1 2.25 − 1 = 2 # 6 2.25 # 2 − (− 1) 2 @ − (− 1) # 6 − 1 # 2 − (− 1) 2 @ + (− 1) # 6(− 1) 2 − (− 1) # 2.25 @ −1 − 1 2 = 7 − 3 − 3.25 = 0.75 2 10 − 1 ∆l2 = − 1 0 − 1 = 2 # 60 − 20 # (− 1) @ − 10 # 6 − 1 # 2 − (− 1) 2 @ + ^− 1h # 6 − 1 # 20 − 0 @ − 1 20 2 = 40 + 30 + 20 = 90
` V2 =
∆l 2 = 90 = 120 V ∆l 0.75
Power in the 4Ω resistor
EXAMPLE 1.48
2 V2 = 3600 W = 42 = 120 4
(AU May’17, 6 Marks)
In the circuit shown in Fig. 1, write mesh equations by inspection and solve Vx and Ix. Verify the result by node analysis.
+ Vx E +
Ix
8
100 V
+ 40 V E
Fig. 1.
Method 1: Mesh Analysis The mesh currents and their direction are given in Fig 2. The
+ Vx E
circuit has three meshes. The general form of mesh basis matrix +
equation for three mesh circuit is shown in equation (1). R11 R12 R13 I1 E11 >R21 R22 R23 H >I2 H = >E22 H R31 R32 R33 I3 E33
4 10
4
E
SOLUTION
10
8
100 V E
Ix
I1
10
4
I3
Fig. 2.
The elements of the resistance matrix and source voltage matrix are formed as shown below: R11 = 8 + 4 = 12
R12 = R21 = −4
E11 = 100
R22 = 4 + 10 + 10 = 24
R13 = R31 = 0
E22 = 0
R33 = 10 + 4 = 14
R23 = R32 = −10
E33 = −40
+ 40 V
10 I2
..... (1)
4
E
Circuit Analysis
1. 104 On substituting the above terms in equation (2), we get mesh equation, 12
0 −4 24 − 10 H 0 − 10 14
I1
>−4
>I2 H I3
=
>
100 0 H − 40
.....(2)
Here, Ix = I2 and Vx = 10I2 In order to solve I2, two determinants ∆ and ∆2 are defined as shown below and evaluated by expanding along the first row and I2 is solved by Cramer’s rule. ∆ =
12 − 4 0 24 − 10 −4 0 − 10 14
= 12 # [24 # 14 − (− 10) 2] − (− 4) # 6 − 4 # 14 − 0 @ + 0 = 2608
12 100 0 0 − 10 = 12 # [0 − (− 40) # (− 10)] − 100 6 − 4 # 14 − 0 @ + 0 = 800 −4 0 − 40 14 T ` I x = I 2 = 2 = 800 = 0.30675 A T 2608 ∆2 =
Vx = 10Ix = 10 × 0.30675 = 3.0675 V Method 2: Node Analysis
Fig. 3.
Þ
4W

Fig. 4.
Fig.5.
The node basis matrix equation is formed by inspection using the circuit shown in Fig. 7. The general node basis matrix equation for a circuit with two nodes excluding the reference is shown in equation (3).
=
+
40 V
G11 G12 V1 I11 G = G = = G G 21 G 22 V2 I 22
Fig. 6. V1
+
Vx
E
V2
Ix 10 8
..... (3)
10
4
0
Is2 = 10 A

4W 8W
40 = 10 A 4
Þ
100 V
Is1 = 12.5 A
8W +
100 =12.5 A 8
Let us convert the voltage sources in Fig. 1 into current sources as shown below and redraw the circuit with current sources in Fig. 7.
4
Reference node
Fig. 7.
The elements of conductance matrix and source current matrix are formed as shown below: G11 = 1 + 1 + 1 = 0.475 8 4 10
I11 = 12.5
G12 = G21 = − 1 = − 0.1 10
I22 = 10
G22 = 1 + 1 + 1 = 0.45 10 10 4 On substituting the above terms in equation (3), we get the node equation,
=
0.475 − 0.1 V1 12.5 G = G = = G − 0.1 0.45 V2 10
..... (4)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 105
In order to solve the node voltages V1 and V2, let us define three determinants ∆l , ∆l1, and ∆l2 as shown below and evaluate by expanding along the first row and solve the node voltages by Cramer’s rule.
∆l =
0.475 − 0.1 − 0.1 0.45
= 0.475 # 0.45 − (− 0.1) 2 = 0.20375
∆l1 =
12.5 − 0.1 10 0.45
= 12.5 # 0.45 − 10 # (− 0.1) = 6.625
∆l 2 =
0.475 12.5 − 0.1 10
= 0.475 # 10 − (− 0.1) # 12.5 = 6
' ' ' ' ` Vx = V1 − V2 = 3 1 − 3 2 = 3 1 −'3 2 = 6.625 − 6 = 3.0675 V 0.20375 3 3 3
Ix =
Vx = 3.0675 = 0.30675 A 10 10
1.6.2 Node Analysis of Circuits Excited by Both Voltage and Current Sources Node analysis can be extended to circuits excited by both voltage and current sources. In such circuits if each voltage source has a series impedance then they can be converted into an equivalent current source with parallel impedance. After conversion, the circuit will have only current sources and so the procedure for obtaining node basis matrix equation by inspection and its solution discussed in Sections 1.6.1 and 1.6.4 can be directly applied to these circuits. In circuits excited by both voltage and current sources, the voltage source may not have series resistance. In this situation, the voltage source cannot be converted into a current source. In this case, the value of each voltage source is related to node voltages and for each voltage source one of the node voltages can be expressed in terms of source voltage and other node voltages. The remaining node voltages can be solved by writing Kirchhoff’s Current Law equations. Alternatively, the node basis matrix equation can be formed directly by inspection by taking the current delivered by the voltage sources as unknown and relating the value of each voltage source to node voltages. Here for each voltage source, one node voltage is eliminated by expressing the node voltage in terms of the source voltage and other node voltages. While forming the node basis matrix equation, the current of the voltage sources should be entered in the source matrix. Now in the matrix equation some node voltages will be eliminated and an equal number of unknown source currents will be introduced. Thus, the number of unknowns will remain the same as n, where n is the number of nodes in the circuit except the reference node. On multiplying the node basis matrix equation we get n equations which can be solved to give a unique solution for unknowns.
Circuit Analysis
1. 106
1.6.3 Supernode Analysis In circuits excited by both voltage and current sources, if a voltage source is connected between two nodes then the voltage source can be shortcircuited for analysis purpose and the shorted two nodes can be considered as one single node called supernode. In order to solve the two node voltages of a supernode, two equations are required. One of the equations is the KCL equation of the supernode and the other equation is obtained by equating the source voltage to the difference of the node voltages. An example of formation of a supernode is shown in Fig. 1.44. Also, Example 1.49 is solved using the supernode analysis technique. 5V
V1
V1 2
10 A
V2 4
2W 4W
Supernode
V2
+
V2 5
0
5W
V2 3
3W
Þ
V1 2
10 A
V2 4
4W 0
Reference node
Fig. a : Circuit with two independent nodes.
V2 5
2W
5W
V2 3
3W
Reference node
V1 V2 V2 V2 + + + = 10 2 4 5 3 V1  V2 = 5
Fig. b : Supernode of the circuit shown in Fig. a and its equations. Fig. 1.44 : Example of formation of a supernode.
EXAMPLE 1.49 In the circuit shown in Fig. 1, find the voltage across the 40 Ω resistor and the power supplied by 5 A source, using node analysis. 100 V E +
SOLUTION The given circuit has four nodes. In this one of the nodes is chosen +
E 60 V
as reference. Let the voltages of the other three nodes be V1, V2 and V3 as shown in Fig. 2. Here, the voltage sources do not have a resistance in
4A
25
5A
series and so they cannot be converted into a current source. Let Is1 and
20
40
Is2 be the currents supplied by 100 V and 60 V sources, respectively.
Fig. 1.
With reference to Fig. 2, we can write, V1 − V3 = 100 V and V2 − V1 = 60 V
+
100 V E
From the above equations we can say that node voltages V2 and circuit are three and they are V1, Is1 and Is2. Therefore, we can write three node equations using KCL (corresponding to three nodes) and a unique solution for unknowns can be obtained by solving the three equations. The node equations can be obtained by two methods.
5A
+ V1 E
E
+
Is1 V1
V3 can be expressed in terms of V1. Now the number of unknowns in the
V2
60 V Is2
20
25
0
V3 4A 40
Reference node
Fig. 2.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 107
Method I : Formation of node equations by applying KCL In this method, the node equations are formed using Kirchhoff’s Current Law. The node equation for a node is formed by equating the sum of currents leaving that node to the sum of currents entering that node. While writing the node equation for a node it is assumed that all the resistances connected to that node will draw current from that node. Hence, the currents in the resistances will always leave the node. With reference to Fig. 3, the node equation for node1 is formed as shown below:
5A
Is1
V1
E
Currents entering node1 : `
5 A, I s1 5A
V1 + Is2 = 5 + Is1 25
V2
Is2
60 V V1 25
0
0.04 V1 = 5 + I s1 − Is2
V3
+
:
+
Currents leaving node1
100 V E
V1 ,I 25 s2
Fig. 3.
..... (1)
With reference to Fig. 4, the node equation for node2 is formed as shown below: :
Is2
V2 20
V1
E
V2
V3
+
Current leaving node2
4A
60 V
Currents entering node2 : `
I s2, 4 A
V2 20
V2 = Is2 + 4 20 0
0.05 V2 = 4 + Is2
Fig. 4.
..... (2)
With reference to Fig. 5, the node equation for node3 is formed as shown below:
Current entering node3 :
V1
100 V E
Is1
+
V3 , I , 4A 40 s1
Currents leaving node3 :
V2
Nil
V3 4A
`
V3 40
V3 + Is1 + 4 = 0 40
0.025 V3 = − 4 − I s1
..... (3)
Fig. 5.
0
Equations (1), (2) and (3) are the node equations of the given circuit. On arranging equations (1) to (3) in the matrix form we get, 0.04 0 0 0 0.05 0H 0 0 0.025
>
V1
>V2 H V3
=
5 + Is1 − Is2 4 + Is2 H − 4 − Is1
>
.....(4)
Circuit Analysis
1. 108 Method II : Formation of node basis matrix equation by inspection
In this method, the node basis matrix equation is formed by inspection using the circuit shown in Fig. 2. G11 G12 G13 G 22 G 23 H G31 G32 G33
>G21
V1
I11
>V2 H
=
V3
>I22 H I33
G11 = 1 = 0.04 25 G 22 = 1 = 0.05 20 G33 = 1 = 0.025 40
.....(5)
G12 = G 21 = 0
I11 = 5 + Is1 − Is2
G13 = G31 = 0
I22 = 4 + Is2
G 23 = G32 = 0
I33 = − 4 − Is1
On substituting the above terms in equation (5), we get, 0.04 0 0 0 0.05 0H 0 0 0.025
>
V1
>V2 H
=
V3
5 + Is1 − Is2 4 + Is2 H − 4 − Is1
>
.....(6)
Solution of node voltages It is observed that the node basis matrix equation obtained by both the methods are the same. With reference to Fig. 2, the following relations can be obtained between node voltages: V2 − V1 = 60
V1 − V3 = 100
∴ V2 = 60 + V1
∴ V3 = V1 − 100
..... (7)
..... (8) Using equations (7) and (8), equation (6) can be written as shown in equation (9). 0.04 0 0 0 0.05 0H 0 0 0.025
>
V1 + V1 H = V1 − 100
> 60
5 + Is1 − Is2 4 + Is2 H − 4 − Is1
>
.....(9)
On multiplying the matrices on the lefthand side of equation (9) and equating to the terms on the righthand side, we get the following three equations: 0.04 V1 = 5 + I s1 − I s2
.....(10)
0.05 (60 + V1) = 4 + I s2
.....(11)
0.025 (V1 − 100) = − 4 − I s1
.....(12)
On adding the above three equations, we get, 0.04 V1 + 0.05(60 + V1 ) + 0.025 (V1 − 100) = 5 0.04 V1 + 3 + 0.05V1 + 0.025V1 − 2.5 = 5
Chapter 1  Basic Circuit Analysis and Network Topology
1. 109
0.115V1 + 0.5 = 5 V1 = 5 − 0.5 = 39.13 V 0.115 ∴ V1 = 39.13 V From equation (7), V2 = 60 + V1 = 60 + 39.13 = 99.13 V From equation (8),
V3 = V1 − 100 = 39.13 −100 = − 60.87 V
With reference to Fig. 2, the voltage across the 40 Ω resistor is V3. ∴ Voltage across the 40 Ω resistor = V3 = − 60.87 V The negative voltage across the 40 Ω resistor indicates that the current through the 40 Ω is flowing towards the node. (Remember that while forming node equations it is assumed that the currents through resistances are leaving the node.) If we are interested in positive voltage across the 40 Ω resistor then the polarity of voltage across the V3 40 Ω resistor is assumed as shown in Fig. 6. E Now, V40 = − V3 = −(−60.87) 40
V40
= 60.87 V With reference to Fig. 2, we can say that the voltage across 5 A current source is V1.
+
Fig. 6.
∴ Power supplied by 5 A source = V1 × 5 = 39.13 × 5 = 195.65 W
EXAMPLE 1.50 In the circuit shown in Fig. 1, find the value of E using node analysis which will make the voltage across 10 Ω resistance as zero.
+
2
2A
A E
5V
SOLUTION
as reference. Let the voltages of other four nodes be V1, V2, V3 and V4 as
3
2 +
20 V E
E E
10
+
The given circuit has five nodes. In this one of the nodes is chosen shown in Fig. 2. Here, the voltage sources do not have series resistances
Fig. 1.
and so they cannot be converted into a current source. Let us treat the
V4
currents supplied by the voltage sources as unknown quantities, and the values of voltage sources can be related to node voltages. Let I s1, I s4 and
G13 G 23 G33 G 43
R V R V S V1 W SI11 W S V2 W SI 22 W S V W = SI W S 3 W S 33 W S V4 W SI 44 W T X T X
+
10
Is1
0
.....(1)
Is3
E E
+
20 V E
V3 3
2 +
G12 G 22 G32 G 42
V G14 W G 24 W G34 WW G 44 W X
Is4 E 5 V V2
V1
inspection using the circuit shown in Fig. 2. R S G11 SG 21 SG S 31 SG 41 T
A
I s3 be the currents supplied by the 20 V, 5 V and E volt sources, respectively. The node basis matrix equation of the given circuit is formed by
2
2A
Reference node
Fig. 2.
Circuit Analysis
1. 110 G11 = 1 2 G 22 = 1 + 1 + 1 2 10 3 = 15 + 3 + 10 = 28 = 14 30 30 15 G33 = 1 3 G 44 = 0
G12 = G 21 = − 1 2 G13 = G31 = 0 G14 = G 41 = 0 G 23 = G32 = − 1 3 G 24 = G 42 = 0
V1 = 20 V2 = 0 (given)
I11 = Is1 − 2 I 22 = − Is4 I33 = − Is3 + 2 I 44 = 2 + Is4 − 2 = Is4
G34 = G 43 = 0
V4 − V2 = 5 ` V4 = 5 V3 = − E
On substituting the above terms in equation (1), we get, V R 1 V R R V 0 0 W S 20 W −1 S S Is1 − 2 W 2 2 W W S W S S S− 1 14 − 1 0 W S 0 W S − Is4 W W = S W S 2 15 3 W S W S S 1 1 0 W SS− E WW I 2 − + 0 − W S S s3 3 3 WW S W SS S S Is4 WW 0 0 0 0W S 5 W X T X T T X
.....(2)
From row4 of equation (2), we get, I s4 = 0
..... (3)
From row2 of equation (2), we get, c−
1 # 20 + 14 # 0 + − 1 # (− E) + (0 # 5) = − I m c m c m s4 2 15 3 − 10 + 0 + E + 0 = − Is4 3 `
E = − I + 10 s4 3
.....(4)
From equation (3), we know that, I s4 = 0, ` E = 0 + 10 3 E = 10 # 3 = 30 V
EXAMPLE 1.51 5
10 2A
20
+
In the circuit shown in Fig. 1, determine the current delivered by 24 V source using node analysis.
E 36 V
Fig. 1. V1 10
5 Is1
V2
20 V 3
2A
+
+
The given circuit has only two principal nodes. Let us choose one of the principal nodes as reference and the voltage of the other principal node as V1, as shown in Fig. 2. Let us take the voltage at the meeting point of 5 Ω and 24 V source as V2 and the voltage at the meeting point of 10 Ω and 36 V as V3. With reference to Fig. 2, we can say that,
+
24 V E
SOLUTION
24 V E
V2 = 24 V
and V3 = 36 V
E 36 V
0
Reference node
Fig. 2.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 111
With reference to Fig. 3, the node equation for node1 can be written as shown below : Currents leaving node1 : V1 − V2 , V1 − V3 , V1 5 10 20 Current entering node1 : 2 A `
V −V V1 − V2 V + 1 3 + 1 = 2 5 10 20
V1
2A
V1 E V2 5
V V1 V2 V V − + 1 − 3 + 1 = 2 5 5 10 10 20
V2
V V ` c 1 + 1 + 1 m V1 = 2 + 2 + 3 5 10 5 10 20 Put,
V1 E V3 10
V1 20
2A
0
0
V3
Fig. 3.
V2 = 24 and V3 = 36 ` c 1 + 1 + 1 m V1 = 2 + 24 + 36 5 10 20 5 10 (0.2 + 0.1 + 0.05) V1 = 2 + 4.8 + 3.6 0.35V1 = 10.4 ` V1 = 10.4 = 29.7143 V 0.35
Let, I s1 be the current delivered by 24 V source as shown in Fig. 2. Is1 =
V2 − V1 = 24 − 29.7143 = − 1.1429 A 5 5
Since the current delivered by 24 V source is negative, we can say that it absorbs power instead of delivering power.
EXAMPLE 1.52
2 2
1
In the circuit shown in Fig. 1, solve the voltages across various elements using node method and determine the power in each element of the circuit.
2A +
E
+
6V E
2V
Fig. 1.
SOLUTION
The given circuit has five nodes and in this only two nodes are principal nodes. Let us choose one of the nodes as the reference node, which is indicated by 0. The voltage of the reference node is zero volt. Let us choose three other nodes and assign node voltages V1, V2 and V3 as shown in Fig. 2. Let the current delivered by 2 V and 6 V sources be I s1 and I s2 , respectively. With reference to Fig. 2, the following relation can be obtained for node voltages: 2
V1 = 2 V
;
V3
V2 − V1 = 6 V
2
1
Is2
+
In the circuit shown in Fig. 2, the voltage V 1 and V2 are known quantities, but the currents I s1 and I s2 are unknown quantities. Hence, the total number of unknowns are three (i.e., V 3, I s1 and I s2 ) and so three node equations can be formed and they can be solved to give a unique solution.
E 6V
2A
0
V2 Is1
E 2V
+
∴ V2 = 6 + V1 = 6 + 2 = 8 V
V1 Reference node
Fig. 2.
Circuit Analysis
1. 112
Using Fig. 2, the node basis matrix equation is formed by inspection as shown below: G11 G12 G13 G 22 G 23 H G31 G32 G33
>G21
V1
>V2 H
I11
=
V3
>I22 H I33
.....(1)
G12 = G 21 = 0 V1 = 2 I11 = Is1 + 2 − Is2 1 1 G13 = G31 = 0 V2 − V1 = 6 I 22 = Is2 = = 1+2 3 − 1 = − 1 I33 = − 2 ` V2 = 6 + V1 = 6 + 2 = 8 G G = = 23 32 1+2 3 = 1 +1 = 1 +1 = 5 1+2 2 3 2 6
G11 = 0 G 22 G33
On substituting the above terms in equation (1), we get, R V R V R V 0 W S2 W SIs1 + 2 − Is2 W S0 0 1 1 W S0 − W S8 W = S Is2 3W S W 3 S W S S W S W S0 − 1 5 W S V W S W 3 S W 2 − 3 6 T X T X T X
..... (2)
The node equations are obtained by multiplying the matrices on the lefthand side and equating to the terms on the righthand side. From row1 we get, From row2 we get, From row3 we get,
0 = I s1 + 2 − I s2
⇒
8−1 V = I ⇒ s2 3 3 3 − 8 + 5 V3 = − 2 3 6
I s1 = −2 + I s2
..... (3)
8 − V3 3
.....(4)
Is2 =
.....(5)
From equation (5), we can write, V3 = 6 # c − 2 + 8 m = 6 c − 6 + 8 m = 12 = 0.8 V 3 5 3 15 5 On substituting, V3 = 0.8 in equation (4), we get, Is2 =
8 − V3 = 8 − 0.8 = 2.4 A 3 3
On substituting, I s2 = 2.4 A in equation (3), we get, I s1 = −2 + I s2 = −2 + 2.4 = 0.4 A
Let the voltage across the resistances be Va , Vb and Vc and the voltage across 2 A source be E 2 as shown in Fig. 3. Now,
Va = 1 × I s2 = 1 × 2.4 = 2.4 V Vb = 2 × I s2 = 2 × 2.4 = 4.8 V Vc = 2 × Is1 = 2 × 0.4 = 0.8 V E 2 = V1 − V3 = 2 − 0.8 = 1.2 V
Va
1
+
Vb _ V3 +
2
Vc
E 6V
Is1
_ E2
0
V2 Is2
2
E 2V
2A +
+
+ _
+
In Fig. 2 it can be observed that the current through series combination of 1 Ω and 2 Ω is Is2 and the current through the 2 Ω resistance in series with 2 V source is Is1. Now, the voltage across the resistances are given by the product of current and resistance.
V1 Reference node
Fig. 3.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 113
Estimation of power in each element In dc circuits, the power in an element is given by the product of voltage and current in that element. The resistances always absorb power. The sources can either deliver power or absorb power. In a source if the current leaves at the positive end of the source then it delivers power. Power consumed by the 1 Ω resistor = Va × I s2 = 2.4 × 2.4 = 5.76 W Power consumed by the 2 Ω resistor = Vb × I s2 = 4.8 × 2.4 = 11.52 W Power consumed by the 2 Ω resistor = V × I = 0.8 × 0.4 = 0.32 W 1 c s1 in series with 2 V source Power delivered by 6 V source
= 6 × I s2 = 6 × 2.4 = 14.4 W
Power delivered by 2 V source
= 2 × I s1 = 2 × 0.4 = 0.8 W
Power delivered by 2 A source
= E 2 × 2 = 1.2 × 2 = 2.4 W
Note : It is observed that the sum of power delivered (14.4 + 0.8 + 2.4 = 17.6 W) is equal to the sum of power consumed (5.76 + 11.52 + 0.32 = 17.6 W).
EXAMPLE 1.53 Use nodal analysis to determine the values of voltages at various
+
E 2V
nodes in the circuit shown in Fig. 1.
3
2
SOLUTION 2
4
1A
The given circuit has four nodes. In this one of the node is chosen as
the reference node and it is indicated by 0. The voltage of the reference node
Fig. 1.
is zero. Let the voltages of the other three nodes be V1, V2 and V3 with respect
2V E +
to the reference node, as shown in Fig. 2. The voltage source in the circuit does not have series resistance and so it cannot be converted into a current
Is3
source. Let I s3 be the current supplied by the 2 V source. With reference to
3
⇒
2
2
V2
V1
Fig. 2, we can write, V3 − V1 = 2 V
V3
1A
4
V3 = 2 + V1 0
From the above equation we can say that the node voltage V3 can be expressed in terms of V1. Now, the number of unknowns in the circuit are three
Reference node
Fig. 2.
and they are V1, V2 and I s3 . Therefore, we can write three node equations using KCL (corresponding to three nodes) and a unique solution for unknowns can be obtained by solving the three equations. The node basis matrix equation for the circuit shown in Fig. 2 is obtained by inspection as shown below: G11 G12 G13 G 22 G 23 H G31 G32 G33
>G21
V1
>V2 H
G11 = 3 + 2 = 5 G 22 = 3 + 2 = 5 G33 = 2 + 4 = 6
V3
I11
=
>I22 H
.....(1)
I33
G12 = G 21 = − 3 G13 = G31 = 0 G 23 = G32 = − 2
I11 = − Is3 V3 − V1 = 2 I 22 = 1 ` V3 = 2 + V1 I33 = Is3
Circuit Analysis
1. 114 On substituting the above terms in equation (1), we get, 5 −3 0 5 − 2H 0 −2 6
>− 3
>
V1 V2 H = 2 + V1
>
− Is3 1H Is3
.....(2)
The node equations of the circuit are obtained by multiplying the matrices on the lefthand side of equation (2) and equating to the terms on the righthand side. From row1, we get, 5 V1 − 3V2 = − Is3
..... (3)
From row2, we get, − 3 V1 + 5V2 − 2 × (2 + V1) = 1 ⇒ − 3 V1 + 5V2 − 4 − 2V1 = 1 ⇒ − 5 V1 + 5V2 = 5
..... (4)
From row3, we get, − 2 V2 + 6 × (2 + V1) = Is3
⇒
⇒ 6 V1 − 2V2 = Is3 − 12
−2 V2 + 12 + 6V1 = Is3
..... (5)
On adding equations (3), (4) and (5), we get,
⇒
5 V1 − 3V2 − 5V1 + 5V2 + 6V1 − 2V2 = − Is3 + 5 + I s3 − 12
6 V1 = −7
` V1 = − 7 = − 1.1667 V 6 5 + 5 # (− 1.1667) 5 + 5 V1 = − 0.1667 V = 5 5 With reference to Fig. 2, we can write, From equation (4), we get,
V2 =
V3 − V1 = 2 ∴
V3 = 2 + V1 = 2 + ( −1.1667) = 0.8333 V
The node voltages are, V1 = −1.1667 V ;
V2 = −0.1667 V
and
V3 = 0.8333 V
EXAMPLE 1.54
(AU June’14, 8 Marks) 3
Use nodal analysis to determine the values of voltages at various nodes in the circuit shown in Fig. 1.
10
3
2
SOLUTION The given circuit has five nodes. In this one of the nodes is chosen as the reference. Let the voltages of the other four nodes be V1, V2, V3 and V4 as shown in Fig. 2. Here, V4 = 10 V. Let us convert the 10 V voltage source in series with 10 Ω resistance into equivalent current source as shown in Fig. 3.
+ 10 V
3W V1
2W
Fig. 1.
V1
V3

3W
V2 2W
V3
V2
+ 10 V
1
5A
3W
3W V4 10 W
S
E
5W
5A
0
Fig. 2.
1W
6W
Þ
10 = 1A 10
10W
5W
5A
0
Reference node
Fig. 3.
1W
6W
Reference node
6
Chapter 1  Basic Circuit Analysis and Network Topology
1. 115
The node basis matrix equation is formed by inspection using the circuit shown in Fig. 3. G11 G12 G13 G 22 G 23 H G31 G32 G33
>G21
V1
>V2 H
I11
=
V3
>I22 H I33
.....(1)
With reference to Fig. 3, the elements of conductance matrix and source current matrix are obtained as shown below: G11 = 1 + 1 + 1 + 1 = 0.9967 10 5 3 3
G12 = G 21 = − c 1 + 1 m = − 0.6667 3 3
I11 = 1
G22 = 1 + 1 + 1 = 1.1667 3 3 2 1 G33 = + 1 + 1 = 1.6667 2 1 6
G13 = G31 = 0
I22 = 5
G23 = G32 = − 1 = − 0.5 2
I33 = 0
On substituting the above terms in equation (1), we get, R V R V R V 0 W S V1 W S1 W − 0.6667 S 0.9667 S− 0.6667 1.1667 − 0.5 WW S V2 W = SS5 WW S S W S 0 1.6667 W S V3 W S0 W − 0.5 T X T X T X To solve the node voltages V1 , V2 and V3, let us define shown below: 0.9667 − 0.6667 0 ∆l = − 0.6667 1.1667 ∆l1 = − 0.5 0 − 0.5 1.1667 0.9667 ∆l2 = − 0.6667 0
1 5 0
0 − 0.5 1.1667
four determinants ∆l , ∆l1, ∆l2 and ∆l3 as 1 − 0.6667 5 1.1667 0 − 0.5
0 − 0.5 1.1667
0.9667 − 0.6667 ∆l3 = − 0.6667 1.1667 0 − 0.5
1 5 0
The determinants are evaluated by expanding along the first row and node voltages are solved by Cramer’s rule. 0.9667 − 0.6667 0 ∆l = − 0.6667 1.1667 − 0.5 = 0.9667 # 61.1667 # 1.6667 − ^− 0.5h2 @ + 0 − 0.5 1.6667 0.6667 # 6 − 0.6667 # 1.6667 − 0 @ 1 ∆l1 = 5 0
− 0.6667 1.1667 − 0.5
= 0.8972 0 2 − 0.5 = 1 # 91.1667 # 1.6667 − _− 0.5 i C + 0.6667 # 75 # 1.6667 − 0 A 1.6667 = 7.2505
0.9667 1 0 ∆l2 = − 0.6667 5 − 0.5 = 0.9667 # 65 # 1.6667 − 0 @ − 1 # 6 − 0.6667 # 1.6667 − 0 @ 0 0 1.6667 = 9.1672 0.9667 ∆l3 = − 0.6667 0
− 0.6667 1.1667 − 0.5
1 5 = 0.9667 # 60 + 0.5 # 5 @ + 0.6667 # 60 − 0 @ + 1 # 60.6667 # 0.5 − 0 @ 0 = 2.7501
Circuit Analysis
1. 116 ' V1 = 3 1 = 7.2505 = 8.0813 V 0.8972 3 ' V2 = 3 2' = 9.1672 = 10.2176 V 0.8972 3 ' V3 = 3 3' = 2.7501 = 3.0652 V 0.8972 3
The node voltages are, V1 = 8.0813 V ;
V2 = 10.2176 V ;
V3 = 3.0652 V
and
V4 = 10 V
(AU Dec’14, 12 Marks)
EXAMPLE 1.55 10
25 A
SOLUTION
1
20 A
4
10
2
+
Determine the node voltages and the currents across all the resistors of the circuit shown in Fig. 1, using the node method.
E 20 V
Solution of node voltages The given circuit has four nodes. In this one
Fig. 1.
of the nodes is chosen as the reference node, which
V1 10 V2
1
V3
is indicated by 0. The voltage of the reference node is Is
zero volt. Let us choose three other nodes and assign 25 A
4
2
10
E 20 V
+
node voltages V1, V2 and V3 as shown in Fig. 2. Let the
20 A
current delivered by 20 V source be I s . With reference to Fig. 2, we get,
0
Fig. 2.
V3 = 20 V
Reference node
From the above equation we can say that the node voltage V3 is a known quantity. Now, the number of unknowns in the circuit are three and they are V1, V2 and I s . Therefore, we can write three node equations using KCL (corresponding to three nodes) and a unique solution for unknowns can be obtained by solving the three equations. The node basis matrix equation for the circuit shown in Fig. 2 is obtained by inspection as shown below: G11 G12 G13 G > 21 G22 G23 H G31 G32 G33
V1 V > 2H = V3
G11 = 1 + 1 = 0.35 4 10 G 22 = 1 + 1 + 1 = 1.6 10 2 1 1 G33 = + 1 = 1.1 1 10
I11 I > 22 H I33
.....(1)
G12 = G 21 = − 1 = − 0.1 10 G13 = G31 = 0 G 23 = G32 = − 1 = − 1 1
On substituting the above terms in equation (1), we get, R V 0.35 − 0.1 0 V1 S25 W >− 0.1 1.6 − 1 H > V2 H = S20 W SS I WW 0 − 1 1.1 20 s T X
V3 = 10 V
.....(2)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 117
The node equations of the circuit are obtained by multiplying the matrices on the lefthand side of equation (2) and equating to the terms on the righthand side. From row1, we get, 0.35V1 − 0.1 V2 = 25
.....(3)
From row2, we get,
⇒
− 0.1V1 + 1.6 V2 − 20 = 20
− 0.1 V1 + 1.6 V2 = 40
.....(4)
On multiplying equation (3) by 16, we get, 5.6 V1 − 1.6 V2 = 400
.....(5)
On adding equations (4) and (5), we get, − 0.1 V1 + 1.6 V2 + 5.6 V1 − 1.6 V2 = 40 + 400
⇒
5.5 V1 = 440
` V1 = 440 = 80 V 5.5 From equation (2), we get, V2 =
40 + 0.1 V1 = 40 + 0.1 # 80 = 30 V 1.6 1.6
The node voltages are, V1 = 80 V
;
V2 = 30 V
and
V3 = 20 V
To solve branch voltages and currents The given circuit has five resistance branches. Let us denote the resistance branch voltages as Va, Vb, Vc, Vd and Ve and resistance branch currents as Ia, Ib, Ic, Id and Ie , as shown in Fig. 3. The signs of branch voltages and currents are chosen such that they are all positive. The branch voltages and currents are solved as shown below: Va = V1 = 80 V Vb = V1− V2 = 80 − 30 = 50 V Vc = V2 = 30 V Vd = V2 − V3 = 30 − 20 = 10 V Ve = V3 = 20 V Va = 80 = 20 A 4 4
Ib =
Vb = 50 = 5 A 10 10
V Ic = c = 30 = 15 A 2 2 Id =
Vd = 10 = 10 A 1 1
V Ie = e = 20 = 2 A 10 10
V1 Ib 10 V2 E + Vb
Id Ic
Ia + 25 A
Va E
+ 4
1 V3 E Vd Ie
+
20 A V
c
E
Fig. 3.
2
+ Ve E
10
+
Ia =
E 20 V
Circuit Analysis
1. 118
EXAMPLE 1.56
(AU May’15, 16 Marks) 10
Use nodal analysis to solve the circuit shown in Fig.1.
2
1
SOLUTION 4
5
Let the node voltages be V 1 and V 2 . Let us convert the 25 V voltage source in series with 5 Ω resistance into an equivalent current source as shown in Fig. 2. Similarly, convert the 50 V voltage source in series with 2 Ω resistance into an equivalent current source as shown in Fig. 2.The node basis matrix equation of the given circuit is formed by inspection using the as circuit shown in Fig. 2.
25V
0
Fig. 1. V2 25 a 5A 5
4
5
2
.....(1)
50 a 25A 2
2
With reference to Fig. 2, the elements of conductance matrix and source current matrix are obtained as shown below :
50V Reference node
10
V1
I11 G11 G12 V1 G = G = = G I 22 G21 G22 V2
2
E
E +
=
+
2
0
Reference node
Fig. 2. G11 = 1 + 1 + 1 = 0.8 2 5 10
G12 = G21 = − 1 = − 0.1 10
G22 = 1 + 1 + 1 = 0.85 10 4 2
I11 = 5
I22 = − 25
On substituting the above terms in equation (1), we get, R VR V R V S 0.8 − 0.1 W S V1 W S 5 W W S WS W = S S WS W S W S− 0.1 0.85 W S V2 W S− 25 W T XT X T X In order to solve the node voltages V1 and V2, let us define three determinants ∆’, ∆’1 and ∆’2 as shown below: 0.8 − 0.1 ; − 0.1 0.85
∆l =
∆l1 =
5 − 0.1 ; − 25 0.85
∆l 2 =
0.8 5 − 0.1 − 25
The determinants are evaluated by expanding along the first row and the node voltages are solved by Cramer’s rule. 0.8
∆l =
− 0.1 5
∆l1 =
− 25
∆l 2 =
− 0.1 = 0.8 0.85 − ^− 0.1h2 = 0.67 # 0.85 − 0.1 = 5 0.85 − _− 25i _− 0.1i = 1.75 # # 0.85
0.8 5 = 0.8 _− 25 i − _− 0.1 i 5 = − 19.5 # # − 0.1 − 25
V1 =
∆l1 = 1.75 = 2.6119 V 0.67 ∆
V2 =
∆l 2 = − 19.5 = − 29.1045 V 0.67 ∆
Chapter 1  Basic Circuit Analysis and Network Topology
1. 119
EXAMPLE 1.57 1
5
Determine the node voltages and, hence, the power supplied by a 5 A source into the circuit shown in Fig. 1, using supernode analysis technique.
5A
+E
6V 2
SOLUTION
4
Fig. 1.
Let us choose the reference node 0 and three node voltages V1,
V1
V2 and V3 as shown in Fig. 2. Now, the voltage across 5 A source is V1 and the power delivered by 5 A source is V1 ´ 5 watts
⇒
V2 − V3 = 6
1
5
With reference to Fig. 2, the relation between node voltages V2 and V3 is, V3 = V2 – 6
5A
.....(1)
Is2
+ V 1 V2 _
V3
+E
6V
Let us shortcircuit node2 and node3 to form a supernode as shown in Fig. 3.
2
4 Reference node
0 V1
V1
V1 V3  V1 1
5W +
V2
V2 2
6V
V2 2
4W
2W 0
1W
V2  V1 5
Þ
V3
V3 4
V3  V1 1
5W
1W
V2  V1 5 
Fig. 2.
V1
Supernode V3 4
4W
2W
0
0
0
Fig. 3 : Formation of a supernode. The KCL equation of the supernode is formed as shown below: V −V V V2 − V1 V + 3 1 + 2 + 3 = 0 5 1 2 4 0.2V2 − 0.2V1 + V3 − V1 + 0.5V2 + 0.25V3 = 0 – 1.2V1 + 0.7V2 + 1.25V3 = 0 Using equation (1)
– 1.2V1 + 0.7V2 + 1.25 (V2 – 6) = 0 – 1.2 V1 + 1.95V2 – 7.5 = 0 ` V2 =
7.5 + 1.2 V1 = 7.5 + 1.2 V1 = 3.8462 + 0.6154 V1 1.95 1.95 1.95
.....(2)
With reference to Fig. 4, the KCL equation of node1 is formed as shown below: V1
V −V V1 − V 2 + 1 3 = 5 5 1 5
0.2V1 − 0.2V2 + V1 – V3 = 5
5A V2
1.2V1 – 0.2V2 – (V2 – 6) = 5
1
V1 E V2 5
V1 E V3 1
Fig. 4. 1.2V1 – 1.2V2 = 5 – 6
Using equation (1)
V3
Circuit Analysis
1. 120 1.2 V1 – 1.2(3.8462 + 0.6154V1) = –1
Using equation (2)
1.2 V1 – 4.6154 – 0.7385V1 = –1 0.4615V1 = 3.6154 ` V1 = 3.6154 = 7.834 V 0.4615 From equation (2), V2 = 3.8462 + 0.6154 V1 = 3.8462 + 0.6154 × 7.834 = 8.6672 V From equation (3), V3 = V2 – 6 = 8.6672 – 6 = 2.6672 V Power supplied by 5 A source = V1 × 5 = 7.834 × 5 = 39.17 W
1.6.4
Node Analysis of Circuits Excited by AC Sources (Nodal Analysis of Reactive Circuits)
Reactive circuits consist of resistances, inductive and capacitive reactances. Therefore, the voltages and currents of reactive circuits are complex (i.e., they have both real and imaginary components). In general, the elements of a circuit are referred to as impedances. In node analysis, the admittance (which is the inverse of impedance) is more convenient. The general node basis matrix equation for reactive circuit is, YV=I
..... (1.40)
where, Y = Admittance matrix of order n × n V = Node voltage matrix of order n × 1 I = Source current matrix of order n × 1 n = Number of nodes except the reference node. Equation (1.40) can be expanded as shown in equation (1.41). R V R V R V S Y11 Y12 Y13 g Y1n W S V1 W S I11 W S Y21 Y22 Y23 g Y2n W S V2 W SI 22 W S W S W S W S Y31 Y32 Y33 g Y3n W S V3 W = S I33 W S h Sh W h h h W Sh W SS W S W SS WW Yn1 Yn2 Yn3 g Ynn W S Vn W I nn T X T X T X Note : The over bar is used to denote complex quantities.
..... (1.41)
The formation of node basis matrix equation and the solution of node and branch voltages are similar to that of resistive circuits except that the solution of voltages involves complex arithmetic. Therefore, the k t h node voltage of a reactive circuit with n nodes excluding reference is given by, Vk = 1 ∆l
n
/ ∆l
jk
I jj
Note : Refer equation (1.37) ..... (1.42)
j =1
where, ∆l jk = Cofactor of Yjk I jj
= Sum of current sources connected to j th node
∆l = Determinant of admittance matrix.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 121
Instead of using equation (1.42) for solution of node voltages, the shortcut procedure for Cramer’s rule can be followed. Consider the node basis matrix equation for a circuit with three nodes except the reference node. Y11 Y12 Y13 >Y21 Y22 Y23 H Y31 Y32 Y33
V1 I11 >V2 H = >I22 H V3 I33
Let us define four determinants as shown below: Y11 Y12 Y13 ∆l = Y21 Y22 Y23 ; Y31 Y32 Y33
I11 Y12 Y13 ∆l1 = I 22 Y22 Y23 I33 Y32 Y33
Y11 I11 Y13 ∆l 2 = Y21 I 22 Y23 ; Y31 I33 Y33
Y11 Y12 I11 ∆l3 = Y21 Y22 I 22 Y31 Y32 I33
Here, ∆’ = Determinant of admittance matrix ∆’1 = Determinant of admittance matrix after replacing the first column of admittance matrix by source current column matrix ∆’2 = Determinant of admittance matrix after replacing the second column of admittance matrix by source current column matrix ∆’3 = Determinant of admittance matrix after replacing the third column of admittance matrix by source current column matrix. Now, node voltages V1, V2 and V3 are given by, V1 =
∆l1 ∆l
V2 =
∆l 2 ∆l
V3 =
∆l 3 ∆l
EXAMPLE 1.58
Let us convert the 100∠0 o V voltage source in series with 3 + j4 Ω impedance into a current source IS in parallel with 3 + j4 Ω impedance.
~
4  j3 W
10 W
~ Fig. 1.
10Ð45o A
SOLUTION
100Ð0oV
3 + j4 W
Determine the power consumed by the 10 Ω resistor in the circuit shown in Fig. 1, using nodal analysis.
3W
Circuit Analysis
1. 122
100Ð0oV
3 + j4 W +
Þ
~
_
I s = 20Ð  53.13o A
3 + j4 W
~
o IS = 100+0 = 100 = 12 − j16 A = 20+ − 53.13 o A 3 + j4 3 + j4
The modified circuit is shown in Fig. 2. The circuit of Fig. 2 has three nodes. Let us choose one of the
The node basis matrix equation of the circuit of Fig. 2. is formed by inspection as shown below:
=
Y11 Y12 V1 I11 G = G = = G Y21 Y22 V2 I 22
~
3 + j4 W
be V1 and V2 with respect to the reference node, as shown in Fig. 2.
Is = 20Ð53.13o A
the reference node is zero. Let the voltages of the other two nodes
4  j3 W
V1
10 W
~ 0
V2
10Ð45o A
nodes as the reference node, which is denoted as 0. The voltage of
3W
Reference node
Fig. 2. ..... (1)
Y11 =
1 1 + + 1 = 0.38 − j0.04 3 + j4 4 − j3 10
Y22 =
1 + 1 = 0.493 + j0.12 4 − j3 3
Y12 = Y21 = − c 1 m = − 0.16 − j0.12 4 − j3 I11 = 20+ − 53.13 o = 20 cos (− 53.13) + j20 sin (− 53.13) = 12 − j16 I 22 = − 610+45 o @ = − (10 cos 45 o + j10 sin 45 o) = − 7.071 − j7.071 Note : All calculations are performed using the calculator in complex mode. On substituting the above terms in equation (1), we get,
=
0.38 − j0.04 − 0.16 − j0.12
12 − j16 − 0.16 − j0.12 V1 G = G = = G 0.493 + j0.12 − 7.071 − j7.071 V2
..... (2)
To determine the power consumed by the 10 Ω resistance, it is sufficient if we calculate V1 in equation (2). In order to solve V1, let us define two determinants ∆l and ∆l1 as shown below: ∆l =
0.38 − j0.04 − 0.16 − j0.12
− 0.16 − j0.12 ; 0.493 + j0.12
Now, the voltage V1 is given by, V1 = ∆l =
0.38 − j0.04 − 0.16 − j0.12
∆l1 =
12 − j16 − 7.071 − j7.071
− 0.16 − j0.12 0.493 + j0.12
∆l1 . ∆l
− 0.16 − j0.12 = 6(0.38 − j0.04) # (0.493 + j0.12) @ − [− 0.16 − j0.12] 2 0.493 + j0.12 = 0.1809 − j0.0125
Chapter 1  Basic Circuit Analysis and Network Topology ∆l1 =
1. 123
12 − j16 − 0.16 − j0.12 = 6(12 − j16) # (0.493 + j0.12) @ − 7.071 − j7.071 0.493 + j0.12 − 6(− 7.071 − j7.071) # (− 0.16 − j0.12) @ = 7.5532 − j8.4279 7.5532 − j8.4279 ∆l1 = = 44.759 − j43.496 = 62.412+ − 44.2 o V ∆l 0.1809 − j0.0125
` V1 =
Power consumed by the 10 Ω resistor =
V1 10
2
2 = 62.412 = 389.5 W 10
EXAMPLE 1.59
j3 W
Find the voltages across various elements in the circuit shown in Fig. 1, using node method.
~
3W
and three nodes. Hence, the circuit will have six voltages corresponding to
6W
~
10Ð0o A
The graph of the given circuit is shown in Fig. 2. It has six branches
5Ð90o A
SOLUTION
j5 W
Fig. 1.
six branches. The branch voltages depend on the node voltages. In node analysis, the voltage of one of the nodes is chosen as the reference and it is equal to zero volt. In the circuit of Fig. 3, the reference node is denoted as 0. The voltages of the other two nodes are denoted as V1 and V2 . j3 W
e c
b
0
5Ð90o A
a
V1
d
~
j5 W
6W
3W
0
Reference node
Fig. 2.
V2
~
10Ð0o A
f
Reference node
Fig. 3.
The node basis matrix equation of the circuit shown in Fig. 3 is obtained by inspection as shown below:
=
..... (1)
Y11 Y12 V1 I11 G = G = = G Y21 Y22 V2 I 22
Y11 = 1 + 1 + 1 = 0.333 − j0.133 3 j3 − j5
I11 = 5+90 o = j5
Y22 = 1 + 1 + 1 = 0.167 − j0.133 j3 6 − j5
I 22 = 10+0 o = 10
Y12 = Y21 = − c 1 + 1 m = j0.133 j3 − j5 On substituting the above terms in equation (1), we get,
=
0.333 − j0.133 j0.133
j0.133 G 0.167 − j0.133
=
j5 V1 G = = G 10 V2
.....(2)
Circuit Analysis
1. 124
To solve the node voltages by Cramer’s rule, let us define three determinants ∆l , ∆l1 and ∆l2 as shown below: j0.133 j5 j0.133 0.333 − j0.133 0.333 − j0.133 j5 ; ∆l1 = ; ∆l2 = ∆l = j0.133 0.167 − j0.133 10 0.167 − j0.133 j0.133 10 Now, the node voltages are given by, V1 = ∆l =
0.333 − j0.133 j0.133
j0.133 = 6(0.333 − j0.133) # (0.167 − j0.133) @ − [j0.133] 2 0.167 − j0.133
= 0.0556 − j0.0665 j0.133 = 6 j5 # (0.167 − j0.133) @ − 610 # j0.133 @ 0.167 − j0.133 = 0.665 − j0.495
j5 ∆l1 = 10 ∆l 2 =
∆l1 ∆l 2 and V2 = . ∆ ∆
0.333 − j0.133 j5 = 6(0.333 − j0.133) # 10 @ − 6 j0.133 # j5 @ j0.133 10 = 3.995 − j1.33
` V1 = V2 =
0.665 − j0.495 ∆l1 = = 9.302 + j2.2227 = 9.564+13.4 o V ∆l 0.0556 − j0.0665 3.995 − j1.33 ∆l 2 = = 41.3339 + j25.5163 = 48.575+31.7 o V ∆l 0.0556 − j0.0665
To find branch voltages The branch voltages are denoted by Va, Vb, Vc, Vd, Ve and Vf , as shown in Fig. 4. The polarites of branch voltages are chosen arbitrarily. The branch voltages depend on the node voltages. The relation between branch and node voltages are obtained with reference to Fig. 4 as shown below :
+
j3 W
+
~


V2
+
j5 W
+ Va 3 W
Ve
+
+
6W
Vb

Vc 
Vd
~

10Ð0o A
V1
5Ð90o A
Va = Vb = V1 = 9.564+13.4 o V
Vf

o
Vc = Vd = V2 = 48.575+31.7 V Ve = Vf = V2 − V1
0
Reference node
Fig. 4.
= (41.3339 + j25.5163) − (9.302 + j2.2227) = 32.0319 + j23.2936 = 39.606∠36 o V
1.6.5 Node Analysis of Circuits Excited by Independent and Dependent Sources Node analysis can be extended to circuits excited by both dependent and independent sources. When a circuit has a dependent source, the dependent variable should be related to node voltages and then the dependent source should be treated as a source while forming the node basis matrix equation. If a dependent source depends on a voltage Vx in some part of a circuit then the voltage Vx should be expressed in terms of node voltages. If a dependent source depends on a current I in some part of a circuit then the current Ix should be expressed in terms of node voltages.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 125
Circuits with Dependent Current Source When a circuit has a dependent current source then express the value of the source in terms of node voltages. While forming the node basis matrix equation, enter the value of the dependent source at the appropriate location in the source matrix on the righthand side. Now some of the terms in the source matrix on the righthand side will be a function of node voltages and so they can be transferred to the lefthand side with the opposite sign. Then the node basis matrix equation can be solved by Cramer’s rule. This procedure is explained here with an example. Consider a circuit with three nodes excluding the reference node and with a dependent current source between node2 and the reference node. Let the node basis matrix equation without considering the dependent current source be as shown in equation (1.43). G11 G12 G13 G > 21 G22 G23 H G31 G32 G33
V1 V > 2H = V3
I11 I > 22 H I33
.....(1.43)
Let the value of the dependent current source when expressed in terms of node voltages be 3 V1 − 3V3. Let the dependent current source drive the current towards node2. Hence, the value of the dependent source 3V1 − 3V3 is added as a positive quantity to the element in the second row of the source matrix as shown in equation (1.44).
>G21
G11 G12 G13 G 22 G 23 H G31 G32 G33
>V2 H V1
>I22 + 3 V1 − 3V3 H I11
=
V3
I33
.....(1.44)
From row2 of equation (1.44), we get, G21 V1 + G22 V2 + G23 V3 = I 22 + 3 V1 − 3V3 G21 V1 − 3 V1 + G22 V2 + G23 V3 + 3V3 = I 22 ∴ (G21 − 3) V1 + G22 V2 + (G23 + 3)V3 = I 22
..... (1.45)
Using equation (1.45), equation (1.44) can be written as shown in equation (1.46). G11 G > 21 − 3 G31
G12 G13 G 22 G 23 + 3 H G32 G33
V1 V > 2H = V3
I11 I > 22 H I33
..... (1.46)
In equation (1.44), the terms 3 V1 and –3V3 on the righthand side are a function of node voltages V1 and V3, respectively. In equation (1.46) these two terms are transferred to the lefthand side with the opposite sign. Now equation (1.46) can be solved by Cramer’s rule.
Circuit Analysis
1. 126
Circuits with Dependent Voltage Source When a circuit has a dependent voltage source then express the value of the source in terms of node voltages. If the dependent voltage source has a series impedance then it can be converted into a dependent current source with parallel impedance and the analysis can be proceeded . If the dependent voltage source does not have series impedance then it cannot be converted into a current source. In this case the value of the voltage source is related to the node voltages. Then for each voltage source one node voltage is eliminated by expressing the node voltage in terms of the source voltage and other node voltages. The node basis matrix equation can be formed by inspection by taking the current delivered by the dependent voltage source as unknown. While forming the node basis matrix equation, the current of the voltage sources should be entered in the source matrix. Now in the matrix equation some node voltages will be eliminated and an equal number of unknown source currents will be introduced. Thus, the number of unknowns will remain the same as n, where n is the number of nodes in the circuit except the reference node. On multiplying the node basis matrix equation, we get n number of equations which can be solved to give a unique solution for unknowns and hence the node voltage. 3Ix
EXAMPLE 1.60 Determine the node voltages of the circuit shown in Fig. 1.
4
V1 10
V3
V2
SOLUTION 4A
Ix
2
5
The given circuit has three nodes excluding the reference. The general node basis matrix equation of a circuit with three nodes excluding 0
the reference is shown in equation (1). G11 G12 G13 G 22 G 23 H G31 G32 G33
>G21
V1
>V2 H V3
Reference node
Fig. 1. I11
=
>I22 H I33
.....(1)
With reference to Fig. 1, the elements of conductance matrix and source current matrix are obtained as shown below : G11 = 1 + 1 = 0.6 2 10
G12 = G 21 = − 1 = − 0.1 10
I11 = 4
G 22 = 1 + 1 = 0.35 10 4
G13 = G31 = 0
I 22 = − 3I x
G33 = 1 + 1 = 0.45 4 5
G 23 = G32 = − 1 = − 0.25 4
I33 = 3I x
On substituting the above terms in equation (1), we get, 0.6
0 − 0.1 0.35 − 0.25 H 0 − 0.25 0.45
>− 0.1
V1
>V2 H V3
4
=
>− 3I x H 3I x
..... (2)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 127
Let us express the value of dependent current source in terms of node voltages. With reference to Fig. 1 we can write, V3 ; 5
Ix =
` 3I x = 3 #
V3 = 0.6V3 5
.....(3)
On substituting for 3Ix from equation (3) in equation (2), we get, 0.6
0 − 0.1 0.35 − 0.25 H 0 − 0.25 0.45
>− 0.1
V1
4
>V2 H
>− 0.6V3 H
=
V3
0.6V3
.....(4)
The terms − 0.6 V3 and +0.6V3 in the source matrix on the righthand side of equation (4) can be transferred to the lefthand side with the opposite sign as shown in equation (5). 0.6
0 − 0.1 0.35 − 0.25 + 0.6 H 0 − 0.25 0.45 − 0.6
>− 0.1
0.6
0 − 0.1 0.35 0.35 H 0 − 0.25 − 0.15
>− 0.1
V1
>V2 H
4
=
V3
V1 V > 2H = V3
>0 H 0
..... (5)
4
>0 H
..... (6)
0
To solve the node voltages V1 , V2 and V3, let us define four determinants ∆l , ∆l1, ∆l2 and ∆l3 as shown below: 0.6 − 0.1 0 ∆l = − 0.1 0.35 0.35 0 − 0.25 − 0.15 0.6 4 0 ∆l2 = − 0.1 0 0.35 0 0 − 0.15
4 − 0.1 0 ∆l1 = 0 0.35 0.35 0 − 0.25 − 0.15 0.6 − 0.1 4 ∆l3 = − 0.1 0.35 0 0 − 0.25 0
The determinants are evaluated by expanding along the first row and node voltages are solved by Cramer’s rule. 0.6 − 0.1 0 ∆l = − 0.1 0.35 0.35 = 0.6 # 60.35 # (− 0.15) − (− 0.25) # 0.35 @ 0 − 0.25 − 0.15 − (− 0.1) # 6 − 0.1 # (− 0.15) − 0 @ + 0 = 0.021 + 0.0015 = 0.0225 4 − 0.1 0 ∆l1 = 0 0.35 0.35 = 4 # 60.35 # (− 0.15) − (− 0.25) # 0.35 @ − 0 + 0 = 0.14 0 − 0.25 − 0.15 0.6 ∆l2 = − 0.1 0
4 0 0 0.35 = 0 − 4 # 6 − 0.1 # (− 0.15) − 0 @ + 0 = − 0.06 0 − 0.15
0.6 − 0.1 4 ∆l3 = − 0.1 0.35 0 = 0 − 0 + 4 # 6 − 0.1 # (− 0.25) − 0 @ = 0.1 0 − 0.25 0
Circuit Analysis
1. 128 Now, the node voltages are, V1 =
∆l1 = 0.14 = 6.2222 V 0.0225 ∆l
V2 =
∆l 2 = − 0.06 = − 2.6667 V 0.0225 ∆l
V3 =
∆l 3 = 0.1 = 4.4444 V 0.0225 ∆l 10 A
EXAMPLE 1.61 Determine the power delivered to the 10 Ω resistor in the circuit shown in Fig. 1.
4
5 _
SOLUTION
2
+ E
Vx
The given circuit has four nodes. Let us choose one of the nodes as reference. Let the voltage of the other three nodes be V1 ,
0.3Vx
10
Fig. 1.
V2 and V3 as shown in Fig. 1. Let Is2 be the current delivered by the dependent voltage source.
10 A
Now, power delivered to 10 Ω resistor =
V32 10
V1 >V2 H = V3
I11 >I22 H I33
5
V1
The general node basis matrix equation of a circuit with three nodes excluding the reference is given by equation (1). G11 G12 G13 >G21 G22 G23 H G31 G32 G33
Ix
+ Ix
.....(1)
Vx
V3
Is2
_ 2
4
V2
+ E
Ix
0.3Vx
10
+ Ix 0
Reference node
Fig. 2. With reference to Fig. 1, the elements of conductance matrix and source current matrix can be formed as shown below : G11 = 1 + 1 = 0.7 2 5
G12 = G 21 = − 1 = − 0.2 5
I11 = − 10
G 22 = 1 + 1 = 0.45 5 4 G33 = 1 + 1 = 0.35 4 10
G13 = G31 = 0
I 22 = Is2
G 23 = G32 = − 1 = − 0.25 4
I33 = 10 + 0.3Vx
On substituting the above terms in equation (1), we get, 0.7
0 − 0.2 0.45 − 0.25 H 0 − 0.25 0.35
>− 0.2
V1
>V2 H V3
=
− 10 Is2 H 10 + 0.3Vx
>
..... (2)
Let us express the value of dependent sources in terms of node voltages. With reference to Fig. 2, we can write, Vx = −V1 ⇒ 0.3 Vx = −0.3V1 V1 Ix = − = − 0.5 V1 2
..... (3) ..... (4)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 129
Also, with reference to Fig. 2, we get, V2 = I x
..... (5)
From equations (4) and (5), we can write, V2 = −0.5 V1
..... (6)
Using equations (3) and (6), equation (2) can be written as shown in equation (7). 0.7
0 − 0.2 0.45 − 0.25 H 0 − 0.25 0.35
>− 0.2
V1
>− 0.5V1 H
=
V3
− 10 Is2 H 10 − 0.3V1
>
..... (7)
From row1 of equation (5), we get, 0.7 V1 − 0.2 × (−0.5V1) = −10
⇒
⇒
0.8 V1 = −10
V1 = − 10 = − 12.5 V 0.8
From row3 of equation (5), we get, −0.25 × (−0.5 V1) + 0.35V3 = 10 − 0.3V1 0.125V1 + 0.35V3 = 10 − 0.3V1 0.35V3 = 10 − 0.3V1 − 0.125V1 10 − 0.425 # (− 12.5) ` V3 = 10 − 0.425V1 = = 43.75 V 0.35 0.35 ` Power delivered to 10 Ω resistor =
EXAMPLE 1.62
(43.75) 2 V32 = = 191.40625 W 10 10
(AU Dec’15, 16 Marks)
Determine the voltage Vx in the circuit shown in Fig. 1, using node analysis.
4A
+
2
2
Vx _
1
SOLUTION
1 5Vx +
The given circuit has four nodes. Let us choose one of the
_
nodes as reference. Let voltages of the other nodes with respect to the reference be V1 , V2 and V3 as shown in Fig. 2. Let Is2 be the current
Fig. 1.
V1
delivered by the dependent voltage source. Now, the voltage Vx = V1. The general node basis matrix equation of a circuit with three
2A
4
4A
2
+
2
Vx _
4
2A
nodes excluding the reference is given by equation (1). V1 >V2 H = V3
I11 >I22 H I33
V2
.....(1)
1
0
V3
1
5Vx
Reference node
Is2 +
G11 G12 G13 >G21 G22 G23 H G31 G32 G33
_
Fig. 2.
Circuit Analysis
1. 130
With reference to Fig. 2, the elements of conductance matrix and source current matrix can be formed as shown below : G11 = 1 + 1 + 1 = 1.25 2 4 2 G22 = 1 + 1 = 1.5 2 1 G33 = 1 + 1 = 1.5 2 1
G12 = G21 = − 1 = − 0.5 2 1 G13 = G31 = − = − 0.5 2
I22 = Is2 − 4
G23 = G32 = 0
I33 = − Is2 − 2
I11 = 4 + 2 = 6
On substituting the above terms in equation (1), we get, 1.25 − 0.5 − 0.5 1.5 0H 0 1.5 − 0.5
>− 0.5
V1
>V2 H
=
V3
>
6 Is2 − 4 H − Is2 − 2
..... (2)
With reference to Fig. 2, we can write, Vx = V1
..... (3)
V2 − V3 = 5 Vx
..... (4)
From equation (4), we get, V2 = 5 Vx + V3 Using equation (3)
∴ V2 = 5 V1 + V3
..... (5)
On substituting for V2 from equation (5) in equation (2), we get, 1.25 − 0.5 − 0.5 1.5 0H 0 1.5 − 0.5
>− 0.5
V1
>5V1 + V3 H
=
V3
>
6 Is2 − 4 H − Is2 − 2
..... (6)
From row1 of equation (6), we get, 1.25 V1 − 0.5(5V1 + V3) − 0.5V3 = 6 ∴ −1.25 V1 − V3 = 6
⇒
V3 = −1.25V1 – 6
..... (7)
From row2 of equation (6), we get, −0.5 V1 + 1.5(5V1 + V3 ) = I s2 − 4 7 V1 + 1.5V3 = Is2 − 4
..... (8)
From row3 of equation (6), we get, −0.5 V1 + 1.5V3 = −Is2 − 2
..... (9)
On adding equations (8) and (9), we get, 7 V1 + 1.5V3 − 0.5V1 + 1.5V3 = Is2 − 4 − I s2 − 2 6.5 V1 + 3V3 = −6 6.5 V1 + 3(− 1.25V1 – 6) = –6 ` 2.75V1 − 18 = − 6 Since, Vx = V1 , Vx = 4.3636 V
⇒
Using equation (7)
V1 = − 6 + 18 = 4.3636 V 2.75
Chapter 1  Basic Circuit Analysis and Network Topology
1.7
1. 131
Network Terminology
Topology is a branch of science which deals with the study of geometrical properties and special relations unaffected by continuous change of shape or size of figures. The concept of topology was first applied to networks by Kirchoff to study the relationship between the nodes and branches in a network. A circuit or network can be drawn in different shapes and sizes by maintaining the relationship between the nodes and branches as shown in Fig. 1.45. Therefore, “network topology is the study of the properties of a network which are unaffected when we stretch, twist or distort the size and shape of the network”. A network consists of interconnections of various elements. The physical arrangement of the elements and the length of wires used for connecting the elements may give rise to different types of layout for the circuits. As long as the relationship between the nodes and branches are maintained, the circuit response will be the same. R3
3 2 L
L 1
3
+
R2
R1
E E
R3
E
C
2
R1
+E
1
0
C
R2
1 +
R3
E
R2
3 0
C
Fig. 1.45 : Different shapes of a circuit.
E
L 2
0 R1
1.7.1 Graph of a Network The topological properties of networks are described by a graph. The graph of a network consists of nodes and branches of the network. In a network, the branches have elements but in a graph, the branches are drawn by lines. When arrows are placed on the branches of a graph it is called an oriented graph. The arrow indicates the direction of branch current and the polarity of branch voltage.
Fig. b : Graph of network Fig. c : Oriented graph of network in Fig. a. in Fig. a. Fig. 1.46 : A typical network and its graph and oriented graph.
Fig. a : Network.
A sequence of branches traversed while going from one node to another node is called a path. A graph is said to be a connected graph if there exists at least one path from each node of a graph to every other node of the graph.
Circuit Analysis
1. 132
To draw the graph of a circuit, first redraw the circuit by replacing the sources by their internal impedances. The ideal voltage sources are replaced by short circuits and ideal current sources are replaced by open circuits. Now, the circuit becomes a network consisting of R, L and C elements only. Then represent the nodes of the network as small circles and the elements connected between the nodes as lines. The series connected elements are considered as a single branch. While drawing the graph of a network, the number of nodes and branches and the relationship between them has to be maintained. But the size and shape of graph and curvature of lines in the graph are not important. R6
R6
R3
R4
2
R3 3
1
R4
2
3
1
R1 R2
R1
R5
I
R2
R5
+
E E
4
4
Fig. b : The circuit of Fig. a after replacing sources by their internal impedance.
Fig. a : Typical circuit. a
a
a
1
c
b 2
b
1
c
b 3
b
2
2
c
3
1 e
f
d
d 4
1
3
d e
2 c
d
3
e f
f
4
a
e 4
f
4
Fig. c : Various shapes of graphs for the circuit of Fig. a. Fig. 1.47 : A typical circuit and its different graphs.
A typical circuit and its different graphs are shown in Fig. 1.47. In the graph, the nodes are represented by small circles and denoted by numerals 1, 2, 3 and 4. In the graph, the elements connected between the nodes are represented by lines. These lines are called branches and denoted by lower case letters a, b, c, d, e and f. This convention of denoting nodes by numerals and branches by lower case letters has been followed in this book.
1.7.2 Trees, Link, Twig and Cotree When some of the branches in an original graph are removed, the resultant graph is called a subgraph. The tree is a subgraph which is obtained by removing some branches such that the subgraph includes all the nodes of the original graph, but does not have any closed paths. For a given graph, there may be more than one possible tree. Hence, a tree can be defined as any connected open set of branches which includes all nodes of a given graph. A tree of a graph with N nodes has the following properties: The tree contains all the nodes of the graph. The tree contains N − 1 branches. l The tree does not have a closed path. l l
The branches removed to form a tree are called links or chords. By removing a link from a graph, one closed path can be eliminated. Alternatively, on adding a link to a tree one closed
Chapter 1  Basic Circuit Analysis and Network Topology
1. 133
path is created. Hence, by adding the links one by one to a tree all closed paths can be created. Therefore, the number of closed paths in a graph is equal to the number of links. 1
The cotree is the complement of a tree. Hence, every tree has a cotree. The links connected to the nodes of a graph form a cotree. The branches of a tree are called twigs and the branches of a cotree are called links. A typical graph is shown in Fig. 1.48, and some possible trees of the graph and the cotree of each tree are shown in Table 1.4.
a
b
e
d
2
c
4
3 f
For most of the trees, the cotree will also be in the form of a tree. But Fig. 1.48 : Graph. for some possible tree, the cotree may have closed paths and cotree may not be connected (i.e., all the nodes are not connected in a cotree). A definite relationship exists between the number of nodes and branches in a tree. Any tree of the graph with B branches and N nodes will consist of N − 1 branches and the remaining branches are links. Therefore, for a graph with B branches and N nodes, the number of links or chords is given by, Link, L = B  (N  1) = B  N + 1 Table 1.4 : The Trees and Cotrees of the Graph in Fig. 1.48 Tree
Cotree
Tree
Cotree
1
1
1 b
a
a b
c 2
2
1
c
d
3 f
4
e
3
4
2 2
Twig: [a, d, e]
d
Link: [b, c, f]
e
3
4
Link: [a, b, f]
Twig: [c, d, e]
1
1
1
1
a
a b
c 2 2
d
4
e
3
4
2
d
f
2 4
3
3
4
e
f
Twig: [b, c, d]
Link: [a, b, f]
Twig: [c, d, e]
c
b
3
4
3 f
Link: [a, e, f]
1 1
2
a 2
4
2
f
d
Twig: [b, c, f]
f
4
e
3
d
2
Twig: [b, d, f]
1
c
4
3
f
Link: [a, d, e]
1
2
1
b a
3
a
1
c
b
4
e
3
Link: [a, c, e]
1 1
b 3
c 4
2
d
3
b e
4
2
3
a e
f Twig: [a, b, f]
Link: [c, d, e]
Twig: [b, e, f]
4
2
d
c 3
Link: [a, c, d]
4
Circuit Analysis
1. 134
1.7.3 Network Variables When a network is excited by connecting a source, every branch will have a current flowing through it and so a voltage will exist across the terminals of the branch. Hence, a graph (or network) with B branches will have B number of branch currents and B number of branch voltages. These branch currents and voltages are called network variables. The branch currents are called current variables and branch voltages are called voltage variables of the network. An arrow is placed on the branch to indicate the direction of the branch current and polarity of the branch voltage. The arrow placed on the branch is called reference or orientation. In a branch, a single reference is used to represent both the directions of branch current and the polarity of branch voltage. The currentvoltage relation of a branch is obtained by Ohm’s law, by treating the branch as load. Hence, the set of references for the branches of a graph are called load set reference. +
Vbr
Ibr

Þ
Vbr
Þ +

Ibr
Vbr = Branch voltage ; Ibr = Branch current
Fig. 1.49 : Orientation (or reference) of a branch.
The conventional direction of branch current and the polarity of branch voltage are shown in Fig. 1.49. In a network, branch current directions can be assumed arbitrarily and the polarity of branch voltages can be fixed as per Ohm’s law, by treating the branches as loads. Alternatively, the polarity of branch voltages can be assumed arbitrarily and the direction of branch current can be fixed as per Ohm’s law, by treating the branch as load.
1.7.4 Solution of Network Variables In a network or a circuit we may be interested in the voltage and current in the various branches which is normally referred to as response. In a network if all the branch currents are known then the voltages can be obtained by Ohm’s law. Alternatively, if the branch voltages are known then the currents can be obtained by Ohm’s law. Hence, in order to determine the response on current basis first we have to solve B number of branch currents and to determine the response on voltage basis first we have to solve B number of branch voltages. For a unique solution of B number of variables, we have to form B number of equations involving the B variables and solve them. But in practice it can be shown that all the branch currents are not independent and so the independent current variables which are less than B, are sufficient to solve the currents. Similarly, all the branch voltages are not independent and so the independent voltage variables which are less than B, are sufficient to solve the voltages.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 135
1.7.5 Link Currents (Independent Current Variables) In a network it can be proved that the branch currents of the links are independent current variables. When the links are removed in a network, all the closed paths are destroyed and so no current can flow in the network. The removal of a link is equal to making link current as zero. Therefore, when the link current are made zero, all the currents in the network become zero. Hence, we can say that the branch currents depends on link currents. Therefore, “the link currents are independent and branch currents are dependent”. In a network with N nodes and B branches we have B – N + 1 links. Therefore, in a network there will be B current variables in which B − N + 1 are independent current variables and the remaining N − 1 [i.e., B − (B − N + 1) = N − 1] currents are dependent current variables. In order to determine the response of a network on current basis, it is sufficient if we form B – N + 1 equations involving independent current variables and solve them for a unique solution. Thereafter, the dependent current variables can be solved using the independent current variables.
1.7.6 Twig Voltages (Independent Voltage Variables) In a network it can be proved that the branch voltages of the twigs (or tree branches) are independent voltage variables. In a graph when all the twigs are short circuited, then all the nodes will be short circuited as well. Eventually, the voltages of the nodes become zero. Also the short circuiting of nodes will lead to shortcircuiting of all the branches and so all the branch voltages will become zero. Hence, we can say that the branch voltages depend on twig voltages. Therefore, “the twig voltages are independent and branch voltages are dependent”. In a network with N nodes and B branches we have N − 1 twigs. Therefore, in a network we have B voltage variables in which N − 1 are independent voltage variables and the remaining B − (N − 1) voltages are dependent voltage variables. In order to determine the response of a network on voltage basis it is sufficient if we form N − 1 equations involving independent voltage variables and solve them for a unique solution. Thereafter, the dependent voltage variable can be solved using independent voltage variables.
1.8 Incidence and Reduced Incidence Matrices The geometrical features of a graph are number of nodes, branches and orientation of branches relative to the nodes. The incidence matrix tabulates these geometric features of a graph as a two dimensional array. We can define the incidence matrix as a two dimensional array which provides information regarding the orientation of branches of a graph relative to the nodes of the graph. The incidence matrix can be constructed only for oriented graph, in which an arrow is placed in each branch. Each column of the incidence matrix provides information regarding the connections (incidence) of one oriented branch to the various nodes of the graph. The numbers 0, +1 and −1 are used to represent the connection (incidence) of the branch to a node.
Circuit Analysis
1. 136
Nodes
a
Branches b c d
. . .
When a branch is not connected to a node it is represented by 0. In a connected branch, if the direction of arrow is towards the node then it is represented by −1 and if the direction of arrow is away from the node then it is represented by +1. The procedure for construction of incidence matrix is given below. 1. Mark the nodes of the graph by numerals 1, 2, 3, 4, etc., and the branches of the graph by lower case letters a, b, c, d, etc.,. 2. Prepare a table as shown below. In the table the branches are listed in column and nodes in rows.
1 2 3
. . . 3.
. . .
4
At the intersection of a row and column, write the incidence of the branch to the node by putting 0 or +1 or −1, as explained below. Consider a branchk and node1, i)
If the branchk is not connected to node1 then at the intersection of columnk and row1 enter 0.
ii) If the branchk is connected to node1 and the arrow in the branch is towards node1 then at the intersection of columnk and row1 enter − 1. iii) If the branchk is connected to node1 and the arrow in the branch is away from node1 then at the intersection of columnk and row1 enter + 1. The incidence matrix with informations of all the nodes is called complete incidence matrix and it is denoted by AC. In an incidence matrix, one of the row can be deleted or eliminated and such a matrix is called reduced incidence matrix or simply incidence matrix and it is denoted by A. The order of complete incidence matrix is N × B and the order of incidence matrix is (N−1) × B. The formation of complete incidence matrix and reduced incidence matrix are explained with an example here. Consider the graph shown in Fig. 1.50(a). The graph consists of four nodes and six branches. Let us place arrows on the branches
Fig. a: Graph. 2
a
b
f
c 1
3
e
d
4
Fig. b: Oriented Graph. Fig. 1.50:
Chapter 1  Basic Circuit Analysis and Network Topology
1. 137
arbitrarily as shown in fig 1.50(b). Let us mark the nodes as 1, 2, 3 and 4 and branches as a, b, c, d, e and f as shown in Fig. 1.50(b). A table is formed as shown below with nodes listed in the rows and branches in the columns. Branches Branches Nodes a b c d e f 1 2 3 4 Consider node1, the branches b, e and f are not connected to node1. Hence, at the intersections of row1 with columns b, e and f enter 0. The branches a and c are connected to node1 and their arrows are away from node1. Hence, at the intersections of row1 with columns a and center +1. The branchd is connected to node1 and its arrow is towards node1. Hence, at the intersection of row1 with columnd enter −1. Now the entries of row1 will be as shown below.
1
a
b
c
d
e
f
+1
0
+1
−1
0
0
Similarly, the other rows of the incidence matrix are formed by considering the nodes one by one. The table with filled entries for the graph shown in Fig. 1.50 is given below: Nodes
Branches a
b
c
d
e
f
1
+1
0
+1
−1
0
0
2
−1
+1
0
0
0
+1
3
0
−1
−1
0
+1
0
4
0
0
0
+1
−1
−1
All the rows of the above table constitute the complete incidence matrix. If one of the row is deleted in the above table then the remaining rows form the reduced incidence matrix. Let us delete row4 and form the reduced incidence matrix. The complete incidence matrix and reduced incidence matrix of the graph shown in Fig. 1.50 are given by equations (1.47) and (1.48), respectively.
Circuit Analysis
1. 138
Complete Incidence matrix, AC
R V S 1 0 1 −1 0 0 W S− 1 1 0 0 0 1 W = S W S 0 −1 −1 0 1 0 W S 0 0 0 1 −1 −1W T X
1 0 1 −1 Reduced Incidence matrix, A = >− 1 1 0 0 0 −1 −1 0
0 0 1
0 1H 0
..... (1.47)
..... (1.48)
It is interesting to observe that the number of possible trees of a graph is given by the determinant of the product AAT, where A is the reduced incidence matrix and AT is the transpose of the reduced incidence matrix. Properties of Complete Incidence Matrix 1. Every column has two nonzero elements, one of which is +1 and the other is −1. 2. The sum of the elements in any column of complete incidence matrix is zero. 3. The rank of the complete incidence matrix is N−1. 4. The determinant of the complete incidence matrix of a closed loop is zero.
1.8.1 Network Analysis using Incidence Matrix In a network we can attach a current and voltage to each branch. Let I a, I b, Ic ... be the branch currents and Va, Vb, Vc ... be the branch voltages. In a network with N nodes, one of the node voltage is chosen as the reference potential and the voltages of other (N−1) nodes can be expressed relative to the reference node as V1,V2, V3 ... VN−1. The voltage and current variables can be expressed as column matrices as shown below. Let,
I B = Branch current column matrix of order B × 1. V B = Branch voltage column matrix of order B × 1. V N = Node voltage column matrix of order (N−1) × 1.
R V V R V S 1 W S Va W S V2 W SV W S W Here, VB = S b W ; VN = S V3 W V S cW S h W Sh W SS V WW T X N1 T X From the incidence matrix, the relation between the branch voltages and node voltages can be obtained using equation (1.49). R V S Ia W SI W IB = S b W ; S Ic W Sh W T X
V B = AT V N
..... (1.49)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 139
It can be proved that the product of incidence matrix and branch current matrix will give KCL equations at the nodes. The KCL states that the sum of currents at a node is zero. Hence, the product of incidence matrix and branch current matrix will be a null matrix. ∴ A IB = 0
..... (1.50)
Consider a circuit with B branches and N nodes. Let I a, Ib, Ic, Id ... be branch currents and Va, Vb, Vc, Vd ... be branch voltages. Consider brancha with a current source as shown in Fig. 1.51. Now by KCL we can write, GaV a = Isa + I a
+
Ia
..... (1.51)
GaVa Isa
Ga Similarly, for branches b, c, d ... we can write, G b Vb = Isb + I b_ b ..... (1.52) Gc Vc = Isc + Ic ` Fig. 1.51. G d Vd = Isd + I db a where, G a, Gb, Gc, Gd ... = Conductances of branches a, b, c, d ... respectively.
Isa, Isb, Isc, Isd ...
Va
E
= Current sources in the branches a, b, c, d ... respectively.
Note : A current source is positive if the current leaving point is connected to the positive end of the branch. Equations (1.51) and (1.52) can be arranged in the matrix form as shown below. Here, if branchj does not have a current source then I sj will be zero. RG S a S0 S0 S S0 Sh T
0 Gb 0 0 h
0 0 Gc 0 h
0 0 0 Gd h
RG S a S0 Let, GB = S 0 S S0 Sh T
RV V R V R V S a W SIsa W S Ia W S Vb W SIsb W SI b W S V W = SI W + S I W S c W S sc W S c W S Vd W SIsd W SI d W S h W S h W Sh W T X T X T X RI V V 0 0 g S sa W W 0 0 gW SIsb W Gc 0 g W and ISB = SIsc W S W W 0 Gd g W SIsd W S W W h h Th X X
gV W gW gW W gW W X
0 Gb 0 0 h
..... (1.53)
Here, G B = Branch conductance matrix of order B × B. I SB = Branch source current matrix of order B × 1. Now equation (1.53) can be written as, G BVB = ISB + IB
..... (1.54)
Circuit Analysis
1. 140
On substituting for VB from equation (1.49) in equation (1.54) we get, GB AT V N = ISB + I B
..... (1.55)
On premultiplying equation (1.55) by incidence matrix A we get, A GB AT V N = AISB + AIB
..... (1.56)
From equation (1.50) we know that AIB = 0. ∴ [AGB AT ] V N = AI SB
..... (1.57)
Let, AG B AT = G and,
A I SB = I
where, G = Conductance matrix of order (N−1) × (N−1). I = Source current matrix of order (N−1) × 1. Now equation (1.57) can be written as shown in equation (1.58). GV N = I
..... (1.58)
The matrix equation (1.58) will give a set of (N−1) equations involving (N−1) unknown node voltage variables. The solution of equation (1.58) will give (N−1) node voltages. From the knowledge of node voltages, using equation (1.49) the branch voltages can be obtained. From the knowledge of branch voltages and branch conductances, by using Ohm’s law, the branch currents can be determined. EXAMPLE 1.63
5V E +
2
Draw the graph of the circuit shown in Fig. 1, and hence determine the 1
3
incidence matrix. Also draw any four possible trees of the graph.
1 4
1
2 1
SOLUTION 3
i) To construct the graph
Fig. 1.
The voltage source in the given circuit is replaced by a short circuit as
2
S.C.
shown in Fig. 2. The series connected resistances 2 Ω and 1 Ω are combined to single equivalent as shown in Fig. 2. 1
The network of Fig. 2 has five nodes and eight branches. The nodes are marked with numerals 1, 2, 3, 4 and 5. The graph of the network is constructed
3
1
2
1 4
1
by representing the nodes as small circles and the elements connected between the nodes as straight lines as shown in Fig. 3.
4
Let us place arbitrary arrows on the branches of the graph and denote the branches as a, b, c, d, e, f, g and h, as shown in Fig. 4, to obtain the oriented graph.
3
5
2+1=3
Fig. 2.
3
Chapter 1  Basic Circuit Analysis and Network Topology
1. 141
a 2
1
3
b
1 d 4
c
2
3
f
e
g
5 4
Fig. 3 : Graph.
5
h
Fig. 4 : Oriented Graph.
ii) To construct the trees of the graph The graph of the given circuit has five nodes (N = 5) and eight branches (B = 8). ∴ Number of links, L = B − N + 1 = 8 − 5 + 1 = 4 The tree of the graph can be formed by removing four branches such that there is no closed path in the graph but at the same time all nodes remains connected. The four branches removed to form a tree are called links. The four trees of the graph are shown in Fig. 5. b 1
2
d
f
1
3
b
4
f
e
g 5 Link: [a,c,e,h]
4
b
g
5
Link: [a,c,d,h]
a
1
3
2
a
2
3
2
3
1
c
f
f
e
5 h Link: [c,d,e,g]
4
4
5 Link: [b,d,g,h]
Fig. 5 : Trees of the graph shown in Fig. 4. iii) To form incidence matrix The graph of the given circuit has five nodes and eight branches. Let us form a table with five rows and eight columns by listing the nodes in the rows and branches in the columns. Branches Nodes a 1 2 3 4 5
b
c
d
e
f
g
h
Circuit Analysis
1. 142
The entries of the table are filled by considering the orientation of the branches to nodes. By referring to the oriented graph of Fig. 4, the orientations of the branches to nodes are listed here for convenience. Node1
Node2
Node3
Node4
Node5
:
:
:
:
:
i)
Branches c, e, f, g and h are not connected.
ii)
Branches a, b and d are connected with orientation away from the node.
i)
Branches a, d, g and h are not connected.
ii)
Branches b, e and f are connected with orientation towards the node.
iii)
Branchc is connected with orientation away from the node.
i)
Branches b, d, e, f and h are not connected.
ii)
Branches a and c are connected with orientation towards the node.
iii)
Branchg is connected with orientation away from the node.
i)
Branches a, b, c, f and g are not connected.
ii)
Branchd is connected with orientation towards the node.
iii)
Branches e and h are connected with orientation away from the node.
i)
Branches a, b, c, d and e are not connected.
ii)
Branches h and g are connected with orientation towards the node.
iii)
Branchf is connected with orientation away from the node.
The above information is used to fill the entries of the table. If a branch is not connected to a node then 0 is entered at the intersection of concerned node and branch. If a branch is connected and orientation is towards the node then −1 is entered at the intersection of concerned node and branch. If a branch is connected and orientation is away from the node then +1 is entered at the intersection of the concerned node and branch. The table with filled entries is shown below. Branches Nodes a
b
c
d
e
f
g
h
1
+1
+1
0
+1
0
0
0
0
2
0
−1
+1
0
−1
−1
0
0
3
−1
0
−1
0
0
0
+1
0
4
0
0
0
−1
+1
0
0
+1
5
0
0
0
0
0
+1
−1
−1
All the rows of the above table constitute the complete incidence matrix. The incidence matrix is formed by eliminating one of the rows. Let us eliminate the row5 and form the incidence matrix as shown ahead.
Chapter 1  Basic Circuit Analysis and Network Topology
Complete incidence matrix, Ac
=
R 1 1 0 1 0 0 0 0V S W S 0 −1 1 0 −1 −1 0 0W S− 1 0 − 1 0 0 0 1 0 W S W S 0 0 0 −1 1 0 0 1 W S 0 0 0 0 0 1 −1 −1W T X
R S 1 1 0 1 0 0 S 0 −1 1 0 −1 −1 Incidence matrix, A = S S− 1 0 − 1 0 0 0 S 0 0 0 −1 1 0 T
1.9 1.9.1
1. 143
0 0 1 0
V 0W 0W 0 WW 1W X
CutSets Fundamental CutSets
A cutset is a set of branches whose removal cuts the connected graph into two parts, with the condition that replacing any one branch of the cutset renders the two parts connected. Each branch of a cutset has one of its terminal connected to a node in one part and its other end connected to a node in another part. Each cutset contains one twig (or branch of tree) and the remaining branches are links. A graph with N nodes and B branches will have B − N + 1 links and N − 1 twigs. Since each cutset involves only one twig, we can form N − 1 cutsets in a graph. The cutset is also called fundamental cutset or fcutset when one of the branch is twig and remaining branches are links. In order to determine the cutsets of a graph, form a tree of the graph. The tree will have N − 1 twigs, where N is the number of nodes in the graph. The cutsets can be formed by considering the twigs one by one. To obtain the cutset associated with a twig, short circuit all the other twigs of the tree (except the selected twig). Now all the nodes will be shortcircuited except the node at one end of the selected twig. The branches connected to this node will form a cutset. All the shortcircuited branches will be shorted to the node on the other end of the selected twig. On cutting the branches connected to the node which are not shortcircuited, the graph can be divided into two parts such that one part has branches that are not shortcircuited and the other part has branches that are shortcircuited. This concept is illustrated in Fig. 1.52. In another case, when the twigs are shortcircuited except the selected twig to form a cutset, a group of nodes will be shortcircuited to a node at one end of the selected twig and another group of nodes will be shortcircuited to the node at other end of the selected twig. In this case some of the branches will be shortcircuited and the other branches will be connected across the nodes at the two ends of the selected twig. On cutting the branches which are not shortcircuited, the graph can be divided into two parts. The cutset is given by the branches which are not shortcircuited. This concept is illustrated in Fig. 1.53.
Circuit Analysis
1. 144 1
1 Twigb (selected twig)
Form a tree
c
a
Þ
b
b
Twig : [b, d, e] Link : [a, c, f]
Twigd 2
d
e
4
e
3
2
d
4
3 Twige
f
Shortcircuit twigd and twige
ß Node which is not shortcircuited
1
Combine the shortcircuited nodes and redraw the graph
c
a
Þ
b
4
3 S.C.
a
c Cut
b
1 b
Link
c
a
Þ
Link
Twig Cutset : [a, b, c]
e
d 2
Form the cutset by cutting the branches which are not shortcircuited
1
2, 3, 4 d Shorte circuited I f P ShortQ nodes circuited branches
S.C. f
Fig. 1.52 : Formation of a cutset. 1
1
Twigb a b c 4
b
Þ
Twigd(selected twig)
e
d
d
f
g
4
Form a tree
5
6
2
g
h 3
i
2
f 5
6
Twigf Twigg
h
Twigh
3
Twig : [b, d, g, f, h] Link : [a, c, e, i] Shortcircuit Twigsb, g, f and h
ß
1 Combine the shortcircuited nodes and redraw the graph
c a b SC 4
6 g SC 2
f SC i
a
Þ
e
d
Shortcircuited branch 1, 4 Form the cutset by cutting the branches which are e c not shortcircuited b
d
g
5 h SC
Short f circuited h branches
2, 3, 5, 6
Cut
Þ
i
3
Fig. 1.53 : Formation of cutset.
Link
4 Link a
d e c Twig
Cutset : [a, c, d, e]
Chapter 1  Basic Circuit Analysis and Network Topology
1. 145
From the above analysis the general procedure for formation of cutset can be obtained as given below: 1. Form a tree of the graph. The tree will have N − 1 twigs, where N is the number of nodes in the graph. 2. Select the node to which largest number of branches(twigs) connected as the reference node. 3. The tree will have N − 1 twigs and N − 1 nodes except the reference node. Hence, associate one twig with one node. 4. To form a cutset select a node and cut the branches around the node in the graph. Now we have two cases. Case i : The branches connected to the selected node have only one twig connected to it, which is also the twig associated with the selected node. In this case all the branches connected to this node form the cutset. Case ii : The branches connected to the selected node have more than one twig connected to it. In this case, cut the graph in two parts such that in one part a minimum portion of graph is included along with selected node. Now in this portion of the graph, short circuit the extra twigs other than the associated twig with the selected node. On short circuiting the extra twigs some more branches may be connected to the selected node. Now the cutset is given by the branches connected to the selected node after short circuiting the extra twigs. EXAMPLE 1.64 Determine the cutsets of the graph shown in Fig. 1.
SOLUTION The given graph has eight branches (B = 8) and five nodes (N = 5). ∴ Links, L = B − N + 1 = 8 − 5 + 1 = 4.
Fig. 1.
Let us name the branches as a, b, c, d, e, f, g and h and mark the nodes as 1, 2, 3, 4 and 5 as shown in Fig. 2. Since there are four links we can remove four branches a, c, f and h to form a tree as shown in Fig. 3. Now the branches a, c, f and h are links and the branches b, d, e and g are twigs. 1
1 Twigb
a
c
b e
2
d
f
3
5 g
Twigd 2
b e
d
g
h Twigg
4
Fig. 2 : Graph.
3
5
4
Twige
Twig : [b, d, e, g] Link : [a, c, f, h]
Fig. 3 : Tree.
Circuit Analysis
1. 146
The tree of the graph has four twigs and so we can form four cutsets. Let us choose node5 as the reference and associate the remaining four nodes with four twigs as shown below. Twigb is associated with node1. Twigd is associated with node2. Twige is associated with node3. Twigg is associated with node4. Here in the tree of the graph, each node has only one twig connected to it. Hence, cutsets can be formed by cutting the branches connected to the nodes in the graph as shown in Fig. 4. The four cutsets are shown in Fig. 5. 1 a
1 c Cutset1
b
a
2
d f
Twig c e
a 2
d
5
Cutset1 : [a, b, c]
Cutset2
Twig
f
c e
Twig 3
f
h
g
Cutset2 : [a, d, f]
3
h Cutset3
f
Twig
a c
b
h Cutset4
g
h
4
Cutset3 : [c, e, h]
Cutset4 : [f, g, h]
4
Fig. 5 : Cutsets.
Fig. 4.
EXAMPLE 1.65 Determine the cutsets of the graph shown in Fig. 1.
SOLUTION The given graph has nine branches (B = 9) and six nodes (N = 6). ∴ Links, L = B − N + 1 = 9 − 6 + 1 = 4 Let us name the branches as a, b, c, d, e, f, g, h and i and mark the nodes as 1, 2, 3, 4, 5 and 6 as shown in Fig. 2. Since there are four links we can remove four branches a, c, e and i to form a tree as shown in Fig. 3. Now the branches b, d, f, g and h are twigs and the branches a, c, e and i are links. 1
Fig. 1.
1 Twigb
a b
c
b
4
4 Twigd e
d
d
f g 2
6
f 5
i
Fig. 2.
h
g 3
6
2
5
h 3
Twigf Twigg
Twigh
Fig. 3.
Twig : [b, d, f, g, h] Link : [a, c, e, i]
Chapter 1  Basic Circuit Analysis and Network Topology
1. 147
The tree of the graph has five twigs and so we can form five cutsets. Let us choose node6 as the reference and associate remaining five nodes with five twigs as shown below. Twigb is associated with node1. Twigg is associated with node2. Twigh is associated with node3. Twigd is associated with node4. Twigf is associated with node5. Here in the tree of the graph, the nodes 1, 2 and 3 have only one twig connected to each of them. Hence, cutsets associated with these nodes can be formed by cutting the branches connected to these nodes in the graph as shown in Fig. 4. The three cutsets associated with twigs b, g and h (as well as with nodes 1, 2 and 3) are shown in Fig. 5. 1
1 a b
a b
c Cutset1
c Twig
4
Cutset1 : [a, b, c] e
d
Twig a 2
f g
6
5
h
i Cutset3
i Cutset2
a
c 3
Fig. 4.
Twig
g
h
c
3 i Cutset3 : [c, h, i]
2 i Cutset2 : [a, g, i]
Fig. 5 : Cutsets associated with twigsb, g and h.
In the tree of the graph, the nodes 4 and 5 have two twigs connected to each of them. Hence, in order to determine the cutsets associated with these nodes, cut the portions of the graph as shown in Fig. 6. In each portion of the graph, shortcircuit the extra twigs other than the selected twigs associated with the node and redraw the cut portions of the graph as shown in Fig. 6 to obtain the cutsets. The cutsets associated with twigs d and f (as well as with nodes 4 and 5) are also shown in Fig. 6. 1
1
d
a b
c
Þ
4 e
c
c
a
SC
a b
4
e
d
Þ
d 4 e Twig Cutset4 : [a, c, d, e]
e a 2
g
6 i
f 5 h i
c c
e
e 3
Þ
f 5 SC i
Fig. 6.
h
c
Þ 3
f Twig
5 i Cutset5 : [c, e, f, i]
Circuit Analysis
1. 148
1.9.2 CutSet Matrix and CutSet Schedule A graph will have B branches and so there will be B number of branch voltages. Therefore, in a graph there will be B number of voltage variables called branch voltages. Here all the branch voltages are not independent voltages. We can show that in a graph the twig voltages are independent voltages and link voltages are dependent voltages. For a graph with N nodes, we can form a tree with N nodes and N − 1 twigs. We can choose one of the nodes as the reference and the voltages of other N − 1 nodes can be expressed with respect to the reference node. In a cutset, the twig voltage will be the same as the node voltage associated with it. Therefore, we can say that the number of independent voltages will be equal to the number of twigs. The relation between node voltages and branch voltages can be summarised in the form of a matrix called cutset matrix. The procedure for constructing a cutset matrix is given below: 1. Mark the nodes of the graph by numerals 1, 2, 3, etc., and the branches of the graph by lower case letters a, b, c, etc. 2. Identify the links and remove the links to form a tree. The tree will have N − 1 twigs where, N is the number of nodes in the graph. Choose one node as the reference and associate the remaining N − 1 nodes with N − 1 twigs. 3. To each branch of the graph, assign an orientation (or an arrow) which is the reference for polarity of branch voltage. For the twig, always assign the orientation as away from the node associated with the twig. 4. Draw the (fundamental) cutsets of the graph. 5. Assign a voltage to the node in each cutset. Let the node voltages be denoted as V1, V2, V3, etc. Each cutset will have only one twig and twig voltage will be the same as the node voltage. 6. Prepare a table as shown below. In the table, node voltages are listed in rows and branches are listed in columns. Each cutset of the graph can be used to fill the entries of each row of the table. Table 1.5 : Cutset Schedule Node voltages
Branches a
b
c
d
e
...
...
V1 V2 V3
7. At the intersection of a row and column the relation between the node and branch voltage is represented as 0, +1 or −1, as explained below.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 149
8. Consider a branchk and cutset1, (i) If the branchk is not included in the cutset then enter 0 at the intersection of columnk and row1. (ii) If the branchk is included in the cutset and orientation of branchk is same as that of the twig in the cutset then enter “+1” at the intersection of columnk and row1. (iii) If the branchk is included in the cutset and orientation of branchk is opposite to that of the twig in the cutset then enter –1 at the intersection of columnk and row1. All the rows and columns of the table constitute the cutset matrix, and it is denoted by Q. The formation of cutset matrix is explained here with an example. Consider the graph shown in Fig. 1.54(a). The graph has four nodes and six branches. Let us denote the nodes by numerals 1, 2, 3 and 4 and branches by alphabets a, b, c, d, e and f as shown in Fig. 1.54(b). 1
1 b
d
2
Twigb b
c
a
e
4 f
d
2
4 f
Twigd
Twigf 3
Fig. a : Graph.
Fig. b : Oriented graph.
3
Fig. c : Tree.
Fig. 1.54 : A graph and its tree.
Here, branches, B = 6 and nodes, N = 4 Therefore, Links, L = B − N + 1 = 6 − 4 + 1 = 3 Since there are three links, we can form a tree by removing branches a, c and e as shown in Fig. 1.54(c). Now the branches a, c and e are links and the branches b, d and f are twigs. The tree of the graph has three twigs and so we can form three cutsets. Let us choose node4 as the reference and associate the remaining three nodes with the three twigs as shown below: Twigb is associated with node1. Twigd is associated with node2. Twigf is associated with node3. Let us choose the orientation for twigs as away from the node associated with them and arbitrary orientations for the links as shown in Fig. 1.54(b). Here, in the tree of the graph, each node has only one twig connected to it. Hence, cutsets can be formed by cutting the branches connected to the nodes in the graph as shown in Fig. 1.55.
Circuit Analysis
1. 150 a Cutset2
c Cutset1
1
a
1
c
b Twigb Cutset1 : [a, b, c]
b
a d
2
4
d
2 e
f 3
e
e c Cutset3
Twigf
Twigd
a
e
Cutset2 : [a, d, e]
f c 3 Cutset3 : [c, e, f]
Fig. 1.55 : Cutsets of the graph in Fig. 1.54(b).
Let the voltages of the nodes 1, 2 and 3 be V1, V2 and V3, respectively, with respect to the reference node. A table formed with node voltages listed in the rows and branches listed in the columns is shown below: Table 1.6 : CutSet Schedule Node voltages
Branches a
c
b
d
e
f
V1 V2 V3
Consider cutset1, the branches d, e and f are not included in cutset1 and so enter 0 at the intersection of row1 and columns d, e and f. The twig associated with cutset1 is twigb and its orientation is away from node1. The branches a and b have orientation away from node1 (same as that of twigb) and so enter +1 at the intersection of row1 and columns a and b. The branchc has orientation towards node1 (opposite to that of twigb) and so enter –1 at the intersection of row1 and columnc. The entries of row1 are shown below. Branches
V1
a
b
c
d
e
f
+1
+1
E1
0
0
0
Similarly, the other rows of the cutset matrix are formed by considering cutsets one by one. The table with filled entries for the graph of Fig. 1.54(b) is given ahead. All rows and columns of the table constitute the cutset matrix Q. The cutset matrix of the graph in Fig. 1.54(b) is shown in equation (1.59).
Chapter 1  Basic Circuit Analysis and Network Topology
1. 151
Table 1.7 : CutSet Schedule Branches
Node voltages
a
b
c
d
e
f
V1
+1
+1
E1
0
0
0
V2
E1
0
0
+1
+1
0
V3
0
0
+1
0
E1
+1
R V S 1 1 −1 0 0 0 W Cut  set matrix, Q = S − 1 0 0 1 1 0 W S 0 0 1 0 −1 1 W T X
..... (1.59)
1.9.3 Node Analysis Using CutSets In general, a graph with B branches and N nodes will have N − 1 twigs, and so the order of cutset matrix will be (N − 1) × B. Let,
VB = Branch voltage column matrix of order B × 1 VN = Node voltage column matrix of order (N − 1) × 1 QT = Transpose of cutset matrix.
[The order of transpose matrix is B × (N − 1)] Now the relation between branch voltages and node voltages can be expressed as a matrix equation of the form shown in equation (1.60). VB = QT VN
..... (1.60)
R V R V S Va W S V1 W SV W S V2 W Here, VB = S b W and VN = S W V S cW S h W Sh W S VN  1 W T X_ B # 1 i T X: _ N  1 i # 1 D
Let, IB = Branch current column matrix of order B × 1. Now the product of the cutset matrix and branch current matrix will give the KCL equations at the nodes of the fundamental cutsets. The KCL equation states that the sum of currents at a node is zero. Hence, the product of the cutset matrix and branch current matrix will be a null matrix. ∴ QIB = 0
..... (1.61)
Circuit Analysis
1. 152
Here, I B
R V S Ia W SI W = S bW S Ic W Sh W T X_ B # 1 i
Equations (1.60) and (1.61) can be used to form the equilibrium equations of a network (or circuit). The solution of equilibrium equations obtained from the cutset matrix will give the node voltages. Using equation (1.60), the branch voltages can be estimated from the knowledge of node voltages. From the knowledge of branch voltages and resistances (or impedances), the branch currents can be computed. The formation of equilibrium equations for the graph shown in Fig. 1.54(b) is explained here. The graph shown in Fig. 1.54(b) has four nodes and six branches. ∴ N = 4 and B = 6 ∴ Number of twigs = N − 1 = 4 − 1 = 3 The network of graph will have six branch voltages Va , Vb, Vc, Vd, Ve and Vf and three node voltages V1 , V2 and V3 . Also the network will have six branch currents Ia , I b, I c, I d, I e and I f. The voltage and current matrices of the network are given below. R V S Va W S Vb W SV W c VB = S W ; S Vd W SV W S eW S Vf W T X
R V S V1 W VN = S V2 W ; SV W 3 T X
IB
R V S Ia W S Ib W SI W c = S W S Id W SI W S eW S If W T X
The cutset matrix Q of the network is given by equation (1.59). Now equation (1.60) for this network can be written as shown below: VB = QT VN R V S Va W S Vb W R VT R V S V W S 1 1 − 1 0 0 0 W S V1 W c S W = S − 1 0 0 1 1 0 W S V2 W S Vd W S W W S V W T 0 0 1 0 − 1 1 X ST V3 X e S W S Vf W T X
Chapter 1  Basic Circuit Analysis and Network Topology R V R V S Va W S 1 −1 0 W S Vb W S 1 0 0W SV W S W −1 0 1 W S cW = S S Vd W S 0 1 0W SV W S 0 1 −1 W e S W S W S Vf W S 0 0 1W _6#1 i T X T X_ 6 # 3 i
1. 153
R V S V1 W S V2 W SV W 3 T X_ 3 # 1 i ..... (1.62)
On multiplying equation (1.62) we get, R V R V S Va W S V1 − V2 W S Vb W S V1 W S V W S−V + V W 3W S cW = S 1 V2 W S Vd W S SV W S V − V W 3 S eW S 2 W S Vf W S V3 W T X T X
..... (1.63)
From equation (1.63) we can write, Va = V1 − V2 Vb = V1 Vc = − V1 + V3
; ; ;
Vd = V2 Ve = V2 − V3 4 Vf = V3
Now equation (1.61) for this network can be written as shown below: R V S Ia W R V S Ib W S 1 1 − 1 0 0 0 W S Ic W QI B = S − 1 0 0 1 1 0 W S W = 0 S 0 0 1 0 − 1 1 W S Id W T X SS Ie WW S If W T X On multiplying equation (1.65) we get, R V S Ia + I b − Ic W S − Ia + Id + Ie W = 0 S I − I + I W c e f T X
..... (1.64)
..... (1.65)
..... (1.66)
From equation (1.66) we can write, Ia + I b − Ic = 0 − Ia + Id + Ie = 0 4 Ic − Ie + If = 0
..... (1.67)
From Ohm’s law, the branch current can be expressed as a product of voltage and conductance (or admittance) of the branch.
Circuit Analysis
1. 154
Therefore, the branch currents can be expressed as, Ia = Va Ga I b = Vb G b Ic = Vc Gc
; ; ;
Id = Vd Gd Ie = Ve Ge 4 If = Vf Gf
..... (1.68)
where, G a, Gb, Gc, Gd, G e and G f are conductances of the branches a, b, c, d, e and f respectively. When a branch has a current source in parallel with conductance then branch current can be expressed as, I = VG ± I s where, I s is the source current. Note : If the circuit has a voltage source in a branch then it has to be converted into an equivalent current source. The solution using a cutset matrix for the circuits with voltage sources that cannot be converted into current sources is beyond the scope of this book. Using equation (1.68), equation (1.67) can be written as shown below. Va Ga + Vb G b − Vc Gc = 0 − Va Ga + Vd G d + Ve Ge = 0 4 Vc Gc − Ve Ge + Vf Gf = 0
..... (1.69)
Using equation (1.64), equation (1.69) can be written as shown below. _ _ V1 − V2 i Ga + V1 G b − _ − V1 + V3 i Gc = 0b b − _ V1 − V2 i Ga + V2 Gd + _ V2 − V3 i Ge = 0` ..... (1.70) _ − V1 + V3 i Gc − _ V2 − V3 i Ge + V3 Gf = 0b a On rearranging equation (1.70) we get, _ _ Ga + G b + Gc i V1 − Ga V2 − Gc V3 = 0b b − Ga V1 + _ Ga + G d + G e i V2 − G e V3 = 0` ..... (1.71) − Gc V1 − G e V2 + _ Gc + G e + G f i V3 = 0b a Equations (1.71) are called equilibrium equations based on cutset schedule. The equilibrium equations can be solved to get a unique solution for node voltages. Using equation (1.64), the branch voltages can be calculated from the knowledge of node voltages. Using Ohm’s law, the branch currents can be calculated from the knowledge of branch voltages and branch conductances (or admittances). Equation (1.71) can be expressed in the matrix form as shown below. R V R V R V − Ga − Gc W S V1 W S 0 W S Ga + G b + Gc S − Ga Ga + Gd + Ge − Ge W S V2 W = S 0 W S − Ge Gc + Ge + Gf W S V3 W S 0 W − Gc T X T X T X
..... (1.72)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 155
In general, we can write, GVN = I
..... (1.73)
where, I is current source matrix. The matrix G formed by branch conductances in equation (1.73) is also called the parameter matrix. In case of a purely resistive network, the elements of the matrix will be conductances and so it is also called the conductance matrix. In case of a reactive network, the elements of the matrix will be admittances and so it is also called the admittance matrix. Alternate Method for Formation of Equilibrium Equations Consider a circuit with B branches and N nodes. Let I a, Ib, Ic, I d ... be branch currents and Va, Vb, Vc, Vd ... be branch voltages. Consider brancha with a current source as shown in Fig. 1.56. Now by KCL, we can write,
+
Ia
G aV a = I sa + Ia
GaVa
..... (1.74) Isa
Similarly, for branches b, c, d ... we can write, G b Vb = Isb + I b Gc Vc = Isc + Ic 4 Gd Vd = Isd + Id
Ga
Va
_
..... (1.75)
Fig. 1.56.
Note : A current source is positive if the current leaving point is connected to the positive end of the branch. where, Ga , Gb, Gc, Gd ... = Conductances of branches a, b, c, d ... respectively. I sa , I sb , I sc , I sd ... = Current sources in the branches a, b, c, d ... respectively. Equations (1.74) and (1.75) can be arranged in the matrix form as shown below. Here if branchj does not have a current source then I sj will be zero. RG S a S0 S0 S S0 Sh T
Let, G B
0 Gb 0 0 h
0 0 Gc 0 h
0 0 0 Gd h
gV W gW gW W gW W X
RG S a S0 = S0 S S0 Sh T
0 Gb 0 0 h
0 0 Gc 0 h
0 0 0 Gd h
RV V R V R V S a W S Isa W S Ia W S Vb W SIsb W SI b W S Vc W = S Isc W + S Ic W S W S W S W S Vd W SIsd W S Id W S h W S h W Sh W T X T X T X RV V R V RI V gV S aW S Isa W S aW W gW S Vb W SIsb W SI b W g W ; VB = S Vc W ; ISB = S Isc W ; I B = S Ic W S W S W S W W gW S Vd W SIsd W SId W Sh W Sh W Sh W W T X T X T X X
Here, GB = Branch conductance matrix of order B × B I SB = Branch source current matrix of order B × 1
..... (1.76)
Circuit Analysis
1. 156 Now, equation (1.76) can be written as, GBVB = I SB + I B
..... (1.77)
On substituting for VB from equation (1.60), equation (1.77) can be written as, GBQ T V N = ISB + IB
..... (1.78)
On premultiplying equation (1.78) by cutset matrix Q we get, Q GB Q T VN = Q I SB + Q I B
..... (1.79)
From equation (1.57), we know that Q I B = 0 ∴ [Q GB Q T ] VN = QI SB
..... (1.80)
In equation (1.80) the matrix triple product Q G B Q T will be in the form of conductance matrix G and QISB will be in the form of current source matrix I. i.e., QG B QT = G and QI SB = I Therefore, equation (1.80) will be the same as equation (1.73). Hence, equation (1.80) will give the equilibrium equation for the networks excited by current sources. For the graph shown in Fig. 1.54(b) using equation (1.59) equation, (1.80) can be written as shown below: Note : Here we have considered a network without any current source. RG V R V S a 0 0 0 0 0W S 1 −1 0W S 0 Gb 0 0 0 0 W S 1 0 0W 1 1 −1 0 0 0 V1 S 0 0 G 0 0 0W S− 1 0 1 W c S W S W V2 H >− 1 0 0 1 1 0 H > S 0 0 0 Gd 0 0 W S 0 1 0W 0 0 1 0 − 1 1 ^3 # 6h S V3 ^3 # 1h S 0 1 −1W 0 0 0 0 Ge 0 W SS WW SS WW 0 0 0 0 0 G f ^6 # 6 h 0 0 1 ^6 # 3 h T X T X R V S0 W S0 W 1 1 −1 0 0 0 S0 W S W = >− 1 0 0 1 1 0 H S0 W 0 0 1 0 − 1 1 ^3 # 6h S W 0 SS WW 0 R V T X ^6 # 1 h S 1 −1 0W S 1 0 0W Ga G b − Gc 0 0 0 S V1 0 −1 0 1W >− Ga 0 0 Gd Ge 0 H SS 0 1 0 WW >V2 H = >0 H 0 0 Gc 0 − Ge Gf S V3 0 0 1 −1W SS WW 0 0 1 T X
>
Ga + G b + Gc 0 − Ga − Gc V1 − Ga Ga + Gd + Ge − Ge H > V2 H = >0 H 0 − Gc − Ge Gc + Ge + Gf V3
It is observed that equation (1.81) is the same as equation (1.72).
..... (1.81)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 157
EXAMPLE 1.66 Determine the branch currents and voltages of the circuit shown
4
in Fig. 1 using cutset schedule.
2
4A
2 5 1
10 A
5
SOLUTION Fig. 1.
The current sources in the given circuit are replaced by open circuits as shown in Fig. 2. The network of Fig. 2 is redrawn as shown in Fig. 3. 1
4
2
2
4
OC 2
2
2
3 5
5 1
OC
1
5
5 4
Fig. 3.
Fig. 2.
The network of Fig. 3 has four nodes and six branches. The nodes are marked with numerals 1, 2, 3 and 4. The graph of the network is constructed by representing the nodes as small circles and the elements connected between the nodes by lines as shown in Fig. 4. 1
1
1 Twiga
c
c
b a
b d
2
3
a
3
2
a
Twige
d
2
3
Twigf e
e f
4
Fig. 4 : Graph.
e f
f
4
Fig. 5 : Tree.
4
Fig. 6 : Oriented graph.
The lines connecting the nodes are branches. Let us name the branches as a, b, c, d, e and f as shown in Fig. 4. Here, branches, B = 6 and nodes, N = 4 Therefore, Links, L = B − N + 1 = 6 − 4 + 1 = 3 Since there are three links, we can form a tree by removing branches b, c and d as shown in Fig. 5. Now the branches b, c and d are links and the branches a, e and f are twigs.
Circuit Analysis
1. 158
The tree of the graph has three twigs and so we can form three cutsets. Let us choose node4 as the reference and associate remaining three nodes with twigs as shown below. Twiga is associated with node1. Twige is associated with node2. Twigf is associated with node3. Let us choose the orientation for twigs as away from the node associated with them and arbitrary orientation for the links as shown in Figs. 5 and 6. Here in the tree of the graph, each node has only one twig connected to it. Hence, cutsets can be formed by cutting the branches connected to the nodes in the graph as shown in Fig. 7. V1 1
1 a
c Cutset1
a Twiga
b
Cutset1: [a, b, c]
Cutset2
Cutset3 b 2
d
d
e
c
b
c 3
V2 b
f
2
d
d
e Twige Cutset2: [b, d, e]
c V3 3 f
Twigf
Cutset3: [c, d, f]
4
Fig. 7 : Cutsets of the graph shown in Fig. 6. Let the voltages of the nodes 1, 2 and 3 be V1, V2 and V3 , respectively, with respect to reference node. A table is formed as shown below with node voltages listed in the rows and branches listed in the columns. The entries of the table are filled by considering the association of the branches with cutset. TABLE : Cutset schedule
Node voltages
Branches a
b
c
d
e
f
V1 V2 V3
By referring to the cutsets shown in Fig. 7, the inclusion or exclusion of the branches in cutsets and their orientations are listed here for convenience. Cutset1 :
(i)
Branches d, e and f are not included.
(ii)
Branches a and b are included with orientation same as that of twig in the cutset1 (twiga).
(iii)
Branchc is included with orientation opposite to that of twig in the cutset1 (twiga).
Chapter 1  Basic Circuit Analysis and Network Topology Cutset2 :
(i) (ii)
1. 159
Branches a, c and f are not included. Branches d and e are included with orientation same as that of twig in the cutset2 (twige).
Cutset3 :
(iii)
Branchb is included with orientation opposite to that of twig in the cutset2 (twige).
(i)
Branches a, b and e are not included.
(ii)
Branches c and f are included with orientation same as that of twig in the cutset3 (twigf).
(iii)
Branchd is included with orientation opposite to that of twig in the cutset3 (twigf).
The above informations are used to fill the entries of the table. If a branch is not included in the cutset then enter 0 at the intersection of concerned row and column. If a branch is included and orientation is same as that of twig in the cutset then enter +1 at the intersection of concerned row and column. If a branch is included and orientation is opposite to that of twig in the cutset then enter 1 at the intersection of concerned row and column. The table with filled entries is shown below. TABLE : Cutset schedule
Node voltages
Branches a
b
c
d
e
f
V1
C1
C1
E1
0
0
0
V2
0
E1
0
C1
C1
0
V3
0
0
C1
E1
0
C1
All the rows and columns of the above table constitute the cutset matrix Q. The cutset matrix is shown in equation (1). R V S1 1 − 1 0 0 0 W Cut  set matrix, Q = S 0 − 1 0 1 1 0 W W S S0 0 1 − 1 0 1 W T X
.....(1)
The given circuit has six branches. For each branch we can assign a voltage and current. Let Va , Vb, Vc, Vd, Ve and Vf be branch voltages and Ia, Ib, Ic, Id, Ie and If be branch currents. Also the circuit has three node voltages V1, V2 and V3. The voltage and current matrices of the circuit are given below: R V R V S Va W S Ia W S Vb W S Ib W R V S W S W S V1 W S Vc W S Ic W VB = S W ; VN = S V2 W ; IB = S W S W S Vd W S Id W S V3 W S Ve W S Ie W T X S W S W S Vf W S If W T X T X
Circuit Analysis
1. 160
The relation between the branch and node voltages are given by the following matrix equation: T
VB = Q VN
..... (2)
R V S Va W S Vb W R S W S 1 1 − 1 0 0 0 VWT S Vc W ` S W = S0 − 1 0 1 1 0 W S Vd W SS 0 0 1 − 1 0 1 WW S Ve W T X S W S Vf W T X R V R V S Va W S 1 0 0 W S Vb W S 1 − 1 0 W R V W V1 S W S S Vc W S − 1 0 1 W SS WW W V2 S W= S S Vd W S 0 1 − 1 W SS V WW S Ve W S 0 1 0 W T 3 X W S W S S Vf W S 0 0 1 W T X T X On multiplying equation (3) we get,
R V S V1 W S V2 W S W S V3 W T X
R V R V V1 W S Va W S S Vb W S V1 − V2 W W S W S S Vc W S − V1 + V3 W W S W= S S Vd W S V2 − V3 W S Ve W S V2 W W S W S S Vf W S V3 W T X T X From equation (4) we can write, Va = V1 Vb = V1 − V2 Vc = − V1 + V3
; ; ;
_ Vd = V2 − V3 b b Ve = V2 ` b Vf = V3 a
..... (3)
..... (4)
..... (5)
On applying KCL to cutsets we get, QIB = 0
R V S Ia W R V SS Ib WW S 1 1 − 1 0 0 0 W SI W c ` S0 − 1 0 1 1 0 W S W = 0 S W S Id W S0 0 1 − 1 0 1 W T X S Ie W S W S If W T X On multiplying equation (7) we get, R V S I a + Ib − I c W S − Ib + I d + I e W = 0 S W S Ic − Id + I f W T X
..... (6)
.....(7)
.....(8)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 161
From equation (8) we can write, _ I a + Ib − I c = 0 b b − Ib + I d + I e = 0 ` .....(9) Ic − Id + I f = 0 b a When the branches do not have a parallel current source, by Ohm’s law, the branch current can be expressed as a product of branch voltage and conductance of the branch. Therefore, the branch currents I a, Ib, Id and If can be expressed as, _ Ia = Va # 1 = 0.5Va b 2 b Ib = Vb # 1 = 0.25Vb b b 4 ` 1 Id = Vd # = 0.2Vd b 5 b I f = Vf # 1 = 0.2Vf b b 5 .....(10) a The branches c and e with current source are shown in Fig. 8. 2 +
1
_
Ie Ve a Ve I
Ve 10 A
2
4A
1
Vc
Vc a 0.5 Vc 2
4
Ie
_
+ 3
Fig. 8. With reference to Fig. 8 by KCL we can write, Ie = Ve − 10 4 Ic = 0.5Vc + 4
.....(11)
Note : Here the polarity of branch voltages should be assigned such that the branch current enters at the positive end of the branch. Using equations (10) and (11), equation (9) can be written as shown below: _ 0.5Va + 0.25Vb − _ 0.5Vc + 4 i = 0 b b − 0.25Vb + 0.2Vd + Ve − 10 = 0 ` 0.5Vc + 4 − 0.2Vd + 0.2Vf = 0 b a Using equation (5), equation (12) can be written as shown below: _ 0.5V1 + 0.25 _ V1 − V2 i − 0.5 _ − V1 + V3 i − 4 = 0 b b − 0.25 _ V1 − V2 i + 0.2 _ V2 − V3 i + V2 − 10 = 0 ` 0.5 _ − V1 + V3 i + 4 − 0.2 _ V2 − V3 i + 0.2V3 = 0 b a Equation (13) can be rearranged and expressed as shown below:
.....(12)
..... (13)
1.25 V1 − 0.25V2 − 0.5V3 = 4
..... (14)
−0.25 V1 + 1.45V2 − 0.2V3 = 10
..... (15)
−0.5V1 − 0.2V2 + 0.9V3
..... (16)
= −4
Circuit Analysis
1. 162 Equation (14) × (−0.2)
⇒
Equation (15) × 0.5
⇒
On adding
−0.25 V1 + 0.05V2 + 0.1V3 = −0.8 −0.125 V1 + 0.725V2 − 0.1V3 = −0.375 V1 + 0.775V2
=
4.2 3.6
Equation (14) × 0.9
⇒
1.125 V1 − 0.225V2 − 0.45V3 =
Equation (16) × 0.5
⇒
−0.25V1 −
=
1.6 ..... (18)
Equation (17) × 0.325
⇒
−0.121875 V1 + 0.251875V2 = 1.365
Equation (18) × 0.775
⇒
0.678125 V1 − 0.251875 V2 = 1.24
On adding ` V1 =
0.55625 V1
= 2.605
2.605 = 4.6831V 0.55625
From equation (17) we can write, V2 =
4.2 + 0.375V1 0.775
= 4.2 + 0.375 # 4.6831 = 7.6854 V 0.775 From equation (16) we can write, V3 =
− 4 + 0.5V1 + 0.2V2 0.9
= − 4 + 0.5 # 4.6831 + 0.2 # 7.6854 = − 0.1349 V 0.9 Therefore, the node voltages are, V1 = 4.6831 V V2 = 7.6854 V V3 = −0.1349 V From equation (5), the branch voltages are calculated as shown below: Va = V1 = 4.6831 V Vb = V1 − V2 = 4.6831 − 7.6854 = −3.0023 V Vc = −V1 + V3 = −4.6831 + (−0.1349) = −4.818 V Vd = V2 − V3 = 7.6854 − (−0.1349) = 7.8203 V Ve = V2 = 7.6854 V Vf = V3 = − 0.1349 V From equations (10) and (11), the branch currents can be estimated as shown below: I a = 0.5 Va = 0.5 × 4.6831 = 2.3416 A
..... (17)
0.1V2 + 0.45 V3 = −2
0.875 V1 − 0.325V2
On adding
5
Chapter 1  Basic Circuit Analysis and Network Topology
1. 163
I b = 0.25 Vb = 0.25 × (−3.0023) = −0.7506 A Ic = 0.5 Vc + 4 = 0.5 × (−4.818) + 4 = 1.591 A I d = 0.2 Vd = 0.2 × 7.8203 = 1.5641 A 1
I e = Ve − 10 = 7.6854 − 10 = −2.3146 A
_
Ib
Ia
If = 0.2 Vf = 0.2 × (−0.1349) = −0.027 A
+
4
Vb _ Id
+
The circuit with assumed direction of branch current and corresponding polarity of branch voltages is shown in Fig. 9. The negative values of currents and voltages indicate that the actual direction of current and polarity of voltages are opposite to that of assumed direction and polarity. The actual direction of currents and polarity of voltages are shown in Fig. 10. I a = 2.3416 A
;
Va = 4.6831 V
Ib = 0.7506 A
;
Vb = 3.0023 V
Ic = 1.591 A
;
Vc = 4.818 V
Id = 1.5641 A
;
Vd = 7.8203 V
Ie = 2.3146 A
;
Ve = 7.6854 V
I f = 0.027 A
;
Vf = 0.1349 V
2
Va _
Vc
2 Ie
5 + +
1
10 A
4A
2
+ _
If +
Vd
Vf _
Ve _
Ic 3 5
4
Fig. 9. 1 Ib _
Ia
4 + 2
Va _
2 Ie
+ Vc 2
Vb + Ia
5 + +
1
10 A 4
4A
_
Va
Ve _
I _f Vf
Ic 3 5
+
Fig. 10.
Alternate Method for Formation of Equilibrium Equations Let Ga, Gb, Gc, Gd, Ge and Gf be the conductances of the branches a, b, c, d, e and f , respectively. With reference to Fig. 3 we can write, Ga = 1 = 0.5 M ; G b = 1 = 0.25 M ; Gc = 1 = 0.5 M 2 4 2 G d = 1 = 0.2 M ; G e = 1 = 1 M ; G f = 1 = 0.2 M 5 1 5 R V R V 0 0 0 0 0W S Ga 0 0 0 0 0 W S 0.5 S 0 G b 0 0 0 0 W S 0 0.25 0 0 0 0 W S W S W 0 0.5 0 0 0 W S 0 0 Gc 0 0 0 W S 0 ` Branch conductance matrix, G B = S = S W 0 0 0 Gd 0 0 0 0 0 0.2 0 0 W S W S W 0 0 0 1 0W S 0 0 0 0 Ge 0 W S 0 SS 0 0 0 0 0 G WW SS 0 0 0 0 0 0.2 WW f T X T X The branches c and e have current sources 4 A and 10 A, respectively. The other branches a, b, d and f do not have current sources. R V R V S Isa W S 0 W S Isb W S 0 W S W S W S Isc W S − 4 W ` Current source matrix, IS = S W = S W I 0 S sd W S W S Ise W S 10 W SS I WW SS 0 WW sf T X T X
Circuit Analysis
1. 164
The cutset matrix, Q is given by equation (1). Now the equilibrium equations are given by, [Q G B QT ] VN = QIS R V R 0 0 0 0 0W S 1 0 S 0.5 R V S 0 0.25 0 0 0 0 W S 1 − 1 WS S1 1 −1 0 0 0 W S 0 0.5 0 0 0 W S − 1 0 S0 −1 0 1 1 0 W S 0 S WS 0 0 0 0.2 0 0 W S 0 1 WS S0 0 1 −1 0 1 W S 0 0 0 1 0W S 0 1 T X S 0 SS 0 0 0 0 0 0.2 WW SS 0 0 T X T R V S 1 0 0W R V S 1 −1 0 W R V W S V1 W 0.25 − 0.5 0 0 0W S S 0.5 S−1 0 1 W S W S 0 − 0.25 0 0.2 1 0W S V = S W 0 1 −1 W S 2 W W S V3 W S 0 0 0.5 − 0.2 0 0.2 W S T X S 0 1 0W T X SS 0 0 1 WW T X R V R V R V 1 . 25 0 . 25 0 . 5 V 4 − − S W S 1W S W S − 0.25 1.45 − 0.2 W S V2 W = S 10 W S WS W S W S − 0.5 − 0.2 0.9 W S V3 W S − 4 W T X T X T X On multiplying the above matrix equation we get,
V 0W 0W W 1W −1 W W 0W 1 WW X
V R V R S V1 W S 1 1 − 1 0 0 0 W S V2 W = S 0 − 1 0 1 1 0 W W S W S S V3 W S 0 0 1 − 1 0 1 W X T X T
R V S 0W S 0W S W S−4 W S 0W S W S 10 W SS 0 WW T X
R V S 4W S 10 W S W S−4 W T X
1.25 V1 − 0.25V2 − 0.5V3 = 4 −0.25 V1 + 1.45V2 − 0.2V3 = 10 −0.5V1 − 0.2V2 + 0.9V3 = −4 The above three equations are same as equations (14), (15) and (16).
1.10 TieSet A tieset is a set of branches that forms a closed path in a graph such that the closed path contains one link or chord and the remainder are tree branches. The closed path is also known as a loop. A tree of a graph does not have any closed path. On adding a link to the tree, a closed path is created which is also called a loop. Therefore, on adding each link we get a loop and so the number of loops in a graph is equal to the number of links. Also the number of tiesets is equal to the number of links. The tieset with one of the branches as a link and remaining branches as twigs is also called a fundamental circuit or fcircuit. As an example, the possible tiesets of a graph are shown in Fig. 1.57. The graph shown in Fig. 1.57(a) has six branches (B = 6) and four nodes (N = 4). Therefore, links L = B − N + 1 = 6 − 4 + 1 = 3. Since the number of links are three, we can remove three branches to form a tree. Let us remove the branches a, c and f to form a tree as shown in Fig. 1.57(b). Now the branches a, c and f are links and the branches b, d and e are twigs. The graph has three links and so we can form three tiesets by involving one link in each tieset as shown in Fig. 1.57(c).
Chapter 1  Basic Circuit Analysis and Network Topology 1
1. 165 Link
1
1
1
Link
Twig a
c
c
a
b
b
b
b
Twig 2
d
3
e
4
4
2 d
3
2
e
Link : [a, c, f]
d
3
Tieset1 : [a, b, d]
Twig : [b, f, e]
2
f
Fig. a : Graph.
3
Fig. b : Tree of the graph in Fig. a.
d
Link
4
e
Tieset2 : [b, c, e] e
3
4
f Tieset3 : [d, e, f]
Fig. c : Tieset of the graph in Fig. a. Fig. 1.57 : A graph and its tiesets.
1.10.1 TieSet Matrix and TieSet Schedule A graph has B number of branches and each branch is a series path and so a current can be attached to each branch called branch current. Therefore, in a graph there will be B number of current variables called branch currents. Here all the branch currents are not independent currents. It is observed that the number of independent currents in a graph is equal to the number of links. Therefore, loop currents are independent currents and branch currents depend on loop currents. (Ofcourse some branch currents are the same as loop currents). The relation between loop currents and branch currents can be summarised in the form of a matrix called tieset matrix. The procedure for constructing a tieset matrix is given below. 1. Mark the nodes of the graph by numerals 1, 2, 3, etc., and the branches of the graph by lower case letters a, b, c, etc. 2. To each branch of the graph, assign a current and name the current as I a, Ib, Ic, Id, etc. 3. Identify the links and remove the links to form a tree. 4. Draw the tiesets (or fundamental circuits or loops) of the graph. 5. Assign a current to each fundamental circuit (or loop) such that the direction (or orientation) of loop current is the same as that of branch current corresponding to the link in that loop. The loop currents are denoted as I1, I2, I3, etc. 6. Prepare a table as shown ahead. In the table, loop currents are listed in rows and branches are listed in columns. Each tieset of the graph can be used to fill the entries of each row of the table.
Circuit Analysis
1. 166
Table 1.8 : Tieset Schedule Branches
Loop currents
a
b
c
...
d
...
...
I1 I2 I3
7.
At the intersection of a row and column, the relation between the loop and branch current is represented as 0, +1 or −1, as explained below.
8.
Consider a branchk and loop current I1 (i)
If the loop current I1 does not flow through branchk then enter 0 at the intersection of columnk and row1.
(ii)
If the loop current I 1 flow through branchk in the direction of Ik then enter +1 at the intersection of columnk and row1.
(iii) If the loop current I1 flows through branchk in the opposite direction of I k then enter –1 at the intersection of columnk and row1. All the rows and columns of the table constitute the tieset matrix. The tieset matrix is denoted by M. The formation of tieset matrix is explained here with an example. a Ia 1
1
2
b
4
1
2
Ic
Ib
2 b
c
4
c
4
Twig Id
Ie e
d
e f
3
3
Fig. a : Graph.
Fig. b : Oriented graph.
Ia
b Ib
I1 4
2
3 Link : [a, d, f] Twing : [b, c, e]
Fig. c : Tree of the graph in Fig. a.
Link
a 1
Twig
If
1 b
Ic
c
4
4
Ie e
Ie e
I2
Tieset1 : [a, b, c] Id
2
Ic
Ib
c
d
I3 If
f Link
3 Tieset2 : [b, d, e]
Fig. d : Tiesets of the graph in Fig. b. Fig. 1.58 : A graph and their tiesets.
3 Tieset 3 : [c,e,f]
Chapter 1  Basic Circuit Analysis and Network Topology
1. 167
Consider the graph shown in Fig. 1.58(a). The graph consists of six branches and so we can choose six branch currents Ia , Ib, Ic, Id, Ie and If as shown in Fig. 1.58(b). The directions of branch currents are chosen arbitrarily. Let us form a tree of the graph by removing the branches a, d and f. Now the branches a, d and f are links and the branches b, c and e are twigs. The tiesets or fcircuits of the graph are shown in Fig. 1.58(d). Let us choose loop currents I 1, I2 and I3 such that their directions are the same as that of branch currents corresponding to the link in the tiesets. A table is formed as shown below with loop currents listed in the rows and branches listed in the columns. Table 1.9 : Tieset Schedule Loop currents
Branches a
c
b
d
e
f
I1 I2 I3
Consider tieset1, the branches d, e and f are not included in tieset1 and so the loop current I1 will not flow through these branches. Hence enter 0 at the intersection of row1 and columns d, e and f. The loop current in tieset1 is I1. The current I1 flows through brancha in the same direction as that of Ia. Hence, enter +1 at the intersection of row1 and columna. The current I1 flows through branches b and c in a direction opposite to that of branch currents and so enter –1 at the intersection of row1 and columns b and c. The entries of row1 are shown below.
I1
a
b
c
d
e
f
+1
E1
E1
H
0
0
Similarly, the other rows of the tieset matrix are formed by considering tiesets one by one. The table with filled entries for the graph of Fig. 1.58(b) is given ahead. All rows and columns of the table constitute the tieset matrix M. The tieset matrix of the graph in Fig. 1.58(b) is shown in equation (1.82).
Circuit Analysis
1. 168
Table 1.10 : Tieset Schedule Branches
Loop currents
a
b
c
d
e
f
I1
+1
E1
E1
0
0
0
I2
0
+1
0
+1
+1
0
I3
0
0
+1
0
E1
+1
R S1 − 1 − 1 0 0 Tie  Set matrix, M = S 0 1 0 1 1 S0 0 1 0 − 1 T
V 0W 0W 1W X
..... (1.82)
1.10.2 Mesh Analysis Using TieSets In general, a graph with B branches and N nodes will have (B − N + 1) links and so the order of tieset matrix will be (B − N + 1) × B. Let, I B = Branch current column matrix of order B × 1 I L = Loop current column matrix of order (B − N + 1) × 1 MT = Transpose of tieset matrix (The order of transpose matrix is B × (Β − Ν + 1)). Now, the relation between branch currents and loop currents can be expressed as a matrix equation of the form shown in equation (1.83). I B = MT I L
Here, I B
R V S Ia W SI W and = S bW S Ic W Sh W T X (B # 1)
..... (1.83) R V I1 S W S W I2 IL = S W h S W S I (B  N + 1) W T X [(B  N + 1) # 1]
Let, VB = Branch voltage column matrix of order (B × 1). Now the product of tieset matrix and branch voltage matrix will give the KVL equations of the fundamental circuits or tiesets. The KVL equation states that the sum of voltages in a closed path is zero. Hence, the product of tieset matrix and branch voltage matrix will be a null matrix. ∴ MVB = 0
Here,
R V S Va W SV W VB = S b W S Vc W Sh W T X (B # 1)
..... (1.84)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 169
Equations (1.83) and (1.84) can be used to form the equilibrium equations of a network (or circuit). The solution of equilibrium equations obtained from tieset matrix will give the loop currents. Using equation (1.83), the branch currents can be estimated from the knowledge of loop currents. From the knowledge of branch currents and resistances (or impedances), the branch voltages can be computed. The formation of equilibrium equations for the graph shown in Fig. 1.58(b) is explained here. The graph shown in Fig. 1.58(b) has four nodes and six branches. ∴ N = 4 and B = 6 ∴ Number of links = B − N + 1 = 6 − 4 + 1 = 3 The network of the graph will have six branch currents Ia, Ib, Ic, Id, Ie and If and three loop currents I1, I2 and I3. Also the network will have six branch voltages Va, Vb, Vc, Vd, Ve and Vf . The current and voltage matrices of the network are given below: R V S Ia W S Ib W SI W c IB = S W S Id W SI W S eW S If W T X
;
R V S I1 W I L = S I2 W SI W 3 T X
;
R V S Va W S Vb W SV W c VB = S W S Vd W SV W S eW S Vf W T X
The tieset matrix M of the network is given by equation (1.82). Now equation (1.83) for this network can be written as shown below: IB = MT IL RI V S aW SI b W 1 −1 −1 0 0 0 T SI W c S W = >0 1 0 1 1 0 H SId W 0 0 1 0 −1 1 S Ie W SS WW If T X
I1 I > 2H I3
R V S Ia W S Ib W SI W S cW S Id W SI W S eW S If W T X(6
R V S I1 W S I2 W SI W 3 T X(3
=
# 1)
R S 1 S−1 S S−1 S 0 S 0 S S 0 T
V 0 0W 1 0W W 0 1W 1 0W 1 − 1 WW 0 1 W(6 X
# 3)
# 1)
..... (1.85)
Circuit Analysis
1. 170
On multiplying the matrices on the right hand side of equation (1.85) we get, R V R V I1 W S Ia W S S Ib W S − I1 + I2 W SI W S W S c W = S − I1 + I3 W I2 W S Id W S SI W S I −I W e 2 3 S W S W S If W S I3 W T X T X
..... (1.86)
From equation (1.86) we can write, Ia = I1 I b = − I1 + I2 Ic = − I1 + I3
; ; ;
I d = I2 I e = I2 − I3 4 I f = I3
Now the equation (1.84) for this network can be written as shown below. R V S Va W R V S Vb W S 1 − 1 − 1 0 0 0 W S Vc W MVB = S 0 1 0 1 1 0 W S W = 0 S 0 0 1 0 − 1 1 W S Vd W T X SS Ve WW S Vf W T X On multiplying equation (1.88) we get, R V S Va − Vb − Vc W S Vb + Vd + Ve W = 0 SV − V + V W c e f T X
..... (1.87)
..... (1.88)
..... (1.89)
From equation (1.89) we can write, Va − Vb − Vc = 0 Vb + Vd + Ve = 0 Vc − Ve + Vf = 0
4
..... (1.90)
From Ohm’s law the branch voltage can be expressed as a product of current and resistance (or impedance) of the branch. Therefore the branch voltages can be expressed as, Va = Ia Ra Vb = I b R b Vc = Ic Rc
; ; ;
Vd = I d Rd Ve = Ie Re Vf = I f R f
4
..... (1.91)
where, R a , R b , R c , R d , R e and R f are resistances of the branches a, b, c, d, e and f respectively.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 171
When a branch has voltage source in series with resistance, the branch voltage can be expressed as, V = IR ± E where, E is the emf of the source in the branch. Note : If the circuit has a current source in a branch then it has to be converted into an equivalent voltage source. The solution using tieset matrix for circuits with current source that cannot be converted into voltage source is beyond the scope of this book. Using equation (1.91), equation (1.90) can be written as shown below: Ia Ra − I b R b − Ic Rc = 0 I b R b − Id Rd + Ie Re = 0 Ic Rc − I e R e + I f R f = 0
4
..... (1.92)
Using equation (1.87), equation (1.92) can be written as shown below: _ I1 Ra − _ − I1 + I 2 i R b − _ − I1 + I3 i Rc = 0 b b _ − I1 + I 2 i R b + I 2 Rd + _ I 2 − I3 i Re = 0 ` ..... (1.93) _ − I1 + I3 i Rc − _ I 2 − I3 i Re + _ I3 i Rf = 0 b a On rearranging equation (1.93) we get, _ _ Ra + R b + Rc i I1 − R b I2 − Rc I3 = 0 b b − R b I1 + _ R b + R d + R e i I2 − R e I3 = 0 ` ..... (1.94) − Rc I1 − R e I2 + _ Rc + R e + R f i I3 = 0 b a Equations (1.94) are called equilibrium equations based on the tieset schedule. The equilibrium equations can be solved to get a unique solution for loop currents. Using equation (1.88), the branch currents can be calculated from the knowledge of loop currents. Then using Ohm’s law, the branch voltages can be calculated from the knowledge of branch currents and branch resistances (or impedances). Equation (1.94) can be expressed in the matrix form as shown below: R V R V R V − Rb − Rc W S I1 W S0 W S Ra + R b + Rc S − R b R b + Rd + Re − R e W S I2 W = S 0 W S0 W S − Rc − R e R c + R e + R f W S I3 W T X T X T X In general, we can write, R IL = E
..... (1.95)
..... (1.96)
where, E is voltage source matrix. The matrix R formed by branch resistances in equation (1.95) is called the parameter matrix. In case of a purely resistive network, the elements of the parameter matrix are resistances and so it is also called a resistance matrix. In case of a reactive network, the elements of the parameter matrix are impedances and so it is also called an impedance matrix.
Circuit Analysis
1. 172
Alternate Method for Formation of Equilibrium Equations Consider a circuit with B branches and N nodes. Let I a , I b , I c , I d ... be branch currents and Va , Vb, V c , Vd ... be branch voltages. Consider brancha with a voltage source as shown in Fig. 1.59. Now by KVL, we can write,
_
R a Ia = Ea + Va
..... (1.97)
Similarly, for branches b, c, d ... we can write,
IaRa
_ Ra
+
Va
+ Ea E
+
R b I b = E b + Vb Rc Ic = Ec + Vc Rd Id = Ed + Vd
Ia
4
..... (1.98)
Fig. 1.59.
where, Ra , Rb, Rc, Rd ... = Resistances of branches a, b, c, d ... respectively. Ea , Eb, Ec, Ed ... = Voltage sources in the branches a, b, c, d ... respectively. Note : The voltage source is positive if the assumed branch current leaves from the positive end of the source. Equations (1.97) and (1.98) can be arranged in the matrix form as shown below. Here, if branchj does not have a voltage source then Ej will be zero. RR S a S0 S0 S S0 Sh T
Let, R B
0 Rb 0 0 h
0 0 Rc 0 h
0 0 0 Rd h
gV W gW gW W gW W X
RR S a S0 = S0 S S0 Sh T
0 Rb 0 0 h
0 0 Rc 0 h
0 0 0 Rd h
RI V S aW SI b W S Ic W = S W S Id W Sh W T X
RE V R V S aW S Va W SE b W S Vb W S Ec W + S Vc W S W S W S Ed W S Vd W Sh W Sh W T X T X
RI V RE V gV S aW S aW W gW SI b W SE b W g W ; I B = S Ic W ; E B = S Ec W S W S W W gW S Id W S Ed W Sh W Sh W W T X T X X
..... (1.99)
;
RV V S aW S Vb W VB = S Vc W S W S Vd W Sh W T X
Here, RB = Branch resistance matrix of order B × B. EB = Branch source voltage matrix of order B × 1. Now, equation (1.99) can be written as, R B I B = EB + V B
..... (1.100)
On substituting for IB from equation (1.83) in equation (1.100) we get, R BM T I L = EB + VB
..... (1.101)
Chapter 1  Basic Circuit Analysis and Network Topology
1. 173
On premultiplying equation (1.101) by tieset matrix M we get, MR B MT I L = MEB + MVB
..... (1.102)
From equation (1.94) we know that MVB = 0, ∴ [MRBMT ]IL = [MEB]
..... (1.103)
In equation (1.103), the matrix triple product MR B MT will be in the form of resistance matrix R and MEB will be in the form of voltage source matrix E. Hence, MR B MT = R
and MEB = E
Therefore, equation (1.103) will be the same as equation (1.96). Hence, equation (1.103) will give the equilibrium equations for the networks excited by voltage sources. For the graph shown in Fig. 10.10(b), using equation (1.82), equation (1.103) can be written as shown below: Note : Here we have considered a network without any voltage source.
1 −1 −1 1 0 0 0 1
>0
0 0 1 1 0 −1
0 0H 1 (3 # 6)
RR S a S0 S0 S S0 S0 SS 0 T
1 −1 −1 = >0 1 0 0 0 1
Ra − R b − Rc 0 0 0 0 R 0 R R 0H e > d b 0 0 Rc 0 − Re Rf
0 Rb 0 0 0 0
0 0 Rc 0 0 0
0 0 1 1 0 −1 R S 1 S− 1 S− 1 S S 0 S 0 SS 0 T
0 0 0 0 Re 0
0 WV 0W 0W W 0W 0W W Rf W(6 # 6) X
0 0H 1 (3 # 6)
R V S0 W S0 W S0 W S W S0 W S0 W SS WW 0 T X(6 # 1)
0 0 0 Rd 0 0
V 0 0W 1 0W I 0 1 WW 1 I = 1 0W > 2H I 3 1 −1W W 0 1W X
Ra + R b + Rc − Rb − Rc − R b R b + Rd + Re − Re H > − Rc − Re Rc + Re + Rf
I1 >I 2 H = I3
0 >0 H 0
It is observed that equation (1.104) is the same as equation (1.95).
R S 1 S− 1 S− 1 S S 0 S 0 SS 0 T
V 0 0W 1 0W I1 0 1 WW I2 H > 1 0W I3 1 −1W WW 0 1 (6 # 3) X
>0 H 0 0
..... (1.104)
Circuit Analysis
1. 174
Determine the branch currents and voltages of the circuit shown in Fig. 1, using tieset schedule.
1
4
2
EXAMPLE 1.67
+ E 5V
+
10 V E
3
5
Fig. 1.
SOLUTION
The voltage sources in the given circuit are replaced by short circuits as shown in Fig. 2. The network of Fig. 2 has three nodes and five branches. The nodes are marked with numerals 1, 2 and 3. The graph of the network is constructed by representing the nodes as small circles and the elements connected between the nodes by lines as shown in Fig. 3. 2
SC
4
1
2
1
1
3
5
2
b
c
SC
d
a
e 3
3
Fig. 3 : Graph.
Fig. 2.
1
The lines connecting the nodes are branches. Let us name the branches as a, b, c, d and e as shown in Fig. 3. Let us place arbitrary arrows on the branches of the graph as shown in Fig. 4 to obtain the oriented graph.
2
b Ib
Ic
Ia
Ie d
c Id
a
e
To each branch we can attach a current called branch current whose direction 3
is indicated by the arrow in the branches, as shown in Fig. 4.
Fig. 4 : Oriented graph.
Here, nodes, N = 3 and branches, B = 5. Therefore, links L = B − N + 1 = 5 − 3 + 1 = 3 1
2
The tree of the graph can be formed by removing three branches such
Ic
that there is no closed path in the graph but at the same time all nodes remain
c
connected. The three branches removed to form a tree are called links. Let
Id
d
Twig
Twig
us remove the branches a, b and e and form a tree of the graph as shown in
3
Fig. 5. Now the branches a, b and e are links and the branches c and d are twigs.
Fig. 5 : Tree.
The tiesets of the graph are shown in Fig. 6. Let us choose loop currents I1, I2 and I3 such that their directions are the same as that of branch currents corresponding to the link in the tieset. 1
1 Ic
Ia
Ic
c
c
Ib I2
3
Link Tieset1 : [a, c]
3
Ie
d
d
Id
Id
I1
a
2
2
b
I3
3
Tieset2 : [b, c, d]
Fig. 6 : Tiesets of the graph shown in Fig. 4.
e
Link Tieset3 : [d, e]
Chapter 1  Basic Circuit Analysis and Network Topology
1. 175
A table is formed with loop currents listed in the rows and branches listed in the column. The entries of the table are filled by considering the association of the branches with tiesets. TABLE : Tieset Schedule Loop currents
Branches a
c
b
e
d
f
I1 I2 I3
By referring to the tiesets shown in Fig. 6, the inclusion or exclusion of branches with tiesets are listed here for covenience. Tieset1 :
Tieset2 :
Tieset3 :
(i)
Branches b, d and e are not included.
(ii)
Brancha is included with direction (or orientation) of branch current same as that of loop current.
(iii)
Branchc is included with direction (or orientation) of branch current opposite to that of loop current.
(i)
Branches a and e are not included.
(ii)
Branches b and c are included with direction (or orientation) of branch current same as that of loop current.
(iii)
Branchd is included with direction (or orientation) of branch current opposite to that of loop current.
(i)
Branches a, b and c are not included.
(ii)
Branche is included with direction (or orientation) of branch current same as that of loop current.
(iii)
Branchd is included with direction (or orientation) of branch current opposite to that of loop current.
The above information is used to fill the entries of the table. If a branch is not included in the tieset then enter 0 at the intersection of concerned loop and branch current. If a branch is included in the tieset and orientation is the same then enter +1 at the intersection of concerned loop and branch current. If a branch is included in the tieset and orientation is opposite then enter –1 at the intersection of concerned loop and branch current. The table with filled entries is shown below: TABLE : Tieset Schedule
Branches
Loop currents
a
b
c
d
e
I1
+1
0
E1
0
0
I2
0
+1
+1
E1
0
I3
0
0
0
E1
+1
Circuit Analysis
1. 176
All the rows and columns of the above table constitute the tieset matrix M. The tieset matrix is shown in equation (1): R S1 0 − 1 0 Tie  set matrix, M = S 0 1 1 − 1 SS 0 0 0 − 1 T
V 0W 0W 1 WW X
..... (1)
The given circuit has five branch currents Ia , Ib, Ic, Id and Ie and three loop currents I1 , I2 and I3. Also for each branch we assign a voltage called branch voltage. Let Va , Vb , Vc , Vd and Ve be the branch voltages. The current and voltage matrices of the circuit are given below:
IB
R V S Ia W S Ib W = S Ic W ; S W S Id W S Ie W T X
RV V S aW S Vb W VB = S Vc W S W S Vd W S Ve W T X
R V S I1 W IL = S I 2 W ; SS I WW 3 T X
The relation between branch and loop currents are given by the following matrix equation: T
IB = M I L
`
..... (2)
RI V S aW R S Ib W S1 0 − 1 0 SI W = S 0 1 1 − 1 c S W SS 0 0 0 − 1 S Id W T S Ie W T X
V 0 WT 0W 1 WW X
R V R V S 1 0 0W S Ia W S 0 1 0W S Ib W SI W = S − 1 1 0 W c S W S W S 0 −1 −1 W S Id W S 0 0 1W S Ie W T X T X
R V S I1 W SI2 W SS I WW 3 T X
R V S I1 W SI2 W SS I WW 3 T X
.....(3)
On multiplying equation (3) we get, R V R V I1 W S S Ia W S I2 W S Ib W SI W = S − I + I W c 1 2W S S W S − I 2 − I3 W S Id W S W S Ie W I3 W S T X T X From equation (4) we can write, Ia = I1 Ib = I 2 Ic = − I1 + I 2
; ;
I d = − I 2 − I3 I e = I3 4
..... (4)
..... (5)
On applying KVL to tiesets we get, M VB = 0
..... (6)
Chapter 1  Basic Circuit Analysis and Network Topology
`
R S1 0 − 1 0 S0 1 1 − 1 SS 0 0 0 − 1 T
V 0W 0W 1 WW X
1. 177
RV V S aW S Vb W SV W = 0 S cW S Vd W S Ve W T X
..... (7)
On multiplying equation (7) we get, R V S Va − Vc W S Vb + Vc − Vd W = 0 SS − V + V WW e d T X From equation (8) we can write,
..... (8)
_ Va − Vc = 0b b Vb + Vc − Vd = 0 ` ..... (9) − Vd + Ve = 0b a If the branches do not have a voltage source, then by Ohm’s law, the branch voltage can be expressed as a product of branch current and resistance of the branch. Therefore, the branch voltages Vb , Vc and Vd can be expressed as, _ Vb = Ib # 4 = 4Ib b b Vc = Ic # 5 = 5Ic ` Vd = Id # 3 = 3Id b a
..... (10) 2 + 10 V
+ E
Ia
Va = 2Ia − 10 4 Ve = Ie − 5
..... (11)
E
2Ia
With reference to Fig. 7, by KVL we can write,
E E
E
The branches a and e with voltage source are shown in Fig. 7.
Va
1 + Ie Ve
+ E 5V
Ie
+
+
Fig. 7.
Note : Here the polarity of branch voltages should be assigned such that the branch currents enter at the positive end of the branch. Using equations (10) and (11), equation (9) can be written as shown below: _ 2Ia − 10 − 5Ic = 0 b b 4Ib + 5Ic − 3Id = 0 ` − 3Id + Ie − 5 = 0 b a Using equation (5), equation (12) can be written as shown below: _ 2I1 − 10 − 5 (− I1 + I 2) = 0 b b 4I 2 + 5 (− I1 + I 2) − 3 (− I 2 − I3) = 0 ` − 3 (− I 2 − I3) + I3 − 5 = 0 b a The equation (13) can be rearranged and expressed as shown below: 7 I1 − 5 I2
..... (12)
..... (13)
= 10
..... (14)
− 5 I 1 + 12 I 2 + 3 I 3 = 0
..... (15)
3 I2 + 4 I3
..... (16)
= 5
Circuit Analysis
1. 178 Equation (15) × 4
⇒
Equation (16) × (–3)
⇒
On adding
−20 I 1 + 48 I 2 + 12 I 3 =
0
− 9 I 2 − 12 I 3 = −15 −20 I 1 + 39 I 2
= −15
Equation (14) × 39
⇒
273 I 1 − 195 I 2 = 390
Equation (17) × 5
⇒
−100 I 1 + 195 I 2 = −75
On adding
173 I 1
..... (17)
= 315
` I1 = 315 = 1.8208 A 173 From equation (14) we can write, −5 I 2 = 10 − 7 I 1 ` I2 =
10 − 7I1 = 10 − 7 # 1.8208 = 0.5491 A −5 −5
From equation (16) we can write, 4 I 3 = 5 − 3I 2 ` I3 =
5 − 3I 2 = 5 − 3 # 0.5491 = 0.8382 A 4 4
Therefore, the loop currents are, I 1 = 1.8208 A I2 = 0.5491 A I3 = 0.8382 A From equation (5), the branch currents are calculated as shown below: I a = I1 = 1.8208 A I b = I2 = 0.5491 A I c = −I1 + I2 = −1.8208 + 0.5491 = −1.2717 A Id = −I2 − I3 = −0.5491 − 0.8382 = −1.3873 A Ie = I3 = 0.8382 A From equations (10) and (11), the branch voltages are estimated as shown below: 2
4
_
+
1 _ _
_ +
Va Vc 5 + Ic
Vd
Fig. 8.
Ie + E 5V
3 Ve
+ Id
+
Vc = 5 I c = 5 × (−1.2717) = −6.3585 V
Ia 10 V E
+
Vb = 4 I b = 4 × 0.5491 = 2.1964 V
Ib
_
Va = 2 I a − 10 = 2 × 1.8208 − 10 = −6.3584 V
Chapter 1  Basic Circuit Analysis and Network Topology
1. 179
Vd = 3 I d = 3 × (−1.3873) = −4.1619 V Ve = I e − 5 = 0.8382 − 5 = −4.1618 V The circuit with assumed direction of branch current and corresponding polarity of branch voltages is shown in Fig. 8. The negative values of currents and voltages indicate that the actual direction of currents and polarity of voltages are opposite to that of assumed direction and polarity. The actual direction of currents and polarity of voltages are shown in Fig. 9. 2 Ia
+ Va Vc 5 _ Ic
1 _
+ Vd 3 V e _ Id
Ie + E 5V
_
_
10 V
+ E
4 +
I a = 1.8208 A
;
Va = 6.3584 V
I b = 0.5491 A
;
Vb = 2.1964 V
Ic = 1.2717 A
;
Vc = 6.3585 V
Id = 1.3873 A
;
Vd = 4.1619 V
I e = 0.8382 A
;
Ve = 4.1618 V
+
+
Ib
Fig. 9.
Alternate Method for Formation of Equilibrium Equations Let R a, Rb , R c , R d and Re be the resistances of the branches a, b, c, d and e, respectively. With reference to Fig. 2, we can write, R a = 2 Ω ; Rb = 4 Ω ; Rc = 5 Ω ; Rd = 3 Ω ; Re = 1 Ω
Branch resistance matrix, R B
R R V S2 0 S Ra 0 0 0 0 W S0 4 S 0 Rb 0 0 0 W S S W = S 0 0 Rc 0 0 W = S 0 0 S S W S0 0 S 0 0 0 Rd 0 W S0 0 S 0 0 0 0 Re W T T X
0 0 5 0 0
0 0 0 3 0
V 0W 0W W 0W W 0W 1W X
The branches a and e have voltage sources 10 V and 5 V, respectively. The other branches b, c and d does not have voltage sources. R V R V S10 W S Esa W S 0W S Esb W S W S W ` Voltage source matrix, Es = S Esc W = S 0 W S W S W S 0W S Esd W S 5W S Ese W T X T X The tieset matrix, M is given by equation (1). Now the equilibrium equations are given by, [MR BMT ]IL = ME S R S2 0 R V S 1 0 1 0 0 − S W S0 4 S0 1 1 −1 0 W S0 0 S W S 0 0 0 − 1 1 W SS 0 0 T X S 0 0 T
0 0 5 0 0
0 0 0 3 0
V 0W 0W W 0W W 0W 1W X
R V S 1 0 0W S 0 1 0W S W S−1 1 0 W S W S 0 −1 −1 W S 0 0 1W T X
R V S10 W R V S W R V I 1 0 1 0 0 − S W S 0W S 1W S I2 W = S 0 1 1 − 1 0 W S 0 W S W S W S 0 0 0 − 1 1 W SS 0 WW S I3 W T X S W T X 5 T X
Circuit Analysis
1. 180 R V S 1 0 0W R V S 0 1 0 W R I1 V S10 W S W S W S W S − 1 1 0 W I2 = S 0 W S W S W S W S 5W S 0 − 1 − 1 W S I3 W T X S 0 0 1W T X T X R V S10 W = S 0W S W S 5W T X
R V S2 0 −5 0 0 W S0 4 5 −3 0 W S W S0 0 0 −3 1 W T X R V R V S 7 − 5 0 W S I1 W S − 5 12 3 W S I 2 W S W S W S 0 3 4 W S I3 W T X T X
On multiplying the above matrix equation we get, 7 I1 − 5 I2
= 10
−5 I 1 + 12 I 2 + 3 I 3 = 0 3 I2 + 4 I3 = 5 The above three equations are same as that of equations (14), (15) and (16).
1.11 Duality Duality refers to the concept of forming (or identifying) a voltage basis circuit for a given current basis circuit (or viceversa) with similar form of governing equations and solutions. Consider a RLC series circuit excited by a voltage source e as shown in Fig. 1.60. Let i be the current through the circuit. Now with reference to Fig. 1.60, by KVL we can write, Ri + L di + 1 dt C
# i dt
= e
+
Ri
C
L
R _ +
_ L
di dt
+ _ 1 i dt C
z
i +E
e
Fig. 1.60.
.....(1.105)
Let us make following changes in equation (1.105): e i
replaced by replaced by
is
L
replaced by
C
v
C
replaced by
L
R
replaced by
G
On making the above replacement, equation (1.105) will be converted into the form shown in equation (1.106): Gv + C dv + 1 dt L
# v dt
= is
.....(1.106)
Equation (1.106) represents an RLC parallel circuit excited by a current source as shown in Fig. 1.61. We can obtain equation (1.106) by writing KCL equation at nodeA of the circuit in Fig. 1.61.
Chapter 1  Basic Circuit Analysis and Network Topology
It is observed that equations (1.105) and (1.106) are in similar and so the solutions of these two equations will also be similar. Hence, the circuit in Fig. 1.60 is dual of the circuit in Fig. 1.61 and viceversa.
1. 181 A + is
Gv v
C
Ga
1 R
1 v dt L
dv dt
C
z
L
_
Fig. 1.61. In general, two networks are said to be dual if the mesh equations (KVL equations) of one of the networks is similar in form to the nodal equations (KCL equations) of the other network.
While forming the dual network, the current variable is exchanged with the voltage variable and so we can say that voltage is dual of current and viceversa. Also, the parameters are replaced by their duals. The various elements/variables/quantities and their duals that we may encounter in network analysis are listed in Table 1.11. Table 1.11 : Elements/Variables/Quantities Involved in Network Analysis and their Duals Elements/Variables/Quantities of Original network on current basis
Dual network on voltage basis
Elements/Variables/Quantities of Original network on current basis
Dual network on voltage basis
Loop method
Node method
Current
Voltage
Tieset
Cutset
Mesh/loop
Nodepair
Link
Twig
Mesh/loop current
Nodevoltage
Link current
Twigvoltage
Voltage source
Current source
Short circuit
Open circuit
Resistance
Conductance
Series path
Parallel path
Inductance
Capacitance
Open switch
Closed switch
Capacitance
Inductance
1.11.1 Dual Graphs For a given graph, a dual graph can be constructed by converting each tieset of the given graph as cutsets in the dual graph. The links of the given graph will become twigs in the dual graph and the twigs of the given graph will become links in the dual graph. Two graphs are said to be dual if the tiesets of one graphs is the same as that of cutsets of the other graph. Procedure for Constructing Dual of a Given Graph 1.
Let the given (original) graph consist of N nodes and B branches. Now, link L = B − N + 1. Identify the links and remove them to form a tree.
2.
Determine the tiesets of the original graph and number them as 1, 2, 3, etc. The original graph will have Lnumber of tiesets.
Circuit Analysis
1. 182
3.
The number of cutsets in the dual graph should be the same as that of tiesets in the given graph. Hence, in order to construct the dual graph, draw L number of nodes separately.
4.
Number the nodes drawn separately as 1l , 2l , 3l , etc. Draw one extra node as the reference node. The branches forming the tiesetj in the original graph will be the branches associated with cutsetj in the dual graph.
5.
Connect the links of the original graph as twigs in the dual graph between the nodes and reference node and form the tree of the dual graph. Each tieset will have only one link associated with it. The link associated with tiesetj in the original graph is connected as a twig between node jl and the reference node in the dual graph.
6.
The branches common to two tiesets in the original graph are connected as branches common to corresponding two nodes in the dual graph. For example, if the branchq is common to tieset j and k in the original graph then the branchq should be connected between node jl and kl in the dual graph.
7.
The orientations of the branches in the given graph should be transferred to the dual graph. Choose clockwise orientations for all tiesets. (i)
If the tieset orientation and branch orientation of a branch are the same in the original graph then mark the orientation of the corresponding branch in the dual graph as away from the node.
(ii) If the tieset orientation and branch orientation of a branch are opposite then mark the orientation of the corresponding branch in the dual graph as towards the node. When the orientation of all the tiesets are clockwise, the branches common to two tiesets will have the same orientation in one tieset and opposite orientation in the other tieset. Similarly, the corresponding branch connected between two nodes in the dual graph will have orientation away from the node at one node and towards the node at another node. EXAMPLE 1.68 Determine the dual graph for the graph shown in Fig. 1.
SOLUTION The given graph has four nodes (N = 4) and seven branches (B = 7). Let us denote the nodes as 1, 2, 3 and 4 and branches as a, b, c, d, e, f and g as shown in Fig. 2. Here, B = 7 ; N = 4,
Fig. 1. ∴ Links, L = B − N + 1 = 7 − 4 + 1 = 4
Let us remove the branches a, c, f and g and form a tree as shown in Fig. 3. The tiesets of the graph are shown in Fig. 4. Assign clockwise orientation for all tiesets as shown in Fig. 4. Let us choose link orientations same as that of their associated tieset orientation and arbitrary orientation for other branches as shown in Fig. 4.
a 2
3
d f
e
g
1
1
c d
b
2
b
4
Fig. 2.
e
4 3 Twig : [b, d, e] ; Link : [a, c, f, g]
Fig. 3 : Tree.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 183
2 2 c
2
d
d
b
1
e
a
f
e
2
b
3
1
Tieset1 : [a, b]
Tieset2 : [c, d]
4
g
3
4 Tieset4 : [b, e, f]
Tieset3 : [d, e, g]
Fig. 4 : Tiesets of the graph in Fig. 2. The given graph has four links and so we can choose four nodes for the dual graph. Let us draw the four nodes as small circles and denote them as 1’, 2’, 3’ and 4’ as shown in Fig. 5. Let us draw one extra node 0’ as the reference node. 2’
2’
1’
1’ c
a 0’
0’ g
f 3’
3’
4’
4’
Fig. 6 : Tree of the dual graph.
Fig. 5 : Nodes of the dual graph.
Form the tree of the dual graph by connecting the links of the original graph as twigs between the nodes and the reference node as shown in Fig. 6. Since the link and tieset orientations are the same, the twig orientations are away from the node. The twigs of the original graph are connected as links in the dual graph, as shown in Fig. 7. The branchb is common to tiesets1 and 4 and so it is connected between nodes 1l and 4l in the dual graph. The branchd is common to tiesets2 and 3 and so it is connected between nodes 2l and 3l in the dual graph. The branche is common to tiesets3 and 4 and so it is connected between nodes 2l and 3l in the dual graph. The dual graph is shown in Fig. 7. The orientations of common branches b, d and e are the same as that of tieset orientations 1, 2 and 4, respectively. Hence, the orientations of branches b, d and e are away from nodes 1l , 2l and 4l, respectively, as shown in Fig. 7.
2’
1’ c
d
Let us form the cutsets of the dual graph and show that they are the same as that of tiesets of the original graph. 2’
c
Cutset1
3’
f
b
Cutset1: [a, b]
Cutset2: [c, d]
e
4’
Fig. 7 : Dual graph for the graph shown in Fig. 2.
0’
Cutset3 d
d
b
d Cutset2
a 1’
c
b
g 3’
2’
a 1’
a 0’
g e
Cutset4 b f e
4’
d 3’
g e
Cutset3: [d, e, g]
b f e
4’
Cutset4: [b, e, f]
Fig. 8 : Cutsets of the dual graph. The cutsets of the dual graph are shown in Fig. 8. It is observed that the branches that constitute the tiesets of the original graph are the same as that of branches that constitute the cutsets of the dual graph.
Circuit Analysis
1. 184
1.11.2 Duality of Network Two networks are said to be dual if the mesh equations (KVL equations) of one of the network are in a form similar to that of nodal equations (KCL equations) of the other network. Dual of Mesh Basis Network The dual of mesh basis network will be a node basis network. The number of meshes in the original network will be equal to the number of nodes (except reference node) in the dual network. The elements connected to a mesh in the original network will be represented by their dual elements connected to a node in the dual network. In the elements associated with a mesh, certain elements will be common to two meshes and certain elements are included in the concerned mesh alone. Hence, we can say that the elements included in the meshj alone should be represented by their dual as elements connected between nodej and reference node in the dual network. The elements common between meshj and k should be represented by their dual as elements connected between nodej and k in the dual network. In order to verify the dual network, write the mesh equations for the original network and compare them with the node equations of the dual network. Procedure to Find the Dual of Mesh Basis Network 1. Determine the number of meshes in the given network. Let the network consists of L meshes. Name the meshes as 1, 2, 3, etc. 2. Draw L number of nodes separately for the dual network and draw one extra node as the reference node. 3. Consider the elements connected in each mesh one by one and represent the elements associated with a mesh by their dual elements associated with corresponding node in the dual network. 4. Consider meshj, the elements associated with meshj have to be represented by their dual elements associated with nodej. i)
The elements included in meshj alone are represented by their dual elements connected between nodej and the reference in the dual network.
ii) The elements common between meshj and k are represented by their dual elements connected between nodej and k in the dual network. 5. A voltage source with voltage rise in the direction of mesh current in the original network should be represented by a current source driving current towards the node in the dual network and viceversa. 6. Write mesh equations for the original network and node equations for the dual network. Verify that both are similar in form.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 185
Alternate Method 1. Let the given network have L number of meshes. Place a dot inside each mesh and number them as 1, 2, 3, etc.,. Place an extra dot outside the network and denote it by 0. 2. The dots placed inside the original network represents the nodes of the dual network. The dot placed external to the network represents the reference node of the dual network. 3. To construct the dual network, draw L number of nodes separately and number them as 1, 2, 3, etc. Also, draw the reference node and denote it by 0. 4. In the original network, draw all possible lines from dot to dot by crossing each element one time. 5. Each line between two dots crossing an element in the original network can be represented as a branch in the dual network by drawing a branch between two corresponding nodes with the dual of the element crossed. For example, if an inductance is crossed in the original network by drawing a line between dotj and k then draw a branch with capacitance between nodej and k in the dual network. 6. The dual network is obtained by drawing the dual branches for all possible lines drawn on the original network. 7. Write mesh equations for the original network and node equations for the dual network. Verify that both are in similar form. Dual of Node Basis Network The dual of node basis network will be a mesh basis network. The number of nodes (except the reference node) in the original network will be equal to the number of meshes in the dual network. The elements connected to a node in the original network will be represented by their dual elements connected as a mesh in the dual network. In the elements associated with a node, certain elements will be connected between two nodes and certain elements will be connected between the concerned node and the reference node. Hence, we can say that the elements connected between nodej and the reference node should be represented by their dual as elements associated with meshj alone in the dual network. The elements connected between nodej and k should be represented by their dual as elements common between meshj and k in the dual network. In order to verify the dual network, write the node equations for the original network and compare them with the mesh equations of the dual network. Procedure to Find the Dual of Node Basis Network 1. Determine the number of nodes in the given network. Let the network consists of N nodes in which one node is the reference. Name the remaining N – 1 nodes as 1, 2, 3 ... (N – 1) and denote the reference node by 0. 2. The dual network will have N − 1 meshes. 3. Consider the elements associated with each node one by one and represent the elements associated with a node by their dual elements associated with corresponding mesh in the dual network.
Circuit Analysis
1. 186
4. Consider nodej, the elements associated with nodej have to be represented by their dual elements associated with meshj. i)
The elements connected between nodej and reference are represented by their dual elements connected in meshj alone in the dual network.
ii) The elements connected between nodej and k are represented by their dual elements common between meshj and k in the dual network. 5. A current source driving the current towards the node in the original network should be represented by a voltage source with rise in voltage in the direction of mesh current in the dual network and viceversa. 6. Write node equations for the original network and mesh equations for the dual network. Verify that both are similar in form. Alternate Method 1. Place a dot inside each closed path of the original network and number them as 1, 2, 3, etc. Place an extra dot outside the network and denote it by 0. Let the total number of dots placed be P. 2. The dots placed inside the original network represent the nodes of the dual network. 3. To construct the dual network draw P number of nodes separately and number them as 0, 1, 2, 3, etc. 4. In the original network draw all possible lines from dot to dot by crossing each element one time. 5. Each line between two dots crossing an element in the original network can be represented as a branch in the dual network by drawing a branch between two corresponding nodes with the dual of the element crossed. For example, if a capacitance is crossed in the original network by drawing a line between dotj and k then draw a branch with inductance between nodej and k in the dual network. 6. The dual network is obtained by drawing the dual branches for all possible lines drawn on the original network. 7. Write the node equations for the original network and mesh equations for the dual network. Verify that both are in similar form . EXAMPLE 1.69 Determine the dual of the network shown in Fig. 1.
SOLUTION The given network has three meshes. Let us name the meshes as 1, 2 and 3 and assume three mesh currents i 1, i2 and i 3 as shown in Fig. 2. Now the original network is a mesh basis network and so its dual will be node basis network.
2H
2W
0.1 H
0.5 F
10 W
4W
+ 20 sinwt V
5W
~
+
~
_
_
Fig. 1.
o
5 sin(wt + 45 ) V
Chapter 1  Basic Circuit Analysis and Network Topology
1. 187
2W
2H i3 mesh3 0.1 H 10 W
~
_
1
4W
i1
i2
mesh1
mesh2
+ 20 sinwt V
0.5 F 5W
+
~
Node1
Node2
o
5 sin(wt + 45 ) V
_
Fig. 2 : Original network.
3
2
0
Node3 Reference Node
Fig. 3 : Nodes of the dual network.
The original network has three meshes and so the dual network will have three nodes. Let us draw three nodes 1, 2 and 3 and a reference node 0 as shown in Fig. 3. The dual of the elements and variables of the original network are listed in Table 1. Table 1 Elements/Variables of original network Element/Variable
Value/Symbol
Elements/Variables of dual network Element/Variable
Value/Symbol
20 sinωt V Voltage sources
20 sinωt A Current sources
5 sin(ωt+ 45o) V
5 sin(ωt + 45o) A
10 Ω
10 M
5Ω Resistances
5M Conductances
4Ω
4M
2Ω
2M
0.1 H Inductances
0.1 F Capacitances
2H Capacitance
0.5 F
2F Inductance
0.5 F
i1 Node currents
i2
v1 Node voltages
v2
i3
v3 0.1 F
Consider mesh1, the elements associated with mesh1 are represented by their dual element associated with node1 as shown in Fig. 4. The explanation for the elements and their connections in Fig. 4 is given below: i)
In mesh1, the 20 sin ωt source and 10 Ω resistance are associated with mesh1 alone. Hence, connect the dual of these two elements between node1 and reference node in the dual network. In the original network, the voltage of the source is rise in the direction of
20 sinwt A
Node1 :
1
10
5 W
W
Fig. 4.
2
3
Circuit Analysis
1. 188
mesh current and so it is represented as a current source driving current towards the node in the dual network. ii) In mesh1, the 5 Ω resistance is common to mesh1 and 2. Hence, connect the dual of this element between node1 and 2 in the dual network. iii) In mesh1, the 0.1 inductance is common to mesh1 and 3. Hence, connect the dual of this element between node1 and 3 in the dual network. Similarly, consider the elements of mesh2 and 3 one by one and connect the dual of those elements to the nodes of dual network as shown in Fig. 5. The explanation for elements and connections to nodes 2 and 3 is given below:
W
0.5 H v 3 3
2 v2
2F
o
10
W
5 sin(wt+45 ) A
In mesh2, the 5 sin (ωt + 45) V source and 4 Ω resistance are associated with mesh2 alone. Hence, connect the dual of these two elements between node2 and the reference node. In the original network, the voltage of the source is a fall in the direction of the mesh current and so it is represented as a currrent source driving current away from the node in the dual network.
i)
1 v1 5
20 sinwt A
Node2 :
0.1 F
4
W
2
W
0
Fig. 5 : Dual network of the network shown in Fig. 2.
ii) In mesh2, the 0.5 F capacitance is common to mesh2 and 3. Hence, connect the dual of this element between node2 and 3 in the dual network. Node3 :
In mesh3, the 2 H inductance and 2 Ω resistance are associated with mesh3 alone. Hence, connect the dual of these two elements between node3 and the reference node.
i)
Alternate Method Place three dots inside the three meshes and number them as 1, 2 and 3 as shown in Fig. 6(a). Place the reference node 0 external to the network. 2H
0.1 F
2W
d 3 mesh3
d
5
1
i a
b a
+ 20 sinwt A _
~
0.1 H 1 mesh1
0.5 F f e
5W 2 mesh2
b
4W
g h
~
+ o 5 sin(wt+45 ) A _
e 2 h
3
f g
0.5 H
o
10 W
W
5 sin(wt+45 ) A
c
10
W
4
c
i
W 2F
2
W
20 sinwt A 0
0
Fig. a : Original network.
Fig. b : Dual network.
Fig. 6 : Construction of dual network. There are nine elements in the given network. Hence, we can draw nine lines between nodes as shown in Fig. 6(a) such that each line crosses only one element one time (Also each line has to cross the branches of original network only one time). Now these dotted lines represent the branches of the dual network with the dual of element crossed by it as the element of branch. The details of branches and their elements are listed in Table 2.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 189
Draw the nodes 0, 1, 2 and 3 separately and connect the nine branches a to i between the nodes as shown in Fig. 6(b) by referring to the Table 2. Table 2 Element of the branch in
Branch
Element of the branch in
original network
a
dual network
20 sinωt Vvoltage
dual network
20 sinωt Vcurrent
source
Connection of the branch in the
node1 to node0
source
b
10 Ωresistance
10 M  conductance
node1 to node0
c
2 Hinductance
2 Fcapacitance
node3 to node0
d
0.1 Hinductance
0.1 Fcapacitance
node1 to node3
e
5 Ωresistance
5 M  conductance
node1 to node2
f
0.5 capacitance
0.5 Hinductance
node2 to node3
g
4 Ωresistance
4 M  conductance
node2 to node0
h
5 sin(ωt + 45o) Vvoltage
5 sin(ωt + 45o) Acurrent
node2 to node0
source
source
2 Ωresistance
i
2 M  conductance
node3 to node0
Mesh Equations of the Original Network The individual meshes of the original network with polarity of voltages across various elements are shown in Fig. 7. The following mesh equations are obtained by writing KVL equations for the meshes shown in Fig. 7 by tracing the meshes in the direction of respective mesh current. 0.1
di3 dt
1 i dt 0.5 3 _ + _ + 1 i2 dt + + _ 0.5 4i1 4 W 5i1 5i2 _ _ + + i1 i2 5 sin(wt+45o) V _
i3
i3
_ + _ + d i _ 0.1 1 _ dt + 10 W 10i 1 5i 5i2 1 + _ + + i1 20 sinwt V _
i2
~
~
Fig. a : Mesh1. di 2 3 dt _ +
i1
Fig. b : Mesh2. +
2i3
_
2
2H di 0.1 3 _ dt + _ + di 0.1 1 dt
z z
i3
1 i dt 0.5 3 _ + _ + 1 i dt 0.5 2
z
z
i2
Fig. c : Mesh3.
Fig. 7 : Meshes of the original network.
Circuit Analysis
1. 190 10i1 + 0.1 d _ i1 − i3 i + 5 _ i1 − i2 i = 20 sin ωt dt 5 _ i2 − i1 i + 1 0.5
# _ i2 − i3 idt + 4i2
di3 + 2i3 + 1 dt 0.5
2
= − 5 sin _ ωt + 45 o i
# _ i3 − i2 idt + 0.1 dtd _ i3 − i1 i =
0
Node Equations of the Dual Network The individual nodes of the dual network with direction of currents through various elements are shown in Fig. 8. The following node equations are obtained by writing KCL equations for the nodes shown in Fig. 8. 0.1
d v v dt 1 3
d
i
0.1
0.1 F 3 5
v1
v3
2 v2
1 v1
20 sin wt A
10v1 5(v1  v2) 10
0
d v  v1 dt 3
d
i
v1
W
1
0.1 F
1
5
W 2
5(v1  v2) h
v2
W o
5 sin(wt + 45 ) A
0
0.5 H v3
4
W
1 0.5
z dv
2 v3
0.5 H
v2 2
3
1 0.5
i
z
3
cv
4v2
3 v 2
2
2v3
h dt
dv 3 dt
2
2F
W
0
0
0
Fig. c : Node3.
Fig. b : Node2.
Fig. a : Node1.
v3
Fig. 8 : Nodes of dual network. 10v1 + 0.1 d _ v1 − v3 i + 5 _ v1 − v2 i = 20 sin ωt dt 5 _ v2 − v1 i + 1 0.5 2
# _v2 − v3 idt + 4v2
dv3 + 2v3 + 1 dt 0.5
= − 5 sin _ ωt + 45 o i
# _v3 − v2 idt + 0.1 dtd _v3 − v1 i =
0
CONCLUSION It is observed that the mesh equations of the original network and node equations of the dual network are identical in form. 7 sin(wt + 30o) A
0.5 H
3
W
o
Determine the dual of the network shown in Fig. 1.
12 sin(wt + 45 ) A
EXAMPLE 1.70
SOLUTION
2
W
0.6 F
4
W
0.8 F
Fig. 1.
The given network has four nodes. Let us choose one of the nodes as the reference node and denote it by 0. Let us name the other three nodes as 1, 2 and 3 and assume three node voltages v1, v2 and v3 as shown in Fig. 2. Now the original network is a node basis network and so its dual will be a mesh basis network.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 191
o
7 sin(wt + 30 ) A node3
o
12 sin(wt + 45 ) A
node1 0.5 H 2 v2
1 v1
2
W
3
W
node2
3 v3 0.6 F 4
W
0.8 F 0 Reference node
Fig. 2 : Original network (Node Basis). The original network has three nodes (except the reference node) and so the dual network will have three meshes. The dual of the elements and variables of the original network are listed in Table 1. Table 1 Elements/Variables of original network Value/Symbol
Element/Variable
12 sin(ωt + 45o) A Current sources
Value/Symbol 12 sin(ωt + 45o) V
Voltage sources 7 sin(ωt + 30o) A
7 sin(ωt + 30o) V 2Ω
2M Conductances
3M
3Ω
Resistances
4Ω
4M Inductance
0.5 H
Capacitance
0.5 F
0.8 F Capacitances
0.8 H Inductances
0.6 F
Mesh1 :
i)
mesh2 0.5 F o
12 sin(wt+45 ) A
Consider node1, the elements associated with node1 are represented by their dual element associated with mesh1 as shown in Fig. 3. The explanation for the elements and their connections in Fig. 3 are given below:
0.6 H
2W
7 sin(wt+30o) V
Element/Variable
Elements/Variables of dual network
+
 mesh3 In node1, the 12 sin (t + 45o ) A source and 2 M conductance are mesh1 + connected between node1 and the reference and they are in parallel. Hence, connect the dual of these two elements in series in mesh1 Fig. 3. as elements associated with mesh1 alone in the dual network. In the original network, the current source is driving current towards the node and so it is represented as a voltage source whose voltage is a rise in the direction of mesh current.
ii) In node1, the 0.5 H inductance is connected between node1 and 2. Hence, connect the dual of this element as element common to mesh1 and 2 in the dual network. iii) In node1, the 7 sin (ωt + 30 o ) A source is connected between node1 and 3. Hence, connect the dual of this element as element common to mesh1 and 3 in the dual network. In the original
Circuit Analysis
1. 192
network, the current 7 sin (ωt + 30o) A is driving current towards node3. Hence, in the dual network it is represented as a voltage source whose voltage is a rise in the direction of mesh current i 3. Similarly, consider the elements connected to nodes2 and 3 one by one and connect the dual of those elements to the meshes of dual network as shown in Fig. 4. The explanation for elements and their connections is given below: Mesh2 :
i)
In node2, the 0.8 F capacitance is connected between node2 and the reference. Hence, connect the dual of this element as element associated with
0.8 H
mesh2 alone in the dual network.
mesh2
node2 and 3. Hence, connect the dual of this element as element common to mesh2 and 3 in the dual network. In node3, the 0.6 F capacitance and 4 M conductance are
i)
connected between node3 and the reference and they are
2W i1 + 
mesh1
3W
7 sin(wt + 30o) V
12 sin(wt + 45o) A
ii) In node2, the 3 M conductance is connected between
Mesh3 :
i2
0.5 F
0.6 H + 
i3 mesh3
4W
Fig. 4 : Dual network of the network shown in Fig. 2.
in parallel. Hence, connect the dual of these two elements in series in mesh3 as elements associated with mesh3 alone in the dual network. Alternate Method
The given network has five closed paths. Therefore, place five dots inside the closed paths and number them as 1, 2, 3, 4 and 5 as shown in Fig. 5(a). Place one extra dot external to the network and denote it by 0. These dots represent the meeting point of elements in the dual network. o
7 sin(wt + 30 ) A 0.8 H
f 3
e
W
0.5 F
1
2
5 e
g
2
0.8 F
4
4
2
W
2W
0.6 F
c
h
0
Fig. a : Original network.
12
sin 1 b (w t+4 5 )o V + 
b
c
W
d 3 f
7 sin(wt+30o) V
3
o
a
12 sin(wt+45 ) A
d 0.5 H
3W
4 g
a
0.6 H
+ 
5
h 0
4W
Fig. b : Dual network.
Fig. 5 : Construction of dual network. There are eight elements in the given network. Hence, we can draw eight lines between dots as shown in Fig. 5(a) such that each line crosses only one element one time (Also each line has to cross the branches of original network only one time). Now these broken lines represent the branches of the dual network with dual of element crossed by it as the element of branch. The details of branches and their elements are listed in Table 2.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 193
Table 2 Element of the branch in
Branch
original network
dual network
7 sin (ωt + 30o) Vvoltage
source
dot3 to dot0
source
12 sin (ω+ 45o) Acurrent
b
the branch in the
dual network
7 sin (ωt + 30o) Acurrent
a
Connection of
Element of the branch in
12 sin (ωt + 45o) Vvoltage
source
dot1 to dot0
source
c
2 M  conductance
2 Ωresistance
dot1 to dot2
d
0.5 Hinductance
0.5 Fcapacitance
dot2 to dot3
e
0.8 Fcapacitance
0.8 Hinductance
dot2 to dot4
f
3 M  conductance
3 Ωresistance
dot3 to dot4
g
0.6 Fcapacitance
0.6 Hinductance
dot4 to dot5
h
4 M  conductance
4 Ωresistance
dot5 to dot0
Draw the dots 0, 1, 2, 3, 4 and 5 separately and connect the eight branches a to h between the dots as shown in Fig. 5(b) by referring to the Table 2. Node Equations of the Original Network o
7 sin(wt + 30 ) A
7 sin(wt + 30o) A 1
v 3 3 1
0.5 H
v1
o
12 sin(wt + 45 ) A
2v1 2
W
1 0.5
2 v2
zc
v1 1
h
v 1  v 2 dt
1 0.5
0.5 H
zc
v3 3
h
v2
W 3 v3
3(v3  v2)
0.6
dv 2 dt
0.8 F
0
Fig. a : Node1.
2
3(v2  v3)
v 2  v 1 dt
0
3
W
2
0.8
0
3
v2
v2
Fig. d : Node2.
4
0.6 F
dv 3 dt
0
4v3 W
0
Fig. c : Node3.
Fig. 6 : Nodes of original network. The individual nodes of the original network with direction of currents through various elements are shown in Fig. 6. The following node equations are obtained by writing KCL equations for the nodes shown in Fig. 6. 2v1 + 1 0.5 1 0.5
# _v1 − v2 idt
= 12 sin _ ωt + 45 o i − 7 sin _ ωt + 30 o i
# _v2 − v1 idt + 0.8 ddtv2 + 3_v2 − v3 i =
3 _ v3 − v2 i + 0.6
0
dv3 + 4v3 = 7 sin _ ωt + 30 o i dt
Circuit Analysis
1. 194 Mesh Equations of the Dual Network
The individual meshes of the dual network with polarity of voltages across various elements are shown in Fig. 7. The following mesh equations are obtained by writing KVL equations for the meshes shown in Fig. 7 by tracing the meshes in the direction of respective mesh current.
o
12 sin(wt + 45 ) V
+ 
i1
1 i dt 0_.5 2 + _ + 1 i dt 0.5 1
z
o
z
2W
7 sin(wt + 30 ) V
z
z
i3
i1
Fig. a : Mesh1.
i2
i3 _ 3i2 + _ + 3i3
i3
Fig. b : Mesh2.
i1
7 sin(wt + 30o) V
i2 1 i dt 0.5 2 _ + _ _+ 1 i1 dt 2i1 0.5 + + 
0.8 H _ + di 0.8 2 dt
+ 
_ 3i2 + _ + + 3i3 di 3 0.6 H 0.6 dt _ + 4i3 4 W i2 _
Fig. c : Mesh3.
Fig. 7 : Meshes of the dual network. 2i1 + 1 0.5 1 0.5
# _ i1 − i2 idt
= 12 sin _ ωt + 45 o i − 7 sin _ ωt + 30 o i
# _ i2 − i1 idt + 0.8 ddti2 + 3_ i2 − i3 i =
3 _ i3 − i2 i + 0.6
0
di3 + 4i3 = 7 sin _ ωt + 30 o i dt
CONCLUSION It is observed that the node equations of the original network and mesh equations of the dual network are identical in form.
1.12 Summary of Important Concepts 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11.
An electric circuit consists of parameters  R, L and C and sources connected in a particular combination. A circuit without sources is called a network. The sources in which the current/voltage does not change with time are called direct current sources. The networks excited by dc sources are called dc circuits. The elements which can deliver energy are called active elements. The elements which consume energy either by absorbing or storing are called passive elements. Resistance, inductance and capacitance are called fundamental parameters. The voltage/current of an independent source does not depend on voltage/current in any part of the circuit. The voltage/current of a dependent source depends on the voltage/current in some part of the same circuit. A node is the meeting point of two or more elements. The principal node is the meeting point of more than two elements.
Chapter 1  Basic Circuit Analysis and Network Topology 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23.
1. 195
The path between any two nodes is called a branch. A path that starts and ends at the same node after travelling through some part of a circuit is called a closed path. A connection of two or more elements in which the same current flows is called a series connection. A connection of two or more elements such that the same voltage exists across them is called a parallel connection. When three elements meet at a node, they are said to be in star or Tconnection. When three elements are connected to form a closed path with a node in between any two elements they are said to be in delta or Pconnection. An open path or path of infinite resistance between two nodes is called an open circuit. A closed path of zero resistance between two nodes is called a short circuit. When current leaves an element from the positive terminal, it delivers energy. When current enters an element at the positive terminal, it absorbs energy. Network topology is the study of properties of the network which are unaffected when we stretch, twist or distort the size and shape of the network. A graph describes the topological properties of a network and consists of nodes and branches of a network.
24.
When arrows are placed on the branches of a graph it is called an oriented graph.
25.
A tree is a subgraph obtained by removing some branches of a graph such that all nodes of the graph are included without a closed path.
26.
A tree has N nodes and N – 1 branches.
27.
The branches removed to form a tree are called links or chords and the branches of a tree are called twigs.
28.
In a graph with B branches and N nodes, the number of links, L = B – N + 1.
29.
The cotree is the complement of a tree and it is obtained by connecting the links to the nodes of a graph.
30.
Branch currents and voltages are called network variables.
31.
The arrow placed on a branch is called reference or orientation.
32.
In a branch, a single orientation is used to represent current and voltage direction.
33.
When reference is placed on a branch by treating it as load, the reference is called load set reference.
34.
In a graph, link currents are independent current variables and twig currents are dependent current variables.
35.
In a graph, twig voltages are independent voltage variables and link voltages are dependent voltage variables.
36.
A singleloop circuit is one which has only one closed path.
Circuit Analysis
1. 196 37. 38. 39.
A single node pair circuit is one which has only one independent node and a reference node. Ohm’s law states that voltage across a conductor is directly proportional to current through it. Kirchhoff’s Current Law (KCL) states that the algebraic sum of currents in a node is zero. By KCL, the sum of currents entering a node = Sum of currents leaving a node.
40.
Kirchhoff’s Voltage Law (KVL) states that the algebraic sum of voltages in a closed path is zero. By KVL, the sum of voltage raise in a closed path = Sum of voltage fall in a closed path. In a source, when voltage is constant and current varies with load then it is called voltage source. In a source, when current is constant and voltage varies with load then it is called current source. In an ideal voltage source, the source resistance is zero. In an ideal current source, the source resistance is infinite. A voltage source with internal resistance Rs can be represented by an ideal voltage source in series with an external resistance of value Rs. A current source with internal resistance Rs can be represented by an ideal current source in parallel with an external resistance of value Rs.
41. 42. 43. 44. 45. 46. 47.
A voltage source E in series with resistance Rs can be converted into an equivalent current source Is (Is = E/Rs) parallel with resistance Rs.
48.
A current source Is in parallel with resistance Rs can be converted into an equivalent voltage source E (E = Is Rs ) in series with resistance Rs.
49
When a source voltage depends on a voltage in some part of same circuit, the source is called Voltage Controlled Voltage Source (VCVS).
50.
When a source voltage depends on a current in some part of same circuit, the source is called Current Controlled Voltage Source (CCVS).
51.
When a source current depends on a voltage in some part of a same circuit, the source is called Voltage Controlled Current Source (VCCS).
52.
When a source current depends on a current in some part of a same circuit, the source is called Current Controlled Current Source (CCCS).
53.
Power is rate of work done and energy is total work done.
54
Commercially, one kilowatthour of electrical energy is called one unit.
55.
Resistance is the property of an element by which it opposes the flow of current.
56.
The voltagecurrent relation in a resistance is governed by Ohm’s law. If V and I are voltage and current in a resistance R then V = IR.
57.
Current division rule: If I is the total current through two parallel connected resistances R1 and R2 then the currents I1 and I2 flowing through R1 and R2 are, I1 = I #
R2 R1 + R2
and
I2 = I #
R1 R1 + R2
Chapter 1  Basic Circuit Analysis and Network Topology 58.
1. 197
Voltage division rule: If V is the total voltage across two series connected resistances R1 and R2 then the voltages V1 and V2 across R1 and R2 are, V1 = V #
R1 R1 + R2
and
V2 = V #
R2 R1 + R2
59.
Mesh is defined as a closed path which does not contain any other loops within it.
60.
Mesh analysis is used to solve the independent current variables of a circuit.
61.
The number of current variables in a circuit is equal to the number of branches.
62.
The number of independent currents in a circuit is given by the number of links in the graph of a circuit.
63.
The number of links L in a circuit with B branches and N nodes is given by L = B – N + 1.
64.
In mesh analysis, independent currents are solved by writing KVL equations for various meshes of a circuit. The mesh basis matrix equation for resistive circuit is, RR R R g R V RI V RE V 1m S 11 12 13 W S 1W S 11 W S R21 R22 R23 g R2m W S I2 W S E22 W S R31 R32 R33 g R3m W S I3 W = S E33 W S W S W S W h W Sh W h h h S h S h W SR R R g R W SI W SE W mm T m1 m2 m3 X T mX T mm X Mesh currents are solved using Cramer’s rule. The kth mesh current Ik by Cramer’s rule is,
65.
66. 67.
Ik = 1 ∆
m
/∆
jk
E jj
j=1
where, m = Number of meshes in the circuit
Djk = Cofactor of Rjk Ejj = Sum of voltage sources in meshj D = Determinant of resistance matrix. 68.
For circuit with three meshes, the mesh currents by Cramer’s rule are, ∆ ∆ ∆ I1 = 11 E11 + 21 E22 + 31 E33 ∆ ∆ ∆ ∆ ∆ ∆ I 2 = 12 E11 + 22 E22 + 32 E33 ∆ ∆ ∆ ∆13 ∆23 ∆33 I3 = E11 + E22 + E33 ∆ ∆ ∆
69.
The mesh currents for a circuit with three meshes using shortcut procedure for Cramer’s rule are, I1 =
∆1 ∆ I = 2 ; ∆ ; 2 ∆
I3 =
∆3 ∆
R11 R12 R13 E11 R12 R13 R11 E11 R13 R11 R12 E11 where, ∆ = R 21 R 22 R 23 ; ∆1 = E 22 R 22 R 23 ; ∆2 = R 21 E 22 R 23 ; ∆3 = R 21 R 22 E 22 R31 R32 R33 E33 R32 R33 R31 E33 R33 R31 R32 E33
Circuit Analysis
1. 198 70.
When a current source lie common to two meshes then the common current source can be removed for analysis purpose and the resultant two meshes can be considered as one single mesh called supermesh.
71.
Node analysis is used to solve the independent voltage variables of a circuit.
72.
The number of voltage variables in a circuit is equal to number of branches.
73.
The number of independent voltages in a circuit is given by number of twigs (or tree branches) in the graph of a cirucit.
74
The number of twigs (or tree branches) n in a circuit with N nodes is given by, n = N – 1.
75.
In node analysis, the independent voltages are solved by writing KCL equations for various nodes of a circuit.
76.
In node analysis, one of the node is chosen as reference node and its voltage is considered as zero and all other node voltages are solved with respect to reference node.
77.
The node basis matrix equation for resistive circuit is, RG S 11 SG 21 SG31 S S h SG T n1
G12 G 22 G32 h G n2
G13 G 23 G33 h G n3
RI V g G1n V RV1 V W S W S 11 W g G 2n W S V2 W S I 22 W g G3n W S V3 W = S I33 W W S W S W h W Sh W Sh W W S W SI W g G nn Vn X T X T nn X
78.
Node voltages are solved using Cramer’s rule.
79.
The kth node voltage Vk by Cramer’s rule is, Vk = 1 ∆l
n
/ ∆l jk I jj j=1
where, n
= Number of independent nodes in a circuit
∆l jk = Cofactor of Gjk
80.
Ijj
= Sum of current sources connected to nodej
∆l
= Determinant of conductance matrix.
For a circuit with three nodes excluding the reference node, the node voltages by Cramer’s rule are, V1 =
∆l ∆l11 ∆l I + 21 I + 31 I ∆l 11 ∆l 22 ∆l 33
V2 =
∆l ∆l12 ∆l I + 22 I + 32 I ∆l 11 ∆l 22 ∆l 33
V3 =
∆l13 ∆l ∆l I + 23 I + 33 I ∆l 11 ∆l 22 ∆l 33
Chapter 1  Basic Circuit Analysis and Network Topology 81.
1. 199
The node voltages of a circuit with three nodes excluding the reference using shortcut procedure for Cramer’s rule are, ∆l1 V1 = ∆l ∆l 2 V2 = ∆l ∆l 3 V3 = ∆l G11 G12 G13 I11 G12 G13 where, ∆l = G 21 G 22 G 23 ; ∆l1 = I 22 G 22 G 23 ; G31 G32 G33 I33 G32 G33 G11 I11 G13 G11 G12 I11 ∆l 2 = G 21 I 22 G 23 ; ∆l3 = G 21 G 22 I 22 G31 I33 G33 G31 G32 I33
82.
When a voltage source is connected between two nodes it can be shortcircuited for analysis purpose and the shortcircuited two nodes can be considered as one single node called supernode.
83.
An incidence matrix is a two dimensional array that provides information regarding the orientation of branches of a graph relative to the node of the graph.
84.
A cutset is a set of branches whose removal cuts the connected graph into two parts.
85.
In a graph with N nodes and B branches N1 cutsets can be formed.
86.
If one of the branches is twig and remaining branches are links, the cutset is called fundamental cutset or fcutset.
87.
A cutset matrix is a matrix that relates the node voltages and branch voltages of a graph.
88.
The order of the cutiset matrix of a graph with B branches and N nodes is (N1) × B.
89.
A tieset is a set of branches that form a closed path in a graph such that the closed path contains one link or chord and remaining are tree branches.
90.
The tieset with one of the branch as link and reamaining branches as twigs is also called fundamental circuit or fcircuit.
91.
A tieset matrix is a matrix that relates the loop currents and branch currrents of a graph.
92.
The order of the tieset matrix of a graph with B branches and N nodes is (BN+1) × B.
93.
Duality is defined as the concept of forming a voltage basis circuit for a given current basis circuit or viceversa with similar form of governing equations and solutions.
94.
A dual graph of a given graph can be constructed by converting each the tieset of the given graph as cutsets in the dual graph.
95.
Two graphs are said to be dual if the tiesets of one graph is same as that of the another graph.
96.
Two networks are said to be dual if the mesh equations (KVL equations) of one of the networks are in similar form as that of nodal equations (KCL equations) of the other network.
97.
The dual of mesh basis network will be a node basis network.
Circuit Analysis
1. 200
1.13 Shortanswer Questions Q1.1
What is the difference between a circuit and network? A network will not have any independent sources, whereas a circuit will have an independent source. When independent sources are connected to a network it becomes a circuit.
Q1.2
Define active and passive elements. The elements which can deliver energy are called active elements. The elements which consume energy either by absorbing or storing it are called passive elements.
Q1.3
List the active and passive elements of an electric circuit. The active elements of electric circuits are voltage source and current source. (Both independent and dependent source.) The passive elements of electric circuits are resistor, inductor and capacitor.
Q1.4
Define the dependent source of a circuit. If the electrical energy supplied by a source depends on the voltage or current in some other part of the same circuit then it is called a dependent source.
Q1.5
What is node and principal node? In a circuit, the meeting point of two or more elements is called a node. If more than two elements meet at a node then the meeting point is called a principal node.
Q1.6
Define the branch of a circuit. The path between any two nodes in a circuit is called a branch.
Q1.7
Define series and parallel connection. If two or more elements are connected such that the current through them is the same then the connection is called a series connection. If two or more elements are connected such that the voltage across them is the same then the connection is called a parallel connection.
Q1.8
What is meant by open circuit and short circuit? A path of infinite resistance between any two nodes is called an open circuit. The current through an open circuit is zero. A path of zero resistance between any two nodes is called a short circuit. The voltage across a short circuit is zero.
Q1.9
Define Ohm’s law. Ohm’s law states that the potential difference (or voltage) across any two ends of a conductor is directly proportional to the current flowing between the two ends provided the temperature of the conductor remains constant.
Q1.10
What are the limitations of Ohm’s law?
(AU Dec’16, 2 Marks)
(i) Ohm’s law cannot be applied for nonlinear elements. (ii) Ohm’s law cannot be applied to a unilateral network which has diodes and transistors.
Q1.11
Define Kirchhoff’s laws. 1. Kirchhoff’s current law states that the algebraic sum of currents in a node is zero. 2. Kirchhoff’s voltage law states that the algebraic sum of voltages in a closed path is zero.
Chapter 1  Basic Circuit Analysis and Network Topology Q1.12
1. 201
Draw the characteristics of an ideal and a practical voltage source. E
E
I
I
Fig. Q1.12.1 : Characteristic of an ideal voltage source. Q1.13
Fig. Q1.12.2 : Characteristic of a practical voltage source.
Draw the characteristics of an ideal and a practical current source. Is
Is
V
V
Fig. Q1.13.1 : Characteristic of an ideal current source. Q1.14
Fig. Q1.13.2 : Characteristic of a practical current source.
A 10 A current source has a source resistance of 100 Ω. What will be the equivalent voltage source? Solution The current source can be converted into an equivalent voltage source as shown in Fig. Q1.14.1 below: A
A 100 W
10 A
Þ
100 W
+  10 ´ 100
= 1000 V B
B
Fig. Q1.14.1 : Current source to voltage source conversion. Q1.15
Convert the voltage source shown in Fig. Q1.15.1 into a current source. A
A
Solution
Rs = 5
Given that, E = 20 V, Rs = 5 Ω Now, Is = E = 20 = 4 A Rs 5
E +E 20 V
Is B
Fig. Q1.15.1.
4A
Rs = 5
B
Fig. Q1.15.2.
The voltage source of Fig. Q1.15.1, can be represented by an equivalent current source of value 4 A with a source resistance of 5 Ω in parallel as shown in Fig. Q1.15.2.
Q1.16
A 2 kW, 220 V water heater is used to heat a water tank for 45 minutes. What will be the number of units of energy consumed? Solution Energy consumed = Power # Time = 2 kW # 45 Hours = 1.5 kWh = 1.5 Units 60
Circuit Analysis
1. 202 Q1.17
An electrical appliance consumes 1.2 kWh in 30 minutes at 120 V. What is the current drawn by the appliance? (AU Dec’14, 2 Marks) Solution Energy consumed in 30 minutes = 1.2 kWh Energy consumed in 1 hour (60 minutes) = 1.2 # 60 = 2.4 kWh 30 ∴ Power rating of the device, P = 2.4 kW = 2400 W ∴ Current, I = P = 2400 = 20 A V 120
Q1.18
A I2
Determine the value of current I, in the circuit shown in Fig. Q1.18.
I 2
+ 8V
2A +
Solution
E 2V
E
The voltage at nodeA = 8 V Current through 2 Ω resistance, I 2 = 8 − 2 = 3 A 2
Fig. Q1.18.
By KCL, 2 + l = I 2 ⇒ I = I 2 − 2 = 3 − 2 = 1 A
Q1.19
Obtain the current in each branch of the network shown in Fig. Q1.19.1. using Kirchhoff’s Current Law.
(AU May’15, 2 Marks)
Solution
5
2 I3
20 V + E
I1
10
Let VA be the voltage at nodeA.
&
20 − VA VA − 8 VA − − = 0 5 2 10
V V V ` 20 − A − A + 8 − A = 0 5 5 2 2 10 8 − 0.8VA = 0 ` VA =
&
+ 8V E
Fig. Q1.19.1.
By, KCL at nodeA we get, I1 − I2 − I3 = 0
I2
0.8VA = 8
8 = 10 V 0.8
20 − VA I1 = = 20 − 10 = 2 A 5 5 I2 =
VA − 8 = 10 − 8 = 1 A 2 2
I3 =
VA = 10 = 1 A 10 10
&
4 − 0.2 VA − 0.5VA + 4 − 0.1VA = 0
5
V1 = 20V
V2 = 8 V 2
A I 1
20 V + E
2
VA
1 a
20 E V A I2 a
5
V I3 a A 10
10
Fig. Q1.19.2.
VA E 8 2
+ E
8V
Chapter 1  Basic Circuit Analysis and Network Topology 3
Find the voltage across AB in the circuit shown in Fig. Q1.20.1.
+E
(AU June’16 & May’17, 8 Marks)
Voltage across 4 Ω resistor, V2 = 7 # 4 = 4 V 4 + 3
B
8 = 8V 8 + 2 3
On tracing from A to B, as shown in Fig. Q1.20.2. VAB = V2 + 5 + V3 = 4 + 5 + 8 = 17 V
Determine the currents I1, I2, I3 and I4 in the circuit shown in Fig. Q1.21.
2
8
Fig. Q1.20.1.
+
V1
10 V
A
+E
E +
7 V +E
V2
I1
4
E
+
V 5
Voltage across 8 Ω resistor, V3 = 10 #
5
4
+E
With reference to Fig. Q1.20.2, by voltage division rule,
V
7 V +E
E
Solution
Q1.21
10 V
A
+
Q1.20
1. 203
8
V3 E
E
I2
V4
2
+
B
Solution
Fig. Q1.20.2.
By KCL at nodeA, I1 + 2 + 5 = 0
⇒
2A
I1 = −7 A
A
B I1
At nodeB, I2 = 2 + 4 = 6 A
I2
4A
5A
At nodeC, 4 + I4 + 1 = 0
⇒
I4 = −5 A
I3
I4
D
At nodeD,
C 1A
I3 = 5 + 1 = 6 A
Q1.22
Fig. Q1.21.
(AU June’14, 8 Marks)
Find the current I and voltage across 30 W resistor in the circuit shown in Fig. Q1.22.1.
2
8
Solution +
The given circuit is redrawn as shown in Fig. Q1.22.2.
E + 100 V
40 V E
Now, by KVL,
I
30
Fig. Q1.22.1. 40 + 8 I + 2 I + 30 I = 100
8 E
8 I + 2 I + 30 I = 100 − 40
+ 8I
+
40 I = 60 ⇒
I = 60 = 1.5 A 40
Voltage across 30 Ω resistor = 30 I = 30 ´ 1.5 = 45 V
40 V
+ 100 V E
I E + 30I E 30
+
2I E 2
Fig. Q1.22.2.
Circuit Analysis
1. 204 Q1.23
Determine the current through each resistor in the circuit shown in Fig. Q1.23.
(AU June’14, 6 Marks) 12 A
Solution Since three equal resistances are connected in parallel, the current will divide equally in the three parallel paths.
+ Vs E
4
4
4
I1
I2
I3
` I1 = I2 = I3 = 12 = 4 A 3
B
Fig. Q1.23.
` Vs = I1 # 4 = 4 # 4 = 16 V
Q1.24
What will be the length of copper rod having a crosssection of 1 cm2 and a resistance of 1W ? Take resistivity of copper as 2 ´ 10 −8 Wm. Solution Given that, R = 1 Ω, a = 1 cm2 = 1 # 10 4 m2, ρ = 2 # 10 8 Ω − m We know that, Resistance, R =
ρl a
` Length, l = Ra ρ 1 # 1 # 10 4 = 5000 m = 5 km = 2 # 10 8
Q1.25
What is a single loop circuit? A single loop circuit is one which has only one closed path.
Q1.26
Define a single node pair circuit. A single node pair circuit is one which has only one independent node and a reference node.
Q1.27
Distinguish between mesh and loop of a circuit.
(AU June’16, 2 Marks)
Loop: A loop is any closed path in a circuit in which no node is encountered more than once. A loop may contain other paths inside it. Mesh : A mesh is a closed path which does not contain any other loops within it. Consider the circuit as shown in Fig. Q1.27. The closed path ABCDA is a loop. It has another two closed paths ABDA and BCDB inside it. The closed paths ABDA and BCDB are meshes which have no other closed paths inside them.
Q1.28
A
+ V E
R1
B
R3
C
R2
R4
D
Fig. Q1.27.
What is mesh analysis? Mesh analysis is a useful technique to solve the independent current variables of a circuit.
Q1.29
When is mesh analysis preferred to solve currents? Mesh analysis is preferred to solve current variables when the circuit is excited by voltage
Chapter 1  Basic Circuit Analysis and Network Topology
1. 205
sources only. Applying mesh analysis is straightforward and easier in circuits excited by voltage sources only. Mesh analysis can also be extended to circuits excited by both voltage and current sources.
Q1.30
How is mesh analysis performed? In a circuit with B branches and N nodes the number of independent currents is given by, m = B – N + 1. Hence, m number of meshes are selected in the given circuit and one mesh current is attached to each mesh. For each mesh, a KVL equation is formed and then the m number of mesh equations are solved by Cramer’s rule to get a unique solution for mesh currents.
Q1.31
How are mesh currents solved using the mesh basis matrix equation? Consider the mesh basis matrix equation, RI=E On premultiplying the above equation both sides by R −1 we get, R−1 R I = R−1 E U I = R−1 E
R−1 R = U = Unit matrix
∴ I = R−1 E
UI = I
The above equation will be the solution for mesh currents and the kth mesh current is, Ik =
∆ ∆1k ∆ ∆ E11 + 2k E22 + 3k E33 + ...... + mk Emm = 1 ∆ ∆ ∆ ∆ ∆
m
/
∆ jk E jj
j =1
The above equation for mesh currents is also called Cramer’s rule.
Q1.32
What is supermesh? When a current source lies common to two meshes then the common current source can be removed for analysis purpose and the resultant two meshes can be considered as one single mesh called supermesh.
Q1.33
What is the value of E in the circuit shown in Fig. Q1.33 if the value of I2 is zero? 2
Solution
3
The mesh basis matrix equation by inspection is,
=
4 − 2 I1 10 G = G = = G − 2 5 I2 E
Here, I 2 = Now, ∆2 =
10 V
4E = − 20
⇒
I2
Fig. Q1.33.
4 10 = 4E + 20 −2 E
⇒
E + E
2 I1
∆2 . Therefore, for I2 = 0 , ∆2 = 0 ∆
` 4E + 20 = 0
+ E
E = − 20 = − 5 V 4
Circuit Analysis
1. 206 Q1.34
Find the value of E1 and E2 in the circuit shown in Fig. Q1.34. Solution
4
+
The mesh basis matrix equation by inspection is,
>
E1 _
I1 = 3 A
E1 − E 2 5 − 4 I1 H H > H = > E2 − 4 9 I2
3
I2 = 1 A
+ E2 _
Fig. Q1.34.
On substituting for I1 = 3 A and I2 = 1 A in the above equation we get,
>
2
1
E1 − E2 5 −4 3 H > H = > H E2 −4 9 1
From row2 we get, –4 ´ 3 + 9 ´ 1 = E2
⇒
E2 = –3 V
From row1 we get,
⇒ 11 = E1 – E2
5 ´ 3 – 4 ´ 1 = E1 – E2
∴
E1 = 11 + E2 = 11 – 3 = 8 V 4
2
Q1.35
Find the value of I2 and E2 in the circuit shown in Fig. Q1.35. Solution
+
The mesh basis matrix equation by inspection is,
>
9 7 − 5 I1 H> H = > E H − 2 − 5 9 I2
⇒
>
+ E E 2
5
9V E
I2
I1 = 2 A
9 7 −5 2 H> H = > E H − 5 9 I2  2
Fig. Q1.35.
From row1 we get, 7 # 2 − 5I2 = 9
⇒
5I2 = 14 − 9
⇒
I2 = 14 − 9 = 1 A 5
From row2 we get, –5 ´ 2 + 9I2 = −E2
Q1.36
⇒
−E2 = –10 + 9 ´ 1 = –1 V
⇒
E2 = 1V
In the circuit shown in Fig Q1.36, find the power delivered to 1Ω resistor. Solution The mesh basis matrix equation is, 2 + 4 − 4 I1 16 − 5 > H> H = > H 5 − 10 − 4 4 + 1 I2 Now, ∆2 =
∆ =
⇒
6 − 4 I1 11 > H> H = > H −5 − 4 5 I2
6 11 = 6 # a− 5 k − a− 4 k # 11 = 14 −4 −5
2 6 −4 = 6 # 5 − a − 4 k = 14 −4 5
I2 =
∆2 = 14 = 1 ∆ 14
Power delivered to 1 Ω resistor = I22 ´ 1 = 1 ´ 1 = 1 W
16 V
1
4
2 + E
+ E
I1
5V I2
Fig. Q1.36.
+ E
10 V
Chapter 1  Basic Circuit Analysis and Network Topology Q1.37
1. 207
Find the current I in the circuit shown in Fig. Q1.37.
2
Solution
4 I
+
The mesh basis matrix equation is,
10 V _
4 − 2 I1 10 > H > H = > H − 2 6 I2 0
2 I1
I2
Fig. Q1.37.
2 4 −2 Now, ∆ = = 4 # 6 − a − 2 k = 20 −2 6
∆1 =
10 − 2 = 10 # 6 − 0 = 60 0 6
∆2 =
4 10 = 0 − a− 2 k # 10 = 20 −2 0
I = I1 − I 2 =
Q1.38
∆1 ∆2 ∆ − ∆2 − = 1 = 60 − 20 = 2 A 20 ∆ ∆ ∆
What is node analysis? Node analysis is a useful technique to solve the independent voltage variables of a circuit.
Q1.39
When is node analysis preferred to solve the voltages? Node analysis is preferred to solve voltage variables when a circuit is excited by current sources only. Applying node analysis is straightforward and easier in circuits excited by current sources only. Node analysis can also be extended to circuits excited by both voltage and current sources.
Q1.40
How is node analysis performed? In a circuit with N nodes, one of the nodes is chosen as the reference node and its voltage is considered as zero. The voltages of remaining N – 1 nodes are independent voltages of the circuit with respect to the reference node. For each node (except the reference node), a KCL equation is formed and then the n (where, n = N – 1) number of node equations are solved by Cramer’s rule to get a unique solution for node voltages.
Q1.41
How are the node voltages solved using the node basis matrix equation? Consider the node basis matrix equation, GV=I On premultiplying the above equation both sides by G−1 we get, G−1 G V = G−1 I U V = G−1 I ∴ V = G−1 I
G−1 G = U = Unit matrix UV = V
The above equation will be the solution for node voltages and the kth node voltage is, Vk =
∆l ∆l1k ∆l ∆l I11 + 2k I22 + 3k I33 + ...... + nk Inn = 1 ∆l ∆l ∆l ∆l ∆l
n
/
∆l jk I jj
j =1
The above equation for node voltages is also called Cramer’s rule.
Circuit Analysis
1. 208 Q1.42
What is supernode? When a voltage source is connected between two nodes it can be shortcircuited for analysis purpose and the shortcircuited two nodes can be considered as one single node called supernode.
Q1.43
What is the value of Is2 in the circuit shown in Fig. Q1.43 if the value of V2 is zero? Solution
2
V1
V2
The node basis matrix equation by inspection is,
=
4 5 − 2 V1 G G = G = = − Is2 − 2 5 V2
4A
3
3
Is2
0
∆l 2 Now, V2 = . Therefore, for V2 = 0, ∆l 2 = 0 ∆ Here, ∆l 2 =
Reference node
Fig. Q1.43.
5 4 = − 5Is2 + 8 − 2 − Is2
` − 5Is2 + 8 = 0 ⇒ 5Is2 = 8 ⇒ Is2 = 8 = 1.6 A 5 Is2
Q1.44
Find the value of Is1 and Is2 in the circuit shown in Fig. Q1.44. Solution
3
The node basis matrix equation by inspection is,
V1 = 3 V
Is1
Is1 − Is2 5 − 3 V1 G G = G = = = Is2 − 3 6 V2
V2 = 2 V 2
2
0
On substituting for V1 = 3 V and V2 = 2 V in the above equation we get,
1
Reference node
Fig. Q1.44.
Is1 − Is2 5 −3 3 G G = G = = = Is2 −3 6 2 From row2 we get, –3 ´ 3 + 6 ´ 2 = Is2 ⇒ Is2 = 3 A From row1 we get, 5 ´ 3 – 3 ´ 2 = Is1 – Is2 ⇒ Is1 = 9 + Is2 = 9 + 3 = 12 A
Q1.45
V1 = 4 V
Find the value of V2 and Is2 in the circuit shown in Fig. Q1.45. Solution The node basis matrix equation by inspection is,
=
4 5 − 4 V1 G = G = = G Is2 − 4 6 V2
⇒
=
4 5 −4 4 G = G = = G Is2 − 4 6 V2
From row1 we get, 5 # 4 − 4V2 = 4 ⇒
4V2 = 16 ⇒ V2 = 16 = 4 V 4
From row2 we get, – 4 ´ 4 + 6V2 = Is2 ⇒
Is2 = –16 + 6 ´ 4 = 8 A
1
4A
4
V2
2
0
Is2
Reference node
Fig. Q1.45.
Chapter 1  Basic Circuit Analysis and Network Topology Q1.46
1. 209
In the circuit shown in Fig. Q1.46, find the power delivered to 2M conductance. 2A
Solution The node basis matrix equation by inspection is, 3
1+3 4−2 4 − 3 V1 − 3 V1 2 G= G = = G⇒ = G= G = = G = 2+1 − 3 3 + 1 + 2 V2 − 3 6 V2 3
V2 1
4A 1
∆l =
4 −3 = 4 # 6 − ^− 3h2 = 15 −3 6
` V2 =
2
1A 0
4 2 = 4 # 3 − ^− 3h # 2 = 18 −3 3
∆l 2 =
V1
Reference node
Fig. Q1.46.
∆l 2 = 18 = 1.2 V ∆l 15
Power delivered to 2M conductance = V22 ´ 2 = 1.22 ´ 2 = 2.88 W
Q1.47
Find the voltage Vx in the circuit shown in Fig. Q1.47. Solution
1
The node basis matrix equation is,
=
7 − 5 V1 9 G = G = = G − 5 10 V2 0
+ Vx E V1 4 2
V2
5
9A
∆l =
7 −5 = 7 # 10 − ^− 5h2 = 45 − 5 10
∆l1 =
9 −5 = 90 − 0 = 90 0 10
∆l 2 =
7 9 = 0 − ^− 5h # 9 = 45 −5 0
Vx = V1 − V2 =
Q1.48
0
Reference node
Fig. Q1.47.
∆l1 ∆l 2 ∆l1 − ∆l 2 − = = 90 − 45 = 1V 45 ∆l ∆ ∆
What are network variables? Branch currents and voltages are called network variables. Branch currents are called current variables and branch voltages are called voltage variables.
Q1.49
What is network topology? Network topology is the study of properties of a network which are unaffected when we stretch, twist or distort the size and shape of the network.
Q1.50
What is a graph? A graph is topological description of a network and consists of nodes and branches.
Q1.51
What is oriented graph? A graph is called an oriented graph when the direction of branch currents and voltages are specified by placing an arrow in each branch of the graph.
Circuit Analysis
1. 210 Q1.52
What is a path in a graph? A sequence of branches traversed while going from one node to another node is called a path.
Q1.53
What is connected graph? A graph is said to be a connected graph if there exists atleast one path from each node of a graph to every other node of the graph.
Q1.54
What are planar and nonplanar graphs? When a graph can be drawn on a plane surface without crossover of branches then it is called a planar graph. A graph which cannot be drawn on a plane surface without crossover of branches is called a nonplanar graph.
Q1.55
Define tree, link and cotree. Tree: Tree is a subgraph and can be defined as any connected open set of branches which includes all nodes of a given graph. Link: The branches removed from the graph of a network to form a tree are called links. Cotree: The cotree is complement of a tree.
Q1.56
How will you form a tree of a graph? A tree is a subgraph which is obtained by removing some branches such that the subgraph includes all the nodes of the graph but does not have any closed paths. For a graph with B branches and N nodes, the number of closed paths is given by links L, where, L = B – N + 1 Hence, a tree is formed by removing L number of branches from a graph such that all the nodes remain connected but without any closed paths.
Q1.57
Draw a tree of the graph shown in Fig. Q1.57.1. The given graph has 10 branches, (B = 10) and 5 nodes (N = 5).
Fig. Q1.57.1.
∴ Links, L = B – N + 1 = 10 – 5 + 1 = 6 Let us remove 6 branches and form a tree as shown in Fig. Q1.57.2.
Q1.58
Write the properties of a tree. The properties of a tree of a graph are, 1. The tree contains all the nodes of a graph. 2. The tree contains N – 1 branches. 3. The tree does not have a closed path.
Fig. Q1.57.2.
Chapter 1  Basic Circuit Analysis and Network Topology Q1.59
1. 211
What are links and twigs ? The branches of a graph which are removed to form a tree are called links or chords. The branches of a tree are called twigs. In a graph with B branches and N nodes, Number of links = B – N + 1 Number of twigs = N – 1
Q1.60
What is a cotree ? The cotree is complement of a tree. It is obtained by connecting the links to the nodes of a graph.
Q1.61
Define incidence matrix. The incidence matrix is defined as a twodimensional array which provides information regarding the orientation of branches of a graph relative to nodes of the graph.
Q1.62
Determine the incidence matrix of the graph shown in Fig. Q1.62. a b c d e R V 1 −1 1 0 0 W S Complete incidence matrix, AC = S − 1 0 0 1 0 W S W S 0 1 0 0 1W S 0 0 −1 −1 −1 W T X Let us delete row4 and form reduced incidence matrix.
a
1
1 2 3 4
2
b
c d
4
e
3
Fig. Q1.62.
V R S 1 −1 1 0 0 W Incidence matrix, A 4 = S−1 0 0 1 0 W SS 0 1 0 0 1 WW (or reduced incidence matrix) X T
Q1.63
What is tieset ? A tieset is a set of branches that form a closed path in a graph such that the closed path contains one link and the remaining are tree branches.
Q1.64
What is tieset matrix ? The tieset matrix is a twodimensional array in which the relation between the loop currents and branch currents is tabulated.
Q1.65
Determine the tiesets of the graph shown in Fig. Q1.65.1. The graph shown in Fig. Q1.65.1 has 5 branches (B = 5) and four nodes (N = 4). ∴ Links, L = B − N + 1 = 5 − 4 + 1 = 2 Since the graph has two links, the number of tiesets will be two. Let us remove L number of branches and form a tree as shown in Fig. Q1.65.1. The tiesets are shown in Fig. Q1.65.2 and Fig. Q1.65.3. a 1 1
b
c
3
e
d
4
Fig. Q1.65.1 : Tree.
2
1
2 c
c
I2 d
I1 3
4 e Tieset1: [b,c,e]
Fig. Q1.65.2.
4 Tieset2: [a,c,d]
Fig. Q1.65.3.
Circuit Analysis
1. 212 Q1.66
What are equilibrium equations ? Equilibrium equations are a set of equations governing the network in which the unknowns are the independent variables of the network. On solving the equilibrium equations, we get the solution of unknown variables. When equilibrium equations are formed using tiesets, the unknowns are loop currents and when they are formed using cutsets, the unknowns are node voltages.
Q1.67
What is cutset ? The cutset is a set of branches whose removal cuts the connected graph into two parts with the condition that replacing any one branch of the cutset renders the two parts connected. Each cutset contains one twig and the remaining branches are links.
Q1.68
What is cutset matrix ? The cutset matrix is a twodimensional array in which the relation between the node voltages and branch voltages is tabulated.
Q1.69
Determine the cutsets of the graph shown in Fig. Q1.69.1. The graph shown in Fig. Q1.69.1 has 4 nodes (N = 4) and so we can form, N – 1 = 4 – 1 = 3 cutsets. The three cutsets are shown in Fig. Q1.69.2. 1
a
1
2
b
d
Cutset1 c
d
2
c
Cutset2
Cutset3
Cutset1 : [b, c] Cutset2 : [a, d] Cutset3 : [b, e]
b 3
e
Fig. Q1.69.1. Q1.70
4
3 e
4
Reference node
Fig. Q1.69.2.
What is duality in circuits ? Duality refers to the concept of forming (or identifying) a voltage basis circuit for a given current basis circuit (or viceversa) with similar form of governing equations and solutions.
Q1.71
What is dual network ? Two networks are said to be dual networks if the mesh equations (KVL equations) of one of the networks are in a form similar to that of nodal equations (KCL equations) of the other network.
Q1.72
What is dual graph ? Two graphs are said to be dual if the tiesets of one graph is the same as that of cutsets of the other graph.
Q1.73
Draw the dual of the network shown in Fig. Q1.73.1. The dual of the network of Fig. Q1.73.1 is shown in Fig. Q1.73.2. 5
2 5A
2
3
3 5
2A +
+ E 2V
5V E
Fig. Q1.73.1.
Fig. Q1.73.2.
Chapter 1  Basic Circuit Analysis and Network Topology
1.14
1. 213
Exercises
I. Fill in the Blanks With Appropriate Words 1.
The elements which consume energy either by absorbing/storing it are called _________ elements.
2.
The sources in which the current/voltage does not change with time are called _________.
3.
The electrical energy supplied by _________source depends on another source of electrical energy.
4.
The path between any two nodes is called _________.
5.
In an electric circuit, when elements are _________connected, the current will be the same.
6.
In an electric circuit, a path of infinite resistance is called _________.
7.
In an electric circuit, a path of zero resistance is called _________.
8.
In an electric circuit, the algebraic sum of _________ in a node is zero.
9.
In an electric circuit, the algebraic sum of _________ in a closed path is zero.
10. In an ideal _________ source, the terminal voltage remains constant. 11. The _________ is given by the product of power and time. 12. Mesh analysis is used to solve ________ variables of a circuit. 13. A circuit with B branches and N nodes will have ________ independent currents. 14. In a mesh basis matrix equation, mesh currents are solved using ________. 15. Mesh equations are ________ equations of a circuit. 16. The solution of a mesh basis matrix equation RI = E will be in the form ________. 17. Node analysis is used to solve ________ variables of a circuit. 18. A circuit with N nodes will have ________ independent voltages. 19. In a node basis matrix equation, node voltages are solved by using ________. 20. Node equations are ________ equations of a circuit. 21. The solution of node basis matrix equation GV = I will be in the form ________. 22. The ________ is a branch of science which deals with the study of geometrical properties that are unaffected by change of shape or size of figures. 23. The ________ indicates the direction of a branch current and the sign of a branch voltage. 24. In ________ graphs, the branches do not cross one over the other. 25. The number of closed paths in a graph is equal to the number of ________ . 26. When some of the branches in an original graph are removed, the resultant graph is called ________ . 27. A network has 7 nodes and 5 independent loops. The number of branches in the network is ________ . 28. In a graph ________ currents are independent variables. 29. The number of possible trees in a graph is given by determinant of ________ . 30. Using incidence matrix, the relation between branch and node voltages is expressed by the equation ________ .
Circuit Analysis
1. 214
31. The tieset with one of the branches as link and remaining branches as twigs is called ________ . 32. The number of tiesets is equal to the number of ________ . 33. Using tieset matrix, the relation between branch and loop currents is expressed by the equation ________ . 34. The number of cutsets is equal to the number of ________ . 35. Using cutset matrix, the relation between branch and node voltage is expressed by the equation ________ . 36. The planar graph has 4 nodes and 6 branches. The number of meshes in the dual graph is ________ .
ANSWERS 1.
passive
9.
2.
dc sources
3.
voltages
T
17. Voltage
25. links
33. IB = M I L
10. voltage
18. N – 1
26. subgraph
34. twigs
dependent
11. energy
19. Cramer’s rule
27. 11
35. VB = Q VN
4.
branch
12. Current
20. KCL
28. link
36. 3
5.
series
13. B – N + 1
21. V = G1I
29. AA
6.
open circuit
14.Cramer’s rule
22. topology
30. VB = A VN
7.
short circuit
15.KVL
23. arrow or orientation
31. fundamental circuit
8.
currents
16. I = R–1E
24. planar
32. links
T
T T
II. State Whether the Following Statements are True or False 1.
The elements of electric circuits which can deliver energy are called active elements.
2.
Inductance and capacitance absorb energy.
3.
The electrical energy supplied by an independent source depends on another electrical source.
4.
In an electric circuit, the meeting point of two or more elements is called the principal node.
5.
In parallel connected elements, the voltage will be the same.
6.
In an electric circuit, a voltage exists across open terminals.
7.
In an electric circuit, a current flows through shortcircuited terminals.
8.
In an electric circuit, when an element delivers energy, the current will leave from the negative terminal.
9.
In an electric circuit, when an element absorbs energy, the current will enter at the negative terminal.
10. An ideal voltage source can be converted into an ideal current source. 11. In an ideal current source, the terminal voltage remains constant. 12. Power is rate of work done and energy is the total work done. 13. Mesh analysis can be used to solve voltage variables from the knowledge of current variables. 14. Mesh analysis can be applied only to circuits excited by voltage sources. 15. Mesh currents are independent current variables of a circuit. 16. Mesh analysis is applicable to nonplanar circuits. 17. Mesh equations are formed using KCL.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 215
18. Node analysis can be used to solve current variables from the knowledge of voltage variables. 19. Node analysis can be applied only to circuits excited by current sources. 20. Node voltages are independent voltage variables of a circuit. 21. For node analysis, any node can be chosen as the reference node. 22. Node equations are formed using KVL. 23. A graph describes the topological properties of a network. 24. The orientation of a branch indicates only the direction of the branch current. 25. In nonplanar graphs, branches cross one over the other. 26. A tree does not have any closed path. 27. The cotree is the complement of a tree. 28. A tree of a graph with N nodes will have N + 1 branches. 29. The links connected to the nodes of a graph form a cotree. 30. The cotree is a connected subgraph and does not have any closed path. 31. In a graph, link voltages are independent variables. 32. In a graph, twig voltages are independent variables. 33. The sum of elements in any column of a reduced incidence matrix is zero. 34. The determinant of a complete incidence matrix of a closed loop is nonzero. 35. The product of an incidence matrix and a branch current matrix is a null matrix. 36. The product of a tieset matrix and a branch voltage matrix is a null matrix. 37. The product of a cutset matrix and a branch current matrix is a null matrix.
ANSWERS 1.
True
9.
2.
False
3.
False
4.
False
17. False
25. True
33. False
10. False
18. True
26. True
34. False
11. False
19. False
27. True
35. True
True
12. True
20. True
28. False
36. True
5.
True
13. True
21. True
29. True
37. True
6.
True
14. False
22. False
30. False
7.
True
15. True
23. True
31. False
8.
False
16. False
24. False
32. True
III. Choose the Right Answer for the Following Questions 1
1. The voltage VAB across the open circuit in the circuit shown in Fig. 1 is,
5 A +
a) 2 V b) 4 V c) 8 V d) 6 V
20 V +E
4
VAB E B
5
6
Fig. 1.
Circuit Analysis
1. 216 2. The current Isc through the short circuit in the circuit shown in Fig. 2 is, a) 4 A
3
12 V +E
4
2
Isc
5
b) 3 A c) 2 A
1
Fig. 2.
d) 1 A
5
3. The voltage VL in the circuit shown in Fig. 3 is, a) 4 V
6
+ VL
2A
b) 8 V
3A
4
E
c) 12 V
Fig. 3.
d) 20 V
4. The current Is delivered by the voltage source in the circuit shown in Fig. 4 is,
2
4 Is
a) 6 A
8
1
b) 5 A
+ E 20 V
c) 4 A
Fig. 4.
d) 2 A
A
5. The node voltage VA in the circuit shown in Fig. 5 is,
VA
a) 8 V b) 6 V
10 A
5
2
10
2A
c) 10 V
Fig. 5.
d) 2 V
6. The values of voltage sources E1 and E2 in the circuit shown in Fig. 6 are, a) 11 V, 16 V b) 16 V, 11 V
5
5
2A + E1 E
1A + E2
2 E
c) 5 V, 7 V
Fig. 6.
d) 7 V, 5 V
7. The currents I1 and I2 in the circuit shown in Fig. 7 are,
I1
2A
a) 7, 5 b) 3, 7 c) –5, –3 d) –7, –5
4A
5A
1A
Fig. 7.
I2
Chapter 1  Basic Circuit Analysis and Network Topology
1. 217
8. The equivalent current source for the voltage source in the circuit shown in Fig. 8 is, 5
2
10 V + 2 E
1
3
Fig. 8. 7
6
2
a)
b)
c) 10 A
10 A
d)
2
2
5A
10
2A
9. The equivalent voltage source for the current source in the circuit shown in Fig. 9 is, 5
5A 3
8
2
Fig. 9. a)
5
b) +
1.2
c)
+ 3
5V
+
25 V
E
3
d) +
6V E
15 V E
E
10. The equivalent current source for the dependent voltage source in the circuit shown in Fig. 10 with respect to terminals A B is, 4
10 V +E
3Ix + E
A
Ix
5
2
Fig. 10. B A
a)
1.5Ix
Ix
5
B
A
b)
Ix
5
2
B
A
c) 1.5Ix
2
d) Not possible Ix
5
B
1.5Ix
2
Circuit Analysis
1. 218 11. The equivalent voltage source for the dependent current source in the circuit shown in Fig. 11 with respect to terminals AB is, A
a)
E +
2
0.1Vx
b)
A
A
B + E
B 2
7
2
0.4Vx
c)
0.2Vx
B
A
12 V +E
B
+ 4
6
E +
Vx E
2
0.4Vx
Fig. 11.
d) Not possible
12. In Fig. 12, the currents I1, I2 and I3 respectively are,
5A
a) 1.5 A, 1.5 A, 2 A
I1
b) 1 A, 1 A, 3 A
I3
I2
3
3
6
c) 1 A, 2 A, 3 A d) 2 A, 2 A, 1 A
Fig. 12.
13. In Fig. 13, the voltage V1, V2 and V3 respectively are,
+
V1
E
+
2
a) 4 V, 6 V, 10 V
V2
E
4
+
V3
E
10
b) 3.5 V, 6.5 V, 10 V c) 2.5 V, 5 V, 12.5 V
+E
20 V
Fig. 13.
d) 2 V, 6 V, 12 V
14. Mesh analysis is based on, a) KCL
b) KVL
c) Ohm’s law
d) none of the above
15. A planar circuit has 6 branches and 4 nodes, then the number of meshes are, a) 6
b) 5
c) 4
d) 3
th
16. In a circuit with m meshes, the k mesh current by Cramer’s rule is given by, k
a) I k = 1 ∆
/∆
c) I k = 1 ∆
/∆
jk E jj
j=1 m
jk E jj
j=1
j
b) I k = 1 ∆
/∆
d) I k = 1 ∆
/∆
jk E kk
k =1 m
jm E km
k =1
17. In mesh analysis, when all the mesh currents are chosen in the same orientation then the mutualresistances are, a) always negative
b)
always positive
c) positive or negative
d)
always zero
Chapter 1  Basic Circuit Analysis and Network Topology
1. 219
18. The mesh currents I1, I2 and I3 in the circuit shown in Fig. 18 are respectively are,
2A
4A
a) 2 A, 4 A, 6 A
I1
6A
b) 2 A, 10 A, 6 A I2
I3
c) 2 A, 6 A, 0
Fig. 18. d) 2 A, 6 A, 4 A
19. In the circuit shown in Fig. 19, the currents I1 and I2 respectively are,
1
1
a) 1 A, –1 A b) 2 A, 2 A
+ E
5V
+ E
2 I1
c) 2 A, 0
5V
I2
Fig. 19.
d) 1 A, 0
20. In the circuit shown in Fig. 20, the value of E1 and I1 respectively are,
1
1
a) 6 V, 3 A b) 4 V, 2 A
E1
+ E
I1
c) 7 V, 1 A
I2 = 1 A
Fig. 20.
d) 5 V, 3 A
3
3
21. In the circuit shown in Fig. 21, what is the value of E1 for the current I1 to be zero? a) 20 V
1
1
E1
+ E
+ E
3 I1
10 V
I2
b) 10 V
Fig. 21.
c) 5 V d) 0
22. In the circuit shown in Fig. 22, what is the value of E1, if the power delivered to 1Ω resistor is 1 W? a) 10 V b) 9 V c) 11 V d) 7 V
4
E1
+ E
2
3 I1
1 I2
Fig. 22.
Circuit Analysis
1. 220
2
1
23. In the circuit shown in Fig. 23, the value of I1 and I2 respectively are, a) 2 A, 1 A 9V
b) 3 A, 2 A
+ E
7
5
I1
c) 4 A, 1 A d) 2 A, 5 A
I2
Fig. 23.
24. Node analysis is based on, a) KCL
b) KVL
c) Ohm’s law
d) none of the above
25. If a circuit has 8 branches and 5 nodes, then the number of independent voltages are, a) 7
b) 6
c) 5
d) 4
26. In a circuit with n independent voltages, the kth node voltage by Cramer’s rule is given by, k
a) Vk = 1 ∆l
/ ∆l
c) Vk = 1 ∆l
/ ∆l
jk
I jj
j=1 n
jk
I jj
j=1
j
b) Vk = 1 ∆l
/ ∆l
d) Vk = 1 ∆l
/ ∆l
jk
I kk
jn
I kn
k =1 m
k =1
27. In a node basis matrix equation, mutual conductances are, a) always positive
b)
always negative
c) positive or negative
d)
always zero
28. The node voltages V1, V2 and V3 in the circuit shown in Fig. 28 respectively are, a) 6 V, 4 V, – 2 V
6V V1
b) 10 V, 4 V, 2 V
2V
V2
+E
+E
V3
+ E 4V
c) 6 V, 2 V, –2 V 0
d) 10 V, 2 V, 2 V
Reference node
Fig. 28.
29. In the circuit shown in Fig. 29, the voltages V1 and V2 respectively are,
2
V1
V2
a) 4 V, 2 V b) 3 V, 1 V c) 3 V, 3 V d) 2 V, 2 V
3A
1
1
3A
0 Reference node
Fig. 29.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 221
30. The node voltages V1, V2 and V3 in the circuit shown in Fig. 30 are,
V1 6A
a) 1.5 V, 2 V, 1.67 V
V2
2
4
b) 24 V, 8 V, 15 V
4A Reference node
c) 2 V, 2 V, 2 V
3
5A
d) 10 V, 6 V, 8 V
Fig. 30. V3
31. If the node voltage V2 is zero then the value of Is2 in the cirucit shown in Fig. 31 is, 1
V1
1
V2
V3
a) –4 A b) 4 A
4A
2
4
c) –2 A
0
Reference node
Fig. 31.
d) 2 A
32. In the circuit shown in Fig. 32, the power P1 and P2 delivered by current sources are, a) P1 = 4 W, P2 = 4 W
Is2
2
1
V1
4 A, P1
V2
2
1
b) P1 = 8 W, P2 = 4 W
2 A, P2
0 Reference node
c) P1 = 6 W, P2 = 2 W
Fig. 32.
d) P1 = 8 W, P2 = 0 V1
33. In the circuit shown in Fig. 33, what is the value of Is1 for the power delivered to 1 W resistor is 25 W? a) 35 A
Is1
2
2
V2
2
1
b) 17.5 A 0
c) 8.75 A
Reference node
Fig. 33.
d) 4.375 A
34. The number of links and twigs in the graph shown in Fig. 34 respectively are, a) 5, 6 b) 5, 5 c) 6, 5 d) 11, 5
Fig. 34.
Circuit Analysis
1. 222
35. For the graph shown in Fig. 35, which one of the following is not a proper tree? 1
2
4 3
5
Fig. 35. a)
1
3
b)
2
4
3
5
1
2
1
c)
4
3
5
4
1
d)
2
4
3
5
2
5
ANSWERS 1.
c
8.
c
15. d
22. c
29. c
2.
b
9.
d
16. c
23. a
30. b
3.
d
10. b
17. a
24. a
31. a
4.
a
11. c
18. c
25. d
32. d
5.
c
12. d
19. a
26. c
33. b
6.
b
13. c
20. d
27. b
34. a
7.
d
14. b
21. c
28. b
35. c
IV. Unsolved Problems E1.1
Find the node voltages in the circuit shown in Fig. E1.1. R1 A 12 V V1
+E
1
+E
2 R3
R2 B
3
5
2A
R3
V3
3
I1
R1
6V
V2
R2
I2
1
2A
5A
+ E 3V
I3 D
4 Vs
2
+ E
C
0
10 A
Fig. E1.1.
Fig. E1.2.
Fig. E1.3.
E1.2
Find the branch currents I1, I2 and I3 in the circuit shown in Fig. E1.2.
E1.3
Find the value of the source voltage Vs in the circuit shown in Fig. E1.3.
E1.4
A 20 V source with internal resistance 0.2 Ω is connected in series with a 30 V source with internal resistance 0.3 Ω to deliver a load current of 10 A to resistive load. Calculate, a) Load power PL and b) Power delivered by each source to load.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 223
E1.5
Two current sources with internal resistance 50 Ω and 100 Ω are connected in parallel to supply a 4.8 kW load at 200 V. If the generated source current of the source with 50 Ω internal resistance is 12 A, what is the generated source current of the other source?
E1.6
What is the value of the emf, E of the battery in the circuit shown in Fig. E1.6? Say whether the battery is charging or discharging. 1
2
2
2 1A
14 A + 24 V
E1.7 E1.8
+
+
1
3
E
E
1
E
E
E
Fig. E1.7. Fig. E1.6. What is the value of source voltage, E in the circuit shown in Fig E1.7. What is the value of load voltage, VL in the circuit shown in Fig. E1.8? Also, calculate the power delivered by the current source. 2A 4
5
4
I
+ 10 A
3
2
+ E
VL E
V2
4
10 V 0.5
5
2
V1
3
4
4
4
4.5 A
1A
6
Fig. E1.8. Fig. E1.10.
Fig. E1.9. E1.9
Determine the current, I delivered by the voltage source in the circuit shown in Fig. E1.9. Also, calculate the power delivered by the voltage source.
E1.10 Determine the voltages V1 and V2 in the circuit shown in Fig. E1.10. E1.11 Determine the mesh currents shown in the circuit of Fig. E1.11. 1
1
Ie
4
Id
Ib 3
I2
3
I3
4
2
2
5
Fig. E1.11.
5
I1
Ia
1
+ E
1
5
1
If 12 V
+ E 5V
+ E 10 V
A
Ic
3
1
+ E
E
1 1
9V
2 +
E
1
Fig. E1.13.
Fig. E1.12.
E1.12 Determine the current through various branches of the circuit in Fig. E1.12 by mesh analysis. Take resistance of ammeter as 0.2 Ω. E1.13 In the circuit shown in Fig. E1.13, find the value of E by mesh analysis such that the current through the 5 Ω resistor is zero.
Circuit Analysis
1. 224
E1.14 By mesh analysis, determine the power delivered to 2 Ω and 1 Ω resistor in the circuit of Fig. E1.14. +E
E
5V 2
10 V
+ E
VL 2
1 5
2 12 V +
+ E
+
3
5V
1
4
E
2
1
Fig. E1.14.
2
Fig. E1.15.
E1.15 In the circuit shown in Fig. E1.15, determine the voltage VL by mesh analysis. E1.16 Determine the mesh currents of the circuit shown in Fig. E1.16. + o
50Ð0 V
~
I1
2W

2W 1W
IL
j5 W
j2 W
2W
j4 W
j4 W
I3
j3 W
j4 W
4W
5Ð0o A
~
1W
j3 W
1W
~
o
2Ð30 A
I2
Fig. E1.16.
Fig. E1.17. E1.17 Determine the current I L in the circuit shown in Fig. E1.17 by mesh analysis. E1.18 Determine the active and reactive power delivered to the 2 + j4 Ω impedance in the circuit of Fig. E1.18.
2W
2 + j4 W
4W
1
2 5
5A
j5 W
j3 W
8
+ 10 V E
o
100Ð0 V
Fig. E1.19.
~ Fig. E1.18.
E1.19 Determine the power delivered to the 8 Ω resistor in the circuit of Fig. E1.19 using mesh analysis. E1.20 In the circuit shown in Fig. E1.20, form two supermeshes and hence, determine the current IL. 3
5
IL I1 6V
I4
+ E
2A I2 1
2
3A I3 1
Fig. E1.20.
5
Chapter 1  Basic Circuit Analysis and Network Topology
1. 225
E1.21 Determine the power delivered by each source to the 2 Ω resistor in the circuit of Fig. E1.21 by mesh analysis. 6 + E
10 V
2 Ix
6 12 V
2A
2
+ E
2
2 + E
4 I1
5
4Ix
I2
I3
Fig. E1.22.
Fig. E1.21.
E1.22 Solve the mesh currents of the circuit shown in Fig. E1.22 E1.23 Determine the voltage across 6 Ω resistor in the circuit of Fig. E1.23 by mesh analysis. 4V +
E
+
3V
2V
E
+E
2
4
E
+
8V
0.5Vx
1 3
1
5
3
+
Ix
Vx E 4
2Ix 6
A
10
A
B
B
Fig. E1.24.
Fig. E1.23.
E1.24 In the circuit of Fig. E1.24, determine the current through 10 Ω resistor by mesh analysis.
E
+
E1.25 Determine the power delivered by the dependent voltage source in the circuit of Fig. E1.25 by mesh analysis. 0.5Vx
1
2
3 + 6V
+ 9V
+ E
Vx 1
6
E
4
+ E
1
E
3A
2
2
3
+ 10 V V4
2A 4
_
Fig. E1.25.
Fig. E1.26.
E1.26 Find the voltage across 4 Ω resistor in the circuit shown in Fig. E1.26 by mesh analysis.
E1.27 Determine the branch voltages in the circuit shown in Fig. E1.27 by node method. V2
2 +
_ Vf
1
_
+
Ve
Va 8
_
_
5A
+
+ Vb
+
2 V3
V1 4A
Vc 2A
2
_ Vd
_
+
1
5
4
Fig. E1.27.
10
5
5
0
Fig. E1.28. E1.28 Determine the node voltages in the circuit shown in Fig. E1.28.
Circuit Analysis
1. 226 E1.29 Determine the current I L in the circuit of Fig. E1.29 by node method. 0.1
IL
3A
5
0.4
10 A
0.2
4
2
0.5
4
1
5A
1.6
2A
2.5
Fig. E1.30.
0.25
Fig. E1.29.
E1.30 Determine the power supplied/absorbed by the current sources in the circuit shown in Fig. E1.30. E1.31 Determine the power absorbed by 10 Ω resistor in the circuit of Fig. E1.31. 10
o 5Ð0 A
2A
~
4A V1
1
5
V2
j4 W
3W
3
8W
5W 3
j4 W
0
7
Fig. E1.31.
Fig. E1.32.
E1.32 Determine the node voltages V 1 and V 2 in the circuit shown in Fig. E1.32. E1.33 Determine the node voltages in the circuit shown in Fig. E1.33. V2
j0.5 W
1+j2 W
V3
0.1 W
~
j0.2 W
~
j0.2 W j0.1 W
10Ð0o A
10+j5 W
0.2 W
4+j8 W
2j6 W
~
5Ð90o A
0.4 W
3Ð90o A
6Ð0o A
V1
~
Fig. E1.34.
0
Fig. E1.33. E1.34 In the circuit shown in Fig. E1.34, determine the active and reactive power in the impedance 1 + j2 Ω by node method. E1.35 In the circuit shown in Fig. E1.35, calculate the current I L by node method.
A
8j4 W
~
15 V
+ E
5
_ Vd
Vc _
+
o
9 0
~
Vb _
+ E
5V
5Ð
5Ð0o A
10+j5 W
+ E
+
~
10Ð30o A
10 V
IL
10
4
_
2j6 W
+
+
2
Va
Fig. E1.35.
+ Ve 1 _
Fig. E1.36. E1.36 Determine the voltages across the resistors in the circuit shown in Fig. E1.36 by node analysis.
Chapter 1  Basic Circuit Analysis and Network Topology
1. 227
E1.37 Determine the power delivered/absorbed by the sources in the circuit shown in Fig E1.37, by node analysis. I2
I1
8
10 2 15 V
4
+ E
+ E
10 V
4A
5
1A
I3 5 A
I4
8 2
5
4
10
+ E
5V
1
Fig. E1.37.
Fig. E1.38. E1.38 Determine the currents I 1, I 2 , I 3 a n d I 4 in the circuit shown in Fig. E1.38 by node analysis.
E1.39 Calculate the voltage Vx and hence, estimate the power delivered or absorbed by the dependent source in the circuit shown in Fig. E1.39. E1.40 Calculate the power delivered to 5 Ω resistor in the circuit shown in Fig. E1.40, by node analysis. 2A
2
_
Vx
+
1A
+
_ Vx +
3
4
4Vx
IL 2Vx
2
7A
5A
8
4
4
4 + E
E
4Ix
2
5
1
2 Ix
3
5
10
Fig. E1.39. Fig. E1.41. Fig. E1.40. E1.41 Calculate the current through the 5 Ω resistance in the circuit shown in Fig. E1.41 by node analysis. E1.42 Draw the graph, oriented graph and three possible trees of the circuit shown in Fig. E1.42 1
1
2
1
4 1
1 +
+ 10 V E
5V E
10 A
3
2
2
2
5
4A
5 7
7 4
6
Fig. E1.43. Fig. E1.42. E1.43 Determine the incidence matrix of the circuit shown in Fig. E1.43. E1.44 Determine the tiesets and form the tieset matrix of the circuit shown in Fig. E1.44. 1
1 6
1
1 1
+
1 + _
1 10 V
+ E
_
1
5
4 2V
5V
3
+ E
1
2
4V
Fig. E1.45. Fig. E1.44. E1.45 Form the equilibrium equations of the circuit shown in Fig. E1.45 using tieset schedule and hence, solve the branch currents.
Circuit Analysis
1. 228 E1.46 Determine the cutsets of the circuit shown in Fig. E1.46. 2
2 6A
5A
2A
2
1 5
4A 1 1
2
4 5
1
4
5
5
1
10
Fig. E1.47. Fig. E1.46. E1.47 Determine the cutsets and cutset matrix of the circuit shown in Fig. E1.47. E1.48 Form the equilibrium equations of the circuit shown in Fig. E1.48 using cutset schedule and hence, solve the branch voltages. 2 2A
4A
5 1
1
+ 10 V
4
4
E
Fig. E1.48.
E1.49 Draw the dual of the graph shown in Fig. E1.49. E1.50 Determine the node basis dual of the mesh basis circuit shown in Fig. E1.50.
Fig. E1.49.
4 W 0.25 H
o
+
+ 0.05 F
~
0.02 F
~
_
_
Fig. E1.50.
2sin wt A
5W
4sin(wt  15 ) V
10sin wt V
4W
6
W
0.08 F 2W
~
3W 4
W
Fig. E1.51.
E1.51 Determine the mesh basis dual of the node basis circuit shown in Fig. E1.51. v
ANSWERS E1.1
V1 = 21 V, V2 = 9 V, V3 = 3 V
E1.2
I1 = 12 A, I2 = 7 A, I3 = 5 A
E1.3
Vs = 37 V
E1.4
PL = 450 W, PD20 = 180 W, PD30 = 270 W
E1.5
Is2 = 18 A
E1.6
E = 2 V, Charging
E1.7
E = 7V
0.2 H
Chapter 1  Basic Circuit Analysis and Network Topology E1.8
VL = 6 V, Ps = 610 W
E1.9
I = 2 A, Ps = 18 W
E1.10
V1 = 4 V, V2 = 3 V
E1.11
I1 = −1.3043 A
;
I2 = 0.9938 A
;
I3 = 0.6366 A
E1.12
Ia = 1.8037 A
;
Ib = 0.9907 A
;
Ic = 0.813 A
Ie = 0.4766 A
;
If = 1.3271 A
E1.13
E = 12 V
E1.14
E1.15
VL = –6.25 V
E1.16
I1 = 16.1971∠31o A
E1.17
IL = 0.6114∠62.7 o A
E1.19
P = 16.0201 W
E1.20
I L = 1.0952 A
E1.18
Supermesh1
P = 108.9 W
+ _ Supermesh2 + 2I2 2I3 5I4 _ + E E I3 +
1
;
Q = 217.8 VAR
1
5
; P2X = 11W
10V
;
; I3 = 11.4531∠−104o A
E
E I2 +
P 2X = 4.125 W
P1Ω = 1.1857 W
3I4
6V E
E1.21
;
3 +
E 5I1
+
Id = 0.5141 A ;
P2Ω = 0.0987 W
; I 2 = 8.7841∠71.6o A
5 +
;
1. 229
2A
E1.22
I1 = 2 A
I2 = 0
E1.24
IAB = 0.375 A (current flowing from A to B)
E1.26
V4 = 12 V
E1.27
Va = 37.8947 V
;
;
I3 = 1.1429 A
E1.23 E1.25
Vb = 30.8772 V
;
Vc = 31.4035 V
Vd = − 0.5263 V ;
Ve = 7.0175 V
;
Vf = 6.4912 V
E1.28
V1 = − 3.3333 V ;
V2 = 0
;
V3 = 3.3333 V
E1.29
IL = − 6.199 A
VAB = 6.7056 V P = 2.6315 W (delivered)
Circuit Analysis
1. 230 E1.30
P5A = 30 W (Delivered) ;
E1.31
P10Ω = 40 W
E1.32
V1 = 7.8125∠53.1 V
E1.33 E1.34
P2A = − 2 W (Absorbed) ;
o
; V2 = 13.9754∠−153.4o V
V1 = 1.5132∠15.8 V
o
; V2 = 1.1186∠−34.2o V
P = 45.5555 W
; Q = 91.111 VAR
P3A = 15 W (Delivered)
; V3 = 0.2925∠106.6o V
o
E1.35
IL = 3.0403∠33 A
E1.36
Va = − 1.9512 V
E1.37
P4A = 80.5624 W (Delivered) ; P1A = –1.8748 W (Absorbed) ; P15V = 10.0485 W (Delivered)
E1.38
I1 = 5 A
E1.39
P4Vx = − 9.1428 W (Power absorbed)
E1.40
P5Ω = 26.792 W
E1.41
IL = 3.1111 A
;
1
E1.42
;
Vb = 8.0488 V
I2 = − 2.8572 A
;
;
I3 = 0 ;
4
d 4
e
h
g
f
5
5
Fig : Graph.
Fig : Oriented graph.
a
2
1
c 3
c
3 h
g
f
2
b
d
3 e
a
1
c
b
1
I4 = 2.1429 A
2
a
; Vd = − 1.9512V ; Ve = 3.0488V
Vc = 11.9512 V
a
2
1
b
4
2
b d
d
d
a
3
4
3
4
h
g
f 5
5
5
Fig : Possible trees.
E1.43
R 1 0 0 0 S S− 1 − 1 0 0 Incidence matrix, A = S 0 1 − 1 0 S S 0 0 1 1 S 0 0 0 −1 T
0 − 1 1 0 0V W 0 0 0 − 1 1W 0 0 0 0 0W W 0 0 0 0 − 1W W 1 0 −1 1 0
X
Chapter 1  Basic Circuit Analysis and Network Topology E1.44
c
e 2
a
1 e
I1
d
d
3
b
2
4 Tieset1 : [a, d, e]
I2
Link
I3
c
4
g
0 0 1 −1 1 1 −1 0 0 0 0 1 0 −1 0 0
I4
g
h
5
5 Tieset3 : [e, g, f]
Tieset2 : [b, c, d]
Link
4
4
f
R S1 S0 Tie  set Matrix, M = S S0 S0 T E1.45
3
1
Link
Link
1. 231
Tieset4 : [c, g, f]
V
0W 0W W 0W 1W
0 0 0 0 1 1 0 −1
X
T
Equilibrium equation, IB = M IL
RI V R S aW S 0 0 SIb W S 0 0 SI W S 0 − 1 S cW = S SId W S − 1 0 SIe W S 1 0 SS WW SS I 0 1 T fX T
V
1W 1W I 1W 1 W >I 2 H 1W I3 0W WW 0
X
Ia = Ib = 0.0903 A ; Ic = 0.6817 A ; Id = −1.377 A ; Ie = 1.4673 A ; If = −0.5914 A
E1.46
g
2
a
a
1
b
b
Twigf
f
Twigd
e
3 d
c
i c
g 4
Twige
Cutset1 : [a, f, g]
Twigi
h
Cutset3 : [b, d, c]
Cutset2 : [a, b, e]
Cutset4 : [g, h, i, c]
Fig : Cutsets. Twigd
Twiga
E1.47
a
Twige
e
1
Cutset1 : [a, f]
4
c
f f
Twigb b
d
2
g
g
Cutset2 : [f, c, g]
Cutset3 : [g, d, c]
Fig : Cutsets.
R S1 S0 Cut  set matrix, Q = S S0 S0 T
0 0 0 0 0 −1 1 1
0 0 1 0
3
V
0 1 0W 1 − 1 1W W 0 0 − 1W 0 0 0W
X
c
Cutset4 : [b, c]
Circuit Analysis
1. 232 E1.48
Equilibrium equation, VB = QT VN
RV V R S aW S 1 0 S Vb W S 1 0 SV W S− 1 − 1 S cW = S S Vd W S 0 1 S Ve W S 0 0 SS WW SS V 0 −1 T fX T
V − 1W 0W V 0W 1 W > V2 H 0W V3 1W WW −1 X
Va = 9.867 V ; Vb = 1.0667 V ; Vc = 1.6 V ; Vd = −2.6667 V ; Ve = −8.8003 V ; Vf = 11.467 V f
2’
1’ a
b g
e 5’
3’
0.05 H
1
4
2
0.02 H
3
0.25 F 5
10sin wt A
(w t
15
)
W
4
4’
W
E1.50
d
h
o
c
W
E1.49
4s
in
0
4W
E1.51 6W
3’
2’
3W
2W 4’
0.08 H

+
1’
2sin wt V
0’
0.2 F
A
Chapter 2
NETWORK THEOREMS FOR DC AND AC CIRCUITS 2.1
Network Reduction
(AU May’15, 2 Marks)
A typical network involves series, parallel, star and deltaconnections of parameters like resistances, inductances and capacitances. Sometimes it may require to find the single equivalent value of the series/parallel/stardeltaconnected parameters of the network. In such a case, the parameters of the network have to be reduced step by step, starting from a dead end. Basically, the network reduction will be attempted with respect to two terminals, and in any network reduction technique, the ratio of voltage and current should be the same even after reducing the network. Reducing the series/parallel/stardeltaconnected parameters to a single equivalent parameter, conversion of starconnected parameters to equivalent delta parameters and vice versa are explained in this chapter. The network also involves series/parallel connection of sources for higher voltage/current requirement. The series and parallel connections of voltage sources and current sources and their reduction into a single equivalent are also discussed in this chapter.
2.1.1
Resistances in Series and Parallel
Equivalent of Seriesconnected Resistances
Consider a circuit with series combination of two resistances R 1 and R 2 connected to a dc source of voltage V as shown in Fig. 2.1(a). Let the current through the circuit be I. Now the voltage across R 1 and R2 are IR 1 and IR 2 , respectively.
R1
+
IR1
Req = R1 + R2
R2
+
E
IR2
E
I
I
+
V
E
+
V
E
Fig. a : Resistances in series. Fig. b : Equivalent circuit of Fig. a. Fig. 2.1 : Resistances in series.
By Kirchhoff’s Voltage Law (KVL), we can write, V = I R 1 + IR 2 = I (R 1 + R 2 ) Let,
V = I Req
..... (2.1)
where, Req = R 1 + R 2
From equation (2.1), we can say that the seriesconnected resistances R 1 and R 2 can be replaced with an equivalent resistance R eq given by the sum of individual resistances R 1 and R 2 .
Circuit Analysis
2. 2
This concept can be extended to any number of resistances in series. Therefore, we can say that the resistances in series can be replaced with an equivalent resistance whose value is given by the sum of individual resistances. “When n number of identical resistances of value R are connected in series, the equivalent resistance R eq = nR”. R1
R2
Req = R1 + R2
Þ A R1
A
B R2
R3
B
Req = R1 + R2 + R3
Þ A
B
A R1
R2
Rn
R3
B
Req = R1 + R2 + R3 + .... + Rn
Þ B
A
B
A
Fig. 2.2 : Resistances in series and their equivalents.
Equivalent of Parallelconnected Resistances
Consider a circuit in which two resistances in parallel are connected to a dc source of voltage V as shown in Fig. 2.3(a). Let I be the current supplied by the source and I 1 and I2 be the currents through R1 and R2, respectively. Since the resistances are parallel to the source, the voltage across them will be the same. I
By Ohm’s law, we can write,
I2
I1
+
+
I1 = V R1
..... (2.2)
I2 = V R2
..... (2.3)
+ E
V
V
E
R1
V
R2
E
Fig. a : Resistances in parallel.
By Kirchhoff’s Current Law (KCL), we can write, I
I = I 1 + I2
= V + V R1 R2 = Vc 1 + 1 m R1 R2 1 ` V = I 1 + 1 R1 R2
+ V
Using equations (2.2) and (2.3)
+ E
V
E
Req Req a
R R 1 a 1 2 1 1 R1 C R2 C R1 R2
Fig. b : Equivalent circuit of Fig. a. Fig. 2.3 : Resistances in parallel.
Chapter 2  Network Theorems for DC and AC Circuits
2. 3
Let, V = I R eq
..... (2.4)
where, Req =
R1 R2 1 = 1 + 1 R1 + R2 R1 R2
..... (2.5)
Also, 1 = 1 + 1 Req R1 R2
..... (2.6)
From equation (2.4), we can say that the parallelconnected resistances R 1 and R 2 can be replaced with an equivalent resistance given by equation (2.5). From equation (2.6), we can say that the inverse of the equivalent resistance of parallelconnected resistances is equal to the sum of the inverse of individual resistances. This concept can be extended to any number of resistances in parallel. Therefore, we can say that the resistances in parallel can be replaced with an equivalent resistance whose value is given by the inverse of sum of the inverse of individual resistances. “When n number of identical resistances of value R are connected in parallel, the equivalent resistance R eq = R/n”. A
A R1
R2
Þ
B
Req =
B
A
R R 1 = 1 2 1 1 R1 + R2 + R1 R2
A R1
R2
R3
Þ
B
Req =
1 1 1 1 + + R1 R2 R3
B
A A R1 B
R2
R3
Rn
Req =
Þ
1 1 1 1 1 + + + ..... + R1 R2 R3 Rn
B
Fig. 2.4 : Resistances in parallel and their equivalents.
2.1.2
Voltage Sources in Series and Parallel
A voltage source is designed to deliver energy at a constant voltage called rated voltage. The current delivered by the voltage source depends on the load and the current is limited by the power rating of the source. When the voltage requirement of a load is higher, the voltage sources are connected in series. When the current requirement of a load is higher, the voltage sources are connected in parallel.
Circuit Analysis
2. 4 Series Connection of Voltage Sources
In series connection, voltage sources of different voltage ratings may be connected in series. However in series connection, the current delivered by the voltage sources is the same. Case i : Series connection of ideal voltage sources The series connection of ideal voltage sources is shown in Fig. 2.5(a). By applying KVL to seriesconnected sources of Fig. 2.5(a) it is possible to determine the single equivalent source as shown in Fig. 2.5(b). I
I +
A
 +
E1
+ 
E2
E3
+

En
Þ
B
A
+

B
Eeq
Eeq = E1 + E2 + E3 +.....+ En
Fig. a : Series connection.
Fig. b : Equivalent voltage source.
Fig. 2.5 : Series connection of ideal voltage sources.
Case ii : Series connection of voltage sources with internal resistance
A
+

E1, R1
+

E2, R2
+

+

En, Rn
E3, R3
ß
The seriesconnected voltage sources with internal resistance shown in Fig. 2.6(a) can be represented as ideal sources with a series resistance as shown in Fig. 2.6(b). The seriesconnected resistance of Fig. 2.6(c) can be represented by an equivalent resistance as shown in Fig. 2.6(d). The seriesconnected voltage sources of Fig. 2.6(c) can be represented by an equivalent source as shown in Fig. 2.6(d). B
R1
R2
R3
Rn
 +  + 
E1
E2
E3
+
En B
Fig. c.
ß
+
R1
+

E1
R2
+
E2
R3
+

E3
Rn
+
B
En
Fig. b.
Fig. a : Series connection. A
A
A
Req
+
Eeq B
Fig. d : Equivalent source. Eeq = E1 + E2 + E3 + ..... + En Req = R1 + R2 + R3 + ..... + Rn
Fig. 2.6 : Series connection of voltage sources with internal resistance.
Parallel Connection of Voltage Sources
Practically, voltage sources of an identical voltage rating should be connected in parallel, but the current delivered by the parallelconnected sources may be different. If voltage sources with different voltage ratings are connected in parallel then current will circulate within the sources which produce excess heat and this inturn may damage the source.
Chapter 2  Network Theorems for DC and AC Circuits
2. 5
Case i : Parallel connection of ideal voltage sources A
A
I1
I2
I3
In
Ieq
+
+
+
+
+
E
E
E


Þ
E
E


Ieq = I1 + I2 + I3 + .... + In
B
B
Fig. a : Parallel connection.
Fig. b : Equivalent source.
Fig. 2.7 : Parallel connection of ideal voltage sources.
The parallelconnected ideal voltage sources with the same voltage rating, as shown in Fig. 2.7(a), can be converted into a single equivalent source using KCL, as shown in Fig. 2.7(b). Note : The parallel connection of ideal voltage sources with different voltage rating is illegal. Case ii : Parallel connection of voltage sources with internal resistance Ieq
Ieq I1
+
+
+ E1, R1
I3
I2 E2, R2
E3, R3
E
E
A
In
+
+
Eeq
En, Rn
I1
R3
+
+
E1
E
I3
R2
R1
Þ
E
E
I2
E2

Rn
+ E3


In
A
+ Eeq
+
En


B
B
Fig. a : Parallel connection.
Fig. b.
ß
A E1 R1
R1
E2 R2
E3 R3
R2
R3
En Rn
Rn
B
Fig. c.
ß
Ieq =
E1 R1
R eq =
+
E2 R2
+
E3 R3
+ ...... +
1 1 1 1 1 + + + ...... + R1 R 2 R 3 Rn
A
A
En Rn
Eeq = Ieq ´ R eq
Req Ieq
Þ
Req
= R eq
+
Eeq B
Fig. d.
LM E1 + E2 + E3 + ..... + En OP Rn P MN R1 R2 R3 Q
B
Fig. e.
Fig. 2.8 : Parallel connection of voltage sources with internal resistance.
The parallelconnected voltage sources with internal resistance shown in Fig. 2.8(a) can be represented as ideal sources with a series resistance as shown in Fig. 2.8(b). Using source transformation technique, the voltage sources can be converted into current sources as shown in Fig. 2.8(c). Now, the parallelconnected current sources can be combined
Circuit Analysis
2. 6
as an equivalent single current source as shown in Fig. 2.8(d). Finally, again using source transformation technique, the current source of Fig. 2.8(d) can be converted into an equivalent voltage source as shown in Fig. 2.8(e). Note : The conversion of parallelconnected voltage sources into a single equivalent voltage source can also be obtained by Millman’s Theorem.
2.1.3
Current Sources in Series and Parallel
A current source is designed to deliver energy at a constant current called rated current. The voltage across the current source depends on the load and the voltage is limited by the power rating of the source. When the voltage requirement of a load is higher, the current sources are connected in series. When the current requirement of a load is higher, the current sources are connected in parallel. Series Connection of Current Sources
Practically, current sources of an identical current rating should be connected in series, but the voltage across the seriesconnected sources may be different. If current sources with different current ratings are connected in series then sources with lesser current ratings are forced to carry higher currents which produce excess heat and this inturn may damage the source. Case i : Series connection of ideal current sources The seriesconnected ideal current sources with an identical current rating, as shown in Fig. 2.9(a), can be converted into a single equivalent source using KVL, as shown in Fig. 2.9(b). I B
+
E1
I
I  +
E2
 +
I 
E3
+
I
I 
En
A
Þ
B
+
I 
Eeq
A
Eeq = E1 + E2 + E3 +.....+ En
Fig. a : Series connection.
Fig. b : Equivalent current source.
Fig. 2.9 : Series connection of ideal current sources.
Note : The series connection of ideal current sources with different current rating is illegal. Case ii : Series connection of current sources with internal resistance The seriesconnected current sources with internal resistance shown in Fig. 2.10(a) can be represented as ideal sources with a parallel resistance as shown in Fig. 2.10(b). Using source transformation technique, the current sources can be converted into voltage sources as shown in Fig. 2.10(c). Now, the seriesconnected voltage sources can be combined
Chapter 2  Network Theorems for DC and AC Circuits
2. 7
as an equivalent single voltage source as shown in Fig. 2.10(d). Finally, again using source transformation technique, the voltage source of Fig. 2.10(d) can be converted into an equivalent current source as shown in Fig. 2.10(e). I2, R2
I1, R1
B
Fig. a.
In, Rn
I3 , R 3
A
ß
I1
I2
I3
In
R1
R2
R3
Rn
Fig. b.
ß
B
A
A
B

+
I1R1
R1
Fig. c.
R2
I2R2
A

R3

+
Rn
I3R3
+
InRn
ß
B Req
+
Þ
+
Ieq
B
A
Eeq
Fig. d. Req
Ieq a
R eq a R1 C R 2 C R 3 C......C Rn Eeq a I1 R1 C I2 R 2 C I3 R 3 C......C In Rn
a
Fig. e.
Eeq R eq 1 R eq
I1 R1 C I2 R 2 C I3 R 3 C ...... C In Rn
Fig. 2.10 : Series connection of current sources with internal resistance.
Parallel Connection of Current Sources
In parallel connection, current sources with different current ratings may be connected in parallel. However in parallel connection, the voltage across the sources is the same. Case i : Parallel connection of ideal current source The parallelconnected ideal current sources shown in Fig. 2.11(a) can be converted into a single equivalent source using KCL, as shown in Fig. 2.11(b). A
A
+ I1
I2
I3
In
E
B
+
Þ
Ieq
E
B Ieq = I1 + I2 + I3 +.....+ In
Fig. a : Parallel connection.
Fig. b : Equivalent of parallel connection.
Fig. 2.11 : Parallel connection of ideal current sources.
Circuit Analysis
2. 8
Case ii : Parallel connection of current sources with internal resistance The parallelconnected current sources with internal resistance shown in Fig. 2.12(a) can be represented as ideal sources with a parallelresistance as shown in Fig. 2.12(b). The parallelconnected resistances of Fig. 2.12(c) can be represented by an equivalent resistance as shown in Fig. 2.12(d). The parallelconnected current sources of Fig. 2.12(c) can be represented by an equivalent current source as shown in Fig. 2.12(d). A I2, R2
I 1, R 1
I3 , R 3
In, Rn B
Fig. a.
ß A
R1
I1
I2
Fig. b.
R2
In
R3
I3
Rn B
ß A
I2
I1
I3
R1
In
R2
Rn
R3
B
Fig. c.
ß A
Ieq
Req
Ieq = I1 + I2 + I3 + ....................... + In 1 1 1 1 1 + + + .......... + R1 R 2 R 3 Rn
R eq =
B
Fig. d.
Fig. 2.12 : Parallel connection of current sources with internal resistance.
2.1.4
Inductances in Series and Parallel
Equivalent of Seriesconnected Inductances
Consider a circuit with series combination of two inductances L 1 and L 2 connected to an ac source of voltage v as shown in Fig. 2.13(a). Let the current through the circuit be i and voltages across L 1 and L 2 be v 1 and v 2 , respectively. L1
+
Leq = L1 + L2
L2
+
v1 E
i
+
v2
E
~E v
Fig. a : Inductance in series.
i
+
~E v
Fig. b : Equivalent circuit of Fig. a.
Fig. 2.13 : Inductance in series.
Chapter 2  Network Theorems for DC and AC Circuits
2. 9
By Faraday’s Law, we can write, ν1 = L1 di and ν2 = L2 di dt dt
..... (2.7)
In Fig. 2.13(a), using Kirchhoff’s Voltage Law, we can write, v = v1 + v2 = L1 di + L2 di dt dt
Using equation (2.7)
= ` L1 + L2 j di dt Let,
ν = Leq di dt where, Leq = L1 + L2
..... (2.8)
From equation (2.8), we can say that the seriesconnected inductances L 1and L2 can be replaced with an equivalent inductance Leq given by the sum of individual inductances L 1 and L 2 . This concept can be extended to any number of inductances in series. Therefore, we can say that inductances in series can be replaced with an equivalent inductance whose value is given by the sum of individual inductances. “When n number of identical inductances of value L are connected in series, the equivalent inductance L eq = nL”. L1
Leq = L1 + L2
L2
Þ A L1
B L2
A
B
Leq = L1 + L2 + L3
L3
Þ A L1
B L2
L3
A
B
Leq = L1 + L2 + L3 +....+ Ln
Ln
Þ A
B
A
B
Fig. 2.14 : Inductances in series and their equivalents.
Circuit Analysis
2. 10 Equivalent of Parallelconnected Inductances
Consider a circuit with two inductances in parallel and connected to an ac source of voltage v as shown in Fig. 2.15(a). Let i be the current supplied by the source and i 1 and i2 be the currents through L1 and L 2 , respectively. Since the inductances are parallel to the source, the voltage across them will be the same. i
i i1
v
+
+
~ E
v
i2
+ v
L1
L2
E
E
+
+
~ E
v
v
E
Leq Leq a
L L 1 a 1 2 1 1 L1 C L 2 C L1 L 2
Fig. b : Equivalent circuit of Fig. a. Fig. a : Inductance in parallel. Fig. 2.15 : Inductance in parallel.
We know that, i1 = 1 L1
# ν dt
i2 = 1 L2
and
# ν dt
.....(2.9)
By Kirchhoff’s Current Law, we can write, i = i 1 + i2
= 1 L1
# ν dt
= e 1 + 1 o L1 L2
+ 1 L2
# ν dt
Using equation (2.9)
# ν dt
On differentiating the above equation, we get, di = 1 + 1 ν ⇒ eL dt L2 o 1 Let,
1 di 1 + 1 dt L1 L2
ν = Leq di dt where, Leq =
Also,
ν =
1 = 1 + 1 Leq L1 L2
.....(2.10)
L1 L2 1 = 1 + 1 L1 + L2 L1 L2
.....(2.11)
.....(2.12)
From equation (2.10), we can say that the parallelconnected inductances L 1 and L 2 can be replaced with an equivalent inductance given by equation (2.11). From equation (2.12), we can say that the inverse of the equivalent inductance of parallelconnected inductances is equal to the sum of the inverse of individual inductances.
Chapter 2  Network Theorems for DC and AC Circuits
2. 11
A
A L1
L2
Leq =
Þ B
B A
L L 1 = 1 2 1 1 L1 + L 2 + L1 L 2
A L2
L1
L3
Leq =
Þ B
B A
1 1 1 1 + + L1 L 2 L 3
A L1
L3
L2
Ln
Leq =
Þ
B
1 1 1 1 1 + + +...+ L1 L 2 L 3 Ln
B
Fig. 2.16 : Inductances in parallel and their equivalents.
This concept can be extended to any number of inductances in parallel. Therefore, we can say that inductances in parallel can be replaced with an equivalent inductance whose value is given by the inverse of sum of the inverse of individual inductances. “When n number of identical inductances of value L are connected in parallel, the equivalent inductance Leq = L ". n
2.1.5
Capacitances in Series and Parallel
Equivalent of Seriesconnected Capacitances Consider a circuit with series combination of two capacitances C 1 and C2 connected to an ac source of voltage, v as shown in Fig. 2.17(a). Let the current through the circuit be i and voltages across C1 and C2 be v1 and v2, respectively. Ceq
C2
C1
+v E
+
+v E 2
1
E Ceq a
i
i
~
+
+ v E
Fig. a : Capacitances in series.
C1 C2 1 a 1 1 C1 C C2 C C1 C2
~E v
Fig. b : Equivalent circuit of Fig. a.
Fig. 2.17 : Capacitances in series.
We know that, ν1 = 1 C1
# i dt
and
ν2 = 1 C2
# i dt
With reference to Fig. 2.17(a) using Kirchhoff’s Voltage Law, we can write, v = v 1 + v2
.....(2.13)
Circuit Analysis
2. 12
# i dt
v = 1 C1
+ 1 C2
= e 1 + 1 o C1 C2 Let,
ν =
1 Ceq
Using equation (2.13)
# i dt
# i dt
where, C eq =
Also,
# i dt
.....(2.14)
C1 C2 1 = 1 + 1 C1 + C2 C1 C2
.....(2.15)
1 = 1 + 1 C eq C1 C2
.....(2.16)
From equation (2.14), we can say that the seriesconnected capacitances C 1 and C2 can be replaced with an equivalent capacitance given by equation (2.15). From equation (2.16), we can say that the inverse of the equivalent capacitance of seriesconnected capacitances is equal to the sum of the inverse of individual capacitances. This concept can be extended to any number of capacitances in series. Therefore, we can say that capacitances in series can be replaced with an equivalent capacitance whose value is given by the inverse of sum of the inverse of individual capacitances. “When n number of identical capacitances of value C are connected in series, the equivalent capacitance, C eq = C/n”. C1
Ceq
C2
Ceq =
Þ B
A C1
C2
B
A
C3
Ceq
Þ B
A C1
C2
C3
Ceq =
B
A
1 1 1 1 + + C1 C2 C3
Ceq
Cn
Ceq =
Þ A
C C 1 = 1 2 1 1 C1 + C2 + C1 C2
B
A
B
1 1 1 1 1 + + +...+ C1 C2 C3 Cn
Fig. 2.18 : Capacitances in series and their equivalents.
Equivalent of Parallelconnected Capacitances
Consider a circuit in which two capacitances in parallel are connected to an ac source of voltage, v as shown in Fig. 2.19(a). Let i be the current supplied by the source and i1 and i2 be the currents through C1 and C2, respectively. Since the capacitances are parallel to the source, the voltage across them will be the same.
Chapter 2  Network Theorems for DC and AC Circuits i
i i1
+ v
2. 13
i2
+
+
~ E
v
C1
+ C2
v
v
E
E
~ E
+ v
Ceq = C1 + C2
E
Fig. b : Equivalent circuit of Fig. a. Fig. a : Capacitances in parallel. Fig. 2.19 : Capacitances in parallel.
We know that, i1 = C1 dν dt
and
i2 = C2 dν dt
.....(2.17)
By Kirchhoff’s Current Law, we can write, i = i 1 + i2 Using equation (2.17)
= C1 dν + C2 dν dt dt = ` C1 + C2 j dν dt Let, i = Ceq dν dt
.....(2.18)
where, Ceq = C 1 + C2 From equation (2.18), we can say that the parallelconnected capacitances C 1 and C2 can be replaced with an equivalent capacitance Ceq given by the sum of individual capacitances C1 and C2 . This concept can be extended to any number of capacitances in parallel. Therefore, we can say that capacitances in parallel can be replaced with an equivalent capacitance whose value is given by the sum of individual capacitances. “When n number of identical capacitances of value C are connected in parallel, the equivalent capacitance C eq = nC”. A
A C1
C2
B
B
A
A C1
C2
C3
Þ
Ceq = C1 + C2 + C3
B
B
A
A C1 B
Ceq = C1 + C2
Þ
C2
C3
Cn
Ceq = C1 + C2 + C3 +....+ Cn
Þ B
Fig. 2.20 : Capacitances in parallel and their equivalents.
Circuit Analysis
2. 14
2.1.6
Impedances in Series and Parallel
Equivalent of Seriesconnected Impedances
Consider a circuit with series combination of two impedances Z1 and Z2 connected to an ac source of voltage V volts rms value as shown in Fig. 2.21(a). Let the current through the elements be I . Now, by Ohm’s law the voltage across Z1 and Z2 are I Z1 and I Z2 , respectively. I Z1
I+
+
E Z1
I Z2
I
E
Z2
+
I Zeq
+
E
Zeq a Z1 C Z2
~E
+
V
~E V
Fig. a : Impedances in series. Fig. b : Equivalent circuit of Fig. a. Fig. 2.21 : Impedances in series and their equivalent.
By Kirchhoff’s Voltage Law, we can write, V = I Z1 + I Z2 = I ` Z1 + Z2 j Let, V = I Zeq where,
.....(2.19)
Zeq = Z1 + Z2
From equation (2.19), we can say that the seriesconnected impedances Z1 and Z2 can be replaced with an equivalent impedance Zeq given by the sum of individual impedances Z1 and Z2 . This concept can be extended to any number of impedances in series. Therefore, we can say that impedances in series can be replaced with an equivalent impedance whose value is given by the sum of individual impedances. “When n number of identical impedances of value Z are connected in series, the equivalent impedance, Z eq = nZ". Z1
Z2
Zeq = Z1 + Z2
Þ B
A Z1
Z2
A
Z3
B
Zeq = Z1 + Z2 + Z3
Þ B
A Z1
Z2
Z3
A
B
Zeq = Z1 + Z2 + Z3 +.....+ Zn
Zn
Þ A
B
A
B
Fig. 2.22 : Impedances in series and their equivalents.
Chapter 2  Network Theorems for DC and AC Circuits
2. 15
Equivalent of Parallelconnected Impedances I Consider a circuit in which two impedances in parallel are I1 I2 connected to an ac source of V volts rms value as shown in + + Fig. 2.23(a). Let I be the current supplied by the source and + V V Z2 Z1 V I1 and I2 be the currents through Z1 and Z2 , respectively. Since E E E the impedances are parallel to the source, the voltage across them will be the same as that of the source voltage. Fig. a : Impedances in parallel.
~
By Ohm’s law, we can write,
I
I1 = V and I2 = V Z1 Z2
.....(2.20)
By Kirchhoff’s Current Law, we can write, I = I1 + I2
+
+ V
~ E
V
Zeq a
1 1 Z1
= V + V Z1 Z2
Using equation (2.20)
= Ve 1 + 1 o Z1 Z2 `
Let,
V = I
f
1 1 + 1 Z1 Z2
Also,
C
1 Z2
a
Z1 Z2 Z1 C Z2
Fig. b : Equivalent circuit of Fig. a. Fig. 2.23 : Impedances in parallel and their equivalent.
p
V = I Zeq where, Zeq =
Zeq
E
.....(2.21)
1 = Z1 Z2 1 + 1 Z1 + Z2 Z1 Z2
1 = 1 + 1 Zeq Z1 Z2
..... (2.22)
.....(2.23)
From equation (2.21), we can say that the parallel impedances Z1 and Z2 can be replaced with an equivalent impedance given by equation (2.22). From equation (2.23), we can say that the inverse of the equivalent impedance of parallelconnected impedances is equal to the sum of the inverse of individual impedances. This concept can be extended to any number of impedances in parallel. Therefore, we can say that impedances in parallel can be replaced with an equivalent impedance whose value is given by the inverse of sum of the inverse of individual impedances.
Circuit Analysis
2. 16
“When n number of identical impedances of value Z are connected in parallel, the equivalent impedance Z eq = Z /n". A
A Z1
Þ
Z2
1
Zeq =
1 Z1
B
B A
+
1
=
Z2
Z1 Z2 Z1 + Z2
A Z1
Z3
Z2
Þ
B
Zeq =
1 Z1
B
A
+
1 1
+
Z2
1 Z3
A Z1
Z3
Z2
Zn
Zeq =
Þ
1 Z1
B
B
+
1
+
Z2
1 1 Z3
+...+
1 Zn
Fig. 2.24 : Impedances in parallel and their equivalents.
2.1.7
Reactances in Series and Parallel
The reactances in series and parallel combinations can be combined to give an equivalent reactance similar to that of impedance. In fact, the reactances are impedances with imaginary part alone. The equivalent reactances of series and parallel combinations of reactances are diagrammatically illustrated in Fig. 2.25.
c
jX2
jX1
j X eq = j X1 + X 2
h
Þ A
B
jX1
jX2
A
B
c
jXn
j X eq = j X1 + X 2 +......+ Xn
h
Þ B
A
A
A
A jX1
jX2
F I G J X1 X2 1 jX eq = j G GG 1 + 1 JJJ = j X1 + X2 H X1 X2 K
Þ
B
B
A
A
jX1
B
B
jX2
jXn
Þ
j Xeq = j
F I GG J 1 GG 1 + 1 +...+ 1 JJJ H X1 X2 Xn K
B
Fig. 2.25 : Series and parallel combinations of reactances and their equivalents.
Chapter 2  Network Theorems for DC and AC Circuits
2.1.8
2. 17
Conductances in Series and Parallel
Equivalent of Seriesconnected Conductances +
Consider a circuit with series combination of two conductances G 1 and G 2 connected to a dc source of voltage V volts as shown in Fig. 2.26(a). Let I be the current through the conductances and V1 and V2 be the voltages across G1 and G 2 , respectively.
I
V1
+
E
V2
E G2
G1
+E
From Fig. 2.26, we can write,
V
Fig. a : Conductances in series.
V1 =
I and V = I 2 G1 G2
..... (2.24)
By Kirchhoff’s Voltage Law, we can write,
+
V
E
Geq
I
V = V1 + V2 +E
=
I + I G1 G2
Using equation (2.24)
= Ie 1 + 1 o G1 G2 `
I = V
f
1 1 + 1 G1 G2
Also,
V 1 1 1 C G1 G2
a
G1 G2 G1 C G2
Fig. b : Equivalent circuit of Fig. a.
p
Let, I = VGeq where,
Geq a
Fig. 2.26 : Conductances in series and their equivalent.
..... (2.25)
Geq =
1 = 1 + 1 Geq G1 G2
G1 G2 1 = 1 + 1 G1 + G2 G1 G2
..... (2.26) .....(2.27)
From equation (2.25), we can say that the seriesconnected conductances G 1 and G 2 can be replaced with an equivalent conductance given by equation (2.26). From equation (2.27), we can say that the inverse of the equivalent conductance of seriesconnected conductances is equal to sum of the inverse of individual conductances. This concept can be extended to any number of conductances in series. Therefore, we can say that conductances in series can be replaced with an equivalent conductance whose value is given by the inverse of sum of the inverse of individual conductances. “When n number of identical conductances of value G are connected in series, the equivalent conductance Geq = G/n”.
Circuit Analysis
2. 18 G1
Geq
G2
Þ
Geq =
B
A G2
G1
A
G3
B Geq Geq =
Þ A
A
B Gn
G3
G2
G1
G1 G2 1 = 1 1 G 1 + G2 + G1 G2
B Geq Geq =
Þ A
1 1 1 1 + + G1 G2 G3
A
B
B
1 1 1 1 1 + + + ... + G1 G2 G3 Gn
Fig. 2.27 : Conductances in series and their equivalents.
Equivalent of Parallelconnected Conductances
Consider a circuit with two conductances in parallel and connected to a source of voltage V volts as shown in Fig. 2.28(a). Let I be the current supplied by the source and I1 and I 2 be the current through G 1 and G 2 , respectively. Since the conductances are parallel to the source, the voltage across them will be the same as that of the source. I
I I2
I1 V
+ E
+
+ V
G1
E
V
G2
E
V
+ E
+ V
Geq = G1 + G2
E
Fig. a : Conductances in parallel. Fig. b : Equivalent circuit of Fig. a. Fig. 2.28 : Conductances in parallel and their equivalent.
From Fig. 2.28, we can write, I 1 = VG1
and
I2 = VG2
..... (2.28)
By Kirchhoff’s Current Law, we can write, I = I 1 + I2 = VG 1 + VG 2
Using equation (2.28)
= V(G 1 + G 2 )
Let,
I = VG eq
..... (2.29)
where, G eq = G 1 + G 2 From equation (2.29), we can say that the parallelconnected conductances G 1 and G2 can be replaced with an equivalent conductance Geq given by the sum of individual conductances G 1 and G 2 .
Chapter 2  Network Theorems for DC and AC Circuits
2. 19
This concept can be extended to any number of conductances in parallel. Therefore, we can say that conductances in parallel can be replaced with an equivalent conductance whose value is given by the sum of individual conductances. “When n number of identical conductance of value G are connected in parallel, the equivalent conductance G eq = nG”. A
A G1
G2
Geq = G1 + G2
Þ
B
B
A
A G1
G2
G3
Geq = G1 + G2 + G3
Þ
B
B A
A G1
G2
G3
Geq = G1 + G2 + G3 +....+ Gn
Þ
Gn
B
B
Fig. 2.29 : Conductances in parallel and their equivalents.
2.1.9
Admittances in Series and Parallel
Equivalent of Seriesconnected Admittances
Consider a circuit with series combination of two admittances Y1 and Y2 connected to an ac source of voltage V volts rms value as shown in Fig. 2.30(a). Let I be the current through the admittances and V1 and V2 be the voltages across Y1 and Y2 , respectively. I +
From Fig. 2.30, we can write, V1 =
V1
I and V2 = I Y1 Y2
V2
E Y2
Y1
.....(2.30)
By Kirchhoff’s Voltage Law, we can write, +
V = V1 + V2 =
+
E
~E V
Fig. a : Admittances in series. I
I + I Y1 Y2
+
Using equation (2.30)
V
E Yeq
= Ie 1 + 1 o Y1 Y2 `
I = V
f
1 1 + 1 Y1 Y2
p
+
~E V
Fig. b : Equivalent circuit of Fig. a. Fig. 2.30 : Admittances in series and their equivalent.
Circuit Analysis
2. 20
Let,
.....(2.31)
I = V Yeq
where,
1 = Y1 Y2 1 + 1 Y1 + Y2 Y1 Y2
Yeq =
..... (2.32)
1 = 1 + 1 Yeq Y1 Y2
Also,
..... (2.33)
From equation (2.31), we can say that the seriesconnected admittances Y1 and Y2 can be replaced with an equivalent admittance given by equation (2.32). From equation (2.33), we can say that the inverse of the equivalent admittance of seriesconnected admittances is equal to the sum of the inverse of individual admittances. This concept can be extended to any number of admittances in series. Therefore, we can say that admittances in series can be replaced with an equivalent admittance whose value is given by the inverse of sum of the inverse of individual admittances. “When n number of identical admittances of value Y are connected in series, the equivalent admittance Y eq = Y /n ”. Y1
Yeq
Y2
Þ
Yeq =
B
A Y1
Y2
A
Yeq =
B Y3
Y2
1
Y1 Y2
=
Y1 + Y2
Y2
Yeq
Y3
Þ Y1
+
Y1
B
A
1 1
Yn
+
Y1
B
A
1
1 1
1
+
Y2
Y3
Yeq
Yeq =
Þ B
A
+
Y1
B
A
1
1
+
Y2
1 1 Y3
+ ... +
1 Yn
Fig. 2.31 : Series combination of admittances and their equivalents.
Equivalent of Parallelconnected Admittances
Consider a circuit with two admittances in parallel and connected to an ac source of voltage V volts rms value as shown in Fig. 2.32(a). Let I be the current supplied by the source and I1 and I2 be the currents through Y1 and Y2 , respectively. Since the admittances are parallel to the source, the voltage across them will be the same as that of the source. I
I
+ V
~
E
+ V
E
I1 Y1
+
I2
+ Y2
V
E
Fig. a : Admittances in parallel.
V
~
E
+ V
Yeq a Y1 C Y2
E
Fig. b : Equivalent circuit of Fig. a.
Fig. 2.32 : Admittances in parallel and their equivalent.
Chapter 2  Network Theorems for DC and AC Circuits
2. 21
From Fig. 2.32, we can write, I1 = V Y1 and I2 = V Y2
.....(2.34)
By Kirchhoff’s Current Law, we can write, I = I1 + I2 Using equation (2.34)
= V Y1 + V Y2 = V ` Y1 + Y2 j Let,
I = V Yeq
..... (2.35)
where, Yeq = Y1 + Y2 From equation (2.35), we can say that the parallelconnected admittances Y1 and Y2 can be replaced with an equivalent admittance Yeq given by the sum of individual admittances Y1 and Y2 .
A
A Y1
Y2
Þ B
B A
A Y1
Y2
Y3
Yeq = Y1 + Y2 + Y3
Þ
B
B
A
A Y1
B
Yeq = Y1 + Y2
Y2
Y3
Yn
Þ
Yeq = Y1 + Y2 + Y3 + ... + Yn
B
Fig. 2.33 : Admittances in parallel and their equivalents.
This concept can be extended to any number of admittances in parallel. Therefore, we can say that admittances in parallel can be replaced with an equivalent admittance whose value is given by the sum of individual admittances.
Circuit Analysis
2. 22
2.1.10
Susceptances in Series and Parallel
The susceptances in series and parallel combination can be combined to give an equivalent susceptance similar to that of admittance. In fact, the susceptances are admittances with imaginary part alone. The equivalent susceptances of series and parallel combinations of susceptances are diagrammatically illustrated in Fig. 2.34. jB1
jB2
jBeq jBeq = j
Þ A
B jB2
jB1
A
B jBeq
jBn
jBeq = j
Þ A
B
A A
B
1 1 1 1 + +...+ B1 B2 Bn
A jB1
jB2
jBeq = j(B1 + B2)
Þ
B
B
A
A jB1
B
B B 1 =j 1 2 1 1 B1 + B2 + B1 B2
jB2
jBn
jBeq = j(B1 + B2 +...+ Bn)
Þ B
Fig. 2.34 : Series and parallel combinations of susceptances and their equivalents.
2.1.11 Generalised Concept of Reducing Series/Parallelconnected Parameters In order to generalise the concept of reducing the series/parallelconnected parameters, they can be classified into two groups. Let the parameters Resistance (R), Inductance (L), Reactance (X) and Impedance (Z) be group1 parameters. Let the parameters Conductance (G), Capacitance (C), Susceptance (B) and Admittance (Y) be group2 parameters. The equivalent of seriesconnected group1 parameters will be given by the sum of individual parameters. The equivalent of parallelconnected group1 parameters will be given by the inverse of the sum of individual inverses. The equivalent of series and parallelconnected group1 parameters are summarised in Table 2.1. The equivalent of seriesconnected group2 parameters will be given by the inverse of the sum of individual parameters. The equivalent of parallelconnected group2 parameters will be given by the sum of individual parameters. The equivalent of series and parallelconnected group2 parameters are summarised in Table 2.2.
Z
Impedance
±jX
Reactance
L
Inductance
R
Z1
±jX1
L1
R1
Z2
±jX 2
L2
R2
Zn
±jXn
Ln
Rn
Þ
Þ
Þ
Þ
Zeq = Z1 + Z2 + ..... + Zn
Zeq
± jX eq = ± jX1 ± jX 2 ± ..... ± jX n
±jX eq
Leq = L1 + L2 + ..... + Ln
Leq
Req = R1 + R2 + ..... + Rn
Req
Z1
±jX1
L1
R1
Z2
±jX 2
L2
R2
Table 2.1 : Summary of Equivalent of Series/ParallelConnected Group1 Parameters Group1 Parameter Series connection of parameters and their equivalent Resistance
Zn
±jXn
Ln
Rn
Þ
Þ
Þ
Þ
±jX eq
1 1 1 1 + + ..... + L1 L 2 Ln
Leq
1 1 1 1 + + ..... + R1 R2 Rn
Z1
1
+
Zeq
Z2
1
+ ..... +
1 Zn
1
1 1 1 1 + + ..... + ± jX1 ± jX 2 ± jXn
Zeq =
± jX eq =
L eq =
Req =
Req
Parallel connection of parameters and their equivalent
Chapter 2  Network Theorems for DC and AC Circuits 2. 23
Y
Admittance
±jB
Susceptance
C
Capacitance
G
Conductance
Group2 Parameter
Y1
±jB1
C1
G1
Y2
±jB2
C2
G2
Yn
±jBn
Cn
Gn
Þ
Þ
Þ
Þ
1 1 1 1 + + ..... + C1 C2 Cn
Ceq
Y1
1
+
Y2
1
+ ..... +
1 Yn
1
1 1 1 1 + + ..... + ± jB1 ± jB2 ± jBn
Yeq
± jBeq =
Yeq =
1 1 1 1 + + ..... + G1 G2 Gn
±jBeq
Ceq =
Geq =
Geq
Series connection of parameters and their equivalent
Y1
±jB1
C1
G1
Y2
±jB2
C2
G2
Yn
±jBn
Cn
Gn
Þ
Þ
Þ
Þ
Yeq = Y1 + Y2 + ..... + Yn
Yeq
± jB eq = ± jB1 ± jB 2 ± ..... ± jBn
±jBeq
Ceq = C1 + C2 + ..... + Cn
Ceq
Geq = G1 + G2 + ..... + Gn
Geq
Parallel connection of parameters and their equivalent
Table 2.2 : Summary of Equivalent of Series/ParallelConnected Group2 Parameters
2. 24 Circuit Analysis
Chapter 2  Network Theorems for DC and AC Circuits
2. 25
2.2 Voltage and Current Division 2.2.1 Voltage Division in Seriesconnected Resistances Consider two resistances R1 and R2 in series which are connected to a dc source of V volts as shown in Fig. 2.35. Let I be the current supplied by the source and V1 and V2 be the voltages across R1 and R2, respectively. Since the resistances are in series, the current through them will be I amperes.
R1
I
+
V1
R2
+
E
V2
E
+E
V
Equations (2.36) and (2.37) given below can be used to Fig. 2.35 : Resistances in series. determine the voltages in seriesconnected resistances in terms of the total voltage across the series combination and the value of individual resistances. Hence, these equations are called the voltage division rule. V1 = V #
R1 R1 + R2
..... (2.36)
V2 = V #
R2 R1 + R2
..... (2.37)
The following equation will be helpful to remember the voltage division rule. In two seriesconnected resistances, Total voltage across # Value of the resistance series combination Voltage across one of the resistances = Sum of individual resistances Proof for Voltage Division Rule With reference to Fig. 2.35, by Ohm’s law, we can write, V1 = IR 1
..... (2.38)
V2 = IR2
..... (2.39)
By Kirchhoff’s Voltage Law, we get, V = V1 + V2
..... (2.40)
On substituting for V1 and V2 from equations (2.38) and (2.39) in equation (2.40), we get, V = IR 1 + IR 2 = I (R 1 + R 2 ) ` I =
V R1 + R2
On substituting for I from equation (2.41) in equation (2.38), we get, V1 =
R1 V # R1 = V # R1 + R2 R1 + R2
On substituting for I from equation (2.41) in equation (2.39), we get, V2 =
R2 V # R2 = V # R1 + R2 R1 + R2
..... (2.41)
Circuit Analysis
2. 26
2.2.2
Voltage Division in Seriesconnected Impedances
Consider two impedances Z1 and Z2 in series which are connected to an ac source of V volts as shown in Fig. 2.36. Let I be the current supplied by the source and V1 and V2 be the voltages across Z1 and Z2 , respectively. Since the impedances are in series, the current through them will be I amperes. Equations (2.42) and (2.43) can be used to solve the voltages in seriesconnected impedances in terms of the total voltage across the series combination and the value of individual impedances. Z1 Z2 Hence, these equations are called the voltage division rule. +
V1 = V #
Z1 Z1 + Z2
.....(2.42)
V2 = V #
Z2 Z1 + Z2
.....(2.43)
V1
E
+
+
~E
I
V2
E
V
The following equation will be helpful to remember the Fig. 2.36 : Impedances in series. voltage division rule. In two seriesconnected impedances, Total voltage across Value of the series combination # impedance Voltage across one of the impedances = Sum of individual impedances
2.2.3
Current Division in Parallelconnected Resistances
Consider two resistances R 1 and R2 in parallel are connected to a dc source of V volts as shown in Fig. 2.37. Let I be the current supplied by the source and I1 and I2 be the current through R1 and R 2, respectively. Since the resistances are parallel to the source, the voltage across them will be V volts.
I I2
I1
+ V
+ E
V
E
+ R1
V
R2
E
Fig. 2.37 : Resistances in Equations (2.44) and (2.45) given below can be used to parallel. determine the currents in parallelconnected resistances in terms of the total current drawn by the parallel combination and the values of individual resistances. Hence, these equations are called the current division rule. R2 I1 = I # ..... (2.44) R1 + R2
I2 = I #
R1 R1 + R2
..... (2.45)
The following equation will be helpful to remember the current division rule. In two parallelconnected resistances, Total current drawn by # Value of the other resistance parallel combination Current through one of the resistances = Sum of individual resistances
Chapter 2  Network Theorems for DC and AC Circuits
2. 27
Proof for Current Division Rule With reference to Fig. 2.37, by Ohm’s law we can write, I1 = V R1
..... (2.46)
I2 = V R2
..... (2.47)
By Kirchhoff’s Current Law, we get, I = I1 + I2 R + R1 = V + V = Vc 1 + 1 m = Vc 2 m R1 R2 R1 R2 R1 R2
Using equations (2.46) and (2.47)
R1 R2 R1 + R2 On substituting for V from equation (2.48) in equation (2.46), we get, ` V = I#
I1 = I #
..... (2.48)
R1 R2 R2 # 1 = I # R1 + R2 R1 R1 + R2
On substituting for V from equation (2.48) in equation (2.47), we get, I2 = I #
2.2.4
R1 R2 R1 # 1 = I # R1 + R2 R2 R1 + R2
Current Division in Parallelconnected Impedances
Consider two impedances Z1 and Z2 in parallel are connected to an ac source of V volts as shown in Fig. 2.38. Let I be the current supplied by the source and I1 and I2 be the current through Z1 and Z2 , respectively. Since the impedances are parallel to the source, the voltage across them will be V volts. I Equations (2.49) and (2.50) can be used to solve the I2 I1 currents in parallelconnected impedances in terms of the total + + + current drawn by the parallel combination and the value of Z2 Z1 V V V individual impedances. Hence, these equations are called the E E E current division rule.
~
I1 = I #
Z2 Z1 + Z 2
.....(2.49)
I2 = I #
Z1 Z1 + Z 2
.....(2.50)
Fig. 2.38 : Impedances in parallel.
The following equation will be helpful to remember the current division rule. In two parallelconnected impedances, Total current drawn by Value of the # parallel combination other impedance Current through one of the impedances = Sum of individual impedances
Circuit Analysis
2. 28
2.3
Source Transformation
“A practical voltage source can be converted into an equivalent practical current source and vice versa, with the same terminal behaviour”. In these conversions, the current and voltage at the terminal of the equivalent source will be the same as that of the original source, so that the power delivered to the load connected at the terminals of the original and equivalent source will be the same. The voltage source with series resistance can be converted into an equivalent current source with parallel resistance as shown in Fig. 2.39. Similarly, the current source with parallel resistance can be converted into an equivalent voltage source with series resistance as shown in Fig. 2.40. Rs
+ E
IRs
A
A

+ 
+
I
V
RL
Ish Is
Þ
Is = E / Rs
Rs
+
I
V
RL


B
B
Fig. a : Voltage source.
Fig. b : Equivalent current source of the voltage source in Fig. a. Fig. 2.39 : Conversion of voltage source to current source. A V Rs
Is
Rs
+ V
Rs I
RL
Þ
B
E
+ 
A

+
I
E = Is Rs
V
RL
+
IRs
B
Fig. b : Equivalent voltage source of the current source in Fig. a. Fig. 2.40 : Conversion of current source to voltage source.
Fig. a : Current source.
Proof for Conversion of Voltage Source to Current Source Consider a voltage source with source resistance R s delivering a current I to a load resistance R L as shown in Fig. 2.39(a). In Fig. 2.39(a), using KVL, we can write, E = IR s + V
..... (2.51)
On dividing equation (2.51) throughout by R s , we get, E = I+ V Rs Rs Let, E = Is and V = Ish Rs Rs From equations (2.52) and (2.53), we can write, Is = I + I s h
..... (2.52) ..... (2.53) ..... (2.54)
Equation (2.54) represents a current source with generated current Is and delivering a load current I to the load resistance RL. The Ish is the current drawn by a parallel resistance of value Rs connected across the current source. Hence, equation (2.54) can be used to construct an equivalent current source as shown in Fig. 2.39(b). It can be observed that the current source of Fig. 2.39(b) is equivalent to the voltage source of Fig. 2.39(a) with respect to the terminals AB.
Chapter 2  Network Theorems for DC and AC Circuits
2. 29
Proof for Conversion of Current Source to Voltage Source Consider a current source with source resistance R s delivering a current I to a load resistance RL as shown in Fig. 2.40(a). In Fig. 2.40(a), using KCL, we can write, Is = V + I Rs On multiplying equation (2.55) by R s, we get,
.....(2.55)
IsRs = V + I Rs Let,
..... (2.56)
Is Rs = E
..... (2.57)
From equations (2.56) and (2.57), we can write, E = V + I Rs ..... (2.58) Equation (2.58) represents a voltage source with generated voltage E and delivering a load current I to the load resistance R L . The IR s is the voltage across a series resistance of value Rs. Hence, equation (2.58) can be used to construct an equivalent voltage source as shown in Fig. 2.40(b). It can be observed that the voltage source of Fig. 2.40(b) is equivalent to the current source of Fig. 2.40(a) with respect to the terminals AB.
2.4 StarDelta Conversion 2.4.1 Resistances in Star and Delta The starconnected resistances can be converted into equivalent deltaconnected resistances and vice versa. The conversion is valid if the ratio of voltage to current at any two terminals of the equivalent network is the same as that in the original network. This means that the looking back resistance at any two terminals of the original network is the same as that of the equivalent network. Delta to Star Transformation
Consider three deltaconnected resistances R 12, R23 and R31 as shown in Fig. 2.41(a). These resistances can be converted into equivalent starconnected resistances R1, R2 and R3 of Fig. 2.41(b). The equations used to determine the star equivalent of deltaconnected resistances are given below: R12 R31 R1 = R12 + R23 + R31 R2 =
R12 R23 R12 + R23 + R31
R3 =
R23 R31 R12 + R23 + R31
From the above equations, we can say that when the three resistances in delta are equal to the value R, their equivalent starconnected resistances will consist of three equal resistances of 1 value R/3. 1 R31
R1
R12
Þ R3
R2
2
2
3
3
R23
Fig. a : Deltaconnected resistances. Fig. b : Starconnected resistances. Fig. 2.41 : Delta to star transformation.
Circuit Analysis
2. 30
The following equation will be helpful to remember the delta to star conversion equations. The product of resistances connected to the terminal in the delta network Star equivalent resistance at one terminal = Sum of three resistances in the delta network Star to Delta Transformation
Consider three starconnected resistances R 1, R2 and R3 as shown in Fig. 2.42(a). These resistances can be converted into equivalent deltaconnected resistances R12, R23 and R31 of Fig. 2.42(b). 1
1 R1 R3
R31
R12
Þ
R2
2
2 R23
3
3
Fig. a : Starconnected resistances.
Fig. b : Deltaconnected resistances.
Fig. 2.42 : Star to delta transformation.
The equations used to determine the delta equivalent of starconnected resistances are given below: R12 = R1 + R2 +
R1 R2 R3
R23 = R2 + R3 + R2 R3 R1 R31 = R3 + R1 + R3 R1 R2
From the above equations we can say that when the three resistances in star are equal to the value R, their equivalent deltaconnected resistances will consist of three equal resistances of value 3R. The following equation will be helpful to remember the star to delta conversion equations. Product of the resistances connected to the two Sum of resistances terminals in the star network Delta equivalent resistance between the two terminals = connected to the + two terminals in The third resistance in the star network the star network
Chapter 2  Network Theorems for DC and AC Circuits
2.4.2
2. 31
Impedances in Star and Delta
The starconnected impedances can be converted into equivalent deltaconnected impedances and vice versa. The conversion is valid if the ratio of voltage to current at any two terminals of the equivalent network is the same as that in the original network. This means that the looking back impedance at any two terminals of the original network is the same as that of the equivalent network. Delta to Star Transformation
Consider three deltaconnected impedances Z12, Z23 and Z31 as shown in Fig. 2.43(a). These impedances can be converted into equivalent starconnected impedances Z1, Z2 and Z3 of Fig. 2.43(b) using the equations given below: Z1 =
Z12 Z31 Z12 + Z23 + Z31
;
Z2 =
Z12 Z23 Z12 + Z23 + Z31
1
1 Z31
Z23 Z31 Z12 + Z23 + Z31
Z3 =
;
Z1
Z12
Þ
Z3
Z2
2
2 Z23
3
3
Fig. a : Deltaconnected impedances.
Fig. b : Starconnected impedances.
Fig. 2.43 : Delta to star transformation.
Star to Delta Transformation
Consider three starconnected impedances Z1, Z2 and Z3 as shown in Fig. 2.44(a). These impedances can be converted into equivalent deltaconnected impedances Z12, Z23 and Z31 of Fig. 2.44(b) using the equations given below: Z12 = Z1 + Z2 + Z1 Z2 Z3
;
Z23 = Z2 + Z3 + Z2 Z3 Z1
;
Z31 = Z3 + Z1 + Z3 Z1 Z2
1 1 Z1 Z3
Z31
Z12
Þ
Z2
2
2 Z23
3
3
Fig. b : Deltaconnected impedances. Fig. a : Starconnected impedances. Fig. 2.44 : Star to delta transformation.
Circuit Analysis
2. 32
2.5
Solved Problems in Network Reduction
18 W
82 W 100 W
EXAMPLE 2.1
60 W 76 W
In the circuit shown in Fig. 1, find the total resistance across the
E
+ 
supply voltage.
40 W
Fig. 1. ß
SOLUTION The stepbystep reduction of the given network is shown in Figs 2 to 5. 100 W
82 + 18 = 100 W
Step1 : The seriesconnected 82 W and 18 W resistances in Fig. 1 are combined to
E
76 W
+ 
60 ´ 40 = 24 W 60 + 40
form a single equivalent resistance as shown in Fig. 2. Also the parallelconnected 60 W and 40 W in Fig. 1 are combined to form a single equivalent resistance as
Fig. 2.
shown in Fig. 2.
ß
Step2 : The seriesconnected 24 W and 76 W resistances in Fig. 2 are combined to form a single equivalent resistance as shown in Fig. 3.
100 W
100 W
+ 
E 24 + 76 = 100 W
Fig. 3.
Step3 :
ß 100 W
The two parallelconnected 100 W resistances in Fig. 3 are combined to form
100 ´ 100 = 50 W 100 + 100
a single equivalent resistance as shown in Fig. 4. + 
E
Step4 :
Fig. 4. ß
The seriesconnected 100 W and 50 W resistances in Fig. 4 are combined to form a single equivalent resistance as shown in Fig. 5.
100 + 50 = 150
+ E
E
RESULT With reference to Fig. 5, we can say that, Total resistance across supply = 150 W
Fig. 5.
Chapter 2  Network Theorems for DC and AC Circuits
2. 33 2W
EXAMPLE 2.2 Find the total resistance as seen by the source in the circuit shown
A +
2W
V 4W
in Fig. 1.
_ 4W B
SOLUTION
Fig. 1. 1W
3W
ß
The stepbystep reduction of the given circuit is shown in Figs 2 to 5. A
Step1 :
2W
3W + V 4W _
4W
The given circuit is redrawn as shown in Fig. 2.
2W
1W
Fig. 2. B
Step2 :
ß A
The two seriesconnected 2 W resistances in Fig. 2 are combined to form a single equivalent resistance as shown in Fig. 3. Similarly, the 3 W and 1 W in series are converted into a single equivalent reisistance.
+ 2+2 = 4W
4W
_
3+1 = 4W
4W
V
Fig. 3. B
ß Step3 :
A +
The circuit of Fig. 3 is redrawn as shown in Fig. 4.
V
Fig. 4. Step4 :
4W
4W
_
B
4W
4W
ß
The four parallelconnected 4 W resistances in Fig. 4 are combined to form a single equivalent resistance as shown in Fig. 5.
A +
RESULT
V
4 a 1 4
With reference to Fig. 5, we can say that, B
Total resistance across supply = 1 W
Fig. 5. A
EXAMPLE 2.3
(AU Dec’14, 4 Marks)
60
30 90
Find the equivalent resistance of the network shown in Fig. 1. 75
15
B
Fig. 1.
Circuit Analysis
2. 34 SOLUTION
1
A 30 W
60 W
R1 R2
The stepbystep reduction of the given network is shown in Figs 2 to 6.
R3
2
3 90 W 75 W
Step1 :
15 W
B
Fig. 2. The deltaconnected 30 W, 90 W and 60 W resistances in Fig. 2 are
ß
converted into equivalent starconnected resistances as shown in Fig. 3. The resistances R1, R2 and R3 connected by dotted lines in Fig. 2 are the star
1
A
R1 = 10 W
equivalent resistances.
R3 = 30 W
R2 = 15 W
30 # 60 R1 = = 10 Ω 30 + 90 + 60 R2 =
2
30 # 90 = 15 Ω 30 + 90 + 60
3
75 W
15 W
B
R3 =
90 # 60 = 30 Ω 30 + 90 + 60
Fig. 3. ß
Step2 :
A 10 W
The seriesconnected 15 W and 75 W resistances in Fig. 3 are combined to form a single equivalent resistance as shown in Fig. 4. Similarly, the 30 W and 15 W in series are converted into a single equivalent reisistance.
15 + 75 = 90 W
Step3 :
30 + 15 = 45 W
B
Fig. 4. ß
The parallelconnected 90 W and 45 W resistances in Fig. 4 are combined to form a single equivalent resistance as shown in Fig. 5.
A 10 W
Step4 : The seriesconnected 10 W and 30 W resistances in Fig. 5 are combined to
90 ´ 45 90 + 45 = 30 W
B
Fig. 5.
form a single equivalent resistance as shown in Fig. 6.
ß A
RESULT
10 + 30 = 40
With reference to Fig. 6, we can say that, Equivalent resistance across AB, RAB = 40 W
B
Fig. 6.
Chapter 2  Network Theorems for DC and AC Circuits
2. 35 2W
EXAMPLE 2.4 Find the equivalent input resistance across terminals A and B of the bridgedT network shown in Fig. 1.
1W
3W
A 2W
1W
SOLUTION B
Fig. 1.
The stepbystep reduction of the bridgedT network is shown
ß
in Figs 2 to 5.
2W
Step1 :
R1
The deltaconnected resistances 1 W, 3 W and 2 W in Fig. 2 are converted into equivalent starconnected resistances as shown in Fig. 3.
R3 R2
1W A
3W
2
1
The resistances R1, R2 and R3 connected by dotted lines in Fig. 2 are star
3 2W
1W
equivalent resistances. B
R1 =
Fig. 2.
2 # 1 = 2 = 1 Ω 2 + 1+ 3 6 3
ß
1# 3 R2 = = 3 = 1 Ω 2 + 1+ 3 6 2
1 R1 = W 3
R3 = 1 W
A
R3 =
2 # 3 = 6 = 1Ω 2 + 1+ 3 6
R2 =
1 W 2
1W
Step2 : 2W
The seriesconnected two 1 W resistances in Fig. 3 are combined to form
B
W
a single equivalent resistance as shown in Fig. 4. Similarly, the 1/2 W and 2 W in
Fig. 3.
series are converted into a single equivalent reisistance.
ß 1 W 3
Step3 : A
1 + 1 = 2W
The parallelconnected 5/2 W and 2 W resistances in Fig. 4 are converted into 1 5 +2= W 2 2
a single equivalent resistance as shown in Fig. 5.
Step4 :
B
Fig. 4. The seriesconnected 1/3 W and 10/9 W resistances in Fig. 5 are combined to
ß 1 W 3
form a single equivalent resistance as shown in Fig. 6. A
A
RESULT With reference to Fig. 6, we can say that, Equivalent resistance across A  B = 13 Ω = 1.4444Ω 9
B
5 ´2 2 = 5 +2 2 10 = W 9
Þ
1 10 13 C a 3 9 9 a 1.4444
B
Fig. 6.
Fig. 5.
10 2 9 2
Circuit Analysis
2. 36
EXAMPLE 2.5
C
Find the equivalent resistance across terminals AB in the network shown in Fig. 1. All the resistances are 3 W. F
SOLUTION The stepbystep reduction of the network is shown in Figs 2 to 7. E
Step1 :
D
The innermost deltaconnected resistances in Fig. 2 are converted into an equivalent starconnected resistance in Fig. 3. Since the deltaconnected resistances are of equal value, the equivalent starconnected resistances will also have equal value, which is onethird of the deltaconnected resistance.
B
A
Fig. 1. ß C
Step2 : The seriesconnected 3 W and 1 W resistances in each branch of the starconnection in Fig. 3 are combined to form a single equivalent resistance of 3 W + 1 W = 4 W in each branch, as shown in Fig. 4.
3W F 3W
3W 3W
3W
Step3 : The starconnected resistances in Fig. 4 are converted into an equivalent deltaconnected resistance as shown in Fig. 5. Since the starconnected resistances are of equal value, the deltaconnected resistances will also have equal value, which is three times the starconnected resistance.
3W
E D
3W
3W B
A 3W
Fig. 2. ß C
C
C
W
3= 4´
12
1
3+
3+1=4 W
W 12
Þ
3=
W =4
3+
3W
Þ
4´
4 ´ 3 = 12 W
A
3W
3W
F
1=
4W
3W
D 3/3
=1
W 3/3 = 3W
3W
E 3W
1W B
A
B A
3W
3W
3/3 = 1 W
3W 3W
B
3W
Fig. 5.
Fig. 3.
Fig. 4.
ß C
3 ´ 12 3 + 12 = 2.4 W
Þ
2.4 W
Þ
2.4 W A
A
2.4 W
4.8 ´ 2.4 = 1.6 W 4.8 + 2.4
2.4 + 2.4 = 4.8 W
B
A B
B
Fig. 8.
Fig. 7.
Fig. 6. Step4 : The network of Fig. 5 has three similar parallel connections of 12 W and 3 W resistances. Each parallel connection is converted into a single equivalent resistance as shown in Fig. 6.
Chapter 2  Network Theorems for DC and AC Circuits
2. 37
Step5 : Since we need resistance across nodes A and B, we can eliminate node C by combining the two seriesconnected resistances in the path ACB to a single equivalent resistance as shown in Fig. 7. Step6 : The parallelconnected 4.8 W and 2.4 W resistances in Fig. 7 are converted into a single equivalent resistance in Fig. 8.
RESULT With reference to Fig. 8, we can say that, Resistance across AB = 1.6 W
EXAMPLE 2.6
2 B
Determine the equivalent resistance at AB in the network shown in Fig. 1.
2
2
SOLUTION
2
2
MethodI
2
2
Let us connect a voltage source of value V volts across AB as shown in Fig. 2. Let I be the current delivered by the source. Let
2
2 2
RAB be the resistance across AB. Now, RAB is given by, R AB = V I Due to the symmetry of the network, when a current enters a node it will divide equally in the outgoing path.
A
Similarly, the currents entering a node from incoming branches will also be equal. The currents that will flow in the various paths are shown in Fig. 2.
2W
2
Fig. 1. I
T I 6 Q
= c 4 + 2 + 4 m I = 10 I = 5 I 6 6 3
I 6
I 6
2W

3
I
2W
´2
+ _
2W O 2W 2W I I 6 I 6 ´2 N 6
V

I 3 I
M
3
I 6
P
A
I
R
B
I
3
I
I
S I 2W
I
2W
2W
3
2W
3
2W 2W + I
3
3
´2
+
+
With reference to Fig. 2, by KVL in the path AMNOSBA, we get, V = c I # 2m + c I # 2m + c I # 2m = c 2 + 2 + 2 m I 3 6 3 3 6 3
`
2
I
V = 5 I 3
` R AB = V = 5 Ω I 3 MethodII
Fig. 2.
The given network can be redrawn as shown in Fig. 3, in which two of the resistive branches are considered as the parallel combination of two 4 W resistances. 2W
2W
B1
B 2W
2W
2W
2W
2W
2W
2W
4W
2W
Þ 2W
2W 2W
A
Fig. 1.
2W 2W
4W
2W
4W 2W
Fig. 3.
2W 2W
2W A
A1
A2
B2
2W
2W
4W
B
Circuit Analysis
2. 38
The network of Fig. 3 can be considered as the parallel combination of two identical networks as shown in Figs 4 and 5. Let RA1B1 be the single equivalent resistance of the network shown in Fig. 4 and RA2B2 be the single equivalent resistance of the network shown in Fig. 5. Now, the equivalent resistance RAB at AB of the original network is given by the parallel combination of RA1B1 and RA2B2. Since, the networks of Figs 4 and 5 are identical, RA1B1 will be equal to RA2B2 and so R AB = R A1B1 2 or R AB = R A2B2 2 . Therefore, it is sufficient if we reduce the network of Fig. 4 into a single equivalent resistance. The stepbystep reduction of the network of Fig. 4 is shown in Figs 6 to 10. 2 B1
2
B2
2 2
2
4
4
4 4
2
2
2
2
2
A2
A1
Fig. 5.
Fig. 4.
Step1 :
The seriesconnected 4 W and 2 W resistances in Fig. 4 are combined to form a single equivalent resistance as shown in Fig. 6.
6W
Step2 :
2W R1
R3
The deltaconnected resistances 2 W, 2 W and 6 W in Fig. 6 are converted into an equivalent starconnected resistance as shown in Fig. 7.
1
A1
2W
B1
3 R2 2W
6W
2 # 6 = 12 = 6 Ω 2+2+6 10 5 2 2 4 # R2 = = = 2Ω 2+2+6 10 5 R3 = 2 # 6 = 12 = 6 Ω 2+2+6 10 5 R1 =
2
Fig. 6. ß 1
6 16 +2= W 5 5
6 W 5
6 W 5
Þ
B1
A1
A1
3
2W R1
6 W 5
B1 R3
2 32 +6= W 5 5
2 W 5
R2 6W
Fig. 8. 2
ß B1
A1 6 W 5
16 32 ´ 5 5 = 512 ´ 5 16 32 25 48 + 5 5 32 1 32 = ´ = W 5 3 15
Fig. 9.
Þ
B1
A1
6 32 18 C 32 C a 5 15 15 50 10 a a 15 3
Fig. 10.
Fig. 7.
Chapter 2  Network Theorems for DC and AC Circuits
2. 39
Step3 : The seriesconnected 6 W and 2 W resistances in Fig. 7 are combined to form a single equivalent resistance 5 as shown in Fig. 8. Similarly, the seriesconnected 2 W and 6 W resistances are converted into a single equivalent. 5 Step4 : The parallelconnected 16 W and 32 W in Fig. 8 are combined to form a single equivalent resistance 5 5 as shown in Fig. 9. Step5 : The seriesconnected 6 W and 32 W resistances in Fig. 9 are combined to form a single equivalent 5 15 as shown in Fig. 10.
RESULT With reference to Fig. 10, we get, R A1B1 = 10 Ω 3 Let, RAB be the equivalent resistance at AB in the network of Fig. 1. Now, R AB =
R A1B1 = 10 # 1 = 5 Ω 2 3 2 3 IT
(AU Dec’16, 8 Marks)
EXAMPLE 2.7
13
A
Find the equivalent resistance and total current IT in the
24
10 20
network shown in Fig. 1. +
100 V E
SOLUTION
50
30
The stepbystep reduction of the given network is shown B
in Figs 2 to 6. IT
Step1 :
A
Fig. 1.
13 W
The deltaconnected 30 W, 20 W and 50 W resistances in
10 W
24 W
Fig. 2 are converted into equivalent starconnected resistances as shown in Fig. 3. The resistances R1, R2 and R3 connected by
20 W
R1
dotted lines in Fig. 2 are the star equivalent resistances. R1 =
R2
30 W
20 # 30 = 6Ω 20 + 30 + 50
B
20 # 50 R2 = = 10 Ω 20 + 30 + 50 R3 =
2
1 +
100 V 
Fig. 2.
3
ß IT
A
30 # 50 = 15 Ω 20 + 30 + 50
13
10
24
Step2 :
R2=10
+
The seriesconnected 24 W and 6 W resistances in Fig. 3 are
100 V E
R1 = 6 R3 =15
combined to form a single equivalent resistance as shown in Fig. 4. Similarly, the 10 W and 10 W in series are converted into a single equivalent reisistance.
50 W
R3
B
Fig. 3.
Circuit Analysis
2. 40 IT
13 W
A
Step3 :
10 + 10 = 20 W
24 + 6 = 30 W
The parallelconnected 30 W and 20 W resistances in Fig. 4 are combined to form a single equivalent resistance as
+
100 V 
shown in Fig. 5.
15 W
Step4 :
B
Fig. 4.
The seriesconnected 13 W,12 W and 15 W resistances
ß
in Fig. 5 are combined to form a single equivalent resistance as
IT
13 W
A
shown in Fig. 6.
30 ´ 20 30 + 20 = 12 W
Let, RAB be the resistance across A and B.
+
100 V 
With reference to Fig. 6, we get,
15 W
RAB = 40 W B
Fig. 5.
To find the total current drawn from the source IT
Let, IT be the total current drawn from the source. Now, by Ohm’s law, we get,
ß A
13+12+15 = 40
+
100 V E
Total current, I T = 100 = 100 = 2.5 A R AB 40
B
Fig. 6. 4 k
EXAMPLE 2.8 When a 6 V source is connected across A and B in the network shown in Fig. 1, find a) the total resistance between
3 k
A 10 k
terminals A and B, b) the total current drawn from the source,
5 k
B
4.7 k
c) the voltage across 3 kΩ resistance and d) the current through 4.7 kΩ resistance.
Fig. 1.
SOLUTION a) To find the resistance between A and B
4 kW A
The stepbystep reduction of the given network to a single equivalent resistance is shown in Figs 2 to 4.
10 k W
3 kW
Step1 : B
The parallelconnected 5 kΩ and 4.7 kΩ resistances in Fig. 1 are converted into a single equivalent resistance as shown in Fig. 2
Fig. 2.
5 ´ 4.7 = 2.4227 k W 5 + 4.7
Chapter 2  Network Theorems for DC and AC Circuits
2. 41
The seriesconnected 4 kΩ and 2.4227 kΩ resistances
3 kW
10 k W
in Fig. 2 are converted into a single equivalent resistance as shown in Fig. 3.
B
Step3 :
Fig. 3.
ß
The parallelconnected 10 k Ω, 3 k Ω and 6.4227 k Ω
A
resistances in Fig. 3 are converted into a single equivalent
1 1 1 1 C C 10 3 6.4227 a 1.6977 k
resistance as shown in Fig. 4. RAB
Let, RAB be the resistance across A and B.
4 + 2.4227 = 6.4227 kW
A
Step2 :
B
Fig. 4.
With reference to Fig. 4, we get, R AB = 1.6977 kΩ
IT
b) To find the total current drawn from the source
A
The given network can be represented by a single
+
RAB
6V
equivalent resistance as shown in Fig. 4. Let us connect a 6 V
E
source across A and B as shown in Fig. 5. Let, IT be the total current drawn from the source.
1.6977 k
B
Fig. 5.
Now, by Ohm’s law, we get, Total current, I T =
6 = 6 = 3.5342 # 10 3 A = 3.5342 mA R AB 1.6977 # 103
c) To find the voltage across 3 kW resistance
4 k IT
In the network of Fig. 1, connect a 6 V source across A
A
and B as shown in Fig. 6. Now, by inspection we can say that the 6 V source and 3 kW resistance are in parallel. Since the voltages
+
+ 10 k
6V
are the same in parallel connection, the voltage across 3 kW is 6 V.
3 k
6V
+ 6V
5 k 4.7 k
B
∴ Voltage across 3 kΩ resistance = 6 V
Fig. 6.
d) To find current through 4.7 kW resistance
The voltages and currents that will exist in various resistances when a 6 V source is connected across A and B of the network of Fig. 1 are shown in Fig. 7. For convenience, the circuit of Fig. 7 is redrawn as shown iin Fig. 8.
I IT A
10 k W
+ 6V _
+ 6V _
+ V = 6V _
4 kW + V1
4.7 k W
I2 + V2 _
4 kW + V1
A
 V2 + I 1 5 kW
Fig. 7.
IT
I
3 kW
B
I V = V1 + V 2 I = I1 + I2
Þ
10 k W
+ 6V _
+ 6V _
3 kW
B
Fig. 8.
+ V = 6V _
+ V2 _
5 ´ 4.7 5 + 4.7 = 2.4227 kW
Circuit Analysis
2. 42 With reference to Fig. 8, by voltage division rule, we get, V2 = V #
2.4227 = 6 # 2.4227 = 2.2633 V 4 + 2.4227 4 + 2.4227
With reference to Fig. 7, by Ohm’s law, we get, I2 =
V2 = 2.2633 3 = 0.4816 # 10 3 = 0.4816 mA 4.7 # 103 4.7 # 10
\ Current through the 4.7 kΩ resistance = I2 = 0.4816 mA
RESULT Total resistance between A and B, R AB = 1.6977 kΩ Total current, I T = 3.5342 mA Voltage across the 3 kΩ resistance = 6 V Current through the 4.7 kΩ resistance = 0.4816 mA
0.
W
5
.5
+
j1
j0
+
.5
5
W
1.
EXAMPLE 2.9 Find the equivalent impedance of the network shown in Fig. 1.
j2 W
1W
SOLUTION
3W
j4 W
Fig. 1.
B
A
The stepbystep reduction of the given network to a single
ß
equivalent impedance is shown in Figs 2 to 5.
0.5 + j0.5 + 1.5 + j1.5 = 2 + j2 W
Step1 : The seriesconnected 0.5 + j0.5 W and 1.5 + j1.5 W impedance in
j2 W
1W
3W
Fig.1 are converted into a single equivalent impedance as shown in Fig. 2. j4 W
Fig. 2.
A
B
ß
b2 + j2g ´ b j2g = 2  j2 W 2 + j2 + b  j2g
Step2 : The parallelconnected 2 + j2 W impedance and –j2 W capacitive reactance are converted into a single equivalent impedance as shown in
1W
3W
Fig. 3.
Fig. 3.
j4 W A
B
ß Step3 :
1 + 2 E j2 + 3 = 6 E j2
The seriesconnected 1 W and 3 W resistances and 2 – j2 W impedance in Fig. 3 are converted into a single equivalent impedance as shown in Fig. 4.
Fig. 4.
j4 A
B
Chapter 2  Network Theorems for DC and AC Circuits
2. 43
Step4 :
b6  j2g ´ j4 = 2.4 + j3.2 W 6  j2 + j4
The parallelconnected 6 – j2 W impedance and j4 W inductive reactance are converted into a single equivalent impedance as shown in Fig. 5.
Fig.5. A
B
RESULT With reference to Fig. 5, the equivalent impedance Z AB at terminals AB is, Z AB = 2.4 + j3.2 W
EXAMPLE 2.10 Obtain the single deltaconnected equivalent of the network shown in
1
Fig. 1.
10
10
j10
j10
SOLUTION
j5
2
5 3
The given network has two star networks between nodes 1, 2 and 3. We can convert the star networks one by one into delta.
Fig. 1.
Consider the starconnections of 10 Ω, 10 Ω and 5 Ω shown in Fig. 2. The equivalent delta network is shown in Fig. 3. 1
10 W
10 W
R1
R2 5W
2
R12
1
2
40 W
Þ
R3
20 W 20 W R31
R23
3
3
Fig. 2.
Fig. 3.
The starconnected resistances are denoted by R 1 , R 2 and R 3 . The equivalent deltaconnected resistances are denoted by R 12 , R 23 and R 31 and they are computed as shown below: R12 = R1 + R 2 +
R1 R 2 = 10 + 10 + 10 # 10 = 40 Ω R3 5
R 23 = R 2 + R3 +
R 2 R3 = 10 + 5 + 10 # 5 = 20 Ω R1 10
R31 = R3 + R1 +
R3 R1 = 5 + 10 + 5 # 10 = 20 Ω R2 10
Consider the star connections of j10 Ω, j10 Ω and j5 Ω shown in Fig. 4. The equivalent delta network is shown in Fig. 5. 1
j10 W
j10 W
X1
X2
j5 W
X3
2
j40 W
1
2
X12
j20 W j20 W
Þ X31
X23
3
3
Fig. 4.
Fig. 5.
Circuit Analysis
2. 44
The starconnected reactances are denoted by X1, X 2 and X3 . The equivalent deltaconnected reactances are denoted by X12, X23 and X31 and they are computed as shown below: j10 # j10 X12 = X1 + X 2 + X1 X 2 = j10 + j10 + = j40 Ω j5 X3 j10 # j5 X 23 = X 2 + X3 + X 2 X3 = j10 + j5 + = j20 Ω j10 X1 j5 # j10 X31 = X3 + X1 + X3 X1 = j5 + j10 + = j20 Ω j10 X2 Using the delta equivalent shown in Figs 3 and 5, the network of Fig. 1 can be transformed into the type shown in Fig. 6 and we can observe that R12 and X12 are in parallel in Fig. 6. Similarly, R23 and X 23 are in parallel and R31 and X31 are in parallel. The parallel combination of resistance and reactance can be combined to give a single equivalent impedance as shown below: Let, Z12 = Parallel combination of R 12 and X12 Z 23 = Parallel combination of R 23 and X 23 Z31 = Parallel combination of R31 and X31 Z12 =
40 # j40 R12 X12 = = 20 + j20 Ω 40 + j40 R12 + X12
Z 23 =
20 # j20 R 23 X 23 = = 10 + j10 Ω 20 + j20 R 23 + X 23
Z31 =
20 # j20 R31 X31 = = 10 + j10 Ω 20 + j20 R31 + X31
The single delta equivalent of the network of Fig. 1 is shown in Fig. 7. X12 = j40 W
10 W
10 W j10 W
j10 W
1
2
Þ
2
1
=
X31 = j20 W
3
Fig. 1.
EXAMPLE 2.11
Z31 = 10 + j10 W
Z23 = 10 + j10 W
R
W
5W
Þ
23
20
j5 W
2
20
= R 31
R12 = 40 W
Z12 = 20 + j20 W
W
1
X23 = j20 W
3
3
Fig. 6.
Fig. 7.
(AU Dec’16, 4 Marks)
SOLUTION
60 mF
5 mF
Find the equivalent capacitance of the network shown in Fig. 1.
A
20 mF
6 mF
20 mF
The stepbystep reduction of the given circuit is shown in Figs 2 to 4.
B
Fig. 1.
Chapter 2  Network Theorems for DC and AC Circuits
2. 45 60 mF
Step1 :
A
The seriesconnected 20 mf and 5 mf capacitances in Fig. 1 are
5 ´ 20 5 + 20 = 4 mF
combined to form a single equivalent capacitance as shown in Fig. 2.
6 mF
20 mF
Step2 :
B
Fig. 2. ß
The parallelconnected capacitances 4 mf, 6 mf and 20 mf in Fig. 2 are combined to form a single equivalent capacitance as shown in Fig. 3.
60 mF A
4 + 6 + 20 = 30 mF
Step3 : The seriesconnected capacitances 30 mf and 60 mf in Fig. 3 are
Fig. 3.
combined to form a single equivalent capacitance as shown in Fig. 4.
B
ß A
RESULT
30 ´ 60 30 + 60 = 20 mF
With reference to Fig. 4, we can say that, Equivalent capcitance AB, Ceq = 20 mF
Fig. 4.
B C
EXAMPLE 2.12
A C
C
Find the equivalent capacitance across terminals AB in the network C
shown in Fig. 1.
C
C
SOLUTION
C
Let us consider the capacitances as capacitive reactances
Fig. 1.
as shown in Fig. 2 for convenience in applying reduction
jXC A
techniques. The stepbystep reduction of capacitive reactances into a single equivalent is shown in Figs 2 to 7.
jXC
jXC
jXC
jXC
jXC
Step1 : The deltaconected capacitive reactances in Fig. 2 are
Fig. 2.
jXC
B jXC
converted into starconnected capacitive reactances as shown in Fig. 3. Since the deltaconnected reactances are of equal
ß
value, the equivalent starconnected reactances will also have
XC
A
Ej
equal value, which is one third of the deltaconnected reactances.
3
EjXC
X Ej C 3
The seriesconnected capacitive reactances – jXC/3, – jXC and – jXC/3 in Fig. 3 are converted into a single equivalent reactance as shown in Fig. 4. Similarly, the two – jXC/3 reactances
X Ej C 3
X Ej C 3
Step2 :
in series are converted into a single equivalent.
C
B
Fig. 3.
B
X Ej C 3
X Ej C 3
EjXC
Circuit Analysis
2. 46 Step3 :
X Ej C 3
The parallelconnected capacitive reactances –
A
j2XC /3 and –j5XC /3 in Fig.4 are converted into a single equivalent capacitive reactance as shown in Fig.5.
E jXC
EjXC
a Ej
Step4 :
FG 1 C 1 IJ H 3 3K
E jXC
2X C
5X C
a Ej
3
FG 1 C 1C 1 IJ H 3 3K 3
B
The seriesconnected capacitive reactances –jXC /3, –j10XC /21, and –jXC /3 in Fig.5 are converted into a single
X Ej C 3
Fig. 4.
equivalent reactance as shown in Fig. 6. X j C 3
Step5 :
F GG GH
in Fig. 6 are converted into a single equivalent reactance as shown in jXC
Fig. 7.
I JJ JK
2 5 ´  jXC 3 3 2 5 + 3 3 10 3 =  jXC ´ 9 7 10X C = j 21
A
The parallelconnected capacitive reactances –jXC and –j8XC /7
RESULT B X j C 3
Let, CAB = Equivalent capacitance across terminals AB
Fig. 5.
XCAB = Equivalent capacitive reactance across terminals AB A
With reference to Fig. 7, we get, XCAB =
E jXC
8XC 15
EjXC
.....(1)
a Ej a Ej
We know that, B
XC
= 1 2πfC
LM 1 C 10 C 1 OP N 3 21 3 Q
24XC 21 8X C 7
Fig. 6.
.....(2)
Using equation (2), equation (1) can be written as, XCAB = 8 # 1 15 2πfC Let,
XCAB =
1 2πfC AB
LM MM MN
8 ´1  jX C 7 8 +1 7
A
.....(3) .....(4)
=  jX C ´
On equating equations (3) and (4), we get, = j
B
8 # 1 1 = 15 2πfC 2πfC AB
&
C AB = 15 C = 1.875 C 8
OP PP PQ
8 7 ´ 7 15
8X C 15
Fig. 7.
∴ Equivalent capacitance at AB, CAB = 1.875 C farad. 3 + j2
A
4 + j4
j2 + 2
1 + j4
j5
Fig. 1.
+
B
1
Find the equivalent admittance of the network shown in Fig. 1.
3 E j3
EXAMPLE 2.13
Chapter 2  Network Theorems for DC and AC Circuits SOLUTION
2. 47 3 + j2
W
A
3  j3
j2
W
+ 2
j5
1 + j4
b2 + j4g ´ b4 + j4g
+
W
W
into a single equivalent admittance is shown in Figs 2 to 5.
1
W
The stepbystep reduction of the given network
2 + j4 + 4 + j4 W
= 1.44 + j2.08
B
Step1 :
Fig. 2.
The seriesconnected 2 + j4 M and 4 + j4 M
ß 3 + j2
admittance as shown in Fig. 2.
W
A
W
W 1 + j4
Step2 : The parallelconnected 2 + j2 M , 3 – j3 M , 1 + j5 M and 1.44 + j2.08 M admittances in Fig. 2 are converted into a single equivalent admittance as
2 + j2 + 3  j3 + 1 + j5 + 1.44 + j2.08 = 7.44 + j6.08
admittances in Fig. 1 are converted into a single equivalent
B
Fig. 3.
shown in Fig. 3.
ß Step3 :
Step4 :
W
The seriesconnected 3 + j2 M and 7.44 + j6.08 M are converted into a single equivalent admittance as shown in Fig. 4.
b3 + j2g ´ b7.44 + j6.08g
1 + j4
A
= 2 .1441 + j1.513
3 + j2 + 7.44 + j6.08 W
B
Fig. 4. The parallelconnected 1 + j4 M and 2.1441 + j1.513 M admittances
1 + j4 + 2.1441 + j1.513 = 3.1441 + j5.513
ß
are converted into a single equivalent admittance as shown in Fig. 5.
A
RESULT With reference to Fig. 5, the equivalent admittance YAB at terminals AB is, B
YAB = 3.1441 + j5.513 M
Fig. 5.
EXAMPLE 2.14 j0.5
Determine the equivalent susceptance for the circuit shown in Fig. 1.
j0.2
SOLUTION
j0.2
The stepbystep reduction of the given network is shown in Figs 2 to 6. Let, jBAB be the equivalent susceptance across AB. With reference to Fig. 6, we get, jB AB = j0.7 M
A
j0.4
j0.4
B j0.2
Fig. 1.
Circuit Analysis
2. 48 j0.5
W
j0.2
W
j0.2
A
j0.4
W
j0.4
j0.5 j0.2
W
j0.5
W
j0.2
Þ
W
j0.4
W
j0.4
W
j(0.2 + 0.2) W = j0.4
W
Fig. 1.
W B
A
j0.4
W
Fig. 3.
W
ß
Þ
B
A
Fig. 6.
Þ
W
B
W j0.4 = j0.2 2
A j0.4
W
W
j(0.2 + 0.2) W = j0.4
W
B
Fig. 4.
Fig. 5.
(AU May’17, 8 Marks)
EXAMPLE 2.15
B
W j0.4 = j0.2 2
j0.5
j(0.2 + 0.5) = j0.7
W
Fig. 2. j0.5
A
W
Þ A
B j0.2
W
5V
1
E+
Using source transformation technique, find the current
Io
Io, through the 7 W resistor shown in Fig. 1.
5A
6
7
3
3A
4
SOLUTION The parallelconnected resistances 6 W and 3 W are Fig. 1. converted into a single equivalent resistance as shown in Fig. 2. Similarly, the seriesconnected resistances 1 W and 4 W are converted into a single equivalent resistance as shown in Fig. 2. Let us convert the 5 A source into a voltage source as shown in Fig. 3. 5V
5V
+
+
Io
Io 3´6 3+6 =2W
5A
2W 7W
1+4 = 5W
3A
3A
Þ 5´2 = 10 V
5W
7W
+ 
Fig. 2.
Fig. 3.
The voltage sources 10 V and 5 V in series are combined to form a single source as shown in Fig. 4. Let us convert the 5 V source in series with the 2 W resistance into an equivalent current source in parallel with 2 W resistance as shown in Fig. 5. 2W Io 10  5 =5V
+ 
3A
Fig. 4.
5W
7W
Io
Þ
5 2 = 2.5 A
2W
3A
Fig. 5.
5W
7W
Chapter 2  Network Theorems for DC and AC Circuits
2. 49
The current sources in parallel in Fig. 5 can be combined to form a single source as shown in Fig. 6. Also, the resistances 2 W and 5 W can be combined to form a single resistance.
Io 3 + 2.5 = 5.5 A
With reference to Fig. 6, by the current division rule, I o = 5.5 #
10 10 7 7 = 5.5 # = 5.5 # 10 10 + 7 59 10 + 7 # 7 7 7
2´5 2+5 10 = W 7
7W
Fig. 6.
= 0.9322 A
2.6
Network Theorems
Theorems are useful tools for analysing circuits with less effort. They are derived from fundamental laws and concepts. A given circuit can be analysed by different methods, namely, KCL/KVL, mesh/node method, theorems, etc. In most cases, the analysis of circuits using theorems is much easier as compared to other methods. Remember that theorems do not always simplify the task of analysis, sometimes it may become more tough than other methods.
2.6.1 Thevenin’s and Norton’s Theorems Thevenin’s theorem will be useful to find the response of an element in a circuit by replacing the complicated part of the circuit by a simple equivalent voltage source. Similarly, Norton’s theorem will be useful to find the response of an element in a circuit by replacing the complicated part of the circuit by a simple equivalent current source. Consider a load impedance Z L connected to two terminals A and B of a circuit represented as a box in Fig. 2.45(a). Using Thevenin’s theorem, the circuit can be replaced with a voltage source in series with an impedance as shown in Fig. 2.45(b). Using Norton’s theorem, the circuit can be replaced with a current source in parallel with an impedance as shown in Fig. 2.45(c). Z th
+
A
Vth
Þ Circuit with sources and impedances
A
ZL
~

Fig. b : Thevenin’s equivalent.
ZL
B
B A
Þ In
Fig. a : Original circuit.
~
Zn
ZL
Fig. c : Norton’s equivalent. B
Fig. 2.45 : Thevenin’s and Norton’s equivalent of a circuit.
Circuit Analysis
2. 50
These theorems can also be used to analyse a part of a circuit by replacing the complicated part of the circuit with a simple equivalent circuit. Consider two parts of a circuit N1 and N2 connected through resistanceless wires as shown in Fig. 2.46(a). Now, one part of the circuit can be replaced with a simple equivalent circuit using Thevenin’s/Norton’s theorem for the analysis of the other part of the circuit. Using Thevenin’s theorem, the circuit N1 is replaced with a voltage source in series with an impedance as shown in Fig. 2.46(b). Using Norton’s theorem, the circuit N1 is replaced with a current source in parallel with an impedance as shown in Fig. 2.46(c). Z th
A
+ Vth
Circuit N2
~
_
Þ
B
Fig. b : Thevenin’s equivalent.
A Circuit N2
Circuit N1 B
Þ
A
Fig. a : Original circuit. In
~
Circuit N2
Zn
B
Fig. c : Norton’s equivalent. Fig. 2.46 : Thevenin’s and Norton’s equivalent of a circuit.
Thevenin’s Theorem Thevenin’s theorem states that a circuit with two terminals can be replaced with an equivalent circuit, consisting of a voltage source in series with a resistance (or impedance). The voltage source is called Thevenin’s voltage source and its value is given by the voltage across the two open terminals of the circuit. The series resistance (or impedance) is called Thevenin’s resistance (or impedance) and it is given by looking back resistance (or impedance) at the two open terminals of the network. The looking back resistance (or impedance) is the resistance (or impedance) measured at the two open terminals of a circuit after replacing all the independent sources with zero value sources. Rth A A Circuit with dc sources and resistance
A
Þ
Circuit with dc sources and resistances
Vth +
B
+ Vth _ B
A Circuit with zero value sources and resistances B
Rth
B
Fig. a : Original circuit.
Fig. d : To find Fig. b : Thevenin’s Fig. c : To find Thevenin’s voltage. Thevenin’s resistance. equivalent. Fig. 2.47 : Thevenin’s equivalent of a DC circuit.
Chapter 2  Network Theorems for DC and AC Circuits
2. 51
A A
A
Zth
Circuit with ac sources and impedances
Circuit with ac sources and impedances
+ Vth
Þ
~

A
+
Circuit with zero value sources and impedance
Vth
_
B Z th
B
B B
Fig. a : Original Circuit.
Fig. b :Thevenin’s equivalent.
Fig. c : To find Thevenin’s voltage.
Fig. d : To find Thevenin’s impedance.
Fig. 2.48 : Thevenin’s equivalent of an AC circuit.
In order to calculate Thevenin’s resistance (or impedance), all the sources are replaced with zero value sources and the circuit is reduced to a single equivalent resistance (or impedance) with respect to two open terminals. The zero value sources are represented by their internal resistance (or impedance). For an ideal voltage source, the internal resistance (or impedance) is zero and so it is replaced with a short circuit. For an ideal current source, the internal resistance (or impedance) is infinite and so it is replaced with an open circuit.
Norton’s Theorem Norton’s theorem states that a circuit with two terminals can be replaced with an equivalent circuit, consisting of a current source in parallel with a resistance (or impedance). The current source is called Norton’s current source and its value is given by the current flowing when the two terminals of the circuit are shorted. The parallel resistance (or impedance) is called Norton’s resistance (or impedance) and it is given by looking back resistance (or impedance) at the two terminals of the circuit. The looking back resistance (or impedance) is the resistance (or impedance) measured at the two open terminals of a circuit after replacing all the independent sources by zero value sources. A A
A Circuit with dc sources and resistances
Þ
In
Circuit with dc sources and resistances
Rn
A
In
Circuit with zero value sources and resistances
B
B
B
Rn
B
Fig. b : Norton’s Fig. d : To find Fig. c : To find equivalent. Norton’s resistance. Norton’s current. Fig. 2.49 : Norton’s equivalent of a DC circuit.
Fig. a : Original circuit.
A A Circuit with ac sources and impedances
A
Þ
In
~
Circuit with ac sources and impedances
Zn
B
A In
Circuit with zero value sources and impedance
B
B
Zn
B
Fig. a : Original Circuit.
Fig. b : Norton’s equivalent.
Fig. c : To find Norton’s current.
Fig. d : To find Norton’s impedance.
Fig. 2.50 : Norton’s equivalent of an AC circuit.
Circuit Analysis
2. 52
In order to calculate Norton’s resistance (or impedance), all the sources are replaced by zero value sources and the circuit is reduced to a single equivalent resistance (or impedance) with respect to two open terminals. The zero value sources are represented by their internal resistance (or impedance). For an ideal voltage source, the internal resistance (or impedance) is zero and so it is replaced with a short circuit. For an ideal current source, the internal resistance (or impedance) is infinite and so it is replaced with an open circuit. Relation Between Thevenin’s and Norton’s Equivalents Consider Thevenin’s equivalent of a given circuit as shown in Fig. 2.51. Rth A A Vth +
Þ
Circuit N
B B
Fig. b : Thevenin’s equivalent.
Fig. a : Original circuit.
Fig. 2.51 : A circuit and its Thevenin’s equivalent.
Let us find Norton’s equivalent of the circuit N from its Thevenin’s equivalent. To find Norton’s current In, the terminals A and B are shortcircuited as shown in Fig. 2.52(a). Now, In is the current flowing through the short circuit. By Ohm’s law, we get, In = Vth / Rth. To find Norton’s resistance, the voltage source Vth is replaced with a short circuit as shown in Fig. 2.52(b). With reference to Fig. 2.52(b), we can say that Norton’s resistance Rn is the same as that of Thevenin’s resistance Rth. Norton’s equivalent of the circuit N is shown in Fig. 2.52(c). Rth
Rth A
Vth +E
In a
A
Vth R th
B
Fig. a : To find Norton’s current.
SC
A
In a
B Rn = Rth
Fig. b : To find Norton’s resistance.
Vth R th
Rn = Rth
B
Fig. c : Norton’s equivalent.
Fig. 2.52 : Norton’s equivalent of circuit N.
Norton’s equivalent of a circuit can also be directly obtained from its Thevenin’s equivalent (or vice versa) using source transformation technique as shown in Fig. 2.53. In fact, “Thevenin’s equivalent is the voltage source model and Norton’s equivalent is the current source model of a circuit”.
Chapter 2  Network Theorems for DC and AC Circuits
2. 53
From the above discussion it is evident that R th = R n (or Z th = Z n) and also that Thevenin’s resistance (or impedance) is given by the ratio of Thevenin’s voltage and Norton’s current. ` R th = R n =
Vth In
.....(2.59)
Z th = Z n = Vth In
.....(2.60)
Equations (2.59) and (2.60) can be used to determine the looking back resistance (or impedance) from the knowledge of open circuit voltage (Vth ) and short circuit current (In ). Rth = Rn A
A
Vth = InRn +
In =
Þ
Þ

Vth
Rn = Rth
R th
B
B
A
A
Zth = Zn
+
Þ
Vth = In Z n
Þ
~
In =
_
Vth Zth
Zn = Zth
~
B
B
Fig. 2.53 : Conversion of Thevenin’s equivalent to Norton’s equivalent (or vice versa) using source transformation technique. 5A
EXAMPLE 2.16
A
Determine Thevenin’s and Norton’s equivalents of the circuit shown in Fig. 1 with respect to terminals A and B.
12 A
12
4
3A
SOLUTION B
To find Thevenin’s voltage Vth
Fig. 1.
Thevenin’s voltage Vth is the voltage across terminals A and
B as shown in Fig. 2. The polarity of Vth is assumed such that terminalA is positive and terminalB is negative. 5A
5A A
4W
(4 ´ 5) V 12 A
12
4
3A
Vth
12 A
12 W
I = 5A
_
Vth + _ 4´3 = 12 V
_ B
Fig. 2.
A +
+
+
_ B
Fig. 3.
The 3 A current source in parallel with the 4 W resistance is converted into a voltage source in series
Circuit Analysis
2. 54
with the 4 W resistance as shown in Fig. 3. Now, the 5 A source is in series with the 4 W resistance and 12 V source. By KVL, we can write, Vth = (4 ´ 5) + 12 = 32 V To find Thevenin’s resistance Rth (and Norton’s resistance Rn) The current sources are replaced with an open circuit as shown in Fig. 4. With reference to Fig. 5, Thevenin’s resistance, Rth = 4 W \ Rth = Rn = 4 W OC A
12 W
OC
4W
A
OC
4W
12 W
Þ B
B Rth
Fig. 4.
Rth
Fig. 5.
To find Norton’s current In The terminals A and B are shorted as shown in Fig. 6. Now, the 4 W resistance is shortcircuited and so no current will flow through it. Hence, the 4 W resistance is removed and the circuit is redrawn as shown in Fig. 7. With reference to Fig. 7, by KCL at nodeA, we can say that the current through the short circuit is 5 + 3 = 8 A. \ In = 8 A 5A
5A A
A 7A
I=0 12 A
12 W
4W
3A
In
Þ
12 W
12 A
3A
In = 5 + 3 = 8 A
7A (7 + 5) A
5A
B
Fig. 6.
Fig. 7.
Thevenin’s and Norton’s equivalent Rth = 4 A
Vth = 32 V +E
A
In = 8 A +E
B
Fig. 8 : Thevenin’s equivalent.
Rn = 4
B
Fig. 9 : Norton’s equivalent.
3A B 8A
Chapter 2  Network Theorems for DC and AC Circuits
2. 55
EXAMPLE 2.17 +
Find the current through the 10 W resistance of the circuit shown in Fig. 1 using Thevenin’s theorem. Confirm the result by mesh analysis.
8
20 V
E + 12 V
E 2
10
5
SOLUTION Let us remove the 10 W resistance and mark the resulting open terminals as A and B as shown in Fig. 2.
Fig. 1.
Now, Thevenin’s voltage is the voltage measured across A and B and Thevenin’s resistance is the resistance measured between A and B. The polarity of Vth is assumed such that terminalA is at a higher potential than terminalB.
+
E + 12 V
8
20 V E 2
Vth
5
To find Thevenin’s voltage Vth
_ B
With reference to Fig. 3, by Ohm’s law, we get, I =
8
With reference to Fig. 3, by KVL, we can write,
⇒
Rth
Fig. 2.
20 = 2.8571 A 5+2
Vth= 2I + 12
A +
Vth = 2 ´ 2.8571 + 12 = 17.7142 V
+ + E
2
2I E
5
Vth _
I
The voltage sources are replaced with a short circuit as shown in Fig. 4.
B
In Fig. 4, the 5 W and 2 W resistances are in parallel and the parallel combination is in series with the 8 W resistance.
Fig. 3.
` R th = b 5   , 2 l + 8 = 5 # 2 + 8 = 9.4286 Ω 5+2 Thevenin’s equivalent at AB
A +
No voltage
20 V
To find Thevenin’s resistance Rth
12 V E +
SC A 8 SC 2
Rth= 9.4286 A 5
B Vth=17.7142 V +E
Rth
Fig. 4. B
Fig. 5 : Thevenin’s equivalent. A
To find current through 10 W resistance The 10 W resistance is connected to terminals A and B as shown in Fig. 6. Let, IL be the current through the 10 W resistance.
9.4286
+ E 17.7142 V
IL 10
With reference to Fig. 6, by Ohm’s law, we get, IL =
17.7142 = 0.9118 A 9.4286 + 10
B
Fig. 6.
Circuit Analysis
2. 56
CrossCheck by Mesh Analysis Let us assume mesh currents as shown in Fig. 7. The mesh basis matrix equation is,
>
5+2 −2 − 2 2 + 8 + 10
> −2
7 −2 20
∆ =
H
I > I12
H
H > I1 H 2 I
> 12 H 20
=
> 12 H 20
=
12 V E +
8 +
A IL
20 V E 2
10
5
7 −2 = 7 # 20 − (− 2) 2 = 136 − 2 20
I1
I2 B
Fig. 7.
7 20 ∆2 = = 7 # 12 − (− 2 # 20) = 124 − 2 12
` I2 =
∆2 = 124 = 0.9118 A ∆ 136
EXAMPLE 2.18
10
20
Find Thevenin’s and Norton’s equivalents of the circuit shown in Fig. 1 with respect to terminals A and B. A
SOLUTION
10 V +E
+ E
50 V
B
To find Thevenin’s voltage Vth With reference to Fig. 2, in the closed path DACBD, by KVL we can write, 10I + 20I + 10 = 50
Fig. 1.
⇒ 30I = 50 – 10
` I = 50 − 10 = 1.3333 A 30
C
20
I _
With reference to Fig. 2, in the path DABD, we get,
10
A _
20I +
I
A+ 10 V +E
10I + Vth = 50 ⇒ Vth = 50 – 10 I
B
_
+ E
Vth
\ Vth = 50 – 10 ´ 1.3333 = 36.667 V I
To find Thevenin’s resistance Rth
B
The voltage sources are replaced with a short circuit as shown in Fig. 3. With reference to Fig. 4, R th = 20   , 10 = 20 # 10 = 6.6667 Ω 20 + 10 10 W
20 W
A
A SC
SC
Þ
20 W
10 W
B Rth
Rth B
Fig. 3.
D
10I +
Fig. 4.
Fig. 2.
I
50 V
Chapter 2  Network Theorems for DC and AC Circuits
2. 57
Thevenin’s and Norton’s equivalent Rth = 6.6667
A A
In = 5.5 A
Vth = 36.667 V +E
Rn = 6.6667
B B
Fig. 5 : Thevenin’s equivalent.
Fig. 6 : Norton’s equivalent.
Using source transformation technique, Norton’s equivalent is obtained from Thevenin’s equivalent as shown in Fig. 5. In =
Vth = 36.667 = 5.5 A R th 6.6667
Rn = R th = 6.6667 Ω 10
20
Alternatively, Norton’s current can be directly determined by shorting the terminals A and B and measuring the current through the short.
A 10 V +E
In
I1
With reference to the circuit shown in Fig. 7, we can write,
+ E
I2
50 V
B
Fig. 7.
In = I1 + I 2 = 10 + 50 = 5.5 A 20 10
EXAMPLE 2.19
(AU May’15, 16 Marks) 3
Obtain the Thevenin and Norton equivalent circuits for the active network shown in Fig. 1.
A 3
6 E 10 +
20 V +E
V B
SOLUTION
Fig. 1.
To find Thevenin’s voltage Vth 3
With reference to Fig. 2, by KVL we can write, C
E
3I + 6I = 20 + 10
⇒
9I = 30 ⇒
I = 30 = 10 A 9 3
With reference to Fig. 2, we get, Vth + 10 = 6I
⇒
Vth = 6I  10 = 6 # 10 − 10 = 10 V 3
3I C 20 V +E
3
6I E I
No voltage 6
A + Vth
E 10 +
V
Fig. 2.
_ B
Circuit Analysis
2. 58 To find Thevenin’s resistance Rth
3 A
The voltage sources are replaced with a short circuit as shown in Fig. 3. R th = 3 # 6 + 3 = 5 Ω 3+6
6
3 SC
SC
Rth B
Fig. 3.
Thevenin’s and Norton’s equivalent Rth = 5 A
A
In = 2A
Vth = 10 V +E
Rn = 5
B
B
Fig. 4 : Thevenin’s equivalent.
Fig. 5 : Norton’s equivalent.
Using source transformation technique, Norton’s equivalent is obtained from Thevenin’s equivalent as shown in Fig. 4. In =
Vth = 10 = 2 A R th 5
R n = R th = 5 Ω
EXAMPLE 2.20
IL
10
Using Thevenin’s theorem, find the current IL in the circuit shown in Fig. 1.
+ 10 V E
+ E 4V
SOLUTION
3
Let us remove the 10 W resistance and mark the resulting open terminals as A and B as shown in Fig. 2.
3
2
1
Fig. 1.
Now, we have to determine Thevenin’s equivalent of the circuit shown in Fig. 2, with respect to terminals A and
Rth
B. Let us assume Vth as shown in Fig. 2 with terminalA as positive and terminalB as negative.
A + + E 10 V
To find Thevenin’s voltage Vth In Fig. 3, by voltage division rule, we can write, Va = 10 # Vc = 4 #
3
\ Vth = Va – Vc = 6 – 3 = 3 V
3 1
Fig. 2.
3 = 3V 3+1
Vth + Vc = Va
+ E 4V
2
3 = 6V 3+2
With reference to Fig. 3, using KVL in the path ABCA, we can write,
B E
A + 10 V +E
I1 _
2
B E
Vth
Vc _
+ E 4V
I2
+
+ 3 Va _
3
_ Vd
Vb +
1
+ C
Fig. 3.
Chapter 2  Network Theorems for DC and AC Circuits
2. 59
To find Thevenin’s resistance Rth The voltage sources are replaced with a short circuit as shown in Fig. 4. With reference to Fig. 5, we get, R th = b 3   , 2 l + b 3   , 1 l
= 3 # 2 + 3 # 1 = 1.95 Ω 3+2 3+1 Rth A
Rth
B A
SC
B
SC
Þ
3W
3W 2W
3W
3W
1W 1W
2W
Fig. 4.
Fig. 5.
Thevenin’s equivalent at AB Rth=1.95 A
Vth=3 V +E
B
Fig. 6 : Thevenin’s equivalent. A 1.95
To find IL Connect the 10 W resistance between terminals A and B as shown in Fig. 7.
+ E
3V
IL 10
With reference to Fig. 7, by Ohm’s law, IL =
3 = 0.251 A 1.95 + 10
B
Fig. 7.
(AU Dec’14, 16 Marks)
EXAMPLE 2.21 Using Thevenin’s theorem, find the current IL,
1
9V + E
50 V + E
IL 20
through the 20 W resistor shown in Fig. 1.
SOLUTION Let us remove the 20 W resistance and mark the resulting open terminals as A and B as shown in Fig. 2. Now, we have to determine Thevenin’s equivalent of the circuit shown in Fig. 2, with respect to terminals A and B. Let us assume Vth as shown in Fig. 2 with terminalA as positive and terminalB as negative.
20 V +E
10
5
Fig. 1.
+ 10 V E
2
Circuit Analysis
2. 60 9V + E
1
9V + E
1
Rth 50 V + E
B
50 V + E
A
+
+ 5
10
20 V +E
A
B
E Vth+
EV + th
E
2
10 V
20 V +E
+ 10 V E
20 V 10 E
+ 5
E
10 V
2
Fig. 3.
Fig. 2. To find Thevenin’s voltage Vth With reference to Fig. 3, using KVL, we can write, 20 + Vth = 50 + 10 ∴ Vth = 50 + 10  20 = 40 V To find Thevenin’s resistance Rth
The voltage sources are replaced with a short circuit as shown in Fig. 5. With reference to Fig. 6, we get, Rth = 0 W 1W
1W
SC
A SC
B
A Rth
SC
5W
10 W
A
B
SC
2W
Þ
Rth Rth
Þ Rth = 0 W B
Fig. 4.
Fig. 6.
Fig. 5.
Thevenin’s equivalent at AB A
Rth = 0
+
Vth=40V E
B
Fig. 7 : Thevenin’s equivalent To find IL current through 20W Connect the 20 W resistance between terminals A and B as shown in Fig. 8. With reference to Fig. 8, by Ohm’s law,
A IL +
Vth=40V E
20
IL = 40 = 2 A 20
B
Fig. 8.
Chapter 2  Network Theorems for DC and AC Circuits
CrossCheck
+
E
+ V E 1
With reference to Fig. 9, by KVL
IS1=1A
+
20 + V20 = 50 + 10
+ 20 V E
20
50 V
E
20 =2A 10 +
E
I20=2A
+ +
10
20 V E
10 V
+
+ 5
10 =5A 2
IS2=8A
10 =2A 5
V20=40V
10 V
2
10 V
E
E
IS1=1A
V = 20 = 40 = 2 A 20 20
B
A
we get,
` I20
9V
I1=1A 1
∴ V20 = 60  20 = 40 V
2. 61
IS2=8A
E
I2=1A
D
C
5A
Fig. 9.
By KVL , V1 + 9 + V20 = 50 ∴ V1 = 50  9  V20 = 50  9  40 = 1 V ` I1 =
V1 = 1 = 1A 1 1
By KCL, at nodeA, IS1 + I 20 = I1 + 2
⇒
IS1 = I1 + 2 − I 20 = 1 + 2 − 2 = 1 A
⇒
IS2 = I 20 + 5 + 2 − I1 = 2 + 5 + 2 − 1 = 8 A
⇒
I 2 = 2 − IS1 = 2 − 1 = 1 A
⇒
I 2 = IS2 − 2 − 5 = 8 − 2 − 5 = 1 A
By KCL, at nodeB, IS2 + I1 = I 20 + 5 + 2 By KCL, at nodeC, I 2 + IS1 = 2 By KCL, at nodeD, I 2 + 2 + 5 = IS2
EXAMPLE 2.22
(AU Dec’15, 16 Marks)
SOLUTION
1
3
Find Thevenin’s equivalent of the circuit shown in Fig. 1 with respect to terminals A and B.
A 2
10 V +E
5A
2
5A E + 10 V
To find Thevenin’s voltage Vth
B
Fig. 1.
Let us convert the 10V source in series with the 3 W resistance to an equivalent current source in parallel with 3 W resistance as shown in Fig. 2.
Also, the 5 A current source in parallel with the 1 W resistance is converted into an equivalent voltage source in series with the 1 W resistance as shown in Fig. 3, and the modified circuit is shown in Fig. 4.
Circuit Analysis
2. 62
1W
5V
1W
3W
+
5A
10 3 = 3.3333 A
2W
3.3333 A
Þ
+ 10 V 
3W
ß
A
3W
2W
5A
+ 10 V
1W +
B
5 ´ 1 = 5V
Fig. 2 : Conversion of voltage source to current source.
Fig. 3 : Conversion of current source to voltage source.
Fig. 4 : Modified circuit. 5V
The current sources in parallel in Fig. 4 can be combined to form a single source as shown in Fig. 5. Also, the resistances 3 W and 2 W can be combined to form a single resistance.
1W A
5 + 3.3333 = 8.3333 A
+
The current source in Fig. 5 is converted into a voltage source in Fig. 6.
2W
3´2 3+2 = 1.2 W
+ 10 V
B
With reference to Fig. 6, using KVL, we can write,
Fig. 5.
1.2I + I + 2I = 10 + 5 + 10 ⇒ 4.2I = 25 5V
` I = 25 = 5.9524 A 4.2 1.2 W
Also, Vth + 10 = 2I \ Vth = 2I – 10
1.2I + + 
= 2 ´ 5.9524 – 10 = 1.9048 V
1W
+
_
+
_ I
A +
+ 2I _
I
2W Vth + 10 V
8.3333 ´ 1.2 = 10 V
_ B
To find Thevenin’s resistance Rth
Fig. 6.
In the given circuit, the voltage sources are replaced with a short circuit and the current sources are replaced with an open circuit as shown in Fig. 7. Thevenin’s resistance Rth is obtained by using network reduction technique as shown below: With reference to Fig. 11, we get, Rth = 1.0476 W 3W
1W
3W
1W A
A OC SC
2W
Þ
2W
OC
2W
2W
SC B Rth
B Rth
Fig. 7.
Fig. 8. ß 1W A
2.2 ´ 2 2.2 + 2 = 1.0476 W
1.2 + 1 = 2.2 W
2W
3´2 3+2 = 1.2 W
2W
B Rth
Þ B Rth
Fig. 11.
A
Þ
A
Fig. 10.
B Rth
Fig. 9.
Chapter 2  Network Theorems for DC and AC Circuits
2. 63
Thevenin’s equivalent at AB Rth=1.0476 A
Vth=1.9048 V
+ E
B
Fig. 12 : Thevenin’s equivalent.
Alternate Method to Find Vth The voltage sources in Fig. 1 are converted into current sources as shown in Fig. 13. The node basis matrix equation is formed using the circuit of Fig. 13, as shown below. Now, Vth = V2 R V R V R S1 1 1 1 W S V1 W S 10 + 5 − 5 + + − S 3 2 1 W S 3 1 WS S WS W= S 1 1 1 S W S − + WS 1 2 1 W S V2 W S 5 − 5 S T X T X T V1 1.8333 − 1 3.3333 > − 1 1.5 H > V2 H = > 0 H ∆l =
V W W W W W X
1
V1
V2
A +
5A
10 A 3
5A
3
10 2 a 5A
2
2
Vth
_ B
Fig. 13.
1.8333 − 1 = 1.8333 # 1.5 − (− 1) 2 = 1.74995 − 1 1.5
∆l2 =
1.8333 3.3333 = 0 − (− 1) # 3.3333 = 3.3333 0 −1
` Vth = V2 =
∆l 2 = 3.3333 = 1.9048 V 1.74995 ∆l
EXAMPLE 2.23
5A
Determine Thevenin’s and Norton’s equivalents at PQ for the circuit shown in Fig. 1.
2A
SOLUTION
2V
4
Thevenin’s and Norton’s equivalents can be obtained by using source transformation techniques as shown below:
E+
Q
4
The 5 V source in series with the 2 W resistance is converted into a current source as shown in Fig. 2. The 2 A source in parallel with the 4 W resistance is converted into a voltage source as shown in Fig. 3. The modified circuit is shown in Fig 4.
5V
2
+E
Fig. 1. 5A
+
2W
5V
2A
ß 5 = 2.5 A 2
4W
4W
8V
+
+
2.5 A 4W 2W
+
2W
Fig. 2.
Fig. 3.
4W P
Q
ß 2 ´ 4 = 8V
2V
Fig. 4.
P
Circuit Analysis
2. 64
The seriesconnected voltage sources in Fig. 4 are combined to form a single source as shown in Fig. 5. Also, the 4 W resistances in series are represented by a single equivalent resistance. 5A
5A +
8W
10 V 2 + 8 = 10 V Q
1.25 A
ß
4 + 4 = 8W
10 = 1.25 A 8
P
+
P
Q 8W
2.5 A 2.5 A 2W
8W
Fig. 5.
Fig. 6.
2W
Fig. 7. The 10 V voltage source in series with the 8 W resistance can be converted into a current source as shown in Fig. 6. The modified circuit is shown in Fig. 7. In Fig. 7, three current sources are in parallel and they can be combined to form a single current source as shown in Fig. 8. Similarly, the resistances 8 W and 2 W in parallel are also represented by a single equivalent resistance in Fig. 8. 3.75 ´ 1.6 = 6 V 1.6 W
5 + 1.25  2.5 = 3.75 A
+
Q
P 8´2 8+2
P
Q
Fig. 9.
= 1.6 W
Fig. 8. Here, Fig. 8 is Norton’s equivalent which can be transformed into Thevenin’s equivalent shown in Fig. 9, using source transformation technique. Thevenin’s and Norton’s equivalent Rth=1.6
P
Vth=6 V +E
P
In=3.75 A
Rn=1.6
Q
Fig. 10 : Thevenin’s equivalent at PQ.
Q
Fig. 11 : Norton’s equivalent at PQ.
EXAMPLE 2.24 Using Norton’s theorem, determine the current through an ammeter connected across A and B of the circuit shown in Fig. 1. Take the resistance of the ammeter as 0.5 W.
1 A B
SOLUTION To find Norton’s current In The terminals A and B are shorted as shown in Fig. 2. The direction of Norton’s current is assumed such that it flows from terminalA to terminalB. The circuit of Fig. 2 is redrawn as shown in Fig. 3.
3
3
1
E + 12 V
Fig. 1.
Chapter 2  Network Theorems for DC and AC Circuits
2. 65
In the circuit of Fig. 3, the 3 W and 1 W resistances are in parallel and so they are represented as a single equivalent resistance as shown in Fig. 4.
1
3 A
In Fig. 4, the two equal resistances are in series with the 12 V source and so the source voltage 12 V divides equally between them. Since the voltage across the parallel resistances 1 W and 3 W is 6 V, the voltage across each resistance is also 6 V. By using Ohm’s law, the current through each resistance is calculated and marked in Fig. 3.
In B 3
With reference to Fig. 3, at node A using KCL, we can write,
1
Fig. 2.
E + 12 V
In + 2 = 6 ∴ In = 6 – 2 = 4 A 6 = 6A 1
6 = 2A A 3
1W +
6 = 2A 3
_ 6V
In = 4A
+
_ 6V
6 = 6A 1W 1
3W _ 6V
B
+
3 ´1 = 0.75 W 3 +1
3 ´1 = 0.75 W 3 +1 _ + 12 = 6V 2
3W +
+
_ 12 = 6V 2
_ 6V + 12 V
Fig. 4.
+ 12 V
Fig. 3. To find Norton’s resistance Rn The voltage source is replaced with a short circuit as shown in Fig. 5. Norton’s resistance is determined using network reduction techniques as shown below: A 1W
3W
0.75 W
Þ
B
Þ
Rn
Þ 0.75 W
1W 3W
1W
SC
Rn B
Fig. 5.
Fig. 6.
With reference to Fig. 8, we get, Norton’s resistance, Rn = 1.5 W Norton’s equivalent A
In=4 A
Rn=1.5
B
Fig. 9 : Norton’s equivalent at AB.
Rn
B 1´ 3 = 0.75 W 1+ 3
Fig. 7.
0.75 + 0.75 = 1.5 W
A 1W
A
3W
A
3W
Rn B
Fig. 8.
Circuit Analysis
2. 66 To find current through ammeter
Connect the ammeter across terminals A and B as shown in Fig. 10. The ammeter can be represented by its internal resistance as shown in Fig. 11. In
A
4A
Þ
A
1.5 W
4A
I1
I2
1.5 W
0.5 W
B
Fig. 11.
Fig. 10.
Let, I2 be the current through the ammeter. Now, by current division rule, Current through ammeter, I 2 = 4 #
1.5 = 3A 1.5 + 0.5
EXAMPLE 2.25
4
5
12
A
In the circuit shown in Fig. 1, determine the power delivered to the 15 W resistance using Norton’s theorem.
SOLUTION
12
120 V
Let us remove the 15 W resistance and determine Norton’s equivalent with respect to terminals A and B. Norton’s equivalent of the circuit of Fig. 2 is obtained by source transformation technique as shown below:
120 V
4W
5W
12 W
B
12 W
Þ
15
Fig. 1.
A
30 W
12 W
30
120 4 = 30 A
4W
5W
30 W
12 W
B
B
Fig. 2.
Fig. 3.
5W
12 W
12 W
A
5W
A
30 A
3W 4 ´ 12 = 3W 4 + 12
Þ
30 W
30 W + 
30 ´ 3 = 90 V
B
B
Fig. 4.
A
Fig. 5.
Chapter 2  Network Theorems for DC and AC Circuits 5W
2. 67 5W
A
3 + 12 = 15 W
Þ
30 W +
90 15 = 6A
15 W
A
30 W
90 V 
B
B
Fig. 6.
Fig. 7.
5W
6A
10 W
A
15 ´ 30 15 + 30 = 10 W
Þ
+ 
5W
A
6 ´ 10 = 60 V
B
B
Fig. 8. 10 + 5 = 15 W
Fig. 9.
A
A
Þ
60 V +
60 15 = 4A
15 W
B
B
Fig. 10.
Fig. 11.
Here, Fig. 11 is Norton’s equivalent with respect to terminals AB of the circuit of Fig. 2. Norton’s equivalent A
In=4 A
Rn=15
B
A
Fig. 12 : Norton’s equivalent.
2A
2A
15
15
To find current through 15 W resistance Connect the 15 W resistance to terminals AB of Norton’s equivalent as shown in Fig. 13. Now, the current 4 A divides equally between the parallel resistances.
4A
B
Fig. 13. ` Current through the 15 Ω resistance = 4 = 2 A 2 Power through the 15 W resistance = Current2 ´ Resistance = 22 ´ 15 = 60 W
Circuit Analysis
2. 68
R
I
EXAMPLE 2.26
_
+
In the network shown in Fig. 1, the resistance R is variable from zero to infinity. The current I through R can be expressed as I = a + bV where, V is the voltage across R with polarity as shown in Fig. 1 and a and b are constants. Determine a and b.
V 2
2
2 2
10 V
10 V
10 V
SOLUTION Fig. 1.
Case i : Let R = 0 (zero)
I=0
When R = 0, the resistance can be represented as a short circuit as shown in Fig. 2.
SC
+
Given that, I = a + bV
_ V=0
2
2
2
Since, R = 0, V is also equal to zero.
2
\ a=I
10 V
10 V
The voltage sources in the circuit of Fig. 2 are converted into current sources as shown in Fig. 3 and the modified circuit is shown in Fig. 4.
10 V
Fig. 2. I
A 2W 10 = 5A 2
Þ
2W
2W
2W
5A
5A
2W
5A
2W
10 V B
Fig. 4.
Fig. 3.
The current sources in parallel in Fig. 4 are combined to form a single equivalent source as shown in Fig. 5. Similarly, the resistances in parallel are combined to form a single equivalent resistance. I
I + 1W
5A
1W
1W
10 A

I 
1W
I + I
Þ 5 ´ 1 = 5V
+ 
+  10 ´ 1 = 10 V
Fig. 6.
Fig. 5.
The current sources of Fig. 5, are converted into equivalent voltage sources as shown in Fig. 6. With reference to Fig. 6, by KVL, we can write, I=0
5 + I + I = 10 5 = 2.5 A ∴ 2I = 10 –5 ⇒ 2I = 5 ⇒ I = 2
B _ 2
Since, I = 2.5, a = 2.5 Case ii : Let R = ¥ (infinity) When R = ¥, the resistance can be represented as an open circuit as shown in Fig. 7.
+
2I1 +
E _
2I1 2 _ I1
_
+ 2I2 _
V 2
+
A 10 V
OC
2I2
F
D I2
10 V C
C
Fig. 7.
2
+
10 V
Chapter 2  Network Theorems for DC and AC Circuits
2. 69
Given that, I = a + bV Since, R = ¥, I is equal to zero. b = −a V With reference to Fig. 7, we can write the following KVL equations. ∴ a + bV = 0
⇒
In the closed path ABCA, using KVL, we can write, 2I1 + 2I1 = 10 I1 = 10 = 2.5 A 4 In the closed path DEFCD, we can write,
⇒
4I1 = 10
10 = 10 + 2I2 + 2I2 \ 4I2 = 10 – 10
⇒
4I2 = 0
⇒
I2 = 0
In the path BEDCB, V + 2I2 + 10 = 2I1 \ V = 2I1 – 2I2 – 10 = 2 ´ 2.5 – 2 ´ 0 – 10 = –5 V Since, V = − 5, b = − a = − 2.5 = 0.5 V −5
RESULT a = 2.5
;
b = 0.5
\ I = a + bV = 2.5 + 0.5 V B
EXAMPLE 2.27
500
2
Find the current through the galvanometer shown in Fig. 1, using Thevenin’s theorem.
6
A
SOLUTION
C G
Let us remove the galvanometer and denote the resultant open terminals as P and Q. The source is represented as an ideal source with its internal resistance (3.2 W) connected external to the source in series as shown in Fig. 1.
8
4 D
Let us represent the circuit of Fig. 2 by Thevenin’s equivalent with respect to terminals P and Q. The polarity of Thevenin’s voltage is assumed as shown in Fig. 2, with terminal P as positive.
+E
100 V, 3.2
Fig. 1. B
To find Thevenin’s voltage Vth
Since the 500 W resistance is left open, the potential at nodeP will be the same as that of nodeB. Also the nodes Q and D are at the same potential. Hence, the circuit of Fig. 3 is redrawn as shown in Fig. 4. Now, Vth is the voltage across B and D. Let Is be the current supplied by the source and this current divides into I1 and I2 between two parallel paths as shown in Fig. 4. The series resistances and their parallel combinations are represented as a single resistance in Fig. 5.
500
2
The circuit of Fig. 2 is redrawn as shown in Fig. 3.
6
A
C + P Vth E QRth
8 3.2
D +E
100 V
Fig. 2.
4
Circuit Analysis
2. 70 2W
6W
B
I2
2W
6W
B +
500 W Vth
+ P Vth  Q
8W
Þ 4W
A
A
C
I1
_
8W D
100 V
3.2 W
Is
+
100 V
3.2 W
+
Fig. 3.
Fig. 4. (2 + 6) ´ (8 + 4) 8 ´ 12 = = 4.8 W (2 + 6) + (8 + 4) 8 + 12
With reference to Fig. 5, by Ohm’s law, we can write,
4.8 W
100 = 12.5 A 3.2 + 4.8
Is =
4W C
D
Is
+
With reference to Fig. 4, by current division rule, we get, I1 = Is #
100 V
3.2 W
Fig. 5.
(2 + 6) = 12.5 # 8 = 5A (8 + 4) + (2 + 6) 12 + 8
I2 +
` I 2 = Is − I1 = 12.5 − 5 = 7.5 A
2 2I2
B E
+
Vth
With reference to Fig. 6, by KVL, we can write, 2I2 + Vth = 8I1 A
+ I1
\ Vth = 8I1 – 2I2
8I1
E
E
8
D
Fig. 6.
= 8 ´ 5 – 2 ´ 7.5 = 25 V To find Thevenin’s resistance Rth
The ideal voltage source of Fig. 2 is replaced with a short circuit as shown in Fig. 7. The network of Fig. 7 is redrawn as shown in Fig. 8, and it is reduced to a single equivalent resistance with respect to PQ. The stepbystep reduction of the network is shown in Figs 9 to 14. B 500 W
B
P
6W
500 W
2W
2W
A
6W
C P
Þ 8W
Q
Rth
A
C 3.2 W
4W 8W
4W
Rth
D 3.2 W
SC
Fig. 7.
D
Fig. 8.
Q
Chapter 2  Network Theorems for DC and AC Circuits R12 = R1 + R 2 +
R1 R 2 = 2 + 3.2 + 2 # 3.2 = 6 Ω R3 8
R 23 = R 2 + R3 +
R 2 R3 = 3.2 + 8 + 3.2 # 8 = 24 Ω R1 2
R31 = R3 + R1 +
R3 R1 = 8 + 2 + 8 # 2 = 15 Ω R2 3.2 500 W
1
2W
R12
500 W
1
P
R1
2. 71
P R12
6W
6W
6W
R2 R31
2
Þ
3.2 W 8W
R3
2
15 W
Rth
4W
R23
R31
24 W
Rth
4W R23
Q
3
Q
3
Fig. 9.
Fig. 10. 500 W
500 W
P
P 6´6 = 3W 6+6
Þ
15 W
15 W
3 + 3.4286 W = 6.4286 W
24 ´ 4 = 3.4286 W 24 + 4
Q
Q
Fig. 11.
Fig. 12.
500 W P
15 ´ 6.4286 15 + 6.4286 = 4.5 W
P
Þ
500 + 4.5 = 504.5 W
Rth
Rth
Q
Q
Fig. 14.
Fig. 13. With reference to Fig. 14, Thevenin’s resistance, Rth = 504.5 W Thevenin’s equivalent at PQ Rth=504.5 P
Vth=25 V
+ E
Q
Fig. 15 : Thevenin’s equivalent at PQ.
Circuit Analysis
2. 72 504.5 W
To find current through galvanometer
504.5 W P
P IG
Connect the galvanometer across PQ as shown in Fig. 16. The galvanometer has negligible
IG 25 V +
G
25 V +
Þ
SC
resistance and so it can be represented as a short circuit as shown in Fig. 17. Q
Let, IG be the current through a Galvanometer.
Q
Fig. 16.
Fig. 17.
With reference to Fig. 17, by Ohm’s law, we get, IG =
25 = 0.0496 A = 49.6 # 10 3 A = 49.6 mA 504.5
EXAMPLE 2.28
SOLUTION
IL
4W
10 W
10Ð0o A
Determine the current through ZL in the circuit of Fig. 1, using Thevenin’s theorem.
2W
~
j6 W j8 W
Let us remove the load impedance and denote the resultant open terminals as A and B as shown in Fig. 2. Now, we have to determine Thevenin’s equivalent of the circuit shown in Fig. 2.
+
~
j2 W
o
10Ð0 V

ZL
Fig. 1.
To find Thevenin’s voltage Vth Let us convert the 10 V voltage source into a current source. The modified circuit is shown in Fig. 3. With reference to Fig. 3, using KCL, we can write,
10Ð0o A = 10 A
A
~
j6 W j8 W
B
Fig. 2. Vth
+ Vth
^0.1379 − j0.1642h Vth = 10.7692 − j1.1538
` Vth
10Ð0o V =10 V

1 + 1 10 m Vth = 10 + 10 + j8 4 + j6 4 + j6 10 C j8
10 A
10.7692 − j1.1538 = 0.1379 − j0.1642
+
~
Vth + Vth = 10 + 10 10 + j8 4 + j6 4 + j6 c
4W
10 W
10 A 4 C j6
~
Vth
4
10
A
4 C j6 Vth
~
j8
j6 _
= 36.4201 + j34.9992 V = 50.5111Ð43.9o V
B
Fig. 3. To find Thevenin’s impedance Z th A
The current source is represented by an open circuit and the voltage source is represented by a short circuit as shown in Fig. 4.
4 10 j6
OC
With reference to Fig. 4,
j8
Z th =
^10 + j8h # ^4 + j6h
10 + j8 + 4 + j6
= 4.6642Ð50o W
SC
= 3 + j3.5714 Ω
Zth
B
Fig. 4.
Chapter 2  Network Theorems for DC and AC Circuits
2. 73
Thevenin’s equivalent at AB Zth
A Vth = 50 .5111Ð43 .9oV
+
= 36.4201 + j34.9992V
Vth +
Z th = 4 .6642 Ð50o W

= 3 + j3.5714 W
B
Fig. 5 : Thevenin’s equivalent at AB.
Zth
A
To find current through ZL
IL
Connect the load impedance ZL across terminals A and B of Thevenin’s equivalent as shown in Fig. 6.
+ Vth
Now, by Ohm’s law,
2 ZL
~
_
Ej2
36.4201 + j34.9992 Vth = 3 + j3.5714 + 2 − j2 Z th + ZL = 8.6314 + j4.2872 A = 9.6375+26.4 o A
IL =
B
Fig. 6.
EXAMPLE 2.29 Find the current flowing in the 5 W resistance connected across terminals A and B of the circuit shown in Fig. 1, using Thevenin’s theorem.
+ j10 W
~
_
j20 W
20Ð0o V
SOLUTION 4W
4W
Let us remove the 5 W resistance and denote the resultant open terminals as A and B as shown in Fig. 2. Now, the circuit of Fig. 2 should be replaced with Thevenin’s equivalent at terminals A and B. The polarity of Thevenin’s voltage is assumed as shown in Fig. 2, with terminalA as positive.
5W A
B
Fig. 1.
To find Thevenin’s voltage Vth
+
With reference to Fig. 3, the voltage across the series combination of –j10 W and 4 W is 20Ð0o V. Hence, by voltage division rule, Vb = 20+0 o #
j10 W
_
4 4 − j10
4W _
Fig. 2. +
~
_
+ Va _
20Ð0o V
o
20Ð0 V
Vb _
_
+
_
j10 W
+
+
Vth + Vd = Vb ` Vth = Vb − Vd = 2.7586 + j6.8966 − ^0.7692 − j3.8462h = 1.9894 + j10.7428 V = 10.9255+79.5 o V
B Zth
4 = 20 # 4 = 0.7692 − j3.8462 V 4 + j20 4 + j20
With reference to Fig. 3, by KVL, we can write,
Vth
A
With reference to Fig. 3, the voltage across the series combination of j20 W and 4 W is 20Ð0o V. Hence, by voltage division rule, Vd = 20+0 o #
20Ð0 V
4W +
= 20 # 4 = 2.7586 + j6.8966 V 4 − j10
j20 W
o
~
4W +
+ 20Ð0o V V c _
_ Vd + 4W _
Vth
Fig. 3.
j20 W
Circuit Analysis
2. 74 To find Thevenin’s impedance Z th
The voltage source 20Ð0o V in the circuit of Fig. 2 is replaced with a short circuit as shown in Fig. 4, and is
Z th determined by reducing the network of Fig. 4 to a single equivalent impedance across A and B as shown below: j10 W
j10 W
j20 W  j10 ´ 4  j10 + 4
j20 W
SC
4W
A
B
Zth
= 3.4483  j1.3793 W = 3.8462 + j0.7692 W
4W
Þ
4W
4W
j20 ´ 4 j20 + 4
Þ B
A
B
A
Fig. 5.
Fig. 4.
Fig. 6.
With reference to Fig. 6, we get, Z th = 3.4483 − j1.3793 + 3.8462 + j0.7692 = 7.2945 − j0.6101 Ω = 7.32+ − 4.8 o Ω Thevenin’s equivalent at AB Zth
A
Vth = 1.9894 + j10.7428 V = 10.9255+79.5 o V Z th = 7.2945 − j0.6101 Ω = 7.32+ − 4.8 o Ω
+ Vth
~
_
B
Fig. 7 : Thevenin’s equivalent at AB. To find current through 5 W resistance Connect the 5 W resistance across A and B of Thevenin’s equivalent as shown in Fig. 8. Let, IL be the current through 5 W resistance. Zth
Vth Z th + 5 1.9894 + j10.7428 = = 0.1182 + j0.8797 A 7.2945 − j0.6101 + 5 o = 0.8876+82.3 A
A
Now, IL =
IL
+
~
RESULT
B
Fig. 8.
Current through the 5 W resistance = 0.8876Ð82.3o A
EXAMPLE 2.30
SOLUTION Let us remove the 8 W resistance and denote the resultant open terminals as A and B as shown in Fig. 2. Now, the circuit of Fig. 2 should be replaced by Norton’s equivalent at terminals A and B.
8W
A
20Ð30o A
Determine the voltage across terminals A and B in the circuit of Fig. 1, using Norton’s theorem.
5
Vth _
B
2W
4W
j5 W
j12 W
~ Fig. 1.
Chapter 2  Network Theorems for DC and AC Circuits
2. 75
To find Norton’s current In Let us short circuit the terminals A and B in the circuit of Fig. 2 as shown in Fig. 3. The current flowing through the short circuit is Norton’s current. Let us assume the direction of Norton’s current as A to B.
2W
4W
j5 W
j12 W
20Ð30o A
20Ð30o A
A SC
B
A
~
In
2W
B
4W
~ j5 W
Fig. 2.
j12 W
Fig. 3.
With reference to Fig. 3, by current division rule, we can write, 2 + j5 = − 9.8632 + j6.26 A 2 + j5 + 4 − j12 o = 11.6821+147.6 A
Norton's current, In = 20+30 o #
To find Norton’s impedance Zn Let us replace the current source in Fig. 2, with an open circuit as shown in Fig. 4. Zn is determined by reducing the network of Fig. 4 to a single equivalent impedance as shown below: Zn
2W
Zn
A
B
A
4W
B
2W
4W
j5 W
j12 W
Þ
OC j12 W
j5 W
Fig. 4.
Fig. 5.
With reference to Fig. 5, we can write, Norton's impedance, Zn = 2 + j5 − j12 + 4 = 6 − j7 Ω = 9.2195+ − 49.4 o Ω Norton’s equivalent at AB A
In
~
Zn
B
Fig. 6 : Norton’s equivalent at AB. In = − 9.8632 + j6.26 A = 11.6821+147.6 o A Zn = 6 − j7 Ω = 9.2195+ − 49.4 o Ω
Circuit Analysis
2. 76 To find voltage across 8 W resistance Let us connect the 8 W resistance across A and B of Norton’s equivalent as shown in Fig. 7. Let, VL be the voltage across the 8 W resistance. With reference to Fig. 7, by KCL we can write, VL + VL = I n Zn 8
⇒
VL
A VL 8
VL Zn In
~
Zn
+ VL _
8
VL c 1 + 1 m = In Zn 8
− 9.8632 + j6.26 In In ` VL = = = 1 1 1 +1 ^6 − j7h 1 + 8 1 Zn + 8 Zn 8
Fig. 7.
B
= – 31.3876 + j45.2219 V = 55.0473Ð124.8o V
RESULT Voltage across terminals A and B = 55.0473Ð124.8o V
2.6.2 Superposition Theorem The superposition theorem states that the response in a circuit with multiple sources is given by the algebraic sum of responses due to individual sources acting alone. The superposition theorem is also referred to as the principle of superposition. The superposition theorem is a useful tool for analysis of linear circuits with multiple sources. A linear circuit is a circuit composed entirely of independent sources, linear dependent sources and linear elements. A circuit element is said to be linear, if the voltagecurrent relationship is linear, i.e., n a i or n = ki, where k is a constant. The responses that can be determined by the superposition theorem are listed below: i)
Current in resistance, inductance and capacitance.
ii) Voltage across resistance, inductance and capacitance. iii) Current delivered by independent voltage sources. iv) Voltage across independent current sources. v) Voltage and current of linear dependent sources. While calculating the response due to an individual source, all other sources are made inactive or replaced by zero value sources (Sometimes the term ‘killed’ is used). A zero value source is represented by its internal resistance (or impedance). “In an ideal voltage source, the internal resistance (or impedance) is zero, and in an ideal current source, the internal resistance (or impedance) is infinite”.
Chapter 2  Network Theorems for DC and AC Circuits
2. 77
Therefore, while calculating the response due to one source, all other ideal voltage sources are replaced with a short circuit (or by their internal impedance) and all other ideal current sources are replaced with an open circuit (or by their internal impedance). Procedure for Analysis Using Superposition Theorem 1.
When the internal impedances of sources are specified, represent them as an external impedance and so the sources will become ideal sources. For a voltage source, the internal impedance is represented as an impedance in series with the ideal voltage source. For a current source, the internal impedance is represented as an impedance in parallel with the ideal current source.
2.
The response is either voltage or current in the elements. The response when all the sources are acting is called the total response. If the polarity of the total voltage response or direction of the total current response are not specified in the problem, then assume a polarity for the total voltage response and direction for the total current response when all the sources are acting together.
3.
Determine the response due to each independent source by allowing one source to act at a time. While determining the response due to one source, replace all other independent ideal voltage sources by a short circuit (SC) and all other independent ideal current sources by an open circuit (OC).
4.
Denote the voltage response due to each source as Vl , Vll , Vlll ... and the current response as Il , Ill , Illl .... While determining the response due to each source, maintain the polarity of voltage response the same as that of the total response. Similarly, maintain the direction of current response the same as that of the total response.
5.
Determine the total response by taking the sum of individual responses.
Note : 1. Power cannot be directly determined from the superposition theorem. Hence, determine the power only using the total current and voltage response. 2. When all independent sources are deactivated, there will not be any current or voltage in any part of the circuit. Hence, dependent sources will not contribute to the response when all independent sources are deactivated (i.e., the response due to a dependent source acting alone will be zero). 1
EXAMPLE 2.31 Find the current through the 5 W resistor in the circuit shown in Fig. 1 using the superposition theorem.
1
10 A
1
5
Fig. 1.
20 A
Circuit Analysis
2. 78
1
SOLUTION Let IL be the current through the 5 W resistance when both the current sources are acting together as shown in Fig. 2. Let, IlL = Current through 5 W in the direction of IL when the 10 A source alone is acting. IllL = Current through 5 W in the direction of IL when the 20 A source alone is acting.
1
1 IL
10 A
5
20 A
Fig. 2.
Now, by the superposition theorem, IL = IlL + IllL To find the response IlL when the 10 A source is acting alone The 20 A current source is replaced by an open circuit as shown in Fig. 3. The circuit of Fig. 3 is redrawn as shown in Fig. 4. In Fig. 4, the 5 W resistance is in series with the 10 A source and so the current through 5 W is also 10 A. ` IlL = 10 A 1W
1W
1W
1W
1W
5W
10 A
1W
Þ
I’L OC
I¢L
5W
10 A
Fig. 3.
Fig. 4.
To find the response IllL when the 20 A source is acting alone The 10 A current source is replaced by an open circuit as shown in Fig. 5. The circuit of Fig. 5 is redrawn as shown in Fig. 6. In Fig. 6, the 5 W resistance is in series with the 20 A source and so the current through 5 W is also 20 A. ` IllL = 20 A 1W
1W
1W
1W
1W
I’’L 5W
OC
Fig. 5.
1W I’’L
Þ 20 A
5W
Fig. 6.
To find the total response IL when both the sources are acting By the superposition theorem, IL = IlL + IllL ` IL = 10 + 20 = 30 A
20 A
Chapter 2  Network Theorems for DC and AC Circuits
2. 79
CrossCheck by Node Analysis
1
With reference to Fig. 7, the node basis matrix equation is, R V R V 1 V 1 R V 2 V1 V3 S1 + 1 −1 − 1 W S V1 W S 10 W 1 W S W 1 IL S1 1 S W S 1 1 1 1 1 W S W S W 20 A 10 A 5 S − 1 1 + 1 + 5 − 1 W S V2 W = S 0 W S 1 W S W S W 1 +1W SS − −1 S 20 W 1 1 W S V3 W 1 1 0 T X T X T X V R V R V R V IL a 2 5 S10 W S 2 − 1 − 1 W S V1 W S − 1 2.2 − 1 W S V2 W = S 0 W Fig. 7. S W S W S W S20 W S − 1 − 1 2 W S V3 W T X T X T X 2 −1 −1 ∆l = − 1 2.2 − 1 = 2 # 9 2.2 # 2 − (− 1) 2 C − (− 1) # 9 − 1 # 2 − (− 1) 2 C + (− 1) # 9(− 1) 2 − (− 1) # 2.2 C −1 −1 2 = 6.8 − 3 − 3.2 = 0.6 2 10 − 1 ∆l 2 = − 1 0 − 1 = 2 # 90 − 20 # (− 1) C − 10 # 9 − 1 # 2 − (− 1) 2 C + (− 1) # 9 − 1 # 20 − 0 C − 1 20 2 = 40 + 30 + 20 = 90 V2 =
∆l 2 = 90 = 150 V ∆l 0.6
` IL =
V2 = 150 = 30 A 5 5
EXAMPLE 2.32 Using the superposition theorem, find the current through the 3 W resistance in the circuit shown in Fig. 1.
IL 10 V, + 1 E
3
+ 20 V, E 2
SOLUTION The internal resistances of the voltage sources are represented as a series resistance external to the source and the voltage sources are represented as ideal sources as shown in Fig. 2.
Fig. 1. 1
Let, IlL = Current through 3 W in the direction of IL when the10 V source alone is acting. IllL = Current through 3 W in the direction of IL when the 20 V source alone is acting.
2 IL
10 V +E
3
+ 20 V E
Now, by the superposition theorem, IL = IlL + IllL
Fig. 2.
To find the response IlL when the 10 V source is acting alone The 20 V source is replaced with a short circuit as shown in Fig. 3. Let Is1 be the current supplied by the 10 V source. In Fig. 3, at nodeA, the current Is1 divides between the parallel resistances 2 W and 3 W. The parallelconnected resistances 2 W and 3 W are combined to form a single equivalent as shown in Fig. 4.
Circuit Analysis
2. 80 1W
1W
2W
A I’L
Is1
Is1
+
+ 3W
10 V
Þ
SC

2´3 2+3 = 1.2 W
10 V 
Fig. 3.
Fig. 4.
With reference to Fig. 4, by Ohm’s law, Is1 =
10 = 4.5455 A 1 + 1.2
With reference to Fig. 3, by current division rule, IlL = Is1 #
2 = 4.5455 # 2 = 1.8182 A 2+3 2+3
To find the response IllL when the 20 V source is acting alone The 10 V source is replaced with a short circuit as shown in Fig. 5. Let Is2 be the current supplied by the 20 V source. In Fig. 5, at nodeA, the current Is2 divides between the parallel resistances 1 W and 3 W. The parallelconnected resistances 1 W and 3 W are replaced with a single equivalent as shown in Fig. 6. 1W
2W
2W
A I’’L
3W
SC
Is2
Is2 + 20 V 
Þ
Fig. 5. With reference to Fig. 6, by Ohm’s law, Is2 =
20 = 7.2727 A 2 + 0.75
With reference to Fig. 5, by current division rule, IllL = Is2 #
1 = 7.2727 # 1 = 1.8182 A 1+3 1+3
To find the response IL when both the sources are acting By the superposition theorem, IL = IlL + IllL = 1.8182 + 1.8182 = 3.6364A
+ 20 V 
1´3 1+ 3 = 0.75 W
Fig. 6.
Chapter 2  Network Theorems for DC and AC Circuits
2. 81
CrossCheck by Mesh Analysis With reference to Fig. 7, the mesh basis matrix equation is, I1 1+3 1 10 H > H = > H > 1 1 + 2 I2 10 − 20
2
1 IL + E
E
I1
10 4 1 I1 H > H = > H 1 3 I2 − 10 4 1 = 4 # 3 − 1 # 1 = 11 1 3
∆1 =
10 1 = 10 # 3 − (− 10) # 1 = 40 − 10 3
` I L = I1 =
20 V
3
>
∆ =
+
I2
10 V
IL = I 1
Fig. 7.
∆1 = 40 = 3.6364 A ∆ 11
(AU June’14, 8 Marks)
EXAMPLE 2.33 Using the superposition theorem, find the current through the 5W resistor in the circuit shown in Fig.1.
10
2A
+ 50 V
E
SOLUTION
2
I5 1
5
Let , I5 = Current through the 5 W resistance shown in Fig. 1.
Fig. 1. Let, Il5 = Current through the 5 W resistance in the direction of I5 when the 50 V source alone is acting. Ill
5
= Current through the 5 W resistance in the direction of I5 when the 2 A source alone is acting.
Now, by the superposition theorem, I5 = Il5 + Ill5 To find the response Il5 when the 50 V source is acting alone The 2 A source is replaced with an open circuit as shown in Fig. 2.
10
+ With reference to Fig. 2, by Ohm’s law, I'5
= 50 = 50 = 10 A 10 + 5 15 3
To find the response Ill when the 2 A source is acting alone
50 V
2 OC
E
I’5 5
1
Fig. 2.
5
The 50 V source is replaced with a short circuit as shown in Fig. 3. In the circuit of Fig. 4, the 2 A source current divides between parallel resistances 10 W and 5 W.
Circuit Analysis
2. 82 Therefore, by current division rule, I''5 = 2 #
10 = 20 = 4 A 10 + 5 15 3
10 W
2W
2W
10 W
2A
2A SC
Þ
5W
I’’5 1W
1W
I’’5
5W
Fig. 4.
Fig. 3.
To find the total current I5 when both the sources are acting By superposition theorem, I5 = I'5 + I''5 = 10 + 4 = 14 = 4.6667 A 3 3 3
EXAMPLE 2.34
(AU May’17, 8 Marks)
22
10
Using the superposition theorem, find the power delivered by the 20 V source in the circuit shown in Fig. 1.
68
SOLUTION 47
+ 10 V E
10
Let, IS = Current in the series branch with the 20 V source and 33 W in series. IlS = Current in the series branch when the 20 V source alone is acting. IllS = Current in the series branch when the 10 V source alone is acting.
20 V
33
+E
Now, by the superposition theorem,
Fig. 1.
IS = IlS + IllS Note : Since power is proportional to the square of voltage, it is not a linear quantity. So, power cannot be determined directly by the superposition theorem. To find the response IlS when the 20 V source is acting alone The 10 V source is replaced with a short circuit as shown in Fig. 2. The deltaconnected resistances 22 W, 47 W and 68 W in Fig. 2 are converted into a starconnected resistance as shown in Fig. 3. 1
W
W
W
10
R1
10
22
R1
R2
68 W 2 R2
Þ
R3
R3
SC
47 W 20 V
10
0W
1 3
I’s
33 W
20 V
33 W
+
+
Fig. 2.
W
Fig. 3.
Chapter 2  Network Theorems for DC and AC Circuits R1 =
22 # 68 = 10.9197 Ω 22 + 47 + 68
R2 =
22 # 47 = 7.5474 Ω 22 + 47 + 68
R3 =
47 # 68 = 23.3285 Ω 22 + 47 + 68
2. 83
R1+10 = 20.9199 W 7.5474 W
R2
20.9197 ´ 33.3285 20.9197 + 33.3285 = 12.8524 W
7.5474 W
Þ
R3+10 = 33.3285 W 20 V
I’s
I’s
33 W
20 V
+
+
Fig. 4.
Fig. 5.
33 W
With reference to Fig. 5, by Ohm’s law, IlS =
20 = 0.3745 A 7.5474 + 12.8524 + 33
To find the response IllS when the 10 V source is acting alone
22
10
The 20 V source is replaced with a short circuit as shown in Fig. 6. Now the current I’’S is solved by mesh analysis.
68
With reference to Fig. 6, the mesh basis matrix equation is,
R S I1 SI S 2 S I3 T
R V V W S 0 W W = S − 10 W W W S W S 10 W T X X
10
V W W W W X
+ 10 V E
47
R S 47 + 10 + 33 − 47 − 10 S 47 22 68 47 − + + − 68 S 68 + 10 + 10 − 10 − 68 S T R V R V R V S 90 − 47 − 10 W S I1 W S 0 W S − 47 137 − 68 W S I W = S − 10 W W S WS 2W S S − 10 − 68 88 W S I3 W S 10 W T X T X T X
I3
I2
I’’s
I1 SC
33
Fig. 6.
Let us define two determinants D and D1 as shown below and mesh current I1 is solved by Cramer’s rule. 90 − 47 − 10 T = − 47 137 − 68 − 10 − 68 88
= 90 # 7137 # 88 − (− 68) 2 A − (− 47) # 7 − 47 # 88 − (− 10) # (− 68) A + (− 10) # 7(− 47) # (− 68) − (− 10) # 137 A = 668880  226352  45660 = 396868
0 − 47 − 10 T1 = − 10 137 − 68 − 10 − 68 88
= 0 − (− 47) # 7 − 10 # 88 − 10 # (− 68) A + (− 10) # 7 − 10 # (− 68) − 10 # 137) A =  9400  6900 =  16300
` IllS = I1 =
T1 = − 16300 = − 0.0411 A T 396868
Circuit Analysis
2. 84 To find the total response IS and power By the superposition theorem, IS = IlS + IllS = 0.3745 + (0.0411) = 0.3334 A Power delivered by 20 V source = 20 # I1 = 20 # 0.3334 = 6.668 W
EXAMPLE 2.35
3V
Using the superposition theorem, find the voltage VL and the power consumed by the 6 W resistor in the circuit shown in Fig. 1.
+E
1
4
SOLUTION Let, VlL = Voltage across the 6 W resistance with polarity same as that of VL when the 3 V source alone is acting.
2 + 2 A VL _
6
Fig. 1.
VllL = Voltage across the 6 W resistance with polarity same as that of VL when the 2 A source alone is acting. Now, by the superposition theorem, VL = VlL + VllL Power consumed by the 6 W resistor, PL =
VL2 6
Note : Since power is proportional to the square of voltage, it is not a linear quantity. So, power cannot be determined directly by the superposition theorem. To find the response VlL when the 3 V source is acting alone The 2 A current source is replaced with an open circuit as shown in Fig. 2. The circuit of Fig. 2 is redrawn as shown in Fig. 3. In Fig. 3, the voltage across series combination of 4 W and 6 W is 3 V. This 3 V divides into V1 and V2 and so by voltage division rule, we get, VlL = − V2 = − 3 #
6 = − 1.8 V 6+4
3V
3V
+
+
1W
1W
2W
Þ
+ 4W
OC
Fig. 2.
V’L _
2W _
+ 3V
6W + V1 _
+ V2 _ _ V’L +
4W
6W
Fig. 3.
Chapter 2  Network Theorems for DC and AC Circuits
2. 85
To find the response VllL when 2 A source is acting alone The 3 V source is replaced with a short circuit as shown in Fig. 4. The circuit of Fig. 4 is redrawn as shown in Figs. 5 and 6. In the circuit of Fig. 6, the current 2 A divides between the parallel resistances 6 W and 4 W. Hence, by current division rule, I1 = 2 #
4 = 0.8 A 6+4
By Ohm’s law, VllL = I1 # 6 = 0.8 # 6 = 4.8 V I2
SC
I1 2A
1W
2W
1W
+ 2 A V’’L 6 W _
4W
Þ
2W
4W
Fig. 4.
+ V’’L _
6W
Þ
2A
4W 2A
Fig. 5.
1´ 2 + 1 + 2 V’’ L 2 _ = W 3
6W
Fig. 6.
To find VL and power in the 6 W resistor By the superposition theorem, VL = VlL + VllL = − 1.8 + 4.8 = 3 V Power consumed by the 6 Ω resistor, PL =
2 VL2 = 3 = 1.5 W 6 6
CrossCheck Let,
PlL = PllL =
Let, PL, sup
(VlL) 2 (− 1.8) 2 = = 0.54 W 6 6 2 (VllL) 2 = 4.8 = 3.84 W 6 6 = PlL + PllL = 0.54 + 3.84 = 4.38 W
Here, PL, sup ¹ PL. So we can say that the power calculated directly by the superposition theorem is not equal to the actual power.
EXAMPLE 2.36 Find the voltage across the 2 W resistance in the circuit of Fig. 1 using the principle of superposition.
SOLUTION
E 3
Let VL be the voltage across the 2 W resistance when both the voltage sources are acting together as shown in Fig. 2. Let, VlL = Voltage across the 2 W resistance with polarity same as that of VL when the 5 V source alone is acting. VllL = Voltage across the 2 W resistance with polarity same as that of VL when the 10 V source alone is acting.
1
5V
+
1 + 10 V _
Fig. 1.
2
Circuit Analysis
2. 86 Now, by the superposition theorem,
E
5V
+
VL = VlL + VllL
The 10 V source is replaced with a short circuit as shown in Fig. 3. The circuit of Fig. 3 is redrawn as shown in Figs 4 and 5.
5V
+

1W
3W
Þ
+ SC
V’L _
V2
Fig. 2.

1W _
+
2
+
3W _
1W
5V
+ + 10 V VL _ _
1
The parallel combinations of resistances are replaced with a single equivalent as shown in Fig. 5. 
1
3
To find the response VlL when the 5 V source is acting alone
V1
+
Þ
5V
_ V2 +
+
V1 = V’L _ +
2W
Fig. 3.
_ V2 +
V1 = V’L _ +
1W
2W
3 ´1 3 +1 = 0.75 W
1´ 2 1+ 2 = 0.6667 W
Fig. 5.
Fig. 4.
In Fig. 5, the source voltage 5 V divides between the seriesconnected resistances 0.6667 W and 0.75 W. Let, these voltages be V1 and V2. Since 1 W and 2 W are in parallel, the voltage across them will be the same and so V1 = VlL . With reference to Fig. 5, by voltage division rule, VlL = V1 = 5 #
0.6667 = 2.353 V 0.6667 + 0.75
To find the response VllL when the 10 V source is acting alone The 5 V source is replaced with a short circuit as shown in Fig. 6. The circuit of Fig. 6 is redrawn as shown in Figs. 7 and 8. Figure 7 is the same as Fig. 4, except the 5 V source, which is now 10 V. Therefore, by voltage division rule, VllL = 10 #
0.6667 = 4.706 V 0.6667 + 0.75
SC
1W
3W
1W
3W
+ 1W
+
+

V’’L _
10 V
Þ
10 V
2W
Fig. 6.
Þ +
_ 1W
V’’L _
Fig. 7.
To find the response VL when both the sources are acting By the superposition theorem, VL = VlL + VllL = 2.353 + 4.706 = 7.059 V
10 V _
2W
3 ´1 3+1 =0.75 W
+ + V’’L _
Fig. 8.
1´ 2 1+ 2 =0.6667 W
Chapter 2  Network Theorems for DC and AC Circuits
2. 87
EXAMPLE 2.37
8
Use the principle of superposition to find the current IL through the 8 W resistance in the circuit shown in Fig. 1.
SOLUTION
IL 10 V, + 2 E
4
The internal resistance of the voltage source is represented as a series resistance external to the source and the internal resistance of the current source is represented as a parallel resistance external to the source as shown in Fig. 2. Now, the sources can be treated as ideal sources.
IllL = Current through the 8 W resistance in the direction
Fig. 1.
2
Let, IlL = Current through the 8 W resistance in the direction of IL when the 10 V source alone is acting.
5 A, 2
8 IL
10 V +E
4
2
5A
of ILwhen the 5 A source alone is acting. Now, by the superposition theorem,
Fig. 2.
IL = IlL + IllL To find the response IlL when the 10 V source is acting alone
The 5 A source is replaced with an open circuit as shown in Fig. 3. Let, Is1 be the total current supplied by the 10 V source. This current divides into I1 and I2 and flows through the two parallel paths as shown in Fig. 3. 2W Is1
I1
8W
I2
2W
I’L
Is1 +
+ 10 V
4W
2W
OC

Þ
4 ´ (8 + 2) 4 + (8 + 2) = 2.8571W
10 V 
Fig. 3.
Fig. 4.
With reference to Fig. 4, Is1 =
10 = 2.0588 A 2 + 2.8571
With reference to Fig. 3, by current division rule,
IlL = I1 = Is1 #
4 = 2.0588 # 4 = 0.5882 A 4 + (8 + 2) 4 + 10
To find the response IllL when the 5 A source is acting alone The 10 V source is replaced with a short circuit as shown in Fig. 5. The parallel combination of 2 W and 4 W is replaced with a single equivalent as shown in Fig. 6. With reference to Fig. 6, we can say that the 5 A current divides between the parallel resistances 2 W and (8 + 1.3333) W. By current division rule,
IllL = − I 4 = − 5 #
2 = − 0.8824 A 2 + (8 + 1.3333)
Circuit Analysis
2. 88 2W
8W I’’L 4W
SC
I4
8W
I3
I’’L 2W
4´2 4+2 = 1.3333 W
Þ
5A
2W
Fig. 5.
5A
Fig. 6.
To find the response IL when both the sources are acting By the superposition theorem, IL = IlL + IllL = 0.5882 + (0.8824 ) = –0.2942 A
EXAMPLE 2.38
(AU May’15, 8 Marks) 4
Compute the current I L in the circuit of Fig. 1 using the superposition theorem.
IL 47
SOLUTION
27
Let, IlL = Current through the 23 W resistance in the direction
20 A + E
of IL when the 200 V source alone is acting. IllL = Current through the 23 W resistance in the direction
23
200 V
Fig. 1.
of ILwhen the 20 A source alone is acting. Now, by the superposition theorem, IL = IlL + IllL To find the response IlL when the 200 V source is acting alone
The 20 A source is replaced by an open circuit as shown in Fig. 2. Let, Is1 be the total current supplied by the 200 V source. This current divides equally between parallelconnected resistances 27 W and (4 + 23) W. I2
I1
4W I’L
Is1
Is1
I2
47 W 47 W OC
27 W
23 W
Þ
+ 200 V 
Is1 4W
200 V +
With reference to Fig. 3, by Ohm’s law,
200 = 3.3058 A 47 + 13.5
With reference to Fig. 2, by current division rule,
I IlL = I1 = s1 = 3.3058 = 1.6529 A 2 2
23 W
Fig. 3.
47 W 27 = 13.5 W 2
Þ
27 W
Fig. 2.
Is1 =
I1 = I’L
200 V +
Fig. 4.
Chapter 2  Network Theorems for DC and AC Circuits
2. 89
To find the response IllL when 20 A source is acting alone The 200 V source is replaced with a short circuit as shown in Fig. 5. The parallel resistances 27 W and 47 W are replaced with a single equivalent as shown in Fig. 6. In the circuit of Fig. 6, the 20 A source current divides between parallel resistances 23 and (4 + 17.1486) W. Therefore, by current division rule,
IllL = I3 = 20 #
(4 + 17.1486) = 9.5806 A 23 + (4 + 17.1486)
4W
4W I’’L
27 W
23 W
20 A
27 ´ 47 27 + 47 = 17.1486 W
Þ
SC
I’’L
I3
I4
47 W
23 W
20 A
Fig. 6.
Fig. 5. To find the total current IL when both the sources are acting By the superposition theorem, IL = IlL + IllL = 1.6529 + 9.5806 = 11.2335 A
EXAMPLE 2.39 Determine the current in the 5 W resistance in the circuit shown in Fig. 1 using the superposition theorem.
2
5
2
IL
SOLUTION
+
Let, IlL = Current through the 5 W resistance in the
E 4
25 V E
2
50 V +
direction of IL when the 25V source alone is acting. IllL = Current through the 5 W resistance in the
Fig. 1.
direction of ILwhen the 50V source alone is acting. By the superposition theorem, IL = IlL + IllL To find the response IlL when the 25 V source is acting alone
The 50 V source is replaced with a short circuit as shown in Fig. 2. The 2 W resistances in parallel are replaced by a single equivalent and then I’L is solved using mesh analysis. With reference to Fig. 3, the mesh basis matrix equation is,
>
2+4 −4 −4 4 + 5 + 1
∆ =
H > I1 H I
2
=
>
25 0
H ⇒
6 −4 = 6 # 10 − (− 4) 2 = 44 − 4 10
I 6 −4 H > I1 10 2
> −4
;
H
∆2 =
=
>
25 H 0
6 25 = 0 − (− 4) # 25 = 100 −4 0
Circuit Analysis
2. 90 2W
2W
5W
2W
5W
I’L
I’L
+ 4W
25 V
2W
Þ
SC

+ 25 V
4W
I1
2´2 = 1W 2+2
I2

Fig. 2.
Fig. 3.
∆ ` IlL = I 2 = 2 = 100 = 2.2727 A ∆ 44 To find the response IllL when 50 V source is acting alone The 25 V source is replaced with a short circuit as shown in Fig. 4. The parallelconnected resistances 2 W and 4 W are replaced with a single equivalent as shown in Fig. 5 and then IllL is solved using mesh analysis. The mesh basis matrix equation is,
>
5 + 2 + 1.3333 − 2 −2 2+2
∆ =
8.3333 − 2 −2 4
2W
2
=
0 > 50 H ⇒
>
8.3333 − 2 −2 4
;
H > I1 H I
> 50 H 0
=
2
= 0 − 50 # (− 2) = 100
0 −2 50 4
∆1 =
5W
2W
5W
4W
I
= 8.3333 # 4 − (− 2) 2 = 29.3332
2W
I’’L
I’’L SC
H > I1 H
2W
50 V
Þ
+
4´2 4W 4+2 = 1.3333 W
2W I2
I1
Fig. 4.
50 V +
Fig. 5.
∆ 100 ` IllL = I1 = 1 = = 3.4091 A ∆ 29.3332 To find the total response IL when both the sources are acting By the superposition theorem, IL = IlL + IllL = 2.2727 + 3.4091 = 5.6818
EXAMPLE 2.40
(AU Dec’16, 16 Marks)
24 V
SOLUTION Let, IlL = Current through 3 W in the direction of IL when the 12 V source alone is acting.
8
+E
Using the superposition theorem, find the current through the 3W resistor in the circuit shown in Fig.1.
4
4 IL
12 V
+ E
3A 3
Fig. 1.
Chapter 2  Network Theorems for DC and AC Circuits
2. 91
IllL = Current through 3 W in the direction of IL when the 24 V source alone is acting. IlllL = Current through 3 W in the direction of IL when the 3 A source alone is acting. Now, by the superposition theorem, IL = IlL + IllL + IlllL To find the response IlL when the 12 V source is acting alone The 24 V source is replaced with a short circuit and the 3 A source is replaced with an open circuit as shown in Fig. 2. 4 ´ (4 + 8) 4 + (4 + 8) = 3W
SC
8W
4W
4W
I’L
Þ 12 V
I’L 12 V
+ 
3W
OC
+ 
3W
Fig. 2.
Fig. 3.
With reference to Fig. 3, by Ohm’s law, I'L =
12 = 2 A 3+3
To find the response Ill when the 24 V source is acting alone L
The 12 V source is replaced with a short circuit and the 3 A source is replaced with an open circuit as shown in Fig. 4. The seriesconnected resistances 8 W and 4 W are replaced with a single equivalent and parallelconnected resistances 4 W and 3 W are replaced with a single equivalent in Fig. 5. 24 V
24 V
8W
+
+
4W +
4W
V1
SC
Þ
_
+ V2 _
I’’L OC 3W
Fig. 4.
+ V’’1 _ 4´3 4+3 = 1.7143 W
+ V’’2 _ 8 + 4 = 12 W
Fig. 5. With reference to Fig. 5, by voltage division rule, V1'' = 24 #
1.7143 = 3V 1.7143 + 12
Circuit Analysis
2. 92 With reference to Fig. 4, by Ohm’s law, IllL =
Vll1 = 3 = 1A 3 3
To find the response Illl when the 3 A source is acting alone L
The 12 V and 24 V are replaced with a short circuit as shown in Fig. 6. The parallelconnected resistances 4 W and 3 W are replaced with a single equivalent in Fig. 7. 8W
SC
8W I 4 W Is1 s2
4W
Is2
I’’’L 3A
SC
Is1
Þ
3W
4W 4´3 4+3 = 1.7143 W
Fig. 6.
3A
Fig. 7.
With reference to Fig. 7, by current division rule, Is1 = 3 #
8 = 1.75 A (4 + 1.7143) + 8
With reference to Fig. 6, by current division rule, Illl = Is1 # L
4 = 1.75 # 4 = 1 A 4+3 7
To find the total current IL when all the sources are acting By superposition theorem, IL = IlL + IllL + IlllL = 2 + 1 + 1 = 4 A
EXAMPLE 2.41
4
(AU Dec’14, 16 Marks)
Use the principle of superposition to find the current IL through the 5 W resistance in the circuit shown in Fig. 1.
32 V
2
+E
SOLUTION
IL
Let, IlL = Current through 5 W in the direction of IL when the 9 A source alone is acting. IllL = Current through 5 W in the direction of IL when the 4 A source alone is acting.
9A
5
Fig. 1.
IlllL = Current through 5 W in the direction of IL when the 32 V source alone is acting. Now, by the superposition theorem, IL = IlL + IllL + IlllL
10
4A
Chapter 2  Network Theorems for DC and AC Circuits
2. 93
To find the response IlL due to the 9 A source The 32 V source is replaced with a short circuit and the 4 A source with an open circuit as shown in Fig. 2. The parallel combination of 2 W and 4 W is replaced with a single equivalent as shown in Fig. 3. With reference to Fig. 3, we can say that the 9 A current divides between the parallel resistances 5 W and 11.3333 W. By current division rule, I 'L = 9 #
11.3333 = 6.2449 A 5 + 11.3333 4W
2W
SC
I’L
I’L 9A
5W
10 W
OC
Þ
9A
4 ´ 2 + 10 = 113333 . W 4+2
5W
Fig. 2.
Fig. 3.
To find the response IllL due to the 4 A source The 32 V source is replaced with a short circuit and 9 A source with an open circuit as shown in Fig. 4. The parallel combination of 2 W and 4 W is replaced with a single equivalent in Fig. 5. With reference to Fig. 5, we can say that the 4 A current divides between the parallel resistances 10 W and (5+1.3333) W. By current division rule, I''L = 4 #
10 = 2.449 A 10 + (1.3333 + 5) 4W
SC
4 ´ 2 = 1..3333 W 4+2
2W
I’’L OC
I’’L
5W
10 W
Fig. 4.
4A
Þ 5W
10 W
Fig. 5.
4A
Circuit Analysis
2. 94 To find the response IlllL due to the 32 V source
The current sources 9 A and 4A are replaced with an open circuit as shown in Fig. 6. Let us assume two mesh currents I1 and I2 as shown in Fig. 6. Now, IllL = I 2 . The mesh basis matrix equation is,
>
4+2 +2 + 2 5 + 2 + 10
∆ =
H > I1 H I
2
> 32 H 32
=
&
>2
6 2 17
H > I1 H I
2
> 32 H
4
32
=
I1
6 2 = 6 # 17 − 2 # 2 = 98 2 17
32 V
2
+E
I’’’L
6 32 ∆2 = = 6 # 32 − 2 # 32 = 128 2 32 I''' L = I 2 =
OC
I2
5
10
OC
∆2 = 128 = 1.3061 A 98 ∆
Fig. 6.
To find the total response IL when all the sources are acting By the superposition theorem, IL = I'L + I'' L + I''' L = 6.2449 + 2.449 + 1.3061 = 10 A
EXAMPLE 2.42
1.5 A
In Fig. 1, find the component of Vx caused by each source acting alone. What is the value of Vx when all the sources are acting together?
20
SOLUTION
+
Let, Vlx = Voltage across the 20 W resistance when the16 V source is acting alone.
E+
_ Vx
10 V
16 V +E
3A
80
Vllx = Voltage across the 20 W resistance when the 3 A source is acting alone. Vlllx = Voltage across the 20 W resistance when the10 V source is acting alone.
Fig. 1.
Vllllx = Voltage across the 20 W resistance when the 1.5 A source is acting alone. The polarity of voltages Vlx , Vllx , Vlllx and Vllllx are chosen the same as that of Vx. Now, by the superposition theorem, Vx = Vlx + Vllx + Vlllx + Vllllx To find the response Vlx due to the 16 V source The 10 V source is replaced with a short circuit and the current sources are replaced with an open circuit as shown in Fig. 2. With reference to Fig. 3, by voltage division rule,
Vlx = 16 #
20 = 3.2 V 20 + 80
Chapter 2  Network Theorems for DC and AC Circuits
2. 95
OC
20 W
20 W _
+ V’x + 16 V 
_
+
SC
Þ
80 W
OC
V’x
16 V +
80 W
Fig. 2.
Fig. 3.
To find the response Vllx due to the 3 A source The voltage sources are replaced with a short circuit and the 1.5 A source is replaced with an open circuit as shown in Fig. 4. With reference to Fig. 5, by current division rule,
I2 = 3 #
80 = 2.4 A 20 + 80
By Ohm’s law,
Vllx = − 20 # I2 = − 20 # 2.4 = − 48 V OC
20 W
20 W _
+ V’’x
I1
V’’x 80 W
3A
SC
I2 _
+
SC
Þ
3A
Fig. 4.
80 W
Fig. 5.
To find the response Vlllx due to the 10 V source The 16 V source is replaced with a the short circuit and the current sources are replaced with an open circuit as shown in Fig. 6. With reference to Fig. 7, by voltage division rule,
Vlllx = 10 #
20 = 2V 20 + 80 OC
20 W +
SC
20 W +
_ V’’’x
+
10 V OC
Fig. 6.
80 W
_ V’’’x
+
10 V
Þ
80 W
Fig. 7.
Circuit Analysis
2. 96 To find the response Vllllx due to the 1.5 A source
The voltage sources are replaced with a short circuit and the 3 A source is replaced with an open circuit as shown in Fig. 8. With reference to Fig. 9, we can say that the current source is shorted and so no current will flow through the 20 W resistance. ` Vllllx = 0 1.5 A
1.5 A
I1 = 0
20 W +
_
SC
+
SC
V’’’’x OC
80 W
I = 1.5 A 20 W _
SC
V’’’’x
I1 = 0
Þ 80 W
Fig. 8.
Fig. 9.
To find the response Vx due to all the sources By the superposition theorem, Vx = Vlx + Vllx + Vlllx + Vllllx = 3.2 + (–48) + 2 + 0 = –42.8 V
RESULT Component of Vx when the 3 A source alone is acting,
Vlx = 3.2 V Vllx = – 48 V
Component of Vx when the 10 V source alone is acting,
Vlllx = 2 V
Component of Vx when the 16 V source alone is acting,
Component of Vx when the 1.5 A source alone is acting, Vllllx = 0 V The value of Vx when all the sources are acting,
Vx = – 42.8 V
EXAMPLE 2.43
10 W
Using the superposition theorem, find the current through 2 + j2 W impedance of the circuit shown in Fig. 1.
20Ð0oV
j5 W
2W
+
SOLUTION
5W
~
_
j2 W
Let IL be the current through 2 + j2 W impedance branch as shown in Fig. 2.
~
o
10Ð30 A
Fig. 1.
Let, I lL = Component of IL due to 20∠0o V source acting alone.
I llL = Component of IL due to 10∠30o A source acting alone. Now, by the superposition theorem,
10 W
5W
IL = I lL + I llL The 10Ð30o A current source is replaced with an open circuit as shown in Fig. 3.
+
20Ð0oV
To find the response IlL due to the 20Ð0o V source
IL
~
_
j2 W
With reference to Fig. 4, by Ohm’s law, we get, I lL =
20+0 o = 20 = 1.6216 − j0.2703 A 10 + 2 + j2 12 + j2
j5 W
2W
Fig. 2.
~
o
10Ð30 A
Chapter 2  Network Theorems for DC and AC Circuits 10 W
20Ð0 V
10 W
5W
IL¢
+ o
2. 97
j5 W
2W
IL¢
+
Þ
~
o
20Ð0 V
_
2W
~
_ j2 W
j2 W
OC
Fig. 3.
Fig. 4.
To find the response I llL due to the 10Ð30o A source
10 W
5W
o
The 20Ð0 V voltage source is replaced with a short circuit as shown in Fig. 5.
IL¢¢
With reference to Fig. 5, by current division rule, we get, I llL = 10+30 o #
10 = 100+30 10 + 2 + j2 12 + j2
j5 W
2W
SC
o
j2 W
= 7.6975 + j2.8837A
To find the response IL due to both the sources
~
o
10Ð30 A
Fig. 5.
By the superposition theorem,
IL = IlL + I llL = 1.6216 − j0.2703 + 7.6975 + j2.8837 = 9.3191 + j2.6134 A = 9.6786+15.7 o A
CrossCheck
5W
V
The 20∠0o V voltage in series with the 10 W is converted into a current source as shown in Fig. 6. With reference to Fig. 6, by KCL at node A, we get,
V 2 + j2
V 10 20 = 2A 10
~
IL
j5 W
2W
10 W j2 W
V + V = 2 + 10+30 o 10 2 + j2
o
10Ð30 A
~
Fig. 6.
1 ` Vf 1 + = 2 + 10+30 o ⇒ b 0.35 − j0.25 l V = 2 + 10+30 o 10 2 + j2 p o ` V = 2 + 10+30 = 13.4113 + j23.8652 0.35 − j0.25
Now, by Ohm’s law, IL =
V = 13.4113 + j23.8652 = 9.3191 + j2.6135 A 2 + j2 2 + j2 = 9.6786+15.7 o A
EXAMPLE 2.44
o
5Ð90 A
Using the superposition theorem, find the voltage V1 across the capacitance in the circuit shown in Fig. 1.
~ j5 W
SOLUTION Let, Vl1 = Voltage across capacitance when the 10Ð0o A source alone is acting.
Vll1 = Voltage across capacitance when the 5Ð90 A source o
alone is acting.
Now, by the superposition theorem,
V1 = Vl1 + Vll1
+ o
10Ð0 A
~
j4 W
V1

Fig. 1.
4W
Circuit Analysis
2. 98 To find the response Vl1 due to the 10Ð0o A source
The 5Ð90o A source is replaced with an open circuit as shown in Fig. 2. The circuit of Fig. 2 is redrawn as shown in Fig. 3. With reference to Fig. 3, by current division rule,
I1 = 10 #
4 + j5 = 12.3529 + j9.4118 A − j4 + 4 + j5
Now, by Ohm’s law, we get, Vl1 = − j4 # I1 = − j4 # a12.3529 + j9.4118 k = 37.6472 – j49.4116 V OC I2
j5 W I1
+
+ o
10Ð0 A
4W
j4 W
V1
~
Þ
10 A
j5 W
j4 W
V1¢
~

4W
I1 + I2 = 10 A
Fig. 2.
Fig. 3.
To find the response Vll1 due to the 5Ð90o A source The 10Ð0o A source is replaced with an open circuit as shown in Fig. 4. The circuit of Fig. 4 is redrawn as shown in Fig. 5. With reference to Fig. 5, by current division rule,
I 4 = j5 #
j5 = − 5.8824 + j1.4706 A j5 + (4 − j4)
Now, by Ohm’s law, we get, Vll1 = − (− j4 # I4) = j4 # a− 5.8824 + j1.4706 k
= − 5.8824 − j23.5296 V
o
5Ð90 A o
5Ð90 A = j5 A
~
~
j5 W I3
+ OC
Þ j4 W
V1¢¢
j5 W
4W
j4 W
Fig. 4.
+
V1¢¢
To find the total response V1 when both the sources are acting By the superposition theorem,
V1 = Vl1 + Vll1 = (37.6472 – j49.4116) + (–5.8824 – j23.5296) = 31.7648 – j72.9412 V = 79.5577∠– 66.5o V
4W
I4
Fig. 5.
Chapter 2  Network Theorems for DC and AC Circuits
2. 99
CrossCheck by Node Analysis
o
5Ð90 A = j5 A
With reference to Fig. 6, the node basis matrix equation is, R V R V R V S 1 + 1 − 1 W S V1 W S 10 − j5 W S W S j5 − j4 W W j5 S W S WS W= S W S W S − 1 1 + 1 WS S j5 4 j5 W S V2 W S j5 W T X T X T X
>
j0.05 j0.2 j0.2 0.25 − j0.2
H > V1 H V
2
=
>
10 − j5 j5
~ V1
j5 W V2
+ 10Ð0o A = 10 A
H
~
j4 W
V1
4W

Fig. 6. ∆l =
j0.05 j0.2 = j0.05 # (0.25 − j0.2) − (j0.2) 2 j0.2 0.25 − j0.2 = 0.05 + j0.0125
∆l1 =
10 − j5 j0.2 = (10 − j5) # (0.25 − j0.2) − (j5) # (j0.2) j5 0.25 − j0.2 = 2.5 − j3.25
V1 =
2.5 − j3.25 ∆l1 = = 31.7647 − j72.9412 V = 79.5576+ − 66.5 o V ∆l 0.05 + j0.0125
2.6.3 Maximum Power Transfer Theorem All practical sources have internal resistance or impedance. When a source delivers current to a load, the current flows through the internal impedance also and so a part of the power is consumed by the internal impedance of the source. Hence, when a load is connected to a source, the power generated by the source is shared between the internal impedance and the load. In certain applications, it is desirable to have a maximum power transfer from the source to the load. The maximum power transfer to the load is possible only if the source and the load have matched impedance. This situation arises in electronics, communication and control circuits. For example, an antenna used in a TV/radio receives a signal from the atmosphere and the power level of the signal is very low. This weak signal should be transferred to the input section of an amplifier to which it is connected. For good reception, the maximum power should be transferred from the antenna to the amplifier. This is possible only if the input impedance of the amplifier is matched with the antenna impedance. The sources may be dc or ac and the loads may be resistive or reactive. Hence, the matched impedance for maximum power will be different for different combinations of source and load. The following important six combinations of source and load are discussed in this book. Case i : DC source with internal resistance connected to a resistive load. Case ii : AC source with internal resistance connected to a resistive load. Case iii : AC source with internal impedance connected to a resistive load. Case iv : AC source with internal impedance connected to a load with variable resistance and variable reactance. Case v : AC source with internal impedance connected to a load with variable resistance and fixed reactance. Case vi : AC source with internal impedance connected to a load with fixed resistance and variable reactance.
Circuit Analysis
2. 100
Case i : DC source with internal resistance connected to a resistive load
(AU Dec’14, 2 Marks)
Theorem:
“Maximum power is transferred from source to load, when load resistance is equal to source resistance”. Consider a dc source of emf E and internal resistance Rs connected to a variable load resistance R. Now, the condition for maximum power transfer from source to load is, R = Rs The maximum power Pmax is, 2
Pmax = E 4R Proof:
P = Power delivered to load
Now, P = I2R
..... (2.62)
Using equation (2.61) in equation (2.62), we get, 2 E2 R P = c E m R = Rs + R ^Rs + Rh2
Rs I
R
LOAD
Let,
SOURCE
Consider a dc source of emf E and internal resistance Rs connected to a load resistance R as shown in Fig. 2.54. Let, I be the current through the circuit. With reference to Fig. 2.54, by Ohm’s law, we can write, E I = ..... (2.61) Rs + R
E +E
..... (2.63)
Fig. 2.54.
The condition for maximum power can be obtained by differentiating P with respect to R and equating (dP/dR) = 0 On differentiating equation (2.63) with respect to R, we get, 2 2 2 dP = E # ^Rs + Rh − E R # 2^Rs + Rh dR ^Rs + Rh4
du = du # v − u # dv dv v2 ..... (2.64)
For (dP/dR) = 0, the numerator of equation (2.64), should be zero. \ E2(Rs + R)2 – 2E2R(Rs + R) = 0 ⇒ 2 E2 R(Rs + R) = E2 (Rs + R)2
.... (2.65)
On dividing equation (2.65) throughout by E2(Rs + R), we get, 2R = Rs + R ⇒ 2R – R = Rs
⇒
R = Rs
..... (2.66)
Equation (2.66) is the condition for maximum power transfer to load, which states that the maximum power is transferred from source to load when load resistance is equal to source resistance. On substituting R for Rs in equation (2.63), we can get an expression for maximum power. `
Maximum power, Pmax = P
Rs = R
=
E2 R = E2 R = E2 R = E2 4R ^R + Rh2 (2R) 2 4R 2
..... (2.67)
Case ii : AC source with internal resistance connected to a resistive load
Theorem: “Maximum power is transferred from source to load, when load resistance is equal to source resistance.” Consider an ac source of emf E and internal resistance Rs connected to a variable load resistance R. Now, the condition for maximum power transfer from source to load is, R = Rs
Chapter 2  Network Theorems for DC and AC Circuits
2. 101
E I = Rs + R
Rs
E
~
_
E E = Rs + R Rs + R Let, P = Power delivered to load ` I = I =
Now, P = I 2 R =
R
I
+
LOAD
Consider an ac source of emf E and internal resistance Rs connected to a load resistance R as shown in Fig. 2.55. Let, I be the current through the circuit. With reference to Fig. 2.55, by Ohm’s law, we can write,
SOURCE
Proof:
Fig. 2.55.
E2 R ..... (2.68)
^Rs + Rh2
Equation (2.68) is the same as equation (2.63) and so the condition for maximum power transfer will be the same as that of case (i). But here, I is rms value of current and E is rms value of source emf.
Case iii : AC source with internal impedance connected to a resistive load
Theorem: “Maximum power is transferred from source to load, when load resistance is equal to magnitude of source impedance.” Consider an ac source of emf E and internal impedance Zs ^ Zs = Rs + jXsh connected to a variable load resistance R. Now, the condition for maximum power transfer from source to load is, R = Zs =
Rs2 + Xs2
Let, Z s = Rs + jXs
Zs
E
` Magnitude of source impedance, Zs = Z s =
R s2 + X s2
Fig. 2.56.
E E E = = Rs + jXs + R ^Rs + Rh + jXs Zs + R
Magnitude of current, I = I =
E ^Rs + Rh + jXs
=
~
_
.....(2.69)
With reference to Fig. 2.56, by Ohm’s law, we can write, I =
R
I
+
LOAD
Consider an ac source of emf E and internal impedance Z s connected to a load resistance R as shown in Fig. 2.56.
SOURCE
Proof:
..... (2.70) E ^Rs + Rh2 + X s2
..... (2.71)
Let, P = Power delivered to load 2
Now, P = I R = I 2 R
..... (2.72)
Using equation (2.71) in equation (2.72), we can write, P =
E2 R ^Rs + Rh2 + X s2
..... (2.73)
Circuit Analysis
2. 102
The condition for maximum power can be obtained by differentiating P with respect to R and equating (dP/dR) = 0. On differentiating equation (2.73) with respect to R, we get, dP = E dR
2
# 6^Rs + Rh2 + X s2 @
du = du # v − u # dv dv v2
2
− E R # 2^Rs + Rh
..... (2.74)
2
6^Rs + Rh + X s2 @ 2
For dP = 0, the numerator of equation (2.74) should be zero. dR ` E 2 6^Rs + Rh2 + X s2 @ − E 2 R # 2^Rs + Rh
⇒
2E 2 R^Rs + Rh = E 2 6^Rs + Rh2 + X s2 @
On dividing the above equation throughout by E2 we get, 2R^Rs + Rh = ^Rs + Rh2 + X s2 2RRs + 2R 2 = R s2 + R 2 + 2RRs + X s2 2RRs + 2R 2 − R 2 − 2RRs = R s2 + X s2 R 2 = R s2 + X s2 ` R = Here,
R s2 + X s2
.....(2.75)
R s2 + X s2 = Zs = Magnitude of source impedance
Equation (2.75) is the condition for maximum power transfer. From equation (2.75) we can say that, maximum power is transferred to load when load resistance is equal to magnitude of source impedance.
Case iv : AC source with internal impedance connected to a load with variable resistance and variable reactance
Theorem: ”Maximum power is transferred from source to load, when load impedance is equal to complex conjugate of source impedance.” Consider an ac source of emf E and internal impedance Zs ^ Zs = Rs + jXsh connected to a load impedance Z, where Z = R + jX with R and X are individually variable. Now, the condition for maximum power transfer from source to load is, * Z = Zs ⇒
R + jX = ^Rs + jXsh*
⇒
R + jX = Rs − jXs
Let, Z s = Rs + jXs ⇒ Z s = Rs − jXs )
I = Current through the circuit Now, I =
E E E = = Rs + jXs + R + jX ^Rs + Rh + j^Xs + X h Zs + Z
Magnitude of current, I = I = =
Zs
R
+ E
I
~
jX
_
LOAD Z = R + jX
Consider an ac source of emf E and internal impedance Z s connected to a load impedance Z as shown in Fig. 2.57.
SOURCE
Proof :
Fig. 2.57.
E ^Rs + Rh + j^Xs + X h
E ^Rs + Rh2 + ^Xs + X h2
.....(2.76)
Chapter 2  Network Theorems for DC and AC Circuits
2. 103
Let, P = Power delivered to load Now, P = I
2
R = I2 R
.....(2.77)
Note : In reactive loads, power is consumed only by resistance and active power in the reactance is zero. Using equation (2.76) in equation (2.77), we can write, P =
.....(2.78)
E2 R ^Rs + Rh2 + ^Xs + X h2
The condition for maximum power can be obtained by partially differentiating P with respect to X and then with respect to R and equating (∂P/∂X) = 0 and (∂P/∂R) = 0. On partially differentiating equation (2.78) with respect to X, we get, 2 2 2 2P = 0 # [^Rs + Rh + ^Xs + X h ] − E R # 2^Xs + X h 2X [^Rs + Rh2 + ^Xs + X h2] 2
=
du = du # v − u # dv dv v2
− 2E 2 R^Xs + X h [^Rs + Rh2 + ^Xs + X h2] 2
For 2P = 0 , the numerator of equation (2.79) should be zero. 2X ∴ 2E2 R (X s + X) = 0
.....(2.79)
..... (2.80)
In equation (2.80), E ≠ 0 and R ≠ 0, hence, Xs + X = 0
..... (2.81)
∴
..... (2.82)
X = Xs
On partially differentiating equation (2.78) with respect to R, we get, 2 2 2 2 2P = E # [^Rs + Rh + ^Xs + X h ] − E R # 2^Rs + Rh 2 2 2 2R [^Rs + Rh + ^Xs + X h ]
..... (2.83)
For 2P = 0, the numerator of equation (2.83) should be zero. 2R ∴ E2 [(R s + R)2 + (X s + X) 2 ]  2E2 R(R s + R) = 0 2E2 R(R s + R) = E2 [(R s + R)2 + (X s + X) 2 ] On dividing throughout by E2 , we get, 2 R (R s + R) = (R s + R)2 + (X s + X) 2
..... (2.84)
From equation (2.81) we know that Xs + X = 0, hence equation (2.84) can be written as, 2 R (Rs + R) = (R s + R)2 ⇒ 2 R = R s + R ⇒ 2 RR = R s ⇒ R = R s
.....(2.85)
Equations (2.82) and (2.85) are the conditions for maximum power transfer. From these two equations, for maximum power transfer, we can say that, R + jX = Rs  jXs. *
Here, Rs − jXs = Z s = Conjugate of source impedance Hence, for maximum power transfer, load impedance should be equal to conjugate of source impedance. An interesting observation is that when maximum power transfer condition is met, the circuit will behave as a purely resistive circuit and so the circuit will be in resonance.
Circuit Analysis
2. 104
Case v :AC source with internal impedance connected to a load with variable resistance and fixed reactance
Theorem: “Maximum power is transferred from source to load, when load resistance is equal to absolute value of the rest of the impedence of the circuit”. Consider an ac source of emf E and internal impedance Zs ^ Zs = Rs + jXsh connected to a load impedance Z, where Z = R + jX with variable R and fixed X. Now, the condition for maximum power transfer from source to load is, R =
R2s + ^ Xs + Xh2
Proof : The statement of case (v) can be proved by proceeding similar to that of case (iv) and differentiating equation (2.79) with respect to R and equating (dP/dR) = 0. From equation (2.84) we get, 2 R (R s + R) = (Rs + R)2 + (X s + X) 2 2RRs + 2R 2 = R s2 + R 2 + 2RRs + ^Xs + X h 2 2RRs + 2R 2 − R 2 − 2RRs = R s2 + ^Xs + X h 2 ⇒ ` R =
R 2 = R s2 + ^Xs + X h 2
R s2 + ^Xs + X h 2
.....(2.86)
Equation (2.86) is the condition for maximum power transfer in case (v).
Case vi : AC source with internal impedance connected to a load with fixed resistance and variable reactance
Theorem: “Maximum power is transferred from source to load, when load reactance is equal to conjugate of source reactance”. Consider an ac source of emf E and internal impedance Zs ^ Zs = Rs + jXsh connected to a load impedance Z, where Z = R + jX with fixed R and variable X. Now, the condition for maximum power transfer is, jX = –jXs Proof : The statement of case (vi) can be proved by proceeding similar to that of case (iv) and differentiating equation (2.79) with respect to X and equating (dP/dX) = 0. From equation (2.82) we get, X =  Xs The equation (2.87) is the condition for maximum power transfer in case (vi).
..... (2.87)
Chapter 2  Network Theorems for DC and AC Circuits
2. 105
Table 2.3 : Summary of Conditions for Maximum Power Transfer Case
Source emf
Source impedance
Load impedance
(AU June’16, 2 Marks)
Variable element of
Condition for maximum
load impedance
power transfer
i
dc
Rs
R
R
R = Rs
ii
ac
Rs
R
R
R = Rs
iii
ac
Rs + jXs
R
R
iv
ac
Rs + jXs
R + jX
R, X
v
ac
Rs + jXs
R + jX
R
vi
ac
Rs + jXs
R + jX
X
R2s + X2s
R =
R + jX = Rs − jXs R =
R2s + ^ Xs + Xh2
jX = − jXs
Applying maximum power transfer theorem to circuits Generally it is desirable to have maximum power transfer to a particular element of a circuit. In this case remove the concerned element and create two open terminals. Then the circuit is represented by Thevenin’s equivalent with respect to open terminals. Now, consider Thevenin’s equivalent as the voltage source for load and apply the maximum power transfer theorem. A A
A
A
Rs
R th = R s
Circuit with dc source and resistances
R
Circuit
Þ
Þ
R
Þ + _ Vth = E + _
B
B
+ + E _ _ B
B
Fig. a : Circuit with dc source and resistances. A Circuit with ac source and resistances and reactances
A
A
A Z th = Z s Z = R + jX
Þ
Circuit
Zs
Þ
Þ
Z = R + jX
+ B
B
Vth = E
+ E
~
_
~
_
B
B
Fig. b : Circuit with ac source and resistances and reactances. Fig. 2.58 : Applying maximum power transfer theorem to an element of a circuit.
Sometimes, it is desirable to have maximum power transfer to load by varying some parameter of a circuit. In this case, determine an expression for power, P delivered to load by relating the variable parameter to P. Let, Y be the variable parameter. Now differentiate P with respect to Y to get dP . Then form an equation by equating dP = 0 and solve the equation to get the condition dY dY for maximum power transfer. [Refer to Examples 2.58 and 2.59.]
Circuit Analysis
2. 106
EXAMPLE 2.45
15
In the circuit of Fig. 1, find the value of the adjustable resistor R for maximum power transfer to R. Also, calculate the maximum power.
20
+ 100 V E
10
R
SOLUTION Let us remove the adjustable resistance R and denote the two open terminals by A and B, as shown in Fig. 2. Now, the circuit of Fig. 2 should be replaced
Fig. 1.
by Thevenin’s equivalent. Let us assume the polarity of Vth as shown in Fig. 2.
20
15
A +
To find Thevenin’s voltage Vth In Fig. 3, the 20 Ω resistance is open and so no current will flow through it. Hence, the voltage across the 20 Ω resistance is zero.
+ 100 V E
Vth
10
Rth
With reference to Fig. 3, by voltage division rule, we can write, Vth = 100 #
10 = 1000 = 40 V 15 + 10 25
Fig. 2. 15
20
A no voltage +
To find Thevenin’s resistance Rth The 100 V voltage source in the circuit of Fig. 2 is replaced with a short circuit and the resulting network is reduced to a single equivalent resistance as shown below: 15 W
20 W
20 W
A
E B
+ Vth 10 E
100 V +E
Vth
E
A
B
Fig. 3. SC
10 W
Þ
10 ´ 15 = 6W 10 + 15
Rth
Fig. 4.
Rth
Fig. 5. B
B
With reference to Fig. 5, Rth = Rs = 26 A
To find R for maximum power and Pmax Thevenin’s equivalent of Fig. 2 is shown in Fig. 6. Now, Thevenin’s equivalent is the voltage generator for load resistance R. ∴ Vth = E
;
Vth = E = 40 V
Rth = 20 + 6 = 26 Ω
+ E
Rth B
R th = Rs
Fig. 6.
Let us connect the adjustable resistance R across A and B of Thevenin’s equivalent as shown in Fig. 7.
Rs = 26 A
in R the value of R should be equal to Rs. ∴ R = 26 Ω
E = 40 V
With reference to Fig. 7, by maximum power transfer theorem, for maximum power + E
I
R
B
Fig. 7.
Chapter 2  Network Theorems for DC and AC Circuits
2. 107
2 We know that, maximum power, Pmax = E 4R 2 = 40 = 15.3846 W 4 # 26
Also, Pmax = I 2 R = c
2 40 m # 26 = 15.3846 W 26 + 26
RESULT The value of R for maximum power transfer = 26 Ω The maximum power in R, Pmax = 15.3846 W
EXAMPLE 2.46
(AU Dec’16, 8 Marks)
68 V
3
+E
In the circuit of Fig. 1, find the value of R for maximum power transfer. Also, calculate the maximum power. 6A
R
10
SOLUTION Let us remove the resistance R and denote the two open terminals by A and B as shown in Fig. 2.
2
Fig. 1. 68 V
3
To find Thevenin’s voltage Vth
A +
+E
The circuit of Fig. 2 should be replaced by Thevenin’s equivalent. Let us assume the polarity of Vth as shown in Fig. 2. The current source in parallel with the 10 W is converted to a voltage source in series as shown in Fig. 3.
6A
Vth
10
Rth
With reference to Fig. 3, by KVL, we can write, Vth + 68 + 60I = 0
2
Fig. 2.
∴ Vth =  128 V
10 W
68 V
3W
+
To find Thevenin’s resistance Rth
no voltage
Let us replace the voltage source with a short circuit and the current source with an open circuit as shown in Fig. 4.
6´10 = 60 V
A +
Vth
+ 
With reference to Fig. 4,
no voltage
R th = 3 + 10 + 2 = 15 Ω
Fig. 3. 3
Thevenin’s equivalent of Fig. 2 is shown in Fig. 5. Now, the Thevenin’s equivalent is the voltage generator for load resistance R. ;
B
2W
To find R for maximum power and Pmax
∴ Vth = E
E B
R th = Rs
Let us connect the resistance R across A and B of Thevenin’s equivalent as shown in Fig. 6. With reference to Fig. 6, by maximum power transfer theorem, for maximum power transfer to R the value of R should be equal to Rs.
OC
SC
A
10 Rth
2
Fig. 4.
B
Circuit Analysis Rs = 15
Rth = Rs = 15 A
A
E = (10I + 68) V
Vth = E = (10I + 68) V
2. 108
+ E
Rth
+ E
R
I
B
B
Fig. 5.
Fig. 6.
∴ R = 15 Ω 2 (− 128) 2 Maximum power, Pmax = E = = 273.0667 W 4R 4 # 15
10
15
EXAMPLE 2.47 In the circuit of Fig. 1, find the value of R for maximum power transfer. Also, calculate the maximum power.
12 V +E
2A
R
SOLUTION Fig. 1.
Let us remove the resistance R and denote the two open terminals by A and B, as shown in Fig. 2. Now, the circuit of Fig. 2, should be replaced by Thevenin’s equivalent. Let us assume the polarity of Vth as shown in Fig. 2.
+ A Vth _ B
12 V +E
To find Thevenin’s voltage Vth
10
15
2A
With reference to Fig. 3, by KVL, we can write,
Fig. 2.
Vth = 2 × 15 + 12 ∴ Vth = 42 V To find Thevenin’s resistance Rth Let us replace the voltage source with a short circuit and the current source with an open circuit as shown in Fig. 4.
10 W 15 W 2 A _ + 2 ´ 15 + A Vth 12 V +_ B
2A
2A
10 W 15 W
Fig. 3.
15 W
10 W
A
A SC
OC B
Þ
Rth
Rth B
Fig. 4.
Fig. 5. Rth = Rs = 15 A
R th = 15 Ω
To find R for maximum power and Pmax Thevenin’s equivalent of Fig. 2 is shown in Fig. 6. Now, the Thevenin’s equivalent is the voltage generator for load resistance R. ∴ Vth = E
;
R th = Rs
Vth = E = 42 V
With reference to Fig. 5,
+ E
B
Fig. 6.
Chapter 2  Network Theorems for DC and AC Circuits
2. 109
Let us connect the resistance R across A and B of Thevenin’s equivalent as shown in Fig. 7.
∴ R = 15 Ω
A
E = 42 V
With reference to Fig. 7, by maximum power transfer theorem, for maximum power transfer to R the value of R should be equal to Rs.
Rs = 15
+ E
R
2 2 Maximum power, Pmax = E = 42 = 29.4 W 4R 4 # 15
Fig. 7.
B
(AU Dec’15, 16 Marks)
EXAMPLE 2.48 Determine the value of resistance that may be connected across terminals A and B so that maximum power is transferred from the circuit to the resistance. Also, estimate the maximum power transferred to the resistance.
2
5V
4
A
E+
10
8
20 V
SOLUTION The circuit of Fig. 1 should be replaced by Thevenin’s equivalent as shown below:
B
Fig. 1.
To find Thevenin’s voltage Vth
2
5V
4
> >
2+8 −8 H − 8 8 + 4 + 10 10 − 8 H − 8 22
∆ =
I1 20 > H = > H I2 0
20 V
I1
8
I2
+ 10I2 10
Vth
E
I1 20 > H = > H I2 0
_
10 − 8 = 10 # 22 − (− 8) 2 = 156 − 8 22
∆2 =
A +
E+
With reference to Fig. 2, the mesh basis matrix equation is,
B
Fig. 2.
10 20 = 10 # 0 − (− 8) # 20 = 160 −8 0
` I2 =
∆2 = 160 = 1.0256 A ∆ 156
With reference to Fig. 2 by KVL, we can write, Vth = 5 + 10 I 2 = 5 + 10 × 1.0256 ∴ Vth = 15.256 V To find Thevenin’s resistance Rth Let us replace the voltage sources with a short circuit and reduce the resulting network to a single equivalent resistance as shown below:
SC
8W
SC
4W
A
10 W
Þ Rth
Fig. 3.
B
2´8 2+8 = 1.6 W
A
A
10 W
Þ Rth
Fig. 4.
B
4 + 1.6 = 5.6 W
4W
2W
10 W Rth
Fig. 5.
B
Circuit Analysis
2. 110
Rth = Rs = 3.5897 A
R th = 5.6 # 10 = 3.5897 Ω 5.6 + 10
To find the value of R for maximum power transfer and Pmax Thevenin’s equivalent of the given circuit is shown in Fig. 6. Now, Thevenin’s equivalent is the voltage generator for the load that may be connected across A and B. ∴
E = Vth
;
Vth = E = 15.256 V
With reference to Fig. 5,
Fig. 6.
B
Rs = R th
Let us connect a load resistance R across A and B of Thevenin’s equivalent as shown in Fig. 7. Now, for maximum power transfer, the value of R should be equal to Rs.
A
E = 15.256 V
Rs = 3.5897
∴ R = 3.5897 Ω 2 Maximum power, Pmax = E 4R 2 = 15.256 = 16.2093 W 4 # 3.5897
In the circuit shown in Fig. 1, determine the maximum power delivered to RL, where RL = 100 W using Norton’s theorem. Also, determine the value of RL for maximum power transfer.
+ E
R
B
(AU June’16, 16 Marks)
EXAMPLE 2.49
+ E
RL
220
10 V +E
Fig. 7.
200
380
470
+ E
SOLUTION Let us remove the resistance RL and denote the two open Fig. 1. terminals by A and B as shown in Fig. 2. The voltage sources in the circuit of Fig. 2 are converted into current sources as shown in Fig. 3. The parallel resistances in Fig. 3 are converted into a single equivalent resistance as shown in Fig. 4. The current sources in Fig. 4 are converted into voltage sources in Fig. 5. Now short circuit the terminals A and B and the current through this short circuit is Norton’s circuit IN.
10 220 = 0.0455 A
Fig. 2.
380 W
Þ
B
470 W
+ 
380 W
220 W
A
200 W
200 W
B
5V
A
470 W
+ 
5 200 = 0.025 A
Fig. 3. ß 131.0345 W +
+ 
A
+ 
Fig. 5.
B

Ü
220 ´ 470 220 + 470 = 149.8551 W
Fig. 4.
380 ´ 200 380 + 200 = 131.0345 W
0.025 A

B
0.0455 A
+
A
0.025´131.0345 = 3.2759 V
149.8551 W
0.0455´149.8551 = 6.8184 V
10 V
220 W
5V
Chapter 2  Network Theorems for DC and AC Circuits
2. 111
With reference to Fig. 5, by KVL, we can write, 149.8551 IN + 131.0345 IN + 3.2759 = 6.8184 IN(149.8551 + 131.0345) = 6.8184  3.2759 ` IN =
6.8184 − 3.2759 = 0.0126 A 149.855 + 131.0345
To find Norton’s resistance Rn The voltage sources are replaced with a short circuit as shown in Fig. 6. Norton’s resistance is determined by using network reduction techniques as shown below: Rn 220 W
A
A
470 W
SC
Rn
200 W
B
380 W
Þ
S.C.
Fig. 6.
B
220 W
200 W
470 W
380 W
Fig. 7. ß Rn
A
Rn
B
A
Ü
B
149.8551+131.0345
220 ´ 470 220 + 470
200 ´ 380 200 + 380
= 280.8896 W
= 149.8551 W
= 131.0345 W
Fig. 9.
Fig. 8.
With reference to Fig. 9, we get, Norton’s resistance, Rn = 280.8896 W Norton’s equivalent A
In = 0.0126 A
Rn = 280.8896
B
Fig. 10. To find maximum power transfer Norton’s equivalent of the given circuit is shown in Fig. 11. Let us connect a load resistance R across A and B of Norton’s equivalent as shown in Fig. 12.
Circuit Analysis
2. 112 A
IL
280.8896 W
0.0126 A
Þ
Rn = 280.8896 W
In = 0.0126 A
A
RL = 100 W
B
B
Fig. 11.
Fig. 12.
By current division rule, IL = IN #
RN 280.8896 = 0.0126 # = 9.292 # 10 3 A 280.8896 + 100 RN # RL
Power, PL = IL2 RL = (9.292 × 103)2 × 100 = 8.6341 × 103 W = 8.6341 mW Now, for maximum power transfer the value of RL should be equal to Rn. ` Maximum power, Pmax = d
2 IN 2 n Rn = d 0.0126 n # 280.8896 2 2
= 11.1485 × 103 m = 11.1485 mW Note: When RL = Rn, the Norton’s current will divide equally between Rn and RL and so current through RL is IN/2 4
EXAMPLE 2.50
4
4
2
Determine the value of R for maximum power transfer to it and the maximum power.
12 V +E
4
R
+ E 10 V
2
SOLUTION The given circuit can be reduced to a single voltage source with a resistance in series with respect to terminals of load resistance R, by source transformation technique, as shown below: 4W
4W
2W
+
2W
R
]
12 V
+
4W
4W
4W
10 V
4W
Fig. 1.


Þ
12 4 = 3A
4W
2W
10 2 = 5A
R 2W
4W
Fig. 3.
Fig. 2.
ß
1W R + 
3 ´ 2 = 6V
Fig. 5.
+  5 ´ 1 = 5V
Þ
2W
4W
4W
4W
4W
3A
4 2 = 2W
R
Fig. 4.
2 2 = 1W
5A
Chapter 2  Network Theorems for DC and AC Circuits 4 + 2 = 6W
2. 113
4 + 1 = 5W
Þ 6 V +
6 = 1A 6
+  5V
R
6W
Fig. 6.
5 = 1A 5
5W
R
Fig. 7. ß
2.7273 W
Þ
R
5´6 5+6 = 2.7273 W
R
Þ
2 ´ 2.7273 + E = 5.4546 V 
1A + 1A = 2 A
A Rs
1A
6W
1A
5W
R
B
Fig. 10.
Fig. 9.
Fig. 8.
In Fig. 10, the given circuit has been reduced to the form of a voltage generator with respect to terminals of R. With reference to Fig. 10, The value of R for maximum power transfer = R s = 2.7273 Ω The maximum power, Pmax =
E 2 = 5.4546 2 = 2.7273 W 4#R 4 # 2.7273 10
EXAMPLE 2.51 Determine the value of R in the circuit of Fig. 1 for maximum power transfer to R from the rest of the circuit.
4
3
SOLUTION The given circuit should be replaced by Thevenin’s equivalent with respect to terminals of R as shown below:
2
Now, for maximum power transfer to R, the value of R should be equal to Rth. Hence, we have to find the value of Thevenin’s resistance Rth. 10 W
+ 20 V E
R
Fig. 1.
10 W Rth
Rth A
3W
3W
4W
Þ
A 2W
R B
Fig. 2.
+ 20 V 
A
4W A
Þ
Vth +
Þ
Vth +
R
+ 20 V 
2W
B
B
Fig. 3.
Fig. 4.
B
Fig. 5.
Circuit Analysis
2. 114 To find Thevenin’s resistance R th
Let us replace the voltage source with a short circuit and remove the resistance R and denote the resulting open terminals as A and B as shown in Fig. 6. The network of Fig. 6 is reduced to a single equivalent resistance as shown below: 10 W 3W
3W
4W
A
4W
10 W
Þ
A 2W
Rth
2W
SC Rth B
B
Fig. 6.
Fig. 7. ß A
Þ
3 + 1.6667 = 4.6667 W
3W
A
4W
3W
4W
Þ
A
4W
10 W Rth
Rth
B
Fig. 10.
Rth
B 10 ´ 2 = 1.6667 W 10 + 2
2W B
Fig. 9.
Fig. 8.
With reference to Fig. 10, we can write, R th = 4.6667 # 4 = 2.1539 Ω 4.6667 + 4
RESULT The value of R for maximum power transfer = 2.1539 Ω 5
EXAMPLE 2.52 Determine the value of R in the circuit of Fig. 1 for maximum power transfer to R from the rest of the circuit.
10
+ 20 V
E
SOLUTION The given circuit should be replaced by Thevenin’s equivalent with respect to terminals of R as shown below:
12 A
5
5
Now, for maximum power transfer to R, the value of R should be equal to Rth. Hence, we have to find the value of Thevenin’s resistance Rth.
R
4 8
Fig. 1.
Chapter 2  Network Theorems for DC and AC Circuits
2. 115
5W
5W 10 W
10 W
A

+
5W
12 A
A

+
20 V
20 V
5W
Þ
R
5W
12 A
4W
5W
4W 8W
8W B
B
Fig. 2.
Fig. 3. ß A
A Rth
Rth
Þ
Vth +
R
Vth +
B
B
Fig. 4.
Fig. 5. To find Thevenin’s resistance R th
Let us replace the voltage source with a short circuit and the current source with an open circuit as shown in Fig. 6. Remove the resistance R and denote the resulting open terminals as A and B as shown in Fig. 6. Now, the network of Fig. 6 is reduced to a single equivalent resistance as shown below: 5W
10 W
A
A
A SC 5W 5W
5W
5 = 2.5 W 2
5W
OC
Þ
4W
Rth
Þ Rth
4W
8W
8W
8W
B
B
B
Fig. 6.
Rth
4W
Fig. 7.
Fig. 8.
With reference to Fig. 8,
RESULT
R th = 2.5 + 4 + 8 = 14.5 Ω
The value of R for maximum power transfer = 14.5 Ω 10 W
EXAMPLE 2.53 Determine the load impedance that can be connected across terminals A and B for maximum power transfer to load impedance. Also, calculate the maximum power transferred to load.
A
5Ð0o A
j2 W
4W
2W
j4 W
~ B
Fig. 1.
Circuit Analysis
2. 116 SOLUTION
Let us convert the given circuit into Thevenin’s equivalent with respect to terminals A and B by using source transformation technique as shown below: 2 + j2 W
10 W
10 W
A
5Ð0 A o
j2 W
4W
2W
j4 W
A Convert current source to voltage source
Þ
~
4W
+ o 5Ð0 ´ (2 + j2) = 5 ´ (2 + j2) = 10 + j10 V 
~ j4 W
B
B
Fig. 3.
Fig. 2.
ß
Combine series impedance
12 + j2 W A 4W 12 + j2 W
~
Þ
10 + j10 12 + j2
j4 W
= 0.9459
A Convert voltage source to current source
4W
+ 10 + j10 V
~

j4 W
+ j0.6757 A
B
B
Fig. 4.
Fig. 5. ß
Combine parallel impedance 3.3425 + j2.2466 W A
A
0.9459 + j0.6757 A
~
Convert current source to voltage source
(12 + j2) ´ (4 + j4) 12 + j2 + 4 + j4 = 3.3425 + j2.2466 W
Þ
(0.9459 + j0.6757) ´ (3.3425 + j2.2466) = 1.6436 + j4.3836 V
Zth = Zs
+
~

Vth = E
B
B
Fig. 6.
Fig. 7.
Now, the circuit of Fig. 7 is Thevenin’s equivalent of the given circuit with respect to terminals A and B. Thevenin’s source is the voltage source for load connected across terminals A and B and Thevenin’s impedance is the source impedance.
Zs
A
+
`
E = 1.6436 + j4.3836 V Zs = 3.3425 + j2.2466 Ω
E
~
Let us connect a load impedance Z across terminals A and B of Thevenin’s equivalent as shown in Fig. 8. Now, for maximum power transfer, *
I
Z
E
* Z = _Zs i = _3.3425 + j2.2466i Ω = 3.3425 − j2.2466 Ω = 4.0273+ − 33.9 o Ω
B
Fig. 8.
Chapter 2  Network Theorems for DC and AC Circuits
2. 117
With reference to Fig. 8, we can write, I =
1.6436 + j4.3836 E = _3.3425 + j2.2466 i + _3.3425 − j2.2466i Zs + Z =
1.6436 + j4.3836 = 0.2459 + j0.6557 = 0.7003+69.4 o A 2 # 3.3425
Maximum power delivered to load, Pmax = I
2
# Real part of Z
= 0.70032 # 3.3425 = 1.6392 W
RESULT Load impedance across A and B for maximum power transfer = 3.3425 − j2.2466 Ω = 4.0273∠33.9o W Maximum power transferred to load = 1.6392 W
EXAMPLE 2.54 In the circuit of Fig. 1, determine the value of R so that maximum power is transferred to it.
SOLUTION
100Ð45o V
2W
j2 W
4W
+ R
j10 W
j4 W
~

Let us remove the resistance R and denote the resulting open terminals by A and B as shown in Fig. 2. The circuit of Fig. 2
Fig. 1.
should be converted into Thevenin’s equivalent with respect to
terminals A and B, as shown in Fig. 3. Let us connect the load resistance R across A and B as shown in Fig. 4. Now, by maximum power transfer theorem, the value of R should be equal to magnitude of source impedance Zs , for maximum power transfer. Here, Zs = Z th . 2W
4W
A
100Ð45o V
Zth = Zs
Zth
j2 W
A
+
A
+
j10 W
j4 W
~
Þ

~
+
Þ
Vth

~
R
Vth = E

B
B
Fig. 2.
B R = Zth = Zs
Fig. 3.
Fig. 4. To find Z th and the value of R for maximum power Let us replace the voltage source in the circuit of Fig. 2 with a short circuit as shown in Fig. 5. The network of Fig. 5 is reduced to a single equivalent impedance as shown below: 2W
4W
4W
j2 W
j2 W
SC
j4 W
j10 W
Þ Zth
2 ´ j4 2 + j4
j10 W
= 1.6 + j0.8
Þ
(4 + j2) + (1.6 + j0.8) = 5.6 + j2.8
j10 W Zth
Z th
B
B
B
Fig. 5.
A
A
A
Fig. 6.
Fig. 7.
Circuit Analysis
2. 118 With reference to Fig. 7, we can write, Z th =
_5.6 + j2.8 i # _− j10 i _5.6 + j2.8 i + _− j10 i
= 6.7308 − j1.3462 Ω = 6.8641+ − 11.3 o Ω Now, by maximum power transfer theorem, R = Z th = 6.8641 Ω
RESULT The value of R for maximum power transfer = 6.8641 Ω
EXAMPLE 2.55 In the circuit of Fig. 1, the load impedance Z has a fixed
Z = 2 + jX
4W
4W
resistance of 2 Ω and a variable reactance jX. Determine the 50Ð0o V
+
SOLUTION
+ j6 W
~
j4 W

~

50Ð90o V
value of the reactance jX for maximum power transfer to load.
Let us remove the load impedance Z and denote the resulting open terminals by A and B as shown in Fig. 2. The
Fig. 1.
circuit of Fig. 2 should be reduced to Thevenin’s equivalent with respect to terminals A and B as shown in Fig. 3. Let us connect the load impedance Z across terminals A and B as shown in Fig. 4.
A
B
+
~
Zth = Rs + jX s
4W
+ j6 W

j4 W
Rs + jXs
A
~

50Ð90o V
50Ð0o V
4W
A
+
Þ
Vth
+
Þ
~

Vth
Z = 2 + jX
~

B
B
Fig. 2.
Fig. 3.
Fig. 4.
Now, by maximum power transfer theorem, for maximum power transfer to load, jX = − jX s.
To find Z th and the value of jX for maximum power Let us replace the voltage sources in the circuit of Fig. 2 with a short circuit as shown in Fig. 5. The network of Fig. 5 is reduced to a single equivalent impedance as shown below:
Chapter 2  Network Theorems for DC and AC Circuits
2. 119
Zth
4W
SC
A
Zth
4W
B
A
SC
j4 W
j6 W
Þ
B
4 ´ j6 4 + j6
4 ´ ( j4) = 2  j2 W 4 + ( j4)
= 2.7692 + j1.8462 W
Fig. 6.
Fig. 5. With reference to Fig. 6, we can write, Z th = _2.7692 + j1.8462 i + _2 − j2 i = 4.7692 − j0.1538 Ω Here, Z th = Rs + jXs = 4.7692 − j0.1538 ` jXs = − j0.1538 For maximum power transfer to load, jX = − jX s = − (− j0.1538) = +j0.1538 Ω ∴ jX = j0.1538 Ω
RESULT For maximum power transfer to load, the value of jX = j0.1583 Ω
In the circuit of Fig. 1, determine the impedance that can be connected across terminals A and B for maximum power transfer. Also, estimate the maximum power.
10Ð45o A
EXAMPLE 2.56 j2 W
4W
~
4W A
SOLUTION Let us determine Thevenin’s equivalent of the given circuit with respect to terminals A and B as shown below:
j2 W
2W
B
To find Thevenin’s voltage Vth
Fig. 1.
In the given circuit, 4 Ω resistance is open and so no current will flow through it. Hence, there is no voltage across the 4 Ω resistance. The given circuit is redrawn as shown in Fig. 3. I 2
I2
I1 o
10Ð45 A
~
4W
4W + 2W
j2 W 4W
j2 W
4W
Vth
A No voltage + j2 W

I2
10Ð45o A
j2 W
~
Vth
_
+ Vth _
2W
Fig. 2. Fig. 3.
Vth
_ B
I2
B
A +
Circuit Analysis
2. 120 With reference to Fig. 3, by current division rule, o 4 40+45 o = 40+45 = 6 + j4 4 + _2 + j2 + j2 i 7.2111+33.7 o = 5.547+11.3 o A
I2 = 10+45 o #
Vth = I 2 # j2 = 5.547+11.3 o # j2 = 5.547+11.3 o # 2+90 o = 11.094+101.3 o V
To find Thevenin’s impedance Z th Let us replace the current source in the given circuit by an open circuit as shown in Fig. 4. The network of Fig. 4 is reduced to a single equivalent impedance as shown below:
OC
j2 W
4W
4W
4W
j2 W
4W
A
4W A
Þ
A
Þ j2 W
6 + j2 j2 W
2W
j2 W
2W
Z th Z th
Z th
B
B
B
Fig. 4.
Fig. 5.
Fig. 6.
With reference to Fig. 6, we can write, _6 + j2 i # j2 H + 4 = 70.4615 + j1.6923 A + 4 _6 + j2 i + j2 = 4.4615 + j1.6923 Ω
Z th = >
To find Z for maximum power and Pmax Zth a Zs
Thevenin’s equivalent of the given circuit is shown in Fig. 7. Now, Thevenin’s
A
equivalent is the voltage generator for the load that may be connected across A and B. +
` E = Vth = 11.094+101.3 o V
Vth a E
~
E
Zs = Z th = 4.4615 + j1.6923 Ω B
Let us connect a load impedance Z across A and B of Thevenin’s equivalent
Fig. 7.
as shown in Fig. 8. Now, for maximum power transfer to load, the load impedance Z should be equal to the complex conjugate of source impedance Zs . *
Zs
*
` Z = Zs = _4.4615 + j1.6923 i = 4.4615 − j1.6923 Ω
A
With reference to Fig. 8, we can write,
+ o
I =
E 11.094+101.3 = 4.4615 + j1.6923 + 4.4615 − j1.6923 Zs + Z o = 11.094+101.3 = 1.2433+101.3 o A 2 # 4.4615
E
~
I
Z
E
B
Fig. 8.
Chapter 2  Network Theorems for DC and AC Circuits
2. 121
2
Maximum power in the load, Pmax = I # Real part of Z = 1.24332 # 4.4615 = 6.8966 W
RESULT The load impedance for maximum power transfer, Z = 4.4615 − j1.6923 Ω Maximum power transferred to load, Pmax = 6.8966 W
EXAMPLE 2.57
(AU May’17, 16 Marks)
Find the current flowing in the 20 W resistance connected across terminals A and B of the circuit shown in Fig. 1 using Norton’s theorem.
A 5W
~
o
3Ð0 A
j2 W
8W
SOLUTION
Io 20 W
10 W
40Ð90oV
Let us remove the 20 + j5 W and denote the resultant open terminals as A and B as shown in Fig. 2. Now, the circuit of Fig. 2 should be replaced by Norton’s equivalent at terminals A and B.
j15 W
+ j4 W
~
_
B
Fig. 1. To find Norton’s current In Let us short circuit the terminals A and B in the circuit of Fig. 2 as shown in Fig. 3. The current flowing through the short circuit is Norton’s current. Let us assume the direction of Norton’s current as A to B. A
A 5W
8W
~
3Ð0oA
5W
j2 W
8W
3Ð0oA
~
j2 W
In
SC 10 W
40Ð90oV = j40 V
10 W +
+ j4 W
~
_
j40 V
j4 W
~
_
B
B
Fig. 3.
Fig. 2. Let us calculate Norton’s current by superposition theorem. Let, I ln = Current when the j40 V source alone is acting. I lln = Current when the 3 A source alone is acting. To find the response I ln when j40 V source is acting alone
The 3 A current source is replaced with a short circuit as shown in Fig. 4. Now the 10 + j4 W impedance is shortcircuited and so it is removed and the circuit is redrawn as shown in Fig. 5. 5 A A
SC
5
8
Ej2 8
In‘
Ej2 In‘
10 +
j40V
~
+
j40V E
j4
_
B
B
Fig. 4.
Fig. 5.
Circuit Analysis
2. 122
A
With reference to Fig. 6, by Ohm’s law we get, j40 = − 1.1764 + j12.7058 A 3.1214 − j0.289
I ln =
5 ´ (8  j2) 5 + 8  j2 = 3.1214  j0.289 W
+
j40V 
In‘
B
To find the response I lln when the 3 A source is acting alone
Fig. 6.
The j40 V source is replaced with a short circuit as shown in Fig. 7. The circuit of Fig. 7 is redrawn as shown in Fig. 8. The 5 W resistance is shortcircuited and so entire current 3 A flows through short circuit as shown in Fig. 8. In‘‘ = 3 A
I=0
5W
8W
3Ð0oA
~
j2 W
~
5W
o
3Ð0 A
In‘‘
In‘‘
10 W SC
8W
10 W
j2 W
j4 W
j4 W
Fig. 7.
Fig. 8.
` I lln = 3 A A
To find the response In when both the sources are acting 5
By the superposition theorem,
8
Ej2
In = I ln + I lln = − 1.1764 + j12.7058 + 3 = 1.8236 + j12.7058 A
10 Zn
SC
j4 B
Fig. 9. To find Norton’s impedance Zn A
Let us replace the voltage source with a short circuit and the current source with an open circuit as shown in Fig. 9. In
With reference to Fig. 9, we can write, Norton's impedance, Zn = 5 +
Zn
(8 − j2) # (10 + j4) = 5 + 4.9024 + j0.122 8 − j2 + 10 + j4
B
Fig. 10.
= 9.9024 + j0.122 W
A Io
Norton’s equivalent at AB and current Io
20
The Norton’s equivalent is shown in Fig. 10.
In
Zn
j15
Let us connect the 20 + j15 W impedancce across A and B as shown in Fig. 11.
B
Fig. 11.
Chapter 2  Network Theorems for DC and AC Circuits
2. 123
By current division rule, we get, I o = In #
Zn Zn + 20 + j5
= (1.8236 + j12.7058) #
9.9024 + j0.122 9.9024 + j0.122 + 20 + j15
= (1.8236 + j12.7058) # (0.2654 − j0.1301) = 2.137 + j3.1349 A = 3.794 ∠ 55.7o A
EXAMPLE 2.58 10 W
o
+
o
20Ð30 V
reactance of +j2 Ω and a variable resistance R. Determine the
10Ð45 A
In the circuit of Fig. 1, the load impedance Z has a fixed value of R for maximum power transfer.
SOLUTION
~
4W
Z

The 20 ∠ 30 o V voltage source in series with 10 Ω is
~
Fig. 1.
converted to an equivalent current source in Fig. 2.
can be combined to give a single equivalent current source and the 10 Ω and 4 Ω resistances in parallel
o
10Ð45 A
The circuit of Fig. 2 is redrawn as shown in Fig. 3. In this circuit, the current sources in parallel
20Ð30o 10
10 W
~
4W
Z
o
= 2Ð30 A
~
can be combined to give a single equivalent resistance as shown in Fig. 4.
Fig. 2. ß
The current source in parallel with
o
o
2Ð30 A
converted to a voltage source as shown in Fig. 5. With reference to Fig. 5, we can write,
10Ð45 A
2.8571 Ω resistance in the circuit of Fig. 4 is
~
10 W
~
o I = 34.1229+42.5 2.8571 + R + j2
4W
Z
Fig. 3. ß
2.8571W +
~
I
Z = R + j2
Þ
11.9431Ð42.5o ´ 2.8571 = 34.1226Ð42.5o V
2Ð30o + 10Ð45o = 11.9431Ð42.5o A

Fig. 5. o ` I = I = 34.1226+42.5 = 2.8571 + R + j2
~
10 ´ 4 10 + 4 = 2.8571W
Fig. 4. 34.1226 = 2 _2.8571 + R i + 22
34.1226 2 _2.8571 + R i + 4
Z
Circuit Analysis
2. 124 Let, P = Power delivered to load. Now, P = I =
2
# Real part of Z
34.1226 2 1164 R #R = 2 2 _2.8571 + R i + 4 _2.8571 + R i + 4
The condition for maximum power can be obtained by differentiating P with respect to R and equating (dP/dR) = 0.
9_2.8571 + Ri2 + 4 C # 1164 − 1164 R # 2 _2.8571 + Ri ` dP = 2 dR 9_2.8571 + Ri2 + 4 C
d (uv) = v du −2 u dv v
For dP = 0, the numerator of dP should be equal to zero. dR dR 2
∴ 1164[ (2.8571 + R) + 4] − 2 × 1164 R (2.8571 + R) = 0 2
2 × 1164 R (2.8571 + R) = 1164[ (2.8571 + R) + 4] On dividing either side by 1164, we get, 2
2 R (2.8571 + R) = (2.8571 + R) + 4 2
2
5.7142 R + 2R = 8.163 + 5.7142 R + R + 4 2
2
∴ 5.7142 R + 2R − 5.7142 R − R = 8.163 + 4 ∴ R2 = 12.163
⇒ R = 12.163 = 3.4875 Ω
Note : Here, the value of R for maximum power transfer is also given by, R =
2.85712 + 22 = 3.4875 Ω
RESULT The value of R for maximum power transfer = 3.4875 Ω
EXAMPLE 2.59 In the circuit of Fig. 1, the phase angle θ of the voltage source, 5∠θo V is continuously variable. Find the value of θ for maximum power transfer to 10 Ω resistance.
j8 W
j8 W
+
+ o
5Ðq V
10 W
~

SOLUTION
5W
Let us assume two mesh currents as shown in Fig. 2.
o
10Ð0 V 
~
5W
Fig. 1.
Let, 5∠θ V = 5 cosθ + j5 sinθ V o
10∠0 o V = 10 cos 0 o + j10 sin 0 o = 10 V With reference to Fig. 2, the mesh basis matrix equation is,
j8 W o
5Ðq V
j8 W +
10 W
~

15 − j8 10 H > 10 15 + j8
I
+
5 cos θ + j5 sin θ I1 H > H = > 10 I2
I1
I2
5W
5W
Fig. 2. 15 − j8 10 ∆ = 10 15 + j8
2
2
~
= _15 − j8 i # _15 + j8 i − 10 # 10 = 15 + 8 − 100 = 189

o
10Ð0 V = 10V
Chapter 2  Network Theorems for DC and AC Circuits ∆1 =
5 cos θ + j5 sin θ 10
∆2 =
15 − j8 10
Now, I1 =
∆1 ∆
;
2. 125
10 = ^5 cos θ + j5 sin θh # ^15 + j8h − 10 # 10 15 + j8 = 75 cos θ + j40 cos θ + j75 sin θ − 40 sin θ − 100 = ^75 cos θ − 40 sin θ − 100h + j^40 cos θ + 75 sin θh
5 cos θ + j5 sin θ = _15 − j8 i # 10 − _5 cos θ + j5 sin θ i # 10 10 = 150 − j80 − 50 cos θ − j50 sin θ = _150 − 50 cos θ i + j _− 50 sin θ − 80 i I2 =
∆2 ∆
Let, I = current through 10 Ω resistance. With reference to Fig. 2, by KCL, we can write, I = I1 + I 2 =
∆1 ∆ + 2 = 1 7 ∆1 + ∆2 A ∆ ∆ ∆
=
1 7_75 cos θ − 40 sin θ − 100 i + j _40 cos θ + 75 sin θ i + _150 − 50 cos θ i + j _− 50 sin θ − 80 iA 189
=
1 7_25 cos θ − 40 sin θ + 50 i + j _40 cos θ + 25 sin θ − 80 iA 189
= 25 7_cos θ − 1.6 sin θ + 2i + j _1.6 cos θ + sin θ − 3.2iA 189 ` I = I
= 25 189
2
2
_cos θ − 1.6 sin θ + 2 i + _1.6 cos θ + sin θ − 3.2 i
Let, P = Power delivered to 10 Ω resistance. 2 9_cos θ − 1.6 sin θ + 2i2 + _1.6 cos θ + sin θ − 3.2i2 C Now, P = I2 # 10 = 10 # 25 2 189 2 2 = 0.175 9_cos θ − 1.6 sin θ + 2i + _1.6 cos θ + sin θ − 3.2i C
The condition for maximum power transfer can be obtained by differentiating P with respect to θ and solving the equation obtained by equating (dP/dθ) = 0. ` dP = 0.175 72 _cos θ − 1.6 sin θ + 2i # _− sin θ − 1.6 cos θ i + 2 _1.6 cos θ + sin θ − 3.2 i # _− 1.6 sin θ + cos θ iA dθ = 0.175 # 2 [− cos θ sin θ − 1.6 cos2 θ + 1.6 sin2 θ + 2.56 cos θ sin θ − 2 sin θ − 3.2 cos θ − 2.56 cos θ sin θ + 1.6 cos 2 θ − 1.6 sin 2 θ + cos θ sin θ + 5.12 sin θ − 3.2 cos θ] = 0.35 73.12 sin θ − 6.4 cos θ A On equating dP = 0, we get, dθ 0.35 [3.12 sin θ – 6.4 cos θ] = 0 ∴ 3.12 sin θ – 6.4 cos θ = 0 ` 3.12 sin θ = 6.4 cos θ ⇒ ∴ θ = tan
–1
sin θ = 6.4 cos θ 3.12
(2.0513) = 64 o
RESULT The value of θ for maximum power transfer = 64 o
⇒ tan θ = 2.0513
Circuit Analysis
2. 126
2.6.4 Reciprocity Theorem
(AU June’14, ’16 & Dec’16, 2 Marks)
The reciprocity theorem states that in a linear, bilateral, single source circuit, the ratio of excitation to response is constant when the position of excitation and response are interchanged. Here, the excitation is either a voltage source or current source and the response is either a current or voltage in an element (R, L or C). “The reciprocity theorem will be satisfied only by circuits or networks which do not have dependent sources”. In circuits without dependent sources, the Z and Y matrices formed for mesh and node basis analysis will be symmetric, i.e., the element of matrices Z jk = Z kj and Yjk = Ykj . The networks which satisfy the reciprocity theorem are called reciprocal networks.
2.6.5 Reciprocity Theorem Applied to Mesh Basis Circuit Consider a mesh basis circuit with a single voltage source E as shown in Fig. 2.59. Let I be the current in meshj when the source is in meshk as shown in Fig. 2.59(a). The reciprocity theorem implies that the same current I will be produced in meshk, if the source is shifted to meshj as shown in Fig. 2.59(b). It must be noted that currents in other parts of the circuit may not be the same. R1
R1
R2
1
R3
2
1
R5
1’
2 RL
RL
R4 Meshk
R3
I
I E +E
R2
Meshj 2’
Fig. a : Source in meshk and response in meshj.
R4 Meshk
Meshj
R5
1’
+ E E
2’
Fig. b : Source in meshj and response in meshk.
Fig. 2.59 : Mesh basis circuit to demonstrate the reciprocity theorem. Proof by mesh analysis : Consider a 2port resistive network without sources shown in Fig. 2.60. In order to prove the reciprocity theorem we can connect a voltage source at port1 and short circuit port2 to observe the current response. Then the source can be shifted to port2 and the same current response can be observed in shortcircuited port1.
Port1
Twoport resistive network
Port2
Fig. 2.60.
Case i : Excitation in port1 and response at port2 Let us connect a voltage source E to port1 and short circuit the terminals of port2 as shown in Fig. 2.61. Let I be the current through short circuit, which is the response due to excitation, E. In the circuit of Fig. 2.61, the response I due to excitation E can be solved by mesh analysis. Let us consider two meshes meshk and meshj as shown in Fig. 2.61. Now the response, I = Ij.
I Meshk + E E
Ik
Twoport resistive network
Meshj SC Ii Port2
Port1
Fig. 2.61.
In mesh analysis, the current in jth mesh Ij is given by (Refer to equation 1.23 in Chapter 1), Ij =
∆1j ∆2j ∆3j ∆kj E + E + E + ..... + E + ..... ∆ 11 ∆ 22 ∆ 33 ∆ kk
.....(2.88)
Chapter 2  Network Theorems for DC and AC Circuits
2. 127
Since the circuit of Fig. 2.61, has only one source in meshk, E11 = E22 = E33 = ..... = 0 and Ekk = E Hence, equation (2.88) can be written as, ∆kj ∆kj E = E ∆ kk ∆
Ij = `
The response, I = I j =
∆kj E ∆
..... (2.89)
From equation (2.89), the ratio of excitation to response is, E = ∆ I ∆kj
.....(2.90)
Case ii : Excitation in port2 and response at port1 Let us change the excitation source E to meshj as shown in Fig. 2.62, and estimate the current in meshk. [In meshk the voltage source is replaced with its internal impedance. Since the source is ideal, the internal impedance is zero and so it is replaced with a short circuit.] Now the response, I = Ik.
I Meshk SC IK
In mesh analysis the current in k mesh, I k is given by (Refer to equation 1.23 in Chapter 1), ∆ jk ∆1k ∆ ∆ E + 2k E22 + 3k E33 + ..... + E + ..... ∆ 11 ∆ ∆ ∆ jj
Meshj Ij
+ E E
Port2
Port1
th
Ik =
Twoport resistive network
Fig. 2.62.
.....(2.91)
Since the circuit of Fig. 2.62 has only one source in meshj, E 11 = E22 = E33 = ..... = 0 and Ej j = E Hence, equation (2.91) can be written as, Ik =
∆ jk ∆ jk E = E ∆ jj ∆
` The response, I = Ik =
∆ jk E ∆
..... (2.92)
From equation (2.92), the ratio of excitation to response is, E = ∆ I ∆ jk
..... (2.93)
Conclusion When the twoport network does not have dependent sources ∆ kj = ∆jk , equations (2.90) and (2.93) are the same. Hence, the reciprocity theorem is proved.
2.6.6 Reciprocity Theorem Applied to Node Basis Circuit Consider a node basis circuit with a single current source I s as shown in Fig. 2.63. Let, V be the voltage in nodej when the current source is connected between nodek and reference as shown in Fig. 2.63(a) . The reciprocity theorem implies that the same voltage V will exist in nodek if the source is shifted to nodej as shown in Fig. 2.63(b). It must be noted that the voltages in other parts of the circuit may not be the same.
Circuit Analysis
2. 128
1
Nodek
Nodej R2
R1 Is
R4
1’
R5
R3 R6
Reference node
2 +
+
V
V
_
_
2’
1’
Fig. a : Source in nodek and response in nodej.
Nodek
1
Nodej R2
R1 R4
2
R3 Is
R6
R5
2’
Reference node
Fig. b : Source in nodej and response in nodek.
Fig. 2.63 : Node basis circuit to demonstrate the reciprocity theorem. Proof by node analysis: Consider a twoport resistive network without sources shown in Fig. 2.64. In order to prove the reciprocity theorem we can connect a current source at port1 and observe the open circuit voltage at port2. Then the source can be shifted to port2 and the same open circuit voltage can be observed in port1.
Twoport resistive network
Port1
Fig. 2.64.
Case i : Excitation in port1 and response at port2 Let us connect a current source, I s to port1 as shown in Fig. 2.65. Let the voltage across the terminals of port2 be V, which is the response due to excitation Is. In the circuit of Fig. 2.65, the response V due to excitation I s can be solved by node analysis. Let us consider two nodes, nodek and nodej as shown in Fig. 2.65. Now the response, V = Vj.
Port2
Nodej
Nodek
+ Is
Vk
Twoport resistive network
E Port1
In node analysis, the voltage in jth node Vj is given by (Refer to equation 1.37 in Chapter 1), ∆l kj ∆l 1j ∆l 2j ∆l 3j Vj = I + I + I + ..... + I + ..... ∆l 11 ∆l 22 ∆l 33 ∆l kk
+
+
Vj
V
E
E
Port2
Fig. 2.65. ..... (2.94)
Since the circuit of Fig. 2.65, has only one source in nodek, I11 = I22 = I33 = ..... = 0 and Ikk = Is Hence, equation (2.94) can be written as, Vj =
∆l kj ∆l kj I = I ∆l kk ∆l s
+ ∆l kj Is V l ∆ E From the above equation the ratio of excitation to response is, Is ..... (2.95) = ∆l V ∆l kj Case ii : Excitation in port2 and response at port1
` The response, V = Vj =
Nodej
Nodek
+ Vk
Twoport resistive network
E
+ Vj
Is
E Port2
Port1
Fig. 2.66.
Let us change the excitation source to nodej as shown in Fig. 2.66, and estimate the voltage at nodek. [In nodek the current source is replaced with its internal impedance. Since the source is ideal, the internal impedance is infinity and so it is replaced with an open circuit.] Now the response, V = Vk. In node analysis the voltage in nodek, Vk is given by (Refer to equation 1.37 in Chapter 1), Vk =
∆l jk ∆l 1k ∆l ∆l I + 2k I22 + 3k I33 + ..... + I + ..... ∆l 11 ∆l ∆l ∆l jj
..... (2.96)
Chapter 2  Network Theorems for DC and AC Circuits
2. 129
Since the circuit of Fig. 2.66, has only one source in nodej, I11 = I22 = I33 = ... = 0 and Ijj = Is Hence, equation (2.96) can be written as, Vk =
∆l jk ∆l jk I = I ∆l jj ∆l s
∆l jk I ∆l s From the above equation the ratio of excitation to response is, ` The response, V = Vk =
..... (2.97)
Is = ∆l V ∆l jk Conclusion When the twoport network does not have dependent sources ∆l kj = ∆l same. Hence, the reciprocity theorem is proved.
jk
, equations (2.95) and (2.97) are the
EXAMPLE 2.60
2
Prove the reciprocity theorem for the twoport network of Fig. 1. 1
SOLUTION
4
1
2
MethodI : Proof by mesh analysis Port1
Let us connect a voltage source of E volts to port1 and short circuit the port2 as shown in Fig. 2. Let, I be the current through short circuit which is the response due to excitation E.
Port2
5
Case i : Excitation in port1 and response at port2
2’
1’
Fig. 1. 2
Let us assume three mesh currents I1, I2 and I3 as shown in Fig. 2. Now, the response I = I2. With reference to Fig. 2, the mesh basis matrix equation is, R V R V R V − 1 W SI1 W SE W S1 + 5 − 5 S −5 4 + 5 − 4 W SI 2 W = S 0 W S0 W S − 1 − 4 1 + 2 + 4 W SI W 3 T X T X T X R V R V R V 6 5 1 I E − − S W S W S 1W S − 5 9 − 4 W SI 2 W = S 0 W S0 W S − 1 − 4 7 W SI W 3 T X T X T X 6 −5 −1 ∆ = −5 9 −4 −1 −4 7
E +E
I1
5
Fig. 2.
+ _− 1 i # 7_− 5 # _− 4 ii − _− 1 # 9 iA
= 0 − E # 7_− 5 # 7i − _− 1 # _− 4iiA + 0 = 39E
` The response, I = I2 =
∆2 = 39E ∆ 58
The ratio of excitation to response = E = 58 I 39
4 I
2 = 6 # 9_9 # 7 i − _− 4 i C − _− 5 i # 7_− 5 # 7 i − _− 1 # _− 4 iiA
= 282 − 195 − 29 = 58 6 E −1 ∆2 = − 5 0 − 4 −1 0 7
I3 1
I2
SC
Circuit Analysis
2. 130 Case ii : Excitation in port2 and response at port1
2
Let us interchange the positions of source and response as shown Ic
in Fig. 3. Let us assume mesh currents I a , I b and I c as shown in Fig. 3. Now the response, I = I b. With reference to Fig. 3, the mesh basis matrix equation is, R V R V R V − 4 W SIa W SE W S5 + 4 − 5 S −5 5 + 1 − 1 W SIb W = S 0 W S0 W S − 4 − 1 1 + 4 + 2 W SI W c T X T X T X R V R V R V SE W S 9 − 5 − 4 W SIa W S − 5 6 − 1 W SIb W = S 0 W S0 W S − 4 − 1 7 W SI W c T X T X T X
1
4
I
SC
5
Ib
+ E E
Ia
Fig. 3.
9 −5 −4 2 = 9 # 9_6 # 7 i − _− 1 i C − _− 5 i # 7_− 5 # 7i − _− 4 # _− 1iiA ∆ = −5 6 −1 + _− 4i # 7_− 5 # _− 1ii − _− 4 # 6iA −4 −1 7 = 369 − 195 − 116 = 58 9 E −4 = 0 − E # 7_− 5 # 7i − _− 4 # _− 1iiA + 0 ∆b = − 5 0 − 1 39E = −4 0 7 ` The response, I = Ib =
∆b = 39E ∆ 58
The ratio of excitation to response = E = 58 I 39
Conclusion It is observed that the ratio of excitation to response is the same when the positions of excitation and response are interchanged. Hence, the reciprocity theorem is proved. Method II : Proof by node analysis
2
Case i : Excitation in port1 and response at port2 Let us connect a current source of I s amperes to port1 and open circuit the port2 as shown in Fig. 4. Let, V be the voltage across the open terminals of port2, which is the response due to excitation Is .
V1
Is
1
V3 4
5
V2
+
V
Let us assume three node voltages V 1, V2 and V3 as shown in Fig. 4. Now the response, V = V2. With reference to Fig. 4, the node basis matrix equation is, R V R V R V S Is W S1 + 1 − 1 W S V1 W −1 1W S W 2 S W S1 2 S −1 1 + 1 − 1 W SV2 W = S 0 W S W S 4W S W 2 4 2 S W 1 1 +1 +1W S W S −1 − S0 W S W S 4 1 4 5 W V3 1 T X T X T X R V R V R V 1 . 5 0 . 5 1 V I − − s 1 S W S W S W S − 0.5 0.75 − 0.25 W S V2 W = S 0 W S0 W S − 1 − 0.25 1.45 W S V W 3 T X T X T X
E Reference node
Fig. 4.
Chapter 2  Network Theorems for DC and AC Circuits 1.5 − 0.5 −1 ∆l = − 0.5 0.75 − 0.25 − 1 − 0.25 1.45
2. 131
= 1.5 # 9_0.75 # 1.45 i − _− 0.25 i C − _− 0.5 i # 7_− 0.5 # 1.45 i − _− 1 # _− 0.25 iiA + _− 1 i # 7_− 0.5 # _− 0.25 ii − _− 1 # 0.75 iA 2
= 1.5375 − 0.4875 − 0.875 = 0.175 1.5 Is −1 = 0 − Is # 7_− 0.5 # 1.45 i − _− 1 # _− 0.25 iiA + 0 ∆l2 = − 0.5 0 − 0.25 0.975 Is − 1 0 1.45 = ` The response, V = V2 =
∆l 2 0.975 Is = ∆ 0.175
The ratio of excitation to response = Is = 0.175 = 0.1795 V 0.975 Case ii : Excitation in port2 and response at port1
2
Let us interchange the positions of source and response as shown in Fig. 5. Let us assume node voltages Va, Vb and Vc as shown in Fig. 5. Now the response, V = Vb. With reference to Fig. 5, the node basis matrix equation is, R V R V R V S Is W S1 + 1 − 1 W S Va W −1 4W S W 2 S W S4 2 S −1 1 + 1 − 1 W S Vb W = S 0 W S W S 1W S W 2 1 2 S W S −1 − 1 1 + 1 + 1 WW SS V WW S0 W S 1 1 4 5 4 c T X T X T X
+
Vb
V
1
Vc 4
Va
5
Is
E Reference node
Fig. 5.
R V R V R V SIs W S 0.75 − 0.5 − 0.25 W S Va W S − 0.5 1.5 − 1 W S Vb W = S 0 W S0 W S − 0.25 − 1 1.45 W S V W c T X T X T X ∆l =
∆lb =
0.75 − 0.5 − 0.25 2 = 0.75 # 9_1.5 # 1.45i − _− 1 i C − _− 0.5 i # 7_− 0.5 # 1.45 i − 0.5 1.5 −1 − _− 0.25 # _− 1 iiA + _− 0.25 i # 7_− 0.5 # _− 1 ii − _− 0.25 # 1.5 iA − 0.25 − 1 1.45 = 0.88125 − 0.4875 − 0.21875 = 0.175 0.75 Is − 0.25 = 0 − Is # 7_− 0.5 # 1.45 i − _− 0.25 # _− 1 iiA + 0 − 0.5 0 −1 − 0.25 0 1.45 = 0.975 Is
` The response, V = Vb =
∆lb 0.975 Is = ∆l 0.175
The ratio of excitation to response = Is = 0.175 = 0.1795 V 0.975
Conclusion It is observed that the ratio of excitation to response is the same when the positions of excitation and response are interchanged. Hence, the reciprocity theorem is proved.
Circuit Analysis
2. 132
3
EXAMPLE 2.61 2
In the circuit of Fig. 1, calculate I x. Prove the reciprocity theorem by interchanging the position of the 10 V source and Ix.
4
4
SOLUTION
10 V
+ E
Ix 5
Case i : To solve Ix in the given circuit
7
Let us assume three mesh currents as shown in Fig. 2. Now the
Fig. 1.
response, I x = I1 − I2
3
With reference to Fig. 2, the mesh basis matrix equation is, R V −5 −4W S2 + 4 + 5 S −5 5 + 4 + 7 −4W S −4 −4 3 + 4 + 4W T X R V R V R V 11 5 4 I 10 − − 1 S W S W S W S − 5 16 − 4 W SI 2 W = S 0 W S 0W S − 4 − 4 11 W SI W 3 T X T X T X
R V R V S10 W SI1 W SI 2 W = S 0 W SI W S 0W 3 T X T X
2 I3
10 V
+ E
Ix 5 I2
I1
..... (1)
11 − 5 − 4 = 11 # 7(16 # 11) − (− 4) 2 A − (− 5) # 7(− 5 # 11) − (− 4) 2 A ∆ = − 5 16 − 4 + (− 4) # 7(− 5 # (− 4)) − (− 4 # 16) A − 4 − 4 11 = 1760 − 355 − 336 = 1069
∆1 =
4
4
7
Fig. 2.
10 − 5 − 4 = 10 # 7(16 # 11) − (− 4) 2 A − 0 + 0 0 16 − 4 0 − 4 11 = 1600
11 10 − 4 = 0 − 10 # 7(− 5 # 11) − (− 4) 2 A + 0 ∆2 = − 5 0 − 4 − 4 0 11 = 710 I1 =
∆1 = 1600 1069 ∆
;
I2 =
∆2 = 710 1069 ∆
` The respone, I x = I1 − I2 = 1600 − 710 = 1600 − 710 = 890 = 0.8326 A 1069 1069 1069 1069 Case ii : To prove the reciprocity theorem by interchanging the positions of source and response Let us interchange the positions of source and response as shown in Fig. 3. Let us assume mesh 3
currents I a , I b and Ic as shown in Fig. 3. Now, the response, I x = Ia. With reference to Fig. 3, the mesh basis matrix equation is, R V R V R V −5 − 4 W SIa W S 10 W S2 + 4 + 5 S S W S W −5 5 + 4 + 7 − 4 Ib = − 10 W S 0W S −4 − 4 3 + 4 + 4 W SIc W T X T X T X R V R V R V 11 5 4 I 10 − − a S W S W S W S − 5 16 − 4 W SIb W = S − 10 W ..... (2) S 0W S − 4 − 4 11 W SI W c T X T X T X
2 Ic
Ix
4
4
+ 10 V E
Ia
5
Fig. 3.
Ib
7
Chapter 2  Network Theorems for DC and AC Circuits
2. 133
On comparing equations (2) and (1), we can say that the ∆ is same in both the case. ∴ ∆ = 1069 10 − 5 − 4 = 10 # 7(16 # 11) − (− 4) 2 A − (− 5) # 7(− 10 # 11) − 0) A ∆a = − 10 16 − 4 − 4 # 7(− 10 # (− 4)) − 0 A 0 − 4 11 = 1600 − 550 − 160 = 890 Now the response, I x = Ia =
∆a = 890 = 0.8326 A 1069 ∆
Here, the response I x remains the same after interchanging the positions of source and response. Hence, the reciprocity theorem is proved. 2
EXAMPLE 2.62 In the circuit of Fig. 1, calculate Vx. Prove the reciprocity theorem by interchanging the positions of the 12 A source
4
5
and V x.
SOLUTION
12 A
10
+ Vx 1 E
2
Case i : To solve Vx in the given circuit
Fig. 1.
Let us assume three node voltages as shown in Fig. 2. Now the response, Vx = V2. With reference to Fig. 2, the node basis matrix equation is, 2
R S1 + 1 + 1 S 4 10 2 S −1 S 4 S 1 − S 2 T
−1 4 1 +1 +1 4 1 5 −1 5
V −1 W 2W −1 W 5W 1 +1 +1W 5 2 2W X
R V R V R V S12 W S 0.85 − 0.25 − 0.5 W S V1 W S − 0.25 1.45 − 0.2 W S V2 W = S 0 W S − 0.5 − 0.2 1.2 W S V W S 0W 3 T X T X T X
R V R V S V1 W S 12 W S W S W S W = S W S V2 W S 0 W S W S W S V3 W S 0 W T X T X
4
V1
12 A
..... (1)
10
V2
5
+ Vx 1 E
V3
2
Fig. 2.
0.85 − 0.25 − 0.5 2 = 0.85 # 9_1.45 # 1.2i − _− 0.2i C − _− 0.25i # 7_− 0.25 # 1.2i − (− 0.5 # (− 0.2)) A ∆l = − 0.25 1.45 − 0.2 + _− 0.5i # 7_− 0.25 # _− 0.2ii − _− 0.5 # 1.45iA − 0.5 − 0.2 1.2 = 1.445 − 0.1 − 0.3875 = 0.9575
0.85 12 − 0.5 = 0 − 12 # 7_− 0.25 # 1.2i − (− 0.5 # (− 0.2)) A + 0 ∆l2 = − 0.25 0 − 0.2 − 0.5 0 1.2 = 4.8 ` The response, Vx = V2 =
∆l 2 4.8 = = 5.0131V 0.9575 ∆l
Circuit Analysis
2. 134
Case ii : To prove the reciprocity theorem by interchanging the positions of source and response Let us interchange the positions of source and response as shown in Fig. 3. Let us assume node voltages as shown in Fig. 3. Now the response, Vx = Va. With reference to Fig. 3, the node basis matrix equation is, R V R V R V S 0 W S1 + 1 + 1 −1 − 1 W S Va W 2W S W 4 S W S 4 10 2 S −1 1 +1 + 1 − 1 W S Vb W = S 12 W S W S 5W S W 4 4 1 5 S W S −1 − 1 1 + 1 + 1 WW SS V WW S S 5 5 2 2 2 0 W c T X T X T X R V R V R V 0 . 85 0 . 25 0 . 5 V 0 − − S W S W S aW S − 0.25 1.45 − 0.2 W S Vb W = S12 W ..... (2) S 0W S − 0.5 − 0.2 1.2 W S V W c T X T X T X On comparing equations (1) and (2), we can say that the ∆’ remains the same.
2
4 Va + Vx 10 E 12 A
5
Vb
Vc
2
1
Fig. 3.
∴ ∆’ = 0.9575 0 − 0.25 − 0.5 = 0 − (− 0.25) # 712 # 1.2 − 0 A + (− 0.5) # 712 # (− 0.2) − 0 A ∆la = 12 1.45 − 0.2 0 − 0.2 1.2 = 3.6 + 1.2 = 4.8 ∆l a 4.8 ` The response, Vx = Va = = = 5.0131V ∆l 0.9575 Here, the response Vx remains the same after interchanging the positions of source and response. Hence, the reciprocity theorem is proved. 8W
EXAMPLE 2.63
Ix o
50Ð30 V
In the circuit of Fig. 1, compute I x . Demonstrate the reciprocity theorem by interchanging the positions of the source and I x .
8W
+ j8 W
j4 W
~
3W

SOLUTION Case i : To solve I x in the given circuit
Fig. 1. 8W
Let us assume three mesh currents I1, I 2 and I3 as shown in Fig. 2. Now, the response, I x = I3 .
Here, 50∠30o = 50 cos30o + j50sin30o = 43.3013 + j25 V R V R V 0 W SI1 W S8 + j4 − j4 S − j4 8 − j4 j8 W SI 2 W S 0 j8 3 − j8 W SI3 W T X T X 8 + j4 − j4 0 ∆ = j8 − j4 8 − j4 0 j8 3 − j8
= = = =
Ix o
50Ð30 V
With reference to Fig. 2, the mesh basis matrix equation is, R V R V R V S50+30 o W 0 W SI1 W − j4 S8 + j4 S S − j4 8 + j4 − j8 − (− j8) W SI 2 W = 0 WW S S W S W S 0 0 W − (− j8) 3 − j8 I3 T X T X T X
8W
+ j8 W
j4 W
~
3W

I1
I2
I3
Fig. 2.
R V S 43.3013 + j25 W S 0W .....(1) S 0W T X (8 + j4) # 7(8 − j4) # (3 − j8) − (j8) 2 A − (− j4) # 7 − j4 # (3 − j8) − 0 A + 0 752 − j384 + 48 − j128 800 − j512
Chapter 2  Network Theorems for DC and AC Circuits
∆3 =
2. 135
8 + j4 − j4 43.3013 + j25 = 0 − 0 + (43.3013 + j25) # 7 − j4 # j8 − 0 A 0 − j4 8 − j4 1385.6416 + j800 = 0 j8 0
` The response, I x = I3 =
1385.6416 + j800 ∆3 = ∆ 800 − j512 = 0.7747 + j1.4958 A = 1.6845+62.6 o A
Case ii : To demonstrate the reciprocity theorem by interchanging the positions of source and response
+
~
With reference to Fig. 3, the mesh basis matrix equation is, R V 0W − j4 S8 + j4 S − j4 8 + j4 − j8 − (− j8) W S 0 − (− j8) 3 − j8 W T X R V R V 0 W SIa W − j4 S8 + j4 S − j4 8 − j4 j8 W SIb W S j8 3 − j8 W SIc W 0 T X T X
R V R V 0 W SIa W S SI b W = S 0 W S W S50+30 o W Ic T X T X R V 0W S 0W = S S 43.3013 + j25 W T X
Ib
Ia

j8 W
j4 W
o
Ix
Now, the response, I x = Ia .
50Ð30 V
Let us interchange the position of source and response as shown in Fig. 3. Let us assume mesh currents as shown in Fig. 3. 8W 8W
3W
Ic
Fig. 3. ..... (2)
On comparing equations (1) and (2), we can say that the value of ∆ remains the same in both the cases. ∴ ∆ = 800 − j512
∆a =
0 0 43.3013 + j25
− j4 8 − j4 j8
` The response, I x = Ia =
0 = 0 − (− j4) # 70 − (43.3013 + j25) # j8 A + 0 j8 3 − j8 = 1385.6416 + j800 1385.6416 + j800 ∆a = ∆ 800 − j512 = 0.7747 + j1.4958 A = 1.6845+62.6 o A
It is observed that the response remains the same after interchanging the positions of source and response, which demonstrates the validity of the reciprocity theorem.
EXAMPLE 2.64
SOLUTION
2W
8W
Vx
~
4W
+
o
10Ð60 A
In the circuit of Fig. 1, compute Vx . Demonstrate the reciprocity theorem by interchanging the positions of the source and response.
j5 W
j4 W
j6 W
Fig. 1.
Case i : To solve Vx in the given circuit Let us assume two node voltages V1 and V2 as shown in Fig. 2. Now, the response, Vx = V2 .
Circuit Analysis
2. 136 With reference to Fig. 2, the node basis matrix equation is,
o
R R V o S 10+60 S V1 W S W = S S S W 0 S S V2 W T T X
o
V W W W W X
j5 W
V1
V2
2W
4W
+
o
V −1 W j5 W 1 +1 + 1 W j5 8 4 + j6 W X
10Ð60 A
R S 1 + 1 S 2 + j4 j5 S −1 S j5 T
8W
Vx
~
j4 W
o
j6 W
Here, 10∠60 = 10cos 60 + j10 sin60 = 5 + j8.6603 A
>
0.1 − j0.4 j0.2
∆l =
∆l 2 =
j0.2 V1 5 + j8.6603 H > H = > H 0.2019 − j0.3154 V2 0
0.1 − j0.4 j0.2 0.1 − j0.4 j0.2
Fig. 2. ..... (1)
j0.2 = 7(0.1 − j0.4) # (0.2019 − j0.3154) A − (j0.2) 2 0.2019 − j0.3154 = − 0.06597 − j0.1123 5 + j8.6603 = 0 − 7 j0.2 # (5 + j8.6603) A 0 = 1.73206 − j
` The response, Vx = V2 =
1.73206 − j ∆l 2 = ∆l − 0.06597 − j0.1123 = − 0.1158 + j15.3555 V = 15.3559+90.4 o V
Case ii : To demonstrate the reciprocity theorem by interchanging the positions of source and response
2W Vx
With reference to Fig. 3, the node basis matrix equation is, V −1 W j5 W 1 +1 + 1 W j5 8 4 + j6 W X
Vb
4W
o
Now, the response, Vx = Va
R S 1 + 1 S 2 + j4 j5 S −1 S j5 T
j5 W
Va
+
10Ð60 A
Let us interchange the positions of source and response as shown in Fig. 3. Let us assume node voltages Va and Vb as shown in Fig. 3.
R R V 0 S S Va W S W = S S S W S 10+60o S Vb W T T X
V W W W W X
j4 W
~
8W j6 W

Fig. 3.
j0.2 Va 0.1 − j0.4 0 H > H = > H j0.2 0.2019 − j0.3154 Vb 5 + j8.6603 On comparing equations (1) and (2), we can say that the value of D’ remains the same.
>
..... (2)
∴ D’ = –0.06597 – j0.1123 ∆l a =
0 j0.2 = 0 − 7(5 + j8.6603) # j0.2 A 5 + j8.6603 0.2019 − j0.3154 = 1.73206 − j
` The response, Vx = Va =
1.73206 − j ∆l a = ∆l − 0.06597 − j0.1123 = − 0.1158 + j15.3555 V = 15.3559+90.4 o V
It is observed that the response remains the same after interchanging the positions of source and response, which demonstrates the validity of the reciprocity theorem.
Chapter 2  Network Theorems for DC and AC Circuits
2. 137
2.6.7 Millman’s Theorem Millman’s theorem will be useful to combine a number of voltage sources in parallel into a single equivalent source.
Millman’s theorem states that if n number of voltage sources with internal impedance are in parallel then they can be combined to give a single voltage source with an equivalent emf and internal impedance. Consider n number of parallel connected voltage sources with internal impedance in series with an ideal source as shown in Fig. 2.67. Now by Millman’s theorem, the voltage sources in parallel can be converted into a single source as shown in Fig. 2.68. A
Z3
Z1
Z2
+ E1 _
E2 _
Zn
+
+ E3
_
Z eq
+ En
A
+ Eeq _
_ B
B
Fig 2.68 : Millman’s equivalent voltage source. Here, E1, E2, E3 ... E n = Emf of voltage sources in parallel Fig 2.67 : Voltage source in parallel.
Z1, Z2, Z3 ... Z n = Internal impedance of voltage sources.
Let, Eeq = Emf of equivalent voltage source Zeq = Internal impedance of equivalent voltage source.
Now, by Millman’s theorem, Eeq = d E1 + E2 + E3 + ... + E n n Zeq Z1 Z2 Z3 Zn
..... (2.98)
1 1 + 1 + 1 + ... + 1 ..... (2.99) Z1 Z2 Z3 Zn Since the admittance, Y = 1 , equations (2.98) and (2.99) can be written in terms of Z admittance as shown below: Zeq =
Eeq = E1 Y1 + E2 Y2 + E3 Y3 + ... + E n Yn Yeq
..... (2.100)
Yeq = Y1 + Y2 + Y3 + ... + Yn
..... (2.101)
where, Yeq = 1 ; Y1 = 1 ; Y2 = 1 ; Y3 = 1 and so on. Z eq Z1 Z2 Z3 In case of dc sources with internal resistance, the impedance will become resistance and admittance will become conductance. Hence, equations (2.98) to (2.101) can be expressed as shown ahead for parallel connected dc sources.
Circuit Analysis
2. 138 Eeq = d Req =
Eeq =
E1 E2 E3 E + + + ... + n n R eq Rn R1 R2 R3
..... (2.102)
1 1 + 1 + 1 + ... + 1 R1 R2 R3 Rn
..... (2.103)
E1 G1 + E2 G2 + E3 G3 + ... + E n G n G eq
..... (2.104)
G eq = G1 + G2 + G3 + ... + G n
..... (2.105)
Proof : The voltage sources in Fig. 2.69 can be converted into current sources as shown in Fig. 2.70. A
E2
E1 Z1
Z1
E3
Z2
Z2
En
Z3
Z3
Zn
Zn
B
Fig 2.69.
A
E1
E2
E3
En
Z1
Z2
Z3
Zn
Z2
Z1
Z3
Zn
B
Fig 2.70. The parallel current sources in Fig. 2.70 can be added to give a single equivalent current source I eq . The parallel impedances in Fig. 2.70 can be combined to give a single equivalent impedance Z eq . Here, I eq = E 1 + E 2 + E 3 + ... + E n Zn Z1 Z 2 Z 3 Z eq =
..... (2.106)
1 1 1 1 ... 1 + + + + Z1 Z 2 Z 3 Zn
..... (2.107)
Therefore, the parallel connected current sources in Fig. 2.70 can be represented as shown in Fig. 2.71. A
A Z eq
Ieq
Z eq
+ Eeq _ B
Fig 2.71.
B
Fig 2.72.
Chapter 2  Network Theorems for DC and AC Circuits
2. 139
Again, by source transformation technique, the current source I eq in parallel with Z eq can be converted into a voltage source in series with Z eq as shown in Fig. 2.72. Here the voltage source in series with Z eq is the Millman’s equivalent source of the parallel connected voltage sources of Fig. 2.67. Here, 1 1 1 1 ... 1 + + + + Z1 Z 2 Z 3 Zn
Z eq =
..... (2.108)
E eq = I eq Z eq
..... (2.109)
On substituting for I eq from equation (2.106), we get, E eq = d E 1 + E 2 + E 3 + ... + E n n Z eq Zn Z1 Z 2 Z 3
..... (2.110)
EXAMPLE 2.65 In the circuit of Fig. 1, use Millman’s theorem to find current through
2
8
the 4 Ω resistance.
+
+ 20V
SOLUTION The given circuit can be redrawn as shown in Fig. 2. In the circuit of Fig. 2 each voltage source has a series resistance which can be considered as internal resistance of the source. Hence, the parallel connected voltage sources with internal resistance can be converted into a single equivalent source using Millman’s theorem.
10V
_
+ 5V_
_
Fig 1.
8
R1
2
20V
_
R2
10
E2
5V
+
+
Let, E eq = Equivalent emf of parallel connected sources
10 4
E1 10V
R eq = Equivalent internal resistance.
_
R3 4
+ _
E3
Fig 2.
Now, by Millman’s theorem, Req =
1 1 1 = = = 1.3793 Ω 1 + 1 + 1 0.725 1 +1 + 1 R1 R 2 R3 8 2 10
Eeq = d
E1 E 2 E3 + + n Req R1 R 2 R3
= d 20 + 10 + 5 n # 1.3793 = 11.0344 V 8 2 10 The circuit of Fig. 2 can be redrawn as shown in Fig. 3. Let, I be the current through 4 Ω resistance. With reference to Fig. 3, by Ohm’s law we can write, I =
Eeq = 11.0344 = 2.0513 A 1.3793 + 4 Req + 4
RESULT Current through 4 Ω resistance = 2.0513 A
I Req
1.3793
+ Eeq _
11.0344V
4
Fig 3.
Circuit Analysis
2. 140
EXAMPLE 2.66 In the circuit of Fig. 1, determine V0 using Millman’s theorem.
10V
+ E
+
1.4
4
5
4
8
V0
_
SOLUTION
Fig 1.
In the given circuit the parallel branches with 8 Ω and 4 Ω resistances can be assumed to have a zero value voltage source as shown in Fig. 2. In the circuit of Fig. 2, each source has a series resistance, which can be considered as internal resistance of the source. Therefore, the parallel connected voltage sources with internal resistance can be converted into a single equivalent source using Millman’s theorem.
1.4 + 4
R1
4
R2
8
R3 V0
5 10V
+ E
E1
0V
+ E
E2
0V
+ E
E3 _
Fig 2.
Let, E eq = Equivalent emf of parallel connected source Req = Equivalent internal resistance. Now, by Millman’s theorem, Req =
1 1 1 = = = 1.6 Ω 1 + 1 + 1 0.625 1 +1 +1 R1 R 2 R3 4 8 4
1.4 +
Eeq
E E E = d 1 + 2 + 3 n Req = d 10 + 0 + 0 n # 1.6 = 4 V R1 R 2 R3 4 8 4
Req 1.6
The circuit of Fig. 2, can be redrawn as shown in Fig. 3. With reference to Fig. 3, by voltage division rule, we can write,
Eeq
+ E
5
V0
4V _
Fig 3. 5 V0 = Eeq # = 4 # 5 = 2.5 V 8 5 + _1.6 + 1.4 i
EXAMPLE 2.67
SOLUTION
j4W
2W
j6W
_
_
o
+ ZL
12Ð90 V
A +
20Ð0oV
In the circuit of Fig. 1, apply Millman’s theorem to find Thevenin’s equivalent at AB. Hence, find Z L for maximum power transfer.
4W
B
Let us remove Z L and redraw the circuit of Fig. 1 as shown in
Fig 1.
Fig. 2. In the circuit of Fig. 2, each voltage source has a series impedance which can be considered as internal impedance of the source. Therefore, the parallel connected voltage sources with internal impedance can be converted into a single equivalent source using Millman’s theorem. Let, Eeq = Equivalent emf of parallel connected sources Zeq = Equivalent internal impedance.
Chapter 2  Network Theorems for DC and AC Circuits
2. 141
Now by Millman’s theorem, Zeq =
A 4W
1 1 = 1 + 1 1 + 1 4 + j4 2 − j6 Z1 Z 2
Z2 j6W
j4W +
1
1 1 = :_ 4 + j4 i + _2 − j6 i D
2W Z1
20Ð0oV
= 5.6 − j0.8 Ω
_
E1
12Ð90oV
E2 B
Eeq
o o E E = f 1 + 2 p Zeq = d 20+0 + 12+90 n # _5.6 − j0.8 i 4 + j4 2 − j6 Z1 Z 2
Fig 2.
j12 = f 20 + p # _5.6 − j0.8 i = _0.7 − j1.9 i # _5.6 − j0.8 i 4 + j4 2 − j6 = 2.4 − j11.2 = 11.4543+ − 77.9 o V Now, the parallel connected sources in Fig. 2 can be represented as shown in Fig. 3 by Millman’s theorem. A
Z eq
Z th
5.6 j0.8W
+ Eeq _
A
A
+ Eth _
11.4543Ð77.9oV
Z th
5.6j0.8 W
11.4543Ð77.9oV
B
B
Fig 3.
Fig 4 : Thevenins’s equivalent at AB.
Here, Eeq = Vth
;
ZL
+ Vth _ B
Fig 5.
Zeq = Z th
` Vth = 2.4 − j11.2 V = 11.4543+ − 77.9 o V Z th = 5.6 − j0.8 Ω The Thevenin’s equivalent of the given circuit at terminals AB is shown in Fig. 4. Let us connect the load impedance Z L at terminals AB of Thevenin’s equivalent as shown in Fig. 5. Now, by maximum power transfer theorem, for maximum power transfer to Z L , the value of Z L should be conjugate of Z th . *
*
` ZL = Z th = _5.6 − j0.8 i = 5.6 + j0.8 Ω
2.7
Summary of Important Concepts 1.
Resistances in series can be replaced with an equivalent resistance whose value is given by the sum of individual resistances.
2.
When n number of identical resistances of value R are connected in series, they can be replaced with a single equivalent resistance of value nR.
3.
Voltage division rule: When a voltage V exists across a series combination of two resistances R1 and R2, the voltages V1 across R1 and V2 across R2 are given by, V1 = V #
R1 R1 + R2
;
V2 = V #
R2 R1 + R2 Similarly, voltages in two impedances Z1 and Z2 in series are, V1 = V #
Z1 Z1 + Z 2
;
V2 = V #
Z2 Z1 + Z 2
Circuit Analysis
2. 142 4.
Resistances in parallel can be replaced with an equivalent resistance whose value is given by the inverse of sum of the inverse of individual resistances.
5.
When n number of identical resistances of value R are connected in series, they can be replaced with a single equivalent resistance of value R/n.
6.
Current division rule : When a total current I flows through a parallel combination of two resistances R1 and R2, the currents I1 through R1 and I2 through R2 are given by, I1 = I #
R2 R1 + R 2
;
I2 = I #
R1 R1 + R 2
Similarly, currents in two impedances Z1 and Z2 in parallel are, I1 = I #
7.
Z2 Z1 + Z 2
;
I2 = I #
Z1 Z1 + Z 2
When three resistances R12, R23 and R31 are in deltaconnection with respect to terminals 1, 2 and 3, their equivalent starconnected resistances R1, R2 and R3 with respect to the same terminals are given by, R1 =
R12 R31 R12 + R 23 + R31
;
R2 =
R12 R 23 R12 + R 23 + R31
;
R3 =
R 23 R31 R12 + R 23 + R31
Similarly, the star equivalent of deltaconnected impedances are given by, Z1 =
Z12 Z31 Z12 + Z 23 + Z31
;
Z2 =
Z12 Z23 Z12 + Z 23 + Z31
;
Z3 =
Z 23 Z31 Z12 + Z 23 + Z31
8.
When three equal resistances of value R are in deltaconnection, their equivalent starconnected resistances will consist of three equal resistances of value R/3.
9.
When three resistances R1, R2, and R3 are in starconnection with respect to terminals 1, 2 and 3, their equivalent deltaconnected resistances R12, R23 and R31 with respect to same terminals are given by, R12 = R1 + R 2 +
R1 R 2 R3
;
R 23 = R2 + R3 +
R2 R 3 R1
;
R31 = R3 + R1 +
R3 R1 R2
Similarly, the delta equivalent of starconnected impedances are given by, Z12 = Z1 + Z 2 + Z1 Z 2 Z3
;
Z 23 = Z 2 + Z3 + Z 2 Z3 Z1
;
Z31 = Z3 + Z1 + Z3 Z1 Z2
10.
When three equal resistances of value R are in starconnection, their equivalent deltaconnected resistances will consist of three equal reisistances of value 3R.
11.
A voltage source E with a resistance RS in series can be converted into current source IS, (where IS = E/RS) with the resistance RS in parallel.
12.
A current source IS with a resistance RS in parallel can be converted into voltage source E, (where E = IS RS) with the resistance RS in series.
13.
Sources are connected in series for higher voltage ratings and connected in parallel for higher current ratings. In group1 parameters (resistance / inductance / impedance / reactance), the series combination of parameters can be replaced with an equivalent parameter whose value is given by the sum of individual parameters.
14.
Chapter 2  Network Theorems for DC and AC Circuits
2. 143
15.
In group1 parameters (resistance / inductance / impedance / reactance), the parallel combination of parameters can be replaced with an equivalent parameter whose value is given by the inverse of sum of the inverse of individual parameters.
16.
In group2 parameters (conductance / capacitance / admittance / susceptance), the series combination of parameters can be replaced with equavalent parameter whose value is given by the inverse of sum of the inverse of individual parameters.
17.
In group2 parameters (conductance / capacitance / admittance / susceptance), the parallel combination of parameters can be replaced with an equivalent parameter whose value is given by the sum of individual parameters.
18. Thevenin’s theorem states that a circuit with two terminals can be replaced with an equivalent circuit consisting of a voltage source in series with a resitance (or impedance). 19. Thevenin’s voltage is given by the voltage across the two open terminals of a circuit. 20. Thevenin’s impedance is given by looking back impedance at the two open terminals of a network. 21. The looking back impedance is the impedance measured at the two open terminals of a circuit after replacing all the sources by zero value sources. 22. Norton’s theorem states that a circuit with two terminals can be replaced with an equivalent circuit consisting of a current source in parallel with a resistance (or impedance). 23. Norton’s impedance is given by looking back impedance at the two open terminals of a network. 24. Thevenin’s equivalent is the voltage source model and Norton’s equivalent is the current source model of a circuit. 25. Thevenin’s and Norton’s impedances are the same and given by the ratio of Thevenin’s voltage and Norton’s current. 26.
The superposition theorem states that the response in a circuit with multiple sources is given by the algebraic sum of responses due to individual sources acting alone.
27. The superposition theorem is also referred to as the principle of superposition. 28. A circuit element is said to be linear, if the voltagecurrent relationship is linear. 29. The principle of superposition is a combination of additivity property and homogeneity property. 30. The property of additivity says that the response in a circuit due to a number of sources is given by the sum of the responses due to individual sources acting alone. 31. The property of homogeneity says that if all the sources are mutiplied by a constant then the respones are also multiplied by the same constant. 32. While calculating the response due to one source, all other sources are made inactive or replaced by zero value sources. 33. A zero value source is represented by its internal impedance. 34. For an ideal voltage source, the internal impedance is zero and for an ideal current source, the internal impedance is infinite.
Circuit Analysis
2. 144
35. While calculating the response due to one source, all other ideal voltage sources are replaced with a short circuit and all other ideal current sources are replaced with an open circuit. 36. The maximum power transfer to load is possible only if the source and load has matched impedance. 37. In a dc source connected to resistive load, the maximum power transfer theorem states that maximum power is transferred from the source to load, when the load resistance is equal to the source resistance. 38. In an ac source connected to reactive load, where resistance and reactance are independently variable, the maximum power transfer theorem states that maximum power is transferred from the source to load, when the load impedance is equal to the complex conjugate of source impedance. 39. In general, the maximum power transfer theorem states that maximum power is transferred to a load impedance if the absolute value of the load impedance is equal to the absolute value of the looking back impedance of the circuit from the terminals of the load. 40. The reciprocity theorem states that in a linear, bilateral, single source circuit, the ratio of excitation to response is constant when the positions of excitation and response are interchanged. 41. The networks which satisfy the reciprocity theorem are called reciprocal networks. 42. The reciprocity theorem will be satisfied only by circuits or networks which do not have dependent sources.
2.8 Q2.1
Shortanswer Questions
Determine the currents I1 and I2 in the circuit shown in Fig. Q2.1. Solution
I2
I1
(AU Dec’15, ‘16, 2 Marks) 10 A
12
8
By current division rule,
Q2.2
I1 = 10 #
12 = 6 A 8 + 12
I 2 = 10 #
8 = 4A 8 + 12
Fig. Q2.1. 4
6
+ V E 1
+ V E 2
Determine the voltages V1 and V2 in the circuit shown in Fig. Q2.2. Solution 20 V
By voltage division rule, V1 = 20 #
Fig. Q2.2.
4 = 8V 4+6
6
V2 = 20 # 6 = 12 V 4+6
Q2.3
Solution The given network can be redrawn as shown in Fig. Q2.3.2.
4 B
A
6
Determine the resistance across AB in the circuit shown in Fig. Q2.3.1.
8
2 3
Fig. Q2.3.1.
Chapter 2  Network Theorems for DC and AC Circuits
2. 145
A 8
2
6
4
3
6
B
Fig. Q2.3.2.
With reference to Fig. Q2.3.2, we get, R AB =
Q2.4
1 = 1.3548 Ω 1 + 1 + 1 +1 6 8+6 2+4 3
10
10
Determine the resistance across AB in the circuit shown in Fig. Q2.4.1. (AU Dec’14, 2 Marks)
5
10
A
B
Solution
Fig. Q2.4.1.
The given network can be redrawn as shown in Fig. Q2.4.2
⇓ 10
A
10 W
5+5 = 10
A
A
B
B
B
⇐
Fig. Q2.4.4.
10
10 ´ 10 = 5W 10+10
5W
10
⇐
10
5
Fig. Q2.4.3.
Fig. Q2.4.2.
With reference to Fig. Q2.4.4, we get, RAB = 10 = 5 W 2
Q2.5
The equivalent resistance of four resistors joined in parallel is 30 W. The current flowing through them are 0.5, 0.4, 0.6 and 0.1 A. Find the value of each resistor.
(AU Dec’16, 2 Marks)
Solution
Let, RT = Equivalent resistance of parallel combination. Given that, RT = 30 W
IT
IT
Let R1, R2, R3 and R4 be the resistances in parallel.
0.5 +
V 
R1
0.4
R2
0.6
R3
Fig. Q2.5.1.
With reference to Fig. Q2.5.2 IT = 0.5 + 0.4 + 0.6 + 0.1 = 1.6 A V = ITRT = 1.6 × 30 = 48 V Now, by Ohm’s law, R1 = V = 48 = 96 Ω ; R 2 = V = 48 = 120 Ω 0.5 0.5 0.4 0.4 R3 = V = 48 = 80 Ω ; R 4 = V = 48 = 480 Ω 0.6 0.6 0.1 0.1
R4
RT = 30 W +V I TT
0.1
Þ
+
V 
Fig. Q2.5.2.
Circuit Analysis
2. 146
2
Determine the resistance across AB in the circuit shown in Fig. Q2.6.1. (AU June’14, 2 Marks)
A 1.2
2
2
Q2.6
Solution B
The given network can be redrawn as shown in Fig. Q2.6.4.
1
Fig. Q2.6.1.
⇓
A A
A
⇐
2
2W
2 ´ 3.2 2 + 3.2 = 12308 . W
2
⇐
2
1.2308 + 1 = 2.2308
2 + 1.2 = 3.2
B B
B
1W
Fig. Q2.6.4.
1
Fig. Q2.6.3.
Fig. Q2.6.2.
With reference to Fig. Q2.6.4, we get, R AB = 2 # 2.2308 = 1.0546 Ω 2 + 2.2308
Q2.7
Determine the resistance across AB in the circuit shown in Fig. Q2.7.
A
3.2
1
B
(AU Dec’15, 2 Marks)
4.27
Solution
Fig. Q2.7.
In the given network, 3.2 W and 4.27 W resistances are in parallel and the parallel combination is in series with 1 W resistance. ∴ RAB = 1 + 3.2 # 4.27 = 1 + 1.829 = 2.829 W 3.2 + 4.27
R
Q2.8
+
Determine the value of R in the circuit shown in Fig Q2.8.1. +
(AU May’17, 2 Marks)
Solution
16 V
8
E
The voltage and current in the various resistances are shown in Fig. 2.8.1
4
4V
E
Fig. Q2.8.1.
With reference to Fig. Q2.8.2, by KVL, V8 = 16 V
R
IR
V8 = VR + 4
+ +
On equating equations (1) and (2), we get, 16 V
VR + 4 = 16
.....(1)
VR = 16  4 = 12 V
.....(2)
With reference to Fig. Q2.8.2, by Ohm’s law, I4 = ` R =
V4 = 4 = 1A 4 4
VR V = R = 12 = 12 Ω 1 IR I4
E
VR
E
+ 8
V8 E
Fig. Q2.8.2.
I4 +
4
V4= 4 V E
Chapter 2  Network Theorems for DC and AC Circuits 2 A
Solution
5
5
5
5
5
75 W
In the circuit shown in Fig. Q2.9, find the total resistance across AB.
75 W
Q2.9
2. 147
5
In Fig. Q2.9, the parallel combination of six numbers of 5 Ω resistances is equivalent to a B
single resistance of 5 W.
Fig. Q2.9.
6
` R AB = 2 + 5 = 2.8333 Ω 6
The parallel connection of seven bulbs is equivalent to seven resistances in parallel as shown in Fig Q2.10.
75 W
75 W
75 W
+ E
75 W
Solution
75 W
Seven bulbs, each rated at 75 W, 120 V, are connected in parallel. Calculate the power and current consumed by them.
V = 120 V
I
Q2.10
Fig. Q2.10.
Now, the total power is given by sum of power consumed by each bulb/resistance. \ Total power = 7 ´ 75 = 525 W We know that, in purely resistive loads, P = VI ` Total current, I = P = 525 = 4.375 A V 120
Q2.11
In the circuit shown in Fig. Q2.11, the power in resistance RA is 9.6 kW, current through RB is 60 A and the value of resistance RC is 4.8 W. Determine the value of RA, RB, total current, total power and equivalent resistance.
(AU June’16, 8 Marks) IT
+
IB
E
RA
Fig. Q2.11.
Given that, PA = 9.6 kW = 9.6 × 103 W Here, PA = V × IA 3 PA = 9.6 # 10 = 40 A V 240
By Ohm’s law, IC = V = 240 = 50 A 4.8 RC
By KCL, Total Current, IT = IA + IB + IC = 40 + 60 + 50 = 150 A ∴ Total Power, PT = V × IT = 240 × 150 = 36000 W = 36 kW ` Equivalent resistance, Req = V = 240 = 1.6 Ω
IT
150
IC
240 V
Solution
` IA =
IA
RB
RC
Circuit Analysis
2. 148 Q2.12
50
Calculate the voltage across the terminals AB for the circuit shown in Fig. Q2.12.
10 A
+
Solution
100 V
4
_
By voltage division rule, VAB = 100 #
Q2.13
20
20 + 4 = 28.5714 V 50 + 10 + 4 + 20
B
Fig. Q2.12.
Determine the resistance of each wire when the resistance of two wires is 25 W when connected in series and 6 W when connected in parallel. (AU June’16, 2 Marks) Solution Let R1 and R2 be the resistance of two wires. Equivalent resistance in series = R1 + R2 = 25
.....(1)
R1 R 2 =6 R1 + R 2
.....(2)
Equivalent resistance in parallel = From equation (1), we get, R2 = 25  R1
.....(3)
On substituting for R2 from equation (3) in equation (1), we get, R1 (25 − R1) = 6 R1 + 25 − R1 ` R1 =
⇒
25R1 − R12 = 150
⇒
R12 − 25R1 + 150 = 0
− (− 25) ! (− 25) 2 − 4 # 150 = 25 ! 5 = 15,10 2 2
If, R1 = 15 W, then R2 = 25  15 = 10 W If, R1 = 10 W, then R2 = 25  10 = 15 W ∴ R1 = 15 W, R2 = 10 W
A starconnected network consists of three resistances 3 W, 6 W and 10 W . Convert the starconnected network into an equivalent deltaconnected network. 1
1
1
1
L e t R 1, R 2 a n d R 3 b e t h e resistances in star connection as shown in Fig. Q2.14.1 and R12 R23 and R31 be the resistances in equivalent delta connection as shown in Fig. Q2.14.2. R12 = R1 + R 2 +
31 = 18
W
Solution
R1 = 3 W
Þ R3 = 10 W 3
R2 = 6 W 2
2 3
Fig. Q2.14.1.
R1 R 2 = 3 + 6 + 3 # 6 = 10.8 Ω R3 10
R12 = 10.8 W
R
Q2.14
3
2
2
R23 = 36 W 3
Fig. Q2.14.2.
Chapter 2  Network Theorems for DC and AC Circuits
Q2.15
R 23 = R 2 + R3 +
R 2 R3 = 6 + 10 + 6 # 10 = 36 Ω R1 3
R31 = R3 + R1 +
R3 R1 = 10 + 3 + 10 # 3 = 18 Ω R2 6
2. 149
A deltaconnected network consists of three resistances 5 W, 6 W and 9 W . Convert the deltaconnected network into an equivalent starconnected network. Solution
1
Let R12, R23 and R31 be the resistances in delta connection as shown in Fig. Q2.15.1 and R 1 , R 2 and R 3 be the resistances in star connection as shown in Fig. Q2.15.2.
1
1
1 R1 = 2.25 W
R31 = 9 W
R12 = 5 W 2
3
Þ
7W
.
=2
R2 = 1.5 W
R3 3
2
2 2
R23 = 6 W
3
3
Fig. Q2.15.1.
Fig. Q2.15.2.
R12 R31 R1 = = 5 # 9 = 2.25 Ω R12 + R 23 + R31 5+6+9
Q2.16
R2 =
R12 R 23 = 5 # 6 = 1.5 Ω R12 + R 23 + R31 5+6+9
R3 =
R 23 R31 = 6 # 9 = 2.7 Ω R12 + R 23 + R31 5+6+9
0.1 H A 0.5 H
What will be the equivalent inductance across AB in the network shown in Fig. Q2.16.1.
0.2 H
0.4 H
B
Solution
0.6 H
First, the parallel combination of 0.4 H, 0.5 H and 0.2 H has been reduced to a single equivalent as shown in Fig. Q2.16.2. In the network of Fig. Q2.16.2, all the inductances
Fig. Q2.16.1.
⇓ 0.1 H A
1 1 1 1 C C 0.4 0.5 0.2 a 0.1053 H
are in series. Hence, the equivalent inductance LAB across AB is given by,
B 0.6 H
LAB = 0.1 + 0.1053 + 0.6 = 0.8053 H
Q2.17
What will be the equivalent capacitance across AB in the network shown in Fig. Q2.17.
Fig. Q2.16.2.
A 2 mF
Solution
10 mF B
In the given network 2 µF and 8 µF capacitances are in parallel and the parallel combination is in series with 10 µF capacitance. Hence, the equivalent capacitance CAB across AB is given by, C AB =
^2 + 8h # 10 = 5 µF ^2 + 8h + 10
Fig. Q2.17.
8 mF
Circuit Analysis
2. 150 Q2.18
Determine the currents I 1 and I 2 in the circuit shown in Fig. Q2.18.
I2
I1 0
10Ð0 A
2 + j4 W
~
1  j5 W
Solution By current division rule,
Q2.19
Fig. Q2.18.
I1 = 10+0 o #
1 − j5 = 8 − j14 A = 16.1245+ − 60.3 o A 2 + j4 + 1 − j5
I2 = 10+0 o #
2 + j4 = 2 + j14 A = 14.1421+81.9 o A 2 + j4 + 1 − j5
Determine the voltages V 1 and V 2 in the circuit shown in Fig. Q2.19.
2 + j4 W
+
Solution
V1

1  j5 W
+
V2

By voltage division rule,
Q2.20
V1 = 10+0 o #
2 + j4 = 2 + j14 V = 14.1421+81.9 o V 2 + j4 + 1 − j5
V2 = 10+0 o #
1 − j5 = 8 − j14 V = 16.1245+ − 60.3 o V 2 + j4 + 1 − j5
+
~0
10Ð0 V
Fig. Q2.19.
The resistance of each branch of a starconnected circuit is 5 W. What will be the branch resistance of equivalent deltaconnected circuit? (AU May’17, 2 Marks) When three equal resistances are in star, equivalent delta resistance of each branch will be three times the star impedance. Given that, Rstar = 5 W ∴ Rdelta = 3 × Rstar = 3 × 5 = 15 W
Q2.21
The impedance of each branch of a deltaconnected circuit is impedance of equivalent starconnected circuit?
3 Z . What will be the branch
Solution When three equal impedances are in delta, equivalent star impedance of each branch will be 1/3 times the delta impedance. Given that, Zdelta =
3Z
` Zstar = 1 # Zdelta = 1 # 3 Z = 3 3
Z 3
A
3Z
A
3Z
B
C 3Z
Fig. Q2.21.1.
3Z Z = 3 3
Þ
C
Z
Z
3
3
Fig. Q2.21.2.
B
Chapter 2  Network Theorems for DC and AC Circuits Q2.22
2. 151
Find the equivalent admittance at AB in the network shown inFig Q2.22. 1 + j
Solution
A
Let, Z AB = Equivalent impedance at A  B Now, Z AB
2 + j2
(2 + j2) # (1 + j + 2 − j3) = 2 + j0.4 Ω = (2 + j2) + (1 + j + 2 − j3)
` Equivalent admittance at A  B , YAB =
2 E j3
B
Fig. Q2.22.
1 = 1 2 + j0.4 Z AB
= 0.4808 − j0.0962 M
Find the equivalent admittance and impedance at AB in the network shown inFig Q2.23. 1+j
Solution
A
2 E j2
(1 + j) # (2 − j2 + 3 + j) = 1 + j0.6667 M (1 + j ) + (2 − j 2 + 3 + j )
` Equivalent impedance at A  B , Z AB =
Now, YAB =
Let, YAB = Equivalent admittance at A  B
3+j
Q2.23
B
Fig. Q2.23.
1 = 1 1 + j0.6667 YAB
= 0.6923 − j0.4615 Ω
Q2.24
State the superposition theorem. The superposition theorem states that the response in a linear circuit with multiple sources is given by the algebraic sum of the responses due to individual sources acting alone.
Q2.25
What are the properties of additivity and homogeneity? The property of additivity says that the response in a circuit due to a number of sources is given by the sum of the response due to individual sources acting alone. The property of homogeneity says that if all the sources are multiplied by a constant, the response is also multiplied by the same constant.
Q2.26
4
Find the current through the ammeter shown in Fig. Q2.26.1 by using the superposition theorem. Since the resistance of ammeter is not specified it can be represented by a short circuit. The condition of the given circuit when each source is acting separately is shown in Figs Q2.26.2 and Q2.26.3.
2.5 I
10 V +E
A
Fig. Q2.26.1. 4W
4W
2.5 W I’
10 V +
SC
SC
Þ
Fig. Q2.26.2.
10 V +
I’
E +
5V
Circuit Analysis
2. 152 4W
2.5 W
2.5 W
I’’ SC
I’’
Þ
+ 5V
SC
+  5V
Fig. Q2.26.3. With reference to Figs Q2.26.2 and Q2.26.3, we can write, Response due to 10 V source, Il = 10 = 2.5 A 4 Response due to 5 V source, Ill = − 5 = − 2 A 2.5
4
Total response, I = Il + Ill = 2.5 + (− 2) = 0.5 A
Q2.27
Find the voltage VL in the circuit shown in Fig. Q2.27.1 using the principle of superposition.
2
+ 24 V +E
4
4A
VL E
The condition of the circuit when each source is acting separately is shown in Figs Q2.27.2 and Q2.27.3.
Fig. Q2.27.1. 4W + 12 V
4W
2W
2A +
+ +
24 V 
2W
2A

4W
V’L = 12 V
OC
4W
SC


4A
V’’L = 4 ´ 2 = 8V
Fig. Q2.27.3.
Fig. Q2.27.2.
With reference to Figs Q2.27.2 and Q2.27.3, we can write, VlL = 12 V
Q2.28
;
VllL = 8 V
;
` VL = VlL + VllL = 12 + 8 = 20 V
In the circuit shown in Fig. Q2.28, the power in resistance R is 9 W when V1 is acting alone and 4W when V2 is acting alone. What is the power in R when V1 and V2 are acting together ? Current through R when V1 is acting, Il = Current through R when V2 is acting, Ill =
9 = 3A 1 4 = 2A 1
2
2
V1 +E
R
1
+ V 2 E
Fig. Q2.28.
Total current when V1 and V2 are acting, I = I’ + I’’ = 3 + 2 = 5 A 2
Power in R when V1 and V2 are acting = I2 R = 5 × 1 = 25 W
Q2.29
P = I2 R
` I =
P R
State Thevenin’s theorem. Thevenin’s theorem states that a circuit with two terminals can be replaced with an equivalent circuit consisting of a voltage source in series with a resistance (or impedance).
Chapter 2  Network Theorems for DC and AC Circuits Q2.30
2. 153
State the applications of thevenin’s theorem. 1.
(AU Dec’15, 2 Marks)
Thevenin’s theorem can be used to represent a complicated part of a circuit by an equivalent voltage source by performing two simple measurements namely, open circuit voltage and short circuit current.
2.
Thevenin’s theorem can be used to estimate the matched resistance or impedance for implementing maximum power transfer condition between any two parts of a circuit.
Q2.31
State Norton’s theorem. Norton’s theorem states that a circuit with two terminals can be replaced with an equivalent circuit consisting of a current source in parallel with a resistance (or impedance). A
+
Q2.32
Find Thevenin’s voltage across terminals A and B in the circuit shown in Fig. Q2.32.
5 V +E
5 Vth
Thevenin’s voltage, Vth = 5 + 10 = 15 V
+ E 10 V
5A
Note : Voltage across 5 Ω is 5 V .
E
Q2.33.
B
Fig. Q2.32.
Find the value of In for the circuit shown in Fig. Q2.33.1 Let us remove the resistance RL and mark the resulting open terminals as A and B as shown in Fig. Q2.33.2.
(AU Dec’14, 2 Marks) 20 +
The terminals A and B are shorted as shown in Fig. Q2.33.3. The 360 W resistance is shortcircuited and so no current will flow through it. Hence, the circuit of Fig. Q2.33.3 is redrawn as shown in Fig. Q2.33.4.
100
12 V E
In 360
RL
Fig. Q2.33.1. 20 +
20
20 +
100
12 V
100
+
12 V A
E
100
12 V
360
360 B
Fig. Q2.33.2.
E
A In
E
A In
SC
SC
B
B
Fig. Q2.33.3.
Fig. Q2.33.4.
With reference to Fig. Q2.33.4, by Ohm’s law, we can write, In =
Q2.34
12 = 0.1 A 20 + 100
Find Norton’s equivalent of the circuit shown in Fig. Q2.34.1.
A
5
10
10 A
2
Norton’s current, In = 10 − 5 = 5 A
1
5A
B
Fig. Q2.34.1.
Circuit Analysis
2. 154
A
Norton’s resistance, Rn =
1 = 0.5556 Ω 1 + 1 +1 +1 5 10 2 1
5.5556
5A
B
Q2.35
Fig. Q2.34.2 : Norton’s equivalent.
Determine Thevenin’s equivalent of the circuit shown in Fig. Q2.35.1.
10
5
A
Thevenin’s voltage is the voltage across 20 Ω resistance. By voltage division rule,
+ 20
200 V
Thevenin's voltage, Vth = 200 #
20 = 160 V 20 + 5
E
To find Thevenin’s resistance, the 200V source is replaced with a short circuit as shown in Fig. Q2.35.2.
B
Fig. Q2.35.1.
With reference to Fig. Q2.35.2, we can write, Thevenin's resistance, R th = 5 # 20 + 10 = 14 Ω 5 + 20
5
10
14 A
SC
A
160 V +E
20 Rth B
B
Fig. Q2.35.2.
A
In the circuit shown in Fig. Q2.36.1, using Thevenin’s theorem, determine the voltage across 90 W resistance after the switch is closed.
~
100 V
70
90
E
0V E
10 +
~
B 90
~
100 V
To find Thevenin’s resistance, the voltage sources are replaced with a short circuit. When the voltage sources are shorted, the three 90 Ω resistances are in parallel.
90
+
Since the load is balanced when the switch is open, the voltage across 90 Ω is 100 V. This is also Thevenin’s voltage at terminals AB.
+
E
Q2.36
Fig. Q2.35.3 : Thevenin’s equivalent.
Fig. Q2.36.1. 30
` Thevenin's resistance, R th = 90 = 30 Ω
A
3
+
The Thevenin’s equivalent at AB is shown in Fig. Q2.36.2. With reference
100 V +E
VL
to Fig. Q2.36.2 by voltage division rule, Voltage across 70 Ω resistance, VL = 100 #
E
70 = 70 V 70 + 30
B
Fig. Q2.36.2.
70
Chapter 2  Network Theorems for DC and AC Circuits Q2.37
2. 155
Find Thevenin’s equivalent of the circuit shown in Fig. Q.2.37.1. To find Thevenin’s voltage, the current source is converted into a voltage source as shown in Fig. Q2.37.2. By voltage division rule, V1 = 8 #
4 = 4V 4+4
2A
4
A
+
3
4
8V E
By KVL, Vth = V1 + 6 = 4 + 6 = 10 V To find Thevenin’s resistance, the voltage source is replaced with a short circuit and the current source is opened as shown in Fig. Q2.37.3.
B
Fig. Q2.37.1.
R th = 4 + 3 = 5 Ω 2
Thevenin’s equivalent is shown in Fig. Q2.37.4. 4W
3W
2 ´ 3 = 6V
4W
5W
OC
A
A
A
+
+ + +
8V 
4W
V1 
Vth
4W
SC
B
B
B
Fig. Q2.37.4 : Thevenin’s equivalent.
Fig. Q2.37.3.
Fig. Q2.37.2.
Find V th at terminals AB in the circuit shown in Fig. Q2.38.
Vth = 60+0 o #
4W A + o
60Ð0 V
In the given circuit the voltage across series combination of 4 Ω and j3 Ω elements is 60∠0o V. Hence, by voltage division rule,
Q2.39
10 V +Rth

Q2.38
3W
+
~
j4 W
j8 W

j3 = 21.6 + j28.8 V = 36+53.1 o V 4 + j3
State maximum power transfer theorem.
j3 W
Vth

B
Fig. Q2.38.
(AU May’15, 2 Marks)
In purely resistive circuits, maximum power transfer theorem states that maximum power is transferred from source to load when load resistance is equal to source resistance. In general, the maximum power transfer theorem states that maximum power is transferred to a load impedance if the absolute value of the load impedance is equal to the absolute value of the looking back impedance of the circuit from the terminals of the load.
Q2.40
Determine the maximum power transfer to the load where the load is connected to a network of the terminals for Rth = 10 W and Vth = 40 V
(AU May’17, 2 Marks)
Given that Rth = 10 W and Vth = 40 V For maximum power transform, Load resistance, RL = Rth = 10 W 2 Maximum power , Pmax = V th =
4RL
40 2 = 40 W 4 # 10
Circuit Analysis
2. 156 Q2.41
The VI characteristics of a network are shown in Fig. Q2.41. Determine the maximum power that can be supplied by the network to a resistance connected across AB.
I
I
A +
Network with linear resistors and independent sources
V E
20 V
V
E5 A
B
Fig. Q2.41.
When V = 0, I = −5 A
The condition V = 0 is equivalent to short circuiting terminals A−B and the current flowing through the short circuit is Norton’s current. ∴ Norton’s current, I n = −I = − (−5) = 5 A When I = 0, V = 20 V The condition I = 0 is equivalent to open terminals AB and the voltage across the open terminals is Thevenin’s voltage. ∴ Thevenin’s voltage, Vth = 20 V Thevenin's resistance, R th =
Vth = 20 = 4 Ω In 5
The resistance, R to be connected for maximum power transfer across terminals AB is R th. . 2 2 2 Maximum power transferred to R, Pmax = V th = V th = 20 = 25 W
4#4
W
W
3
3
3
B
A
Þ
4 kW B
A
B
W
6kW
4 kW
k
4
4
Fig. Q2.42.2.
W
W
k
6k
6k
W
A
3 kW
W
Þ
SC
k
4k
W Rth
R
Fig. Q2.42.1.
k
4k
k
+ E E
R = R th = 3 # 6 + 4 = 4 kΩ 3+6 2
k
6k
The value of R for maximum power transfer is given by the looking back resistance (or Thevenin’s resistance) from the terminals of R, which is determined as shown below:
Determine the value of R in the circuit shown in Fig. Q2.42.1 for maximum power transfer.
4k
Q2.42
4R th
4
4R
Fig. Q2.42.3.
Fig. Q2.42.4.
Chapter 2  Network Theorems for DC and AC Circuits Q2.43
2. 157 5
Determine the value of R in the circuit shown in Fig. Q2.43.1 for maximum power transfer. The value of R for maximum power transfer is given by the looking back resistance (or Thevenins’s resistance) from the terminals of R, which is determined as shown below:
+ 20
25 V
4W
20 W
SC
Fig. Q2.43.1. 4W
A
Þ
OC
5W
A
20 W
Rth
Fig. Q2.43.3.
B
Find the value of R for maximum power transfer in the circuit shown in Fig. Q2.44.
8
Em sin100t
Q2.44
Rth
B
Fig. Q2.43.2.
R
3A
E
R = R th = 5 # 20 + 4 = 8 Ω 5 + 20 5W
4
For maximum power transfer, the value of R should be equal to the absolute value of the looking back impedance from the terminals of R.
0.06 H
+ R
~
E
Here, Em sin ωt = Em sin 100t ; ∴ ω = 100 rad/s ` R =
Q2.45
82 + (ω # 0.06) 2 =
Fig. Q2.44.
82 + (100 # 0.06) 2 = 10 Ω
State the reciprocity theorem. The reciprocity theorem states that in a linear, bilateral, single source circuit, the ratio of excitation to the response is constant, when the positions of excitation and response are interchanged.
Q2.46
Two conditions of a passive, linear network are shown in Figs Q2.46.1 and Q2.46.2. Using the superposition and the reciprocity theorems, find Ix. Ix
4A +
+
5V
1A
N E
+ 10 V
N
10 V
E
E Port1
Port2
Fig. Q2.46.1.
Port2
Port1
Fig. Q2.46.2.
Let us replace the 10 V source in port1 with a short circuit as shown in Fig. Q2.46.3.
I’x +
On comparing Figs Q2.46.1 and Q2.46.3 using the reciprocity theorem we can write, Ilx = 1A 10 V 5V
&
Ilx = 1 # 10 = 2 A 5
10 V
N
SC
E Port1
Port2
Fig. Q2.46.3.
Circuit Analysis
2. 158 Let us replace the 10 V source in port2 with a short circuit as shown in Fig. Q2.46.4. On comparing Figs Q2.46.1 and Q2.46.4, using homogeneity property we can write,
I’’x + N
10 V
SC
E Port2
Port1
Imx = − 4 × 2 = −8 A
Fig. Q2.46.4.
By the principle of superposition, I x = Ilx + Illx = 2 + (− 8) = − 6 A
Q2.47
State Millman’s theorem. Millman’s theorem states that if n number of voltage sources with internal impedance are in parallel then they can be combined to give a single voltage source with an equivalent emf and internal impedance.
Q2.48
Write the expression for Millman’s equivalent source of n number of parallel connected voltage sources. Eeq = f Zeq =
E1 E 2 E3 E + + + ... + n p Zeq Z1 Z 2 Z3 Zn
1 1 + 1 + 1 + .... + 1 Z1 Z 2 Z3 Zn
where, E1, E2, E3 ... = Emf of voltage sources in parallel. Z1, Z 2, Z3 ... = Internal impedance of voltage sources.
Q2.49
In the circuit shown in Fig. Q2.49.1 find the current I using Millman’s theorem.
4
6 I
+
The circuit can be redrawn as shown in Fig. Q2.49.2.
8V
Using Millman’s theorem, the parallel connected voltage sources can be converted into a single source as shown in Fig. Q2.49.3.
_
1.8
Fig Q2.49.1. I
I 4
Req
6 1.8
+
+ 8V _
9V _
1 = 2.4 W 1 +1 4 6
;
Eeq = d 8 + 9 n × 2.4 = 8.4 V 4 6
With reference to Fig. Q2.49.3, I=
1.8
Fig Q2.49.3.
Fig Q2.49.2. R eq =
+ Eeq _
Eeq 8.4 = = 2A Req + 1.8 2.4 + 1.8
+ 9V _
Chapter 2  Network Theorems for DC and AC Circuits
2. 159 2
Q2.50
Find the current IL in the circuit shown in Fig. Q2.50.1 using Millman’s theorem.
IL 0.8
3
+ 12V
The circuit can be redrawn as shown in Fig. Q2.50.2
8
_
2
+ 6V _
and then the parallel connected voltage sources can be converted into a single source as shown in Fig. Q2.50.3.
Fig Q2.50.1.
IL 0.8 2
8
2
3
Req1
+
+ 0V _
+ 6V _
Eeq1
+ 12V
0V
_
IL
_
1.8
Req2 + E
+ E
Eeq2
Fig Q2.50.3.
Fig Q2.50.2. R eq1 =
1 = 1.6 W 1 +1 2 8
;
Eeq1 = d 12 + 0 n × 1.6 = 9.6V
R eq2 =
1 = 1.2 W 1 +1 2 3
;
Eeq2 = d 0 + 6 n × 1.2 = 2.4V 2 3
2
8
With reference to fig Q2.50.3, IL =
2.9
Eeq1 − Eeq2 9.6 − 2.4 = 2A = Req1 + 0.8 + Req2 1.6 + 0.8 + 1.2
Exercises
I. Fill in the Blanks with Appropriate Words 1.
When n number of resistances of value R are connected in series, the equivalent resistance is given by ___________.
2.
When n number of resistances of value R are connected in parallel, the equivalent resistance is given by ___________.
3.
When three equal resistances of value R are in starconnection, its equivalent deltaconnection will have three equal resistances of value ___________.
4.
When n number of capacitances of value C are connected in series, the equivalent capacitance is equal to ___________.
5.
The equivalent admittance of three identical parallelconnected admittances of value Y is equal to ________.
6.
The ________ impedance is the looking back impedance from the open terminals of a network.
7.
The ________ equivalent is the voltage generator model of a network.
8.
Norton’s equivalent is the ________ generator model of a network.
Circuit Analysis
2. 160 9.
The principle of superposition is a combination of ________ and ________ property.
10.
While finding response due to one source, all other sources are replaced with their ________ .
11.
While finding response due to one source, all other ideal ________ sources are replaced with a short circuit.
12.
While finding response due to one source, all other ideal current sources are replaced with ________.
13.
When load resistance and reactance are independently variable, maximum power transfer is achieved if load impedance is equal to ________ impedance.
14.
In purely resistive circuits ________ is transferred to load when load resistance is equal to source resistance.
15.
If a load impedance, R + jX with R alone variable is connected to a source with internal impedance Rs + jXs then the condition for maximum power transfer is ________ .
16.
If a variable resistance R is connected to a source with impedance Rs + jXs then the condition for maximum power transfer is ________ .
17.
The networks which satisfy the reciprocity theorem are called ________ networks.
ANSWERS Rs2 + Xs2
1.
nR
6.
Thevenin’s / Norton’s
11. voltage
16. R =
2.
R n
7.
Thevenin’s
12. open circuit
17. reciprocal
3.
3R
8.
current
13. conjugate of source
4.
C n
9. additivity, homogeneity
5.
3Y
10. internal impedances
14. maximum power 15. R =
Rs2 + (Xs + X) 2
II. State Whether the Following Statements are True or False 1.
When starconnected resistances are converted into a equivalent deltaconnected resistances, the power consumed by the resistances remains the same.
2.
Inductances connected in series can be replaced by an equivalent inductance whose value is given by the sum of individual inductances.
3.
Capacitances connected in parallel can be replaced with an equivalent capacitance whose value is given by the inverse of sum of the inverse of individual capacitances.
4.
Inductive susceptance is always negative and capacitive susceptance is always positive.
5.
When the voltage requirement of a load is higher, the voltage sources should be connected in parallel.
6.
Thevenin’s equivalent can be determined only for the linear part of a circuit.
7.
A circuit with a nonlinear resistance can be analysed using Thevenin’s theorem by replacing the rest of the circuit with Thevenin’s equivalent.
8.
Thevenin’s and Norton’s impedances are the same.
9.
The superposition theorem can be extended to nonlinear circuits by piecewise linear approximation.
10.
The superposition theorem can be used to estimate power directly.
11.
The superposition theorem is applicable to any network containing linear dependent sources.
Chapter 2  Network Theorems for DC and AC Circuits
2. 161
12.
The superposition theorem is applicable to any network containing a time varying resistor.
13.
In reactive circuits with variable reactance, the maximum power transfer is achieved at resonance.
14.
A reactive circuit with fixed reactance will behave as a purely resistive circuit when the maximum power transfer condition is satisfied.
15.
The reciprocity theorem will be satisfied by a circuit with dependent sources.
16.
The reciprocity theorem can be applied only to a circuit with a single source.
17.
Ideal voltage sources in parallel cannot be converted into a single equivalent source using Millman’s theorem.
ANSWERS 1.
True
6.
True
11. True
16. True
2.
True
7.
True
12. False
17. True
3.
False
8.
True
13. True
4.
True
9.
True
14. False
5.
False
10. False
15. False
III. Choose the Right Answer for the Following Questions 1. When n number of identical resistances of value R are connected in parallel, the equivalent value of the parallel combination is, a) nR
b) R n
c ) 2R n
d) R 2n
2. The star equivalent of three identical resistances in delta of value R will be three identical resistances of value, a) R 3
b) 3R
2 c) R 3
d) 3R 2
3. In the network shown in Fig. 3, if the value of all the resistances are 1 W then what will be the equivalent resistance at AB? a) 1 W B
A
b) 0.5 W c) 0.4 W
Fig. 3.
d) 0.2 W
B
4. In the network shown in Fig. 4, if the value of all the resistances are 2 W then the equivalent resistances at AC and BD respectively are, a) 0 W, 0.8 W A
C
b) 0.8 W, 0 W c) 0 W, 0.4 W d) 0.8 W, 0.8 W
D
Fig. 4.
Circuit Analysis
2. 162
5. The equivalent values of two inductances 3 H and 6 H when connected in series and in parallel respectively are, a) 9 H, 3 H
b) 9 H, 2 H
c) 18 H, 2 H
d) 2 H, 3 H
6. In the network shown in Fig. 6, if the value of all the inductance is 2 H, then what is the equivalent inductance at AB?
B
a) 4 H b) 3 H c) 2 H
A
Fig. 6.
d) 1 H
7. The equivalent values of two capacitances 6 mF and 12 mF when connected in series and in parallel respectively are, a) 6 mF, 18 mF
b) 18 mF, 4 mF
c) 4 mF, 18 mF
d) 72 mF, 18 mF A
8. In the network shown in Fig. 8, if the values of all the capacitances is 2 mF then what is the equivalent capacitance at AB? a) 4 mF
D
C
b) 3 mF c) 2 mF d) 1 mF
B
Fig. 8.
j10
9. The equivalent reactance with respect to terminals AB in the network shown in Fig. 9 is,
j10
a) j10 W
j5
b) j7.5 W A
c) j5 W
j5
B
j7.5 j5
d) j2.5 W
Fig. 9.
10. The equivalent value of two impedances 8 + j3 W and 2 – j3 W when connected in parallel is, a) 10 + j0 W
b) 6 + j6 W
c) 10 + j6 W
d) 2.5  j1.8 W
11. In the network shown in Fig. 11, what is the equivalent impedance at AB? a) 3 + j3 W
3 + j4
j2
Ej3 3 + j3
A
b) 1 + j W
B j9
Ej2
c) 3 – j4 W d) 1 + j2 W
3 E j4
Fig. 11.
Chapter 2  Network Theorems for DC and AC Circuits
2. 163
12. In the network shown in Fig. 12, if the values of all the conductances are 3 M then what is the value of equivalent conductance at AB? B
a) 18 M b) 2 M c) 0.5 M
A
Fig. 12.
d) 0.25 M
13. In the network shown in Fig. 13, what is the equivalent conductance at AB?
A 4 6
a) 0.9083 M c) 29 M
3 4
b) 15.5 M d) 20 M
2
5
3
2
B
Fig. 13.
14. In the network shown in Fig. 14, what is the equivalent susceptance at AB?
Ej6
A
a) j0.5 M b) j3 M
Ej6 j4
j4 Ej6
c) j6 M
B
d) j12 M
Ej6
15. In the network shown in Fig. 15, what is the equivalent admittance atA AB?
2 + j2
2E
a) 0 + j4 M
2+
b) 4 + j4 M c) 4 + j0 M
Fig. 14.
j2
Ej2
j2 j2
B 2 E j2
d) 4  j4 M
Fig. 15.
d) 20 M
16. The current through the ideal ammeter in the circuit shown in Fig. 16 is, a) 1 A
1.5
2
+
4V E
A
b) 1.5 A c) 2 A d) 4 A
Fig. 16.
E +
3V
Circuit Analysis
2. 164 17. The voltage across the ideal voltmeter in the circuit shown in Fig. 17 is, a) 10 V b) 8 V
3A
V
2
5A
2
c) 6 V Fig. 17.
d) 4 V 18. The voltage VL in the circuit shown in Fig. 18 is,
2
a) 5 V b) 6 V
2
+ VL
6 V +E
2A
2
c) 9 V Fig. 18.
d) 12 V
2A
19. The current I2 in the circuit shown in Fig. 19 is, a) 8 A
1
1 I2
b) 7 A
1
3A
5A
c) 4 A Fig. 19.
d) 2 A 20. The value of Vth and Rth in the circuit shown in Fig. 20 is,
15
A
a) 20 V, 30 W b) 5 V, 10 W
6
+ 25 V
10
Rth
c) 25 V, 4 W
B
Fig. 20.
d) 10 V, 12 W
A
21. The value of Vth in the circuit shown in Fig. 21 is,
+ 5 V +E
a) 7 V
5 Vth
b) 5 V E +
3
c) 3 V
2V E
d) 2 V
B
Fig. 21. E 5V +
22. The value of Rth in the circuit shown in Fig. 22 is,
A
a) 6 W b) 7 W
3
2A 6
c) 13 W d) 22 W
Rth B
4
Fig. 22.
Chapter 2  Network Theorems for DC and AC Circuits
2. 165
23. The value of RN in the circuit shown in Fig. 23 is,
10
3
A
a) 4 W 5
5A
b) 1.6 W
2 Rth
c) 1.33 W
B
Fig. 23.
d) 1.2 W
2A
24. The value of IN in the circuit shown in Fig. 24 is, a) 2 A
A 2
2
b) 3.5 A
IN
3A
c) 1 A B
d) 5 A
Fig. 24. 3
25. The value of IN in the cirucit shown in Fig. 25 is,
4 A
a) 1.5 A IN
3A
1
b) 3 A c) 0.5 A
B
Fig. 25.
d) 1 A
26. In the twoterminal linear circuit shown in Fig. 26, the open circuit voltage measured across AB is 10 V and short circuit current through AB is 5 A. The value of resistance that can be connected across AB for maximum power transfer is, A a) 10 W Linear circuit B b) 5 W c) 50 W Fig. 26. d) 2 W 27. The value of R for maximum power transfer in the circuit shown in Fig. 27 is, 0.04 H
2
a) 8 W b) 10 W
+
~
c) 8.25 W
em = sin 200t V
R
d) –j0.06 W
Fig. 27.
a) 2.4 + j1.2 W
b) 2.4 – j1.2 W
c) 1.2 + j2.4 W
d) 1.2 – j2.4 W
2W
+
~
_
j4 W
A 3W
R
j6 W
jX
Vm sin wt
B
IPQ
28. The value of impedance that can be connected across AB for maximum power transfer in the circuit shown in Fig. 28 is,
Z
Fig. 28.
Circuit Analysis
2. 166 29.
The positions of source and response in the circuit shown in Fig. 29a are changed as shown in Fig. 29b. What is the value of IX ? a) 2 A
b) 4 A
R1
c) 1 A
R3
R2
R3
R2
d) 8 A
R1
2A 10 V
+ E
R4
+ E
IX
R5
20 V
R4 R5
Fig. 29a.
Fig. 29b.
30. The positions of source and response in the circuit shown in Fig. 30a are changed as shown in Fig. 30b. What is the value of VX ? a) 6 V
b) 3 V
R1
c) 2.4 V
+ 5A
R4
R5
R3
R2
R3
R2
d) 2 V
R1
6V E
+ VX E
R6
R5
R4
2A
R6
Fig. 30b.
Fig. 30a.
ANSWERS 1. 2. 3. 4. 5.
b a c a b
7. 8. 9. 10. 11.
c a c d b
6.
d
12. a
19. 20. 21. 22. 23. 24.
13. b 14. d 15 c
16. d 17. b 18. a
d d c a b b
25. 26. 27. 28. 29. 30.
IV. Unsolved Problems E2.1 E2.2
2
A
Find the equivalent resistance with respect to terminals AB in the network shown in Fig. E2.1. Find the equivalent resistance across the source terminals AB of the circuit shown in Fig. E2.2 and calculate the current delivered by the source.
6
A
R
R
6
18
12 V
Fig. E2.1. B
R R R
6
12
R A
B
E2.3
Fig. E2.2.
R
R
18
R
R
4
1.2
1 + E
1.6
B
R 2
a d c d b c
R
Fig. E2.3.
Determine the equivalent resistance at AB for the circuit shown in Fig. E2.3.
6
Chapter 2  Network Theorems for DC and AC Circuits E2.4
2. 167
Determine the equivalent resistance for the circuit shown in Fig. E2.4. 18
4
8
16
10
10 A +
18
12
2 20
20 V
20
4
B 6
E
E2.5 E2.6
Fig. E2.5. Fig. E2.4. In the network shown in Fig. E2.5, find the equivalent resistance between A and B. For the network shown in Fig. E2.6, find the equivalent resistance across AB. C
3
9
1
16
E2.7 E2.8
18
3
12
9
5
5
A
12
B
15
A
B
Fig. E2.6. Fig. E2.7. In Fig. E2.7, find the equivalent resistance across AB. In circuit shown in Fig. E2.8, find the equivalent resistance across AB. 2 8
6
20
B 4
14
5
16
3
16
A
C
10
18
A 12
8
6
12
B
5
7
Fig. E2.9.
4
Fig. E2.8. E2.9 In Fig. E2.9, find the equivalent resistance RAB . E2.10 Convert the circuit shown in Fig.E2.10 with multiple sources into a single equivalent current source at terminal AB, with a single equivalent resistance in parallel. Also, calculate the voltage across the equivalent resistance. A 3H 10 V
+ E
3A
4
2
9H
8 2
2A 6H
8
1.5 H
E + 1V
4 B
2H
5A
A
B
Fig. E2.11. Fig. E2.10. E2.11 Find the equivalent inductance across terminals AB in the network shown in Fig. E2.11.
Circuit Analysis
2. 168 E2.12 In Fig. E2.12, find the equivalent reactance across AB.
E2.13 Find the equivalent capacitance across terminals AB in the network shown in Fig. E2.13.
j0.2
6 mF
j0.6
A
j2.4
3 mF 3 mF j3
j0.6
B
A
6 mF
6 mF
3 mF
3 mF j1
j2.3
j3
j0.8
B 6 mF
Fig. E2.13.
j0.2
Fig. E2.12. Note : Consider 6 mF capacitor as reactance –jX and so reactance of 3mF capacitor is –j2X. Reduce the network by treating all the capacitors as reactances and finally convert the reactance to capacitor.
E2.14 In Fig. E2.14, find the equivalent capacitive reactance across AB. E2.15 Find the equivalent impedance across AB in the circuit shown in Fig. E2.15. 2 + j2 W Ej2
Ej4
A
4 + j2 W
Ej9 B
Ej2
5  j4 W
3 + j6 W
5  j3 W
Ej12 Ej6
Ej6 A
Ej3.2
B
+
Fig. E2.14.
~
Fig. E2.15.
o
24Ð0 V
E2.16 In the circuit shown in Fig. E2.16, determine I L using Thevenin’s theorem. E2.17 In the circuit shown in Fig. E2.17, determine VL using Norton’s theorem. 4
3A
IL 2
5
2 +E
10 V
5V 4 8
5
1
4
+
+E
+E
4
3V 10
VL E
6
A
5
3
2A
+ E 5V
10 V +E
+E
B
12 V
Fig. E2.16. E2.18
Fig. E2.17.
Fig. E2.18.
Find Thevenin’s and Norton’s equivalents of the circuit shown in Fig. E2.18 with respect to terminals A and B.
Chapter 2  Network Theorems for DC and AC Circuits E2.19
2. 169
In the circuit shown in Fig. E2.19, determine the current I L using Norton’s theorem. o
10Ð0 A
~ j10 W
j10 W
+
2W
5W
~
IL

2W
+
4W
20 W
60Ð0 V
j10 W
5W
+
j4 W
VL
o
o
200Ð0 V
j20 W
j3 W
~


Fig. E2.19.
Fig. E2.20.
E2.20
In the circuit shown in Fig. E2.20, determine the voltage across 5 + j3 W impedance using Thevenin’s theorem.
E2.21
Using the superposition theorem, determine the current I L in the circuit shown in Fig. E2.21. 5A 3
3
IL
+
VL
E 2
4
2
+
+ 20
10
5V 2A
4V
E
6
2A x
+ 10 V
E
+ 6V
2
1
+ V
5
3
E
10 V E
E
4A
+
4
Fig. E2.22.
1
Iy
E 5
Fig. E2.23.
Fig. E2.21. E2.22
Determine the voltage VL in the circuit shown in Fig. E2.22 using the superposition theorem.
E2.23
Calculate the current I y and voltage Vx in the circuit shown in Fig. E2.23 using the superposition theorem.
E2.24
Determine the current I y and voltage V x in the circuit shown in Fig. E2.24 using the superposition theorem. o
Iy
3Ð0 A

1W
~
1.5 W
2W
4W
j1 W
j4 W
IL
5W
2W j3 W
o
5Ð90 V
~

o
2Ð0 A
~
Fig. E2.24. E2.25
~

5W
4W
+
+
o
+
20Ð0 V
+
j3 W
o
10Ð90 V
~
j2 W
j3 W
~


o
Vx
10Ð30 V
+
Fig. E2.25.
In the circuit shown in Fig. E2.25, determine I L using the superposition theorem and estimate the active and reactive power in 2  j3 W impedance.
Circuit Analysis
2. 170 E2.26
Determine the value of R in the circuit shown in Fig. E2.26 for maximum power transfer. Also find the value of the maximum power.
E2.27
Determine the value of Z L in the circuit shown in Fig. E2.27 for maximum power transfer. j1 W
2W
4W
5A + V2Ðq2
2W R
j5 W
1W
~

2W
j3 W
j4 W
4W
+ 10 V 
+ Vx 10 W 
+ 5W
ZL
3W
V1Ðq1 
~
8W
5W
3W
Fig. E2.26.
Fig. E2.27.
Fig. E2.28.
E2.28
In the circuit of Fig. E2.28, calculate Vx . Prove the reciprocity theorem by interchanging the positions of the 5 A source and Vx .
E2.29
In the circuit of Fig. E2.29, calculate Ix . Prove the reciprocity theorem by interchanging the positions of the 10 V source and Ix . j2 W
j3 W
5W
4W
j4 W
+
+ 6W
5W
~
+ j5 W
Vx

j2 W
3W

Fig. E2.30.
Fig. E2.29.
4W
o
3W
1W
Ix o
10 V
10Ð0 V
4W
5Ð0 A
Ix
2W
~
Fig. E2.31.
E2.30
In the circuit of Fig. E2.30, demonstrate the reciprocity theorem by interchanging the positions of the source and response, I x .
E2.31
Demonstrate reciprocity theorem in the circuit shown in Fig. E2.31 by interchanging the positions of the source and response.
E2.32
In the circuit shown in fig E2.32, apply Millman’s theorem to find Thevenin’s equivalent at AB. Also, find the value of resistance R for maximum power transfer.
_
+ 6V
_
Fig E2.32. E2.33
R
j4W
j5W + 8V _
5W
IL
o
2W 5W
1W
4Ð90 V
+ 10 V
A
5Ð0oV
4W
4W
2W
Fig E2.33.
In the circuit shown in Fig. E2.33, find the current IL using Millman’s theorem.
Chapter 2  Network Theorems for DC and AC Circuits ANSWERS E2.1
RAB = 5.6 Ω
E2.2
RAB = 3.75 Ω , I = 3.2 A
E2.3
R AB = 5 R Ω 6
E2.4
Req = 19 Ω
E2.5
RAB = 1.5686 Ω
E2.6
RAB = 1.9637 Ω
E2.7
RAB = 2.9084 Ω
E2.8
RAB = 6.4478 Ω
E2.9
RAB = 4.6663 Ω
E2.10
Ieq = 2.75 A, Req = 0.8 W, V = 2.2 V
E2.11
LAB = 2.875 H
E2.12
jXAB = j0.3522 Ω
E2.13
CAB = 9.6432 mF
E2.14
–jXAB = −j16.92 Ω
E2.15
Z AB = 5.3021 − j1.2792 Ω = 5.4542+ − 13.6 o Ω
E2.16
Vth = 10 V
;
Rth = 1 Ω
;
IL = 1.6667 A
E2.17
In = 1.8 A
;
Rn = 5 Ω
;
VL = 6 V
E2.18
Vth = 13.25 V
E2.19
In = − 4 − j8 A = 8.9443+ − 116.6 o A ; IL = − 2 − j6 A = 6.3246+ − 108.4 o A
E2.20
Vth = 44.6152 − j63.0768 V = 77.2606+ − 54.7 o V
;
Rth = Rn = 1.875 Ω
;
In = 7.0667 A Zn = 10 + j5 Ω = 11.1803+26.6 o Ω
Z th = 3.8462 − j7.2308 Ω
= 8.1901+ − 62o Ω
VL = 45.9196 + j1.44 V
= 45.9422+1.8 o V
2. 171
Circuit Analysis
2. 172 E2.21
IL = IlL(2 A) + IllL(4 A) + IlllL(10 V) = 2 + 4 + 0 = 6 A
E2.22
VL = VlL(5 V) + VllL(10 V) = 2 + (− 4) = − 2 V
E2.23
Vx = Vlx(4 V) + Vllx(6 V) + Vlllx(2 A) + Vllllx(5 A) = 1 + (− 1.5) + 4.5 + (− 6.25) = − 2.25 V I y = Ily(4 V) + Illy(6 V) + Illly(2 A) + Illlly(5 A) = 0.25 + (− 0.375) + (− 0.875) + (− 1.5625) = − 2.5625 A
E2.24
I y = I ly(5 V) + I lly(10 V) + I llly(2 A) = (− 0.1061 + j0.504) + (− 0.2122 + j1.008) + (0.5623 + j0.3289) = 0.244 + j1.8409 = 1.857+82.4 o A Vx = Vlx(5 V) + Vllx(10 V) + Vlllx(2 A) = (− 0.1061 + j0.504) + (− 0.2122 + j1.008) + (− 1.4377 + j0.3289) = − 1.756 + j1.8409 = 2.5441+133.6 o V
E2.25
IL = IlL(20 V) + IllL(10 V) + IlllL(3 A) = (3.0769 + j4.6154) + (− 0.1785 − j2.7678) + 0 = 2.8984 + j1.8476 A = 3.4372+32.5 o A P = 23.6287 W
;
Q = −35.443 VAR
E2.26
R = 3.1429 Ω , Pmax = 0.6492 W
E2.27
ZL = 4.6432 + j3.443 Ω = 5.7804+36.6 o Ω
E2.28
Vx = 10.2273 V
E2.29
Ix = 0.1176 A
E2.30
I x = 0.3554 + j0.3928 A = 0.5297+47.9 o A
E2.31
Vx = 1.5529 + j2.1887 V = 2.6836+54.6 o V
E2.32
Vth = 6.9228 V ; Rth = R = 0.5128 W
E2.33
Eeq = − 2.439 − j1.9512 V
= 3.1234 + − 141.3 o V
Zeq = 2.1951 − j0.2439 Ω A = 2.2086 + − 6.3 o Ω IL = − 0.5525 − j0.4972 A
= 0.7433 + − 138 o A
Chapter 3
AC CIRCUITS, RESONANCE AND COUPLED CIRCUITS 3.1
AC Circuits
The sources in which the current/voltage sinusoidally varies with time are called sinusoidal sources. In sinusoidal sources, the voltage/current undergoes cyclic changes and the number of cycles per second is called frequency. The time for one cycle is called time period. In ac circuits, the current and voltage varies with time and so all the three basic parameters, i.e., resistance, inductance and capacitance exist in ac circuits. In ac sources, when the rms value of voltage is maintained constant and the rms value of current is allowed to vary, the source is called a voltage source. When the rms value of current is maintained constant and the rms value of voltage is allowed to vary, the source is called a current source. + E = EÐq
~

Fig. a : AC voltage source.
I s = Is Ðq
~
Fig. b : AC current source.
Fig. 3.1 : Symbols for ac source.
3.2
Sinusoidal Voltage y
A sinusoidal voltage can be considered as a vector of length Vm rotating in space with a uniform angular speed ω rad/s as shown in Fig. 3.2. At any time instant, the vector can be resolved into xcomp and ycomp. Now, ycomp gives the value of sinusoidal voltage at any time instant. Therefore, the instantaneous value (i.e., the value at any particular time instant) of a sinusoidal voltage is given by,
w ycomp
Vm
xcomp
x
Fig. 3.2.
v = Vm sin ωt Since sinusoidal voltage is a rotating vector, the value of the voltage repeats after an angular rotation of 2π radians or 360 o. The number of revolutions (or rotations) per second is called frequency and it is denoted by f. The unit of frequency is Hertz and denoted by Hz (or cycles per second). One rotation of the voltage vector is also called a cycle because the value of voltage repeats in every revolution. One revolution is equal to an angular motion of 2π radians. Hence, frequency can also be expressed in radians per second (rad/s) which is denoted by ω and popularly called angular frequency.
Circuit Analysis
3. 2
The relation between angular frequency (ω) and frequency (f ) is, ω = 2πf The time taken for one revolution or cycle is called time period (or simply period), and it is denoted by T. The unit of time period (T) is seconds. We know that, Frequency, f = Number of cycles per second. Hence, Time for one cycle = 1 f ` Time period, T = 1 seconds f
3.2.1 Average Value The average value of a time varying quantity is the average of the instantaneous value for a particular time period. Usually, for periodic waveforms, the average is taken for one time period. In alternating quantities, the average value for one time period is zero because in one period it has equal positive and negative values. Therefore, for alternating quantities, the average is taken over half a period. The instantaneous value of sinusoidal voltage is expressed by, v = Vmsinωt = Vmsin q, where, q = ωt. The total value over half a period (π) is obtained by integrating the instantaneous value between limits 0 to π. Then the average is obtained by dividing this total value by half a period (π). Let, Vave = Average value of sinusoidal voltage or alternating voltage. Now, by definition of average value, we can write, r
Average value of sinusoidal voltage, Vave
#
= 1 π 0
3.2.2 RMS Value
r
# V sin θ dθ
ν dθ = 1 π
m
= 2Vm π
0
(AU June’14, 2 Marks)
The rms value of a time varying quantity is the equivalent dc value of that quantity. (The rms value is also known as effective value.) For example, a 5 V dc is equivalent to 5 V rms value of ac. The rms stands for rootmeansquare, which means that the value is obtained by taking the root of the mean of the squared function. Hence, to obtain the rms value, a function is squared and the mean (average) of the squared function is determined. And the root of this mean value is taken. For periodic waveforms, the rms value is computed for one period. For alternating quantities, the rms value will be the same if it is computed for half a period or one period. The instantaneous value of sinusoidal voltage is expressed by, v = Vmsinωt = Vmsin q, where, q = ωt. The total value of the squared function over half a period (π) is obtained by integrating v 2 between limits 0 to π . The mean (average) is obtained by dividing the total value of the squared function by half a period (π). The rms value is obtained by taking the square root of this mean value.
Chapter 3  AC Circuits, Resonance and Coupled Circuits
3. 3
Let, V = Rms value of sinusoidal voltage or alternating voltage. Now, by definition of rms value, we can write, r
Rms value of sinusoidal voltage, V =
r
# ν dθ
1 π
2
# (V sin θ) dθ
1 π
=
0
2
m
0
= Vm 2
3.2.3 Form Factor and Peak Factor Form factor is defined as the ratio of rms value and average value of a periodic waveform. Peak factor is defined as the ratio of peak value (or maximum value) and the rms value of a periodic waveform. ` Form factor, k f =
rms value Average value
` Peak factor, k p = Maximum value rms value
The form and peak factors for sinusoidal voltage can be estimated using equations (3.1) and (3.2) as shown below: Form factor, k f =
Vm 2 = π = 1.111 2Vm π 2 2
^For full sine waveh
..... (3.1)
Peak factor, k p =
Vm = Vm 2
^For full sine waveh
..... (3.2)
2 = 1.414
The form factor and peak factor of equations (3.1) and (3.2) are applicable for full sinusoidal waveform of voltage or current or any other quantity.
3.3
Sinusoidal Current The instantaneous value of sinusoidal current is given by, i = I m sin ωt = Im sin q, where, q = ωt r
#
Average value of sinusoidal current, Iave = 1 π
r
#I
i dθ = 1 π
0
#i
1 π
r 2
dθ =
0
Form factor, k f = I m / 2 = π = 1.111 2 I m /π 2 2 Peak factor, k p =
Im = 1m / 2
sin θ dθ = 2I m π
0
r
rms value of sinusoidal current, I =
m
2 = 1.414
# (I
1 π 0
m
sin θ) 2 dθ = I m 2
Circuit Analysis
3. 4
3.4
Inductance
Inductance is the property of an element (or matter) by which it opposes any change in flux or current. Note : Flux and current are inseparable in nature. Whenever flux exists in an element, it is due to motion of electrons (i.e., current). Whenever current flows in an element, flux is created in the element. The unit of inductance is Henry and denoted by H. The inductance of a coil is defined as the ratio of flux linkages (weberturns) and current through the coil. The weberturns refers to the product of flux φ and number of turns N of a coil. Hence, the inductance of a coil with N turns and carrying a current of I amperes is given by, Inductance, L =
Nφ I
i + L
v E
Fig. 3.3. ..... (3.3)
Equation (3.4) gives the voltagecurrent relation in an inductance. ν = L di dt
.....(3.4)
#
.....(3.5) ` i = 1 ν dt L Energy is stored as magnetic field in an inductor and it can be calculated using equation (3.6). ` Energy, W = 1 LI2 2
..... (3.6)
Equation (3.6) can be used to compute the energy stored in an inductance when a steady current I flows through it.
3.5
Capacitance
Capacitance is the property of an element (or matter) by which it opposes any change in charge or voltage. The unit of capacitance is farad and it is denoted by F. The capacitance of a capacitor is defined as the ratio of stored charge and the potential difference across its plates. The capacitance of a capacitor with a charge of Q coulombs and a potential difference of V volts across its plate is given by, Q Capacitance, C = V
C
i + v, q E
Fig. 3.4.
..... (3.7)
Equation (3.8) gives the voltagecurrent relation in a capacitance. i = C dν dt ` ν = 1 C
# i dt
..... (3.8)
..... (3.9)
Chapter 3  AC Circuits, Resonance and Coupled Circuits
3. 5
Energy is stored as electric field in a capacitor and it can be calculated using equation (3.10). ..... (3.10) ` Energy, W = 1 CV2 2 Equation (3.10), can be used to compute the energy stored in a capacitance when a steady voltage V exists across it.
3.6
VoltageCurrent Relation of R, L and C in Various Domains
The circuit variables like voltage, current, power and energy are functions of time t. Time domain is a practical domain where we can physically realise any system or phenomena or activity. The voltagecurrent relations of fundamental parameters in time domain are differential equations. The solutions of differential equations are tedious when compared to algebraic equations. Hence, it will be convenient if we transform the differential equation into algebraic equations. One such transform is Laplace transform. A brief discussion about Laplace transform is presented in Appendix 3. Let, i = i(t) = Current in time domain v = v(t) = Voltage in time domain L{v(t)} = V(s) = Voltage in sdomain or Laplace domain L{i(t)} = I(s) = Current in sdomain or Laplace domain.
3.6.1 VoltageCurrent Relation of Resistance Consider a resistance R connected to a source of voltage v(t) as shown in Fig. 3.5. i(t)
I(s)
I
+
v(t)
~
E
+
+ R
v(t)
R
E
+
V(s) E
R
V E
Fig. a : Resistance in Fig. b : Resistance in Fig. c : Resistance in sdomain. frequency domain. time domain. Fig. 3.5 : Voltagecurrent relation of resistance in various domains.
Let, i(t) = Current through the resistance v(t) = Voltage across the resistance. By Ohm’s law, we can write v(t) = R i(t)
For simplicity
v = Ri
..... (3.11)
On taking Laplace transform of equation (3.11), we get, ..... (3.12)
V(s) = R I(s) On substituting s = jω in equation (3.12), we get, V^ jωh = R I^ jωh
For simplicity
V = RI
Circuit Analysis
3. 6 In Summary, v = Ri
; Voltagecurrent relation of resistance in time domain.
V(s) = R I(s)
; Voltagecurrent relation of resistance in sdomain.
V = RI
; Voltagecurrent relation of resistance in frequency domain.
3.6.2 VoltageCurrent Relation of Inductance Consider an inductance L connected to a source of voltage v(t) as shown in Fig. 3.6. i(t)
I(s)
I
+
+
+
+
v(t)
~

v(t)
L
sL

V(s) 
jwL
V 
Fig. a : Inductance in Fig. b : Inductance in Fig. c : Inductance in time domain. sdomain. frequency domain. Fig. 3.6 : Voltagecurrent relation of inductance in various domains.
Let, i(t) = Current through the inductance v(t) = Voltage across the inductance By Faraday’s Law, we can write, ν ( t) = L d i ( t ) dt
For simplicity
ν = L di dt
.....(3.13)
On taking Laplace transform of equation (3.13) with zero initial conditions, we get, V(s) = L sI(s) ∴ V(s) = sL I(s)
.....(3.14)
where, sL = Inductive reactance in sdomain On substituting s = jω in equation (3.14), we get, V^ jωh = jωL I^ jωh
For simplicity
V = jωL I
where, ωL = XL = Inductive reactance In summary, v = L di dt
; Voltagecurrent relation of inductance in time domain.
V(s) = sL I(s)
; Voltagecurrent relation of inductance in sdomain.
V = jωLI
; Voltagecurrent relation of inductance in frequency domain.
Chapter 3  AC Circuits, Resonance and Coupled Circuits
3. 7
3.6.3 VoltageCurrent Relation of Capacitance Consider a capacitance C connected to a source of current i(t) as shown in Fig. 3.7. I(s)
i(t) i(t)
~
C
+ v(t) 
1 sC
I
+ V(s) 
1 jwC
+ V

Fig. a : Capacitance in Fig. b : Capacitance in Fig. c : Capacitance in frequency domain. sdomain. time domain. Fig. 3.7 : Voltagecurrent relation of capacitance in various domains.
Let, i(t) = Current through the capacitance v(t) = Voltage across the capacitance. Now, i (t) = C
dν ( t ) dt
For simplicity
i = C dν dt
..... (3.15)
On integrating and rearranging equation (3.15), we get, ν = 1 C
# i dt
On taking Laplace transform of equation (3.15) with zero initial conditions, we get, I (s) = CsV (s) ` V (s ) = 1 I ( s) sC
..... (3.16)
where, 1 = Capacitive reactance in s domain sC On substituting s = jω in equation (3.16), we get, 1 I ( jω) jω C
V ( jω ) =
where,
For simplicity
V =
1 I = −j 1 I jω C ωC
1 = X C = Capacitive reactance ωC
In summary, v = 1 C
# i dt
V (s) = 1 I (s) sC V = −j 1 I ωC
; Voltagecurrent relation of capacitance in time domain. ; Voltagecurrent relation of capacitance in sdomain. ; Voltagecurrent relation of capacitance in frequency domain.
Circuit Analysis
3. 8
Table 3.1 : R, L, C Representation in Various Domains S.No.
Parameter
Time domain
i +
1.
Resistance, R
2.
Inductance, L
3.
Capacitance, C
sdomain I(s) + V(s) 
v R
Frequency domain I + V
R
i + v 
I(s) + V(s) 
L
I + V 
sL
I(s) + V(s) 
i + v C
1 sC

R
jwL
I +
V

1 jwC
3.7 Sinusoidal Voltage and Current in Frequency Domain The instantaneous value of sinusoidal voltage in time domain is represented as, v(t) = Vmsin(ωt ± φ) In frequency domain, the rms value of sinusoidal voltage can be represented as, V ^ j ω h = V+ ! φ
For simplicity
V = V+ ! φ
where, V = Vm / 2 .....(3.17) V = Vm + ! φ = V+ ! φ 2 The instantaneous value of sinusoidal current in time domain is represented as, ∴ Vm sin ^ωt ! φh
⇒
i(t) = I m sin(ωt ± φ)
In frequency domain, the rms value of sinusoidal current can be represented as, I ^ jω h = I + ! φ
For simplicity
I = I+ ! φ
where, I = I m / 2 . ∴ I m sin ^ωt ! φh
3.8
⇒
I = I m + ! φ = I+ ! φ 2
.....(3.18)
Power, Energy and Power Factor
Power is the product of voltage and current. In circuits excited by dc sources, voltage and current are constant and so power is also constant. This constant power is called average power or power and it is denoted by P. ∴ In dc circuits, Power, P = V I In circuits excited by ac sources, voltage and current are sinusoidal quantities which vary with time. When voltage and current are time varying quantities, power is also a time varying quantity.
Chapter 3  AC Circuits, Resonance and Coupled Circuits
3. 9
For time varying quantities, power is defined as the average over a period of time. Since the average values of sinusoidal voltage and current are zero, we can take the rms values of voltage and current. We know that the rms values of voltage and current are complex and so power is also complex. “Complex power is denoted by S and it is defined as the product of rms voltage and the conjugate of rms current”. ` Complex power, S = V I* where, I* = Conjugate of I Let, V = V+δ I = I+γ *
then, I = I+ − γ where, δ is phase of voltage and γ is phase of current. *
` S = V I = V+δ # I+ − γ = VI+ (δ − γ)
Let, δ − γ = φ where, φ = Phase difference between V and I ` S = VI+φ
Let,
S = S = VI
where, S = Apparent power and expressed in VoltAmpere, i.e., VA. (The larger units of S are kVA and MVA). “Apparent power S is defined as the product of the magnitude of rms voltage and rms current”. Since S is complex, it can be expressed as a vector in a complex plane as shown in Fig. 3.8. In Fig. 3.8, the triangle formed by P, Q and S is also called a power triangle. Imaginary axis Complex plane P = S cos f Q = S sin f S Q
Imaginary axis Complex plane
Imaginary axis Complex plane
P f
S f
S
S
P
Real axis
Fig. a : Vector of S when f is positive.
P=S Q=0
P
Real axis
Real axis
Fig. b : Vector of S when f is zero.
Q
S
P = S cos f Q = S sin f
Fig. c : Vector of S when f is negative.
Fig. 3.8 : Vector of complex power S for various values of f.
The real part of S is called active power or simply power. The imaginary part of S is called reactive power. Power is denoted by P and expressed in watts, W. Reactive power is denoted by Q and expressed in voltamperereactive, VAR.
Circuit Analysis
3. 10
With reference to Fig. 3.8, we can write, S = S cos φ + j S sin φ
Let, S = P + jQ ` P = S cos φ Q = S sin φ
We know that, S = S = VI ∴ P = VI cos φ in W ∴ Q = VI sin φ in VAR
The larger units of power P is kW or MW and larger units of reactive power Q is kVAR or MVAR. ` P = VI cos φ in W =
Q = VI sin φ in VAR =
VI cos φ VI cos φ in kW = in MW 103 106 VI sin φ VI sin φ in kVAR = in MVAR 103 106
In dc circuits, V and I are constants and there is no phase difference between V and I. Hence, φ = 0 and so, cos φ = 1 and sin φ = 0. Therefore, in dc circuits, complex power or apparent power is equal to active power, and reactive power is zero. Power is rate of work done and energy is the total work done. Hence, “energy is given by the product of power and time”. When time is expressed in seconds, the unit of energy is wattsecond and when time is expressed in hours, the unit of energy is watthour. ∴ Energy, E = Pt in Ws or Wh The larger unit of energy is kWh and commercially one kWh of electrical energy is called one unit. “The ratio of active power and apparent power is defined as power factor”. Power factor is a measure of active power in the apparent power. ` Power factor =
Active power = P S Apparent power
From the power triangle of Fig. 3.8, we get, P = S cos φ S cos φ ` Power factor = P = = cos φ S S
Here, φ is the phase difference between voltage and current. Hence, from the above equation we can say that, “ power factor is also defined as cosine of the phase difference between voltage and current”.
Chapter 3  AC Circuits, Resonance and Coupled Circuits
3.9
3. 11
Impedance
“Impedance is defined as the ratio of (sinusoidal) voltage and current”. It is a frequency domain parameter but not a sinusoidal quantity. “Impedance is also defined as the total opposition offered to flow of (sinusoidal) current”. Hence, impedance is measured in Ohms (same as the unit of resistance). Impedance is a complex quantity and denoted by Z. The real part of impedance is resistance and the imaginary part of impedance is reactance. The unit of resistance, reactance and impedance are Ohm. There are two types of reactances, namely, the inductive reactance and capacitive reactance. Inductive reactance is denoted by XL and equal to ω L. Capacitive reactance is denoted by XC and equal to 1/ωC. Inductive and capacitive reactances have the exact opposite behaviours. Therefore, when expressed as a complex quantity, inductive reactance takes a positive value and capacitive reactance takes a negative value ∴ Impedance, Z = R + jX
..... (3.19)
where, R = Resistance X = Reactance Also, Z = R + jX = R + jXL Z = R + jX = R − jXC
; when reactance is inductive. ; when reactance is capacitive.
Z = R + jX = R + j(XL – XC) ; when reactance is the sum of inductance and capacitance. The symbol used to represent impedance is a rectangle as shown in Fig. 3.9. Impedance is connected to other parts of circuits using resistanceless wires.
Z a R C jX
The magnitude of impedance is denoted by Z (i.e., without an Fig. 3.9 : Symbol overbar). The argument of impedance is called impedance angle and it is for impedance. denoted by q. In equation (3.19), complex impedance is expressed in rectangular form. It can be expressed in polar form as shown below: Z = R + jX =
R2 + X2 + tan 1 X = Z +θ R
where, Z = Z =
R2 + X2
` Magnitude of impedance, Z = Z =
and
θ = +Z = tan 1 X R
R2 + X2
Impedance angle, θ = +Z = tan 1 X R
..... (3.20)
Circuit Analysis
3. 12
Imaginary Since impedance is a complex quantity it can be represented axis as a point in a complex plane with polar coordinates Z and q, as shown in Fig. 3.10. The line joining the origin and Z will be a Z vector of length Z and making an angle q with the reference. Z Now, the vector Z can be resolved into horizontal and vertical X q real components. The horizontal component is resistance R and vertical axis R component is reactance X. The rightangled triangle formed Fig. 3.10 : Impedance triangle. by R, X and Z is called the impedance triangle.
3.10 Solved Problems in AC Circuits EXAMPLE 3.1
j2 W
5W
Determine the current I 2 in the circuit shown in Fig. 1.
I2
+
SOLUTION
100Ð450V
2W j4 W
~

j2 W
Let, I T be the total current supplied by the source. This current I T divides into I1 and I 2 and flows through parallel impedances −j4 Ω
Fig. 1.
and 2 + j2 Ω as shown in Fig. 2. The current I T is given by the ratio of source voltage and total impedance at the source terminals. IT
5W
j2 W
IT I2
I1
+ o
100Ð45 V
2W
j4 W
~

+
Þ
0
100Ð45 V
ZT = 9 + j 2 W
~

j2 W
Fig. 2. The total impedance Z T at the source terminal is given by the parallel combination of −j4 Ω and 2 + j2 Ω in series with 5 + j2 Ω. ` Z T = ^5 + j2h + 6 − j4   , ^2 + [email protected] = ^5 + j2h + ;
^− j4h # ^2 + j2h
− j4 + 2 + j2
= 5 + j2 + 4 + j0 = 9 + j2 Ω o 100 ^cos 45 o + j sin 45 oh Now, I T = 100+45 = = 9.1508 + j5.8232 A 9 + j2 9 + j2
By current division rule, I2 = IT #
^9.1508 + j5.8232h # ^− j4h − j4 = 2 − j2 − j4 + 2 + j2
= 14.974 − j3.3276 = 15.3393∠−12.5o A
E
Chapter 3  AC Circuits, Resonance and Coupled Circuits
3. 13 5W
EXAMPLE 3.2 Determine the current IL in the circuit shown in Fig. 1.
IL
+ 0
10Ð0 V
2W

SOLUTION
5Ð450V
~
~
+
j2 W
Fig. 1.
Let us mark the nodes of the circuit as A, B, C and D as j5 W
o
shown in Fig. 2. Let, I1 and I 2 be the current delivered by 10∠0 V and 5W
5∠45 o V sources, respectively, from their positive ends as shown in Fig. 2. By KCL at nodeB, we can write,
10Ð0 V
IL
I1
+ 0
I2
I1 B
A
2W
I2
~
~

j2 W
..... (1)
IL + I 2 = I1
5Ð450 V
+
Fig. 2. D
The currents I1 and I 2 can be solved by writing KVL equations
C
j5 W
in the closed paths ABDA and BCDB. Consider the closed path ABDA shown in Fig. 3. By KVL, we can write, 5I1 + ^2 − j2h IL = 10+0 o
5W
A +
5^IL + I 2h + ^2 − j2h IL = 10
I1
5 I1
+
5I 2 + ^7  j2h IL = 10
10Ð00V
B 
+
b 2  j 2g I
~
e
I L = I1  I 2
j
2W
L

` 5I 2 = 10 − ^7 − j2h IL ` I2 =
7 − j2 10 IL − 5 5
= 2 − ^1.4 − j0.4h IL
j2 W 
Fig. 3.
Using equation (1)
D
.....(2)
Consider the closed path BCDB shown in Fig. 4. By KVL, we can write, j5I 2 = 5+45 o + ^2 − j2h IL j5I 2 − ^2 − j2h IL = 5^cos 45 o + j sin 45 oh
B + I L
j5 6 2 − ^1.4 − [email protected] IL − ^2 − j2h IL = 5^cos 45 o + j sin 45 oh j10 − ^2 + j7h IL − ^2 − j2h IL = 3.5355 + j3.5355
b 2  j 2g I

~
L
I2

^− 4 − j5h IL = 3.5355 + j3.5355 − j 10
D
3.5355 + j3.5355 − j 10 ` IL = − 4 − j5
= 1.1507 + 67.3c A

+ j5 I 2
Fig. 4.
= 0.4434 + j1.0618 A Using equation (1)
5Ð450 V
+
C
Circuit Analysis
3. 14
100 mF
EXAMPLE 3.3 In the circuit shown in Fig. 1, Find total current I T and power factor. Take frequency of supply as 100 Hz.
10 W
IT
+ 0
50 Ð0 V 
30 W
~
0.1 H
SOLUTION Fig. 1.
Given that, V = 50 V, f = 100 Hz, L = 0.1 H and C = 100 mF Capacitive reactance, XC =
1 1 = = 15.9155 Ω 2πfC 2π # 100 # 100 # 10 6
Inductive reactance, XL = 2πfL = 2π # 100 # 0.1 = 62.8319 Ω The frequency domain representation of the circuit is shown in Fig. 2.  j15.9155 W
 j15.9155 W
10 W
50 Ð0 V 
30 W
~
IT
j62.8319 W
IT
+ 0
10 W
30 ´ j62.8319 30 + j62.8319
+
Þ
0
50 Ð0 V 
~
= 24.4305 + j11.6647 W
Fig. 3.
Fig. 2. With reference to Fig.4, by Ohm’s law, IT =
IT
50 34.4305 − j4.2508
+ 0
50Ð0 V
 j15.9155 + 10 + 24.4305 + j11.6647 = 34.4305  j4.2508 W
~

= 1.4304 + j0.1766 A = 1.4413 ∠ 7o A
Fig. 4. o
Power factor angle, φ = + V − + I T = 0 − 7
o
=−7
o
Since the current leads the voltage, the power factor is lead.
∴ Power factor = cos φ = cos(−7o) = 0.9925 lead
EEXAMPLE 3.4 series with an impedance Z3 , connected to a 100 V, 50 Hz ac supply. Z1 = 5 − jXc Ω , Z 2 = 5 + j0 Ω , Z3 = 6.25 + j1.25 Ω . Determine the value of capacitance such that the total current of the circuit will be in phase with
+ 100 V 50 Hz
~
E
Z2 = 5 + j0
Impedances Z1 and Z 2 are parallel and this combination is in
the total voltage. Find the circuit current and power.
Fig. 1.
SOLUTION Given that, Z1 = 5 − jXc Ω ; Z 2 = 5 + j0 Ω ; V = 100 V
;
f = 50 Hz
Z3 = 6.25 + j1.25 Ω
Z1 = 5 E jXc
Z3 = 6.25 + j1.25
Chapter 3  AC Circuits, Resonance and Coupled Circuits
3. 15
With reference to Fig. 1, equivalent impedance is obtained as shown below: Zeq = Z3 +
Z1 # Z 2 Z1 + Z 2
= 6.25 + j1.25 +
` Zeq = 6.25 + j1.25 +
= 6.25 + j1.25 +
= 6.25 + j1.25 +
(5 − jXC) # 5 5 − jXC + 5 25 − j5XC 10 + jXC # 10 − jXC 10 + jXC 250 + j25XC − j50XC + 5XC2 10 2 + XC2 250 + 5XC2 10 2 + XC2
25XC
−j
10 2 + XC2
For voltage and current to be in phase, Zeq should be real and so the imaginary part of Zeq should be zero.
` j1.25 − j
25XC 10 2 + XC2
102 + XC2 = 20 XC
= 0
&
&
j1.25 =
j25XC 10 2 + XC2
&
102 + XC2 =
j25XC j1.25
XC2 − 20 XC + 100 = 0
2 ` XC = 20 ! 20 − 4 # 100 = 20 = 10 Ω 2 2
We know that, XC =
1 2πfC
&
C =
1 1 = = 3.1831 # 10 4 F = 318.31 # 10 6 F 2πfXC 2π # 50 # 10 = 318.31 mF
When XC = 10 W, Zeq = 6.25 +
250 + 5XC2 102 + XC2
2 = 6.25 + 250 +2 5 # 10 10 + 102
= 6.25 + 3.75 = 10 W ` Current, I =
V = 100 = 10 A Zeq 10
Power, P = V # I = 100 # 10 = 1000 W = 1 kW (or Power, P = I2 × real part of Zeq = 102 × 10 = 1000 W)
Circuit Analysis
3. 16
3.11
Resonance
In RLC circuits excited by sinusoidal sources, the inductive and capacitive reactances have opposite signs. Hence, when the reactances are varied, there is a possibility