Photo-Electroactive Non-Volatile Memories for Data Storage and Neuromorphic Computing (Woodhead Publishing Series in Electronic and Optical Materials) [1 ed.] 012819717X, 9780128197172

Table of contents :
Cover
Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing
Copyright
Contents
List of contributors
Preface
1 Introduction to photo-electroactive nonvolatile memory
References
2 Characteristics and mechanisms in resistive random-access memory
2.1 Resistive random-access memory concept
2.2 Resistive random-access memory materials
2.3 Resistive random-access memory mechanisms
2.3.1 Electrochemical metallization
2.3.1.1 Switching kinetics
Electrochemical reactions
Drift and diffusion
Crystallization
2.3.1.2 Single or multiple filaments
Single filament
Multiple filaments
2.3.1.3 Filament overgrowth
2.3.1.4 Filament undergrowth
2.3.2 Valence-change mechanism
2.3.2.1 Point defects in valence-change mechanism devices
2.3.2.2 Oxygen exchange in valence-change mechanism device
2.3.2.3 Eight-wise and counter-eight-wise valence-change mechanism
2.3.3 Thermochemical mechanism
2.3.4 Electrostatic/electronic effects
2.3.4.1 Space-charge-limited conduction
2.3.4.2 Metal-insulator transition
2.3.4.3 Poole–Frenkel emission
References
3 Memory characteristics and mechanisms in transistor-based memories
3.1 Introduction
3.2 The basic structures and working principles of transistor memories
3.2.1 Memory window
3.2.2 Memory on/off current ratio
3.2.3 Programming/erasing cyclic endurance property
3.2.4 Time-dependent data storage retention capability
3.3 The typical nonvolatile transistor memories
3.3.1 Floating-gate transistor memories
3.3.1.1 Electrode design
3.3.1.2 Active layer design
3.3.1.3 Tunneling/blocking dielectric layer design
3.3.1.4 Floating gate design
3.3.2 Charge-trap transistor memories
3.3.2.1 Electret layer design
3.3.3 Ferroelectric field-effect transistor memories
3.3.3.1 Ferroelectret layer design
3.4 Summary and prospect
References
4 Two-terminal optoelectronic memory device
4.1 Introduction
4.2 Microscopic mechanism
4.2.1 Interfacial barrier
4.2.2 Filament formation/dissolution
4.2.3 Charge trapping/detrapping
4.2.4 Conformation evolution
4.3 Optoelectronic memristor for memory and photonic computing
4.3.1 Multilevel storage
4.3.2 Logic operations
4.3.3 Vision sensors
4.4 Optoelectronic memristor for emulating synaptic functions
4.4.1 Photoactivated synaptic functions
4.4.2 Optogenetics-inspired tunable synaptic functions
4.5 Prospects and challenges
References
5 Three-terminal optoelectronic memory device
5.1 Introduction
5.2 The working mechanism of three-terminal optoelectronic memory device
5.3 The development of three-terminal optoelectronic memory device
5.4 Organic semiconductors based on different device structures
5.5 Two-dimensional transition metal dichalcogenide based on various device structures
5.6 Flexible three-terminal optoelectronic memory device
5.7 Conclusion
References
6 Synaptic devices based on field-effect transistors
6.1 Introduction
6.2 State-of-the-art synaptic transistors
6.2.1 Floating-gate synaptic transistors
6.2.2 Ferroelectric-gate synaptic transistors
6.2.3 Electrolyte-gate synaptic transistors
6.2.4 Optoelectronic synaptic transistors
6.3 Summary and outlook
References
7 Ionic synergetically coupled electrolyte-gated transistors for neuromorphic engineering applications
7.1 Introduction
7.2 Neural network and neuromorphic engineering
7.2.1 Neuron and synapse
7.2.2 Neuromorphic engineering and neuromorphic devices
7.3 Electrolyte-gated neuromorphic transistors
7.3.1 Electrolyte-gated transistors
7.3.2 Ionic liquid electrolyte-gated neuromorphic transistors
7.3.3 Solid-state ionic conductor gated neuromorphic transistors
7.3.4 Metaplasticity mimicked on electrolyte-gated neuromorphic transistors
7.3.5 Hodgkin–Huxley artificial synaptic membrane
7.4 Electrolyte-gated neuromorphic transistor-based artificial tactile sensory systems
7.4.1 External-powered electrolyte-gated transistor–integrated artificial tactile sensory systems
7.4.2 Self-powered EGT-based artificial tactile sensory systems
7.5 Multigate neuromorphic transistors and dendrite integration
7.5.1 Dendritic integration
7.5.2 Neuronal arithmetic
7.5.3 Orientation selectivity
7.6 Conclusions and outlook
Acknowledgments
References
8 One-dimensional materials for photoelectroactive memories and synaptic devices
8.1 Introduction
8.2 Synthesis of 1D materials
8.2.1 Synthesis of inorganic 1D material
8.2.2 Synthesis of organic 1D material
8.2.3 Others
8.3 Device fabrication
8.4 Application in photoelectroactive memory
8.4.1 Inorganic 1D material-based photoelectroactive memory
8.4.1.1 Two-terminal memory device
Single 1D material photoelectroactive memory device
1D material array photoelectroactive memory device
8.4.1.2 Three-terminal memory device
8.4.2 Organic 1D material
8.4.3 Others
8.5 Application in photoelectroactive synaptic device
8.5.1 Inorganic 1D material-based photoelectroactive synaptic device
8.5.1.1 Two-terminal synaptic device
8.5.1.2 Three-terminal synaptic device
8.5.2 Organic 1D material
8.5.3 Others
8.6 Conclusion
References
9 Novel photoelectroactive memories and neuromorphic devices based on nanomaterials
9.1 Introduction
9.1.1 The demand for developing photoelectroactive memories for data storage and neuromorphic computing
9.1.2 Some basics for biosynapse
9.2 Trapping-based photoelectroactive devices
9.2.1 Si NC-based optical synaptic devices
9.2.1.1 Device fabrication
9.2.1.2 Working principle
9.2.1.3 Device performance
9.2.1.4 Discussion
9.2.2 CNT-based devices for photoelectroactive memory
9.2.2.1 Device fabrication
9.2.2.2 Working principle
9.2.2.3 Device performance
9.2.2.4 Discussion
9.3 Migration-based devices
9.3.1 2D tunneling phototransistor for nonvolatile memory
9.3.1.1 Device fabrication
9.3.1.2 Working principle
9.3.1.3 Device performance
9.3.1.4 Discussion
9.3.2 Perovskite device as artificial eye
9.3.2.1 Device fabrication
9.3.2.2 Working principle
9.3.2.3 Device performance
9.3.2.4 Further discussion
9.4 Other photoelectroactive devices
9.5 Prospect and challenge
Acknowledgments
References
10 Organic and hybrid photoelectroactive polymer for memories and neuromorphic computing
10.1 Introduction
10.2 Organic optoelectronic materials
10.2.1 Photochromic materials
10.2.2 Photoconductive semiconductors
10.2.3 Electrochromic materials
10.3 Optoelectronic memory device
10.3.1 Resistive random access memory
10.3.2 Optical organic field-effect transistor memory
10.3.3 Optoelectronic logic gates
10.4 Artificial synapses
10.5 Conclusion
Acknowledgement
References
11 Metal oxide materials for photoelectroactive memories and neuromorphic computing systems
11.1 Introduction
11.2 Optoelectronic memristor
11.2.1 Structure of the optoelectronic memristor devices
11.2.2 I–V curves characteristics and light response
11.2.3 Photoelectric response
11.2.4 Schematic of photoelectric memristor devices
11.3 Optogenetic tunable memristors for Boolean logic and synaptic functions
11.3.1 Optoelectronic Boolean logic
11.3.2 Neuromorphic computing
11.3.3 Image memorization, preprocessing, and simulation of image recognition
11.4 Challenge and possible approaches
11.4.1 Challenge
11.4.2 The possible approaches
Acknowledgements
Conflict of interest
References
12 Perovskites for phototunable memories and neuromorphic computing
12.1 Introduction
12.2 Perovskite halides-based three-terminal phototunable flash memory
12.3 Perovskite halides-based two-terminal phototunable RRAM
12.4 Perovskite halides-based neuromorphic computing
12.5 Conclusion
References
13 Chalcogenide materials for optoelectronic memory and neuromorphic computing
13.1 Introduction and history
13.2 Basic properties of phase change materials
13.2.1 Long-range and short-range order of phase change materials
13.2.2 Switching kinetics
13.2.3 Optical property of the phase change materials
13.3 Application of phase change materials in optoelectronic nonvolatile memory
13.3.1 Rewritable optical disk
13.3.2 Electronic phase change memory
13.3.3 All-photonic memory
13.4 Applications of phase change memory in neuromorphic computing
13.4.1 Phase change memories for artificial neural networks
13.4.2 Phase change memory in optoelectronic neuromorphic systems
13.5 Conclusion
References
14 Device challenges, possible strategies, and conclusions
14.1 Preparation of photoelectroactive materials
14.1.1 Material stability and thin-film fabrication technology
14.1.2 Optical modulation
14.1.3 Biodegradability and biocompatibility
14.2 Device performance optimization
14.2.1 Device variability
14.2.2 Switching speed
14.2.3 Integration
14.3 Advanced approaches for switching mechanism
14.4 Neuromorphic computing
14.4.1 Number of conductance states
14.4.2 Sensory synapse
References
Index
Back Cover

Citation preview

Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Woodhead Publishing Series in Electronic and Optical Materials

Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing Edited by

Su-Ting Han Ye Zhou

Woodhead Publishing is an imprint of Elsevier The Officers’ Mess Business Centre, Royston Road, Duxford, CB22 4QH, United Kingdom 50 Hampshire Street, 5th Floor, Cambridge, MA 02139, United States The Boulevard, Langford Lane, Kidlington, OX5 1GB, United Kingdom Copyright © 2020 Elsevier Ltd. All rights reserved. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying, recording, or any information storage and retrieval system, without permission in writing from the publisher. Details on how to seek permission, further information about the Publisher’s permissions policies and our arrangements with organizations such as the Copyright Clearance Center and the Copyright Licensing Agency, can be found at our website: www.elsevier.com/permissions. This book and the individual contributions contained in it are protected under copyright by the Publisher (other than as may be noted herein). Notices Knowledge and best practice in this field are constantly changing. As new research and experience broaden our understanding, changes in research methods, professional practices, or medical treatment may become necessary. Practitioners and researchers must always rely on their own experience and knowledge in evaluating and using any information, methods, compounds, or experiments described herein. In using such information or methods they should be mindful of their own safety and the safety of others, including parties for whom they have a professional responsibility. To the fullest extent of the law, neither the Publisher nor the authors, contributors, or editors, assume any liability for any injury and/or damage to persons or property as a matter of products liability, negligence or otherwise, or from any use or operation of any methods, products, instructions, or ideas contained in the material herein. British Library Cataloguing-in-Publication Data A catalogue record for this book is available from the British Library Library of Congress Cataloging-in-Publication Data A catalog record for this book is available from the Library of Congress ISBN: 978-0-12-819717-2 (print) ISBN: 978-0-12-822606-3 (online) For information on all Woodhead Publishing publications visit our website at https://www.elsevier.com/books-and-journals

Publisher: Matthew Deans Acquisitions Editor: Kayla Dos Santos Editorial Project Manager: Rachel Pomery Production Project Manager: Surya Narayanan Jayachandran Cover Designer: Miles Hitchen Typeset by MPS Limited, Chennai, India

Contents

List of contributors Preface 1

2

3

4

Introduction to photo-electroactive nonvolatile memory Jing-Yu Mao and Ye Zhou References Characteristics and mechanisms in resistive random-access memory Tuo Shi and Qi Liu 2.1 Resistive random-access memory concept 2.2 Resistive random-access memory materials 2.3 Resistive random-access memory mechanisms 2.3.1 Electrochemical metallization 2.3.2 Valence-change mechanism 2.3.3 Thermochemical mechanism 2.3.4 Electrostatic/electronic effects References Memory characteristics and mechanisms in transistor-based memories Wentao Xu and Yao Ni 3.1 Introduction 3.2 The basic structures and working principles of transistor memories 3.2.1 Memory window 3.2.2 Memory on/off current ratio 3.2.3 Programming/erasing cyclic endurance property 3.2.4 Time-dependent data storage retention capability 3.3 The typical nonvolatile transistor memories 3.3.1 Floating-gate transistor memories 3.3.2 Charge-trap transistor memories 3.3.3 Ferroelectric field-effect transistor memories 3.4 Summary and prospect References Two-terminal optoelectronic memory device Xiaoning Zhao, Zhongqiang Wang, Haiyang Xu and Yichun Liu 4.1 Introduction

xi xv 1 7 13 13 16 17 18 39 48 49 51

53 53 53 56 57 57 57 58 58 64 66 70 70 75 75

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5

6

7

Contents

4.2

Microscopic mechanism 4.2.1 Interfacial barrier 4.2.2 Filament formation/dissolution 4.2.3 Charge trapping/detrapping 4.2.4 Conformation evolution 4.3 Optoelectronic memristor for memory and photonic computing 4.3.1 Multilevel storage 4.3.2 Logic operations 4.3.3 Vision sensors 4.4 Optoelectronic memristor for emulating synaptic functions 4.4.1 Photoactivated synaptic functions 4.4.2 Optogenetics-inspired tunable synaptic functions 4.5 Prospects and challenges References

77 79 81 84 87 89 89 91 91 95 95 97 100 100

Three-terminal optoelectronic memory device Chaoyue Zheng, Ye Zhou and Su-Ting Han 5.1 Introduction 5.2 The working mechanism of three-terminal optoelectronic memory device 5.3 The development of three-terminal optoelectronic memory device 5.4 Organic semiconductors based on different device structures 5.5 Two-dimensional transition metal dichalcogenide based on various device structures 5.6 Flexible three-terminal optoelectronic memory device 5.7 Conclusion References

107

Synaptic devices based on field-effect transistors Shilei Dai, Dandan Hao, Shaojiang Chen and Jia Huang 6.1 Introduction 6.2 State-of-the-art synaptic transistors 6.2.1 Floating-gate synaptic transistors 6.2.2 Ferroelectric-gate synaptic transistors 6.2.3 Electrolyte-gate synaptic transistors 6.2.4 Optoelectronic synaptic transistors 6.3 Summary and outlook References Ionic synergetically coupled electrolyte-gated transistors for neuromorphic engineering applications Li Qiang Zhu, Fei Yu and Zheng Yu Ren 7.1 Introduction 7.2 Neural network and neuromorphic engineering 7.2.1 Neuron and synapse

107 108 109 111 114 117 118 118 121 121 122 123 127 130 134 139 140

145 145 146 146

Contents

7.2.2 Neuromorphic engineering and neuromorphic devices Electrolyte-gated neuromorphic transistors 7.3.1 Electrolyte-gated transistors 7.3.2 Ionic liquid electrolyte-gated neuromorphic transistors 7.3.3 Solid-state ionic conductor gated neuromorphic transistors 7.3.4 Metaplasticity mimicked on electrolyte-gated neuromorphic transistors 7.3.5 Hodgkin Huxley artificial synaptic membrane 7.4 Electrolyte-gated neuromorphic transistor-based artificial tactile sensory systems 7.4.1 External-powered electrolyte-gated transistor integrated artificial tactile sensory systems 7.4.2 Self-powered EGT-based artificial tactile sensory systems 7.5 Multigate neuromorphic transistors and dendrite integration 7.5.1 Dendritic integration 7.5.2 Neuronal arithmetic 7.5.3 Orientation selectivity 7.6 Conclusions and outlook Acknowledgments References 7.3

8

One-dimensional materials for photoelectroactive memories and synaptic devices Guanglong Ding, Kui Zhou, Teng Li, Baidong Yang and Ye Zhou 8.1 Introduction 8.2 Synthesis of 1D materials 8.2.1 Synthesis of inorganic 1D material 8.2.2 Synthesis of organic 1D material 8.2.3 Others 8.3 Device fabrication 8.4 Application in photoelectroactive memory 8.4.1 Inorganic 1D material-based photoelectroactive memory 8.4.2 Organic 1D material 8.4.3 Others 8.5 Application in photoelectroactive synaptic device 8.5.1 Inorganic 1D material-based photoelectroactive synaptic device 8.5.2 Organic 1D material 8.5.3 Others 8.6 Conclusion References

vii

147 148 148 150 151 154 159 160 162 163 165 165 167 168 169 170 170

179 179 180 180 181 181 182 182 182 188 188 188 189 191 191 193 193

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10

11

Contents

Novel photoelectroactive memories and neuromorphic devices based on nanomaterials Fan Wu, He Tian and Tian-Ling Ren 9.1 Introduction 9.1.1 The demand for developing photoelectroactive memories for data storage and neuromorphic computing 9.1.2 Some basics for biosynapse 9.2 Trapping-based photoelectroactive devices 9.2.1 Si NC-based optical synaptic devices 9.2.2 CNT-based devices for photoelectroactive memory 9.3 Migration-based devices 9.3.1 2D tunneling phototransistor for nonvolatile memory 9.3.2 Perovskite device as artificial eye 9.4 Other photoelectroactive devices 9.5 Prospect and challenge Acknowledgments References Organic and hybrid photoelectroactive polymer for memories and neuromorphic computing Xiangyu Tian, Wuhong Xue, Bin Zhang, Xiaohong Xu, Yu Chen and Gang Liu 10.1 Introduction 10.2 Organic optoelectronic materials 10.2.1 Photochromic materials 10.2.2 Photoconductive semiconductors 10.2.3 Electrochromic materials 10.3 Optoelectronic memory device 10.3.1 Resistive random access memory 10.3.2 Optical organic field-effect transistor memory 10.3.3 Optoelectronic logic gates 10.4 Artificial synapses 10.5 Conclusion Acknowledgement References Metal oxide materials for photoelectroactive memories and neuromorphic computing systems Xiaobing Yan, Jianhui Zhao, Zhenyu Zhou and Bo Zhang 11.1 Introduction 11.2 Optoelectronic memristor 11.2.1 Structure of the optoelectronic memristor devices 11.2.2 I V curves characteristics and light response 11.2.3 Photoelectric response 11.2.4 Schematic of photoelectric memristor devices

201 201 201 202 206 206 209 212 212 215 219 220 220 221

223

223 224 224 226 227 228 228 232 235 237 244 245 245

251 251 252 253 255 255 257

Contents

Optogenetic tunable memristors for Boolean logic and synaptic functions 11.3.1 Optoelectronic Boolean logic 11.3.2 Neuromorphic computing 11.3.3 Image memorization, preprocessing, and simulation of image recognition 11.4 Challenge and possible approaches 11.4.1 Challenge 11.4.2 The possible approaches Acknowledgements Conflict of interest References

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11.3

12

13

Perovskites for phototunable memories and neuromorphic computing Jinrui Chen, Zhanpeng Wang, Yan Wang, Ye Zhou and Su-Ting Han 12.1 Introduction 12.2 Perovskite halides-based three-terminal phototunable flash memory 12.3 Perovskite halides-based two-terminal phototunable RRAM 12.4 Perovskite halides-based neuromorphic computing 12.5 Conclusion References Chalcogenide materials for optoelectronic memory and neuromorphic computing Zhe Yang, Yi Li and Xiangshui Miao 13.1 Introduction and history 13.2 Basic properties of phase change materials 13.2.1 Long-range and short-range order of phase change materials 13.2.2 Switching kinetics 13.2.3 Optical property of the phase change materials 13.3 Application of phase change materials in optoelectronic nonvolatile memory 13.3.1 Rewritable optical disk 13.3.2 Electronic phase change memory 13.3.3 All-photonic memory 13.4 Applications of phase change memory in neuromorphic computing 13.4.1 Phase change memories for artificial neural networks 13.4.2 Phase change memory in optoelectronic neuromorphic systems 13.5 Conclusion References

260 261 266 269 271 271 273 274 274 274

279 279 281 283 285 288 289

293 293 295 295 297 300 301 301 303 305 308 308 311 312 312

x

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Contents

Device challenges, possible strategies, and conclusions Ziyu Lv, Xuechao Xing, Ye Zhou and Su-Ting Han 14.1 Preparation of photoelectroactive materials 14.1.1 Material stability and thin-film fabrication technology 14.1.2 Optical modulation 14.1.3 Biodegradability and biocompatibility 14.2 Device performance optimization 14.2.1 Device variability 14.2.2 Switching speed 14.2.3 Integration 14.3 Advanced approaches for switching mechanism 14.4 Neuromorphic computing 14.4.1 Number of conductance states 14.4.2 Sensory synapse References

Index

317 317 317 318 318 319 319 320 320 320 321 321 322 323 325

List of contributors

Jinrui Chen Institute for Advanced Study, Shenzhen University, Shenzhen, P.R. China Shaojiang Chen School of Materials Science and Engineering, Tongji University, Shanghai, P.R. China Yu Chen School of Chemistry and Molecular Engineering, East China University of Science and Technology, Shanghai, P.R. China Shilei Dai School of Materials Science and Engineering, Tongji University, Shanghai, P.R. China Guanglong Ding Institute for Advanced Study, Shenzhen University, Shenzhen, P.R. China Su-Ting Han Institute of Microscale Optoelectronics, Shenzhen University, Shenzhen, P.R. China Dandan Hao School of Materials Science and Engineering, Tongji University, Shanghai, P.R. China Jia Huang School of Materials Science and Engineering, Tongji University, Shanghai, P.R. China Teng Li Institute of Micro Optoelectronics, Shenzhen University, Shenzhen, P.R. China Yi Li Wuhan National Laboratory for Optoelectronics, School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, P.R. China Gang Liu School of Chemistry and Chemical Engineering, Shanghai Jiao Tong University, Shanghai, P.R. China Qi Liu Key Laboratory of Microelectronic Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, P.R. China; University of Chinese Academy of Sciences, Beijing, P.R. China

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List of contributors

Yichun Liu Key Laboratory of UV-Emitting Materials and Technology of Ministry of Education, Northeast Normal University, Changchun, P.R. China Ziyu Lv Institute of Microscale Optoelectronics, Shenzhen University, Shenzhen, P.R. China Jing-Yu Mao Institute for Advanced Study, Shenzhen University, Shenzhen, P.R. China Xiangshui Miao Wuhan National Laboratory for Optoelectronics, School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, P.R. China Yao Ni Institute of Optoelectronic Thin Film Devices and Technology, Key Laboratory of Optoelectronic Thin Film Devices and Technology of Tianjin, Nankai University, Tianjin, P.R. China Tian-Ling Ren Institute of Microelectronics, Tsinghua University, Beijing, P.R. China; Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing, P.R. China Zheng Yu Ren Ningbo Institute of Materials Technology and Engineering, Chinese Academy of Sciences, Ningbo, P.R. China Tuo Shi Key Laboratory of Microelectronic Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, P.R. China; University of Chinese Academy of Sciences, Beijing, P.R. China He Tian Institute of Microelectronics, Tsinghua University, Beijing, P.R. China; Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing, P.R. China Xiangyu Tian School of Chemistry and Chemical Engineering, Shanghai Jiao Tong University, Shanghai, P.R. China; School of Chemistry and Molecular Engineering, East China University of Science and Technology, Shanghai, P.R. China Yan Wang Institute of Microscale Optoelectronics, Shenzhen University, Shenzhen, P.R. China Zhanpeng Wang Institute for Advanced Study, Shenzhen University, Shenzhen, P.R. China Zhongqiang Wang Key Laboratory of UV-Emitting Materials and Technology of Ministry of Education, Northeast Normal University, Changchun, P.R. China

List of contributors

xiii

Fan Wu Institute of Microelectronics, Tsinghua University, Beijing, P.R. China; Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing, P.R. China Xuechao Xing Institute of Microscale Optoelectronics, Shenzhen University, Shenzhen, P.R. China Haiyang Xu Key Laboratory of UV-Emitting Materials and Technology of Ministry of Education, Northeast Normal University, Changchun, P.R. China Wentao Xu Institute of Optoelectronic Thin Film Devices and Technology, Key Laboratory of Optoelectronic Thin Film Devices and Technology of Tianjin, Nankai University, Tianjin, P.R. China Xiaohong Xu School of Chemistry and Materials Science, Shanxi Normal University, Linfen, P.R. China Wuhong Xue School of Chemistry and Chemical Engineering, Shanghai Jiao Tong University, Shanghai, P.R. China; School of Chemistry and Materials Science, Shanxi Normal University, Linfen, P.R. China Xiaobing Yan National-Local Joint Engineering Laboratory of New Energy Photovoltaic Devices, Key Laboratory of Optoelectronic Information Materials of Hebei Province, Key Laboratory of Digital Medical Engineering of Hebei Province, College of Electron and Information Engineering, Hebei University, Baoding, P.R. China Baidong Yang Institute of Micro Optoelectronics, Shenzhen University, Shenzhen, P.R. China Zhe Yang Wuhan National Laboratory for Optoelectronics, School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, P.R. China Fei Yu Ningbo Institute of Materials Technology and Engineering, Chinese Academy of Sciences, Ningbo, P.R. China Bin Zhang School of Chemistry and Molecular Engineering, East China University of Science and Technology, Shanghai, P.R. China Bo Zhang National-Local Joint Engineering Laboratory of New Energy Photovoltaic Devices, Key Laboratory of Optoelectronic Information Materials of Hebei Province, Key Laboratory of Digital Medical Engineering of Hebei Province, College of Electron and Information Engineering, Hebei University, Baoding, P.R. China

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List of contributors

Jianhui Zhao National-Local Joint Engineering Laboratory of New Energy Photovoltaic Devices, Key Laboratory of Optoelectronic Information Materials of Hebei Province, Key Laboratory of Digital Medical Engineering of Hebei Province, College of Electron and Information Engineering, Hebei University, Baoding, P.R. China Xiaoning Zhao Key Laboratory of UV-Emitting Materials and Technology of Ministry of Education, Northeast Normal University, Changchun, P.R. China Chaoyue Zheng Institute of Microscale Optoelectronics, Shenzhen University, Shenzhen, P.R. China Kui Zhou Institute for Advanced Study, Shenzhen University, Shenzhen, P.R. China Ye Zhou Institute for Advanced Study, Shenzhen University, Shenzhen, P.R. China Zhenyu Zhou National-Local Joint Engineering Laboratory of New Energy Photovoltaic Devices, Key Laboratory of Optoelectronic Information Materials of Hebei Province, Key Laboratory of Digital Medical Engineering of Hebei Province, College of Electron and Information Engineering, Hebei University, Baoding, P.R. China Li Qiang Zhu School of Physical Science and Technology, Ningbo University, Ningbo, P.R. China; Ningbo Institute of Materials Technology and Engineering, Chinese Academy of Sciences, Ningbo, P.R. China

Preface

The demand for data storage, computing performance, and energy efficiency is increasing exponentially and will exceed the capabilities of current information technologies. With Moore’s law coming to an end, alternatives to traditional silicon technology and novel memory principles are expected to meet the need of modern data-intensive applications such as “big data” and artificial intelligence (AI). To respond to this demand, photoelectroactive nonvolatile memory devices have elicited intense research in the past decade due to their subnanosecond switching rate, excellent write-erase endurance, super high-storage density, and low-operating energy. Two crucial aspects should be noted here. First, optical stimuli can be regarded as an additional terminal to regulate the memory performance, enabling multibit storage and fostering new applications such as integrated photonic circuits. Second, to deal with von Neumann bottleneck in classical computing architectures and neuromorphic computing systems are being fabricated for mimicking the human brain’s principle to parallel information storage and process. In this book, we will first introduce the design concept, operation principle, and basic storage mechanism of optoelectronic memory devices in two-terminal (e.g., resistance random access memory, phase change memory) or three terminal device structure (e.g., flash memory). We then introduce a series of materials (i.e., organic molecules, perovskites, one-dimensional materials, and two-dimensional materials) with desirable electrical and optical properties to prepare photoelectroactive memory devices and neuromorphic computing systems. Last, device challenges as well as possible strategies are discussed to promote the commercial translation of these optoelectronic devices. Through this book, we have summarized the advances in the development of photoelectroactive memories and neuromorphic computing systems, pointing out challenges and possible solutions for device design, and evaluating prospects for commercial applications. Three categories will benefit from the device developments: electrophotoactive memory, photonic neuromorphic computing, and inmemory computing. Our aim is to give a comprehensive, accessible, critical, and up-to-date proposed book here, which will attract interest to graduate students and researchers in solid-state electronics. Finally, we want to acknowledge all the contributed authors who have given their time and expertise in this book. We would like to express our gratitude to Rachel Pomery, Peter W. Adamson, Kayla Dos Santos, Surya Narayanan Jayachandran, and Narmatha Mohan at ELSEVIER for all the help in the book

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Preface

editorial process, and for the wonderful experience of working with them. We also want to thank all the readers for their interest in our book. We hope that this book would be useful as a reference guide for researchers established in the field, as well as an introduction for scientists and engineers entering the field of memory devices and neuromorphic computing systems. Ye Zhou and Su-Ting Han

Introduction to photoelectroactive nonvolatile memory

1

Jing-Yu Mao and Ye Zhou Institute for Advanced Study, Shenzhen University, Shenzhen, P.R. China

In the Big Data era, enormous quantities of data are generated every second from various sources such as smart phones, personal computers, etc., which have stimulated the rapid development of advanced technologies in digital devices and networks. As the objects or physical information (signal) in real world are connected more tightly with networks through the Internet of things (IoT), versatile electronic devices with distinct functions will be entailed as building blocks [1,2]. None of these would have happened without progressive development of microelectronics especially data storage technology that advanced with time. This brings critical requirements on data storage devices of the present memory technology in terms of capacity, operation speed, device miniaturization, cost, and energy consumption [3,4]. To deal with the ever-growing amount of data, memory cells with decreased unit area and higher integration level were developed; thanks to the well-developed semiconductor technology [5]. During the past decades, however, continuous shrinking of device size is reaching its limits due to the failure of Moore’s law [6,7]. An effective way to address this issue is to create novel nonvolatile memory with various functionalities by modulation from additional physical channels. Among existing modulation approaches, light appears to be the most feasible and effective one which attracts great attentions and substantial researches on optoelectronic nonvolatile memory have been conducted [8 11]. Optoelectronic memory with its memory states modulated by both optical and electrical stimuli raises appealing prospect in data storage and other aspect beyond it [12 14]. In terms of enlarging the capacity of nonvolatile memory devices, unlike traditional binary storage, multilevel memory containing multiple memory states within one unit cell is critical to realize high-density data storage device, since more information can be recorded without enlarging the total device size. Large memory window and stable readout operations should be achieved to enable distinct separation of individual memory state and retention time of which stays as a key factor of this approach. It is critical to choose appropriate materials among versatile photoelectroactive materials to fulfill this requirement. In addition, in stark contrast to all electrical memory, light modulated memory has its superiority that the electrical readout is orthogonal to light modulation [15]. Other physical channels such as magnetic field or heat may also act as alternative ways to modulate the memory performance. Although, currently optoelectronic nonvolatile memory is unable to

Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing. DOI: https://doi.org/10.1016/B978-0-12-819717-2.00001-1 © 2020 Elsevier Ltd. All rights reserved.

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

undermine the predominant status of electrically operated memory, vigorous potential has been exposed for the development of next-generation memory. Traditional von Neumann system has posed constraints in its inefficiency, however, frequent and necessary communication with limited bandwidth between central processing unit and memory [16]. One way of addressing this issue is optoelectronic interconnection. Different from conventional electrical data transmission, highly efficient optical communication operates at the speed of light between data processing unit and memory unit, leading to a better way of data processing [17]. Besides, more densely interconnected and integrated device components are strongly needed to fulfill the urgent requirements for constructing innovative computing paradigm [18,19]. One could envision the prosperous future by combining these optimizations since the present computing system made of all-electronic components, in which massive energy consumptions and dissipations are inevitable from electronic devices operations, has failed to provide a satisfactory answer to better future computing [20]. Such limitations spark emergent demand on novel memory device concept and new types of computing architecture [21 23]. Parallel operations of data processing and memorizing enabled by in-memory computing show the potential to renovate the present computing architecture [24]. With the help of optical communication and processing, superiorities such as high bandwidth, high-speed data transmission, and energy-efficient operations will be accompanied with the appearance of novel memory devices. They are inspired by the highly parallel data processing inside human brain with numerous neurons and junctions (synapses) in between [25]. The transmission of information is dependent on the synaptic connection strength which can be modulated by chemical approaches upon the arrival of input signals [26]. These series of actions will affect synaptic plasticity, which is the foundation of learning and memory in human brain [27,28]. Human neural network outperforms modern computers with respect to computing efficiency, although the computing speed of processor is significantly faster than that of its biological counterpart. Besides, a surprisingly low energy consumption per event (about 10216 J) found in brain activities with low cost makes it superior to any present machine [29]. Therefore, energetically friendly brain-like computing systems with learning and memory capabilities are suitable for more effective and efficient computation [30]. Electronic and optoelectronic synaptic devices of resistive switching type and flash memory based transistor type were employed to mimic the short- and long-term synaptic plasticity [31 36]. Concept of neuromorphic computing was brought into sight for more efficient and biorealistic implementation, which pave the way for the construction of artificial neural network [21,37 40]. Electrical-driven memory can be sorted into two categories including volatile memory and nonvolatile memory in view of data retention time. For volatile memory, transient response to program operation occurs before it recovers to its original state. Namely, the recorded data can only be preserved for a short period and will dissipate soon after power off, and this phenomenon is frequently used in dynamic random access memory (DRAM). For nonvolatile memory, the programed state maintains for a relatively long period after the removal of external voltage supply.

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Normally, the program and erase operations can be repeatedly performed for many times. Here, nonvolatile memory will be discussed in two most common categories, including three-terminal transistor-based memory and two-terminal resistive switching memory. Considerable efforts have been carried out in enabling reliable performance of memory cell by employing different functional materials. In these devices, photonic modulation was introduced in multifunctional devices concerning information communications, signal sensing, and logics, offering a broad new vista to achieve high computation standards. Transistor-based flash memory is a well-studied data storage device that lies the foundation in basic field effect transistor (FET). Normally, a FET despite of its configuration, contains a gate electrode, a gate dielectric layer, a semiconductor layer, and a pair of source and drain electrodes. The current in semiconductor channel mostly depends on gate voltage modulation at constant source drain voltage application. Flash memory has been widely employed for commercial applications like solid-state drives and flash disks in our daily lives due to the compatibility with complementary metal-oxide-semiconductor (CMOS) circuit. Before the flash memory came out, electrically erasable programmable read-only memory (EEPROM) as a revised form of electrically programmable read-only memory (EPROM) suffered from high fabrication cost. The operation mechanism flash memory with single transistor realization is based on charge trapping and detrapping within floating gate layer or charge trapping element inserted between semiconductor and gate dielectric layer or flipping of molecular dipoles within ferroelectric materials leading to the shift of threshold voltage [41 44]. This technology has proved its reliability in storage capacity, cyclic operation, and long data retention time through tons of researches. Nevertheless, conventional silicon-based memory is obviously not friendly for flexible devices and thus was ruled out for wearable applications [45]. Moreover, silicon-based materials restrict further integration of added functions. A variety of materials have been employed in flash memory such as organic molecules, metal nanoparticles, ferroelectric materials, and two-dimensional materials [44 52]. In flash memory considering programing and erasing operations, gate voltage modulation perpendicular to semiconductor channel enables nondestructive readout process. This spatially separated voltage modulation inspires the introduction of light as an additional terminal for optoelectronic flash memory with tunable performance. In view of light modulation, external optical stimuli can be applied and affect either photoactive semiconductor channel or charge trapping layer depending on the wavelength of the incident photons [53 55]. Interfacial effects and charge transfer/injection at interfaces within heterostructures play a significant role in the light stimulated effects [56 58]. Due to the downscaling limits of conventional technologies, focus was shifted toward the achievements of materials’ bistability which stands as a new storage technology with potential in opening up new era [59,60]. During the past decade, resistive switching memory becomes a rising star in the field of data storage device due to its ability of scaling down to several nanometers, fast switching speed, highdensity integration as well as the compatibility with existing CMOS technology [61,62]. One intriguing feature of this type of memory that makes it popular and

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

unique is that resistive memory itself has extremely simple crossbar structure of metal-insulator-metal (MIM) which directly leads to high storage density and allow three-dimensional stack [63]. Upon the application of external voltage, the resistance of the switching media undergoes an abrupt transition from high resistance state (HRS) termed “0” to low resistance state (LRS) termed “1” [64]. The disparate internal resistance states result in the memory effect, and the greater the difference between each state, the easier the separation of readout value will be. To evaluate the memory performance, current ratio between LRS and HRS, resistance transition time, data retention ability, and endurance property are taken into consideration. Owing to the sandwich structure, active materials play an instrumental role in resistance transition though electrode materials may sometimes get involved in this process. Therefore, appropriately designed materials directly contribute to desired device performance. For example, resistive switching memory based on organic molecules will meet the requirement of flexible and wearable applications [65]. The basic physical mechanism of resistive switching memory seems diversified and sometimes synergistic effect occurs which appears to be more elusive and obscure compared with flash memory. Conductive filament conduction, space charge and traps, charge transfer, conformation change, interface effect, and other possible explanations may be used to interpret the resistance transition process [66 71]. When voltage supply is removed, nonvolatile resistive memory can retain its resistance state. The resistance transition and nonvolatility often correlates with redox reactions in stark contrast to the charge storage element (charge reservoir) in flash memory. As for optoelectronic resistive memory, critical demand on the response and efficient modulation to both light and electrical stimuli raise a claim on the selection of active materials [72]. In most cases, light signal often acts as an auxiliary means to tune the memory performance. Optical programing/erasing has also proved to be effective to change the internal resistance of this kind of devices solely without electrical supply. Detailed interpretation of the operation mechanism and memory behavior based on different kinds of active materials will be reviewed in the later chapters. The progressive development and glorious potential have not restrained the research interest in existing device structure and operation modes [73 77]. Other than the mentioned two types of comprehensively studied memory, novel memory device concepts and structures have also been proposed. Recently, polycrystalline MoS2-based multiterminal memtransistor, namely the incorporation of memristor and transistor, was proposed as nonvolatile memory and artificial synapse with dual modulations from both drain and gate bias [78,79]. Although two-terminal nonvolatile resistive switching of either lateral or vertical device configuration has been widely reported and studied; and effective gate modulation on resistive switching has rarely been presented. By virtue of regulation of Schottky barrier heights through the migration of defects, large memory window, added gate tunability, and heterosynapticity through multiterminal operations were achieved to guide the innovation for neuromorphic applications. As a matter of fact, ideas should not be constrained within present or available device structure. Two-terminal tunneling random access memory (TRAM) with a device configuration of three-terminal flash

Introduction to photo-electroactive nonvolatile memory

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memory except for the unnecessity of gate electrode and gate dielectric layer [80]. TRAM operates as a two-terminal charge trapping device with charge carriers injected directly from drain electrode. Therefore, conductance in the semiconductor channel variation is strongly dependent on the type of charge carrier and the electrostatic field, meanwhile extremely large memory window and multibit optical memory were obtained [81]. The appearance of this device undoubtedly breaks the boundary between three- and two-terminal in terms of operation mechanisms. More innovative works are envisaged in the aspect of nonvolatile memory with additional functions by novel design of device structure and full exploitation of active materials. Implementations of various functions in electric circuits require complicated set of electronic components, thus substantial energy consumption is inevitable. Optoelectronic platforms can be constructed based on nonvolatile memory when incorporated with other functional devices including photodetectors, solar cells, and light-emitting diodes [8,82,83]. However, single device realization of certain functions using memory element is extremely advantageous since added functions are adhered on the basis of memory effect with simple device structure [84]. Mining more possibilities of single device realization with complicated functions can contribute a lot to miniaturization and simplification of existing devices [85]. Most recently, multifunctional optoelectronic nonvolatile memory fabricated with properly selected materials has drawn tremendous attentions in research aspect in order to simplify device configuration while integrate as many as functions within constrained area. Reconfigurable logic and arithmetic operations have already been realized with superb behaviors. Electrical and optical signals can both serve as logic inputs and the final current state after processing input stimuli will be defined as the output. This has extra requirement on device characteristics because valid modulation of current through light can only be conducted on memory device with persistent photoconductivity. Moreover, different photoresponses to multiple combinations of wavelength and intensity of incident light can diversify the application within single device. As an important constituent in sensory perceptual system, human visual system is well developed and complicated, where eyes play the role of sensing visual information of surrounding environment and transform light signals into electrical ones that are fed to visual neurons for further processing and memorizing [84]. Great efforts have been made to simulate human visual system by integrating a mass of devices with various functions, which certainly take up a lot of space as well as posing challenge in reducing the cost [86 88]. Optimized optoelectronic memory can act as a set of photodetection, information storage, and image preprocessing device which functions as light sensing, memory unit to store digital images and noise reduction section, serving as the essential step toward the realization of advanced artificial visual systems for image information storage and processing [89,90]. In the past few years, conventional electrical-driven nonvolatile memory has been developed toward optoelectronic memory fabricated with optimized photoelectroactive materials, high controllability, and well-developed functions [91]. In this book, nonvolatile memory will be discussed from the perspective of

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

photo-electroactive materials, device structure, and applications of two-terminal resistive switching memory and three-terminal transistor-based flash memory (Fig. 1.1). Firstly, we will provide the fundamental operation mechanisms of both types of memory and their corresponding memory characteristics. We will then review the development of recent progress on memory and neuromorphic

Figure 1.1 Nonvolatile memory including resistive switching and flash memory, and their potential applications. (A) Photonic memory device based on monolayer MoS2. (B) Flexible resistive switching memory based on organic molecules. (C) Dual gate flash memory device with ambipolar black phosphorous as channel materials. (D) Biological neurons and connections (synapses) in between. (E) Visual information received by eye to visual cortex for further processing. Learning process occurs in neural network with highly connected neurons. Source: Reproduced with permission from H. Tan, Z. Ni, W. Peng, S. Du, X. Liu, S. Zhao, et al., Broadband optoelectronic synaptic devices based on silicon nanocrystals for neuromorphic computing, Nano Energy 52 (2018) 422 430; S. Kim, B. Choi, M. Lim, J. Yoon, J. Lee, H.D. Kim, et al., Pattern recognition using carbon nanotube synaptic transistors with an adjustable weight update protocol, ACS Nano 11 (2017) 2814 2822; H. Tian, B. Deng, M.L. Chin, X. Yan, H. Jiang, S.J. Han, et al., A dynamically reconfigurable ambipolar black phosphorus memory device, ACS Nano 10 (2016) 10428 10435; J. Lee, S. Pak, Y.W. Lee, Y. Cho, J. Hong, P. Giraud, et al., Monolayer optical memory cells based on artificial trap-mediated charge storage and release, Nat. Commun. 8 (2017) 14734; U.S. Bhansali, M. A. Khan, D. Cha, M.N. AlMadhoun, R. Li, L. Chen, et al., Metal-free, single-polymer device exhibits resistive memory effect, ACS Nano 7 (2013) 10518 10524.

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applications based on different kinds of materials consisting of ionic electrolyte, organic molecules, one- and two-dimensional materials, metal oxides, perovskites, and chalcogenides, exhibiting a comprehensive map of the choice of materials and design optimization for specified purpose. We simply hope to motivate new ideas in this research area and pave the way for more innovative works. Finally, existing challenges are put forward along with possible solutions to address these issues, and future outlook to envision potential prospect optoelectronic nonvolatile memory and memory-based neuromorphic systems for visual applications and intelligent systems.

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[71] T. Hasegawa, K. Terabe, T. Tsuruoka, M. Aono, Atomic switch: atom/ion movement controlled devices for beyond von-Neumann computers, Adv. Mater. 24 (2012) 252 267. [72] Y. Zhai, X. Yang, F. Wang, Z. Li, G. Ding, Z. Qiu, et al., Infrared-sensitive memory based on direct-grown MoS2-upconversion-nanoparticle heterostructure, Adv. Mater. 30 (2018) 1803563. [73] S. Wang, C. He, J. Tang, X. Lu, C. Shen, H. Yu, et al., New floating gate memory with excellent retention characteristics, Adv. Electron. Mater. 4 (2019) 1800726. [74] W. Huh, S. Jang, J.Y. Lee, D. Lee, D. Lee, J.M. Lee, et al., Synaptic barristor based on phase-engineered 2D heterostructures, Adv. Mater. 30 (2018) 1801447. [75] T. Liu, D. Xiang, Y. Zheng, Y. Wang, X. Wang, L. Wang, et al., Nonvolatile and programmable photodoping in MoTe2 for photoresist-free complementary electronic devices, Adv. Mater. 30 (2018) 1804470. [76] Y. Yang, H. Du, Q. Xue, X. Wei, Z. Yang, C. Xu, et al., Three-terminal memtransistors based on two-dimensional layered gallium selenide nanosheets for potential low-power electronics applications, Nano Energy 57 (2019) 566 573. [77] Y.-N. Zhong, T. Wang, X. Gao, J.-L. Xu, S.-D. Wang, Synapse-like organic thin film memristors, Adv. Funct. Mater. 28 (2018) 1800854. [78] V.K. Sangwan, H.S. Lee, H. Bergeron, I. Balla, M.E. Beck, K.S. Chen, et al., Multiterminal memtransistors from polycrystalline monolayer molybdenum disulfide, Nature 554 (2018) 500 504. [79] L. Wang, W. Liao, S.L. Wong, Z.G. Yu, S. Li, Y.F. Lim, et al., Artificial synapses based on multiterminal memtransistors for neuromorphic application, Adv. Funct. Mater. 29 (2019) 1901106. [80] Q.A. Vu, Y.S. Shin, Y.R. Kim, V.L. Nguyen, W.T. Kang, H. Kim, et al., Two-terminal floating-gate memory with van der Waals heterostructures for ultrahigh on/off ratio, Nat. Commun. 7 (2016) 12725. [81] M.D. Tran, H. Kim, J.S. Kim, M.H. Doan, T.K. Chau, Q.A. Vu, et al., Two-terminal multibit optical memory via van der Waals heterostructure, Adv. Mater. 31 (2018) 1807075. [82] S. Chen, Z. Lou, D. Chen, G. Shen, An artificial flexible visual memory system based on an UV-motivated memristor, Adv. Mater. 30 (2018) 1705400. [83] D. Son, S.I. Chae, M. Kim, M.K. Choi, J. Yang, K. Park, et al., Colloidal synthesis of uniform-sized molybdenum disulfide nanosheets for wafer-scale flexible nonvolatile memory, Adv. Mater. 28 (2016) 9326 9332. [84] H. Wang, H. Liu, Q. Zhao, Z. Ni, Y. Zou, J. Yang, et al., Band organic photosensor array for filter-free near-infrared-to-memory operations, Adv. Mater. 29 (2017) 1701772. [85] W. Wu, X. Wang, X. Han, Z. Yang, G. Gao, Y. Zhang, et al., Flexible photodetector arrays based on patterned CH3 NH3 PbI3- x Clx perovskite film for real-time photosensing and imaging, Adv. Mater. 31 (2019) 1805913. [86] S. Gao, G. Liu, H. Yang, C. Hu, Q. Chen, G. Gong, et al., An oxide Schottky junction artificial optoelectronic synapse, ACS Nano 13 (2019) 2634. [87] C. Choi, M.K. Choi, S. Liu, M.S. Kim, O.K. Park, C. Im, et al., Human eye-inspired soft optoelectronic device using high-density MoS2-graphene curved image sensor array, Nat. Commun. 8 (2017) 1664. [88] H.C. Ko, M.P. Stoykovich, J. Song, V. Malyarchuk, W.M. Choi, C.-J. Yu, et al., A hemispherical electronic eye camera based on compressible silicon optoelectronics, Nature 454 (2008) 748 753.

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[89] J.F. Maya-Vetencourt, D. Ghezzi, M.R. Antognazza, E. Colombo, M. Mete, P. Feyen, et al., A fully organic retinal prosthesis restores vision in a rat model of degenerative blindness, Nat. Mater. 16 (2017) 681 689. [90] K. Mathieson, J. Loudin, G. Goetz, P. Huie, L. Wang, T.I. Kamins, et al., Photovoltaic retinal prosthesis with high pixel density, Nat. Photon. 6 (2012) 391 397. [91] J.Y. Mao, L. Zhou, X. Zhu, Y. Zhou, S.T. Han, Photonic memristor for future computing: a perspective, Adv. Opt. Mater. 7 (2019) 1900766.

Characteristics and mechanisms in resistive random-access memory

2

Tuo Shi1,2 and Qi Liu1,2 1 Key Laboratory of Microelectronic Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, P.R. China, 2University of Chinese Academy of Sciences, Beijing, P.R. China

2.1

Resistive random-access memory concept

Resistive random-access memory (RRAM), also known as resistive switching (RS) device or memristor, is a promising nonvolatile memory considered to be a potential candidate for next generation data storage. In 2008, a research group in HP company accidentally found a nonlinear current
voltage (I
V) relation in studying TiO2-based devices, as shown in Fig. 2.1 [1]. When applying an external electric field on the device, the resistance of the device changes. They linked the resistive switching phenomenon with the concept of memristor. That is why memristor is also called as RRAM, especially when memristor is used for data storage. The concept of memristor was firstly proposed by Leon O. Chua in 1971 [2]. From aspects of logic and theorem, he believed that there should be an electronic element to represent the relations between magnetic flux ϕ and electronic charge q. In electromagnetism, the physical parameters can be summarized as follows: (1) (2) (3) (4) (5)

Voltage v, defines the variation of magnetic flux ϕ with time t; Current I, defines the variation of electronic charge q with time t; Resistance R, defines the linear relation between voltage and current, R 5 dv/di; Capacitance C, defines the linear relation between electronic charge and voltage, C 5 dq/dv; Inductance L, defines the linear relation between magnetic flux and current, L 5 dϕ/di.

We can see from the above relations that except for magnetic flux ϕ and electronic charge q, all the other physical parameters have physical definitions on their relations. As a result, Leon O. Chua proposed that there should be a fourth electronic element, which builds the link between magnetic flux ϕ and electronic charge q, as shown in Fig. 2.2. He named the fourth element as “memristor.” Assumed that the symbol of memristor is M, then the relation between magnetic flux ϕ and electronic charge q is: dϕ 5 Mdq;

(2.1)

when M is a function of q, MðqÞ 5 dϕ=dq; Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing. DOI: https://doi.org/10.1016/B978-0-12-819717-2.00002-3 © 2020 Elsevier Ltd. All rights reserved.

(2.2)

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Figure 2.1 The resistive switching in TiO2-based memristors. Source: Adapted from J.J. Yang, M.D. Pickett, X. Li, D.A. Ohlberg, D.R. Stewart, R.S. Williams, Memristive switching mechanism for metal/oxide/metal nanodevices, Nat. Nanotechnol. 3 (7) (2008) 429
433.

Figure 2.2 Memristor, the fourth electronic element, builds up the association between the magnetic flux ϕ and electronic charge q.

Characteristics and mechanisms in resistive random-access memory

15

when the parameters varies with time t: MðqðtÞÞ 5 ðdϕ=dtÞðdq=dtÞ 5 vðtÞ=iðtÞ;

(2.3)

As a result, memristor can be considered to be a device whose resistance R varies with electronic charge q. If q does not change, then a linear relation exists between voltage and current. Otherwise, a nonlinear relation (hysteresis) is present between voltage and current. Besides, if no current passes through the memristor, i(t) 5 0, v(t) 5 0. As a result, M(t) is constant, suggesting that memristor is able to store information if no current passes. However, due to the lack of a proper device to prove the concept of memristor in 1970s, it is almost forgotten. However, data storage is only one of the capabilities of RRAM. Due to its unique physical mechanisms, the capability of RRAM in computation under the concept of “computing with physics” is extensively explored in the recent years. Generally, the operation of RRAM can be described as “resistive switching,” since its resistance (or conductance) can be modified or switched at externally applied electric field. However, different from the traditional charge-based memories, for example, flash, DRAM, and SRAM, ionic migration usually participates in the RS of RRAM. This is to say, not only charge transfer, but also mass transfer is involved in RRAM. On one side, this unique feature makes the switching mechanisms of RRAM quite complicated, since both electronic and ionic effects may appear at different switching steps. On the other side, this feature enables the excellent characteristics of RRAMs, such as nonvolatile, high write speed (,50 ns), low-power consumption (,1 pJ), CMOS compatibility, scalability (,10 nm), high-density integration (4F2, F is the minimal feature size), and 3D integration (4F2/n, n is the stacking layer number). Thus, it is expected that RRAM has potential to replace DRAM and Flash in the near future. From architecture level, the replacement of DRAM and Flash with RRAM could greatly simplify the memory hierarchy, mitigating the “von Neumann bottleneck” by reducing the data transfer among memory hierarchies. Furthermore, the similarity between the ionic migration processes in RRAMs and in biological nervous systems inspires the research of RRAMs for neuromorphic computing. Various synaptic functions, for example, Hebbian learning, spike-timing-dependent plasticity (STDP), spikingrate-dependent plasticity (SRDP), long-term potentiation/depression (LTP/LTD) and paired pulse facilitation/depression (PPF/PPD), and neuronal function, for example, integrate and fire, are systematically studied by the researchers from both academic and industrial communities. In combination with its inherent capability of memory/computation convergence, RRAM provides a prospective energyefficient solution to current neuromorphic computing technologies. For example, it can greatly accelerate the training and inference of artificial neural network (ANN) and reduce the areal and power consumption of spiking neural network (SNN). Conclusively, as an emerging technology, RRAM could bring disruptive influences on modern memory and computation technologies. It could also provide an alternative way to address the “memory wall” issues, making computation systems more energy-efficient.

16

2.2

Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Resistive random-access memory materials

RRAM is usually a two-terminal capacitor-like device composed of a switching layer sandwiched between a top electrode and a bottom electrode, as shown in Fig. 2.3. Both of the electrodes act as mediums for electronic charge carriers. Thus, they are highly conductive. The materials for electrodes are usually pure metal, metal alloys, highly doped perovskites, highly doped amorphous, nitrides, and so on. The electrode can participate or assistant the RS, depending on the electrochemical reactions during the RS. The switching layer can be composed of one material or stacked by several sublayers from different materials. Various materials have been investigated for the switching layer, for example, metal oxides, chalcogenides, perovskites, polymer, and so on. Metal oxides are currently the most popular materials for RRAMs because of their compatibility with CMOS process. CuOx and WOx are firstly studied as they can be easily prepared via a simple additional oxidation step of the Cu or W via or plug. However, due to the multivalence nature of Cu and W, RRAMs with these two materials as switching layers show usually poor reliability and large variations. Materials like TiO2 have the same issues as CuOx or WOx. Currently, the most promising metal oxides are TaOx and HfOx. RRAMs based on them are not only CMOS-compatible, but also have much better performances such as sub-nanosecond switching speed and greater than 1010 endurance. In comparison with HfOx-based RRAM, TaOx-based RRAM usually has better retention but inferior endurance. Chalcogenides and perovskites are now not popular mainly because of their CMOS-incompatibility and nonsuperior characteristics. Nonetheless, perovskites like SrTiO3 are ideal model materials for mechanism study since the defect chemistry of this perovskite has been thoroughly investigated. The electrode materials are mainly pure metals, metal alloys, carbon materials, nitrides, conductive oxides, and so on. Electrode materials like TiN or TaN are preferred since they are CMOS-compatible. Depending on the RS mechanism, the electrode material may play different roles. It may act as path for electronic charge carrier or ionic source that directly participates in the switching process.

Figure 2.3 RRAM structure and materials.

Characteristics and mechanisms in resistive random-access memory

2.3

17

Resistive random-access memory mechanisms

The mechanisms of RRAM have been widely studied since the link between the phenomenon of RS and the concept of memristor was built in 2008. After that, a great amount of work was carried out to study what exactly happened in the resistive switching process. By now, although the hot topic becomes the applications of RRAM in neuromorphic computing or processing-in-memory (PIM), the study of RS mechanisms is still a topic in this research area. Understanding the switching mechanisms is of great help for researchers to guide their device design for designated applications. After about 10 years of study, the main framework of RS mechanisms is now roughly built. The difficulty in investigating the mechanism is mainly due to the fact that the microscopic dynamic processes in the RS, which includes coupled electronic and ionic dynamics, which is very hard to be observed by current material characterization methods. Besides, various factors, for example, the electrode materials, switching materials, device micro-/macrostructures, temperature, operation mode, and so on, can influence the RS and then the device properties. It is currently almost impossible to clarify the interconnections among all these factors and build an exact or analytic mathematical model to quantitatively describe the RS device. Thus, in the future, the employment of some artificial intelligence (AI) tools in mechanism study may be welcomed. Based on current research findings, the RS mechanisms in RRAM are mainly classified into electrochemical metallization (ECM), valence-change mechanism (VCM), thermochemical mechanism (TCM), and electrostatic/electronic effects. And ECM and VCM are the most reported mechanisms. Before going into the details of the mechanisms, some basic concepts and abbreviations in RS are presented here, as shown in Fig. 2.4. For RRAM, the RS occurs between its high-resistance state (HRS) and low-resistance states (LRS). The switching process from the HRS to the LRS is termed as SET, while switching from the LRS to the HRS is termed as RESET. The polarity of the applied electrical signals plays important role in the RS. If the SET and RESET are at different polarities, then the RS is called bipolar RS (Fig. 2.4A). While if the SET and RESET are

Figure 2.4 Two types of RS: (A) bipolar RS and (B) unipolar RS.

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

at the same voltage polarity, the RS is called unipolar RS (Fig. 2.4B). In some circumstances, unipolar and bipolar RS appear in a single device, and this phenomenon is called nonpolar RS. The unipolar RS is typically a sign of domination of thermal effects, that is, Joule heating. While bipolar RS is usually due to the electrical effects. For most of the RRAM devices, a process named electroforming is needed to induce the reproducible SET/RESET cycles. The electroforming requires a much larger voltage stress than SET/RESET, and changes the initial chemical compositions or even the morphology of the device. Thus, the electroforming process may result in nonuniformity among devices and increase the overhead of peripheral circuit. In this sense, devices without electroforming process or so called forming-free device is always preferred. The electroforming typically corresponds to the formation of conductive filament (CF) in the RRAM. Single and multiple filaments after the electroforming are reported in literature. Since the formation of CFs is equivalent to the electrical breakdown of the device, a compliance current (ICC) is usually employed to avoid the hard breakdown in electroforming and the SET process.

2.3.1 Electrochemical metallization The first RS mechanism we will discuss is the electrochemical metallization (ECM) mechanism. From its name, it is easily to anticipate that this mechanism is closely related to electrochemistry theory. For an ECM device, an obvious characteristic is that its electrode directly participates in the RS. The device consists of an active electrode, which is made of electrochemically active metals, for example, Ag, Cu, Ni, and so on. While the other electrode is a passive electrode, which is made of inert metals, for example Pt, Au, Pd, and so on. The RS layer can be any insulators or semiconductors that are conductors for the active electrode ions. The electroforming process in ECM device corresponds to the formation of metallic filaments in the RS layer. According to the classical electrochemistry, at positive voltage on the active electrode, the active metal (M) is firstly oxidized; then in the driving force of chemical and electrical potentials, the metal ion (Mz1) drifts and diffuses toward the counter/passive electrode; when the metal ion reaches the passive electrode, it is reduced; finally the filament is progressively formed with the nucleation and growth process. The compliance current is used to avoid the overgrowth of the filament. Since the RS layer is absent of the active metal ions initially, the voltage in the electroforming should be huge. However, in the subsequent SET/RESET, the voltage is smaller than that in electroforming because the filament is not totally eliminated in the RS. The voltage needed for electroforming can be decreased by doping the RS layer with the same metal ion in advance. The transition of device resistances and corresponding microscopic dynamics of the electrochemical redox processes. In the SET process, a positive voltage bias is applied on the Ag active electrode. The Ag metal is oxidized and releases Ag1; afterward, the Ag1 migrates to the Pt inert electrode and is reduced to Ag metal there; after nucleation and growth, the Ag filament grows progressively to the Ag electrode. Once the Ag filament reaches the active electrode, the device is shorted

Characteristics and mechanisms in resistive random-access memory

19

and at ON state. At negative voltage bias (the RESET), the Ag filament ruptures and is typically partially dissolved, then the device is at OFF state. It should be noted that in most circumstances, the filament is not totally dissolved. Thus, the resistance of the device at OFF state is different from the initial state before electroforming.

2.3.1.1 Switching kinetics From the above discussions, it is clear that the core issue in understanding the ECM-type RS is the filament. From kinetic considerations, the formation of the filament in ECM devices is determined by the following three steps: 1. oxidation and dissolution of the active electrode metal M: M ! Mz1 1 ze2 ; 2. migration of the active metal ion Mz1 in the RS layer under chemical and electrical potential; 3. reduction and crystallization of Mz1 at the inert electrode:

Mz1 1 ze2 ! M: As a result, the formation speed or the SET switching speed of ECM device is determined by these 3 steps. Quantitative descriptions of the 3 steps are as follows:

Electrochemical reactions Electrochemical reactions are the rate-limiting factors in step 1 and 3, and their kinetics can be described according to the chemical reaction rate theory: ( i 5 i0



) αzeη CMz1 βzeη exp 2 δ exp 2 ; kB T kB T CMz1

(2.4)

where, i0 is the exchange current density, η 5 ϕeq 2 ϕ is the overpotential of the reaction, ϕeq is the equilibrium Nernst potential and ϕ is the electrical potential at the electrodes, α and β are transfer coefficients and α 1 β 5 1 for one-electron transfer reaction, and CM z1 is the concentration of metal ion Mz1 at the electrode/ electrolyte interface. The two terms in the bracket represents the oxidization (left term) and reduction (right term) reaction, respectively. In some circumstances, Eq. (2.4) is simplified by neglecting the mass transfer terms and the charge transfer process becomes rate-limiting. As a result, Eq. (2.4) is reduced to the Butler
Volmer equation:  i 5 i0





 αzeη βzeη exp 2 exp 2 : kB T kB T

(2.5)

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

If the potential is high, that is, ηckB T=e, Eq. (2.4) can be further reduced to the Tafel equation: lni 5

αze η 1 lni0 ; kB T

(2.6)

which is frequently used for the experimental determination of the transfer coefficient, α, and the exchange current density, i0 , by fitting the current
voltage (IV) curve. Since an exponential relation exists between the current density and overpotential in this kinetic region, as described in Eqs. (2.4) and (2.5), the switching speed can be greatly accelerated with increasing the voltage bias.

Drift and diffusion By assuming that the RS layer is a continuum medium, the electromigration of cations in the RS layer is described by the Nernst
Planck equation in the driftdiffusion theory: δ JM z1 5 2 DMz1 rCM z1 2 zeDM z1 CM z1 rϕ=kB T;

(2.7)

δ where, DM z1 is the diffusion coefficient; CM z1 is the bulk concentration; ϕ is the electrical potential; z is the charge number; e, kB , and T are the elementary charge, Boltzmann constant, and temperature, respectively. The first and second term on the right of Eq. (2.7) stand for the contribution of chemical and electrical potential, respectively. Moreover, in the drift-diffuse law of mass conservation: δ @CM z1 5 2 rU JM z1 : @t

(2.8)

As discussed previously, the active metal ion Mz1 migrates the whole thickness of the RS layer only in the electroforming. In the subsequent SET/RESET, the cation only migrates part of the thickness since the filament is usually not totally dissolved. This fact results in at least two phenomena, one is that the electroforming voltage is larger than the SET one in subsequent RS; the other is that the voltage for electroforming is positively proportional to the thickness of the RS layer, while the SET voltage is almost constant. From kinetic consideration, the consequence of electroforming is the introduction of active metal cations into the cation-free RS layer, and the setup of possible fast transport paths (which may result in morphologic changes) for the subsequent RS. Therefore, the voltage for electroforming can be decreased or the electroforming may be eliminated by preliminarily introducing fast transport paths and/or doping active metal cations in the RS layer.

Crystallization The crystallization in the SET process or filament formation includes the nucleation and growth of the metal phase. Nucleation is a critical process in electrodeposition and occurs at the boundary between the electrode and the electrolyte phase. The

Characteristics and mechanisms in resistive random-access memory

21

competition between nucleation and growth determines the granularity of deposit [3]. The nucleation rate R is expressed as follows:   ΔGcrit R 5 AR exp 2 ; kB T

(2.9)

where, AR is a constant of proportionality. In a continuity approach, the energy barrier ΔGcrit is: ΔGcrit 5

ðd21Þd21 γ d θddD ; dd ðzejηjÞd21

(2.10)

where, d is the dimensionality of the nucleation cluster, γ is the specific boundary 2=3 energy, θdD is a constant of proportionality and equals to Bvm , and bΩ1=2 m in 3 or 2D case, respectively.B and b are constants of proportionality, vm and Ωm are the volume and surface occupied by one atom in the crystal. Rearranging Eqs. (2.9) and (2.10) gives: lnR 5 lnAR 2

ðd21Þd21 γ d θddD : dd kB TðzejηjÞd21

(2.11)

The growth of two-dimensional (2D) cluster is determined by the Faraday’s law and the Butler
Volmer equation, the combination of the two equations gives: 
   0 dl i0;e b VM αzeη βzeη 5 exp 2 exp 2 ; dt kB T kB T 2bzF

(2.12)

where, l(t) is the edgeplength; b is a geometry constant with b 5 1 for a quadratic ffiffiffi nucleus and b 5 ð3=2Þ 3 for a hexagonal nucleus, b0 is 4 for a quadratic 2D crystal, 6 for a hexagon, and 2π for a disk; VM is the molar volume of the deposit; and i0;e is the exchange current density. Unfortunately, studies on the crystallization process in the RS are rarely reported, owing to its very complex kinetic nature and the difficulty in obtaining precise thermodynamic parameters.

2.3.1.2 Single or multiple filaments After the formation of the filament in the device, a new question arises, that is, is there a single filament or multiple filaments formed in the RS layer?

Single filament In the early study of the RS mechanism, the formation of a single filament in the SET process is usually assumed. Guo et al. firstly studied the switching-off mechanism in Ag1 migration-based RS model systems. The device is Ag/H2O/Pt with

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Figure 2.5 Hysteretic IV characteristics of the Ag/H2O/Pt model device with a Pt/Ag gap of 0.65 μm. The voltage sweeping step was set to be 0.02 V/0.5 s. The inset is schematic of the planar device. Source: Adapted from X. Guo, C. Schindler, S. Menzel, R. Waser, Understanding the switching-off mechanism in Ag 1 migration based resistively switching model systems, Appl. Phys. Lett. 91 (2007) 133513 [4].

planar structure, as shown in the inset of Fig. 2.5. The device can be seen as a classical electrochemical cell and the Ag electrode acts as the reference in the test. By using planar structure, the dynamics of the Ag filament growth can be easily observed. The IV characteristics of the device are shown in Fig. 2.5. By applying negative voltage bias at a sweep rate of 0.02 V/0.5 s from 0 to
5 V, the device is switched from HRS to LRS. Applying positive voltage bias from 0 to 0.5 V switches the device back to the HRS. The dynamics of the filament growth in the RS is investigated. The gap between the Pt and Ag is 3 μm in this experiment. A constant voltage of
1 V is applied on the Pt electrode. The response current of the device is shown in Fig. 2.6A. In the time window from 0 to 2.5 s, the current does not change at all. However, after 2.5 s, a significant increase of the response current is observed. To capture the morphology of the filament at different moment, the
1 V voltage is applied on devices with the same structure for 1, 2, and 4 s, respectively. And the devices are investigated by scanning electron microscope (SEM) afterward. As shown in Fig. 2.6B
D, the filament grows from Pt to Ag. At 4 s, the device is at LRS (Fig. 2.6A) and a large single filament is clearly observed in Fig. 2.6D. The filament growth rate is estimated to be about 1 μm/s. In situ observations of the filament growth in an Ag/H2O/Pt device with a Pt/Ag gap of 100 μm by an optical microscope presents similar situation.

Characteristics and mechanisms in resistive random-access memory

23

Figure 2.6 The SET process of the Ag/H2O/Pt device by applying a constant 21 V voltage on the Pt electrode. The gap between Ag and Pt electrode is 3 μm. (A) Current
time (I
t) plotting, (B
D) SEM images showing the Ag filament growth after applying 21 V voltage for 1, 2, and 4 s. Source: Adapted from X. Guo, C. Schindler, S. Menzel, R. Waser, Understanding the switching-off mechanism in Ag 1 migration based resistively switching model systems, Appl. Phys. Lett. 91 (2007) 133513 [4].

The RESET process of the Ag/H2O/Pt device is analyzed via simulation tools. The RESET starts when applying a positive voltage on the Pt electrode. Then the fractal Ag filament (Fig. 2.7A) begins to be dissolved (or oxidized) according to the following electrochemical reaction: Ag ! Ag1 1 e2. This reaction occurs on all filament surfaces with a positive potential. Simulation using COMSOL shows that the majority of the voltage drop is at the neck where the twig of the filament touches the Ag electrode, resulting in the fast dissolution near the neck position (Fig. 2.7B). Since the dissolution of Ag is fastest at the tip, while the deposition of Ag1 is on the whole Ag electrode, the gap between the tip and the Ag electrode is increased, as shown in Fig. 2.7C in the early OFF state. And the device is reset to the OFF state. Moreover, due to the concentrated potential drop at the filament tip; Joule heating effect may be possible in this situation. Aono et al. studied the RS of Cu ion-based ECM devices, Cu/Cu2-α/Pt and Cu/ Ta2O5/Pt [5]. They firstly investigated the influence of Cu diffusion coefficient on the SET voltage (VON). The proposed switching mechanism and the current
voltage (IV) characteristics of the Cu/Cu2-α/Pt device are shown in Fig. 2.8. In Fig. 2.8A, they proposed that the RS of the Cu/Cu2-α/Pt is attributed to the

24

Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Figure 2.7 Simulation results of the Ag filament and electrode in RESET. (A) Schematic of the fractal Ag filament. (B) Tip of the Ag filament in higher magnification, representing the situation in the late ON state. The continuous lines represent equal potential lines after applying a RESET voltage of 200 mV. The voltage difference between two adjacent lines is 10 mV. The black cones represent the electrical field and point to the direction of the Ag1 ion migration. (C) The situation slightly later, representing the early OFF state. The Ag filament retreats due to the dissolution of Ag. As soon as the electrical contact is disconnected, the field distribution changes, which accelerates the further dissolution of the filament tip. Source: Adapted from X. Guo, C. Schindler, S. Menzel, R. Waser, Understanding the switching-off mechanism in Ag 1 migration based resistively switching model systems, Appl. Phys. Lett. 91 (2007) 133513 [4].

Figure 2.8 (A) Schematic of the switching mechanism of the Cu/Cu2-α/Pt device, single filament formation is assumed in the Cu2-α switching layer. (B) Typical IV curves of the device in voltage sweeping. The device shows bipolar RS with a very small SET voltage (VON) of approximately 0.14 V. The upper and lower plotting are linear and logarithmic, respectively. Source: Adapted from N. Banno, T. Sakamoto, N. Iguchi, H. Sunamura, K. Terabe, T. Hasegawa, et al., Diffusivity of Cu ions in solid electrolyte and its effect on the performance of nanometer-scale switch, IEEE Trans. Electron. Devices 55 (11) (2008) 3283
3287.

Characteristics and mechanisms in resistive random-access memory

25

formation and rupture of a single Cu filament. This assumption is in accordance with the previous kinetic discussion of ECM device. At positive voltage bias on the Cu electrode, the metal Cu is oxidized to Cu1 at the interface between the Cu electrode and the Cu2-α electrolyte. Afterward, the Cu1 migrates toward the Pt inert electrode and finally reduced to Cu metal, forming Cu filament. The rate-limiting step is the migration of Cu1 in the electrolyte. Since the diffusion coefficient of Cu1 in Cu2-α is very large, which is about 4 3 1026 cm2/s at room temperature, the migration of Cu1 is very fast in Cu2-α, leading to a very small VON of approximately 0.14 V. On one side, this small VON favors ultralow energy consumption; on the other side, the retention time of the device will be short due to this very small VON. This is the so-called “voltage
time dilemma.” The origin of this dilemma is that the energy barrier that the two-terminal device overcomes in RS is the same for SET and retention test. A small VON means that the energy barrier between HRS and LRS is small; in this sense, it is also easy for the device to degrade from LRS to HRS in the retention test. To study the influence of Cu1 diffusion coefficient on the RS, a Ta2O5 electrolyte is used to replace the Cu2-α. The Cu1 diffusion coefficient in Ta2O5 is approximately 4.9 3 10220 cm2/s at room temperature, which is much smaller than that in Cu2-α. The device structure and the IV characteristics of the Cu/Ta2O5/Pt device is shown in Fig. 2.9. A significant increase of VON to approximately 2.6 V is observed in the device. Cross-sectional TEM is used to study the RS mechanism in Cu/ Ta2O5/Pt. As shown in Fig. 2.10, a single filament is clearly observed in the switching region, and the existence of Cu metal in the filament (region B) is demonstrated in the energy dispersive X-ray fluorescence spectrometer (EDX) spectra.

Figure 2.9 (A) Schematic of the Cu/Ta2O5/Pt device, the thickness of the Ta2O5 layer is about 15 nm. (B) IV characteristics of the Cu/Ta2O5/Pt device, the VON is increased to approximately 2.6 V, the upper and lower image are linear and logarithmic plotting, respectively. Source: Adapted from N. Banno, T. Sakamoto, N. Iguchi, H. Sunamura, K. Terabe, T. Hasegawa, et al., Diffusivity of Cu ions in solid electrolyte and its effect on the performance of nanometer-scale switch, IEEE Trans. Electron. Devices 55 (11) (2008) 3283
3287.

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Figure 2.10 Cross-sectional TEM image of the Cu/Ta2O5/Pt device (A) before and (B) after SET operation. (C) EDX spectra of regions A and B in (B). Source: Adapted from N. Banno, T. Sakamoto, N. Iguchi, H. Sunamura, K. Terabe, T. Hasegawa, et al., Diffusivity of Cu ions in solid electrolyte and its effect on the performance of nanometer-scale switch, IEEE Trans. Electron. Devices 55 (11) (2008) 3283
3287.

Multiple filaments Other than the early understanding of a single large filament in the RS, multiple filaments are able to be formed. Pan et al. studied the RS characteristics of Ag/ ZnO:Mn/Pt RRAM. The device shows ultrafast programming speed of 5 ns, an ultra-high ROFF/RON ratio of 107, long-retention time of more than 107 s, good endurance, and high reliability at elevated temperatures. Schematic of the Ag/ZnO: Mn/Pt device structure is shown in Fig. 2.11A. The fabrication of the device is completely fulfilled by an industrialized magnetron sputtering method at room temperature. The bottom electrode Pt is deposited directly on the silicon wafer with Ti adhesive layer. As can be seen from the cross-sectional TEM image (inset of Fig. 2.11A), the thicknesses of Ag top electrode, Pt bottom electrode, and the ZnO: Mn switching layer are about 90, 120, and 30 nm, respectively, while the lateral size of a bit cell is approximately 300 μm. The IV characteristics of the Ag/ZnO:Mn/Pt device in linear and semilogarithmic scale are shown in Fig. 2.11B and C, respectively. Neither an electroforming process nor a current compliance is necessary for activating the RS. The pristine device exhibits a high resistance of greater than 109 Ω, and the voltage is swept in a sequence of 0 V!3 V ! 0 V !
3 V ! 0 V. At positive voltage polarity, the Ag top electrode is biased and the resistance state of the device is from HRS to LRS. While for negative voltage polarity, the device resets from LRS to HRS. The ON/OFF ratio of the device is estimated to be more than 107. It should be noted that in the RESET, a two-step process is observed. The device is firstly reset to an intermediate resistance state at about
1.9 V. After a short stay at that state, the device is further reset to the ON state at about
2.2 V. This two-step RESET may be a sign of the rupture of multiple filaments. If this were true, then multiple-step SET corresponding to the formation of multiple filaments should arise in the SET

Characteristics and mechanisms in resistive random-access memory

27

Figure 2.11 RS characteristics of the Ag/ZnO:Mn/Pt device. (A) Schematic of the device structure, the inset is low-magnification cross-sectional TEM image of the device. (B) Typical IV curves of the device in linear scale. The device shows abrupt resistance change at SET and RESET. (C) The IV plotting of the device in semilogarithmic scale. (D) The log
log scale plotting in the SET process and the slope in different regions. (E) The distributions of the SET and RESET voltage. (F) Temperature dependence of the ON and OFF states. Source: Adapted from Y.C. Yang, F. Pan, Q. Liu, M. Liu, F. Zeng, Fully room-temperaturefabricated nonvolatile resistive memory for ultrafast and high-density memory application, Nano Lett. 9 (4) (2009) 1636
1643 [6].

process. However, from Fig. 2.11B and C, such multistep SET is not clearly observed, the reason may be that the voltage sweeping speed is so fast that the details in the SET process are missed. The conduction mechanism in SET is analyzed by fitting the IV curves in log
log scale, as shown in Fig. 2.11D. The slope

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

of the curve at HRS changes from approximately 1.06 to 2.03 and finally 10. This slope change obeys best the space-charge-limited conduction (SCLC). The details about the SCLC will be discussed later in the section of electrostatic/electronic effects. The slope at LRS is typical ohmic conduction (slope 5 1), suggesting probably filament formation in the RS. The uniformity of the switching voltage is analyzed statistically via cumulative probability in Fig. 2.11E. In the repetitive switching of the Ag/ZnO:Mn/Pt device, the RESET voltage (VRESET) distributes in a range of
2.6 to
0.5 V, while the SET voltage (VSET) shows a wider distribution of 0.3
3.8 V. The average values of VSET and VRESET as analyzed from the statistical data are 1.6 and
1.3 V, respectively. In some reports, it is usually assumed that the formation of filament (SET process) should be more random than the rupture of the filament since the formation is the competition among different filamentary paths. Thus, the variations in VSET is larger than in VRESET. The temperature dependence of the ON and OFF state is shown in Fig. 2.11F. The resistance value of the ON state shows positive proportion to the temperature, suggesting metallic behavior. While for the OFF state, it shows semiconducting behavior. The metallic behavior is another sign of the filament formation. In order to understand deeply the switching mechanism of the Ag/ZnO:Mn/Pt device TEM is used to identify the morphological or structural change of the device after the SET process. Fig. 2.12 shows the cross-sectional TEM images of the Ag/ ZnO:Mn/Pt device that has been switched to ON state. From the low-magnification images of Fig. 2.12A and B, it is clear that multiple suspicious bridge-like regions exist in the switching layer. From the enlarged image of the regions in Fig. 2.12A and B, the shape of the bridge-like region or filament in the squares is shown in Fig. 2.12C and D, respectively. The typical size of the filament is approximately 30
50 nm. It should be noted that all these bridge-like regions shown in Fig. 2.12 exist in an identical device, which effectively underpins a multifilament switching mechanism. The element analysis of the filament in the ON device is performed using high-resolution EDX in STEM mode, as shown in Fig. 2.13. The top panels in Fig. 2.13A
D are the Z-contrast images, while the bottom panels are the corresponding EDX results of the red circle region. In Fig. 2.13A, the region in the switching layer away from the filament is analyzed. Pure ZnO:Mn phase can be confirmed from the EDX and no Ag signal is detected. Fig. 2.13B, indicates the EDX of the filament region, where strong Ag signal is detected, suggesting that the filament is composed of Ag element. The interface region between the switching layer and the Pt bottom electrode is analyzed in Fig. 2.13C. The Ag signal is also detected in this interface, suggesting that the filament is totally through the switching layer. A line profile of the Ag intensity along the filament is illustrated in Fig. 2.13D. The formation of the Ag filament is clearly demonstrated. Liu et al. further analyzed the formation of multiple filaments in Cu/ZrO2:Cu/Pt device and built a physical model to explain the formation process [7]. In the characterization of the Cu/ZrO2:Cu/Pt device, a very small incremental rate of 1 mV/ step for the voltage sweeping is used to disclose the details in the RS phenomenon. During this electrical measurement, the bias polarity is defined with reference to the bottom Pt electrode. As shown in Fig. 2.14, the device is switched from HRS to

Characteristics and mechanisms in resistive random-access memory

29

Figure 2.12 Cross-sectional TEM image of the Ag/ZnO:Mn/Pt device that has been switched to ON state. (A and B) Low-magnification image showing suspicious bridge-like regions with different shapes that might be identified as conductive filaments. The multiple bridge-like regions (or filaments) could be clearly observed in (A). (C and D) Highmagnification image of the square region in (A) and (B), respectively. Source: Adapted from Y.C. Yang, F. Pan, Q. Liu, M. Liu, F. Zeng, Fully room-temperaturefabricated nonvolatile resistive memory for ultrafast and high-density memory application, Nano Lett. 9 (4) (2009) 1636
1643 [6].

LRS at positive voltage polarity, while from LRS to HRS at negative voltage polarity. The SET and RESET voltage are approximately 0.32 V and approximately
3 V, respectively. A small voltage sweeping step of 1 mV/step is employed in the IV characteristics to carefully disclose the details in the switching process. It can be clearly seen from Fig. 2.14 that a multistep switching phenomenon is observed both in the SET and RESET. In the SET process, the multistep switching occurs after an abrupt current jump at the switching voltage of approximately 0.32 V. While in the RESET process, the multistep switching is before the current jump at the switching voltage of approximately
3 V. To get a clear view of the multistep switching region, a very small voltage sweeping step of 10 μV/step is used in the SET process again and the multistep switching region from 0.16 to 0.18 V is shown in Fig. 2.15. From the IV plotting in Fig. 2.15A, the multistep switching is more clearly shown.

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Figure 2.13 Z-contrast image and EDX analysis in STEM mode for the filament region in ON-state device. The top panels of (A), (B), (C), and (D) show cross-sectional Z-contrast image of the device. The circle indicates the region for EDX analysis. (A) EDX of the switching layer away from the filament, suggesting a pure ZnO:Mn phase. (B) EDX of the filament, in which a strong Ag signal is detected. (C) EDX at the Pt interface, where the detection of Ag signal suggests the formation of a complete filament across the whole switching layer. (D) A line profile of the Ag intensity along the filament. Source: Adapted from Y.C. Yang, F. Pan, Q. Liu, M. Liu, F. Zeng, Fully room-temperaturefabricated nonvolatile resistive memory for ultrafast and high-density memory application, Nano Lett. 9 (4) (2009) 1636
1643 [6].

Figure 2.14 IV characteristics of the Cu/ZrO2:Cu/Pt device. The SET process is at positive voltage polaritywhile the RESET one is at negative. The numbers are the order of the switching process. By using a small voltage sweep rate of 1 mV/step, multistep switching in the SET and RESET is observed. Source: Adapted from Q. Liu, C. Dou, Y. Wang, S. Long, W. Wang, M. Liu, et al., Formation of multiple conductive filaments in the Cu/ZrO2:Cu/Pt device, Appl. Phys. Lett. 95 (2009) 023501.

The red lines depict the steps in the SET process. Four steps are counted in the voltage region from 0.16 to 0.18 V, while more steps are expected from the inset showing a larger region from 0.16 to 0.35 V. From the R
V curves of the region in Fig. 2.15B, several plateau regions, in which the resistance values are almost

Characteristics and mechanisms in resistive random-access memory

31

Figure 2.15 (A) The refined IV characteristics of the multistep switching region in the SET process (0.16
0.18 V) at a very small voltage sweeping rate of 10 μV/step. The stepwise current is clearly seen, as depicted by the polylines. The inset is an enlarged voltage region from 0.16 to 0.35 V. (B) The resistance
voltage (R
V) replotting of the curves in (A), several plateau regions suggest that the resistance is almost unchanged in these regions. The inset is an enlarged view of the region marked by the dashed square. Source: Adapted from Q. Liu, C. Dou, Y. Wang, S. Long, W. Wang, M. Liu, et al., Formation of multiple conductive filaments in the Cu/ZrO2:Cu/Pt device, Appl. Phys. Lett. 95 (2009) 023501.

constant, are indicated. The inset is an enlarged view of the region marked in blue dashed square. To understand the origin of the multistep switching in Cu/ZrO2:Cu/Pt device. A physical model is established to study the dynamics in the RS. Since the electrical field is the primary driving force in the SET process, description of the electrical field distribution is critical. Using MATLAB PDE tools, the electric field distribution of the filament under different growth stages is simulated. As shown in Fig. 2.16, three filament growth stages are assumed for simplicity: preconnection, connection, and postconnection. The Cu precipitate locations are three with cone shape and different heights. In Fig. 2.16A, the strongest electrical field appears at the tip of the highest filament. This result is in consistence with the one reported by Guo et al. [4]. As a result, the growth rate of the highest filament should be the largest due to the fast migration of Cu ions to its tip in the electrical field. Once the highest filament reaches the top electrode, the device is shortened, corresponding to the current jump in the SET process in Fig. 2.14. However, as shown in Fig. 2.16B, the highest filament will not stop growing after reached to the top electrode. This is because that its shape is still a cone and the electrical field at the top of the filament is large. In this period, the other two filaments also grow but with a reduced growth rate in comparison with the middle one, owing to the relatively small electrical field at their tips. After the highest filament grows to a cylinder shape, the electrical field distribution becomes uniform it stops grow. However, the electrical field at the tips of the other two filaments becomes larger, as shown in Fig. 2.16C. Thus, the Cu ions tend to move to other disconnected precipitates. Repeating this process for other locations, multiple cylinder-like filaments will be formed in the Cu-doped

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Figure 2.16 The simulation of electric field distribution of the filament under different growth stages uses the MATLAB PDE-tool, (A) preconnection, (B) connect establishment, and (C) postconnection. Source: Adapted from Q. Liu, C. Dou, Y. Wang, S. Long, W. Wang, M. Liu, et al., Formation of multiple conductive filaments in the Cu/ZrO2:Cu/Pt device, Appl. Phys. Lett. 95 (2009) 023501.

ZrO2 film. The successive formation of the filaments leads to the multistep switching observed in Figs. 2.14 and 2.15.

2.3.1.3 Filament overgrowth Although a compliance current is usually setup in the electroforming and SET process to avoid the overgrowth of the filament that probably leads to hard breakdown of the device, this macroscopic method may not work very well eventually. Thus, overgrowth of the filament is common in RRAM devices. The TEM image of Fig. 2.12C can be seen as an evidence that the filament penetrates into the electrode. A significant appearance of the overgrowth is the “negative-SET” phenomenon. It usually results in instability in the RS of ECM device, degrades the endurance performance, and even failure of the device. The filament overgrowth and its elimination is systematically investigated by Liu et al. [8]. The model device is Ag1-based ECM device Ag/ZrO2/Pt. The initial resistance of the pristine device is about 1010 Ω at 0.1 V read voltage. As shown in Fig. 2.17A, when a positive-electroforming voltage sweep (0
2 V) is applied on the Ag electrode, the device is switched from the initial state to LRS (about 300 Ω). Afterward, the device can be repetitively switched from LRS to HRS by a

Characteristics and mechanisms in resistive random-access memory

33

Figure 2.17 RS characteristics of Ag/ZrO2/Pt device. (A) IV curves of the device showing “negative-SET” phenomenon. (B) Statistical charts of positive-forming, positive-SET, negative-RESET, and negative-SET voltages. These results are statistical data for 20 cells (400 DC switching cycles totally). Unfilled square indicates the mean value of the distribution. (C) Schematic of the pulse test system. (D) Switching dynamics of the device in pulse mode at RESET (read pulse: 0.2 V, 10 μs, RESET pulse: 23 V, 10 μs). Source: Adapted from S. Liu, N. Lu, X. Zhao, H. Xu, W. Banerjee, H. Lv, et al., Eliminating negative-SET behavior by suppressing nanofilament overgrowth in cation-based memory, Adv. Mater. 28 (48) (2016) 10623.

negatively applied voltage sweep (0!
3 V) at a compliance current of 10 mA and from HRS to LRS by a positively applied voltage sweep (0!2 V) at a compliance current of 1 mA. It can be seen clearly that the “negative-SET” occurs occasionally during the RESET process (red line in Fig. 2.17A). Once the “negative-SET” occurs, the device is switched to a lower LRS and is hard to be reswitched back to the HRS, leading to device failure. The distributions of the switching voltages at positive-forming, positive-SET, negative-RESET, and negative-SET are shown in Fig. 2.17B. The negative-SET phenomenon is more likely to happen at high RESET voltages. Due to the randomness in filament formation, the distributions of negative-SET and negative-RESET are overlapped, meaning that it is hard to eliminated the negative-SET phenomenon by simply limiting the RESET voltage to a specific region. Fig. 2.17C shows the schematic of pulse measurement system in which the memory is connected with a 50 Ω series resistor (Rs). In the pulse test at RESET in Fig. 2.17D, the input pulse (red line) consists of three pulses (two read

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

pulse, 0.2 V, 10 μs, and one RESET pulse, 23 V, 10 μs). The first pulse is a read pulse that is used to check the initial resistance state of the device before RESET, the second pulse is a RESET pulse used for switching, and the third pulse is another read pulse to check the state after RESET. The response of the device is indicated by blue line. The negative-SET is observed in this pulse operation, following a negative-RESET. The read pulse after RESET shows that the device is still at ON state, suggesting that the RESET operation is failed because of the negative-SET. The origin of the negative-SET is investigated by HRTEM and EDS. As shown in Fig. 2.18, the device after the negative-SET is used as sample for HRTEM. Fig. 2.18A shows the cross-sectional HRTEM image of the device. A suspicious filament (dark region marked by two red lines) is observed in the ZrO2 switching layer connecting the Ag and Pt electrode. The diameter of the filament is roughly 20 nm. In the scanning TEM (STEM) mode shown in Fig. 2.18B, the filament is more clearly observed, as indicated by the red square region. The chemical element analysis is carried out by EDS in STEM mode. The Zr, Pt, and Ag element mappings are shown in Fig. 2.18C. The Zr signal in Pt region and the Pt signal in ZrO2 region are caused by scattered electrons and have uniform distributions. Although background noise also appears in Ag element mapping, the intensity of Ag element signal is highly concentrated in the filament region, implying that Ag is the main elemental component of the filament. Moreover, the middle image of Fig. 2.18C, shows that the Ag filament indeed penetrates into the Pt electrode with a depth of 20 nm. The boundaries of the Ag filament are marked by red lines. Thus, it is confirmed that the negative-SET is attributed to the formation of Ag filament in RESET. The EDS of

Figure 2.18 HRTEM and EDS results of the Ag/ZrO2/Pt device after negative-SET operation. (A) HRTEM and (B) STEM-BF image of the device. A suspicious filament region is marked by the two straight lines in (A) and dashed square in (B). The scale bar is 30 nm. (C) EDS elemental mapping of Zr, Ag, and Pt in the square in (B). Source: Adapted from S. Liu, N. Lu, X. Zhao, H. Xu, W. Banerjee, H. Lv, et al., Eliminating negative-SET behavior by suppressing nanofilament overgrowth in cation-based memory, Adv. Mater. 28 (48) (2016) 10623.

Characteristics and mechanisms in resistive random-access memory

35

Figure 2.19 The HRTEM and EDS of Ag/ZrO2/G/Pt device in ON state. (A) HRTEM and (B) STEM-BF images of Ag/ZrO2/G/Pt device, respectively. A possible filament is highlighted by two straight lines. (C) EDS element mapping images of Zr, Ag, and Pt, respectively. The boundaries of Ag filament are highlighted by two continuous lines in Ag element mapping image. Scale bar in (A)
(C) is 15 nm. (D) EDS of four different regions along the filament in (B) marked by circles. Source: Adapted from S. Liu, N. Lu, X. Zhao, H. Xu, W. Banerjee, H. Lv, et al., Eliminating negative-SET behavior by suppressing nanofilament overgrowth in cation-based memory, Adv. Mater. 28 (48) (2016) 10623.

the four regions along the filament is shown in Fig. 2.18D. The Ag signal is detected in regions “1,” “2,” and “3,” but not in “4.” This result further confirms that the Ag filament can penetrate into the Pt electrode within a certain depth. To eliminate the negative-SET phenomenon, a graphene blocking layer is inserted between the ZrO2 switching layer and the Pt bottom electrode. Graphene is a novel 2D material that shows excellent impermeability for blocking the migration of molecules and ions, because that its hexagonal lattice with 0.064 nm intrinsic “pore” size is smaller than the van der walls radii of the smallest atom. Besides, graphene shows high electronic and thermal conductivities. The HRTEM image of the Ag/ZrO2/ Graphene(G)/Pt device at LRS is shown in Fig. 2.19A. A possible filament region is indicated by red lines. In the STEM-BF image in Fig. 2.19B, the filament region is clearly observed, as indicated by the red lines. EDS element mappings of Zr, Ag, and Pt are illustrated in Fig. 2.19C. In contrast to the Ag mapping result in Fig. 2.18C, the penetration of Ag into the Pt electrode is obviously prohibited in Ag/ZrO2/G/Pt device. The EDS results of the four regions along the filament are further evidence of the prohibition. No Ag signal is detected in regions “3” and “4” this time.

2.3.1.4 Filament undergrowth In contrast to the filament overgrowth that usually leads to the negative-SET phenomenon, filament undergrowth also exits in RRAM or memristors. Filament

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

overgrowth results in the stuck of the device at LRS, while filament undergrowth induces instabilities in RS, leading to the so-called threshold switching phenomenon. The filament undergrowth usually stems from the application of insufficient current or voltage, or a too low-compliance current in the RS that stops the formation of a fully continuous filament. A direct observation of the conversion between threshold switching and memory switching is reported by Sun et al. [9]. The model device in the study of threshold switching and memory switching is Ag/SiO2/Pt. To better observe the filament morphology in the switching, the device is planar. In order to identify the dynamic process of CF in details and meanwhile ensure the electroforming operation successfully, an appropriate distance between Ag and Pt electrodes is needed. The gaps of the Ag/SiO2/Pt planar device are designed from 100 nm to 2 μm. Schematic of the device structure is shown in the left image in Fig. 2.20A. The SEM images of the device with 372 and 1467 nm gap are shown in the middle and right image in Fig. 2.20A. The as-deposited devices are normally in the HRS and their initial resistances are more than 1011 Ω at 0.2 V read voltage. Electroforming is needed for trigger of the RS behaviors. Fig. 2.20B, shows the electroforming with a compliance current ICC 5 100 nA. A voltage sweeping up to 22 V is needed to realize the electroforming. This huge voltage in comparison with previous works is due to the large scale of the planar device. After electroforming, the subsequent threshold switching behavior is represented in the inset of Fig. 2.20B. The threshold switching is volatile. In positive voltage sweeping (indicated as green line), the device is firstly switched from HRS to LRS (denoted as 1!2!3) at a threshold voltage Vth 5 15 V. However, in the backward sweeping (4!5), the LRS degrades rapidly to the HRS at a hold voltage Vhold 5 5 V (5!6). The same trend is observed in the negative voltage sweeping (purple line). However, after electroforming at ICC 5 100 μA in Fig. 2.20C, nonvolatile memory switching occurs. A bipolar nonvolatile RS is clearly shown in the inset of Fig. 2.20C. To reveal the underlying mechanisms of the conversion between threshold and memory switching, the morphology and chemical composition analyses on the Ag/ SiO2/Pt planar device electroformed at various ICC are performed by SEM and HRTEM. Fig. 2.21A is a SEM image of the pristine device. After electroforming at different ICC, a filament region appears at the gap between the top and bottom electrode, as shown in Fig. 2.21B
D. For ICC of 5 nA (Fig. 2.21C) and 100 nA (Fig. 2.21D), the devices show threshold switching after electroforming. An uncompleted filament is clearly presented for the threshold switching devices. Actually, the uncompleted filament is a chain of nanoparticles. However, for ICC of 100 μA, the device shows memory switching and a completed filament is observed (Fig. 2.21D). Cross-section TEM image of the nanoparticle chain is shown in Fig. 2.21E. The filament consists of some isolated nanoparticles distributing on the surface of and inside the bulk of SiO2 RS layer. The nanoparticles have a spherelike shape. The dimensions of the nanoparticles ranges from several to several tens of nanometers. The HRTEM image of a typical nanocrystal is shown in Fig. 2.21F.

Characteristics and mechanisms in resistive random-access memory

37

Figure 2.20 (A) Schematic of the planar device Ag/SiO2/Pt and its SEM image with gap size of 372 and 1467 nm. (B) IV characteristics of the electroforming process at a compliance current ICC 5 100 nA, the inset shows the threshold switching behavior after forming. (C) IV characteristics of the electroforming process at a compliance current ICC 5 100 μA, the inset shows the memory switching behavior after forming. Source: Adapted from H. Sun, L. Qi, C. Li, S. Long, H. Lv, B. Chong, et al., Direct observation of conversion between threshold switching and memory switching induced by conductive filament morphology, Adv. Funct. Mater. 24 (36) (2015) 5679
5686.

Clear lattice fringes are observed. The FFT image of the particle is shown in Fig. 2.21G, the spherical nanoparticle is crystalline with a fringe space of 0.237 nm, which is in agreement with the (111) plane of face-centered cubic Ag. The red circle regions are enlarged and shown in Fig. 2.21H. To study the chemical composition of the nanoparticles, EELS element mappings (Si, O, and Ag) of the region are represented in Fig. 2.21I
K, respectively. A uniform distribution of Si and O in the region is revealed, while Ag only concentrates in the nanoparticles region. These results further demonstrate that the filament is indeed composed of Ag nanocrystals. The conduction mechanism in the threshold switching is investigated, as shown in Fig. 2.22. Fig. 2.22A
C show the cross-sectional schematic of the Ag/SiO2/Pt planar structure with Ag nanoparticle chain, and the corresponding energy diagram and equivalent circuit, respectively. As can be seen from Fig. 2.21E and F, the space of adjacent Ag nanoparticles ranges from 2 to 5 nm. As a result, the gap

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Figure 2.21 Morphological and element analyses of the Ag/SiO2/Pt device after electroforming at various ICC. (A) SEM image of the pristine device, and devices electroformed at (B) ICC 5 5 nA, (C) 100 nA and 100 μA. The filament region is clearly marked by the dashed square. For the low ICC, only a chain of nanocrystals is presented, implying that the filament is not fully grown. However, for high ICC, a complete filament connects the top and bottom electrode. (E) Cross-sectional TEM image along the nanocrystal chain. (F) HRTEM image of a single nanocrystal. (G) The diffraction pattern extracted by Fourier transform of (F) showing Ag (111) crystal plane. (H) Enlarged TEM images taken from the dashed rectangular region in (E). (I
K) EELS mapping images of Si, O, and Ag elements, respectively, corresponding to the region in (H). Source: Adapted from H. Sun, L. Qi, C. Li, S. Long, H. Lv, B. Chong, et al., Direct observation of conversion between threshold switching and memory switching induced by conductive filament morphology, Adv. Funct. Mater. 24 (36) (2015) 5679
5686.

between each pair of adjacent Ag nanoparticles can be seen as a tunneling barrier. Curve fitting is performed on the turn on and turn off region of a typical IV curve in threshold switching (Fig. 2.22D). The results show that both the turn on region (Fig. 2.22E) and turn off region (Fig. 2.22F) can be well fitted by ln(I/V2) versus 1/ V, which is the feature of the tunneling mechanism.

Characteristics and mechanisms in resistive random-access memory

39

Figure 2.22 Conduction mechanism investigation for the threshold switching device. (A) Cross-sectional schematic of the device and its (B) energy diagram and (C) equivalent circuit model. (D) A typical IV curve of the threshold switching device. And the ln(I/V2) versus 1/V fitting of the IV curve at (E) turn on and (F) turn off regions. Source: Adapted from H. Sun, L. Qi, C. Li, S. Long, H. Lv, B. Chong, et al., Direct observation of conversion between threshold switching and memory switching induced by conductive filament morphology, Adv. Funct. Mater. 24 (36) (2015) 5679
5686.

2.3.2 Valence-change mechanism Unlike ECM devices, in which the electrode materials directly participate in the RS process, the ionic participants, that is, oxygen vacancies or oxygen ions in VCM devices are primarily from the outer atmosphere. In this sense, understanding of the defect chemistry theory of the point defects, especially oxygen vacancies, is critical for disclosing the RS mechanisms in VCM devices and guiding the device engineering. Moreover, the exchange of oxygen with outer atmosphere, for example, water molecules or oxygen molecules, and the redistribution of oxygen vacancies play important roles in the switching kinetics of VCM devices. The filament in VCM devices is also different from that in ECM ones. The filament herein is composed of oxygen vacancies or suboxides of the switching materials, while in ECM it is pure metal that is the same material as the active electrode. Accordingly, both of the top and bottom electrodes of the VCM device are from inert materials, for example, Pt, Au, Pd, TiN, W, etc. And materials in the switching layer are usually transition metal oxides, perovskites, and so on. Besides, because the oxygen vacancies are donor centers, their redistribution may modulate the barrier height/width at the electrode/switching layer interface. VCM RS is the result of a change in the

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

valence state of the transition metal induced by the movement of donor-type oxygen vacancy.

2.3.2.1 Point defects in valence-change mechanism devices For the study of the defect chemistry of point defects in VCM devices, perovskites like SrTiO3 are ideal model material since their defect chemistry has already been thoroughly investigated. Moreover, SrTiO3 has high chemical and thermal stability. Owing to its [TiO6] octahedral structure with common vertex, SrTiO3 can accommodate various dopants with large amounts. By doping SrTiO3 with different elements, it can exhibit ionic conductivity, n-type and p-type electronic conductivities, as shown in Fig. 2.23. Owing to the closed packed perovskite lattice, interstitial ions are almost impossible, only substitution ions are considered. A detailed discussion on the defect chemistry of point defects in perovskites is present in Ref. [10]. The main point defects in SrTiO3 are oxygen vacancies (VO ), strontium vacan00 00 cies (VSr ), donor (D ), acceptor (A0 ), electron (e0 ), and hole (h ). The VO and VSr are generated via the partial Schottky reaction: 00 3 1 VO 1 2OO3 1 TiTi 1 SrOR=P ; SrTiO3 2VSr

(2.13)

where, SrOR/P is the Ruddlesden
Popper phase. Even for undoped SrTiO3, there are still small amount of unavoidable background acceptor-type dopants. Thus, undoped SrTiO3 is acceptor-doped. Typically, the A-site (ABO3) acceptor doping is

Figure 2.23 Conductivity diagram for acceptor-doped SrTiO3 after equilibration at 1000K and quenching to 500K as a function of the oxygen partial pressure during equilibration. Source: Adapted from T. Shi, Y. Chen, X. Guo, Defect chemistry of alkaline earth metal (Sr/Ba) titanates, Prog. Mater. Sci. 80 (2016) 77
132.

Characteristics and mechanisms in resistive random-access memory

41

rare. Therefore, it is not discussed here. The defect chemical reaction of B-site acceptor doping is: 2TiO2

A2 O3
! 2A0Ti 1 3OO3 1 VO :

(2.14)

While for donor doping, the forms of defect chemical reactions are closely related to the oxygen partial pressure at doping. At low-oxygen partial pressure, the donors are electrically compensated by electrons (assuming that the valence of the dopant is 15 and at B-site): 2TiO2

D2 O5
! 2DTi 1 4OO3 11=2O2 ðgÞ 1 2e0 :

(2.15)

At high oxygen partial pressure, the donors are electrically compensated by 00 : strontium vacancies VSr 2TiO2

00 1 SrOR=P : D2 O5 1 SrO
! 2DTi 1 5OO3 1 VSr

(2.16)

Moreover, oxygen exchange with the outer atmosphere occurs: OO3 2VO 1 1=2O2 ðgÞm 1 2e0 :

(2.17)

Even in a high temperature of more than 1380K, the mobility of strontium vacancies is only about 10
19 m2/V s, and the concentration of strontium vacancies is very low. The concentrations of donors DU or acceptors A0 can be controlled by dopant concentration. However, their mobilities are as low as the strontium vacancies. As a result, typically the migration of the above point defects can be ignored in perovskite-based RRAM devices, since the operation temperature of RRAM is at room temperature. The mobility of oxygen vacancies at room temperature is about 10
17 m2/V s. Moreover, the mobility of oxygen vacancies can be increased exponentially at high-electrical field. As a result, the oxygen vacancies are mobile in RRAM devices. The other mobile point defects are electrons and holes. From the above reactions, it is clearly that by controlling the temperature, oxygen partial pressure and dopant type/concentration, the concentrations of oxygen vacancies VO , electrons e0 , and holes h can be preliminary configured, determining the initial electrical properties of RRAM devices.

2.3.2.2 Oxygen exchange in valence-change mechanism device Since the influence of the surrounding atmosphere on the switching process is frequently observed, the investigation of the oxygen exchange kinetics in VCM devices is critical to the understanding of the switching mechanism. Heisig et al. investigated the role of oxygen and water species during RS, by using isotope labeling experiments in a N2/H218O tracer gas atmosphere combined

42

Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

with time-of-flight secondary-ion mass spectrometry (ToF-SIMS) [11]. The model device used in their experiment is Pt/SrTiO3/Nb:SrTiO3. Isotopic labeling experiments were performed by switching the devices multiple times between the LRS and HRS in H218O enriched atmosphere. H218O was chosen as tracer gas because of its fast incorporation kinetics into perovskites in comparison with dry 18O2 [12], rendering it to an ideal tracer molecule to study the oxygen exchange processes during switching. The device under test is placed in a sealed chamber. Dry N2 gas is blown into the liquid H218O to obtain a mixture of gaseous N2/H218O. After the device is operated multiply in the N2/H218O atmosphere, ToS-SIMS is performed to identify the its isotopic composition. Fig. 2.24A, shows the depth profile of secondary ions Au2, Pt2, TiO2, and NbO2 in pristine device, the device structure of Au/Pt/SrTiO3/Nb:SrTiO3 is clearly observed. Afterward, three devices, one is at pristine state, one is operated for one time and one for 60 times are studied, as shown in Fig. 2.24. The zero point of the depth profile is referred to the beginning of the TiO2 signal. The 16O2 intensity of the three devices show almost identical depth profiles, as shown in Fig. 2.24B. However, for the 18O2, a sharp increase of its intensity is observed in the device switched for 60 cycles, as shown in Fig. 2.24C. To exclude the possibility that the sharp increase is due to the ionbeam roughening induced artifacts, the isotopic fraction n  (x) is calculated according to n  (x) 5 I(18O2)/[I(18O2) 1 I(16O2)] and plotted in Fig. 2.24D. From the Fig. 2.24 it is clear that there is a significant increase (B9%) of 18O2 at the Pt/ SrTiO3 interface for the device cycled for 60 times, and the diffusion distance is approximately 12 nm, indicating directly the incorporation of oxygen from H2O to the SrTiO3 RS layer. The lateral distribution of the 18O2 is studied in a similar device cycled for 60 times, as shown Fig. 2.24E. The area covered by the gold lead (marked as red rectangle) has the largest amount of 18O2 and longest diffusion distance in comparison with the other regions, suggesting enhanced mobility and exchange coefficient in this area. To understand this lateral difference, 2D electrothermal simulation is carried out. Fig. 2.24F, shows that the hot spot (up to 542K) is right underneath the contact point between the gold lead and the Pt top electrode. Thermal image (Fig. 2.24G) of the device provides further evidence to the correctness of the simulation. Thus, the lateral difference can be attributed to the thermal enhanced oxygen exchange underneath the contact point, which also suggest that the switching filament is predestinated to form at this location. From the above discussions, it can be concluded that the water molecular is a possible oxygen source in the RS. To distinguish the effects of water and oxygen molecular on the switching characteristics. Endurance test of the device is performed in different atmospheres: dry N2/O2, dry N2 (O2 .3 ppm), humid N2 (humidity # 93%), and N2/O2/H2O atmosphere (humidity # 93%), as shown in Fig. 2.25A
D. In Fig. 2.25A, a high ON/OFF ratio of more than 104 is achieved in dry N2/O2 atmosphere. And the device can be repetitively operated for at least 2000 cycles without failure. For dry N2 atmosphere in Fig. 2.25B, the device fails after 1000 switching cycles. The scattering at HRS may be attributed to the detection limit of the power supply. In humid atmosphere (Fig. 2.25C and D), a dramatic decrease of the HRS is presented. Moreover, the ON/OFF ratio decreases with

Characteristics and mechanisms in resistive random-access memory

43

Figure 2.24 ToF-SIMS of the Pt/SrTiO3/Nb:SrTiO3 after resistively switched in N2/H218O tracer gas atmosphere. (A) Depth profile of the secondary ion intensity for the primary ions, which is extracted from the top electrode region buried by the gold lead (red box in panel E). (B) Normalized 16O2 intensity with sputter depth. The depth profile is adjusted to zero at TiO2 offset. (C) 18O2 depth profile and (D) isotopic fraction. (E) Isotopic fractions of the device after 60 switching cycles. The error bar indicates the square root deviation. The inset is the device with different regions marked as color boxes. (F) The 2D electrochemical simulation to identify the hot spot. (G) Thermal image of the device during SET process. Source: Adapted from T. Heisig, C. Baeumer, U.N. Gries, M.P. Mueller, C. La Torre, M. Luebben, et al., Oxygen exchange processes between oxide memristive devices and water molecules, Adv. Mater. 30 (2018) 1800957.

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

switching cycles more significantly than those in dry atmospheres, owing to the decay of the LRS. By comparing Fig. 2.25C and D, it can be concluded that the addition of oxygen molecular in humid atmosphere has merely little effect on the switching behavior of the device. The phenomena in Fig. 2.25 may be understood as follows. In the SET process, the formation of oxygen vacancy filament is according to: OO3 ! VO 1 1=2O2 ðgÞm 1 2e0 :

(2.18)

Since the generation of oxygen vacancies is from the lattice oxygen, the incorporation of 18O2 from atmosphere should be little. In the RESET process in dry atmosphere with oxygen molecular, the dissolution of the filament is according to: VO 1 1=2O2 ðgÞm 1 2e0 ! OO3 :

(2.19)

While in the RESET process in humid atmosphere, the dissolution or rupture of oxygen vacancy filament is according to: 0 3 VO 1 H18 2 OðgÞ 1 2e ! OO 1 H2 ðgÞm;

(2.20)

in which the 18O2 from water molecular is massively incorporated into the device. The reduction of the HRS in humid atmosphere can be attributed to the incorporation of protonic defects in oxygen vacancy-rich perovskites: !

H2 OðgÞ 1 VO 1 OO3 " ’ 22ðOHÞO :

(2.21)

Equations (2.20) and (2.21) are possible electrochemical reactions in humid atmosphere. The difference is that reaction (2.20) consumes electrons, resulting in decreased conductance and the RESET process, while reaction (2.21) releases protonic defects, increasing the device conductance. The competing of the two reactions depends on temperature, and local electron and oxygen vacancy concentrations. Moreover, from the nature of the reaction, reaction (2.21) is exothermic and more likely to occur at low-temperature regions away from the hightemperature filament region, while reaction (2.20) is mostly at the filament region. Therefore, the decrease of the HRS in humid atmosphere is probably attributed to the introduction of protonic defects according to reaction (2.21), which increases the conductance and impedes a complete RESET. The more and more insulating LRS in humid atmosphere is possibly result from the consumption of lattice oxygen according to reaction (2.21), which in turn leads to fewer electrons released in the subsequent SET according to reaction (2.18). For oxygen and water molecular, it is suspected that the extraction of oxygen from water is faster than from oxygen, as evidenced by results in Fig. 2.25C and D. And a high oxygen permeability of the Pt electrode enables this fast exchange.

Characteristics and mechanisms in resistive random-access memory

45

Figure 2.25 Influence of oxygen and water molecular on the switching characteristics. Endurance test of the device in (A) dry N2/O2 atmosphere, (B) dry N2 atmosphere (O2 .3 ppm), (C) humid N2 (humidity # 93%), and (D) N2/O2/H2O atmosphere (humidity # 93%). For the SET operation, a voltage of 3 V and current compliance of 50 mA were used. The RESET was performed with a voltage of 24 V. For both operations the pulse length was 0.1 s. (E) TEM image of a representative Pt electrode deformation. Source: Adapted from T. Heisig, C. Baeumer, U.N. Gries, M.P. Mueller, C. La Torre, M. Luebben, et al., Oxygen exchange processes between oxide memristive devices and water molecules, Adv. Mater. 30 (2018) 1800957.

For the atmosphere without oxygen (dry N2 in Fig. 2.25B), the RESET reactions (2.19) and (2.20) are unable to occur. Thus, the device is stuck at LRS. The first 1000 successful switching cycles are probably attributed to the oxygen preserved in the Pt electrode or the formation of gas bubbles caused by mechanical stress from

46

Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

the expulsion of lattice oxygen according to reaction(2.18). Indeed, the deformation of the Pt top electrode is observed, as shown in Fig. 2.25E.

2.3.2.3 Eight-wise and counter-eight-wise valence-change mechanism In VCM devices, two representative RS behaviors are usually reported, they are eight-wise (8w) RS and counter-eight-wise (c8w) RS. They are mainly stem from the competition between the oxygen exchange reaction and drift-diffusion of oxygen vacancies inside the switching layer, respectively. Zhang et al. investigated the RS behaviors of Pt/TiO2/Ti/Pt VCM device and found the coexistence of 8w and c8w RS, as shown in Fig. 2.26 [13]. The voltage bias is applied on the Pt top electrode and the Ti/Pt bottom electrode is always grounded. The 8w and c8w switching cycles are marked by red and black lines, respectively. The arrows indicate the switching sequences. From Fig. 2.26, it is clear that in 8w RS, the device is switched from HRS to LRS at positive voltage bias and from LRS to HRS at negative bias. While in c8w RS, the device is switched from LRS to HRS at positive bias and from HRS to LRS at negative bias.

Figure 2.26 Coexistence of 8w and c8w RS in Pt/TiO2/Ti/Pt. The lines and arrows indicate the switching sequences of 8w (C!D!E!F!C) and c8w (A!B!C!D!A) RS, respectively. Source: Adapted from H. Zhang, S. Yoo, S. Menzel, C. Funck, F. Cu¨ppers, D.J. Wouters, et al., Understanding the coexistence of two bipolar resistive switching modes with opposite polarity in Pt/TiO2/Ti/Pt nanosized ReRAM devices, ACS Appl. Mater. Interfaces 10 (35) (2018) 29766
29778.

Characteristics and mechanisms in resistive random-access memory

47

Figure 2.27 Calculated oxygen vacancy distribution of Pt/BiFeO3/Pt in the electroforming process (A) without and with (B) considering the oxygen exchange reaction. The black arrows indicate the temporal evolution of the oxygen vacancy profile. The dashed line in (B) marks the extension of the oxygen vacancy reservoir at the bottom electrode. Source: Adapted from T. Shi, R. Yang, X. Guo, Coexistence of analog and digital resistive switching in BiFeO3-based memristive devices, Solid State Ionics 296 (2016) 114
119.

To understand the switching mechanisms underlying the 8w and c8w RS, the oxygen vacancy profile in electroforming and subsequent SET/RESET should be disclosed. Shi et al. studied the RS of Pt/BiFeO3/Pt VCM device and modeled its electroforming process, as shown in Fig. 2.27 [14]. The oxygen vacancy profiles in the device in the electroforming are calculated. The oxygen exchange reaction (reaction 2.17) is critical for the electroforming process. As shown in Fig. 2.27A, without oxygen exchange, the oxygen vacancies inherently in the perovskite accumulate at the BiFeO3/Pt interface, while continuously depleted at the Pt/BiFeO3 interface. In this situation, the formation of oxygen vacancy filament, which can be usually observed in the IV curves as an abrupt current jump, is unlikely to occur. However, when the oxygen exchange reaction is introduced at the interface, a dramatic increase of the oxygen vacancy concentration in the RS layer is observed, as shown in Fig. 2.27B. The extension of the oxygen vacancy reservoir is marked by the dashed line. Moreover, at the Pt/BiFeO3 interface, another concentration increase is presented, owing to the generation of oxygen vacancies according to reaction (2.17). Their results are in good agreement with the experimental observations reported by Janousch et al. [15]. Further simulation work by Kalaev et al. demonstrates that the growth direction of the filament in the electroforming in VCM device is dependent on the competition between the oxygen exchange reaction at the interface and the drift-diffusion of oxygen vacancies in the bulk. If the kinetics of oxygen exchange reaction is faster, then the filament will grow from the top electrode (where the oxygen exchange happens) to the bottom electrode. Whereas if the kinetics of the drift-diffusion of oxygen vacancies is faster, then the filament will grow from the bottom electrode to the top electrode. In the case of equivalent fast kinetics, growth from the both directions are possible, as shown in Fig. 2.27B.

48

Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Figure 2.28 Schematic of the oxygen vacancy profile in (A)
(C) c8w RS and (D)
(F) 8w RS. An oxygen vacancy reservoir at the top interface Ti/TiO2 is generated via electroforming. As donors, the accumulation of oxygen vacancies can reduce the barrier at the bottom TiO2/Pt interface, rendering it quasi-ohmic. Therefore, the switching interface is located at the TiO2/Pt interface. Source: Adapted from H. Zhang, S. Yoo, S. Menzel, C. Funck, F. Cu¨ppers, D.J. Wouters, et al., Understanding the coexistence of two bipolar resistive switching modes with opposite polarity in Pt/TiO2/Ti/Pt nanosized ReRAM devices, ACS Appl. Mater. Interfaces 10 (35) (2018) 29766
29778.

The competition between the oxygen exchange reaction and the drift-diffusion of oxygen vacancies is also the reason for the 8w and c8w RS in VCM device. Schematic of the oxygen vacancy distribution in c8w RS is shown in Fig. 2.28A
C. If the drift-diffusion is dominant, then at positive voltage bias on the Pt electrode, the depletion of oxygen vacancy at the Pt/TiO2 interface will surpass its generation according to the oxygen exchange reaction. As a result, the device is switched from LRS to HRS. At negative voltage bias, the accumulation of oxygen vacancy at the Pt/TiO2 interface is dominant over the annihilation of oxygen vacancies according to reaction (2.19) or (2.20). Thus, the device is switched from HRS to LRS. While in the case of 8w RS shown in Fig. 2.28D
F, the oxygen exchange is dominant. Conclusively, a reversed RS behavior is presented.

2.3.3 Thermochemical mechanism Thermal effect is always inevitable in RRAM devices due to the Joule heating. In the previously discussed RS mechanisms, thermal effects indeed participate in the RS process, for example, the VCM switching process in Fig. 2.24. In the above

Characteristics and mechanisms in resistive random-access memory

49

cases, thermochemical effect arising from Joule heating is a side effect but not dominant in the RS. However, in other circumstances, thermochemical effect can be dominant. The most prominent type is the phase change effect utilized for PCM devices which is not covered here. For RRAM device, a sign of the domination of thermochemical effect is the appearance of unipolar RS, in which the SET and RESET can be accomplished in the same voltage polarity. In TCM, it is widely accepted that this type of unipolar resistive switching is triggered by a filamentary thermal breakdown of the oxide leading to a conduction path between the top and bottom electrodes. In the SET process, a compliance current is setup to avoid the hard breakdown of the device, thus, a filament with controllable resistance is formed. However, in the RESET process, the compliance current is removed, leading to a huge Joule heating effect that melts the filament. Since the Joule heating is independent of the voltage polarity, the TCM device typically shows unipolar RS.

2.3.4 Electrostatic/electronic effects Although the RS in RRAM includes coupled ionic and electronic dynamics, and ion migration plays critical role in ECM, VCM, or TCM device, RS induced primarily by electrostatic/electronic effect is reported in literatures. For example, space-charge-limited conduction (SCLC), metal-insulator transition (MIT), Poole
Frenkel emission (P
F emission), and so on.

2.3.4.1 Space-charge-limited conduction SCLC is a charge trapping/detrapping mechanism. At external biases, the impurity energy levels can be occupied by the electrons. The trapping and detrapping of the electrons result in the switching between HRS and LRS. IV curves in the SCLC model can be divided into three parts: (1) ohmic conduction region. At low-applied voltages less than a threshold voltage Vtr, the IV curve follows the Ohm relation (IBV), suggesting that the density of thermally generated free carriers inside the switching layer is larger than the injected ones. (2) Trapfilled-limit region. In the case of large voltage less than a subthreshold voltage VTFL, the traps start to be filled up and a space charge appears. The IV curve follows IBV2. (3) space-charge-limited region. With further increasing of the voltage, all traps are filled and the conduction becomes space-charge-limited, the IV curve follows the Child’s law (IBV2). An example of the SCLC-dominated RS is reported in Pt/BiFeO3/Pt device, as shown in Fig. 2.29. Both the LRS and HRS can be well fitted by the SCLC model. The threshold voltage Vtr and subthreshold voltage VTFL are indicated by the red arrows. The presentation of surface traps influences the transition from the ohmic region to the trap-filled-limited region [16]. If the carriers are injected from the contact with the surface traps, the transition is very sharp and similar to the situation where only bulk traps are presented in the material. However, if the carriers are injected from the trap-free contact, the transition is smooth and power-law like.

50

Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Figure 2.29 The log
log fitting of the IV curves in Pt/BiFeO3/Pt at (A) negative voltage polarity and (B) positive voltage polarity. Source: Adapted from T. Shi, R. Yang, X. Guo, Coexistence of analog and digital resistive switching in BiFeO3-based memristive devices. Solid State Ionics 296 (2016) 114
119.

2.3.4.2 Metal-insulator transition The electronic charge injection usually induces the MIT in perovskites, such as (Pa, Ca)MnO3 [17], Cr-doped SrTiO3 [18], and Ca-doped BiFeO3 [19]. Rozenberg et al. developed a basic MIT model by assuming that the semiconducting part has a nonpercolating domain structure to explain the multilevel resistance states, retention, and hysteretic behavior in the resistive switching [20]. For Mott transition, fillingcontrolled and bandwidth-controlled Mott transition are widely reported in RRAMs. The filling-controlled Mott transition corresponds to the VCM in band-insulators, driven by oxygen vacancy migration. While the bandwidth-controlled Mott transition is stem from a change in the bandwidth. A more detailed review on Motttransition-based RRAM is reported by Wang et al. [21].

2.3.4.3 Poole
Frenkel emission P
F emission is similar to Schottky emission in that the thermal excitation of electrons may emit from traps into the conduction band of the RS layer material. The Coulomb potential energy of electrons in a trap can be reduced by the electrical field. This reduction in potential energy may increase the probability of the electrons being emitted to the conduction band. The P
F emission is expected to dominate the conductance of the RRAM when the trap density in the RS layer is high and the layer is thick enough to avoid tunneling [22]. The J
V in the P
F model follows the expression: qffiffiffiffiffiffiffiffi 3 2 e φB 2 πεeEr ε0 5; J~eμNC Eexp4 kB T 2

(2.22)

Characteristics and mechanisms in resistive random-access memory

51

Figure 2.30 (A) IV curves of the Cr-doped SrZrO3-based RRAM device. The inset shows the variation of the resistance ratio with the bias voltage. (B) The ln(J/V) versus |V|1/2 fitting for the HRS and LRS. Source: Adapted from L. Chih-Yi, W. Pei-Hsun, A. Wang, J. Wen-Yueh, Y. Jien-Chen, C. Kuang-Yi, et al., Bistable resistive switching of a sputter-deposited Cr-doped SrZrO/sub 3/ memory film. IEEE Electron. Device Lett. 26 (6) (2005) 351
353.

where, E is the electric field, q is the elementary charge, φB is the barrier height, and Nc is the effective density of states in the bottom of conduction band. The Al/SrZrO3:Cr/Si device shows P
F emission dominated RS behavior, as shown in Fig. 2.30 [23]. The HRS and LRS of the device can be fitted by the relation ln(J/V) B |V|1/2, which is a sign for P
F emission.

References [1] J.J. Yang, M.D. Pickett, X. Li, D.A. Ohlberg, D.R. Stewart, R.S. Williams, Memristive switching mechanism for metal/oxide/metal nanodevices, Nat. Nanotechnol. 3 (7) (2008) 429
433. [2] L. Chua, Memristor-The missing circuit element, IEEE Trans. Circuit Theory 18 (5) (1971) 507
519. [3] E. Budevski, G. Staikov, W.J. Lorenz, Electrocrystallization Nucleation and growth phenomena, Electrochim. Acta 45 (15) (2000) 2559
2574. [4] X. Guo, C. Schindler, S. Menzel, R. Waser, Understanding the switching-off mechanism in Ag 1 migration based resistively switching model systems, Appl. Phys. Lett. 91 (2007) 133513. [5] N. Banno, T. Sakamoto, N. Iguchi, H. Sunamura, K. Terabe, T. Hasegawa, et al., Diffusivity of Cu ions in solid electrolyte and its effect on the performance of nanometer-scale switch, IEEE Trans. Electron. Devices 55 (11) (2008) 3283
3287. [6] Y.C. Yang, F. Pan, Q. Liu, M. Liu, F. Zeng, Fully room-temperature-fabricated nonvolatile resistive memory for ultrafast and high-density memory application, Nano Lett. 9 (4) (2009) 1636
1643. [7] Q. Liu, C. Dou, Y. Wang, S. Long, W. Wang, M. Liu, et al., Formation of multiple conductive filaments in the Cu/ZrO2:Cu/Pt device, Appl. Phys. Lett. 95 (2009) 023501.

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

[8] S. Liu, N. Lu, X. Zhao, H. Xu, W. Banerjee, H. Lv, et al., Eliminating negative-SET behavior by suppressing nanofilament overgrowth in cation-based memory, Adv. Mater. 28 (48) (2016) 10623. [9] H. Sun, L. Qi, C. Li, S. Long, H. Lv, B. Chong, et al., Direct observation of conversion between threshold switching and memory switching induced by conductive filament morphology, Adv. Funct. Mater. 24 (36) (2015) 5679
5686. [10] T. Shi, Y. Chen, X. Guo, Defect chemistry of alkaline earth metal (Sr/Ba) titanates, Prog. Mater. Sci. 80 (2016) 77
132. [11] T. Heisig, C. Baeumer, U.N. Gries, M.P. Mueller, C. La Torre, M. Luebben, et al., Oxygen exchange processes between oxide memristive devices and water molecules, Adv. Mater. 30 (2018) 1800957. [12] M. Kessel, R.A.D. Souza, H.-I. Yoo, M. Martin, Strongly enhanced incorporation of oxygen into barium titanate based multilayer ceramic capacitors using water vapor, Appl. Phys. Lett. 97 (2) (2010) 021910. [13] H. Zhang, S. Yoo, S. Menzel, C. Funck, F. Cu¨ppers, D.J. Wouters, et al., Understanding the coexistence of two bipolar resistive switching modes with opposite polarity in Pt/TiO2/Ti/Pt nanosized ReRAM devices, ACS Appl. Mater. Interfaces 10 (35) (2018) 29766
29778. [14] T. Shi, R. Yang, X. Guo, Coexistence of analog and digital resistive switching in BiFeO3-based memristive devices, Solid State Ionics 296 (2016) 114
119. [15] M. Janousch, G.I. Meijer, U. Staub, B. Delley, S.F. Karg, B.P. Andreasson, Role of oxygen vacancies in Cr-doped SrTiO3 for resistance-change memory, Adv. Mater. 19 (2007) 2232. [16] R.W.I. de Boer, A.F. Morpurgo, Influence of surface traps on space-charge limited current, Phys. Rev. B 72 (7) (2005). [17] D.S. Kim, Y.H. Kim, C.E. Lee, Y.T. Kim, Colossal electroresistance mechanism in a Au/Pr0.7Ca0.3MnO3/Pt sandwich structure: evidence for a Mott transition, Phys. Rev. B 74 (17) (2006) 174430. R. Fors, S.I. Khartsev, A.M. Grishin, Giant resistance switching in metal-insulatormanganite junctions: evidence for Mott transition, Phys. Rev. B 71 (4) (2005) 45305. [18] G.I. Meijer, U. Staub, M. Janousch, S.L. Johnson, B. Delley, T. Neisius, Valence states of Cr and the insulator-to-metal transition in Cr-doped SrTiO3, Phys. Rev. B 72 (72) (2005) 5102. [19] C.H. Yang, J. Seidel, S.Y. Kim, P.B. Rossen, P. Yu, M. Gajek, et al., Electric modulation of conduction in multiferroic Ca-doped BiFeO3 films, Nat. Mater. 8 (6) (2009) 485
493. [20] M.J. Rozenberg, I.H. Inoue, M.J. Sa´nchez, Strong electron correlation effects in nonvolatile electronic memory devices, Appl. Phys. Lett. 88 (3) (2006) 033510. M.J. Rozenberg, I.H. Inoue, M.J. Sa´nchez, Nonvolatile memory with multilevel switching: a basic model, Phys. Rev. Lett. 92 (17) (2004) 178302. [21] Y. Wang, K.-M. Kang, M. Kim, H.-S. Lee, R. Waser, D. Wouters, et al., Mater. Today 28 (2019). [22] D.S. Jeong, C.S. Hwang, Tunneling-assisted Poole-Frenkel conduction mechanism in HfO2 thin films, J. Appl. Phys. 98 (11) (2005) 113701. [23] L. Chih-Yi, W. Pei-Hsun, A. Wang, J. Wen-Yueh, Y. Jien-Chen, C. Kuang-Yi, et al., Bistable resistive switching of a sputter-deposited Cr-doped SrZrO3 memory film, IEEE Electron. Device Lett. 26 (6) (2005) 351
353.

Memory characteristics and mechanisms in transistor-based memories

3

Wentao Xu and Yao Ni Institute of Optoelectronic Thin Film Devices and Technology, Key Laboratory of Optoelectronic Thin Film Devices and Technology of Tianjin, Nankai University, Tianjin, P.R. China

3.1

Introduction

Memory devices receive and record digital information. They are core components of computers and electronic systems. Electrical memory devices can be classified into two categories based on their need of power: when power is off, volatile memory loses the stored data, while data in nonvolatile memory retains [1]. These storage technologies mainly exploit a material’s characteristics such as magnetism, polarity, phase, or conductivity, to generate different electrical steady-state responses to an applied electric field. These different responses are exploited to store information. Nonvolatile memory devices can be further classified into resistance-based, capacitance-based, and transistor-based types. Resistance-based and capacitancebased memory devices are generally in two terminal structures, whereas transistorbased memory (TBM) devices use three terminals, that is, transistor structure. TBM could possess the characteristics of nondestructive operation and compatibility with complementary metal oxide semiconductor (MOS) processes. Therefore, TBMs are considered one type of the most promising candidates for next-generation nonvolatile memory. This chapter mainly introduces their memory characteristics and mechanisms.

3.2

The basic structures and working principles of transistor memories

Thin-film transistors (TFTs) are three-terminal active devices that are composed of gate electrodes, insulation layer, active layer, and source/drain electrodes. Common structured TFTs can be divided into bottom-gate and top-gate types according to the position of gate electrodes, and can also be defined as bottom-contact and topcontact types according to the relative positions of the active layer and the source/ Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing. DOI: https://doi.org/10.1016/B978-0-12-819717-2.00003-5 © 2020 Elsevier Ltd. All rights reserved.

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

drain electrodes; these types can be combined pairwise into four kinds of structures, namely (Fig. 3.1): bottom-gate top-contact (BGTC), bottom-gate bottom-contact (BGBC), top-gate top-contact (TGTC), and top-gate bottom-contact (TGBC). BGTC TFTs are most widely used because they are more easily manufactured than the other types [2]. The working principle of TFTs can be described simply as a capacitor, with the gate electrode as one plate, the insulation layer as dielectric, and the conductive channel in active layer as another plate. When a bias voltage is applied to the gate, electric charge accumulates in the active layer near the insulator surface. Thus, control of the gate-bias voltage VGS can adjust the conductivity of the channel, and further adjust the magnitude of the drain
source current IDS as (Fig. 3.2) [3]: IDS 5 Ci 5

WCi μðVGS 2Vth Þ2 ; 2L ε0 K ; d

(3.1)

(3.2)

where, μ (cm2/V/s) is the carrier mobility, Vth (V) is the threshold voltage, Ci (F/ cm2) is the capacitance per unit area of the insulator, W (cm) is the width of the channel, and L (cm) is its length. Ci is calculated from the permittivity ε0 is approximately 8.86 3 10214 F  cm of vacuum, the relative dielectric constant k, and the thickness d (cm) of the insulator. The structure of TBMs is similar to that of TFTs; the main difference is that the dielectric materials in the memory devices have a charge
storage function or polarization property. Such memory devices can be generally classified into three groups

Figure 3.1 Structures of four kinds of common TFTs, and directions of carrier injection and transmission.

Memory characteristics and mechanisms in transistor-based memories

55

Figure 3.2 (A) Output characteristic (IDS
VDS) and (B) transfer characteristic (IDS
VGS) of a typical TFT. Source: Y. Ni, J. Zhou, Y. Hao, H. Lin, H. Yu, P. Gan, et al., The strong continuous induction effect based on isotype heterojunction transistors with different polymer modifications, Org. Electron. 74 (2019) 237
244 [3] Copyright © 2019 Elsevier.

according to the characteristics of dielectric layer. (1) In floating-gate transistor memories (FGTMs), the charge carriers are captured by a floating gate that is mainly composed of metals or other conductive materials. (2) In charge-trap transistor memories (CTTMs), polymers and small molecules are generally used as an electret layer to realize the function of charge trapping. (3) In ferroelectric fieldeffect transistor memories (FeFTMs), carriers are stored by exploiting the polarization of ferroelectric materials. Working principle of all the above-mentioned devices can be explained using a typical p-type TBM (Fig. 3.3). When a sufficient erasing voltage is applied to the gate to guarantee that the device is in the initial state, the redistribution of the

Figure 3.3 Operating mechanism of TBM. Numbers 1
4 correspond to four specific gate voltages [or equivalent electric field of the erasing, reading (OFF-state), programming and reading (ON-state)].

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

electric field in a storage layer (such as floating gate, electret layer, and ferroelectric layer) causes a source
drain current in a high-resistance state; when a sufficient programming voltage bias is applied, IDS returns to the low-resistance state due to the reversal of electric field polarity in the storage layer. IDS corresponds to “1” in the high-resistance (ON) state and to “0” in the low-resistance (OFF) state. In some articles, the high-resistance state corresponds to programming, whereas the low-resistance state corresponds to erasing. Important parameters that evaluates the performance of TBM are mainly memory window ΔVth, memory on/off current ratio, programming/erasing (P/E) cyclic endurance property, and time-dependent data storage retention capability [2].

3.2.1 Memory window Memory window is defined as the difference between the threshold voltages of the programmed and erased states (Fig. 3.4A) [4]. The precision of the data read increases as the storage window increases. The charge
storage capacity of the

Figure 3.4 (A) Corresponding transfer characteristics in the linear scale which emphasis the shift ΔVth of threshold voltages. (B) Endurance characteristics under three cycles of operating. Black arrow: memory on/off ratio. (C) Switching characteristics after 100 cycles of programming-erasing. (D) Memory retention versus time for both reading on and off states. Source: D. Thuau, M. Abbas, G. Wantz, L. Hirsch, I. Dufour, C. Ayela, Mechanical strain induced changes in electrical characteristics of flexible, non-volatile ferroelectric OFET based on memory, Org. Electron. 40 (2017) 30
35 [4] Copyright © 2016 Elsevier.

Memory characteristics and mechanisms in transistor-based memories

57

memory devices can also be measured by charge storage density Δn, which represents the number of charges stored per unit area of the device, and is positively correlated with ΔVth as Δn 5

ΔVth Ci ; e

(3.3)

where, e 5 1.602 3 10219 C is the unit charge. Traps in the interface and impurities in thin film also cause shift in threshold voltage; this effect may increase ΔVth, but the increased shift is uncontrollable.

3.2.2 Memory on/off current ratio Memory on/off current ratio ION/IOFF is the ratio of IDS obtained after programming and to IDS obtained after erasing at fixed reading voltages (Fig. 3.4B). ION/IOFF represents the ease of discriminating whether memory is in “1” state or “0” state. The discriminant ability increases, and progressively less error-prone as ION/IOFF increases. Generally, the gate voltage should be set to 0 V when reading, to minimize the power consumption, and to minimize the influence of the reading process on the cyclic endurance property of the device.

3.2.3 Programming/erasing cyclic endurance property Programming/erasing cyclic endurance represents the operable stability of the memory. This endurance can be characterized by the memory switch ratio or the decay of the memory window as the number of erases increases (Fig. 3.4C). To meet industrial demands for reliable electronic equipment, the memory should maintain stable switching characteristics for .106 cycles of programming and erasing.

3.2.4 Time-dependent data storage retention capability Time-dependent data storage retention capability is obtained by measuring the variation of source
drain current with time in the ON and OFF states (Fig. 3.4D). It is also an important parameter to characterize the stability of memory devices. According to commercial standards, the data storage should maintain for 10 years. Some other parameters for evaluating the TBM have also been adopted. For example, the operating voltage should be as low as possible in wearable or portable applications, to reduce energy consumption, and to reduce the influence of bias voltage on the device’s storage stability. P/E speed represents the response speed of the memory device, and in practical application, P/E time is generally in the range from microseconds to milliseconds.

58

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

The typical nonvolatile transistor memories

3.3.1 Floating-gate transistor memories Floating-gate nonvolatile memory was first achieved by introducing doped conductive polysilicon (Si) in the oxide gate dielectric layer to enable charge storage [5]. The special core of the typical FGTM consists of a stack of thin films: tunneling dielectric layer, floating-gate layer, and blocking dielectric layer (Fig. 3.5A). The tunneling layer prevents loss of charges stored in the floating gate, and also ensures that additional charges can enter the floating gate layer from the active layer under the appropriate external electric field. The blocking layer prevents charges from running off the gate, so this layer is usually relatively thick. When a positive or negative voltage is applied to the gate, electrons or holes in the conductive channel of the active layer cross the energy barrier and enter the floating gate (Fig. 3.5B); when the applied electric field is removed, these charges stored in the floating gate layer change the carrier distribution in the active layer, and this change results in the shift in threshold voltage (ΔVth). During charge injection into the floating gate, electrons hop from the lowest unoccupied molecular orbital (LUMO) or conduction band (Ec), and holes hop from the highest occupied molecular orbital (HOMO) or valence band (Ev). The tunneling mechanisms of the two types of charges mainly include Fowler
Nordheim (F
N) tunneling and direct tunneling. During F
N tunneling, charges can gain enough energy to jump over the barrier under a sufficiently highapplied electric field. During direct tunneling, the charge can tunnel through the layer to the floating gate even with a relatively low-applied electric field, if the tunneling layer is sufficiently thin [6]. Surface defects and traps at the interface of each layer in the vertical direction are the main reasons for a decrease in chargeretention ability.

Figure 3.5 (A) Typical structure of the FGTM. (B) Diagram of charge tunneling through a potential barrier with different conditions.

Memory characteristics and mechanisms in transistor-based memories

59

3.3.1.1 Electrode design The electrodes can be made of a huge variety of conductive materials, including heavily doped inorganic semiconductors, conducting polymers, metals, metal oxides, and low-dimensional (LD) materials. They provide a range of work function (WF) (Table 3.1) The energy
potential difference between the source/drain electrodes and the active layer determines the carrier
injection efficiency. Therefore, source/drain electrodes are more carefully selected than gate electrodes. A direct way to increase charge
injection efficiency is to select an electrode material that matches the energy band of the active layer to form Ohmic contact at the electrode/active layer interface [14]. In n-type memory in which the carriers are electrons, an electrode should have a low WF to match the LUMO level (or Ec) of the active layer. In p-type memory, in which the carriers are holes, the electrode should have a high WF that is close to the HOMO level (or Ev) of the active layer. An alternative method to decrease the carrier
injection barrier is to form an energy-band transitional zone by subjecting the electrode to surface treatment such as oxidation, formation of a self-assembled (SAM) layer, or insertion of a buffer implantation layer [10,11]. During the preparation of metal electrodes by highvacuum physical vapor deposition techniques at high temperature, metal ions may diffuse into the active layer and degrade its electrical properties. Therefore,

Table 3.1 The WFs of common conductive materials. Material

Type

Work function (eV)

References

N 1 doped poly Si P 1 doped poly Si

Heavily doped inorganic semiconductor Conductive polymer

B4.1 B5.1

[7] [7]

B4.9

[8]

Metal

B5.3 B5.1 B4.6 B4.6 B4.3 B3.9 B3.7 B2.9 B4.7 B4.7 B4.3 B4.6 B5.0

[9] [8] [10] [8] [11] [9] [11] [11] [12] [8] [8] [8] [13]

Poly(3,4-ethylenedioxythiophene) doped poly(styrene sulfate) (PEDOT:PSS) Pt Au Cu Ag Al Ti Mg Li Indium-tin oxide (ITO) Fluorine-doped tin oxide (FTO) ZnO Graphene Carbon nanotubes (CNTs)

Metallic oxide

LD material

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

structural optimization of devices to minimize the effect of metal diffusion is a subject worthy of study.

3.3.1.2 Active layer design The third, fourth, and fifth main group elements and their compounds (e.g., Si, Ge, GaN) were the earliest researched and are now the most technically advanced inorganic semiconductors for use in active layers. However, those semiconductors are rigid and cannot be easily adapted for use in flexible electronics. Therefore, flexible materials such as organics and LD materials have been evaluated for use as the active layer. Organic semiconductor materials can be divided into p-type and n-type according to polarity of charge carriers, and also can be classified into small molecular compounds and polymers according to molar mass. Charge carriers in p-type organic semiconductor layer are mainly holes, whereas those in n-type organic semiconductors are mainly electrons. Widely studied p-type small molecular materials include polycyclic aromatic hydrocarbons (e.g., pentacene) [15], thiophene polymers [e.g., dioctylbenzothienobenzothiophene (C8-BTBT)] [16], and their derivatives. General n-type small-molecule materials include fluorine groups [e.g., fluorinated copper phthalo-cyanine (F16CuPc)] [17], anhydride groups [e.g., perylenetetracarboxylic dianhydride (PTCDA)] [18], imide groups [e.g., perylenetetracarboxylic diimide (PDI)] [19], or cyano groups [e.g., 4,7-di(thiophen-2-yl)-5,6-dicyano-2,1,3benzothiadiazole (DTDCNBT)] [20], or C60 [21] and its derivatives. These smallmolecular organic semiconductors are commonly deposited by vacuum evaporation, thermal evaporation, and molecular beam epitaxy to obtain highly crystallized films. Compared with small molecules, the polymers have relatively inferior crystallinity but better solubility. Therefore, a large and inexpensive polymer film can be prepared by solution methods such as spin coating, blade coating, Langmuir
Blodgett (LB) film technology, and printing. The mostly used polymer semiconductor materials include poly(2,5-bis(3-dodecyl-2-yl)thieno[3,2-b]thiophene) (pBTTT) [22], poly(3-hexylthiohene) (P3HT) [23], poly(triarylamine) (PTAA) [24], and N2200 [25]. Such materials can be fabricated into LD structures, including ultra-thin films and nanowires, which may have wide applicability in flexible and low-power memory devices. Some two-dimensional (2D) inorganic materials are also emerging as promising candidates for active layers, for example, graphene (Gr) [26], MoS2 [27], and WSe2 [28]. These materials as thin as one or several atonic layers, also have epitaxial integration and unique band structures. More importantly, heterojunctions based on these 2D materials yield endow devices with some novel electrical functions due to vertical tunneling of charge carriers. For example, in a FGTM with Au/Al2O3/Gr/ Au junction structure (Fig. 3.6A), typical I
V characteristics could be obtained with different states (Fig. 3.6B and C) [29]. In the programming state with VDS 5 28 V, the electric potential drop (EPD) at the interface between drain and Gr is large and negative, so electrons can F
N tunnel out to the Gr floating gate,

Memory characteristics and mechanisms in transistor-based memories

61

Figure 3.6 (A) Schematic of FGTM device: Gr floating gate, MoS2 semiconducting channel, and Al2O3 tunneling insulator. (B) Typical I
V characteristic of this FGTM with four states: (i) Programming, (ii) reading in off-state, (iii) erasing, and (iv) reading in on-state using 7 nm thick Al2O3 layer. (C) Schematics of Au/Al2O3/Gr/Au junction at programming state, reading after programming state, erasing state, and reading after erasing state. Source: Q.A. Vu, H. Kim, V.L. Nguyen, U.Y. Won, S. Adhikari, K. Kim, et al., A high-on/ off-ratio floating-gate memristor array on a flexible substrate via CVD-grown large-area 2D layer stacking, Adv. Mater. 29 (2017) 1703363 [29] Copyright © 2017 John Wiley and Sons.

whereas the EPD at the interface between Gr and source contact is small and negative, so the electrons cannot tunnel out to the source. In the erasing state with VDS 5 8 V, the EPD at the drain/Gr interface is large and positive, so holes can easily F
N tunnel to the drain, whereas the EPD between Gr and source is small and positive so holes cannot easily tunnel out to the drain. Hence, the tunneled electrons and holes can be trapped in Gr floating gate; this process generates a negative field to deplete the major carriers (electrons) in the MoS2 channel, or a positive field to accumulate them there under the reading voltage of 0.1 V. More important, by applying different P/E voltages to adjust the EPD between source or drain electrodes and Gr, the quantities of the trapped charges in the floating gate can be controlled, so multilevel storage can be implemented. Generally, if the border-trap problem is solved, 2D inorganic materials can be prepared in a large area and widely used in commercial fields.

3.3.1.3 Tunneling/blocking dielectric layer design The design of a tunneling/blocking dielectric layer in FGTM is basically similar to that of an insulation layer in a TFT. Common inorganic insulating materials include SiO2, Al2O3, Ta2O5, TiO2, and Si3N4, which have high-temperature resistance, stable chemical properties, and high-dielectric strength. However, inorganic dielectric layers are usually fabricated or processed at high temperatures. Organic dielectric layers can be prepared by solution methods at room temperature, and have good compatibility with flexible substrates for development of wearable electronic

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Table 3.2 The summary of insulating materials with different k. Material

Type

k

References

SiO2 Al2O3 Ta2O5 TiO2 Si3N4 PS PMMA PVP PαMS PVP:poly(vinylidene fluoride-cohexafluoropropylene) (PVDF-HFP) PMMA:polyvinylidene-fluoride-trifluoroethylene (PVDF-TrFE) Cyanoethylated pullulan (CEP):poly (methylated melamine-co-formaldehyde) (PMMF) ReOx/CEP BaTiO3/PVP

Inorganic

B3.9 B8.4 B23 B41 B6.2 B2.5 B3.2 B5 B2.6 B7

[30] [31] [32] [31] [33] [25] [25] [34] [35] [36]

B5.3

[37]

B13.4

[38]

B35 B14

[39] [40]

Organic

Polymer blends

Bilayer

devices. Representative organic insulating materials include polystyrene (PS), poly (methyl methacrylate) (PMMA), polyvinylphenol (PVP), and poly(α-methylstyrene) (PαMS). However, most organic materials have a low-dielectric constant k (Table 3.2), and this trait degrades the memory on/off ratio and endurance property of memory devices that use them. Blends of polymers and bilayer structures are two of the most widely adopted methods to increase the effective k.

3.3.1.4 Floating gate design Metals have excellent ability to transmit and capture charges, and therefore are the preferred materials for floating gates. For example, a FGTM has been designed to use 20-nm Al as a floating-gate layer and 6-nm AlOX/SAM as tunneling/blocking dielectric layer [41]. This FGTM exhibits reasonably stable storage features under programming voltage of 26 V and erasing voltage of 3 V. However, with the scaling down of the feature size of such memory that uses a planar floating gate, the charge leakage increases. Metal nanoparticles (NPs) wrapped in polymers are the alternatives to serve as floating gate due to a good ability to store charges for a long time. The main methods to prepare NPs include thermal evaporation, ion sputtering, and SAM. In thermal evaporation processes with a variety of metal NPs (including Au, Ag, Cu, and Al NPs), Au NPs exhibit the best storage characteristic because of the smallest particles and the most uniform distribution [42]. Yet, with the increase of the thickness of metal film, the density of these NPs decreases. Ion sputtering can control the

Memory characteristics and mechanisms in transistor-based memories

63

suspension thickness of NPs by adjusting the sputtering time and power, but the size, spacing, and quantity of such NPs become uncontrollable in vacuum. Use of a SAM exploits the physical or chemical affinity of the substrate surface, and could well solve this problem. Some hybrid structured floating gates also could be achieved using a SAM process. Hybrid structured FGTMs generally have a bigger memory window and higher on/off ratio than pure NP-structured devices. Inorganic materials are also commonly applied as floating gates. Controlling the scale of these materials in a 2D range can effectively improve their conductivity. A typical 2D structured FGTM (Fig. 3.7A) [43] uses 2D stacks that were fabricated using epitaxial growth and dry transfer processes. Use of these methods avoided penetration of floating gate materials into the dielectric layer. This FGTM has a huge memory window of 60 V, stable storage retention and long endurance, even after 103 s and 50 writing/reading cycles (Fig. 3.7B
D). Moreover, because 2D materials are ultra-thin monocrystalline and highly extensible, such structured FGTMs can be used to support flexible, high-speed, and low-power RAM.

Figure 3.7 (A) Schematic of the 2D MoS2 structured FGTM device. A highly n-doped Si wafer (as control gate) with 300 nm SiO2 (as gate dielectric) is used as the substrate. Black phosphorous (BP), h-BN, and MoS2 are engaged as the channel, tunnel barrier, and floating gate, respectively. (B) Transfer characteristic curves of this FGFM. Inset: transfer characteristic curves of device with MoS2 as gate electrode. (C) Memory retention and (D) endurance of this FGTM. Source: D. Li, X. Wang, Q. Zhang, L. Zou, X. Xu, Z. Zhang, Nonvolatile floating-gate memories based on stacked black phosphorus-boron nitride-MoS2 heterostructures, Adv. Funct. Mater. 25 (2015) 7360
7365 [43] Copyright © 2015 John Wiley and Sons.

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3.3.2 Charge-trap transistor memories Electrets can store charge for long time, and also provide insulating traits. Therefore, an electret layer can act as both floating gate and tunneling layer in CTTM devices (Fig. 3.8A). An electret layer can accumulate charge in impurities, in rough film, or in chemical groups (Fig. 3.8B). Some polymers, small molecules, and 2D inorganic materials that meet the requirements are widely fabricated into CTTMs.

3.3.2.1 Electret layer design Polymers are the commonest electret materials, and have good solubility, so they are suitable for various CTTM devices. A classical polymer electret-structured CTTM is composed of a series of styrinic polymers as the electret layers. When choosing polymer materials as electret layer, the properties of materials should be considered carefully [44]. The electret storing efficiencies of several classical polymers [including polyvinyl alcohol (PVA), PVP, poly(2-vinylpyridine) (PVPyr), PS, poly(4-methylstyrene) (P4MS), (PαMS) and poly(2-vinynaphthalene) (PVN)] increase as the content of the hydrophilic group decreases. The relationship between Vth shifts and the contact angle effect (Fig. 3.9A) demonstrates that this difference in charge
storage capabilities is a consequence of their respective hydrophobicities. Increase in the contact angle between polymer and water indicates increased hydrophobicity, and is generally associated with increase in storage capacity. PVN has the strongest hydrophobicity among the polymers mentioned, so a CTTM that uses a PVN electret shows the largest memory on/off ratio of approximately 106 and largest memory window of approximately 30 V (Fig. 3.9B and C). The k also affects the storage capacity of the electret. To prevent leakage of trapped charge, the thickness of the electret must be increased as its k decreases, but the increase also increases device’s operating voltage and energy consumption. However, as k increases, the load field decreases, so charge load storage capacity decreases. Multilayer design is a feasible method to overcome these limitations. In

Figure 3.8 (A) Typical structure of charge-trapping transistor memory. (B) Diagram of sources of charge trapping.

Memory characteristics and mechanisms in transistor-based memories

65

Figure 3.9 (A) Typical structure of the polymer electret based CTTM devices. (B) Schematic representation of electron-storage efficiency of electret materials estimated from CTTMs characteristics. (C) Relation between ΔVth and hydrophobicity (contact angle). (D) Retention characteristics of CTTMs at VDS 5 -10 V and VGS 5 0 V after programming by application of a gate bias of 70 V at VDS 5 0 V. (E) Reversible ΔVth of CTTM with PVN electrets. Source: K.J. Baeg, Y.Y. Noh, J. Ghim, B. Lim, D.Y. Kim, Polarity effects of polymer gate electrets on non-volatile organic field-effect transistor memory, Adv. Funct. Mater. 18 (2008) 3678
3685 [44] Copyright © 2008 John Wiley and Sons.

a system that uses a bilayer of low-k/high-k, the low-k polymer layer captures and stores large quantities of charges, and the high-k polymer layer can effectively prevent these charges from diffusing back into the channel [45]. In general, the relationship between the chemical properties of polymer dielectric and its charge storage capacity follows these rules. (1) Charge
injection efficiency increases with increases of in the D
A strength of the conjugated main chain and the conjugate length of side chain groups. (2) In star-shaped polymers, k decreases with increase in the number of chain arms. (3) In block-shaped polymers with micellar nanostructures, charge storage capacity decreases as the thickness of the films decreases. Introducing small molecules as impurity is an alternative method to fabricate CTTM due to the independent distribution, small size, and certain conductivity. The most representative small-molecule materials are C60 and its derivatives because their fullerene groups have strong electron-withdrawing capability. A typical CTTM that uses a small-molecule electret consists of a CNT network in the transistor channel, and C60 molecules in a PI barrier layer in the gate (Fig. 3.10A and B) [46]. The unique structure and rehybridization of molecular orbitals in C60 can capture charges and store them for a long time, even after the gate voltage is removed (Fig. 3.10C). The memory effect of this p-type CTTM is a result of a counterclockwise hysteresis loop in the Id
Vg curve. By controlling the number of the various Vg pulses, the charges inside the C60 molecules can be modified quantitatively (Fig. 3.10D and E). This CTTM exhibits a large on/off ratio .104, and extrapolation suggests that charge may be retained for 10 years (Fig. 3.10F). The 2D mica crystal is ultra-thin, ultra-flexible, and ultra-smooth, so it is widely applied in CTTMs as an electret layer (e.g., Fig. 3.11A) [47]. Furthermore, its perfect molecular order provides an ideal fundamental for the growth of the upper semiconductor. The memory device exploits the movement of K1 ions from their original positions into the channel and vice versa to implement the transformation

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Figure 3.10 (A) Schematic structure of nonvolatile CCTM, with a CNT network in the transistor channel, and C60 molecules in a PI barrier layer in the gate. (B) Atomic force microscope image showing a CNT network in the transistor channel. (C) Energy diagrams of the transistor gate under different gate voltage biases (Vg 5 0 V, Vg . 1 V, and Vg , 2 3 V). (D) Change ΔId, of source-drain current as a function of number of positive gate voltage pulses with fixed amplitudes Vg 5 2 V (square), 4 V (circle), 6 V (triangle), and 8 V (reversed triangle). (E) ΔId as a function of the number of negative gate voltage pulses with fixed amplitudes Vg 5 22 V (square), 24 V (circle), 26 V (triangle), and 28 V (reversed triangle). (F) ΔId as a function of time after ΔId was configured to different analog values. Dots, Experimental data; line, extrapolation. Source: B. Cho, K. Kim, C.L. Chen, A.M. Shen, Q. Truong, Y. Chen, Nonvolatile analog memory transistor based on carbon nanotubes and C60 molecules, Small 9 (2013) 2283
2287 [46] Copyright © 2013 John Wiley and Sons.

between the off state and the on state (Fig. 3.11B). The P/E cycle is highly reversible (Fig. 3.11C
E). This CCTM device exhibits a stable on/off current ratio without obvious degradation even after 4 3 103 s.

3.3.3 Ferroelectric field-effect transistor memories Ferroelectric materials have the properties of spontaneous polarizing below a certain temperature, which is called the Curie point [48]. This phenomenon is attributed to the orderly arrangement of ions. Thus, such materials could exhibit obvious hysteresis under a bias electrical field. As an example of the working mechanism, the Ti ion in the PbTiO3 crystal has two stable states, which can be switched by an applied electric field (Fig. 3.12A). The dielectric displacement D and polarization P in each state vary with the electric field E: E5

D2P : εr

(3.4)

Memory characteristics and mechanisms in transistor-based memories

67

Figure 3.11 (A) Schematic diagrams of the 2D mica based CCTM. (B) Sketches of memory device in off state and on state. (C) Cycles of transfer characteristics of both the on and the off states. Output characteristics of (D) on states and (E) off states. Source: X. Zhang, Y. He, R. Li, H. Dong, W. Hu, 2D mica crystal as electret in organic field-effect transistors for multistate memory, Adv. Mater. 28 (2016) 3755
3760 [47] Copyright © 2016 John Wiley and Sons.

where, εr is the relative permittivity of the ferroelectric material. The domain is the basic unit in the polarization process of ferroelectric materials. When placed in a polarization electric field (opposite to the built-in polarization field), the domains of a ferroelectric thin film gradually invert when the depolarization electric field is exerted. Therefore, ferroelectrics could exhibit an electric hysteresis with loops distorted by an amount that corresponds to a remanent polarization Pr. By exploiting this unique property, ferroelectrics have been developed to prepare FeFTMs (Fig. 3.12B). Most of its components are the same as the first two kinds of memory devices. The distinct part is ferroelectric layer that is used as the core.

3.3.3.1 Ferroelectret layer design The first discovered and the most common ferroelectrics are inorganic. Thousands of inorganic ferroelectric materials have been discovered, such as BiFeO3 [49], Pb (Zr, Ti)O3 (PZT) [50], and BaTiO3 [51]. Perovskite Pb(Zr, Ti)O3 is among the most representative inorganic materials used in FeFTMs. By decreasing the thickness of the ferroelectric layer, the switch can change from domains to the overall ferroelectric body, which has a faster response than the traditional switch. In a FeFTM that uses BaTiO3 composed of oxide heteroepitaxy on muscovite (Fig. 3.13A) [52] the gate effect of positive bound charges in the Pup state attracts additional electron carriers into the top AZO layer, and this process causes a strong enough decrease in

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Figure 3.12 (A) Atomic structures of perovskite oxides PbTiO3 in paraelectric (PE) and ferroelectric (FE) phase with upward and downward polarization. (B) Typical structure of FeFTM.

Figure 3.13 (A) Schematic of FeFTM based on Pb(Zr, Ti)O3. (B) Schematic combination of polarization and surface potential, and piezoresponse force microscopy out-of-plane. (C) IDS
VDS output curve and the IDS
VG transfer curve of this FeFTM. (D) Data-retention evolution of drain current in the on state as a function of time after programming at a gate bias of 6 V. (E) Variations of transfer characteristics after 2348 endurance cycles. Source: M.F. Tsai, J. Jiang, P.W. Shao, Y.H. Lai, J.W. Chen, S.Z. Ho, et al., Oxide heteroepitaxy-based flexible ferroelectric transistor, ACS Appl. Mater. Interfaces 11 (2019) 25882
25890 [52] Copyright © 2019 American Chemical Society.

potential energy to cause hysteresis (Fig. 3.13B). The electrical characteristic curves have a large hysteresis, so the on/off current of this FeFTM is .103 (Fig. 3.13C), and it can retain its charge without significant degradation for 2348 cycles and 100 h (Fig. 3.13D and E). The fabrication of such memory devices mainly use

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epitaxial growth by inorganic oxidation. The inorganic materials that can be chosen as ferroelectric layer are limited by the materials of its upper and lower layers due to the requirement for high temperature during fabrication. Polymer ferroelectric materials are good alternatives because they can be prepared at low temperature. At present, the application of organic ferroelectric materials in FeFTMs is mainly focused on poly(vinylidene fluoride) (PVDF) [53], and its copolymer P(VDF-TrFE) [54]. PVDF is a kind of semicrystalline polymer, the crystalline structure and perfection of which depends largely on the crystallization and annealing conditions. PVDF has four different crystallization phase states, that is, α, β, γ, and δ phases, which are distinguished by the configuration and arrangement of molecular chains. Only the β phase can exhibit ferroelectrism. To obtain the PVDF film with β phase, a relatively complex processes should be used, such as changing the configuration of thin film by mechanical stretching. Adding TrFE side chains into PVDF to form P(VDF-TrFE) encourages the film to crystallize in the β phase easily. Increasing the annealing temperature of P(VDF-TrFE) can effectively increase the crystallinity of grains and content of β phase. The glass transition temperature of P(VDF-TrFE) (75%:25%) is approximately 118 C, whereas its normal melting temperature is approximately 140 C, so annealing should be conducted between these temperatures. An FeFTM device with a TGBC structure consisting of Au source/drain electrodes/P3HT/P(VDF-TrFE)/Al gate electrode (Fig. 3.14A) [55] shows standard p-type transistor characteristics with a large hysteresis (Fig. 3.14B and C). By applying various bias voltages, the inversion of different

Figure 3.14 (A) Schematic of TGBC FeFTM with P3HT channel and ferroelectric P(VDFTrFE) insulator. (B) IDS
VDS output plots and (C) IDS
VG transfer curve of this FeFTM. (D) Multilevel IDS
VG transfer curves of the FeFTM after various program VG values. Inset schematic of nonvolatile IDS levels controlled by the ferroelectric polarization at different program gate voltages. (E) Time-dependent retention characteristics and (F) multiple P/E endurance cycles of multilevel IDS values established in an FeFTM. Source: S.K. Hwang, I. Bae, R.H. Kim, C. Park, Flexible non-volatile ferroelectric polymer memory with gate-controlled multilevel operation, Adv. Mater. 24 (2012) 5910
5914 [55] Copyright © 2012 John Wiley and Sons.

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numbers of continuous ferroelectric domain can be precisely controlled, so multilevel data storage can be realized (Fig. 3.14D). This FeFTM exhibits stable fourlevel memory with excellent data retention of .105 s and a multiple P/E endurance of 120 cycles (Fig. 3.14E and F).

3.4

Summary and prospect

With the enrichment of theory, the optimization of fabrication process and the development of novel materials, gratifying progress in TBM has been made. However, the development of information storage technology shows no sign of slowing. Besides the traditional goals, such as increasing integration and reliability, and reducing power consumption and cost, various new requirements have been proposed for “next-generation” intelligent electronic products. The research directions of transistor memory are mainly focused on flexible electronics. Flexibility, stretchability and self-healing capability are the basic attributes of modern electronics for wearable applications. Combining the flexibility with memory devices can broaden the application scope of wearable electronic products, such as electronic skin, implantable prostheses, and soft robots. Three methods are commonly used to implement flexible memory devices [56]. (1) Some special structural designs, including wrinkle structure, wavy structure, and kirigami architecture, would give devices unexpected resilience and mechanical compliance; however, such devices have limited stretchability, so they are only suitable for bending. (2) Introducing additional side chains can also improve the mechanical flexibility of materials, but reduce the crystallinity. (3) Developing intrinsically stretchable materials is the most promising way. Current materials mainly include LD materials and ionic conductive elastomers. At present, the flexible TBMs with low-operating voltage of 5 V, stable P/E endurance of over 103 cycles, and long retention time of several years have been successfully developed. In particular, the working frequency of the radiofrequency (RF) tags based on flexible TBMs have also reached 13.56 MHz. Compared with traditional rigidity TBM devices, the size of flexible ones is relatively large, which is not beneficial to further integration. In the future, the breakthrough in microfabrication of flexible electronics will redefine the relationship between wearable electronics and the human body.

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Two-terminal optoelectronic memory device

4

Xiaoning Zhao, Zhongqiang Wang, Haiyang Xu and Yichun Liu Key Laboratory of UV-Emitting Materials and Technology of Ministry of Education, Northeast Normal University, Changchun, P.R. China

4.1

Introduction

Emerging internet of things and big data applications are extremely demanding in data storage and computation technologies. Historically, advances in existing complementary metal
oxide
semiconductor technology have been driven by aggressive device downscaling. However, with the approaching end of Moore’s law and the obstacle of the von Neumann bottleneck, a number of fundamental and practical issues start to emerge [1]. Both data storage and computing architectures are facing challenges that make them incapable of delivering the growing computing requirement. Today’s computing architectures are facing at least three challenges [2,3]: (1) the memory wall due to the gap between the processor and the memory; (2) the heat wall that the systems cannot operate at high frequencies due to the excessive chip heating; and (3) the end of Moore’s law that field-effect transistor is approaching physical limits to further miniaturization. The complex three-terminal structure of transistor also raises critical issue on integration density. To overcome these challenges, novel device and new computing schemes are eagerly expected with the purpose of meeting the ever-growing requirement of information technology. Regarding device technologies, several two-terminal memory devices have been introduced as suitable alternative to complement transistors. The simple twoterminal structure allows them to be integrated into dense crossbar array capable of high-density integration. These devices include phase change memory, magnetoresistive memory, ferroelectric memory, and memristor (memory 1 resistor) [4
10]. Regarding computing schemes, neuromorphic computing is a promising candidate for the next-generation computing paradigms [11,12]. Brain-inspired neuromorphic computing with the possible combination of data storage and processing is considered as an effective strategy to address the inherent limitations of von Neumann architecture [13
15]. Among these emerging two-terminal memory devices, memristor is promising for data storage and neuromorphic computing with low-power consumption, fast switching speed, and high scalability. Since theoretically proposed in 1971 by Chua [16] and physically developed in 2008 by Hewlett
Packard labs [17], memristor has attracted extensive research efforts. Memristor is usually designed with an electrode/insulator/ electrode sandwich structure and operate with reproducible resistive switching (RS) Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing. DOI: https://doi.org/10.1016/B978-0-12-819717-2.00004-7 © 2020 Elsevier Ltd. All rights reserved.

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characteristics. As depicted in Fig. 4.1, depending on whether the RS is discrete or continuous, memristors can be classified as digital- or analog-type [20]. Digital-type memristor means that the device can be programmed into a low-resistance state (LRS) with SET operation and return to high-resistance state (HRS) under RESET operation [18]. The two distinctive resistance states of digital-type memristor can be used as nonvolatile memory, which is also known as resistive random access memory (RRAM). Analog-type memristor with continuously tunable resistance states resemble biological synapses in that the synaptic weight can be gradually tuned, opening up possibilities for neuromorphic computing applications [19]. Recent research on memristor has explored the use of a variety of external stimuli, such as magnetic field [21], temperature [22], humidity [23], or photoillumination [24] to activate RS behaviors. Among these stimuli choices, photoillumination is particularly attractive because it allows synergistic coupling of electronic, photonic, and ionic processes. The use of light stimuli can expand the application scope of memristor to a variety of optoelectronic applications such as optoelectronic memory, optoelectronic logic operation, visual information sensor, optogenetics-inspired synaptic, etc. In addition, photons have the advantage of high bandwidth and fast

Figure 4.1 Schematic of the classification of memristors and their potential applications for data storage and neuromorphic computing. Source: Reproduced with permission from K.H. Kim, S. Gaba, D. Wheeler, J.M. CruzAlbrecht, T. Hussain, N. Srinivasa, et al., A functional hybrid memristor crossbar-array/ CMOS system for data storage and neuromorphic applications, Nano Lett. 12 (2012) 389
395; S.H. Jo, T. Chang, I. Ebong, B.B. Bhadviya, P. Mazumder, W. Lu, Nanoscale memristor device as synapse in neuromorphic systems, Nano Lett. 10 (2010) 1297
1301 [18,19]. Copyright (2011, 2010) American Chemical Society.

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transmission speed [25]. The combination of photons and memristor may provide a platform for photonic computing to beyond the von Neumann bottleneck. In this chapter, we present an overview of two-terminal optoelectronic memristors, including their microscopic mechanisms and diverse applications. This chapter is organized as follows: in the first section, we introduce the microscopic mechanisms of optoelectronic memristors, including the photomediated interfacial barrier, photoassisted filament formation/dissolution, photomodulated charge trapping/ detrapping, and photoinduced material conformation evolution (Fig. 4.2). In the following section, we discuss the potential applications of optoelectronic memristors in the area of memory and photonic computing. We give selected application examples of optoelectronic memristors on multilevel memory, logic operations, and neuromorphic vision sensors. Then, photoinvolved synaptic functions emulated by optoelectronic memristors are discussed. In the last section, a short discussion on the challenges and perspectives for further development of optoelectronic memristor is presented.

4.2

Microscopic mechanism

For memristor, the RS mechanism depends on not only the electrode and insulating material but also the polarity and amplitude of the applied voltage [31
33]. Generally, the RS mechanism of memristor can be categorized into filamentary type and interfacial type. Filamentary type originates from the formation and dissolution of conductive filaments (CFs) in an insulating layer. The CFs are considered to form through the ion redistribution [34] or charge trapping/detrapping [35] inside the insulator. Depending on the mobile species, the filamentary type memristor can be classified as electrochemical metallization memory (ECM) and valence change memory (VCM). The RS of ECM is associated with an oxidation of the active metal (e.g., Ag, Cu), transport of metal cations through the insulating layer, and reduction at the inert electrode or inside the insulating layer to form CFs. The CFs can dissolve through Joule heating-assisted electrochemical oxidation [36]. The RS of VCM is believed to result from anion migration and redistribution with their positively charged counterparts. For example, oxygen-deficient CFs will form because of oxygen-ion migration in metal oxides [37]. The CFs can dissolve when oxygen vacancies (VO) combine with oxygen ions. For materials with electron traps, the trap can be filled with injected carriers to form a conductive channel, and consequently the injected carriers can move freely. The occupied traps can also discharge electrons and the conductive channel rupture [38]. The interfacial type is associated with the modulation of the interfacial barrier between the insulating layer and the electrode. The barrier change is usually accompanied by charge trapping/detrapping and/or ion migration at the insulating layer near the interface [39,40]. The microscopic mechanism of optoelectronic memristors becomes more complicated when taking photonic, electronic, and ionic processes into consideration. A primary role of photoillumination is generating electron-hole pairs in the insulating

Figure 4.2 Microscopic RS mechanism of optoelectronic memristors. (A, B) Schematic structure and RS mechanism of an ITO/CeO22x/AlOy/Al optoelectronic memristor under light illumination. Source: Reproduced with permission from H. Tan, G. Liu, H. Yang, X. Yi, L. Pan, J. Shang, et al., Light-gated memristor with integrated logic and memory functions, ACS Nano 11 (2017) 11298
11305 [26]. Copyright (2017) American Chemical Society. (C, D) Schematic structure and the CF dissolution process with/without light illumination of the Ag/ CH3NH3PbI3/Ag optoelectronic memristor. Reproduced with permission from X. Zhu, W.D. Lu, Optogenetics-inspired tunable synaptic functions in memristors, ACS Nano 12 (2018) 1242
1249 [27]. Copyright (2018) American Chemical Society. (E) Schematic structure of an optoelectronic memory with a MoS2/h-BN/graphene heterostructure. Reproduced with permission from M.D. Tran, H. Kim, J.S. Kim, M.H. Doan, T.K. Chau, Q.A. Vu, et al., Twoterminal multibit optical memory via van der waals heterostructure, Adv. Mater. 31 (2019) 1807075 [28]. Copyright (2018) Wiley-VCH. (F) Conductive path formation caused by charge trapping in an Al/carbon dots (CDs)-silk/ITO optoelectronic memristor. Reproduced with permission from Z. Lv, Y. Wang, Z. Chen, L. Sun, J. Wang, M. Chen, et al., Phototunable biomemory based on light-mediated charge trap, Adv. Sci. 5 (2018) 1800714 [29]. Copyright (2018) Wiley-VCH. (G) Schematic structure of the Pd/MoOx/ITO optoelectronic memristor. (H) Microscopic mechanism of the Pd/MoOx/ITO optoelectronic memristor measured with light illumination. Reproduced with permission from F. Zhou, Z. Zhou, J. Chen, T.H. Choy, J. Wang, N. Zhang, et al., Optoelectronic resistive random access memory for neuromorphic vision sensors, Nat. Nanotechnol. 14 (2019) 776
782 [30]. Copyright (2019) Springer Nature.

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materials. The generated electron-holes can affect the interfacial barrier [26], CFs formation/dissolution [27], and charge trapping/detrapping [28,29] by the photovoltaic effect and/or photogating effect [25]. Photoillumination is also known as an effective method to induce chemical reactions that modify the RS characteristics of the insulating material [30]. Herein, the microscopic mechanisms of optoelectronic memristors are summarized into four categories as depicted in Fig. 4.2, including the interfacial barrier modulation, filament formation/dissolution, charge trapping/ detrapping, and conformation evolution. These microscopic mechanisms are discussed in detail in the following subsections.

4.2.1 Interfacial barrier It is well known that a barrier will form at the interface between two materials with different Fermi levels and the barrier determines the electrical conduction behavior of the system [41]. During photoillumination, the generated electron-holes can be separated by the built-in potential at the interfaces, leaving behind some charged empty traps to tune the interfacial barrier. Li’s group reported an optoelectronic memristor with an indium tin oxide (ITO)/ CeO22x/AlOy/Al sandwich structure [26,42]. The memristor demonstrates optically SET and electrically RESET characteristics. CeO22x is a promising material for memristor because of its high oxygen-ion mobility. The Al electrode can act as a reservoir to grab oxygen ions during the CeO2 deposition process, therefore a thin AlOy layer (B5 nm) and oxygen-deficient CeO22x will form near the CeO2/Al interface (CeO22x/AlOy/Al). The AlOy can serve as an insulating barrier at the CeO22x/ AlOy/Al junction to suppress the leakage current. As depicted in Fig. 4.3A, in the SET process, electrons trapped in CeO22x can be excited with photoillumination and drifted away from the interface region by the build-in electric field. The remaining ionized oxygen vacancy will reduce the Schottky barrier and subsequently enhanced carrier tunneling through the interface. The optical SET process is achieved. In the RESET process, electrons will be injected and captured by trapping sites with reverse voltage polarity. The barrier then recovers to the initial state and the memristor is RESET to the HRS. The memristor also show light intensity- and light wavelength-dependent RS characteristics. As the illumination intensity increase, more charged VOs will accumulate at the interface and the device can be SET to a much lower resistance level. CeO22x is also known as a photosenstive material with wide response range due to the defect energy level in the bandgap. The memristor also shows broadband response to the light and a lower resistance can be obtained with decreasing the wavelength from 638 to 499 nm. Inspired by such a memristor, they then simplify the device structure to a simple ITO/Nb-doped SrTiO3 (NSTO) heterojunction [43]. The Schottky barrier at the ITO/NSTO interface makes the memristor stay in a HRS. The barrier can be reduced with electron detrapping from traps by photoillumination (Fig. 4.3B). The empty traps are metastable and can be neutralized by capturing electrons from the SrTiO3. Therefore the device resistance decreases continuously with light illumination and increases gradually when the light is off. The responsive efficiency of the memristor can be enhanced/suppressed by

Figure 4.3 Photocontrolled interfacial barrier of optoelectronic memristors. (A) Schematic illustration of the energy band diagram of the ITO/CeO22x/AlOy/Al memristor with electrically SET operation (left), and light illumination (right). Source: Reproduced with permission from H. Tan, G. Liu, H. Yang, X. Yi, L. Pan, J. Shang, et al., Light-gated memristor with integrated logic and memory functions, ACS Nano 11 (2017) 11298
11305 [26]. Copyright (2017) American Chemical Society. (B) Schematic evolution of the ITO/NSTO Schottky barrier with photoillumination and negative voltage application. Reproduced with permission from S. Gao, G. Liu, H. Yang, C. Hu, Q. Chen, G. Gong, et al., An oxide Schottky junction artificial optoelectronic synapse, ACS Nano 13 (2019) 2634
2642 [43]. Copyright (2019) American Chemical Society. (C) Photoassisted RS mechanism of Au/ CH3NH3PbI32xClx/FTO memristor. (D) Effect of light intensity on the SET processes of the Au/CH3NH3PbI32xClx/FTO memristor. Reproduced with permission from F. Zhou, Y. Liu, X. Shen, M. Wang, F. Yuan, Y. Chai, Low-voltage, optoelectronic CH3NH3PbI3 2 xClx memory with integrated sensing and logic operations, Adv. Funct. Mater. 28 (2018) 1800080 [44]. Copyright (2018) Wiley-VCH. (E, F) Schematic illustration of the evolution of ZnO/NSTO heterojunction under the UV light illumination and the RS behaviors under various conditions (A,B: Before illumination; during illumination; C,E: 30 min, 1 h, and 1 day after turning off the light). Reproduced with permission from A. Bera, H. Peng, J. Lourembam, Y. Shen, X.W. Sun, T. Wu, A versatile light-switchable nanorod memory: wurtzite ZnO on perovskite SrTiO3, Adv. Funct. Mater. 23 (2013) 4977
4984 [45]. Copyright (2018) Wiley-VCH.

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applying positive/negative voltage on the ITO electrode. The modulation mechanism is associated with combined effects of oxygen migration and electron trapping/ detrapping. As shown in Fig. 4.3B, a positive voltage applied on ITO can drift oxygen ions from NSTO to ITO, leaving more oxygen vacancies at the interface. The photoresponsive efficiency will be enhanced. While negative voltage will drift oxygen ions from ITO to NSTO, leading to fewer VOs at the interface. The photoresponsive efficiency is then suppressed. Guo’s group also developed a memristor with a structure of ITO/ZnO12x/AlOy/Al structure [46]. Under ultraviolet (UV) light illumination, the photogenerated holes can be trapped in the AlOy layer. The trapped holes can move back across the interfacial barrier under thermal excitation, resulting in a persistent photoconductivity effect. Organic
inorganic hybrid perovskites (OHPs) are attracting growing attention because of their excellent light absorption, long carrier diffusion length, and high charge carrier mobility [47]. The mixed electronic
ionic conduction characteristic of OHPs also endows them with potential application for memristor [48,49]. Chai’s group developed an OHP-based optoelectronic memristor with the structure of Au/ CH3NH3PbI32xClx/fluorine-doped tin oxide (FTO) [44]. The proposed RS mechanism is shown in Fig. 4.3C, Schottky barrier can form at the CH3NH3PbI32xClx/Au interface due to their difference in Fermi level. The RS of the memristor can be attributed to the reduction of Schottky barrier through holes injection from Au electrode to CH3NH3PbI32xClx. Under light-illumination, electron
hole pairs generated in the CH3NH3PbI32xClx can be separated with the applied bias. The holes can be trapped near the Au/CH3NH3PbI32xClx interface, contributing to the reduction of Schottky barrier. Therefore the SET voltage is decreased with white light-illumination (Fig. 4.3D). Besides the metal/semiconductor contacts, some semiconductor heterojunction also show phototunable RS characteristics. Wu’s group developed a memristor with ZnO/NSTO heterojunction [45]. The RS of the memristor is proposed as reduction of the interface energy barrier through oxygen migration. As shown in Fig. 4.3E, VOs in ZnO can be drifted into the ZnO/NSTO interface region and be trapped there to reduce the energy barrier. The device is SET to LRS. The VOs can be drifted away from the interface with negative voltage applied on ZnO, recovering the depletion layer and RESET the device back to the HRS. The RS of the memristor disappear under UV light-illumination and recover after turning off the UV light for one hour (Fig. 4.3F). Therefore, the operating mechanism of this heterojunction is associated with both the photogenerated carriers and ionized defects that migrate to the junction region under the applied electrical field.

4.2.2 Filament formation/dissolution The CFs formation and dissolution in memristor can be described as ion migration among localized states separated by energy barriers, which is driven by the electric field and joule heating. Materials with photosensitive ion migration have been proposed to develop optoelectronic memristors. Previously, RS has been observed experimentally in CH3NH3PbI3 films. It has been verified that iodide ion (I2) is mobile under an electric field and the RS effect

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is caused by the formation/dissolution of CFs with high concentrations of iodine vacancy (VI) [50]. The VI in CH3NH3PbI3 under light illumination is unstable, which can be developed to tune the RS characteristics. Lu’s group developed an optoelectronic memristor with a planar Ag/CH3NH3PbI3/Ag structure [27]. During RS, the Ag electrode can behave as reservoir to store I2s. The operation mechanism of the memristor is shown in Fig. 4.4A, where VI-rich CFs is formed to connect the

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Figure 4.4 Photoassisted CFs formation/dissolution in optoelectronic memristors. (A) Schematic illustration of light-inhibited CF formation (upper) and light-accelerated CF dissolution (lower) in Ag/CH3NH3PbI3/Ag memristor. (B, C) The current
voltage characteristics and the potentiation curves of the memristor measured at different illumination intensities. Source: Reproduced with permission from X. Zhu, W.D. Lu, Optogenetics-inspired tunable synaptic functions in memristors, ACS Nano 12 (2018) 1242
1249 [27]. Copyright (2018) American Chemical Society. (D, E) The SET and RESET process of Ag/CH3NH3PbI3/Au memristor at different illumination intensities. Reproduced with permission from X. Zhu, J. Lee, W.D. Lu, Iodine vacancy redistribution in organic
inorganic halide perovskite films and resistive switching effects, Adv. Mater. 29 (2017) 1700527 [50]. Copyright (2017) Wiley-VCH. (F, G) Schematic illustration of the CF formation process and the change of VI activation energy in Ag/CH3NH3PbI3/ITO memristor with/without light illumination. Reproduced with permission from S. Ham, S. Choi, H. Cho, S.-I. Na, G. Wang, Photonic organolead halide perovskite artificial synapse capable of accelerated learning at low power inspired by dopamine-facilitated synaptic activity, Adv. Funct. Mater. 29 (2019) 1806646 [51]. Copyright (2018) Wiley-VCH. (H, I) Energy diagram and the CF formation process of the ITO/poly(methyl methacrylate)/CsPbBr3/poly(methyl methacrylate)/Ag memristor with/ without UV illumination. Reproduced with permission from Y. Wang, Z. Lv, Q. Liao, H. Shan, J. Chen, Y. Zhou, et al., Synergies of electrochemical metallization and valance change in all-inorganic perovskite quantum dots for resistive switching, Adv. Mater. 30 (2018) 1800327 [52]. Copyright (2018) Wiley-VCH. (J) Schematic illustration of the initial state and the Ag CFs formation/dissolution process under light illumination. Reproduced with permission from Y. Wang, J. Yang, Z.P. Wang, J.R. Chen, Q. Yang, Z.Y. Lv, et al., Near-infrared annihilation of conductive filaments in quasiplane MoSe2/Bi2Se3 nanosheets for mimicking heterosynaptic plasticity, Small 15 (2019) 1805431 [53]. Copyright (2019) Wiley-VCH.

two electrodes. Light illumination accelerates the recombination of VIs with I2s, causing the CFs to become unstable and tend to rupture spontaneously. Therefore the conductance increase rate is apparently suppressed and the conductance decrease rate is apparently enhanced with increasing the illumination intensity (Fig. 4.4B and C). They also developed a memristor with vertical Ag/CH3NH3PbI3/ Au structure [50]. The SET voltage increases and the RESET voltage decreases with increasing light intensity (Fig. 4.4D and E). Recently, Wang’s group reported an opposite phenomenon that light illumination can enhance conductance increase rate [51]. This contradiction may originate from the directional difference between the CF growing and the photogenerated electric field. As shown in Fig. 4.4F, the photogenerated electron
hole pairs can be separated by the different built in electric field at the interfaces between Ag/CH3NH3PbI3 and ITO/CH3NH3PbI3. The photogenerated electric field could have the same direction as the applied electric field. The enhanced electric field could reduce the energy barrier for I2 migration (Fig. 4.4G). Also, the I2 migration barrier could be lowered because of lattice expansion or weakening Pb
I bond strength in the CH3NH3PbI3 film caused by photoinduced carriers [51].

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Han’s group reported an inorganic perovskite quantum dots (CsPbBr3 QDs)based optoelectronic memristor that operated through synergistic of ECM and VCM mechanisms [52]. The device has a structure of ITO/poly(methyl methacrylate)/CsPbBr3/poly(methyl methacrylate)/Ag. Coexistence of Ag CFs and bromine vacancy (VBr) CFs is found to be responsible for the RS. Under light illumination, the SET/RESET voltages and HRS values can be reduced. The operation mechanism can be attributed to the photovoltaic effect (Fig. 4.4H and I). Upon light illumination, electron-hole pairs are generated in CsPbBr3 QDs and drifted toward the electrodes in opposite directions to induce an electrical field. In addition, the separated electrons and holes could be further trapped by CsPbBr3 QDs to produce an additional internal electrical field. Therefore, more Ag ions and VBr will be drifted into the RS layer to form large-sized CFs. The photogenerated holes could also help to dissolve the Ag CFs. Recently, the same group also developed an optoelectronic memristor consisting of an MoSe2/Bi2Se3 bilayer [53]. Bi2Se3 is a topological insulator with a very small band gap (0.15
0.3 eV) in the mid-infrared (NIR) range. The memristor shows unusual RESET behavior with near-NIR light illumination. The photogenerated electron-hole pairs can be separated at the MoSe2/ Bi2Se3 heterojunction interface and the electrons can be trapped in MoS2. The untrapped holes can promote the oxidation of Ag atoms to Ag1 cations, the CFs can be dissolved consequently (Fig. 4.4J). Analogous phenomenon was also observed in a memristor with solution-processed copper phthalocyanine nanowires (N-CuMe2Pc NWs) by the same group [54]. The injection of photogenerated holes into the Ag electrode enhances the potential barriers between the N-CuMe2Pc NWs film and the Ag electrode, which hinder the formation of Ag CFs. On the other hand, photoconductive molecular such as N,N0 -diheptylperylenetetracarboxylic diimide possess the ability to promote CFs formation under light illumination [55].

4.2.3 Charge trapping/detrapping The charge carriers injected from the electrodes and/or generated in the active layer through photoillumination may be trapped in the insulating layer. The charged carriers can affect the electrical transport process, thereby modulating the RS characteristics. Han’s group developed an optoelectronic memristor with a structure of Al/ CDs
silk protein/ITO [29]. The memristor shows phototunable RS characteristics that the SET voltage can be reduced with increasing UV light intensity (Fig. 4.5A and B). The mechanism can be attributed to the enhanced charge trapping capacity by light illumination. By applying a SET voltage, the injected carriers will be trapped in the carbon CDs. In this case, a high voltage is needed to fill up the traps. With UV light illumination, the photogenerated electrons can be trapped by the CDs, thereby reducing the SET voltage. They also developed memristor with MoS2
NaYF4:Yb31, Er31 upconversion nanoparticles (UCNPs) nanocomposites [57]. The MoS2
UCNPs can act as both NIR sensitizer and carrier generation/separation centers. Under NIR light illumination, the UCNPs can emit visible light to generate carrier in MoS2. The photogenerated carriers will reduce the Schottky

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Figure 4.5 Photomodulated charge trapping/detrapping in optoelectronic memristors. (A, B) Schematic illustration of conductive channel formation process and the current
voltage characteristic of Al/CDs
silk/ITO memristor at different light intensities. Source: Reproduced with permission from Z. Lv, Y. Wang, Z. Chen, L. Sun, J. Wang, M. Chen, et al., Phototunable biomemory based on light-mediated charge trap, Adv. Sci. 5 (2018) 1800714 [29]. Copyright (2018) Wiley-VCH. (C) Schematic illustration of the electronic structure and carrier behavior of silicon (Si) nanocrystals (NCs). (D) The memristor with Si-NCs stimulated by light. Reproduced with permission from H. Tan, Z. Ni, W. Peng, S. Du, X. Liu, Y. Xu, et al. Broadband optoelectronic synaptic devices based on silicon nanocrystals for neuromorphic computing, Nano Energy 52 (2018) 422
430 [56]. Copyright (2018) Elsevier. (E) The operation mechanism of the device with MoS2/h-BN/ graphene heterostructure. Reproduced with permission from M.D. Tran, H. Kim, J.S. Kim, M.H. Doan, T.K. Chau, Q.A. Vu, et al., Two-terminal multibit optical memory via van der waals heterostructure, Adv. Mater. 31 (2019) 1807075 [28]. Copyright (2018) Wiley-VCH.

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barrier and therefore a high-LRS current is obtained by increasing the light illumination intensity. Yang’s group demonstrated a photostimulated memristor with Si NCs [56]. The dangling bonds existing at the surface of Si NCs can introduce energy levels near the conduction band (Fig. 4.5C). With NIR photoillumination, part of the photogenerated electrons will recombine with holes immediately, while part of them can be trapped by the in-gap states. The trapped electrons could later release to the conduction band through thermal fluctuation gradually, giving excitatory postsynaptic current (PSC). Thereby the memristor can be stimulated by light (Fig. 4.5D). The memristor can be programmed with a broad wavelength region from the UV to NIR due to the broadband optical absorption of Si NCs heavily doped with B. It is also noted that the aforementioned optoelectronic memristor use NIR light is of practical significance because light signals in optical communication is usually in the NIR region.

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Figure 4.6 Photoinduced material conformation evolution of optoelectronic memristors. (A) Light-involved RS mechanism of the Pd/MoOx/ITO memristor. (B, C) X-ray photoelectron spectrum profile of Mo 3d core level for the MoOx layer before and after UV illumination. Source: Reproduced with permission from F. Zhou, Z. Zhou, J. Chen, T.H. Choy, J. Wang, N. Zhang, et al., Optoelectronic resistive random access memory for neuromorphic vision sensors, Nat. Nanotechnol. 14 (2019) 776
782 [30]. Copyright (2019) Springer Nature. (D) Schematic illustration of BMThCE-based memristor and the chemical structures of the oBMThCE and c-BMThCE. (E, F) RS characteristics of the o-BMThCE- and c-BMThCEbased memristor. Reproduced with permission from H.F. Ling, K.M. Tan, Q.Y. Fang, X.S. Xu, H. Chen, W.W. Li, et al., Light-tunable nonvolatile memory characteristics in photochromic RRAM, Adv. Electron. Mater. 3 (2017) 1600416 [60]. Copyright (2017) WileyVCH. (G) Schematic diagram of the planar graphene/SiO2 memristor and the electrical/optical measurements. (H, I) The light emission spectra of the memristor in LRS/HRS and schematic diagram of the related mechanism. Reproduced with permission from C. He, J. Li, X. Wu, P. Chen, J. Zhao, K. Yin, et al., Tunable electroluminescence in planar graphene/SiO2 memristors, Adv. Mater. 25 (2013) 5593 [61]. Copyright (2013) Wiley-VCH. (J) Schematic illustration of the photocatalytic reduction mechanism of GO-TiO2 nanocomposite. (K, L) The FORMING/RS curve of the Al/GO-TiO2/ITO memristor with different light irradiation time and comparison of its SET voltage with those of reported GO-based memristors. Reproduced with permission from X. Zhao, Z. Wang, Y. Xie, H. Xu, J. Zhu, X. Zhang, et al., Photocatalytic reduction of graphene oxide-TiO2 nanocomposites for improving resistiveswitching memory behaviors, Small 14 (2018) 1801325 [62]. Copyright (2018) Wiley-VCH.

Two-dimensional van der Waals heterostructures are attracting growing attention in developing photodetectors, solar cells, and light emitting diodes. Recently, memory devices with this new materials system have also been developed by Miao’s group [58] and Zhou’s group [59] with excellent performance such as good thermal stability and ultrahigh-speed writing operations. Lee’s group developed twoterminal optical memory device with MoS2/hexagonal boron nitride (h-BN)/graphene heterostructure [28]. As depicted in Fig. 4.5E, the charge carriers can tunnel through the h-BN layer to the graphene layer under the large bias between the two electrodes. The electrons can be confined in the graphene layer and electron tunneling between the electrodes is prohibited. With light illumination, the photogenerated electrons are trapped in the MoS2 and the photogenerated holes can tunnel through MoS2/h-BN to the graphene layer. The confined electronics in graphene layer could be neutralized. The device therefore can be programmed by both light and electrical stimuli.

4.2.4 Conformation evolution Photoirradiation can induce chemical reactions that can modulate the conformation of a material. In memristors, the RS characteristics are closely related to the conformation of active layer. Recently, Chai’s group developed two-terminal optoelectronic memristor with a structure of Pd/MoOx/ITO [30]. As depicted in Fig. 4.6A, electron
hole pairs are

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generated in the MoOx film with UV light illumination from the ITO side. The holes can react with absorbed water molecules to produce H1 ions. The electrons and the H1 ions can lead to a reduction of the Mo ions from 61 to 51 and form conductive HyMoOx (Fig. 4.6B and C). The device can be switched to LRS by forming percolating conduction network of HyMoOx. The H1 ions also can be extracted from the MoOx layer by the electric field. The Mo ions then changes from 51 back to 61, leading to the transition from LRS to HRS. As a result, a light intensity- and electrical field-dependent RS can be achieved. Such an optoelectronic memristor enable integrated image sensing, memory, as well as neuromorphic visual preprocessing, which will be presented in the following section. As a well-known photochromic molecules, diarylethenes (DAEs) can transform reversibly between the ring-open and -closed isomers, accompanied by the reversible changes of optoelectronic characteristics. Huang’s group developed an optoelectronic memristor with DAE derivative (BMThCE) as the active layer [60]. The RS is associated with trap-assisted electron tunneling through the charge-filled traps. A reversible photochromism between ring-open state (namely o-BMThCE) and ring-closed state (namely c-BMThCE) can be achieved by ultraviolet and visible light irradiation, respectively (Fig. 4.6D). Light-induced transformation between these conformational structures can cause a change of occupied molecular orbital (HOMO) and lowest unoccupied molecular orbital (LUMO) energies. The HOMO of o-BMThCE (25.32 eV) is lower than that of c-BMThCE (24.95 eV) molecules. The holes trapped in deeper trapping sites cannot release due to the larger barrier between o-BMThCE and ITO. Therefore write-once-read-many characteristic and reproductive RS can be observed with o-BMThCE and c-BMThCE, respectively. Zhang’s group developed a planar Graphene/SiO2 memristor with tunable electroluminescence characteristic (Fig. 4.6G) [61]. The memristor show unipolar RS characteristics that the device can be SET and RESET with the same bias polarity. Interestingly, the light emission peak is centered at 770 and 550 nm in LRS and HRS (Fig. 4.6H), respectively. An order enhancement of the electroluminescence amplitude of LRS than that for HRS is observed. The RS mechanism is associated with the changing of Si NCs size and the gap distance between these nanocrystals. In LRS, Si NCs with larger size and smaller distance between each other are observed. The tunable electroluminescence characteristic is related with the bandgap of the Si NCs, which is highly dependent on their size. Intensity-modulated light-emitting device was also developed through integrating p-GaN/n-ZnO heterojunction with memristor by Xu’s group [63]. Graphene oxide (GO) has been highlighted as a promising material for flexible memristors. However, issues on RS performance including high FORMING/SET voltages and high RS variability still remain. The structure of GO can be considered to consist of isolated reduced graphene oxide (RGO) sp2-hybridized domains embedded in a continuous sp3-hybridized matrix. The RS mechanism of GO is associated with the formation of conductive channels through oxygen migration. Liu’s group proposed a TiO2-assisted photocatalytic reduction strategy to eliminate the FORMING process and improve the RS performance [62]. As depicted in Fig. 4.6J, with UV light irradiation, the photocatalytic reaction at the surface of

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TiO2 nanoparticles can dissociate oxygen functional groups and enlarge the RGOdomain size. The enlargement of RGO-domains can reduce the oxygen migration barrier and enhance the local electric field. As a result, the FORMING process is eliminated and a lowest SET voltage among the ever reported GO-based memristors is achieved (Fig. 4.6K and L). Such a mild “photoforming” strategy is highly desirable for developing high-performance memristors. The modulation of RGO-domain and Si NC size can be classified into photoinduced conformation evolution. Huang et al. reported that light can induce ions/vacancies redistribution within CH3NH3PbI3 layer to form a p
i
n homojunction [64]. The Schottky barrier between the electrode and the CH3NH3PbI3 layer can be modulated, thereby contributing to the memristive effect. This could also pave a way to develop optoelectronic memristors.

4.3

Optoelectronic memristor for memory and photonic computing

4.3.1 Multilevel storage Multilevel storage in a single cell can significantly enhance the storage density without affecting scalability [65]. Generally, multilevel resistance states can be realized in memristors with different CF size by adjusting the compliance current and/ or voltage amplitude. Taking advantage of photosensitive nature of optoelectronic memristors, light could also be used to obtain multilevel resistance states with different intensity and wavelength. Wu’s group reported a memristor with Au/MAPbBr3/ITO structure [66]. With light illumination, the photogenerated carriers in MAPbBr3 layer can give rise to photocurrent across the junction between MAPbBr3/ITO. Both of the LRS and HRS values can be reduced. The carriers trapped in the interfacial region can reduce the barrier, giving rise to different LRS states by changing the intensity (Fig. 4.7A). In the memristor with MoS2
NaYF4:Yb31 as developed by Han et al., at least five resistance states were obtained by changing the NIR intensity (Fig. 4.7B) [57]. The light in NIR region is usually used in optical communication [67]. The work opens up a novel way to develop high-density data storage system for photonic computing. Beyond the light intensity-dependent multilevel RS, the RS of ITO/CeO22x/ AlOy/Al memristor proposed by Li et al. can be modulated by both light intensity and light wavelength [42]. Three different resistance states can be obtained with red, green, and blue light. All of the resistance states demonstrate excellent endurance and retention characteristics (Fig. 4.7C and D). Due to the accumulation effect as shown in Fig. 4.3A, multilevel resistance states can also be obtained with different light illumination intensity (Fig. 4.7E and F). The optoelectronic memristors with multilevel resistance states offer advantage of high-density information storage. Also the memristor is capable of distinguishing the wavelength and intensity information of the light through resistance states and storing them simultaneously.

Figure 4.7 Multilevel storage of optoelectronic memristors. (A) Multilevel LRS and HRS obtained in Au/MAPbBr3/ITO memristor with different light intensities. Source: Reproduced with permission from X. Guan, W. Hu, M.A. Haque, N. Wei, Z. Liu, A. Chen, et al., Light-responsive ion-redistribution-induced resistive switching in hybrid perovskite Schottky junctions, Adv. Funct. Mater. 28 (2018) 1704665 [66]. Copyright (2017) Wiley-VCH. (B) Multilevel resistances realized in the MoS2
NaYF4:Yb31 memristor with different light intensities. Reproduced with permission from Y.B. Zhai, X.Q. Yang, F. Wang, Z.X. Li, G.L. Ding, Z.F. Qiu, et al., Infrared-sensitive memory based on direct-grown MoS2upconversion nanoparticle heterostructure, Adv. Mater. 30 (2018) 1803563 [57]. Copyright (2018) Wiley-VCH. (C
F) Multilevel resistances and their endurance characteristics of ITO/ CeO22x/AlOy/Al memristor with different light wavelength and light intensity. Reproduced with permission from H. Tan, G. Liu, X. Zhu, H. Yang, B. Chen, X. Chen, et al., An optoelectronic resistive switching memory with integrated demodulating and arithmetic functions, Adv. Mater. 27 (2015) 2797
2803 [42]. Copyright (2015) Wiley-VCH.

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4.3.2 Logic operations Logic operation is one of the most basic and important functions in integrated circuit. In optoelectronic memristors, the applied voltage and light signals can behave as two independent inputs to realize optical and electrical-mixed logic operations. Taking advantages of optical- and electrical-controlled RS, Li et al. developed logic operation with the ITO/CeO22x/AlOy/Al memristor [26]. The memristor show optical/electricalSET and electrical-RESET characteristics. Fig. 4.8A
C demonstrate the realization of “AND” and “OR” logic operation. By choosing appropriate boundary between “0” and “1,” the memristor stimulated by a light pulse switches to an “OR” gate, where the logical “0” can be obtained only when both the optical and electrical inputs are absent. Otherwise, the output will be logical “1.” After an electrical-reset process, the “OR” gate switches to the “AND” gate. The logical “1” can be obtained only when both the optical and electrical inputs are present. The Au/CH3NH3PbI32xClx/FTO memristor proposed by Chai et al also enables “AND” and “OR” logic operation with hybrid stimulation of light pulses and electrical pulses (Fig. 4.8D and E) [44]. By correctly selecting the input pulses, the output states can be stably stored in the memristor, suggesting a nonvolatile logic operation. They also developed coincidence event detection by one optical pulse applied on the Au electrode and two electrical pulse applied on the Au and FTO electrode. The memristor can only switches to LRS when the three pulses appear simultaneously (Fig. 4.8F). Over all, the integration of memory and logic operation in optoelectronic memristors offers a feasible way to reduce the complexity of the integrated circuits and help to avoid von Neumann bottleneck.

4.3.3 Vision sensors Vision is an important source for human to access information from the external world. Inspired by it, artificial visual systems with electronic devices including photodetectors, memory unit, and processing unit have been developed [68,69]. However, such systems present challenges in terms of high-energy consumption and complex integration. Optoelectronic memristor with multiple functions of light sensing, memory, and computing offer the possibility for developing efficient artificial visual system. Shen’s group developed a flexible visual memory system integrating volatile UV photodetector with nonvolatile memristor with the aim of memorizing the detected image information (Fig. 4.9A) [70]. The system has a structure of Ni/In2O3/Ni/ Al2O3/Au where In2O3 is act as UV light-sensitive material and Al2O3 act as active layer for memristor (Fig. 4.9B). With UV light illumination, the resistance reduction in Ni/In2O3/Ni sensor leads to an increase of voltage on the Ni/Al2O3/Au memristor, leading to RS of memristor from HRS to LRS and the light information is stored in the memristor (Fig. 4.9C). The system arrays can demonstrate basic functions of a butterfly image sensing and memory where the devices exposed to the butterfly-like patterned light are switched to LRS (Fig. 4.9D and E). The image information can retain for 1 week and erase with voltage for multicycle usage due to the nonvolatile and reproducible nature of the memristor.

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Figure 4.8 Logic operations of optoelectronic memristors. (A
C) “AND” and “OR” logic operation of ITO/CeO22x/AlOy/Al memristor. Source: Reproduced with permission from H. Tan, G. Liu, H. Yang, X. Yi, L. Pan, J. Shang, et al., Light-gated memristor with integrated logic and memory functions, ACS Nano 11 (2017) 11298
11305 [26]. Copyright (2017) American Chemical Society. (D
F) Logic operations and coincidence detection of Au/CH3NH3PbI32xClx/FTO memristor. Reproduced with permission from F. Zhou, Y. Liu, X. Shen, M. Wang, F. Yuan, Y. Chai, Low-voltage, optoelectronic CH3NH3PbI3 2 xClx memory with integrated sensing and logic operations, Adv. Funct. Mater. 28 (2018) 1800080 [44]. Copyright (2018) Wiley-VCH.

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Figure 4.9 Flexible visual memory system integrating a volatile UV photodetector with an optoelectronic memristor. (A) Schematic illustration of the human visual system. (B, C) Schematic illustration of the image sensor and its RS characteristics of the sensor with/ without UV light illumination. (D, E) Image detecting and memorizing characteristics of the visual memory arrays. Source: Reproduced with permission from S. Chen, Z. Lou, D. Chen, G. Shen, An artificial flexible visual memory system based on an UV-motivated memristor, Adv. Mater. 30 (2018) 1705400 [70]. Copyright (2018) Wiley-VCH.

Optoelectronic memristor with light wavelength- and/or intensity-sensitive RS characteristics can enable light sensing, memory and processing in one cell. Li et al. demonstrated optical signal detecting, information processing, and memorizing functions in their ITO/Nb:SrTiO3 heterojunction memristor (Fig. 4.10A) [43]. As shown in Fig. 4.10B, the information of light wavelength and intensity can be recorded by the output current. Moreover, they found that the photoresponsive efficiency can be improved by applying

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Figure 4.10 Visual information detecting and memorizing with optoelectronic memristors. (A) Schematic illustration of human visual system and the ITO/NSTO heterojunction memristor. (B) Detecting and memorizing of optical information with different wavelength and intensities. Source: Reproduced with permission from S. Gao, G. Liu, H. Yang, C. Hu, Q. Chen, G. Gong, et al., An oxide Schottky junction artificial optoelectronic synapse, ACS Nano 13 (2019) 2634
2642 [43]. Copyright (2019) American Chemical Society. (C, D) The response current of MoSe2/Bi2Se3 heterostructure memristor under NIR light illumination with different intensities. (E) Schematic illustration of visual information detecting and memorizing operation. Reproduced with permission from Y. Wang, J. Yang, Z.P. Wang, J.R. Chen, Q. Yang, Z.Y. Lv, et al., Near-infrared annihilation of conductive filaments in quasiplane MoSe2/Bi2Se3 nanosheets for mimicking heterosynaptic plasticity, Small 15 (2019) 1805431 [53]. Copyright (2019) Wiley-VCH.

an external voltage. Han et al. realized visual information detecting and memorizing with MoSe2/Bi2Se3 heterostructure [53]. When the current stimulated by electrical pulse reaches saturation station, the depression can be achieved with NIR light illumination (Fig. 4.10C and D). The synergetic effect of the electricity and light enable the memristor to record pattern with different shape (Fig. 4.10E).

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Recently, Chai et al. achieved image sensing, memorization and real-time preprocessing in an 8 3 8 Pd/MoOx/ITO memristive array (Fig. 4.11A and B) [30]. The image memorization and preprocessing operation is demonstrated in Fig. 4.11C
E. The conductance of the memristor with UV light illumination through F- and L-shaped masks increases (Fig. 4.11C and D), suggesting the image memory capability of the memristor. The main feature of an image can be highlighted and the image contrast can be enhanced after repeated training operation (Fig. 4.11E), demonstrating the image preprocessing capability of the memristor. In human visual system, the received information by the retina will transport through optic nerves and be processed in the visual cortex (Fig. 4.11F). The memristors with image training and recognition functions are also employed to mimic the human retina (Fig. 4.11G). As compared in Fig. 4.11H, the feature of three letters is highlighted and the background noise is smoothed with the memristor processing. The image recognition rate and efficiency are improved with the use of the memristor (Fig. 4.11I). Optoelectronic memristor with integrated photo detection, memory, and processing functions provides great potential for mimicking human visual system. These memristors also offer new opportunities for the development of visual sensor and memory toward applications on future intelligent equipment.

4.4

Optoelectronic memristor for emulating synaptic functions

Inspired by the human brain, neuromorphic systems are expected to pave the way to overcome the von Neumann bottleneck. Neuromorphic computing systems developed with software running on conventional computers have low efficiency in terms of integration and energy consumption. The search for alternative architectures to realize efficient neuromorphic components is indeed an area of intense research [58,71
74]. Artificial synapse that can emulate synaptic plasticity of biological synapses is one efficient way to realize this goal. The two-terminal memristor bear much resemblance to biological synapse in structure and function [14,75
88]. The RS of memristor simulated by electrical pulses can be utilized to imitate the modulation of the synaptic weight by stimulus. With memristor, learning/forgetting behaviors and several representative synaptic characteristics have been realized. Furthermore, biological neuron can be stimulated not only by an electrical pulse but also with light. Recently, many lightstimulated transistors have been developed as photonic synapses [89
91]. In optoelectronic memristor, the use of light as an additional stimulus may provide another degree of freedom to tune their synaptic plasticity.

4.4.1 Photoactivated synaptic functions A synapse can be defined as the interconnection between the presynaptic and postsynaptic neurons. The connection strength of a synapse, which is termed as synaptic

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Figure 4.11 Neuromorphic vision sensing with optoelectronic memristors. (A, B) Schematic structure and SEM image of an 8 3 8 memristor array. (C, D) Image memory of letter F and letter L. (E) Enhancing the image contrast by inputting the image for 100 times. (F, G) Schematics of the human visual system and an artificial neuromorphic visual system with optoelectronic memristors. (H, I) Simulation results of image before and after processing with the Pd/MoOx/ITO memristors and the image recognition rate with/without the memristor. Source: Reproduced with permission from F. Zhou, Z. Zhou, J. Chen, T.H. Choy, J. Wang, N. Zhang, et al., Optoelectronic resistive random access memory for neuromorphic vision sensors, Nat. Nanotechnol. 14 (2019) 776
782 [30]. Copyright (2019) Springer Nature.

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weight, can be precisely modified according to the activities of pre- and postsynaptic neurons. The modification of the synaptic weight is called as synaptic plasticity, which is considered as the biological foundation of learning, forgetting, and memory. Inspired by light-assisted dopamine-accelerated learning in real neuronal system (Fig. 4.12A), Wang et al. developed a photonic synapse with an Ag/CH3NH3PbI3/ ITO memristor of which the synaptic plasticity could be modulated by light stimuli [51]. The PSC in the postneuron is directly proportional to the synaptic weight. As described in Fig. 4.4F, light illumination can promote the Ag ion migration through photogenerated electrical field. The effect of light on the synaptic plasticity was investigated by monitoring the evolution of PSC in real time with and without light illumination. With 0.15 V input electrical pulse, the generated PSC returns to its initial value, demonstrating short-term potentiation (STP). The PSC value can be enhanced with light illumination and maintains at a slightly higher level than its initial value after the light is turned off (Fig. 4.12B). The PSC can be activated by light illumination with small applied electrical pulses. As shown in Fig. 4.12C, the PSC shows no obvious change when pulses with amplitude of 0.15 V are applied on the Ag electrode without light illumination. With the presence of light, the PSC gradually increases under the same consecutive pulses stimulating. After turning off the light, the PSC gradually decreases with applying consecutive depressing pulses, mimicking the long-term depression (LTD). It is worth noting that the power consumption of the memristor is highly reduced with light illumination, which is an attractive feature for pattern recognition applications. Guo et al. demonstrated photoelectric synapse based on ZnO12x/AlOy heterojunctions [46]. The memristor shows persistent photoconductivity after UV light illumination (Fig. 4.12D). A transition from short-term plasticity to long-term plasticity can be achieved by controlling the frequency and the intensity of the light pulses (Fig. 4.12E). Taking advantages of continuous electron releasing from the trap sites, Yang et al. developed optically stimulated synapse with Si NC memristor as illustrated in Fig. 4.5C [56]. The memristor shows paired-pulse facilitation (PPF) behavior stimulated by two laser spikes and spike-timing-dependent plasticity (STDP) by changing the relative timing between the presynaptic and postsynaptic spikes. The achievement of STDP has the implication for the development of an artificial synapse with optoelectronic memristors.

4.4.2 Optogenetics-inspired tunable synaptic functions Optogenetic is a research technique to manipulate neural activity of neurons with light. Light can activate/deactivate photosensitive ion channels to control the influx of ions, thereby modulating the synaptic plasticity behaviors [89
94]. Inspired by optogenetics, Lu et al. developed light-tunable synaptic functions in CH3NH3PbI3-based memristors, as depicted in Fig. 4.4A [27]. Light illumination can increase the formation energy of VI. The increase of iodine vacancy concentration can be inhibited and the spontaneous decay of iodine vacancy concentration can be accelerated, analogous to the light-controlled Ca21 influx process in biological synapses. As shown in Fig. 4.13A, after the memristor is switched to LRS in

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Figure 4.12 Photoactivated synaptic functions in optoelectronic memristors. (A) Schematics of a synaptic cleft and the electrical/chemical signal transport in the synaptic cleft. (B, C) The PSC responses of the memristor with the combination of electrical and optical stimuli. Source: Reproduced with permission from S. Ham, S. Choi, H. Cho, S.-I. Na, G. Wang, Photonic organolead halide perovskite artificial synapse capable of accelerated learning at low power inspired by dopamine-facilitated synaptic activity, Adv. Funct. Mater. 29 (2019) 1806646 [51]. Copyright (2018) Wiley-VCH. (D) Persistent photoconductivity effect of ZnO12x/AlOy heterojunctions. (E, F) The transition from short-term plasticity to long-term plasticity achieved by controlling the light frequency and the light intensity. Reproduced with permission from D.C. Hu, R. Yang, L. Jiang, X. Guo, Memristive synapses with photoelectric plasticity realized in ZnO1
x/AlOy heterojunction, ACS Appl. Mater. Interfaces 10 (2018) 6463 [46]. Copyright (2018) American Chemical Society. (G
I) PPF behavior stimulated by two laser spikes and STDP behavior stimulated by two laser spikes with different relative time between them. Reproduced with permission from H. Tan, Z. Ni, W. Peng, S. Du, X. Liu, Y. Xu, et al. Broadband optoelectronic synaptic devices based on silicon nanocrystals for neuromorphic computing, Nano Energy 52 (2018) 422
430 [56]. Copyright (2018) Elsevier.

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Figure 4.13 Optogenetics-inspired tunable synaptic functions in optoelectronic memristors. (A) The conductance decay process with/without light illumination. (B) Long-term potentiation and long-term depression of the memristor in the dark and with light illumination. (C
H) Coincidence detection of the memristor with electrical stimulation and light stimulation. Source: Reproduced with permission from X. Zhu, W.D. Lu, Optogenetics-inspired tunable synaptic functions in memristors, ACS Nano 12 (2018) 1242
1249 [27]. Copyright (2018) American Chemical Society.

dark, the conductance decay rate can be increased with light illumination. This effect allows the memristor to show opposite synaptic plasticity: long-term potentiation in the dark and long-term depression under light illumination (Fig. 4.13B). The memristor can reproduce the function of coincidence detection of electrical/light stimulation that initially realized in optogenetics. An output current higher than 3 µA is obtained only when the nonlight pulse and the electrical pulses appear simultaneously (Fig. 4.13C
G). A transition from potentiation to depression can be achieved by carefully controlling the interval between electrical pulses and the illumination intensity. By combining the electrical stimulation and optical stimulation, the memristor provide more possibilities to modify synaptic plasticity effects for future neuromorphic computing applications.

100

4.5

Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Prospects and challenges

As described, the two-terminal memristor with attractive properties is promising for a variety of optoelectronic applications such as optoelectronic memory, optoelectronic logic operation, visual information sensor, and optogenetics-inspired synaptic. By combination with the high bandwidth and fast transmission characteristics of photons, optoelectronic memristor may provide a platform for photonic computing to beyond the von Neumann bottleneck. However, some challenges still remain to realize further applications of optoelectronic memristors: (1) although several microscopic mechanisms have been proposed for optoelectronic memristors, the exact mechanism behind some optoelectronic functions has not been investigated comprehensively. A deep understanding of photoinvolved memristive mechanism is required; (2) in terms of memory applications, the optoelectronic RS performances still needs further improvement, especially the write/erase speed is more challenge due to the ion motion-related process; (3) the discrimination between different light wavelength and light intensity is still a challenge. The broadband response of the memristor hinders the accuracy and the applications in color image detection of vision sensors; (4) the visual information detected and stored by present optoelectronic memristors is essentially two-dimensional. Holographic storage is a promising technology to detect and store three-dimensional visual information via the formation of interference fringes through photochemical reaction. Attractive capabilities of high capacity three-dimensional optical sensing, memorization and processing may be possible by combining the holographic storage and the memristive technology; (5) optoelectronic memristors will need to integrate light source to the memristor or the integrated circuit. The technique issues should be addressed. Overall, optoelectronic memristors combining electronic, photonic, and ionic processes hold considerable promise for data storage, logic operation, vision sensing, and neuromorphic computing applications. It is believed that optoelectronic memristors will continue to attract increasing attention for diverse optoelectronic applications.

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29.

Three-terminal optoelectronic memory device

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Chaoyue Zheng1, Ye Zhou2 and Su-Ting Han1 1 Institute of Microscale Optoelectronics, Shenzhen University, Shenzhen, P.R. China, 2 Institute for Advanced Study, Shenzhen University, Shenzhen, P.R. China

5.1

Introduction

Three-terminal optoelectronic memory device can accumulate and release the photogenerated carriers with the light illumination which has the potential application in various fields such as image capturing, logic data processing, and confidential information recording [1 3]. Generally, the structure of three-terminal optoelectronic memory device is similar to the thin film-based field effect transistor memory device which includes the semiconductor layer, dielectric layer, functional layer, and three electrodes: source, drain, and gate electrodes (as shown in Fig. 5.1) [4 6]. When the bias voltage is applied to the gate electrode, the functional layer can trap the charge carriers (holes/electrons) or take place the polarization which can effectively regulate the conductive current. Plenty of semiconductor materials are sensitive to different wavelengths of light and their electrical properties will be changed under the light illumination which indicates that these materials can be a good candidate for the photosensitive devices. For the optoelectronic memory devices, the light operation is similar with the electric programmed or erased operation which can affect the device performance. Besides, illumination can increase the generated numbers of photoinduced carriers in semiconductors, which is of great significance in reducing the operating voltage of memory devices. It can even be used independently as an information programming approach, which is also very positive for reducing the energy consumption. The functional layer materials have been widely investigated and can be small molecules, polymers, two-dimensional (2D) materials, or ferroelectric materials. There is a class of photochromic materials

Figure 5.1 The conventional structure of three-terminal optoelectronic memory device. Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing. DOI: https://doi.org/10.1016/B978-0-12-819717-2.00005-9 © 2020 Elsevier Ltd. All rights reserved.

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such as DAE molecules [7,8] whose energy level can be adjusted due to the molecule structures change by the light illumination process. As the charges can be trapped in different energy levels, it is important to adopt the energy level transition property of the photochromic materials in the optoelectronic memory device. This chapter focuses on the development of optoelectronic properties for the three-terminal memory devices. The photogenerated charges or the change in the energy levels of the photochromic materials under the light illumination can lead to the different optoelectronic characteristics. The working mechanism will first be discussed in this chapter. Then we will describe the history of the devices to understand the development track. Finally, various device structures and functional materials will be investigated and the devices which exhibit different photoelectric characteristic will be discussed.

5.2

The working mechanism of three-terminal optoelectronic memory device

Semiconductor materials with proper bandgap are generally sensitive to light, and their electrical properties will change under light illumination. In generally, for the transistor-based memory device, the exciton will emerge in the semiconductor with the light and split into the hole electron pairs [9]. Under the strong electric field, the holes or electron from the hole electron pairs will enter into the functional layer which can generate the built-in electric field to adjust the current in the conductive channel. Besides, the light process can be used as the erasing operation because it is difficult to inject electron for some p-type semiconductors. Such as pentacene, when the programmed operation is completed by the negative bias voltage from the gate electrode, the holes can be trapped by the functional layer which makes the threshold voltage shift to the negative direction. By employing the light erasing operation, the photogenerated electrons can neutralize the trapped holes which lead the threshold voltage to shift back to the initial state. It is noted that energy level of the incident light should be larger than the band gap of the semiconductor between valence band/HOMO and conduction band/LUMO which indicates that wavelength of the incident light should be appropriate. The energy level of the incident light can be calculated by the following equation: E5

hc λ

where, the λ and h represent the wavelength of the incident light and Planck constant separately while c is the speed of light propagation in vacuum. The functional layer in the conventional three-terminal optoelectronic memory device can trap or release the charges and it is important for the memory device. The energy band will bend for semiconductor layer and functional layer under the electric field which make some high-energy charges overcome the energy level

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barrier between semiconductor layer and functional layer. For the photochromic materials, the energy level will change when the light is illuminated on the materials. Photochromic spiropyran [10] and diarylethene (DAE) [11] are the typical molecules. When the photochromic materials are used as the functional layer for the three-terminal optoelectronic memory devices, the memory characteristics can be controlled by the light illumination process. When the condition change from dark to light, the band level of photochromic materials will alter which make the energy level barrier change. Some high-energy charge carriers will overcome the energy barrier between the semiconductor and the functional layer and can be trapped or released which make the threshold voltage shift, resulting in the nonvolatile memory behaviors.

5.3

The development of three-terminal optoelectronic memory device

The optical operation enriches the content of three-terminal optoelectronic memory device. In recent years, the performances of these devices have been greatly improved. In 2001, Narayan et al. [12] first reported the electrical properties of organic field-effect transistor could be adjusted by the optical operation, the results showed that under the low intensity of the illuminated light, the current between drain source changes greatly. In 2009, Guo et al. [13] first realized the multistage storage in the three-terminal optoelectronic memory device. The semiconductor layer was pentacene/CuPc and the functional layer was PS/PMMA. The results showed the good multistage storage characteristics and the reversible threshold voltage shift by applying the electrical and light operation. The four states were “00,” “01,” “10,” and “11” and the retention time reached 250 h which indicated the successful implementation of two bit storage. It is noted that the semiconductor and functional layer are both important to prepare the optoelectronic memory device. Illumination can not only be used as an auxiliary means in the process of voltage writing and voltage erasing, but also become an independent programming method to realize voltage writing and light erasing operation. In 2011, Chen et al. [14] reported the nonvolatile transistor memory with high-dielectric constant of hafnium silicate as insulating layer, and the semiconductor was pentacene. The programming process could be completed by the applied negative bias voltage from the gate electrode and the well maintained retention characteristic was observed. By employing the illumination operation, the threshold voltage returned to the initial state which indicated the illumination could be used as the erasing operation. In 2014, Zhou et al. [15] designed a three-terminal photonic memory device (Fig. 5.2). The functional material was upconversion nanocrystals (NaYF4:Yb31/ Er31) which could be driven by the near-infrared light. Different from above memory devices, the UC materials were dispersed into the semiconductor layer (P3HT). The results showed that a lot of photoinduced charges could be generated and trapped which resulted in a large memory window, high ON/OFF ratio, and long

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Figure 5.2 (A) Working mechanism of upconversion nanocrystals and (B) luminescence of different wavelengths. Source: Adapted from reference Y. Zhou, S.T. Han, X. Chen, F. Wang, Y.B. Tang, V.A. Roy, An upconverted photonic nonvolatile memory, Nat. Commun. 5 (2014) 4720, with permission from 2014 Nature.

retention. The device exhibited the different electrical properties with and without near-infrared light illumination, demonstrating that the device could be used for the data encryption. In 2016, Leydecker et al. [1] reported a flexible thin-film transistor-based nonvolatile optical memory device. The blend of semiconductor (P3HT) and a photochromic DAE was investigated under the different light sources. It is noted that the molecular structure of DAE will change with the ultraviolet and green light irradiation. The HOMO energy level of DEA-Me-o was lower than the semiconductor of P3HT which indicated that the charges could not be trapped while the DEA-Me-c isomer could trap the charges and accept holes. When the 313 nm light-irradiation was used, more DEA-Me-o isomers were transformed into the DEA-Me-c isomers and in that case a lot of charges were trapped. The results showed that 256 (8 bit storage) different current levels were achieved and the memory states could be switched with 3 ns laser pulses. This work provided a novel approach for the design of three-terminal optoelectronic memory device. In 2017, Lee et al. [16] fabricated a photoelectronic memory based on the 2D semiconductor material of MoS2, and it is noted that the artificially structured charge trap layers

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was used between the semiconductor layer and the dielectric layer. MoS2 is the ntype material, therefore a large number of electrons would be trapped when the gate bias voltage (80 V) was applied, and the electron concentration in the channel would decrease. In their work, in order to study the optical memory storage capability, a 450 nm laser pulse was used, and the results showed that the trapped electrons were easy to release which ascribed to the existence of photogenerated holes.

5.4

Organic semiconductors based on different device structures

In the organic field-effect transistor memory device, the organic semiconductor is acted as the conductive channel and the functional layer can trap or release the charge carriers. Polymer electrets are the common materials used as the functional layer. In 2015, Yi et al. [17] reported a memory device based on the organic semiconductor layer of pentacene and functional layer of PVK. The light was employed in the programming/erasing operation. Compared with the hysteresis curve without light illumination, the hysteresis window was almost double which indicated that the light operation was important for the memory device. The programmed state was achieved by applying the negative bias voltage while light operation could act as the erasing operation. The electrons could be trapped or released by the electrical programming and electrical erasing operation. The memory window could be effectively adjusted mainly attributing to the effect of photon excited electrons. The polymer electrets and semiconductors are in direct contact and the morphology of polymer electret is important to the memory device performance. Ling et al. [18] studied the effect of different morphologies on device performance (Fig. 5.3). Since the trapped holes were hard to erase by the positive bias voltage for the organic semiconductor of pentacene from the gate electrode, the light was employed to induce the photogenerated electrons. Two functional layers in the device were amorphous PFO film and β-PFO film separately and the β-PFO film was rougher than amorphous PFO film. The electrical testing result showed that the memory window of β-PFO device reached 57 V and was 26% larger than the one from amorphous PFO memory device. The large memory window mainly came from the large contact area between pentacene and β-PFO film which enhanced the effective tunneling area and made more charges to be injected. The floating-gate devices can store trapped charges very well because of the existence of the floating-gate layer. In the three-terminal optoelectronic memory device, the floating-gate structure is widely used and investigated. In 2019, Shiono et al. [19] fabricated a top-gate/bottom-contact transistor memory device (Fig. 5.4). The organic composite of TIPS-pentacene and PMMA acted as the floating-gate layer while P3HT was functionalized as the semiconductor layer. The programming process was carried out with blue, green, and red light. The results exhibited that a large memory window of 30 V could be achieved, indicating that the device was sensitive to the light. Besides, the retention characteristics were stable even with

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Figure 5.3 The mechanisms of the memory with different interface morphology. Source: Adapted from reference H.F. Ling, J.Y. Lin, M.D. Yi, B. Liu, W. Li, Z.Q. Lin, et al., Synergistic effects of self-doped nanostructures as charge trapping elements in organic field effect transistor memory, ACS Appl. Mater. Interfaces 8 (2016) 18969 18977, with permission from 2016 American Chemical Society.

the light illumination. The current of the device could be tuned by the light illumination, and the multilevel data storage could be achieved by this device, showing the advantage of the floating-gate structure. Photoresponsive active materials could absorb the light so that the photogenerated charge carriers could generate in the active materials. In 2017, Jeong et al. [20] proved that the floating-gate layer could also have the photogenerated charges (Fig. 5.5). In this work, the floating-gate material was polymer/C60 composite and pentacene acted as the semiconductor layer. To prove the light could be absorbed by the floating-gate layer, the author used two different light of 350 and 580 nm since the polymer/C60 could only absorb the light with a wavelength of 350 nm while pentacene could absorb 580 nm light. The results showed that the excitons would generate in the C60 under the light and the photogenerated charges would neutralize the trapped charge carriers so that the organic transistor memory characteristics can be recovered. It is noted that the retention characteristics were very stable due to the unique floating-gate structure. When the photochromic materials are used as the functional layers of the optoelectronic memory device, the electrical characteristics will be adjusted due to the change in the structure of the photochromic materials. In 2011, Zhang et al. [11] reported the photochromic spiropyran memory device. As the dipole

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Figure 5.4 The structure (A) and mechanisms (B) of memory devices. Source: Adapted from reference F. Shiono, H. Abe, T. Nagase, T. Kobayashi, H. Naito, Optical memory characteristics of solution-processed organic transistors with self-organized organic floating gates for printable multi-level storage devices, Org. Electron. 67 (2019) 109 115, with permission from 2019 Elsevier.

moment of photochromic spiropyran could be reversible changed by the light, the channel current would be effectively modulated. Photochromic DAEs were often used to study the electrical properties of memory devices as the structures of the functional molecules changed with the light. In 2016, Chen et al. [21] designed a photoactive dielectric based on DAE molecules (Fig. 5.6). The functional layer was fabricated by the self-assembled process of DAE. The LUMO of pentacene, DAE-O and DAE-C were 22.80, 22.38, and 23.22 eV separately. When the UV light of 365 nm was used, the molecule of DAE-O would transform to DAE-C by the formation of C C bond which indicated that the LUMO of DAE-C would be lower than the one of pentacene, and some high-energy electrons would tunnel from DAE-C to pentacene. The results exhibited that the device had a large memory window, long retention time and good signal processing ability.

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Figure 5.5 (A) Schematic of light absorptions for pentacene and C60, (B) the memory window with different light. Source: Adapted from reference Y.J. Jeong, D.J. Yun, S.H. Kim, J. Jang, C.E. Park, Photoinduced recovery of organic transistor memories with photoactive floating-gate interlayers, ACS Appl. Mater. Interfaces 9 (2017) 11759 11769, with permission from 2017 American Chemical Society.

5.5

Two-dimensional transition metal dichalcogenide based on various device structures

The 2D materials show the unique electrical, optical, and mechanical properties and are considered to be one of the suitable candidates of next-generation electronic and optoelectronic devices [22 27]. For three-terminal optoelectronic memory device, the photogenerated charge carriers are produced with the light illumination and then modulate the channel current. It is noted that energy level of the incident light should be larger than the band gap of the semiconductor. For the common 2D transition metal dichalcogenide, the band gap are 1.88, 1.65 [28], and 1.44 eV [29] for monolayer MoS2, WSe2, and ReS2 respectively. The small band gap will be beneficial for the preparation of the optoelectronic memory device because the photogenerated charge carriers can be easily generated with low-energy photons. This section will introduce the optoelectronic memory devices based on the 2D transition metal dichalcogenide. Lee et al. [30] designed a device named as the one transistor one transistor (1T1T)-type MoS2 optoelectronic device containing a memory transistor (MT) and a control transistor (CT) in 2017 (Fig. 5.7). The semiconductor material was MoS2 and the gold nanoparticles was used as the floating gate. The gate electrode of MT was connected to the source electrode of CT so that the MT device could be controlled by the CT device. When the bias voltage or the light illumination was excited to the CT device, it would be conductive so that the charges could be trapped by the MT device. It is noted that the light illumination could be used in the CT device ascribing to the strong absorption of light by the monolayer MoS2.

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Figure 5.6 The device structure, molecule of DAE (A), and the energy level of DAE-C and DAE-O (B). Source: Adapted from reference H.L. Chen, N. Cheng, W. Ma, M.L. Li, S.X. Hu, L. Gu, et al., Design of a photoactive hybrid bilayer dielectric for flexible nonvolatile organic memory transistors, ACS Nano 10 (2016) 436 445, with permission from 2016 American Chemical Society.

The results showed the large current ratio between programming and erasing states, multilevel data storage and stable characteristics. In 2019, Kim et al. [31] reported a 2D materials-based floating gate memory device. Different from the common floating gate device, the floating gate of the device was on the top of the semiconductor layer, acting as the charge trapping layer. The semiconductors were graphene

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Figure 5.7 (A) The fabrication procedure of (1T1T)-type MoS2 optoelectronic device. (B) Circuit diagram and (C) optical image of memory device. Source: Adapted from reference D. Lee, S. Kim, Y. Kim, J.H. Cho, One-transistor-onetransistor (1T1T) optoelectronic nonvolatile MoS2 memory cell with nondestructive read-out, ACS Appl. Mater. Interfaces 9 (2017) 26357 26362, with permission from 2017 American Chemical Society.

and MoS2 separately in two different devices. The results showed that the photoresponsive devices had an on/off ratio of 106 and retention time of 104 s with the light pulses of 405 nm. In this work, the author carried out the light illuminating process with different light wavelength. With the wavelength of 532 or 635 nm, the multilevel optical memory devices could be achieved. The different wavelengths of optical operation could induce different levels of current mainly coming from the photogenerated charge carriers. Tungsten disulfide (WS2) is a typical 2D semiconductor material with the S W S structure bonded by the van der Waals forces and. Due to the small band gap [28], it could be used on the optoelectronic memory device. In 2016, Gong et al. [32] reported a floating-gate optoelectronic memory device based on WS2. The tunneling and blocking dielectric materials were both HfO2 and the gold nanoparticles (AuNPs) was embedded between tunneling

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dielectric layer and blocking dielectric layer to act as nano-floating gate. The results showed that under the 520 nm light illumination, the WS2 devices exhibited ultralow dark current, high detectivity, and high photoresponsivity, indicating the structure of floating-gate was an effective way to achieve high-performance device. In 2018, Xiang et al. [33] designed optoelectronic memory device with the heterostructure of 2D WS2 and hexagonal boron nitride (BN). BN could form the defect which could trap the holes from p-type WS2 semiconductor. In the programming process, when the negative bias was applied to the gate electrode with the light pulse, the electrons entered into the conduction band and then transferred to the semiconductor layer and holes could be stored in BN layer which made the threshold voltage shift. In the erasing process, the opposite bias was employed with the light illumination which could bring a large number of photon excited electrons to neutralize the trapped holes, resulting in that the device returned to the initial state. The memory switching ratio of the device could reach 1.1 3 106, which made sure that 128 (7 bit) storage state could be obtained. Besides, the retention time was over 4.5 3 104 s which exhibited the potential application for the 2D heterostructure in the optoelectronic memory devices.

5.6

Flexible three-terminal optoelectronic memory device

Flexible electronic devices play an important role in electronic devices because of their advantages of folding and bending. Comparing with traditional electronics, flexible electronics can adapt to the different working environments to meet various requirements. The organic materials and 2D materials are generally used to fabricate flexible three-terminal optoelectronic memory devices. PET substrates are widely used in flexible devices because of their low cost and well collapsibility. In 2016, Leydecker et al. [16] designed the flexible multibit optical memory device. First, the device was fabricated on the rigid substrate (Si/SiO2) and the good electrical properties were obtained. Second, in order to future study the device characteristics and receive the flexible wearable device, the Si/SiO2 substrate was replaced by the flexible substrate (PET). The results showed that under the continuous bending operation, the electrical characteristics of the device had hardly changed when the cycles exceed 1000 which indicated the stability of the device was well. In the same year, Chen et al. [21] fabricated flexible three-terminal optoelectronic memory device to study the electrical properties of DAE-device with PET substrate. In a 5 3 5 cm2 PET substrate, 900 memory devices of 30-by-30 were arranged. The results showed that the mobility was about 0.03 6 0.01 cm2 and the ratio of on/off was 104 with a low-gate voltage of 23 V. Besides, by applying the UV light programming process and the gate pulse erasing process, two images of butterfly and Peking university logo were successfully simulated. Jeong et al. [34] reported the optoelectronic memory device based on the photosensitive polymer [poly(3,5-benzoic acid hexafluoroisopropylidene diphthalimide] (6FDA-DBA-SP). Under the

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light illumination, the memory properties were enhanced because the band barrier between pentacene and 6FDA-DBA-SP was reduced. In the last part of the chapter, the author fabricated the flexible memory device on the PES substrate and the good results were obtained which indicated the device had the potential application in the field of flexible wearability. Three-terminal optoelectronic memory devices on the flexible substrates have high flexibility and it is worth to study the flexible device performances in the future.

5.7

Conclusion

With the development of science and technology, people’s demand for data storage is increasing gradually. The performance of three-terminal optoelectronic memory devices can be regulated not only by applying the bias voltage, but also by the optical operation which makes these devices demonstrate unique advantages. We have discussed the working mechanism and developing process of the three-terminal optoelectronic memories. The optoelectronic performances with different device structures and various materials are also described. Three-terminal optoelectronic memory devices are thought to play the increasingly important role in the memory family.

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Shilei Dai, Dandan Hao, Shaojiang Chen and Jia Huang School of Materials Science and Engineering, Tongji University, Shanghai, P.R. China

6.1

Introduction

In the past several decades, due to the excellent capacity in solving structured problems, the von Neumann architecture-based computers have rapidly expended. However, with the incoming of the big date era, more and more unstructured information needs to be well organized and processed. Conventional computing system is now facing unprecedented challenges in dealing with these unstructured problems due to its intrinsic separated processing and memory units, and serially signal processing paradigms, which will inevitably lead to immense energy consumption and large space occupation [1,2]. Driven by the needs of the concept of internet of things and artificial intelligence, the demand for neuromorphic computing that attempts to emulate the behaviors of human brains is extremely increased [3 6]. In human brains, massive information can be processed at an extraordinarily fast speed with low energy consumption of only 1 100 fJ per synaptic element taking the advantage of parallel processing of the neural network [7]. More strikingly, human brains are extraordinarily efficient in handling cognitive operations, such as image recognition and processing characterized by probabilistic and unstructured problems [8,9]. Thus, inspired by human brains, neuromorphic computing simulating the neural system has been paid considerable attention up to now. While researchers have put more emphasis on software to construct artificial neural networks (ANNs) which still depend on traditional computing architecture, so that they will also consume enormous power. Hence, it is indispensable to imitate the neural system at the physical level. Since synapses are the functional connections of neurons and serve as the basic units of computing and learning, designing physical synaptic devices that exhibit synaptic behaviors is the key step to build brain-like computers [2,10,11]. Thus far, a host of two-terminal devices such as memristors [12 15], phasechange memories [16], and atom switch memories [17] have been proposed to emulate synaptic functions, and diverse synaptic behaviors, such as short-/longterm plasticity (STP/LTP), spike-timing-dependent plasticity (STDP), and learning experience, have already been demonstrated. Artificial synapses realized by using these two-terminal devices possess advantages of low power consumption, simple device structure, small cell size, and easy large-scale integration with crossbar structure [18 20]. The device variability and operation instability of Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing. DOI: https://doi.org/10.1016/B978-0-12-819717-2.00006-0 © 2020 Elsevier Ltd. All rights reserved.

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these two-terminal synaptic devices may hinder their further applications in advanced artificial intelligent systems. Also, when these two-terminal devices are integrated in the system, additional circuitry components are usually needed to select a target cell. In addition, signal transmission and self-learning can be challenging to be performed simultaneously in two-terminal synaptic devices [21,22]. In comparison with two-terminal synaptic devices, three-/multiterminal synaptic transistors have the advantages of good stability, relatively controllable testing parameters, clear operation mechanism, and concurrent learning, with the cost of more complex structure [11]. Through proper material selection and structural design, transistors can convert external stimulus (light, pressure, temperature, etc.) into the electrical signal, which provided the possibility to achieve artificial synapses that can directly response to the external environment [23 26]. Also, synergistic control of one device can be easily implemented in a transistor-based artificial synapse, which opens up the possibility of developing robust neuron networks with significantly fewer neural elements [25]. More importantly, signal transmission and self-learning can be performed simultaneously in three-/multiterminal transistor-based artificial synapses [21]. Therefore, transistors may be more suitable for simulating synaptic functions than other types of devices, especially for simulating concurrent learning and dendrites integration that require multiterminal operation. Recent years have witnessed the increasing research interests in developing transistor-based artificial synapses [7,27 41]. However, this field is still in its infancy. This article presents a review of recent advances in transistor-based artificial synapses in order to give a guideline for future implementation of synaptic functions with transistors. The main challenges and research directions of transistor-based artificial synapses are presented.

6.2

State-of-the-art synaptic transistors

Synapses can conduct signals in an ever-changing manner [10]. The efficiency of information transfer between two neurons, which is also referred to the synaptic weight, depends on the recent activity history on either or both sides of the synapse. The activity-dependent change in synaptic weights stems from numerous mechanisms known collectively as synaptic plasticity, which lies the physiological basis for critical computational and memory functions in neural networks [10,42]. Development of neuromorphic electronics requires development of synapse-like devices that show plasticity of response. Up to now, different transistor configurations and materials are proposed to mimic synaptic plasticity in biological synapses. In is part, the working principles and major advances of synaptic transistors, including floating-gate synaptic transistors, ferroelectric-gate synaptic transistors, electrolyte-gate synaptic transistors, and optoelectronic synaptic transistors, are reviewed and discussed.

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6.2.1 Floating-gate synaptic transistors Floating-gate transistors usually have similar device structures as compared with conventional field-effect transistors (FETs), except for the addition of the control gate that is usually embedded in the dielectric layer [43]. The gate bias accumulated charges (electrons or holes) in the channel of traditional FETs will be dissipated quickly and completely with the remove of gate voltage. Therefore, accumulated charges in the channel of traditional FETs usually exhibit a “volatile” behavior. As for floating-gate transistors, during the gate programming process, electronic charges can be easily injected into the floating gate based on thermal emission or quantum tunneling [43 45]. Due to the existence of the robust charge blocking and tunneling layer, the trapped charges can be stored nonvolatilely. The vertical electric field between the gate electrode and the channel layer can be shielded by the trapped charges, resulting in the change of threshold voltage which in turn modulates the channel conductance. More importantly, the number of trapped charges in floating gate can be effectively modulated via the gate voltage pulse [44]. In neuron science, information processing and storing are performed by modulating the synaptic weight. Recent studies reveal that the floating-gate transistors can be used as a promising platform for mimicking artificial synapses because their gate tunable nonvolatile channel conductance can be utilized to record synaptic weight [8,44]. As shown in Fig. 6.1A, Choi et al. demonstrated floating-gate synaptic transistors based on highly purified carbon nanotubes (CNTs) [8]. A thin-film of Au was intentionally embedded in the dielectric layer to control both the linearity and the variation margin of the weight update. In this configuration, the channel conductance of the proposed CNT synaptic transistor could be continuously modulated according to the number of charges trapped at the thin film of Au, which can be precisely adjusted by designing the amplitude and duration of the gate voltage pulse. Therefore, the weight update nonlinearity (NL) and total variation margin (WG) of the CNT synaptic transistor are controllable. As shown in Fig. 6.1B, gate voltage pulse trains with high amplitude (VLTP 5 28 V, VLTD 5 8 V) resulted in a high NL of 0.82 and WG of 47.0. When reducing the amplitude of the gate voltage pulse trains to VLTP 5 26 V, VLTD 5 6 V, the values of NL and WG were reduced to 0.59 and 9.4, respectively (Fig. 6.1C). In addition, the smallest NL and WG values were observed in the CNT synaptic transistor without the Au floating gate (Fig. 6.1D). In order to investigate how NL and ΔG affect the accuracy of pattern recognition in neuromorphic systems, a device-to-system level simulation was also performed on. They found that larger ΔG was more important than the linearity of the weight update when improving the pattern recognition accuracy. This result is opposite to that of previous studies, which may due to the fact that ΔG of common two-terminal resistive switches is usually below 10. With such a small ΔG, NL became the major factor. However, in terms of the CNT synaptic transistor with a thin-film of Au floating gate, the value of ΔG can be larger than 10 (e.g., ΔG 5 57.5 in case 1). Such large ΔG enables more synaptic weight states to store information, resulting in a better distinction between the learned patterns and the tested patterns.

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Figure 6.1 (A) Schematic illustration (top) and microscopy image (bottom) of flexible synaptic transistors based on a random matrix of semiconducting CNTs. (B) Case 1: the amplitudes of VLTP and VLTD are greater than other cases; thus, NL is the highest and ΔG is the largest. (C) Case 2: the amplitudes of VLTP and VLTD are smaller than in case 1; thus, NL and ΔG are lower. (D) Case 3: if the CNT transistor without the Au floating gate is used for the synaptic transistor, NL and ΔG are considerably smaller than in the other cases due to the limited charge storage space. Source: Reproduced with permission S. Kim, B. Choi, M. Lim, J. Yoon, J. Lee, H.D. Kim, et al., Pattern recognition using carbon nanotube synaptic transistors with an adjustable weight update protocol, ACS Nano 11 (3) (2017) 2814 2822 [8]. Copyright 2017, American Chemical Society.

The use of continuous and conducting film-based floating-gate in synaptic devices is usually limited by their poor charge retention ability owing to the lateral leakage, and the continuous floating gate synaptic devices may also suffer from the increased cell-to-cell interferences when the device is scaling down [43]. The use of metallic or

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semiconducting nanoparticles as the floating gate layer may have advantages of discontinued and separated charge elements. Therefore, the poor charge retention ability of the continuous conducting floating gates can be effectively improved. The highly stability of the trapped charges in the nanofloating gates is vital for the realization of stable synaptic weight change. Fig. 6.2A represents a flexible floating-gate synaptic transistor which is capable of concurrently exhibiting learning and signal transmission functions [44]. C60 nanoparticles were well dispersed in the PMMA layer through facile solution process and utilized to trap charges. The fabricated synaptic transistors presented a memory window of 2.9 V, a high current on/off ratio above 103 and over 500 times of program/erase endurance. In addition, the fabricated devices exhibited stable and repeatable channel conductance modulation property that can be utilized to mimic the synaptic depression and potentiation in biological synapses (Fig. 6.2B). Important synaptic behaviors, including EPSC, pair-pulse facilitation (PPF), pair-pulse depression (PPD), STP, LTP, and repetitive learning processes have been successfully emulated (Fig. 6.2C and D). This work is a vital step toward future realization of artificial intelligence with nanoparticle floating gate transistors. The reprehensive works reviewed above are all about embedding floating gate into the dielectric layer. Dominique Vuillaume et al. achieved simulation of biological synapses by embedding Au nanoparticles at the interface of dielectric/organic semiconductors (Fig. 6.3A) [46]. The fabricated devices were also called nanoparticle organic memory field-effect transistor (NOMFET). Nanoparticles are nanosized objects, and therefore they could be potentially suitable for the fabrication of nanosized devices. In addition, these nanoparticles can be manipulated and assembled through a low-cost, bottom-up technologies. Both facilitating and depressing synaptic functions have been emulated by utilizing NOMFET (Fig. 6.3B). Moreover, the synaptic plasticity of NOMFET for real-time computing was evidenced and described by a model developed for biological synapses. These important synapselike behaviors were obtained by integrating two important features of NOMFETs: (1) transconductance gain of the organic transistors and (2) nanoparticle electrical charge trapping effect. The transconductance of the NOMFET can be dynamically adjusted by changing the amount of charge on the nanoparticles, and the charges on the nanoparticle exhibit a “leaky” behavior. These properties of NOMFET provide synaptic weight with a dynamic working range. More significantly, the dynamic behavior of NOMFETs can be tailored by adjusting the size of nanoparticles and the size of the synaptic device (Fig. 6.4C). Therefore, NOMFETs have the possibility to be used in future dynamical neuromorphic computing circuits. Although floating-gate transistors demonstrate some promising features to be used as synaptic devices, for example, controllable and stable channel conductance and large on/off ratio, there are still some issues need to be addressed. As the energy consumption of the synaptic device need to be reduced for the energyefficient computing system, the operation voltage for floating-gate synaptic transistors should be further reduced, because high operation voltage may result in high energy consumption. Since floating-gate synaptic transistors are charge-based electronic devices, the operation stability of these devices needs to be verified when the device size is scaling down. In addition, it is hard to concurrently achieve excellent

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Figure 6.2 (A) Schematic illustration (left) and cross-sectional side view SEM image (right) of a C60 floating gate synaptic transistor. (B) Repetitive channel conductance modulation through applying repeated positive and negative gate spikes. EPSC generated by a sequence of gate spikes with identical duration time (0.5 s) and different potentiating amplitudes ranging from 6 4 to 6 8 V under both (C) program and (D) erase conditions, respectively. Source: Reproduced with permission Y. Ren, J.Q. Yang, L. Zhou, J.Y. Mao, S.R. Zhang, Y. Zhou, et al., Gate-tunable synaptic plasticity through controlled polarity of charge trapping in fullerene composites, Adv. Funct. Mater. 28 (50) (2018) 1805599 [44]. Copyright 2018, Wiley-VCH.

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Figure 6.3 (A) Device structure of an Au nanoparticle synaptic transistor. (B) Facilitation and depression behavior of the Au nanoparticle synaptic transistor. The pulses applied to this NOMFET with constant voltage (20 V) but with different time. (C) The discharge time constant of Au nanoparticles varies with channel length and nanoparticle size. Source: Reproduced with permission F. Alibart, S. Pleutin, D. Gue´rin, C. Novembre, S. Lenfant, K. Lmimouni, et al., An organic nanoparticle transistor behaving as a biological spiking synapse, Adv. Funct. Mater. 20 (2) (2010) 330 337 [46]. Copyright 2010, Wiley-VCH.

Figure 6.4 (A) Schematic of the ferroelectric-gate synaptic transistor with upward and downward polarization. (B) Drain current of the ferroelectric-gate synaptic transistor before (IDSinit) and after (IDSpulse) applying gate voltage pulse with various heights and widths. Source: Reproduced with permission Y. Nishitani, Y. Kaneko, M. Ueda, T. Morie, E. Fujii, Three-terminal ferroelectric synapse device with concurrent learning function for artificial neural networks, J. Appl. Phys. 111 (12) (2012) 124108 [21]. Copyright 2012, AIP Publishing.

short-term synaptic plasticity (lasting for 1 ms to 10 s) and long-term plasticity (lasting for hours or ever longer) in one floating-gate synaptic device because the charge retention ability is usually determined by the charge blocking and the charge tunneling layer. Therefore, new device engineering for floating-gate synaptic transistors might be needed to solve these problems.

6.2.2 Ferroelectric-gate synaptic transistors Ferroelectric field-effect transistors (FeFETs) have been intensively investigated in practical nonvolatile memory applications due to their nondestructive readout, low-

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power consumption, and high-operating speed [47 49]. The key component in FeFETs for memory applications is the ferroelectric insulator which has spontaneous polarization states. Due to the Coulomb interaction between the carriers in the channel and the polarization of the ferroelectric insulator, the carrier concentration of FeFETs can be precisely and gradually modulated by changing the polarization state of ferroelectric materials using the gate voltage [50]. As for traditional memory applications, the ferroelectric insulator switches between two remnant polarization states, which are utilized as two digital states of the memory. Recently, FeFETs have attracted considerable attention as a promising platform for mimicking biological synapses thanks to the excellent multidomain polarization switching capability of ferroelectric materials, which can be used to obtain multilevel FeFET channel conductance [50 52]. The multilevel channel conductance of FeFETs can be utilized to record synaptic weight. For example, Nishitani et al. reported a FeFET-based synaptic device by using ZnO and Pb(Zr, Ti)O3 (PZT) as the semiconductor and ferroelectric insulator, respectively (Fig. 6.4A) [21]. In this work, multilevel modulation of the nonvolatile channel conductance can be achieved through applying gate voltage pulses, as shown in Fig. 6.4B. The variation of channel conductance depends on the amplitude and duration of the gate voltage pulse. Utilizing these characteristics, both asymmetric and symmetric STDP learning rules were successfully implemented. Although decent synaptic performances have been realized in PZT-based FeFETs, PZT is hazardous to the environment due to its lead content. Jerry et al. reported a synaptic transistor with Hf0.5Zr0.5O2 (HZO) as the ferroelectric insulator layer [53]. HZO was firstly deposited by ALD, and then it was annealed at 600 to form multiple ferroelectric domains. The multiple ferroelectric domains of HZO can be partially polarized by using appropriate gate voltage pulse. In addition, STDP has also been realized in HZO-based synaptic transistors. Oxide ferroelectrics usually need a high crystallization temperature that limited their applications for large area electronics on plastic substrates. In addition, their inherent rigidity also limits their applications in the field of flexible and wearable electronic devices. Compared with oxide ferroelectrics, organic ferroelectrics can be utilized to overcome these limitations of oxide ferroelectrics. For example, Yoon et al. have proposed an IGZO synaptic transistor using a poly(vinylidenefluoride-trifluoroethylene) [P(VDF-TrFE)] poly (methyl methacrylate) (PMMA) blended film as the gate insulator [51]. The blended film can be prepared by a low-temperature spin-coating process, and therefore it can be used for large area electronics, typically on plastic substrates. In addition, the switch time of the P(VDF-TrFE) PMMA blended film was sensitively affected by its blending ratio, which provided an efficient avenue to modulate the channel conductance of the synaptic device in a longer time domain. Recently, Kim et al. have reported ultrathin conformable pentacene synaptic transistors with a free-standing P(VDF-TrFE) film as the dielectric layer (Fig. 6.5A) [54]. The total thickness of the fabricated devices was about 500 nm. By precisely modulating the remnant polarization of P(VDF-TrFE), important synaptic performances, including postsynaptic current, synaptic depression and facilitation, and STDP, have been successfully emulated in such synaptic device.

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Figure 6.5 (A) Device structure of the ultrathin conformable organic synaptic transistors with a freestanding P(VDF-TrFE) film as the dielectric layer. (B) Summary of the hysteresis windows (upper red graph) and read-out ON-OFF ratios at 0 V (lower blue graph) for the conformed FONTs on substrates. Photo images (C) and long-term potentiation, long-term depression characteristics (D) of the FONT under two harsh bending conditions: on the surface of brain-shaped PDMS mold (upper panel) and under an extremely bending condition with a bending radius of 50 μm (lower panel). Source: Reproduced with permission S. Jang, S. Jang, E.H. Lee, M. Kang, G. Wang, T.W. Kim, Ultrathin conformable organic artificial synapse for wearable intelligent device applications, ACS Appl. Mater. Interfaces 11 (1) (2019) 1071 1080 [54]. Copyright 2019, American Chemical Society.

More significantly, through a simple dry peel-off and stick on method, the fabricated devices can be stably transferred to various types of uneven substrates, including thermal-shrink plastic film, jelly, textile, plastic film, candy, etc. (Fig. 6.5B). In order to verify that the ultrathin conformable organic synaptic transistors can maintain their stable synaptic functions under harsh bending conditions, they have tested the synaptic characteristics of the fabricated devices on a brain-shaped PDMS mode and under an extremely bending condition with a bending radius of 50 μm, respectively (Fig. 6.5C). The fabricated synaptic transistors exhibited stable long-term potentiation and long-term depression features under both harsh bending conditions (Fig. 6.5D). We believe that this work may suggest a new research direction for realization of wearable artificial intelligent systems.

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In terms of device structure, junctionless ferroelectric FinFETs have the advantages of small device size, simple preparation process, low device variability, and selector-free for synaptic devices usage [55,56]. Therefore, there are opportunities to develop highly dense artificial synapse array by utilizing the junctionless feature of FinFETs. Recently, Choi et al. have reported the first junctionless ferroelectric FinFET synapse with the HfZrOx (HZO) as the dielectric layer [57]. By eliminating the source/drain volume, the proposed synaptic device exhibited a much scalable device area of 0.006 μm2, which is about 40 times smaller than that of conventional FeFETs-based synapses with planer structure. In addition, the fabricated synaptic devices presented distinguishable switching characteristics with a gradually tunable channel conductance. Both synaptic potentiation and depression functions were realized in such synaptic device. In order to verify that it is feasible to use such synaptic device in neural networks for pattern recognition, they have also conducted a neural network simulation based on the experimentally measured synaptic behavior. The pattern recognition accuracy for hand-written digits on the Modified National Institute of standards and Technology (MNIST) database was estimated to be 80%. Ferroelectric synaptic transistors show some promising features, such as, high stability, large on/off ratio, fast programming operations, as well as fewer variations in the weight update curve. However, they also suffer from scaling issue as floating-gate synaptic transistors because of their similar charge-based memory characteristics. In addition, they have difficulty in implementing excellent shortterm synaptic plasticity. Therefore, further research focused on addressing these limitations of FeFET-based synaptic devices is urgent.

6.2.3 Electrolyte-gate synaptic transistors Electrolyte-gate transistors (EGTs) can effectively utilize ions in the electrolyte dielectric layer to modulate the channel conductivity of the device. The working principle of EGTs can be simply categorized into two types: electrostatic modulation and electrochemical doping [58]. In the first case, the semiconductors are impermeable to the ions in the electrolyte. The ions in the electrolyte can move to and accumulate at the interface between semiconductors and dielectrics under the applied gate electric field, resulting in the formation of electric-double-layer (EDL) with high capacitance locally around the interface. In the second case, EDL can also be formed, but the semiconductors are permeable to ions in the electrolyte, which can further dope and modulate the channel conductance in a nonvolatile way. In recent years, utilizing EGTs to mimic synaptic functions have emerged as a new research direction [7,59,60]. The migration of ions in the electrolyte under the applied electric field is very similar to the release of neurotransmitters in response to an action potential. Analogy to biological synapses, the gate electrode of EGTs can be regarded as the presynaptic membrane while the semiconductor channel is considered as the postsynaptic membrane, and the channel conductance is regarded as the synaptic weight. When EGTs are operated at electrostatic regime, the gate induced channel conductance change is reversible, which provides the basis for mimicking short-term synaptic plasticity. When EGTs are operated at

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electrochemical doping mode, the channel conductance change is partly irreversible because the ions are doped into the channel, which provides the basis for emulating the long-term synaptic plasticity. Biologically, the energy consumption of a single synapse event is around 10 fJ/spike [61]. The low-voltage operating characteristics of EGTs also provide the possibility for the implementation of ultra-low energy consumption synaptic devices. One of the early studies on electrolyte-gate synaptic transistor was reported by Chen et al. in 2010 [62]. The device was realized by using poly [2-methoxy-5-(20-ethylhexyloxy)-p-phenylene vinylene] (MEH-PPV)/ RbAg4I5 as the dielectric layer. The RbAg4I5 ionic conductor layer and the MEHPPV were integrated onto the gate structure of a p-type Si-based transistor to mimic the dynamically controlled ionic fluxes process in the biological synapses. Under the action of external electric field, Ag1, I2 in RbAg4I5 can diffuse into MEH-PPV polymer layer. When the external electric field is removed, the residual ions in the polymer layer can adjust the channel carrier concentration by the electrostatic coupling effect. The nonvolatile ionic change in the polymer can be modulated through a pair of temporally correlated pre- and postsynaptic spikes. Based on this principle, typical learning rules have been realized. To date, the development of electrolytegate synaptic transistors has reached a decent level in terms of realized synaptic functions. Different types of semiconductors and electrolyte materials have been utilized to achieve synaptic functions. Chen et al. reported a SWCNT synaptic transistor with hydrogen-doped poly (ethylene glycol) monomethyl ether (PEG) as the dielectric layer (Fig. 6.6A) [31]. When a positive voltage spike is applied through the gate electrode, protons in PEG will move toward the conductive channel, and hence introduce more coupling charges at the surface of the SWCNT, resulting in the increasing of channel current (Fig. 6.6B). After the spike ends, the channel current gradually reduces to its initial value as protons gradually drift back to equilibrium. Based on ionic migration and nonvolatile charge storage effects, typical synaptic functions have been successfully simulated, such as EPSC, PPF, dynamic logical, long-term potentiation, long-term depression, and STDP. In addition, the average energy consumption of this synaptic device is very low (7.5 pJ/spike), and the low-energy consumption feature provides the possibility for further integration of synaptic transistors into large-scale integrated circuits. Shi et al. have demonstrated a liquid electrolyte-gated correlated nickelate (SmNiO3) synaptic transistor [63]. The resistance of SmNO3 is very sensitive to the stoichiometric ratio. Oxygen vacancies can lead to the destabilization of Ni31, resulting in Ni31 transition to Ni21. The stoichiometry of SmNiO3 can be in situ modulated by ionic liquid electrolyte gate electrode due to the stabilization and destabilization of Ni31. The transmission and reception of ions in SmNiO3 transistors are the basis for the implementation of synaptic functions. Applying a negative pulse sequence on the gate electrode can increase the conductance of SmNiO3 while applying a positive pulse sequence can weaken the SmNiO3 conductivity, which is very similar to the potentiation and depression processes in biosynapses. Based on this property, symmetric and asymmetric STDP behaviors have also been successfully simulated.

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Figure 6.6 (A) Schematic diagram of a SWCNT synaptic transistor with a polymer electrolyte integrated in its gate. (B) EPSC triggered by the presynaptic spike. The insets demonstrate the distributions of mobile ions before, during and after the presynaptic spike is applied. Source: Reproduced with permission K. Kim, C.L. Chen, Q. Truong, A.M. Shen, Y. Chen, A carbon nanotube synapse with dynamic logic and learning, Adv. Mater. 25 (12) (2013) 1693 1698 [31]. Copyright 2013, Wiley-VCH.

Yang et al. have reported an ionic liquid gated synaptic transistor using quasitwo-dimensional (2D) α-MoO3 nanoflakes acting as the semiconductor layer (Fig. 6.7A) [64]. In this study, the gate-controlled electrochemical doping was demonstrated as the main mechanism for the observed reversible, nonvolatile behavior of MoO3 synaptic transistors. As shown in Fig. 6.7B and C, when a positive gate voltage was applied on the ionic liquid, protons would be accumulated and be absorbed at the oxygen site on the top surface of the α-MoO3 nanoflakes. Then, with increasing of gate voltage, parts of the protons would diffuse into the lattice of α-MoO3 and then change Mo61 to Mo51 with the formation of (Mo O) H bonds. Finally, the free charge density increased due to the introduction of external electron during this electrochemical doping process. Therefore, drain current increased largely under the positive gate voltage. It should be noted that the (Mo O) H bond is thermodynamically stable, so a large negative gated voltage is needed to extract the protons from the lattice of the α-MoO3. When a proper negative voltage is applied, the drain current will restore to the initial value. In the implementation of artificial synapses, the increase and decrease of the channel conductance can be used to emulate the potential and depression of synaptic weight, respectively. This analog-like functionality is particularly appealing for the integration of the threeterminal devices in neuromorphic computational architecture. Malliaras et al. have done a very systematic study in the implementation of biological synaptic functions with PEDOT:PSS [59,60]. Fig. 6.8A represents the schematic diagram of the PEDOT:PSS-based synaptic transistors that are laterally gated through a KCl electrolyte [59]. Positive gate voltage pulses will lead cations in the

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Figure 6.7 (A) The photoimage and the schematic illustration of the quasi-2D α-MoO3based synaptic transistor. Schematic illustrations of the quasi-2D α-MoO3-based synaptic transistor under the action of (B) positive and (C) negative gate voltages. Source: Reproduced with permission C.S. Yang, D.S. Shang, N. Liu, G. Shi, X. Shen, R.C. Yu, et al., A synaptic transistor based on quasi-2D molybdenum oxide, Adv. Mater. 29 (27) (2017) 1700906 [64]. Copyright 2017, Wiley-VCH.

Figure 6.8 (A) Device structure of the PEDOT:PSS-based synaptic transistor. (B) Simplified schematic of the PEDOT:PTHF-based synaptic transistor. (C) The device obtains a memorization state ΔI as N is increased. Source: (A) Reproduced with permission P. Gkoupidenis, N. Schaefer, B. Garlan, G.G. Malliaras, Neuromorphic functions in PEDOT:PSS organic electrochemical transistors, Adv. Mater. 27 (44) (2015) 7176 7180 [59]. Copyright 2015, Wiley-VCH. (B, C) Reproduced with permission P. Gkoupidenis, N. Schaefer, X. Strakosas, J.A. Fairfield, G.G. Malliaras, Synaptic plasticity functions in an organic electrochemical transistor, Appl. Phys. Lett. 107 (26) (2015) 263302 [65]. Copyright 2015, AIP Publishing.

electrolyte to diffuse into the PEDOT: PSS, resulting in de-doping of the PEDOT: PSS film. When the pulse voltage is removed, the de-doped PEDOT:PSS will return to its original state since the previously injected cations drift back to the electrolyte. Typical synaptic functions, such as PPD, adaptation, and dynamic filter characteristics, have been realized by the PEDOT:PSS-based synaptic transistor. In addition, the same group has reported a PEDOT:PTHF-based synaptic transistor with nonvolatile memory function (Fig. 6.8B and C) [65]. The long-term memory behavior was

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obtained by changing the conformation of PEDOT:PTHF through applying high gate voltage pulses. The conformational change of PEDOT:PTHF can be reversed through applying opposite gate voltage pulses. Although these promising studies as mentioned above have brought us closer to the application of electrolyte-gate synaptic transistors in brain-like computers and artificial intelligent systems, fundamental researches on device scalability, durability, operating speed, and electrolyte stability are still lacking. More importantly, network level demonstration with these EGTs integrated is needed in the future study, which might raise more issues, for example, self-discharge and sneak path problems.

6.2.4 Optoelectronic synaptic transistors Despite significant progresses, state-of-the-art electrical-stimulated artificial synapses are still facing some obvious limitations, such as limited bandwidth, large interconnection energy loss, etc. It has been recently proposed that optical control of the synaptic weight may provide the synaptic devices with large bandwidth, low interconnection energy loss, ultrafast signal transmission, and can help construct novel ANN architectures [23,40,66,67]. For example, Qin et al. reported a graphene CNT hybrid synaptic transistor that can effectively respond to optical signals in the wavelength ranging from ultraviolet to visible spectrum (405 532 nm) [23]. Based on such synaptic device, a conceptual axon multisynapses network was successfully emulated. The optoelectronic synaptic devices are emerging on the basis of the electrical-stimulated artificial synapses, therefore, their development lags far behind electrical-stimulated synaptic devices. It has been recently found that interfacial charge trapping effect between semiconductors and dielectrics can be utilized as an effective strategy to implement optoelectronic synaptic transistors with highly synapse-like behaviors [24,68]. In 2016, Lee et al. reported a light-stimulated synaptic transistor based on indium gallium zinc oxide (IGZO) aluminum oxide (Al2O3) thin film structure (Fig. 6.9A) [68]. In such synaptic device, the ultraviolet (UV) light pulse was used as the synaptic input, while the IGZO channel is analogous to the postsynaptic membrane. When a UV light pulse with the energy of 3.4 eV is applied, electron hole pairs will generate in the IGZO channel since the bandgap of the IGZO is approximately 3.36 eV, and a photocurrent flowing will be produced under the electric field between source drain electrodes. At the same time, some of the photogenerated holes will be trapped at the interface of IGZO/Al2O3 and/or in the Al2O3 layer near the interface. These trapped holes will be gradually released when the UV light pulse is off, resulting in the delayed decay of the photogenerated current. Based on the trapping and detrapping of the photogenerated holes at the interface of IGZO/ Al2O3 and/or in the Al2O3 layer near the interface, the postsynaptic current has been successfully emulated (Fig. 6.9B). The postsynaptic current increased with the increasing of light spike numbers, which is very similar to the enhancement of memorization through increasing stimuli in the human brain. In this work, shortterm memory (STM) to long-term memory (LTM) transition was realized through

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Figure 6.9 (A) Electron hole pair generation in the IGZO-Al2O3-based synaptic transistor by UV light stimulus. (B) Postsynaptic current in response to UV light trains. The intensity, width, and interval of the UV pulse train are 3 mW/cm2, 100 ms, and 5 s, respectively. (C) STM to LTM transition realized by repeating the light pulse stimulus. The pulse intensity, pulse width, and pulse interval are 3 mW/cm2, 100 ms, and 100 ms, respectively. Source: Reproduced with permission H.K. Li, T.P. Chen, P. Liu, S.G. Hu, Y. Liu, Q. Zhang, et al., A light-stimulated synaptic transistor with synaptic plasticity and memory functions based on InGaZnOx Al2O3 thin film structure, J. Appl. Phys. 119 (24) (2016) 244505 [68]. Copyright 2016, AIP Publishing.

repeating the light spike stimulus (Fig. 6.9C). In 2018, Dai et al. reported an organic light-stimulated synaptic device utilizing the interfacial effect of organic FETs [24]. Polyacrylonitrile (PAN) film was utilized as the dielectric and charge trapping layer, which allows its strong polar groups to interact with the organic semiconductor. Therefore, a strong interfacial charge trapping effect was induced to the interface between the PAN film and the semiconductor layer. The trapping and detrapping of the photogenerated charges at the PAN/semiconductor interface

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provided our devices with highly synapse-like behaviors, such as EPSC and PPF. In addition, learning and forgetting behaviors have also been successfully implemented through a “T”-shaped synaptic transistor array. The memory level and its retention time can be altered by adjusting the light stimulation parameters, including the light pulse intensity, the light pulse width, and the number of light pulses. Recently, utilizing the inherent persistent photoconductivity (PPC) of oxide semiconductors is another strategy toward designing light-stimulated synaptic transistors [22,67,69]. Kim et al. have reported a photonic synaptic transistor based on the inherent persistent photoconductivity of the amorphous IGZO [69]. The device structure is depicted in Fig. 6.10A. When the device is exposed to light with a larger energy than the bandgap of the amorphous IGZO, excess carries are generated in the channel layer due to: (1) band-to-band excitation, (2) ionization of oxygen vacancies, and (3) generation of stable metal peroxides. The PPC effect observed in the amorphous IGZO was attributed to the generation of ionized oxygen vacancies [single- (Vo1) or double charged (Vo21)] under illumination (Fig. 6.10B). When the illumination is off, the neutralization of ionized oxygen vacancies may take a certain amount of time because it is a thermally active

Figure 6.10 (A) Device structure of the amorphous IGZO-based photonic synaptic transistor. (B) Energy-band diagrams for the amorphous IGZO in the dark and under illumination. Ionized oxygen vacancies [single- (Vo1) or double charged (Vo21)] will be generated in the amorphous IGZO film under illumination. (C) Photoresponse behavior of the amorphous IGZO-based synaptic transistor. (D) A schematic showing two connected IGZO synaptic devices for the emulation of the STDP. (E) The PSC variation at different Δt values. (F) Symmetric STDP realized in the two connected IGZO synaptic devices. Source: Reproduced with permission M. Lee, W. Lee, S. Choi, J.-W. Jo, J. Kim, S.K. Park, et al., Brain-inspired photonic neuromorphic devices using photodynamic amorphous oxide semiconductors and their persistent photoconductivity, Adv. Mater. 29 (28) (2017) 1700951 [69]. Copyright 2017, Wiley-VCH.

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process. Therefore, the amorphous IGZO-based device presented a delayed decay of its channel current when the light was turned off (Fig. 6.10C). To mimic synaptic functions, the channel conductivity was regarded as the synaptic weight. The synaptic device is triggered by UV-light spikes, which is similar to the biological action spikes in the neuron. By changing the light spike parameters, such as light spike frequency and numbers, the synaptic weight can be efficiently altered, emulating STM/LTM behavior. In addition, symmetric STDP function was successfully emulated by connecting two amorphous IGZO-based synaptic devices in series (Fig. 6.10D F). On the other hand, utilizing the excellent light absorption property of perovskite materials to fabricate optoelectronic synaptic transistors has also been paid much attention. In 2018, Han et al. have demonstrated photonic synapses based on inorganic halide perovskite quantum dots (IHP QDs) (Fig. 6.11A) [70]. The heterojunction formed between the semiconductor layer and the CsPbBr3 QDs layer provided the basis for optically programmable and electrically erasable features of the device (Fig. 6.11B). During gate programming process, photogenerated holes in the CsPbBr3 QDs can be easily injected into pentacene layer through a bending of energy band, while the electrons will be left in the CsPbBr3 QDs. The CsPbBr3 QDs with trapped electrons can function as an additional control gate that can further accelerate the injection of holes into the semiconductor layer. Due to the existence of potential well, the trapped electrons can be retained in CsPbBr3 QDs for a relatively long time, resulting in the photonic memory effect. A sufficient negative gate voltage pulse is needed to totally erase the memory effect. Based on such device, synaptic functions, such as EPSC and PPF, have been emulated (Fig. 6.11C E). These synaptic functions can be efficiently altered by changing the light stimulation parameters, including light pulse width, light pulse intensity, and light pulse wavelength. In addition, the PPF to PPD transition was emulated by changing the time intervals of photonic pulses (Fig. 6.11F). The nonvolatile synaptic plasticity can be simulated in the synaptic transistor under photonic/electric stimulus. Reliable synaptic potentiation and habituation functions were also realized, as shown in Fig. 6.11G. Recently, Wang et al. reported a simple and effective solution process to fabricate optoelectronic synaptic transistors based on IHP QDs and organic semiconductors [40]. In this work, CsPbBr3 QDs was blended with PQT-12 as a demonstration. The band structure of PQT-12 matched well with that of CsPbBr3 QDs, which was beneficial for the effective separation of photogenerated charges at the interface of CsPbBr3 QDs/PQT-12. Therefore, the fabricated synaptic transistors exhibited a high photoresponsivity. More significantly, the photocurrent can sustain for a certain amount of time after the illumination is terminated, which can be attributed to the charge trapping states in the PQT-12 film. The high photosensitivity and delayed decay of the photocurrent are vital to implementing efficient optoelectronic synaptic transistors. Based on such device, some important synaptic functions have been successfully emulated, such as EPSC, PPF, and high-pass filter characteristic. These promising studies as mentioned above have made important contributions to the development of optoelectric synaptic devices; however, these works mainly

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Figure 6.11 (A) Device structure of a photonic synapse based on IHP QDs. (B) Schematic energy diagram of the device during light programming operation and during electrical erasing operation under dark condition. (C) EPSCs excited by photonic pulses with fixed wavelength of 365 nm and varied intensity for 1 s. (D) The PPF effect emulated by two identical light pulses with fixed wavelength of 365 nm and light intensity ranging from 0.041 to 0.153 mW/cm2. (E) The PPF effect emulated by two identical light pulses with fixed irradiance of 0.153 mW/cm2 and wavelength ranging from 660 to 365 nm. (F) Experimental demonstration of PPD following PPF in the memory device. (G) Gradual channel current modulation of the synaptic devices subjected to a train photonic pulses (365 nm, 0.153 mW/ cm2, 1 s duration with 10 s interval) and negative electrical pulses (220 V, 10 ms duration with 1 s interval). Source: Reproduced with permission Y. Wang, Z. Lv, J. Chen, Z. Wang, Y. Zhou, L. Zhou, et al., Photonic synapses based on inorganic perovskite quantum dots for neuromorphic computing, Adv. Mater. 30 (38) (2018) 1802883 [70]. Copyright 2018, Wiley-VCH.

focused on the realization of basic synaptic functions under different types of light spike conditions; no attempt has been made to realize ANNs by integrating these optoelectric synaptic devices. In addition, the operating reliability and device-todevice variability of these devices should be improved. Furthermore, only a small part of the excitatory synaptic functions has been mimicked. It is still a big challenge to achieve inhibitory synapses with pure optical signals, not to mention the implementation of reconfigurable optical synaptic devices, which exhibit synaptic

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responses that can be regulated between inhibition and excitation modes. Future studies should focus on the realization of optical reconfigurable artificial synapses, because such reconfigurable feature may provide optoelectric artificial synapses with the ability to simulate some complex biological functions, for example, adjustable perception of different external stimuli.

6.3

Summary and outlook

In the past two decades, neuromorphic computing hardware has experienced rapid development, introducing various design and implementation methods. Many efforts have been made to design physical synaptic devices that are capable of simulating biological synapses at similar energy levels. Transistor-based artificial synapses are increasingly prominent due to their good stability, relatively controllable test parameters, and clear operating mechanisms. In addition, three-/multiterminal synaptic transistors have the merits of multiple inputs, enabling the device to perform concurrent learning, parallel data processing, and spatiotemporal dynamic logic function. Synergistic control of one device can also be implemented in transistor-based artificial synapses, opening up the possibility of developing a robust neural network with significantly fewer neurons. We have discussed most advancements of transistor-based synaptic devices, including floating-gate synaptic transistors, electrolyte-gate synaptic transistors, ferroelectric-gate synaptic transistors, and optoelectronic synaptic transistors. Each of these synaptic devices has its own strengths and weaknesses. Floating-gate synapse transistors usually have a controllable and stable channel conductance and a large on/off ratio, and therefore, they can be used to realize long-term synaptic potentiation and depression. But these devices usually suffer from a large operating voltage, and it is difficult to reduce the device size. Due to the existence of robust charge blocking and tuning layer, it is difficult to achieve STP (usually lasts for 1 ms to 1 s) in floating-gate synaptic transistors. Ferroelectric synaptic transistors exhibit some promising features, including stability, large on/off ratio, fast programming operations, as well as less variations in the weight update curve. But they suffer from the similar limitations as floating-gate synaptic transistors due to their similar charge-based memory characteristics. Large operation voltage is usually needed to partly switch the polarization state of ferroelectric materials. The stable polarization state of ferroelectric materials makes it easy to implement LTP, but difficult to implement STP. With multiple terminal/gate configurations, the electrolyte-gated synapse transistor is superior to other types of devices in achieving logic function, dendrite integration, and artificial dendritic neurons. The low-voltage operating characteristics of EGTs also provide the possibility for the implementation of ultra-low energy consumption synaptic devices. However, the device scalability, durability and electrolytes instability (e.g., ionic liquid, devices need to be packaged) might be main limitations for electrolyte-gate synaptic transistors. In terms of optoelectronic synaptic transistors, light signals may provide devices with large bandwidth, less interconnection energy

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loss, and can help construct novel ANN architectures (e.g., electro-optical coordinated neural networks). However, it is still a big challenge to achieve inhibitory synapses with optical signals. Therefore, future research needs to address these weaknesses in synaptic transistors to achieve high performance synapse-like devices.

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[56] J.P. Colinge, C.W. Lee, A. Afzalian, N.D. Akhavan, R. Yan, I. Ferain, et al., Nanowire transistors without junctions, Nat. Nanotechnol. 5 (3) (2010) 225 229. [57] M. Seo, M.-H. Kang, S.-B. Jeon, H. Bae, J. Hur, B.C. Jang, et al., First demonstration of a logic-process compatible junctionless ferroelectric FinFET synapse for neuromorphic applications, IEEE Electron Device Lett. 39 (9) (2018) 1445 1448. [58] S.H. Kim, K. Hong, W. Xie, K.H. Lee, S. Zhang, T.P. Lodge, et al., Electrolyte-gated transistors for organic and printed electronics, Adv. Mater. 25 (13) (2013) 1822 1846. [59] P. Gkoupidenis, N. Schaefer, B. Garlan, G.G. Malliaras, Neuromorphic functions in PEDOT:PSS organic electrochemical transistors, Adv. Mater. 27 (44) (2015) 7176 7180. [60] P. Gkoupidenis, D.A. Koutsouras, G.G. Malliaras, Neuromorphic device architectures with global connectivity through electrolyte gating, Nat. Commun. 8 (2017) 15448. [61] W. Xu, S.-Y. Min, H. Hwang, T.-W. Lee, Organic core-sheath nanowire artificial synapses with femtojoule energy consumption, Sci. Adv. 2 (6) (2016) e1501326. [62] Q. Lai, L. Zhang, Z. Li, W.F. Stickle, R.S. Williams, Y. Chen, Ionic/electronic hybrid materials integrated in a synaptic transistor with signal processing and learning functions, Adv. Mater. 22 (22) (2010) 2448 2453. [63] J. Shi, S.D. Ha, Y. Zhou, F. Schoofs, S. Ramanathan, A correlated nickelate synaptic transistor, Nat. Commun. 4 (2013) 2676. [64] C.S. Yang, D.S. Shang, N. Liu, G. Shi, X. Shen, R.C. Yu, et al., A synaptic transistor based on quasi-2D molybdenum oxide, Adv. Mater. 29 (27) (2017) 1700906. [65] P. Gkoupidenis, N. Schaefer, X. Strakosas, J.A. Fairfield, G.G. Malliaras, Synaptic plasticity functions in an organic electrochemical transistor, Appl. Phys. Lett. 107 (26) (2015) 263302. [66] Q. Wu, J. Wang, J. Cao, C. Lu, G. Yang, X. Shi, et al., Photoelectric plasticity in oxide thin film transistors with tunable synaptic functions, Adv. Electron. Mater. 4 (12) (2018) 1800556. [67] J. Wang, Y. Chen, L.-A. Kong, Y. Fu, Y. Gao, J. Sun, Deep-ultraviolet-triggered neuromorphic functions in In-Zn-O phototransistors, Appl. Phys. Lett. 113 (15) (2018) 151101. [68] H.K. Li, T.P. Chen, P. Liu, S.G. Hu, Y. Liu, Q. Zhang, et al., A light-stimulated synaptic transistor with synaptic plasticity and memory functions based on InGaZnOx Al2O3 thin film structure, J. Appl. Phys. 119 (24) (2016) 244505. [69] M. Lee, W. Lee, S. Choi, J.-W. Jo, J. Kim, S.K. Park, et al., Brain-inspired photonic neuromorphic devices using photodynamic amorphous oxide semiconductors and their persistent photoconductivity, Adv. Mater. 29 (28) (2017) 1700951. [70] Y. Wang, Z. Lv, J. Chen, Z. Wang, Y. Zhou, L. Zhou, et al., Photonic synapses based on inorganic perovskite quantum dots for neuromorphic computing, Adv. Mater. 30 (38) (2018) 1802883.

Ionic synergetically coupled electrolyte-gated transistors for neuromorphic engineering applications

7

Li Qiang Zhu1,2, Fei Yu2 and Zheng Yu Ren2 1 School of Physical Science and Technology, Ningbo University, Ningbo, P.R. China, 2 Ningbo Institute of Materials Technology and Engineering, Chinese Academy of Sciences, Ningbo, P.R. China

7.1

Introduction

Over the past 50 years, the development of microelectronics obeys Moore’s law [1]. However, the miniaturization has faced fundamental physical limitations for conventional silicon (Si)-based planar complementary metal-oxide-semiconductor (CMOS) devices [2]. Thus, devices with new MOS structures based on Si-oninsulator (SOI) technology have been proposed to extend the Moore’s law [3]. Furthermore, new-concept devices have also been proposed in “More than Moore strategies,” such as single electron device [4], quantum device [5], etc. In solving structural mathematical problems, von Neumann computers can work well. However, high-energy power consumption is needed for dealing with ever-growing data. Our brain is an energy efficient computation center full of a huge amount of neurons and synapses. It can execute huge amount of parallel synaptic computation, which makes brain computation superior to von Neumann computation in terms of energy efficiency [6]. Thus, brain-like neuromorphic devices and neuromorphic engineering have great potentials in the development of energy efficient artificial intelligence (AI) technology [7]. Recently, new materials and new conceptual devices have been proposed for neuromorphic applications, including two terminal resistive switching memories and new-concept multiterminal transistors. Two-terminal neuromorphic devices include memristor [8,9], atomic switch [10,11], phase change memory [12,13], and spintronic oscillator [14]. Multiterminal transistors include nanoparticle organic memory field-effect transistor (FET) [15,16], ferroelectric synaptic transistors [17,18], multiterminal memtransistor [19], etc. New device configurations have been designed to fulfill the learning abilities for neuromorphic platform applications. Due to the existences of ions in ionic liquid and ionic gel electrolytes, ion-gated new conceptual devices have also been proposed [20,21]. With the unique interfacial ionic/electronic coupling and the electrochemical processes, Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing. DOI: https://doi.org/10.1016/B978-0-12-819717-2.00007-2 © 2020 Elsevier Ltd. All rights reserved.

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electrolyte-gated transistors (EGTs) can also act as fundamental building blocks for neuromorphic systems. Here, recent progress on brain-like neuromorphic devices will be reviewed. Firstly, we simply overview neural networks and neuromorphic devices. Then, we will focus on the electrolyte-gated neuromorphic devices. The operation mechanism of the EGTs will be discussed. Next, we talk about ionic liquid electrolyte and solid-state proton conductor gated neuromorphic transistors. Metaplasticities mimicked on electrolyte-gated neuromorphic transistor will be reviewed. Due to the unique ion gating behaviors, Hodgkin
Huxley artificial neuron and artificial tactile sensory systems will be discussed. Lastly, dendrite integration will be discussed for the multigate neuromorphic transistors, including dendritic integration, neuronal arithmetic, and orientation selectivity.

7.2

Neural network and neuromorphic engineering

7.2.1 Neuron and synapse Our brain is a large-scaled neural network. There are approximately 100 billion neurons and approximately 1 million billion synapses. It is an energy efficient computation center [22]. Neurons are the core components of the brain. They act as computational engines by processing inputs from thousands of dendrite synapses. Generally, strength of one spike coming from preneuron is not high enough to trigger response of a postneuron. Moreover, neurons are always receiving multiprespikes and executing spatiotemporal integration [23,24]. When the integrated signal arrives at a certain threshold, the neuron will be triggered to transfer a spike to a postneuron. Thus, a neuron is an integrator. Fig. 7.1 schematically shows synapses. They can process and transmit information through electrical and chemical signals. The synaptic connection strength can increase or decrease after receiving synaptic stimuli. Such ability is called as synaptic plasticity. It plays an important role in brain cognitive behaviors. Synaptic strength or synaptic weight can be modulated by the concentrations of ionic species within synaptic structure (e.g., Ca21,

Figure 7.1 Schematic diagram of biological synapses.

Ionic synergetically coupled electrolyte-gated transistors for neuromorphic engineering applications 147

Na1, and K1) [23,25]. Brain cognitive behaviors are realized through synaptic responses, involves physical alteration in neuronal substrates. The ionic fluxes related information storage and retrieval occurs by rewiring the neuronal networks. Moreover, prior history of synaptic stimuli may affect synaptic states [26,27]. Such neural network architecture underlies all the human brain functions, including memory and learning behaviors, with the properties of massive parallelism, fault tolerance, energy, and spacious efficiency.

7.2.2 Neuromorphic engineering and neuromorphic devices It is proved that von Neumann computers are not powerful enough in tasks such as vision, audition, motor control, etc. Our brain is a remarkable computational center. It can solve unstructured problems nearly every moment when we are awake without much conscious thought or concern. Thus, neuromorphic engineering mimicking human brain functions has been proposed. Neuromorphic platforms are electronic implementation of neural systems. Previously, CMOS circuits have been proposed for emulating synaptic functions and neural functions. However, each synapse needs several transistors to mimic synaptic responses [28]. Thus, it is a great challenge in large-scale integrations. Furthermore, it is also a great challenge for neuromorphic platforms based on von Neumann configurations. The energy consumption will be extremely high for “brain computation” [29,30]. Thus, realization of neuromorphic functions on physical devices is important for brain-inspired energy efficient neuromorphic platforms [19,31]. Recently, new conceptual devices have been fabricated for neuromorphic device applications, including two terminal resistive switching memories [8
10,12] and three terminal transistors [16,17,32,33] Two terminal neuromorphic devices include memristor, phase change memory, atomic switch, etc. These devices possess unique nonlinear electrical characteristics different from those of the conventional ones. Resistances of these devices will change after applying voltage biases and current biases. Thus, important synaptic responses have been demonstrated, such as synaptic facilitation, spiking time dependent plasticity (STDP), short-term/long-term memory, pattern recognition, etc. For example, Ohno et al. [10] proposed an Ag2S atomic switch for neuromorphic device applications, demonstrating synaptic functions of short-term/long-term plasticity characteristics by applying input pulses. Before the formation of atomic bridge between Ag2S layer and Pt electrode, shortterm plasticity is observed. While after the formation of atomic bridge, long-term plasticity is observed. Brain “multistore memory model” is also demonstrated. Wang et al. proposed an amorphous InGaZnO memristor [34]. The device was composed of an oxygen-deficient and an oxygen-rich IGZO layer sandwiched between top and bottom Pt electrodes. The oxygen-deficient α-IGZO layer is more conductive than oxygen-rich α-IGZO layer. When applying voltage pulses, the conduction front will move at the oxygen-rich/oxygen-deficient interface. Thus, STDP and “learning-experience” behavior are observed. In nervous systems, there are hundreds to thousands of dendrite synapses on a single neuron [35]. The neuron can receive inputs from these dendrite synapses and

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execute neural computation. Transistors have unique priorities for synaptic electronic applications. The interconnection will get more flexible. However, because of the limitations of electrostatic modulation capabilities for conventional dielectrics, including SiO2, Al2O3, and high-dielectric constant transition metal oxide (high-k oxide), conventional FETs have no adaptive learning activities. These limitations prohibit conventional FETs from acting as building blocks for neuromorphic platform applications. Thus, new functional materials and new structures should be designed in transistors to make them possess the learning abilities with low-operation voltage. Furthermore, neuromorphic transistor enable the concurrent learning, that is, synaptic weight can be read out without canceling signal transmission among neurons. In neuromorphic transistors, voltage pulses applied on gate are always deemed as presynaptic spikes. Channel conductance or channel dynamic current are always deemed as synaptic weight. Interestingly, it is also possible to introduce multigate configurations. Thus, dendrite synapse functions can be mimicked. Recently, several kinds of neuromorphic transistors were proposed, including ferroelectric transistors [17], nanoparticle organic memory FETs [16], memcapacitor synaptic transistor [36,37], two-dimensional (2D)/qusi-2D materials based transistor [19,38
40], EGTs [41
45], photonic transistor, and electronic ionic photoactive transistor [46
49]. This progress in neuromorphic transistors indicate the great potentials for transistors in neuromorphic system applications.

7.3

Electrolyte-gated neuromorphic transistors

7.3.1 Electrolyte-gated transistors Ion plays an important role in the recent advancements in new conceptual devices, which induces a new interdisciplinary concept termed as iontronics [50]. Iontronics is highly interesting in the field of biochemical sensors or bionic electronics. In 1954, Brattain and Garrett from Bell Lab fabricated electrolyte-gated germaniumbased FET [51]. In 1984, White et al. fabricated ionic liquid electrolyte-gated organic FET [52]. The doping level of channel was well controlled by ions within the electrolyte under external electrical field [53
55]. Due to the strong electrostatic modulation, the ionic/electronic hybrid EGTs can operate at low voltage. In such devices, the movements of ions within electrolytes can change carrier transport characteristics of solid-state materials greatly. Basically, there are two types of operation mechanism for EGTs. For EGTs operating at electrostatic modulation mode, anions/cations within the electrolyte will move towards the positively/negatively charged electrode to form an electric-double-layer (EDL), composed of a compact Helmholtz layer and a diffuse layer (Fig. 7.2A) [56]. In this case, EGTs could be named as EDL-Ts. As a result of the charge separation within a few angstroms, a high EDL capacitance of above 1 μF/cm2 is expected. As comparison, the capacitance for 100 nm-thick dense Al2O3 films is only approximately 100 nF/cm2. For EGTs operating at electrochemical mode, charged ions within electrolyte will penetrate into semiconductor channel, resulting in an electrochemical doping of

Ionic synergetically coupled electrolyte-gated transistors for neuromorphic engineering applications 149

Figure 7.2 Operation mechanism for EGTs. (A) Electrostatic modulation mode. (B) Electrochemical modulation mode.

channel (Fig. 7.2B) [54]. Now, EGTs could be named at ECTs. Due to the extremely strong interfacial ionic/electronic coupling at electrolyte/channel interface, the EGTs could operate at a low-operation voltage of below 2 V. As is highly desirable for low-energy consumption portable device applications. It is interesting to note here that a long-term ionic/electronic coupling is expected for the ionicconducting electrolyte. Thus, strong interfacial coupling behaviors still exists when the gate is located away from the channel, as would decrease the processing alignment requirements [57]. As discussed in previous sections, ions also act as a vital role in nerve system. Cognitive behaviors of our brain are realized through ion migrations in nervous systems, which involves physical alterations in neuronal substrates that modulate neuron activities and communications [58,59]. Such ionic fluxes related information storages and retrievals occur by rewiring the neuronal networks. Ion-migration induced changes in channel conductivities in EGTs are quite similar to ionic fluxes related cognitive behaviors. Thus, EGTs have potential applications in neuromorphic platform applications. For EDL-Ts, ions within the electrolyte will migrate to electrolyte/channel interface under external electrical field, inducing the changes in channel conductance. When the external electrical field is removed, ions will migrate back to their initial equivalent positions due to the existence of the ion concentration gradient. Thus, the channel conductance will return back to its initial value in a delay mode. The behaviors are quite similar to the short-term plasticity behaviors observed in biological synapses. Under a relative high-gate biases, the ions within the electrolyte will migrate across the electrolyte/channel interface and inducing an electrochemical doping in semiconductor channel. When the gate bias finishes, the doped ions will not return back to their initial equivalent positions. Thus, the channel conductance will not return back to its initial value. In another word, there are nonvolatile changes in the channel conductances. The behaviors are quite similar to the long-term plasticity behaviors observed in biological synapses. Interestingly, two operation modes of electrostatic modulation and electrochemical will shift from one to another under certain biasing conditions, which means cognitive behaviors can be modulated through certain stimuli or training. Thus, EGTs have great potentials in neuromorphic device applications. Up-to-date, several important synaptic functions and neural algorithms have been simulated on EGTs,

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including excitatory/inhibitory postsynaptic current (EPSC/IPSC), paired-pulse facilitation/depression (PPF/PPD), STDP, dendrite integration, brain-like neuron functions, etc.

7.3.2 Ionic liquid electrolyte-gated neuromorphic transistors Ionic liquid-based electrolytes have been proposed for neuromorphic device applications. Ramanathan et al. [60] reported a SmNiOx (SNO)-based neuromorphic transistor by using ionic liquid as gate dielectric (Fig. 7.3A). The resistance of SNO is very sensitive to the ratio between Ni31 and Ni21. With the gate biasing, density of oxygen vacancies in SNO changes, which changes the SNO conductivity in a nonvolatile mode. Thus, symmetric and asymmetric STDP learning behaviors were mimicked. Sun et al. [39] proposed quasi-2D molybdenum oxide-based

Figure 7.3 (A) Ionic liquid-gated SmNiOx (SNO)-based neuromorphic transistor. (B) Demonstration of short-term plasticity and long-term potentiation. (C) Ionic liquid electrolyte-gated WO3 neuromorphic transistor. (D) Schematic diagram of KCl electrolytegated PEDOT:PSS electrochemical transistor (ECT)-based neuromorphic device. (E) Schematically diagram of the similarity between the device and biological synapse. (F) Long-term plasticity mimicked on PEDOT:PTHF-based OECT. Source: (A) From J. Shi, S.D. Ha, Y. Zhou, F. Schoofs, S. Ramanathan, A correlated nickelate synaptic transistor, Nat. Commun. 4 (1) (2013) 2676 [60]. (B) From C.S. Yang, D. S. Shang, N. Liu, G. Shi, X. Shen, R.C. Yu, et al., A synaptic transistor based on quasi-2D molybdenum oxide, Adv. Mater. 29 (27) (2017) 1700906 [39]. (C) From J.T. Yang, C. Ge, J.Y. Du, H.Y. Huang, M. He, C. Wang, et al., Artificial synapses emulated by an electrolytegated tungsten-oxide transistor, Adv. Mater. 30 (34) (2018) 1801548
1801557 [61]. (D) and (E) From P. Gkoupidenis, N. Schaefer, B. Garlan, G.G. Malliaras, Neuromorphic functions in PEDOT:PSS organic electrochemical transistors, Adv. Mater. 27 (44) (2015) 7176
7180 [42]. (F) From P. Gkoupidenis, N. Schaefer, X. Strakosas, J.A. Fairfield, G.G. Malliaras, Synaptic plasticity functions in an organic electrochemical transistor, Appl. Phys. Lett. 107 (26) (2015) 263302 [62].

Ionic synergetically coupled electrolyte-gated transistors for neuromorphic engineering applications 151

neuromorphic transistor. Several synaptic responses are demonstrated, including excitatory postsynaptic current, synaptic depression and potentiation, paired-pulse facilitation, short-term plasticity/long-term potentiation (Fig. 7.3B), etc. Jin et al. [61] proposed ionic liquid electrolyte-gated WO3 neuromorphic transistor. Fig. 7.3C schematically shows the device. The neuromorphic device demonstrates short- and long-term plasticities. Malliaras et al. [42] proposed PEDOT:PSS-based organic electrochemical transistor (OECT) for neuromorphic device applications. The device uses KCl electrolyte as gate dielectric and has lateral gating configuration (Fig. 7.3D). Fig. 7.3E schematically shows the similarity between the device and biological synapse. Depressive short-term synaptic plasticities were reproduced in the PEDOT:PSS-based neuromorphic transistor. In the proposed OECT-based neuromorphic device, high-frequency presynaptic pulses heavily suppressed the synapse. As comparison, low-frequency presynaptic pulses results in insignificant depression. Therefore, low-pass filter behaviors were observed. Malliaras et al. [62] also creatively proposed PEDOT:PTHF-based OECT for neuromorphic device applications. By training the PEDOT:PTHF OECT-based neuromorphic device, the device demonstrates both short- and long-term plasticity (Fig. 7.3F). Interestingly, due to the extremely strong ionic/electronic interactive behaviors for the ionic liquid-based electrolytes, the EGT-based neuromorphic devices would exhibit very low-energy consumption. As is interesting for neuromorphic platform applications. Salleo et al. [44] proposed a low-voltage driven electrochemical neuromorphic organic device (ENODe). The energy consumption is below 10 pJ for device with area of 1000 μm2. The device also exhibits greater than 500 nonvolatile and reproducible states at 1 V range. Moreover, a submicron neuromorphic transistor would only consume energy of approximately 35 aJ in a single synaptic response.

7.3.3 Solid-state ionic conductor gated neuromorphic transistors PEG polymer is a typical solid-state proton conductor. Chen et al. [63] fabricated PEG-gated carbon nanotube (CNT)-based neuromorphic transistor. When applying gate spikes, transient EPSC channel currents are triggered. They have also applied two spikes with different interval time on two synapses, establishing a dynamic logic, similar to that observed in a neural network [64,65]. They have proposed a Si-based neuromorphic transistor-gated with RbAg4I5/MEH-PPH stack [66]. The RbAg4I5 layer is an ionic conductor, while the MEH-PPH layer is an ion-doped conjugated polymer. Fig. 7.4A schematically shows the device. When applying gate spikes, ions from RbAg4I5 can migrate into MEH-PPH and get trapped, which modulates the channel conductivities in a nonvolatile manner. When positive gate bias comes, positive charged ions will migrate into MEH-PPH and stored there, which increases channel conductivities. When negative gate bias comes, negative charged ions will migrate into MEH-PPH and stored there, which decreases channel conductivities. Furthermore, they have also applied 120 pairs of temporally correlated presynaptic spikes and postsynaptic spikes with an interval time of Δt. The relative changes of the postsynaptic currents were recorded after spiking as a function of Δt. Thus, STDP learning abilities were mimicked (Fig. 7.4B).

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Figure 7.4 (A) RbAg4I5/MEH-PPH gated Si-based neuromorphic transistor. (B) Simulated STDP learning rule. Source: From Q.X. Lai, L. Zhang, Z.Y. Li, W.F. Stickl, R.S. Williamset, Y. Chen, Ionic/ electronic hybrid materials integrated in a synaptic transistor with signal processing and learning functions, Adv. Mater. 22 (22) (2010) 2448
2453 [66].

Wan et al. fabricated microporous SiO2 films with thickness of several μm, exhibiting a high EDL capacitance as high as 2 μF/cm2 and a high-proton conductivity of approximately 1024 S/cm [67,68]. As comparison, a 100 nm-thick thermally oxidized SiO2 only has a capacitance of approximately 13 nF/cm2. The behaviors indicate that the microporous SiO2 films exhibit different dielectric properties. They have fabricated low-voltage oxide transistors with different structure, including bottom gate [67], in-plane gate [69], junctionless [70], lateral gate [57], etc. The proton-conducting behaviors are associated with proton hopping between
OH groups and H2O molecules [71]. These devices have been proposed for neuromorphic device applications [72,73]. Gate voltage pulse is deemed as presynaptic spike. When the gate voltage spike duration time increases, EPSC amplitude will increase correspondingly [72]. The results hint the temporal responses. Furthermore, the transition from short-term memory to long-term memory is observed, as shown in Fig. 7.5A [73]. Classical conditioning is also mimicked on InZnO EDL neuromorphic transistor [74]. The behaviors are very similar to that observed in Pavlovian classical conditioning experiment. STDP behavior is also observed on an individual bottom-gate neuromorphic transistor [75]. In a biological system, STDP is essential for synapse learning rule in cognitive functions [76,77]. Fig. 7.5B schematically shows the method to measure STDP learning rule. Ten pairs of pre- and postsynaptic spikes with a fixed interval time of Δtpost
pre were applied on presynapse terminal [indium
tin
oxide (ITO) gate electrode] and postsynapse terminal (drain electrode), respectively. Fig. 7.5C shows ΔW as a function of Δtpost
pre, mimicking typical STDP learning rule in biological system. Interfacial electrochemical process in EGTs also helps to extend the synaptic response for oxide neuromorphic transistors. Wen et al. [78] proposed ITO-based EDL transistor for neuromorphic engineering applications. Through interfacial electrochemical process, the initial conductance of the ITO channel is regulated to five levels corresponding to five distinguishable initial synaptic weights. Thus, initial

Ionic synergetically coupled electrolyte-gated transistors for neuromorphic engineering applications 153

Figure 7.5 (A) EPSC curves triggered by gate pulses with different pulse amplitude ranged from 1 to 6 V. (B) Schematic diagram showing the method to measure STDP learning rule. (C) STDP learning rule. (D) Activity-dependent synaptic filter behaviors. Source: From L.Q. Guo, Q. Wan, C.J. Wan, L.Q. Zhu, Y. Shi, Short-term memory to longterm memory transition mimicked in IZO homojunction synaptic transistors, IEEE Electron Device Lett. 34 (12) (2013) 1581
1583 [73]. (B) and (C) From C.J. Wan, L.Q. Zhu, J.M. Zhou, Y. Shi, Q. Wan, Inorganic proton conducting electrolyte coupled oxide-based dendritic transistors for synaptic electronics, Nanoscale 6 (9) (2014) 4491
4497 [75]. (D) From J. Wen, L.Q. Zhu, Y.M. Fu, H. Xiao, L.Q. Guo, Q. Wan, Activity dependent synaptic plasticity mimicked on indium
tin
oxide electric-double-layer transistor, ACS Appl. Mater. Interfaces 9 (42) (2017) 37064
37069 [78].

synaptic weight dependent EPSC values and retention times are observed, indicating the activity-dependent synaptic plasticity. Interestingly, frequency dependent EPSC gains are also observed to be depended on the initial synaptic weights. Thus, a high-pass filter is proposed, exhibiting initial synaptic weight dependent cutoff frequency (fcut), as shown in Fig. 7.5D. In nervous system, several types of activitydependent synaptic plasticities were reported, such as short- and long-term plasticities, STDP, etc. Thus, mimicking such activity-dependent synaptic plasticity is desirable for neuromorphic engineering. It is interesting to note here that biomaterial-based proton conductor has also been proposed for neuromorphic device applications, including chitosan [79], sodium alginate [80], methylcellulose [81], starch [82], etc. Such devices are interesting for “green” neuromorphic platforms. Moreover, neuromorphic transistors have also been used in biochemical sensors with high sensitivity and low-energy consumptions [83]. These results are out of scope in the present review.

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7.3.4 Metaplasticity mimicked on electrolyte-gated neuromorphic transistors In biological neural systems, synaptic plasticity can be regulated by introducing priming stimulus before major synaptic activities. Such behavior is named as metaplasticity or the plasticity of synaptic plasticity, firstly proposed by Abraham in 1996 [84]. Metaplasticity is an advanced form of synaptic plasticity. It refers that plasticity of biological synapses can be affected by the synaptic historical activities. Fig. 7.6 schematically shows a diagram of metaplasticity of a biological synapse. The synaptic response R1 triggered by a main spike without a priming spike will be different from synaptic response R2 triggered by a main spike with a priming spike. Many biological experiments have shown that synaptic plasticity can be modulated by previous synaptic activity [26,85,86]. For example, a short burst of synaptic stimulation in area CA1 of the hippocampus can induce a transient short-term potentiation (STP) [85]. Moreover, the stimuli have a significant effect on subsequent synaptic long-term potentiation (LTP) or long-term depression (LTD). Two main characteristics should be considered in metaplasticity. The first one is that metaplasticity modifies the properties of synaptic plasticity in some way, for example, the direction, degree, and persistence of the plasticity [87]. The other one is that there is a certain interval time between the prior neural activity and the subsequent induction of the synaptic plasticity. In general, the priming stimulation can alter the activity of neurotransmitter receptors pharmacologically and induce subsequent synaptic responses. In biological neural sciences, metaplasticity mainly affects LTP and LTD including the facilitation of LTD, the inhibition of LTP and the facilitation of LTP. Metaplasticity modulates LTP and LTD mainly by altering synaptic transmission which is mediated by NMDA receptors and γ-aminobutyric acid receptor [88,89]. This will affect the mGluR and its downstream signaling pathways, and ultimately change the postsynaptic membrane current [90,91].

Figure 7.6 Schematic diagram of the metaplasticity in a biological synapse.

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Moreover, metaplasticity can help to keep synaptic efficacy within a dynamic range and larger neural networks in an appropriate state for learning. Since metaplasticity plays a crucial role in learning and memory, it is of great importance to imitate the metaplasticity on neuromorphic devices. Some researchers have proposed memristors to mimic metaplasticity [8,92
94]. For example, Tan et al. [8] fabricated an oxide-based valence change memory memristor (VCMM) with a Pt/WO3/Pt structure to emulate metaplasticity. Metaplastic facilitation of long-term potentiation (MFLTP) was demonstrated successfully. When there is no priming spike, a presynaptic spike (2.1 V, 10 μs) triggers an EPSC with a peak and a resting EPSC value of approximately 35 and 18 nA, respectively. After applying a priming spike of (1.7 V, 10 ms), the same presynaptic spike triggered the EPSC with a peak and resting EPSC value of approximately 60 and B24 nA, respectively. Moreover, they discussed effects of metaplasticity on STDP by applying different aspects of activity sequence and spike interval. The effect of metaplasticity on STDP was tested by using three different kinds of paired spike sequence, marked as Seq. 1, Seq. 2, and Seq. 3, respectively. Different kinds of paired spike sequences induced different STDP curves. The metaplasticities of the device are suggested to be related to the state of activated V321 . In addition, Wu et al. [93] designed a TiN/ HfOx/Pd-based VCMM to achieve the imitation of metaplasticity. Three kinds of metaplasticities were demonstrated, including MFLTP, metaplastic inhibition of LTP (MILTP), and metaplastic facilitation of LTD (MFLTD), as shown in Fig. 7.7. A priming spike (21 V, 1 μs) makes the current of LTP decrease from 1000 to 960 nA. In contrast, a priming spike (1 V, 1 μs) makes the current of LTP increase from 1000 to 1200 nA. Thus, MFLTP and MILTP were successfully mimicked. The mechanisms of the metaplasticity can be explained by the disruption and the restoration of the conductive filament due to the migration/diffusion of oxygen ions or cations. Except for two terminal memristors, metaplasticities could also be mimicked on transistor-based neuromorphic devices. For example, Sarkar et al. [95] fabricated a top-gate InP FET-gated with Al2O3 to imitate metaplasticity. The InP transistor can mimic synaptic plasticities mainly because it can modify the number of filled traps in the MOS structure itself. Metaplasticity was emulated by applying priming gate voltage pulses. the relative change of PSC of potentiation is higher when it follows depressing priming than when it succeeds a potentiating priming (Fig. 7.8A). Similarly, a depressing priming causes a smaller depression compared with that of a potentiating priming (Fig. 7.8B). For short-term synaptic change, initial depressed synapse trigger higher potentiation than that triggered on an initially potentiated synapse (Fig. 7.8C). Similarly, an initially depressed synapse leads to less depression than that triggered on an initially potentiated synapse (Fig. 7.8C). As discussed in previous sections, ionic/electronic hybrid EGTs have been proposed for neurmorphic device applications. Due to the inherent characteristics for ion gating, activity-dependent synaptic plasticities have also been mimicked on EGT-based neurmorphic transistors. Thus, EGTs would have potentials to achieve metaplasticities due to the unique interfacial ionic coupling effect. For example, John et al. [49] proposed a multigate 2D transition MoS2 neuromorphic transistor to

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Figure 7.7 Three kinds of metaplasticities, including MFLTP, MILTP, and MFLTD. Source: From Q.T. Wu, H. Wang, Q. Luo, W. Banerjee, J.C. Cao, X.M. Zhang, et al., Full imitation of synaptic metaplasticity based on memristor devices, Nanoscale, 10 (13) (2018) 5875
5881 [93].

mimic homeostatic synaptic metaplasticity. Fig. 7.8D shows the schematic diagram of the transistor. The MoS2 transistor has three working modes, including electronic-mode, ionotronic-mode, and photoactive-mode. Gate 1 can trigger an electronic-mode with silicon dioxide (SiO2) as gate dielectric. Ionotronic-mode was enabled by gate 2 with an ionic liquid as gate dielectric. Lastly, persistent photoconductivity or trap-assisted slow recombination mechanisms lead a photoactivemode (gate 3). Combining the three working modes can achieve homeostatic synaptic metaplasticity. Additive operation of electronic, ionotronic, and photoactivemodes can enhance facilitation/depression (Fig. 7.8E). The slopes of changes in synaptic weight induced by electronic-mode and inonotronic-mode are approximately 1.24 and 1.88, respectively. However, additive operation of electronic and ionotronic-mode lead a weight changes with a higher slope of approximately 3.13. Similarly, inhibitory excessive excitation or inhibition can be realized by the subtractive operation of theses modes. For example, symmetric anti-Hebbian STDP in electronic-mode can be modulated by using the ionotronic bias. Furthermore, symmetric Hebbian STDP also can be regulated by using electronic bias. Different from previous works on metaplasticity in memristors that used only presynaptic activity-based priming, this is a new terminal that may be controlled by presynaptic rate or other signals.

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Figure 7.8 (A) Comparison of potentiation with depressing and potentiating priming. (B) Comparison of depression with depressing and potentiating priming. (C) Short-term synaptic weight change with and without depressing and potentiating priming. (D) Schematic diagram of multigate 2D transition metal dichalcogenide (MoS2) neuromorphic transistor. (E) Additive operation of electronic, ionotronic, and photoactive-modes, demonstrating controlled facilitation and depression. Source: (A)
(C) From D. Sarkar, J. Tao, W. Wang, Q.F. Lin, M. Yeung, C.H. Ren, et al., Mimicking biological synaptic functionality with an indium phosphide synaptic device on silicon for scalable neuromorphic computing, ACS Nano, 12 (2) (2018), 1656
1663 [95]. (D) and (E) From R.A. John, F. Liu, N.A. Chien, M.R. Kulkarni, C. Zhu, Q.D. Fu, et al., Synergistic gating of electro-iono-photoactive 2D chalcogenide neuristors: coexistence of hebbian and homeostatic synaptic metaplasticity, Adv. Mater., 30 (25) (2018) 1800220 [49].

Ren et al. [96] have also simulated metaplasticity on chitosan-based electrolytegated protonic/electronic coupled ITO neuromorphic transistor. Metaplastic EPSC (MEPSC) was demonstrated successfully by applying priming spikes before a main spike on the gate (Fig. 7.9A). When there is no priming spikes, the peak EPSC value is approximately 72 μA triggered by a main spike of (0.5 V, 10 ms). When applying 30 priming pikes of (0.5 V, 10 ms) with an interval time (Δt) between priming pikes and main spike of 2 s, the peak EPSC value increases to approximately 77 μA. Here, both the priming spike amplitude and the number of priming spikes can affect MEPSC. MFLTP and MILTP were also imitated. Positive priming spikes can lead MFLTP while negative priming spikes can cause MILTP. 20

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Figure 7.9 (A) Metaplastic EPSC (MEPSC) demonstrated on protonic/electronic coupled ITO neuromorphic transistor. (B) Schematic diagram of the effects of metaplasticities. (C) Metaplasticities induced transition between PPF and PPD. Source: (A) and (C) From Z.Y. Ren, L.Q. Zhu, F. Yu, H. Xiao, W. Xiong, Z.Y. Ge, Synaptic metaplasticity of protonic/electronic coupled oxide neuromorphic transistor, Org. Electron. 74 (2019) 304
308 [96].

priming spikes of (2 V, 10 ms) made the retention current of LTP increase from approximately 74 to approximately 83 μA. In contrast, the priming spikes of (22 V, 10 ms) made the retention current of LTP decrease from approximately 74 to 71 μA. These metaplasticities observed on the ITO neuromorphic transistor can be related to proton gating effects. The competition and coordination of protons motion induced by priming spike and main spike is responsible for metaplasticities. Furthermore, due to the metaplasticities, the transition between pairedpulse facilitation (PPF) and paired-pulse depression (PPD) can observed by introducing priming spikes, as schematically shown in Fig. 7.9B. The paired pulses of (0.5 V, 20 ms) with an interval time of 10 ms triggered a typical PPF with PPF index of approximately 108%. While after introducing a priming spike of (1.5 V, 1 s) with an interval time (Δt) between priming spike and main paired pulses of 10 ms, the PPF index decreases to approximately 85%. In another word, PPF is changed into PPD. Such transition between PPF and PPD can be modulated not only by the amplitude of priming spike (U) but also by the interval time (Δt) (Fig. 7.9C). Metaplasticity is an important mechanism for learning and memory. Imitating metaplasticity on neuromorphic devices provides new ideas for developing neuromorphic computing networks. More efforts are required to expanding the application of metaplasticity on neuromorphic platform. Designing neuromorphic devices

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to mimic the learning and memory processes under the influence of metaplasticity could be one of interesting branches in the field of neuromorphic devices.

7.3.5 Hodgkin
Huxley artificial synaptic membrane Fig. 7.10A schematically shows a biological synapse. Ions can migrate across synaptic membrane under external stimuli. Generally, there is a potential across the synaptic membrane ranged between 240 and 280 mV [97,98]. Membrane potential is crucial for signal transmission. When ion transport across the membranes through ion channel, the potential can be dynamically polarized or depolarized, inducing a synaptic response. In 1952, Alan Lloyd Hodgkin and Andrew Fielding Huxley proposed a model to explain the ionic mechanisms of membrane potential [99]. The model is named as Hodgkin
Huxley model. Fig. 7.10B shows the simplified equivalent circuit for the model, where CLipid represents the membrane, En and Gn represent the ion pumps to push ion migration and the resistance of the ion channel. In 2013 [100], HP Lab proposed a neuristor to mimic the synaptic membrane (Fig. 7.10E). The neuristor used two nanoscale Mott memristors, several resistors, and several capacitors. The circuit demonstrates transient memory and negative differential resistance. Such behaviors are related to the transition between

Figure 7.10 (A) Schematic diagram of a biological synapse showing postsynaptic membrane potential response. (B) Equivalent circuit for Hodgkin
Huxley model. (C) Oxide EDL transistor-based artificial synaptic membrane. (D) EPSP curves can be triggered with current spikes. (E) A neuristor to mimic synaptic membrane. (F) All-or-nothing response. Source: (A
D) From Y.M. Fu, C.J. Wan, L.Q. Zhu, H. Xiao, X.D. Chen, Q. Wan, Hodgkin
Huxley artificial synaptic membrane based on protonic/electronic hybrid neuromorphic transistors, Adv. Biosys. 2 (2) (2018) 1700198 [101]; (E,F) From M.D. Pickett, G. Medeiros-Ribeiro, R.S. Williams, A scalable neuristor built with Mott memristors, Nat. Mater. 12 (2) (2013) 114
117 [100].

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insulating phase and conducting phase. All-or-nothing spiking functions were demonstrated by using the proposed neuristor (Fig. 7.10F). As discussed in section previously, ion modulation behavior in EGTs can be used to mimic biological synaptic responses. Such devices may also be used for simulating artificial synaptic membrane. Recently, Fu et al. [101] proposed an artificial synaptic membrane-based on a solid-state proton conductor gated oxide EDL neuromorphic transistor (Fig. 7.10C). There are capacitor, resistor and battery in the corresponding equivalent circuit. Thus, it is quite similar to the model of Hodgkin
Huxley synaptic membrane. During the measurements, a current pulse is applied on the gate (G). Correspondingly, the drain potential is recorded. When the spike amplitude and/or spike duration time increase, the peak postsynaptic potential (PSP) value increases and changes from negative to positive. Further, ion accumulation behaviors are observed. With the increased spike numbers, there is gradual increase in peak PSP (Fig. 7.10D). The observations are quite similar to short-term plasticity behavior in nerve system [102,103]. Such synaptic membrane potential responses also makes the device great potential in neuromorphic system applications.

7.4

Electrolyte-gated neuromorphic transistor-based artificial tactile sensory systems

Human being perceives and interacts with our surrounding environments through complicated sensory systems. Such a multisensory system includes sensory organs related to touch, vision, taste, hearing, and smell. As a part of nerve system that processes sensory information, the sensory system usually consists of sensory receptor, neural pathway and processing components (i.e., neurons and synapses) [104]. Thus, when our body receives external stimuli, synapses on these sensory organs can process and deliver signals from external stimuli into our brain through afferent nerves and form visual sense, tactile sense, auditory sense, and olfactory senses. In another word, human perception system is a multisensory learning system. Leaning functions of human perception system would result in the fabrication of bionic neural networks at hardware level based on artificial neuromorphic devices, that is, the artificial perception learning system. As is getting a research hotspot and is of great importance for the development of neuromorphic engineering. It may provide a possible solution to make energy efficient, smart AI, which can operate like human brain. The artificial perception learning system integrates specific sensors and neuromorphic devices. In such a system, external stimuli perceived by sensors can be delivered into neuromorphic devices. While the neuromorphic devices can process population coding in a way similar to that in brain neural network. Such artificial multisensory intelligent learning systems also have expectable applications in fields of replacement neuroprosthetics, humanoid robots, AI perceptual learning systems, etc.

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Recently, several neuromorphic devices based artificial sensory systems have been reported. In these artificial sensory systems, tactile perception behaviors have been mimicked. Both EGT and memristor-based neuromorphic devices have been integrated into artificial perception learning system. Three connection modes have been proposed to mimic the biological tactile sensory system, including EGT in series with EGT [105], EGT [106,107], or memristor [108,109] in series with macrostructure-based press sensors, and EGT in series with piezoelectric [110] or triboelectric [111] nanogenerators. Fig. 7.11A shows the schematic diagram of a biological tactile sensory system. For tactile perception, the input sensory receptor (i.e., tactile mechanoreceptor) converts external touch/press stimuli into electrical signals which then are delivered to the output processing components (i.e., neurons and synapses) through neural pathways. These arrived electrical signals called as presynaptic action potentials lead to release of neurotransmitters. As a result, postsynaptic spikes are fired and then are delivered to the terminal somatosensory cortex to feel the touch/press stimuli. For emulating the biological tactile sensory

Figure 7.11 (A) Schematic illustration of the biological tactile sensory system. (B) Schematic diagram of an artificial tactile sensory neuron with advanced perceptual abilities. (C) Digital image showing the NeuTap on a finger (left) and schematic diagrams illustrating the pattern pairs and their corresponding two-bit binary code labels (right). (D) Typical responses of the NeuTap to three types of pattern pairs (“10,” “01,” and “11”). (E) Tactile pattern recognition carried out by the artificial tactile sensory neuron. Source: (A) From C. Zhang, W.B. Ye, K. Zhou, H.Y. Chen, J.Q. Yang, G.L. Ding, et al., Bioinspired artificial sensory nerve based on nafion memristor, Adv. Funct. Mater., 29 (20) (2019) 1808783 [109]; (B
E) From C.J. Wan, G. Chen, Y.M. Fu, M. Wang, N. Matsuhisa, S.W. Pan, et al., An artificial sensory neuron with tactile perceptual learning, Adv. Mater., 30 (30) (2018) 1801291 [106].

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nerve, EGTs and memristors could act as functional artificial synapse and neuromorphic devices due to the unique ionic
electronic hybrid effects and the cognitive behavior with learning abilities. While functionalized microstructure-based pressure sensors and nanogenerators are used as artificial sensory acceptors. It should be noted here that piezoresistive or piezoelectric microstructure-based pressure sensors need extra power supply to operate. While for piezoelectric or triboelectric nanogenerators, power can be generated themselves under external forces. Thus, based on intrinsic operating mechanisms of artificial sensory acceptors, artificial sensory systems can be classified into external-powered and self-powered ones. There are some important works on memristor-integrated artificial tactile sensory systems. Here, we just discuss EGT-integrated artificial tactile sensory systems.

7.4.1 External-powered electrolyte-gated transistor
integrated artificial tactile sensory systems Kin et al. [107] proposed a flexible artificial tactile perception afferent nerve. The artificial tactile sensory system consists of three signal converting components, including mechanoreceptors organic ring oscillators and an EGT-based synaptic transistor. The mechanoreceptors are consisted of several microstructured pressure sensors. Each pressure sensor corresponds to a hotspot in the receptive field. The mechanoreceptors are connected to a ring oscillator which acts as the artificial nerve fiber and can convert external tactile stimuli into voltage pulses. Such voltage pulses can be integrated and converted into postsynaptic currents by a synaptic transistor. The synaptic transistor acts as an interface with biological efferent nerves to form a mono-synaptic reflex arc. By connecting this artificial afferent nerve to a biological one of a discoid cockroach, a complete hybrid reflex arc can be emulated on the hybrid system. After receiving pressure information flow through the artificial afferent nerve, the cockroach leg can generate the leg extension accordingly. As is the first reported example of a combination of EGT-integrated artificial sensory system with an organism. Wan et al. [106] also proposed a neuromorphic tactile processing system (NeuTap) that can mimic sensory neuron and is capable of perceptual learning (Fig. 7.11B). The system is comprised of a microstructured pressure sensor, an ionic cable and an IWO EGT-based synaptic transistor, corresponding to the receptor that senses, axon that transmits, and synapse that processes information in a sensory neuron, respectivley. The pressure sensor converts pressure stimuli into electrical signals and are transmitted the synaptic transistor to execute cognitive behavior via the ionic cable. Such cognitive behavior is closely related to the stimuli patterns. As a proof-of-concept, they used the NeuTap neuron with one sensing terminal to implement tactile pattern recognition. They take two patterns in one row as the object for recognition. Convex and flat pattern are represented by “1” and “0,” respectively. Fig. 7.11C shows two patterns in one row used as the object for recognition. Thus, four types of patterns were obtained represented by binary codes as follows: “00,” “01,” “10,” and “11,” respectively. During experiment, the NeuTap was attached to a finger, and the finger was brought close to the

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patterns and moved. Fig. 7.11D shows responses of the nonzero-labeled (“10,” “01,” and “11”) patterns. Through supervised learning method, the artifical sensory system can carry out tactile pattern recognition. Four tactile pattern pairs including “00,” “10,” “01,” and “11” can be indentified through this sensory system (Fig. 7.11E). Through repeated training, the recognition accuracy can be enhanced.

7.4.2 Self-powered EGT-based artificial tactile sensory systems Recently, nanogenerators have also attracted great attentions, including piezoelectric, triboelectric, and pyroelectric ones. With the unique properties, integrating nanogenerators with neuromorphic EGTs to emulate the tactile sensory system is of great interests in neuromorphic engineering. Such system can decrease power consumption of synaptic devices. Moreover, the fabrication of self-powered neuromorphic systems is possible by integrating nanogenerators. Chen et al. [110] reported a self-powered flexible graphene artificial tactile sensory system comprising a piezoelectric nanogenerator (PENG) in series with an ion-gel gated graphene EGT-based synaptic transistor (Fig. 7.12A). Under the external strain, PENG generates a piezopotential due to enhanced dipoles inside the ferroelectric middle layer of PENG, which can be deemed as input presynaptic spikes. Then, presynaptic spikes were transmitted through the common bottom gate electrode and induced a postsynaptic current in the graphene channel. When there is no strain, cations and anions will distribute randomly in the ion gel. After receiving tensile strains, a negative piezopotential is produced to the ion gel, equivalent to applying a negative gate voltage (VG) to the graphene transistor, which induces anions to migrate to ion gel/graphene interfaces. Now, holes in the graphene channel dominate the charge transport and an increased channel current is observed. On the contrary, applying compression strain induces a positive piezopotential and an equivalent positive VG coupling to the graphene transistor, decreasing the channel current. In other words, tension and compression strain can induce EPSC and IPSC, respectively. With the increased numbers of the tension strain, the EPSC current will increase gradually. While with the increased numbers of the compression strain, the IPSC current will decrease gradually. Fig. 7.12B shows the variable synaptic strength by applying potentiated tension strains and depressed compression strains. The tension strains induce excitation behavior, while the compression strains induce depression behavior. Authors have also integrated two parallel PENGs to drive a graphene EGT-based synaptic transistor. Two spatiotemporal tensile strain pulses are applied on the piezotronic artificial sensory synapse. Thus, spatiotemporally correlated strain stimuli processing can be mimicked (Fig. 7.12C). Liu et al. [111] fabricated a self-powered ion-gel gated EGT-based artificial tactile sensory system actuated by a triboelectric nanogenerator (TENG). During operation, voltage was provided by a TENG. No additional voltage is needed to generate presynapse spike. Different voltages can be generated in the sensory circuit by tunning the distance between two Cu electrodes of TENG. Genetated voltages by pressure induce EDL effect between the ion-gel/channel interface which changes channel conductances. Fig. 7.12D schematically shows the operation mechanism of self-power-synaptic

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Figure 7.12 (A) Schematic diagram of a self-powered EGT-based artificial tactile sensory system actuated by a PENG. (B) Variable synaptic strength by applying potentiated tension strains and depressed compression strains on PENG. (C) Spatiotemporally correlated strain stimuli processing mimicked by integrating two parallel PENGs. (D) Operation mechanism of SPST integrated with a TENG and an EGT. (E) Transition from STP to LTP realized by increasing the number of press stimuli on TENG. (F) Pavlovian conditioning emulated on a SPST system integrated with two parallel TENGs and an EGT. Source: (A
C) From Y.H. Chen, G.Y. Gao, J. Zhao, H. Zhang, J.R. Yu, X.X. Yang, et al. Piezotronic graphene artificial sensory synapse, Adv. Funct. Mater. 29 (41) (2019) 1900959 [110]. (D
F) From Y. Liu, J. Zhong, E. Li, H. Yang, X. Wang, D. Lai, et al. Self-powered artificial synapses actuated by triboelectric nanogenerator, Nano Energy 60 (2019) 377
384 [111].

transistor (SPST). As the number of press stimuli on TENG increases, the transition from STP to LTP can be realized on the SPST (Fig. 7.12E). When two parallel TENGs were coupled to one synaptic EGT, Pavlovian conditioning can also be emulated by establishing the association between two TENGs (Fig. 7.12F). One TENG (T1) using PMMA as the dielectric layer was deemed as “Ring bell,” while

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another TENG (T2) using PDMS as the dielectric layer was deemed as “Food,” The “salivation” response (EPSC current) threshold is set at 1 μA. When just touches T1, EPSC value was always below 1 μA, indicating that no “salivation” response is observed. When just touches T2, EPSC value was always above 1 μA. Thus, indicating the “salivation” response. After training the system for 10 times, EPSC value increases to 2.2 μA, indicating the association between T1 and T2. After training for 2 min, an individual T1 can result in an EPSC value of approximately 1.9 μA, revealing the establishment of condition response. Furthermore, extinction behaviors were also observed. The observation could also be deemed as tactile study, which was particularly advantageous for neuromorphic engineering.

7.5

Multigate neuromorphic transistors and dendrite integration

As discussed in Section 7.2.1, neurons can receive multi-prespikes from dendrite synapses and executing spatiotemporal integration [23,24]. When the integrated signal arrives at a certain threshold, the neuron will transfer a spike to a postneuron through axon. Thus, a neuron is an integrator and dendritic integration process is expected [35]. Therefore, it is interesting to fabricated neurmorphic devices with multiple presynaptic terminals for neuromorphic platform applications. Moreover, information processing in neural systems is in spatiotemporal manner. Such spatial and temporal dynamics contribute to higher complexity neural network functionalities [112]. Interestingly, there are long-term coupling effects in ionic-conducting electrolyte. When multigates are introduced in EGTs, spatiotemporal integration behaviors can be observed on electrolyte-gated neuromorphic devices.

7.5.1 Dendritic integration Recently, an artificial synapse array is proposed by using nanogranular SiO2 proton conductor as gate dielectric [41]. As schematically shown in Fig. 7.13A, multigates are deemed as presynapses to receive presynaptic spikes, while multichannels with drain and source electrodes are deemed as postsynapses. Due to the lateral proton gating effects for nanogranular SiO2, presynapses and postsynapses are all intercoupled without the needs of complicated intentional hard-wire connection [113]. Thus, a simple artificial neural network (ANN) is established. Fig. 7.13B shows network of the simplified synapse arrays. Fig. 7.13C shows a simplified ANN. It is well known that dendritic integration includes spatial summation and temporal summation [114]. Fig. 7.13D schematically shows the method to measure spatiotemporal integration. When applying spatiotemporal spikes on two presynapses, postsynaptic currents are detected on the channel with a constant Vds. Here, the PSC currents exhibit spatiotemporal dynamic logic behaviors. Fig. 7.13E shows the EPSCs triggered by presynaptic spike 1 and presynaptic spike 2, respectively. Fig. 7.13F shows the measured spatiotemporal integration behavior. In such an

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Figure 7.13 (A) Schematic diagram of inorganic proton conductor gated artificial synapse arrays. (B) Simplified synapse arrays. (C) A simplified ANN based on (A). (D) Schematic diagram of the method to measure spatiotemporal integration. (E) EPSCs triggered by presynaptic spike 1 (0.5 V, 20 ms) and presynaptic spike 2 (1.0 V, 20 ms), respectively. (F) Spatiotemporal dynamic logic triggered by two spatiotemporal spikes applied on two presynapses. (G) Schematic diagram to obtain synaptic integration. (H) EPSCs triggered by presynaptic spikes applied on G1 and G2 with a modulatory spike (Vm). (I) Measured Psum as a function of (P1 1 P2). Source: (D
F) From L.Q. Zhu, C.J. Wan, L.Q. Guo, Y., Shi, Q. Wan, Artificial synapse network on inorganic proton conductor for neuromorphic systems, Nat. Commun. 5 (1) (2014) 3158 [41]. (G
I) From L.Q. Zhu, H. Xiao, Y.H. Liu, C.J. Wan, Y. Shi, Q. Wan, Multi-gate synergic modulation in laterally coupled synaptic transistors, Appl. Phys. Lett., 107 (14) (2015) 143502 [118].

ANN, the synaptic weight and the synaptic facilitation behaviors can also be altered by presynapse to postsynapse distance. As are interesting for synaptic network construction. In neural systems, specific synaptic algorithm results in specific output patterns [115
117]. When two presynaptic spikes were applied on two presynapses simultaneously, synaptic integration is observed (Fig. 7.13G) [118]. Fig. 7.13H shows the EPSCs measured with a modulatory spike (Vm) of (20.2 V, 20 ms). P1 and P2 are approximately 0.51 and 0.54 μA, respectively. The measured sum is approximately 1.38 μA ( . P1 1 P2), indicating superlinear synaptic integration. When the modulatory terminal is biased by modulatory spike with different amplitudes, both superlinear integration and sublinear integration are demonstrated (Fig. 7.13I). Due to the nonlinear integration behaviors, dynamic logic “AND” and

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logic “OR” were also observed on the proposed ANN [119]. Qian et al. [120] designed multigate P3HT OECTs. Spatiotemporally outputs were also exhibited by applying spikes on two different gates. Fu et al. [121] also fabricated similar multiterminal organic transistors. They deemed two presynaptic spikes applied on two gates as condition stimulus (23 V in amplitude simulating “bell ringing”) and unconditioned stimulus (25 V in amplitude simulating “sight of food”), respectively. Thus, Pavlov’s learning behaviors were simulated.

7.5.2 Neuronal arithmetic Neuronal arithmetic is always associated with dendrite integration. Neural coding reflects the relationship between the stimulus and neuronal responses. It can be classified into two categories: temporally correlated coding and frequency coding [122,123]. In synaptic responses, the driving input will make the neuron fire strongly and the modulatory input will adjust the effectiveness of the driving input [124,125]. Such synaptic morphologic modulation contributes to the diversity of synaptic plasticity. Such dynamic characteristics are also the basis for the complex recognition behavior of our brain. It promotes the innovation of neural morphology and synaptic devices. Thus, the dynamic regulation of synaptic plasticity on hardware devices is important for neuromorphic platform. Fig. 7.14A schematically shows an oxide-based neuromorphic transistor with multigate configuration [118]. Lateral gates can receive driving inputs to trigger postsynaptic currents. While one lateral gate is deemed as modulatory terminal (Gm). Thus, the bias on Gm will modulate the effectiveness of the driving inputs. Fig. 7.14B shows an EPSC response. Two presynaptic spikes (1.0 V, 10 ms) act as driving inputs. The second EPSC is higher than first one, that is, 1.2 versus 0.93 μA. Vm can also modulate PPF index (Fig. 7.14C). Fig. 7.14D schematically shows graphene oxide
coupled neuron transistors for brain-like cognitive system applications [126]. When applying spikes on two in-plane gates, both superlinear and sublinear integrations were obtained by modulating the spike amplitudes (Fig. 7.14E). Furthermore, neural arithmetic was implemented on an individual neuron transistor. Fig. 7.14F shows typical EPSC output in response to two spike trains with Poisson distribution with spike rate of 40 spikes/s applied on G1 and G2. Moreover, modulatory input (Vm) can modulate neural input
output (I
O) relationship (Fig. 7.14G). Due to the different slopes at different Vm values, neural I
O relationships are likely to be multiplicative operation. They also designed flexible neuromorphic transistors for mimicking lobula giant movement detector (LGMD) neuron, as schematically shown in Fig. 7.14H [127]. In nerve system, LGMD neuron is important for our body to generate escape behaviors [128]. Fig. 7.14I illustrates the response of the neuromorphic device when object moves toward the photoreceptor array. The proposed LGMD visual system has potential applications in collision avoidance.

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Figure 7.14 (A) Laterally coupled oxide neuromorphic transistor. (B) A typical EPSC response. (C) Vm dependent PPF index. (D) Graphene oxide
coupled neuron transistors. (E) Superlinear and sublinear integrations. (F) Typical neural output in response to two spike trains applied on G1 and G2. (G) I
O relationship at different Vm values. (H) Schematic diagram of neuromorphic module for emulating LGMD neuron. (I) Response of the neuromorphic transistor on a moving object. Source: (A
C) From L.Q. Zhu, H. Xiao, Y.H. Liu, C.J. Wan, Y. Shi, Q. Wan, Multi-gate synergic modulation in laterally coupled synaptic transistors, Appl. Phys. Lett. 107 (14) (2015) 143502 [118]. (D
G) From C.J. Wan, L.Q. Zhu, Y.H. Liu, P. Feng, Z.P. Liu; H.L. Cao, et al., Proton-conducting graphene oxide-coupled neuron transistors for brain-inspired cognitive systems, Adv. Mater. 28 (18) (2016) 3557
3563 [126]. (H) and (I) From C.J. Wan, Y.H. Liu, P. Feng, W. Wang, L.Q. Zhu, Z.P. Liu, et al., Flexible metal oxide/graphene oxide hybrid neuromorphic transistors on flexible conducting graphene substrates, Adv. Mater. 28 (28) (2016) 5878
5885 [127].

7.5.3 Orientation selectivity Output spiking rate of visual cortex cells will selectively be changed depending on the light stimulus with different orientation [129,130]. Thus, it is related to cognition behavior and visual orientation recognition behavior. The processing of stimulus pattern can achieve the conversion between sensory and motion conversion. Therefore, realization of orientation selectivity on hardware devices would provide new approaches for introducing intelligent visual recognition based on neuromorphic electronics.

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Malliaras et al. [131] designed PEDOT:PSS-based OECT with 3 3 3 gates. They defined the gate position as G(x, y). When applying voltage pulses at gate electrodes with coordinate of (x 5 1, 2, 3; y 5 2), the orientation angle is defined as 0 . Similarly, when applying voltage pulses at gate electrodes with coordinate of (x 5 1, 2, 3; y 5 x), the orientation angle is defined 45 . Voltage pulses are applied concurrently at three different gates to reproduce spatial pulse. Such spatial patterns of input voltage produce orientation resolved outputs. An obvious orientation selectivity is observed, analogous to that in visual system. The relaxation time tR for the triggered currents by spatial patterns is also calculated. Similarly, an obvious orientation selectivity is observed. Gao et al. [120] also defined variable orientation on multigate P3HT ECTs (Fig. 7.15A). Two gates (0, x: x 5 1
6) defines an orientation. Fig. 7.15B shows the polar diagram of the EPSC values. The polar diagram demonstrates the orientation dependent EPSC. Similar orientation dependent behaviors have been observed in primary visual cortex [132]. They also designed ionic liquid
gated MoS2 transistor with 3 3 3 lateral gates [133]. With three gates of G (x, y), G(0, 0), and G(x0 , y0 ), an orientation is defined. Similarly, orientation resolved synaptic responses are observed by applying spatial patterned pulses. Moreover, spatiotemporally information is obtained, including synaptic currents, nonlinear integration, dynamic logic operation, and neuronal I
O relationships. These functions have several potential applications, including intelligent electronic eyes, multifunctional robotics and auxiliary equipment for visually disabled people.

7.6

Conclusions and outlook

Recently, with the spring up of new material technologies and new conceptual devices, neuromorphic devices have been proposed. New biological synaptic functions have been continuously mimicked on these neuromorphic devices. Thus, hardware brain-like neuromorphic devices would provide new strategies for ANN applications. It is becoming an important branch of AI and neuromorphic engineering and it will inject new vitality into the developments of AIs in the future.

Figure 7.15 (A) Multigate P3HT ECTs. (B) Polar diagram of EPSC values. Source: (A and B) From C. Qian, L.A. Kong, J.L. Yang, Y.L. Gao, J. Sun, Multi-gate organic neuron transistors for spatiotemporal information processing, Appl. Phys. Lett., 110 (8) (2017) 083302 [120].

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Electrolyte-gated neuromorphic transistors possess unique ion gating behaviors, demonstrating unique interfacial ionic/electronic coupling behaviors and interfacial electrochemical process. They also possess unique priorities of concurrent learning and dendrite integration. Thus, they have great potentials in neuromorphic platforms. Here, we have highlighted recent advances in ionic-conducting electrolytegated neuromorphic transistors. The main challenges for the electrolyte-gated neuromorphic transistors are as follows. Firstly, for brain-like neuromorphic chip applications, neuromorphic transistors should be as small as possible to increase the integrity. Presently, the size of the reported neuromorphic transistors is relatively large. The devices should be scaled to sub-100 nm level. Secondly, the materials used in neuromorphic transistor should also be compatible with microelectronic technology. Thirdly, pattern recognition is closely related to AI and machine learning. Thus, pattern recognition functions should be realized on an ANN based on such neuromorphic transistors for neuromorphic engineering. At last, new conceptual neuromorphic devices may also have potential applications in brain-machine interface application. Although several synaptic functions have been mimicked on neuromorphic transistors, new neural algorithm observed in neural systems are still needed to be mimicked on such devices or ANNs. With the deep understanding of brain, new neuron function can also be emulated on neuromorphic transistors, which is highly important for neuromorphic computation. We expect the splendid future of the neuromorphic devices with ultra-low power consumption for brainlike intelligent computation.

Acknowledgments Authors would like to acknowledge the financial support from National Natural Science Foundation of China (51972316), Zhejiang Provincial Natural Science Foundation of China (LR18F040002) and the program for Ningbo Municipal Science and Technology Innovative Research Team (2016B10005).

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Guanglong Ding1, Kui Zhou1, Teng Li2, Baidong Yang2 and Ye Zhou1 1 Institute for Advanced Study, Shenzhen University, Shenzhen, P.R. China, 2Institute of Micro Optoelectronics, Shenzhen University, Shenzhen, P.R. China

8.1

Introduction

With the coming of big data period, the demand of high-performance next-generation electronic device for storing and processing the explosive growing digital information is increasing. However, due to the limits from von Neumann bottleneck and the failing of Moore’s law, conventional data processing and storage systems including materials, techniques, and concepts, may not be applicable in this information age. Some revolutionary computing technologies, including photoelectroactive memory and brain-like data processing, have been developed to overcome the present predicament. Generally, the memories and synaptic devices are driven by electric field. By introducing other external stimulus, such as light irradiation, it is possible to realize the low-power consumption, high speed, large memory window (MW), and multiple storage levels [1
5]. Therefore, it is indispensable to develop the high-performance photoelectroactive memories and synaptic devices, which are the very important components of next generation photoelectroactive memories and synaptic devices. Up to now, various kinds of materials have been studied, such as two-dimensional (2D) materials, perovskite materials, and transition-metal oxide (TMO) materials [6
9]. One-dimensional (1D) materials, including nanofibers (NFs), nanobelts (NBs), nanowires (NWs), nanorods (NRs), and nanotubes (NTs), have been widely used for developing high-performance memory and artificial synapse device due to their unique nanostructure [10
19]. Up to now, both two and three terminal memories and synaptic devices, and the simulation of various biosynaptic behaviors, including excitatory postsynaptic current (EPSC), short-term plasticity (STP), long-term plasticity (LTP), dynamic filtering, spiking time-dependent plasticity (STDP), spiking rate-dependent plasticity (SRDP), and paired-pulse facilitation/depression (PPF/ PPD), can be realized based on 1D materials. Moreover, due to the high-surface/ volume ratio and good optical/electrical characteristic, 1D materials are the appropriate choices to develop high-performance photoelectroactive memories and synaptic devices [10]. Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing. DOI: https://doi.org/10.1016/B978-0-12-819717-2.00008-4 © 2020 Elsevier Ltd. All rights reserved.

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In this chapter, we make a review about the application of common 1D materials, including TMO NWs and organic polymer NWs, in two and three terminal memories and synaptic devices, especially in photoelectroactive devices. Moreover, the common synthetic methods of 1D materials and the device fabrication methods are brief reviewed.

8.2

Synthesis of 1D materials

Using different synthetic method, 1D materials with various morphologies, crystal structures, and physicochemical properties can be achieved. These performances will influence the materials’ optoelectronic properties in a great extent. Up to now, these synthetic methods have been described in details by several review papers [20
23]. Therefore, we only give a brief introduction.

8.2.1 Synthesis of inorganic 1D material Generally, the synthetic methods of 1D materials are two main types: the top-down methods and the bottom-up methods. The top-down methods can reduce the target film lateral dimensions to nanoscale by scanning probe microscopy techniques, focused ion beam, electron beam, nanoimprinting, lithography, and other kinds of etching or ion beam milling methods [10,24,25]. The 1D materials array and heterostructure materials can be synthesized easily by top-down methods [26,27]. But the obtained materials are not single-crystalline generally [24]. Moreover, this method is usually cost-intensive and time-consuming, which may not meet requirements of modern industry and limit its usage [24,25]. Although highly ordered 1D material array is hardly obtained using bottom-up methods, these techniques including chemical synthesis and assembly of molecular building blocks, can synthesize size-controlled high-purity 1D material and controllable doping or surface functionalized heteromaterial with low cost, such as single crystal materials and heterojunction [10,20,24]. Up to now, large number of 1D materials with functional morphologies, compositions, and properties have been successfully obtained by bottom-up techniques. Generally, bottom-up methods includes two types: vapor phase growth (VPG) and solution phase growth (SPG). In normal conditions, VPG means chemical vapor deposition (CVD), which contains three processes: precursor evaporation, (precursor: usually metal or metal oxide); precursor vapor transport, using gas as carrier; and crystallization process, usually on a substrate in presence of catalysts or not [10,28]. Based on the chamber pressure, CVD can be categorized into low-pressure CVD (LP-CVD) and atmospheric pressure CVD (AP-CVD) [10,29]. Based on the existing of liquid catalysts, the crystallizing procedure can be divided into vapor
solid (VS) and vapor
liquid
solid (VLS) processes [30,31]. Apart from metals or metal oxides, metal-organic compounds can be also used as precursors, which need relatively low temperatures to be vaporized, and this technique is known as metal-organic CVD (MOCVD), which has advantages of industrial scalability, accuracy control to gas

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precursors and the possibility of doping [10,32,33]. Another relatively common VPG is pulsed laser deposition (PLD) technique, which is not only a good technique to produce thin film materials, but also a 1D materials fabrication method using inert gas to replace reactive oxygen [33]. The SPG is another important category of bottom-up techniques and has some distinct advantages: compatible with CMOS technology, low-temperature process during crystallization, and repeatable procedure [10]. According to the presence of template, SPG can be divided into template-assisted (electrophoretic deposition, electrochemical anodization, and colloidal filling) and template-free methods (hydrothermal) [21,22]. Both electrochemical anodization and electrophoretic deposition methods are based on the direct diffusion and deposition of charged reactive species, which are usually ions and nanosized charged particles for electrochemical anodization and electrophoretic deposition, respectively [22]. By optimizing the template characteristics and anodization process parameters, the ordering, morphology, area density, and aspect ratio of 1D materials can be adjusted under these two methods [34
36]. In hydrothermal technique, metal salt solution without template in an autoclave is used as precursor to synthesize 1D material under relatively highpressure and appropriate temperature (100
300 ) [10,37]. In these methods, surfactants are always adopted to promote anisotropic crystal growth, and microwave heating or ultrasonic stirring are used to assist the growth process [38,39]. In addition, as a kind of template-free method, electrospinning techniques have been also widely used to fabricate 1D materials, usually nanometer-scale in diameter [40,41].

8.2.2 Synthesis of organic 1D material The synthetic method of organic 1D materials mainly includes two types: physical vapor deposition (PVD) methods and liquid phase methods [42]. PVD methods are always used to synthesize highly crystalline organic 1D nanomaterials. To better control the saturation degree, which largely affects the dispersity and morphology of PVD products, the adsorbents such as silica gel and neutral aluminum oxide are usually used, known as the adsorbent-assisted PVD method. The liquid phase synthetic methods can be divided into two parts: self-assembly method and template-induced self-assembly method. During the former process, the molecule driving forces, including hydrogen bond, π
π stacking, van der Waals contact, etc., play an important role. Some molecules, which have week molecule driving forces, need templates to help them grow into 1D nanostructures. Moreover, using liquid phase synthetic methods, the researchers can achieve some organic 1D nanocomposites, such as doped and core/sheath nanostructures.

8.2.3 Others Carbon nanotube (CNT) is also one kind of common 1D material used in memories and synaptic devices. Lots of laboratory and scaled-up synthesis methods have been reported, including CVD, template methods, laser ablation, arc discharge, gas-phase pyrolysis, and so on [43,44]. In these methods, CVD has become the main method to produce CNTs in bulk. During the CVD process, hydrocarbon gas (such as CH4

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and methane) will be cracked into carbon and hydrogen atoms in the presence of transition-metal catalysts. And the size of catalysts is identified as the important influence factor in formation of single-walled CNTs (SWCNTs) or multiwalled CNTs (MWCNTs). For example, small size catalysts in few nanometers always result in SWCNTs, while the relatively large size catalysts (above 10 nm) are usually used to form MWCNTs [44,45].

8.3

Device fabrication

The data storage and neuromorphic devices based on 1D materials can be roughly divided into two categories: single 1D material device and 1D material networks device. To fabricate the former device, a single 1D material is deposited on a suitable target substrate by spin coating, dip dropping (“wet” method) or mechanical transfer (“dry” method), and then the electrodes are fabricated by lithographic techniques. Sometimes, the single 1D material can be transferred on the prepatterned electrodes to avoid the harmful effect on material from resist polymers and organic solvents during lithographic process. In this process, the substrate should be with high-electrical resistance and low-ions mobility to avoid leakage currents and ions doping. Moreover, ordered arrays of 1D material device can be successfully fabricated using some special material aligning and assembling methods, such as fluidic alignment [46], magnetic field alignment [47], holographic optical traps [48], AC electric fields [49], Langmuir
Blodgett technique [50], and dielectrophoresis [51]. On the contrary, alignment and assembly process are not required to fabricate 1D material networks device. In this kind of device, the materials randomly arrange on the substrate and the device can be stacked or made in planar structures [10]. In addition, grown 1D material array can be also used to fabricate functional device without lithographic process [10].

8.4

Application in photoelectroactive memory

Based on the nanoscale structures, simple preparation method, surface modifiable and other characters, 1D materials have been widely used to develop highperformance memory device. 1D inorganic materials, especially 1D TMO materials, 1D organic materials, and some other 1D materials, especially CNTs, have been assessed as materials for developing photoelectroactive memory.

8.4.1 Inorganic 1D material-based photoelectroactive memory 8.4.1.1 Two-terminal memory device Single 1D material photoelectroactive memory device Owing to the unique nanoscale structure, the data storage devices based on single 1D material show a highly localized switching phenomena, and were the most

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widely studied 1D material based planar device structure, which is convenient for studying the device working mechanism. The mechanism of these devices mainly include valence change mechanism (VCM) [52
59], electrochemical mechanism (ECM) [60
64], phase changing [65
68], and others [69,70]. Compared with the corresponding film-based device, the 1D material-based device may show relatively high performance, such as lower operating voltage [71,72]. Through some technical processes, the device performance can be improved. Lin et al. fabricated a TiO2 NW-based memristor and engineered the local charged defects concentration in TiO2 NW near the interface using a plasmonic-radiation-enhanced technique. After the treatment, the memory device avoided the electroforming process and showed a higher stability on multilevel performance [53]. Moreover, the surface treatment, such as plasma and annealing treatment can adjust the threshold voltages [70,73], increase the repeatability [73], and achieve multilevel data state [74,75]. By introducing the illumination stimulus, the resistive switching (RS) behaviors of photoactive materials-based memory devices can be well modulated [76
78]. It was pointed that the illumination stimulus can enhance the charge carrier concentration, helping decreasing the switching voltage [78]. Bandopadhyay et al. investigated the RS behaviors of single n-ZnO nanorods grown using electrochemical methods, with device structure of Pt (AFM tip)/n-ZnO/p-PEDOT:PSS/Zn-foil under two different wavelengths optical excitation (λ1 5 355 nm, λ2 5 532 nm). In this device, the varying Fermi level position dynamically affected the ionized donors local density, resulting in the effective currents. Under illumination, the higher carrier density in the ZnO not only decreased set/reset bias voltages, but also increased the switching on/off ratio, and the device showed the lower set/reset voltages under the light wavelength of 355 nm than that of 532 nm [77]. Park et al. fabricated a flexible ZnO NW-based planar RRAM with device structure of Au/ZnO NW/Au using polyimide as substrate, polydimethylsiloxane (PDMS) for encapsulation, hydrothermal method for growing ZnO NW, and mechanical transfer for device fabrication [76]. The authors proposed that the illumination stimulus (370 nm) can significantly decrease the device set voltage (from 230 to 223 V) due to the abundant photogenerated carriers, which affected ZnO NW potential profile, the free electron transport and the oxygen vacancies (OV) accumulation/dissipation. Moreover, the authors proposed that the information-storing functionality of this photoelectroactive memory device can be modulated by bending the flexible device to change the convex angles between the device and the incident light direction.

1D material array photoelectroactive memory device Aside from single 1D material, 1D material array and random networks were also used to fabricate memory device. Due to the few studies of random networks, this part emphatically introduces the 1D material array-based memory device. Due to the relatively simple device fabrication process (without lithographic process), lots of 1D material arrays, especially TMO, such as ZnO, NiO, and TiO2, have been used to fabricate high-performance memory device [14,79
84]. Like single 1D material-based devices, the array-based device performance also can be improved by some technical processes. For example, inserting interlayer [such as Pt

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and graphene oxide (GO)] in the NW materials for multilevel information storage and large on/off ratio (Fig. 8.1A and B) [83,85], polymer embedding for avoiding short circuits (Fig. 8.1C) [86], inserting TMO thin film for increasing stability [86], introducing functional materials [such as quantum dots (QDs)] for increasing stability, reliability and retention (Fig. 8.1D and E) [87], and so on. The RS behavior of 1D material array-based memory device can also be modulated by illumination stimulus. Compared with film and bulk materials, nanoscale array materials possess higher surface state densities and larger photon harvesting activity and have gotten lots of attention [14,79
81,86,88,89]. Park et al. studied the RS behaviors of ZnO nanorod (NR) arrays with device structure of fluorinedoped tin oxide (FTO)/ZnO NRs/Au [14]. In this work, the ZnO NR arrays grew on

Figure 8.1 (A) TEM image of a multilayered NiO/Pt nanowire. (B) I
V characteristics of multilayered NiO/Pt nanowire array devices after applying an increasing number of voltage pulses. (C) A schematic configuration of the ZnO nanowire RRAM device with polymer embedding layer. (D) Schematic diagram for preparing CeO2
ZnO nanocomposites devices. (B) The I
V curves of pure ZnO NR array and CeO2
ZnO composites. Source: (A and B) From reference Y.-C. Huang, P.-Y. Chen, K.-F. Huang, T.-C. Chuang, H.-H. Lin, T.-S. Chin, et al., Using binary resistors to achieve multilevel resistive switching in multilayer NiO/Pt nanowire arrays, NPG Asia Mater. 6 (2014) e85 [85], all panels reproduced and adapted under the terms of Creative Commons Attribution 3.0 License. Copyright 2014, the authors, published by Springer Nature; (C) from reference G.-H. Shen, A.R. Tandio, M.-Y. Lin, G.-F. Lin, K.-H. Chen, F.C.-N. Hong, Low switching-threshold-voltage zinc oxide nanowire array resistive random access memory, Thin Solid Films 618 (2016) 90
94 [86], the panel reproduced with permission. Copyright 2016, Elsevier; (D and E) from reference A. Younis, D. Chu, X. Lin, J. Yi, F. Dang, S. Li, High-performance nanocomposite-based memristor with controlled quantum dots as charge traps, ACS Appl. Mater. Interfaces 5 (2013) 2249
2254 [87], all panels adapted with permission. Copyright 2013, American Chemical Society.

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the FTO/glass substrate using hydrothermal methods and a 10 nm sputtering ZnO film as seed layer. Under dark conditions, the RS behaviors were not observed under 4 V, but under illumination conditions (300 W xenon light source), the device showed a typical bipolar RS behavior under 1 V. In the dark, oxygen species, such as absorbed OH, CO2, and H2O, were absorbed on ZnO NRs surface, and can capture the free carriers from NRs, converting into negative charged ions, resulting in band bending and depletion regions. At last, the formation of the OV filament was inhibited. On the contrary, under the illumination condition, photogenerated hole can combine with the absorbed negative charged oxygen species, reducing the depletion region, facilitating the formation of OV conductive filament. The experiment result that the illumination can promote the gas molecules desorption from ZnO surface was confirmed by Yang et al. [55]. Moreover, in another work, the authors indicated that the tilt angle (θ) of incident light stimulus was an important influencing factor on the transformation between resistor and memristor of ZnO NRs-based device (θ: the angle between the normal and the incident light). When θ . 48.5 , such as 60 , the device showed resistor behavior, and when θ , 48.5 , such as 10 , the device showed memristor characteristic [80].

8.4.1.2 Three-terminal memory device In addition to being applied in two-terminal memory devices, 1D materials are also applied widely in three-terminal memory device, such as flash memory. Up to now, lots of 1D materials, such as CdS nanobelts (NBs) [12,13], ZnO NWs [90
92], Si NWs [93,94], In2O3 [95], GaN [96], and so on, have been used as channel materials to fabricate three-terminal memory device. The device performance can be improved by some methods. For example, using ferroelectric materials, for instance, poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)], as dielectric layer, to fabricate high-performance 1D materials-based FeFET memory device [91,93,97]; assembling functional materials, such as porphyrin molecules and Ag nanoparticles, on the 1D material surface for large MW, long retention and stable memory behaviors [94,95,98,99]. Moreover, Omega-Shaped-Gate 1D materials-based FET could show high performance, including high mobility, high on/off ratio, etc. [100]. The information storage performance of 1D materials-based device can be improved by illumination stimulus. Shao et al. fabricated a CdS NB-based memory phototransistor device and studied its memory performance (Fig. 8.2A) [13]. They found the device showed a larger MW after light irradiation of a Xe lamp for 10 s (about 30 V) compared with dark condition (about 10 V) (Fig. 8.2B), and showed a “light write, electricity erase” characteristic. And the MW was on the rise with the increase of light intensity (Fig. 8.2C). After 3600 s delay after the light irradiation, the threshold voltage shifts of the device still remain constant, indicating a good retention performance. The author indicated the working mechanism as follows (Fig. 8.2D): under the dark, the large amount trapped electrons produced a surface electric field, leading to the suppression of free carriers and low OFF current; during illumination, the photogenerated holes combined with trapped electrons under the surface electric field, leaving photogenerated electrons in materials and leading

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Figure 8.2 (A) Schematic illustration of the CdS NR-based memory phototransistor device. (B) The transfer curve of the CdS NR-based phototransistor measured in the dark after light irradiation for 10 s (190 nW/cm2), VDS 5 0.6 V. (C) The transfer curves electrical transfer characteristics of the CdS NR-based phototransistor measured in the dark after light irradiation with different intensities (0
2000 nW/cm2) for 10 s, VDS 5 0.6 V. (D) Schematic illustration of the CdS NR-based memory phototransistor. All panels reproduced and adapted under the terms of Creative Commons Attribution 4.0 International License. Source: Copyright 2019, published by Springer Nature Z. Shao, T. Jiang, X. Zhang, X. Zhang, X. Wu, F. Xia, et al., Memory phototransistors based on exponential-association photoelectric conversion law, Nat. Commun. 10 (2019) 1294 [13].

to a large ON current. Moreover, based on this memory phototransistor device, the detection of ultra-weak light can be easily realized. In another work, the same research team fabricated a CdS:Mo-CdMoO4 core
shell NB-based memory, but observed the decrease of current ON/OFF ratio from 106 (dark condition) to 4 (light condition), due to the photoinduced carriers generation and increased OFF current [101]. Similarly, the light irradiation can also affect the oxygen adsorption at the interface of ZnO NW/SiO2 and the charge trapping/detrapping process of perovskite (CH3NH3PbI3) micro/nanowire, which can be used to fabricate photoassisted memory device [102,103]. By introducing photoactive materials, nonphotoactive 1D materials can be used for fabricating photoelectroactive memory device [104,105]. Kim et al. introduced photoactive materials [6,6]-phenyl-C61-butyric acid methyl ester (PCBM) in a nanogap structure and fabricated a double-gate silicon NWbased photoactive memory transistor. The author observed that the device can achieve a lower operation voltage under white light irradiation [105]. Commonly, due to the generation of photon-generated carrier, many light-active materials can achieve an increasing conductivity under light irradiation, called

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positive photoconductivity (PPC). However, in some special cases, the conductivity can decrease under light irradiation, known as negative photoconductance (NPC). This NPC feature can be used to develop photoactive memory device [106,107]. Yang et al. fabricated a memory transistor using an InAs NW, synthesized by ultrahigh vacuum molecular beam epitaxy, as channel materials, and studied its NPC and memory character (Fig. 8.3A and B) [106]. Compared with room temperature, at low temperature, the device showed more obvious NPC feature. Under low temperature, the switching from LRS to HRS can be realized by light stimulus, and the gate voltage stimulus can activate the device switching from HRS to LRS. At 78 K, the device showed excellent endurance, long retention, and high on/off ratio (105) (Fig. 8.3C and D). The mechanism of conduction channels depletion resulted from light assisted hot electron trapping make a major contribution to this NPC phenomenon. Moreover, due to sensitive NPC feature of InAs NW with a gain of about 105, the device showed a large application potential of low-power consumption memory.

Figure 8.3 (A) SEM image of InAs single NW FET. Scale bar: 2 μm. (B) I
VSD curves under various illumination intensity. Wavelength: 500 nm, Vg 5 0 V. (C) Time trace of current after a light pulse at 78 K, VSD 5 0.1 V. (D) Memory endurance performance at 78 K. Source: All panels adapted with permission. Copyright 2015, American Chemical Society Y. Yang, X. Peng, H.S. Kim, T. Kim, S. Jeon, H.K. Kang, et al., Hot carrier trapping induced negative photoconductance in inas nanowires toward novel nonvolatile memory, Nano Lett. 15 (2015) 5875
5882 [106].

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8.4.2 Organic 1D material Because of the advantages of low cost, light-weight, and flexibility, organic 1D materials are identified as a strong candidate for nonvolatile memory. According to the characteristics of materials, the reported 1D organic-based memories mainly include two types, semiconducting memory [108
110] and ferroelectric memory [111,112]. Compared with inorganic 1D materials, the application of organic 1D materials in photoelectroactive memory device is rare. Xu et al. reported a photoactive memory device based on an organic core/sheath nanocables synthesized by self-assembly liquid phase method using coronene as “slave” molecule and photochromic 1-[2-methyl-5-phenyl-3-thienyl]-2-[2-methyl-5-(p-(methyl)phenyl)-3-thienyl]-hexafluorocyclo-pentene (MPT-MMPT-HFCP) as “master” molecule [113]. The chemical structure of photochromism molecule can transform reversibly between the closed and open ring isomers under the light of 365 and 520 nm, which can affect the conductivity of the device, resulting in HRS and LRS.

8.4.3 Others Apart from common organic/inorganic 1D materials, other 1D materials, such as 1D metal-organic frameworks [11], CNTs [15
19], and 1D metal materials [104], have been applied to develop memory device. Here, the applications of CNTs in memory are briefly introduced due to their common use. In memory field, CNTs can be both charge trapping materials and channel materials. Chiu et al. fabricated a nonvolatile memory based on the nanocomposite of conjugated rod
coil block copolymer and SWCNTs [15]. The result indicated that the device with SWCNTs had larger charge trapping ability with MW of 49.2 V (the MW of the device without SWCNTs: 35.8 V). As channel materials, CNTs are not only used to fabricate lowoperating voltage device, but also used for developing photoelectroactive memory device by combining with photoactive materials [16
19]. Brunel et al. reported a multiple resistive memory devices using CNTs as channel material and poly(3octylthiophene) (P3OT) as photoactive material [17]. The device has one gate and multichannel. Under the light irradiation and positive gate voltage, the photogenerated electrons can be captured by the dielectric layer close to the CNT/SiO2 interface. The trapped electrons can be released gradually by applying the negative gate voltage and activation voltage (positive drain voltage). By adjusting the drain voltage as activation or protection voltage, the electron trapping/detraping of different channel can be controlled, resulting in multiple resistive phenomenons.

8.5

Application in photoelectroactive synaptic device

Human brain is a low-power consumed, high efficient, and small size supercomputer and constituted of high-dense network interconnected by synapses and neurons. Inspired by its highly parallel and efficient process data way, developing the device which can mimic synaptic behaviors is important and necessary. By introducing the

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light stimulus, the performance of device can be improved. In this part, the application of 1D material in photoelectroactive synaptic device will be focused.

8.5.1 Inorganic 1D material-based photoelectroactive synaptic device 8.5.1.1 Two-terminal synaptic device Up to now, the 1D materials used in two-terminal synaptic device are mainly TMO, such as TiO2 and ZnO [79,114
116]. Xiao et al. reported a device with the structure of Au/TiO2 NB/Au based on a single TiO2 NBs synthesized by hydrothermal method [114]. Using this device, the authors successfully simulated EPSC, STP, PPF, learningforgetting, and other common synaptic behaviors. The author indicated that the competition between thermally induced spontaneous diffusion of OV and the electric field driven migration might play a leading role in the synaptic functionality realization process of this device. However, the light stimulation was not introduced in this study. O’Kelly et al. studied the synaptic performance of a synaptic device with structure of Au/single TiO2 NW/Au [115]. Under the light illumination (405 nm, 4.5 mW), the device current was significantly enhanced. Moreover, the response current under coincident the optical and voltage pulse was much higher than the sum of the currents from separate voltage and optical pulses. Based on this nonlinear conduction enhancement phenomenon, the device successfully mimicked the STDP behavior in biological systems. The mechanism study such as capping and vacuum experiments, indicated that atmospheric oxygen greatly influence the device performance, and the device neuromorphic performance can be improved by adjusting the surface environment or functionalization. In addition to single 1D material, the 1D material array can also be used in photoelectroactive synaptic device [79]. Zhou et al. studied the synaptic performance of a ZnO NR array-based device [79]. Under light irradiation, the adsorbed oxygen species on material surface can be released, resulting in the increased photocurrent. Combined light and electrical stimulation, the author successfully simulated the synaptic behavior, including EPSC, STP, and PPF, using this ZnO NR array-based synaptic device.

8.5.1.2 Three-terminal synaptic device There are several kinds of 1D materials, such as TMO, InP, InAs, and so on, have been applied to develop three-terminal synaptic device [117
120]. The 1D materials synthesized by conventional methods are uncontrollable, short, randomly distributed and can’t meet the need for fabricating high-density device arrays [117]. Kim et al. synthesized a series of TMO nano/microwire (MOW), including ZnO2, SnO2, and In2O3, using a direct-printed synthesis method, which used poly(vinylpyrrolidone) (PVP) as sacrificial polymer, metal salt hydrate as metallic precursors, and included printing and sintering two processes [117]. In this method, some parameters including the applied voltage magnitude, the solution feeding rate and the stage movement, can affect the fabrication of MOW. The synthesized MOW array are not only used for artificial synapse, but also used for fabricating gas sensor,

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Figure 8.4 Schematic of the direct-printed MOW electronics. (A) Digitally controlled printing of highly aligned and arbitrarily long wires composed of precursor and polymer; the precursor/polymer wires are converted to MOWs after high temperature calcination. Fabrication of (B) MOW field-effect transistors, (C) transparent MOW field-effect transistors, (D) all-MOW field-effect transistors, (E) MOW synaptic transistors, and (F) MOW gas sensors. Source: All panels adapted with permission. Copyright 2019, Elsevier T.-S. Kim, Y. Lee, W. Xu, Y.H. Kim, M. Kim, S.-Y. Min, et al., Direct-printed nanoscale metal-oxide-wire electronics, Nano Energy 58 (2019) 437
446 [117].

transparent FET, and so on (Fig. 8.4). Gou et al. coupled chitosan, a kinds of proton neurotransmitters, with SnO2 NW to fabricate a 1D material-based multigate planar electric-double-layer (EDL) synaptic transistors [121]. Using this device, the authors not only mimicked common synaptic functions, including EPSC, PPF, dynamic filtering, but also realized the simulation of synaptic integration. The migration of protons in chitosan EDL layer under voltage stimuli played an important role in synaptic behaviors. Moreover, by introducing light illumination, the device can keep its stability through synaptic homeostatic plasticity. However, the performance of this device will be affected under different humidity due to the hydroscopicity of chitosan. To solve this problem, Zou et al. used a thin layer of poly(ethylene oxide) and lithium perchlorate (PEO/LiClO4) as EDL to replace chitosan [122]. This device can realize the simulation of PPF, self-adaptation, and synaptic logic functions. Developing a deep-ultraviolet (DUV) active synaptic device is very important and meaningful for performing the solar blind sensitive tasks. Chen et al. fabricated a DUV active SnO2 NW synaptic transistor to mimic some important biological

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synaptic behaviors, such as EPSC, PPF, the transform from STP to LTP and STDP [119]. Moreover, the Pavlov’s learning can be realized by adjusting the stimulation of both light irradiation and voltage bias. In addition, the NPC phenomenon can also be applied in synaptic device [120]. By using the NPC character of InAs NW, Li et al. fabricated InAs NW-based synaptic phototransistor which successfully mimicked some common neuromorphic behaviors, including PPF, STP, LTP, and the transition from STP to LTP [120]. The photogenerated electrons trapped/ detrapped was regarded as a major contribution of NPC and these synaptic behaviors.

8.5.2 Organic 1D material Organic 1D material possess excellent physical and mechanical properties, and the elongated and flexible organic 1D material are promising materials for mimicking nerve fibers and even neural networks. Lee et al. reported an stretchable organic optoelectronic sensorimotor synapse system that consist a photovoltaic photodetector and a stretchable organic nanowire synaptic transistor (s-ONWST) [123]. The sONWST was fabricated using SWCNTs as S/D electrodes, styrene ethylene butylene styrene (SEBS) as substrate, ion gel composed of poly(styrene-b-methyl methacrylate-b-styrene) (PS-PMMA-PS) triblock copolymer and 1-ethyl-3methylimidazolium bis(trifluoromethylsulfonyl) imide ([EMIM][TFSI]) ionic liquid as gate dielectric, an organic nanowire composed of fused thiophene diketopyrrolopyrrole (FT4-DPP)-based conjugated polymer and polyethylene oxide as active material. Under pulse voltage, the randomly distributed anions and cations in the ion gel in the resting state can migrate and be captured at the interface of gelONW, resulting in the change of conductance. The shallowly trapped ions under a few presynaptic spike operation and redistribute to the balanced position quickly to emulate STP phenomenon. While the LTP can be observed after a series of consecutive presynaptic spike was applied. Under different strain state, this device successfully emulated some common synaptic behaviors, such as EPSC and PPF. The photodetector can output a spike voltage of 21.1 V under each visible light pulse. Combining the photodetector and s-ONWST, the PPF behavior triggered by visible light spikes can be realized. Moreover, through this optoelectronic sensorimotor synapse system, the authors can successfully convey the patterned light signals to Morse code. In addition, the organic core-sheath NW consisting of polyethylene oxide (PEO) sheath and poly(3-hexylthiophene-2,5-diyl) (P3HT) core and conducting polymer PMTAA NW [MTAA: 3-(40 ,4v-dimethyl-[20 ,2v:5v,2v-terthiophene]-3vyl) acrylic acid] were also used to develop ultralow energy consumption artificial synapse [124,125].

8.5.3 Others CNT-based transistors (CNTFETs) have been extensively studied in emulate biosynapse. Generally, the gate works as presynapse for spike input while the channel currents are used to emulate postsynaptic currents. The channel of CNT-based

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transistor device can be classified in random-network nanotubes, multiple-parallel nanotubes, or even single nanotube [126]. In 2011, Joshi et al. proposed a very simple CNTFET with parallel CNT channel which can retain the biomimetic postsynaptic potential (PSP) wave shape. However, the PSP can only last for 10 ms after a 3 ms input action potential [127]. With the development of artificial synapse, the CNTFETs with random nanotube network attract more interests because the fabrication process of integrated devices is relatively simple and accessible. The random nanotube network film can be easily prepared by drop-casting method and the channel can be defined by lithography and plasma etching. Fundamentally, the gate layer could trap or detrap the charge carriers after spike stimulation to regulate the conductance of the channel. Rational design of the gate layer could realize the biosynapse emulation. Chen’s group reported randomly CNT net channel FET-based synapse with the polymer electrolyte as gate dielectric. Under the voltage pulse on CNTFET gate, the hydrogen ions in the PEG electrolyte can react with the CNTs in the channel, which could gradually tune the bandgap of the H-modified CNTs in the range of 0
3.2 eV. This CNTFET device can mimick the simple dynamic logic, learning and memory functions (e.g., LTP/LTD and STDP) [128]. Furthermore, a neuron circuit with crossbar architecture has been fabricated by integrating these CNTFETs, which can response to spatiotemporally distributed spikes input sequence. The results showed that the CNT spiking neuron circuit has the potential to realize artificial neuron networks [129]. Besides, the multigate CNTFET has also been fabricated to emulate the multispike inputs. A printed dual-gate CNTFET was proposed for neuromorphic application. The device not only emulated PPF and high-/low-pass filtering characteristics, but also realized the AND logic by dual-gate modulation [130]. Moreover, Choi et al. developed CNTFET network associated with CMOS circuits to simulate handwriting number pattern recognition with unsupervised learning by using a simplified STDP scheme. However, the accuracy of the recognition is limited by the homogeneity and purity of CNT channel [131]. Later, they upgraded the purity of the CNT to improve the synaptic performance for more complex pattern sequence recognition [132]. Also, they predicted that, even in scaled, short-channel CNT transistors, the channel composed of a single semiconducting CNT can provide enough conductance-modulation margin. The single CNT transistor integrated circuit is still a big challenge and opportunity in artificial neuron network study. By combining CNT with photoactive materials, photoelectroactive synaptic device can be achieved [133,134]. Shao et al. reported a printed photogating SWCNT synaptic thin film transistor (TFT) [133]. The SWCNT TFT combined a lightly n-doped Si gate electrode, polymer-sorted semiconducting SWCNT channel layer (SWCNTs:P-DPPb5T 5 1:4, w:w), and Au/Ti electrode for both source and drain. Under the light irradiation, the device current decreased rapidly, while the current increased quickly and then reached a stable equilibrium state after turning off the light. This process can be explained as follows: in the dark condition, the channel current is relatively low due to the low-carrier concentrations; under the

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light irradiation, the photogating effect decrease the drain current, and meanwhile, part of light-generated carriers are trapped in the channel; in the dark condition again, the trapped light-generated carriers are released and carrier concentrations are increased, resulting in the increasing current. Using this photoactive property, the author successfully simulated EPSC, low-pass filtering, and nonvolatile memory ability.

8.6

Conclusion

With the advance in synthesis technology and the developing of material science, more and more high-performance 1D materials will be developed to meet the need ever-increasing demand of photoelectroactive memories and synaptic devices. The combination of 1D materials and other functional materials is also the promising technology for improved performance. This discussion of current application of 1D materials in memories and synaptic devices will provide a reference for the development of both 1D material and information science.

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Fan Wu1,2, He Tian1,2 and Tian-Ling Ren1,2 1 Institute of Microelectronics, Tsinghua University, Beijing, P.R. China, 2Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing, P.R. China

9.1

Introduction

9.1.1 The demand for developing photoelectroactive memories for data storage and neuromorphic computing Moore’s law [1], which describes that computing would dramatically increase in power, and decrease in relative cost, at an exponential pace, was regarded as the Bible by experts in the microelectronics field till 21st century. Benefits from the constantly updated fabrication in lithography, the deficiency of conventional von Neumann structure have been neglected. But when it comes to 21st century, it could be seen that the hard step in shortening the key node, especially in sub-90 nm node. Undoubtedly, some amazing progresses have been promoted, such as using high-K dielectric to enhance the effective oxide thickness and overcome the leakage current in the node of 45 nm [2]. Besides, when planar silicon (Si) device shows limited gate control at the node of 22 nm. Chenming Hu et al. proposed the FinFET structure and translated the planar transistor to threedimensional (3D) form [3]. Fin structure has highly increased the ability of gate control, which made it possible to produce smaller-scale devices. With the assistance of EUV lithography equipment, 10 nm and 7 nm technology have been widely used in handheld devices, even 5 nm and 3 nm technologies are under research and development [4]. It is obvious that when the key node downs to atomically thin level [5], we should consider other factors to further improve the performance of the integrated circuit. One of the most important problem is the power consumption and this problem has been highlighted by the man versus machine battle. We could regard the performance of Alphago and human brain is almost at the same level by the scores, but the former consumes more than 1.4 3 105 W/h, around 7000 times higher than that of human brain consumption (around 20 W/h) [6]. As is shown in Table 9.1, compared with CPU in computer, human brain shows limited computing speed and precision, but shows higher ratio of input and output in each unit and lower power consumption per event (BfJ) [7]. These benefits from Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing. DOI: https://doi.org/10.1016/B978-0-12-819717-2.00009-6 © 2020 Elsevier Ltd. All rights reserved.

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Table 9.1 The comparison of CPU in computer and human brain [the data of CPU in computer is based on Intel i7-8700k (2017)]. Properties

CPU in computer (i7-8700K)

Human brain

No. of basic units Speed of basic operation Power consumption Information processing mode Input/output for each unit Signaling mode

2.2 3 1010 transistors .1011 s21 B100 W Mostly serial 1 3 Digital

B1012 neurons; B1015 synapses ,103 s21 B20 W Serial and massively parallel B1000 Digital and analog

the parallel data processing, are totally different from the conventional pipelined von Neumann computing system. Besides, the learning ability of human brain shows great superiority in object recognition, which is extremely important in extracting useful information in this data explosion time [8]. Besides, “memory wall” [9], which is known as the huge difference in processing speed between microprocessor and memory, has also limited the promotion of the chip performance. The problem of memory wall occurs mainly because the low writing/reading speed of the memory device and low speed of the interface between memory cache and processor cache [10]. As is mentioned above, the problems of “memory wall” and power consumption have both limited the promotion of chip performance. And these lead us to pay more attention to nonvolatile memory, especially which could have the ability of both data storage and data processing, and neuromorphic computing. All electronic-based devices have made some progress, for example, resistive-based memristors shows both high writing/reading speed [11] and certain logic computing ability [12]. Compared with the allelectronic nature and considerable interconnect issues such as delay and power loss, photoelectroactive devices shows more promising characteristics [13]. By using optical signal, we could get data storage in parallel. Moreover, considering an optical image to be used in object recognition or other neuromorphic computing issues, the all electronicbased devices show partial distributed architecture, mainly because there still has the bus problem in processing the optical image into electronic signal [14]. We could directly use photoelectroactive synaptic devices to sensing the optical signal, in order to realize all distributed architecture, as shown in Fig. 9.1.

9.1.2 Some basics for biosynapse Before we introduce the photoelectroactive devices for nonvolatile memory and neuromorphic computing, in order to learn how neuromorphic computing works, we shall pay attention to how human brain works for an event first. The basic element for human brain is the synapse, which is presented in huge numbers (up to 1015). Synapses are structures in which the impulses of one neuron are transmitted to another neuron or to another cell. They are not only the functional connection

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Figure 9.1 Three different types to realize object real-time recognition. (A) Conventional von Neumann computer. (B) Neuromorphic computing inspired by human brain. (C) All distributed architecture inspired by biovisual system.

Figure 9.2 Biostructure with neurons and synapses. The inset shows the zoom-in image of one synapse. Each neuron has only an axon to transmit nerve impulses from the cell body to other neurons or effectors, and several dendrites, which can receive the neurotransmitters and afferent to another cell body. Source: Reproduced with permission from H. Tan, Z. Ni, W. Peng, et al., Broadband optoelectronic synaptic devices based on silicon nanocrystals for neuromorphic computing, Nano Energy 52 (2018) 422 430 [13]; H. Tian, W. Mi, X.F., Wang, et al., Graphene dynamic synapse with modulatable plasticity, Nano Lett. 15 (12) (2015) 8013 8019 [16]. American Chemistry Society, Elsevier.

between neurons, but also the key part of information transmission, learning, and recognition [15]. Biologically, they represent the connection strength between neurons by synaptic-weight modulation. As shown in Fig. 9.2, in the biological neuron network [17], each neuron has many dendrites, each dendrite might be excited or triggered, and each neuron has an axon, which is used to receive information from preneurons. When the dendrite is triggered, some of ion channels between the dendrite (preneuron) and axon (postneuron) will open. These channels allow ions to be released into cells and lead to excitatory synapses, or, in fact, in some cases, ions can be released from cells. Ions are released electronically into

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the cells, which leads to the change of voltage gradient on the membrane of the neuron. When the comprehensive effect of the voltage gradient change happens to meet this threshold on the axon, the sodium channels over here will open up, sodium floods in, and then it is obvious that the voltage there becomes very positive, which causes excitatory postsynaptic potential. When ions are released out of the cell, it will cause inhibitory postsynaptic potential, which is related to the closure of calcium channel and sodium channel. In addition, the information transport is not just limited between the dendrite and the axon, it will also occur between the dendrites and between the axons, which, as we showed above, is the most common situation. There are two types in biosynaptic system: electrical synapse and chemical synapse. Especially for electrical synapse, which is known as a gap junction, is a mechanical link between two neurons that allows for the conduction of electricity. It has a smaller size and shorter propagation time compared with the chemical synapse. For human visual system, the most important parts are the ON and OFF channels in well described signaling pathways [18]. And all mammal retinas only have one working principle: cones make synapses on cone depolarizing (ON) and hyperpolarizing (OFF) bipolar cells, which synapse on the ON and OFF ganglion cells, respectively. It means that the optical synapse plays a crucial part in visual systems [19]. Further study showed that when light stimulated on the ON ganglion cells, the current would abrupt jump (or drop) and then slowly decay, which is dominated by the optical synapse [20]. From above, some characteristics of the synapse are mentioned, such as shortterm potentiation (STP), short-term depression (STD), long-term potentiation (LTP), and long-term depression (LTD) [15]. These are main part of the synaptic plasticity, and they play a crucial role in attention, priming effect, sleep rhythm, learning, and memory. Obviously, LTP/LTD will have more stimulation and lead to more reaction, such as higher linked strength and longer time. We could consider the different between STP/STD and LTP/LTD as the time scale easily, but more should be noticed is that, short-term synaptic plasticity is related to computing function and long-term synaptic plasticity is related to learning and memory function. Besides, action potential time-based spike time-dependent plasticity (STDP) principle is a basic algorithm for connection strength between neurons. Hebbian learning rule is one kind of STDP [21] which is not symmetrical in time. It is caused by the time correlation of action potentials released by neuron units before and after contact. When the action potential released by presynaptic neurons arrives earlier than that of postsynaptic neurons, the intensity of synaptic connection will be enhanced, while when the action potential produced by presynaptic neurons is later than that of postsynaptic neurons, the related intensity of synaptic junction will be weakened. The above mentioned is one typical form of STDP principle, there are another three typical types, which is shown in Fig. 9.3. In some cases, the polarity of the synaptic-weight change is determined by the temporal order of the pre- and postsynaptic spikes (Fig. 9.3A and B). In other cases, the polarity of the synapticweight change depends only on the relative timing of the pre- and postsynaptic spikes, but not on their order (Fig. 9.3C and D) [22]. Another important short-term plasticity is paired-pulse plasticity, which is shown in Fig. 9.4. It is stimulated by two same intensity pulse with 10 ms level interval

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Figure 9.3 Four ideal STDP learning rules: (A) for asymmetric Hebbian learning rule; (B) for asymmetric anti-Hebbian learning rule; (C) for symmetric Hebbian learning rule; (D) for symmetric anti-Hebbian learning rule.

Figure 9.4 Si NC-based device structure and working principle. (A) Schematic of how this device mimics biosynapse. (B) The diagram of an array of Si NC-based devices. (C) The model for the electronic structure and carrier behavior of Si NCs. ① refers to the electron excitation by light. ② refers the trapping effect of electrons. ③ refers to the release of electrons, it takes a relative long time in dark. ④ refers the recombination process. Source: Reproduced with permission from H. Tan, Z. Ni, W. Peng, et al., Broadband optoelectronic synaptic devices based on silicon nanocrystals for neuromorphic computing, Nano Energy 52 (2018) 422 430 [13], Elsevier.

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time. Paired-pulse ratio (PPR) is widely used to indicate the direction and size of the change in the synaptic-weight change between postpulse and prepulse. When PPR . 1, it is called as “paired-pulse facilitation” (PPF); When PPR , 1, it is called as “paired-pulse depression” (PPD). They have been found to exist widely in many neural systems, such as hippocampus, cortex, thalamus, and so on [23]. The mentioned biosynapse characteristics have been realized in photoelectroactive nonvolatile memory devices, and some of the devices have achieved logic computing functions. In next part, some of the trapping-based photoelectroactive devices will be introduced, and their potential applications will be highlighted.

9.2

Trapping-based photoelectroactive devices

In this part, Si nanocrystals (NCs) with highly doped with boron (B)-based [13] and carbon nanotube (CNT)-based [24] photoelectroactive devices will be introduced. The former could effectively absorb light in a broad wavelength region from the ultraviolet (UV) to near-infrared (NIR), STP, LTP, PPF, and STDP also have been mimicked from 375 to 1870 nm. The latter discussed the different effect with different dielectric (SiO2 or TiO2) interfaced with poly(3-octylthiophene-2,5-diyl) (P3OT), and SiO2-P3OT system [25] shows both volatile and nonvolatile memory characteristic depends on the applied gate bias. Both of them are trapping-based devices. Both of the devices are introduced by the direction of device fabrication, work principle, performance, and further application.

9.2.1 Si NC-based optical synaptic devices 9.2.1.1 Device fabrication Indium tin oxide (ITO)-patterned glass was served as the substrate, and it is cleaned by detergent, deionized (DI) water, acetone, and isopropanol (IPA). Si NCs with fair dispersibility in benzonitrile are synthesized by using SiH4-based nonthermal plasma. Then Si NCs film was spin coated at 1500 rpm for 60 s, the thickness of the film is around 300 nm, and the mean size of Si NCs is approximately 7.5 nm. Then, the film was baked at 200 C for 30 min. Finally, hard mask was used and 120-nm-thicked aluminum (Al) was deposited by thermal evaporation at approximately 1026 mbar vacuum level. The device area was approximately 2 3 2 mm2. The schematic of device is shown in Fig. 9.4B.

9.2.1.2 Working principle Fig. 9.4A and B demonstrate that how the Si NC-based devices mimicked the biooptical synapse. The top electrode (Al), Si NCs, holes in Si NCs, transparent electrode (ITO) represent axon terminal, vesicle, neurotransmitter, and dendrite terminal, respectively. Holes could be considerate as neurotransmitter due to the highly borondoped Si NCs. Besides, the conductance of Si NCs or current flows in Si NCs could

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be regarded as the synaptic weight. The conductance could vary upon the stimulation of light, and thus leads to the synaptic plasticity of Si NC-based devices. Si NCs film usually exists dangling bonds at its surface. When light stimulates the device, the electrons in the Si NC valence band including its band tail will be excited to conduction band. At the same time, the photogenerated holes will enhance the nearest-neighbor hopping of the holes in Si NCs, which will increase the Si NCs current. When the stimulates ended, some photogenerated electrons will recombine with the holes immediately, other electrons will be trapped by the dangling-bonds-induced in-gap states. The trapped electrons will be released by thermal fluctuation, which will take a relative long time. Synaptic plasticity or nonvolatile memory could be realized due to how long the time it is. The whole process is shown in Fig. 9.4C.

9.2.1.3 Device performance Fig. 9.5A and B show STP performance of this device. EPSC refers to excitatory postsynaptic current, which is the photocurrent for this device. The change of EPSC could be regarded as the synaptic weight change, to some degree. Fig. 9.5A shows the change of the EPSC with the increase of the spike duration for the stimulation of a laser at the wavelength of 375 nm. The Si NC-based synaptic device exhibits EPSC in a broad wavelength region from the UV to NIR (375 1870 nm). The EPSC of this device reaches approximately 11 nA at the end of the laser spike and gradually decays to a relative low value within tens of seconds. This is similar to the EPSC behavior of a biooptical synapse. PPF behavior has also been mimicked in this device. Two interval optical pulses are served as two continuous biospiking. The interval time of the two optical pulses is 0.2 s. The laser of the optical pulses could be chosen from UV to NIR. The EPSC evoked by the second spike (A2) is significantly larger than that evoked by the first one (A1), as is shown in Fig. 9.5C. When the interval time increases from 0.2 to 10 s, PPF index (equals to PPR) decreases from 149% to 133%. The results are shown in Fig. 9.5C and D are stimulated by 375 nm laser. The decay of PPF index was fitted by double-exponential equation:     Δt PPF index 5 C1  exp 2 Δt τ 1 1 C2  exp 2 τ 2

The extracted values of τ 2 by above equation are about one order of magnitude larger than those of τ 1, as is shown in Fig. 9.5E, consistent with the decay characteristics of the PPF index in biological synapses [26]. To mimic the LTP behavior, a relative long-time optical spiking with distinct stimulate frequency acts on the device. As is shown in Fig. 9.5F, after the optical spiking, the decay of the current could be fitted by the well-known Kohlrausch function, which is well known in neuron field. Two devices connect together to further achieve STDP-like behavior, the schematic is shown in Fig. 9.6A. The anode always connects to the preneuron. The work function of Al, Si NC, and ITO is 4.6, 4.3, and 4.3 eV, individually. Due to the Schottky barrier of Al/Si NC interface and the voltage bias, the preneuron has higher barrier than that of postneuron. When the light stimulates at preneuron,

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Figure 9.5 The performance of the Si NC-based device. (A) The current change versus duration time of 375 nm laser. (B) The current response by a 2 s, 375 nm laser spike. (C) The current change by two successive 375 nm laser spike with Δt of 0.2 s. (D) Dependence of the PPR on Δt for the 375 nm laser spiking. (E) Variations of τ 1 and τ 2 deduced from the decay of the PPR with respect to the incident laser wavelength. (F) The current change by 40-s-long 375 nm laser spiking at the frequencies of 0.05 and 0.25 Hz. Source: Reproduced with permission from H. Tan, Z. Ni, W. Peng, et al., Broadband optoelectronic synaptic devices based on silicon nanocrystals for neuromorphic computing, Nano Energy 52 (2018) 422 430 [13], Elsevier.

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Figure 9.6 The STDP-like behavior of the Si NC-based device. (A) Schematic diagram of the band alignment between the electrodes and Si NC films for the intercoupled Si NC-based synaptic devices. (B) The synaptic-weight change (ΔS, equals to the photocurrent) with respect to Δt pre post for the 375 nm laser spiking. Source: Reproduced with permission from H. Tan, Z. Ni, W. Peng, et al., Broadband optoelectronic synaptic devices based on silicon nanocrystals for neuromorphic computing, Nano Energy 52 (2018) 422 430 [13], Elsevier.

the photogenerated holes will travel longer time, and will have higher probability to get recombination with electrons. This leads to the asymmetric STDP-like phenomenon, which is shown in Fig. 9.6B.

9.2.1.4 Discussion The Si NC-based device takes fully advantages of the remarkable optical properties of Si NCs. And the device has achieved many basic biooptical synapse functions. Besides, the synaptic device could be optical stimulated from UV to NIR, and the NIR region dominates the optical communications. Moreover, Si is the basic for very large-scale integration (VLSI) circuits, Si NC-based photoelectroactive synaptic device make it possible to realize the neuromorphic computing by using Si.

9.2.2 CNT-based devices for photoelectroactive memory 9.2.2.1 Device fabrication For SiO2-based CNT devices, the highly doped Si wafer with 200 nm oxide layer was firstly prepared. Then the CNT field effect transistors (FET) are fabricated by using a selective placement technique of carbon nanotubes and e-beam lithography. After CNT FET has been fabricated, P3OT was spin coated from a 0.1% solution in toluene and annealed at 100 C in air for 10 min. The schematic of device is shown in Fig. 9.7A.

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Figure 9.7 The schematic of CNT photoelectroactive memory device structure: (A) SiO2based device; (B) TiO2-based device.

For TiO2-based CNT devices, buried gate metal (Cr/Au) was first deposited on the Si/SiO2 wafer. A thin layer of titanium (5 nm) was subsequently deposited to cover the gate electrode, followed by thermally oxidization at 550 C for 10 h. The thickness of TiO2 was 10 nm which indicated the fully oxidization [27]. Then, single-wall carbon nanotubes (SWNTs) were deposited above the gate stack by dielectrophoresis (DEP) [28,29]. Drain and source metal was then deposited, and P3OT was spin coated from a 0.1% solution in toluene at 2000 rpm and baked at 80 C for 10 min. The schematic of device is shown in Fig. 9.7B.

9.2.2.2 Working principle The SiO2- and TiO2-based CNT devices show nonvolatile and volatile characteristic with optical assisted, separately. CNT-based FET shows highly p-doped which indicates the high-holes density in CNT [30]. With P3OT coated, the transfer curve right shifted, indicates higher doping level of CNT FET (Fig. 9.8A). The right shift of transfer curve could be concluded from the chemical doping or electrostatic doping. TiO2 has more holes trapping center [31], and SiO2 has more electrons trapping center. For SiO2-based CNT devices, when the light with suitable wavelength has been stimulated, some of the photogenerated electron hole pairs will separate immediately with the help of the high-electron trap state density at the P3OT/SiO2 interface. And once the light off, the trap states will not release the electrons immediately, leading to the nonvolatile memory characteristic. For TiO2-based CNT devices, TiO2 characteristics need to be considered more. TiO2 has intrinsic optoelectronic properties with the absorbance peak at around 450 nm, which is similar to the CNT. Some interesting phenomenon will be found.

9.2.2.3 Device performance The nonvolatile (SiO2-based CNT device) and volatile memory (TiO2-based CNT device) characteristic with optical assisted is shown in Fig. 9.8B and C. The cyan

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Figure 9.8 The performance of the CNT phototransistor. (A) The comparison of transfer characteristic of CNT FET (with or without P3OT). (B and C) The comparison between the transient response of SiO2-based and TiO2-based devices. VDS 5 2400 mV in (A C). (D) The band structure when light stimulates at VG , 0 V and VG . 0 V. Source: Reproduced with permission from C. Anghel, V. Derycke, A. Filoramo, et al., Nanotube transistors as direct probes of the trap dynamics at dielectric organic interfaces of interest in organic electronics and solar cells, Nano Lett. 8 (11) (2008) 3619 3625 [24], American Chemistry Society.

area is tested under the illumination of 457 nm laser, and both of the current time curve are divided into several part. As is discussed above, the SiO2-based device shows nonvolatile memory characteristic. Step (1) shows abrupt current jump, mainly due to the high-electron trap state density and the fast response time. The current gradually saturates at step (2) when the electron trap states in SiO2 layer has been fulfilled. When light off, the net charge within the polymer film slowly decays toward its initial (dark) value [steps (3)]. Besides, the trapped electrons remain at the trap states, leading to the nonvolatile memory characteristic [steps (4)]. TiO2-based device shows an abnormal drop and jump at step (5) and step (7). When the light has been stimulated, the photogenerated electron hole pairs will separate and the hole trap states in TiO2 layer will be fulfilled. The trapped states in TiO2 layer will decrease the gating effect, which will induce the current drop at step (5). At light turns off, the holes trapped in TiO2 recombine very fast with a fraction of these accumulated electrons leading to the abrupt increase in current [step (7)]. The mechanism is shown in Fig. 9.8D.

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9.2.2.4 Discussion CNT-based devices show high mobility and reach integration. Combined with organic polymer, CNT-based devices show photoelectroactive storage characteristic. Discussed with TiO2- and SiO2-based devices, the mechanisms of two different behaviors have been promoted. These devices show tremendous potential in lowcost, large-area, flexible, and transparent technologies.

9.3

Migration-based devices

In this part, some of the two-dimensional (2D) photoelectroactive devices will be introduced. One is based on the MoS2 hBN ReS2(or MoS2), and negative photoconductance (NPC) has been firstly demonstrated in this device [32]. Besides, nonvolatile memory characteristic and optical erased function could be realized. Another is based on graphene-2D perovskite-graphene structure [14]. Both STP, STD, LTP, LTD, and STDP behaviors have been realized in this synaptic device. Moreover, combined with this optical synapse, an all distributed architecture has been proposed and the image recognition has been simulated based on a two-layer neural network to further discuss the performance. Both of them are based on the migration of photogenerated electron hole pairs. And all the devices are introduced by the direction of device fabrication, work principle, performance, and further application.

9.3.1 2D tunneling phototransistor for nonvolatile memory 9.3.1.1 Device fabrication Mechanical exfoliation is an effective way to construct 2D heterostructures. The three-layer-stacked 2D structure is exfoliated by the order of MoS2, hBN, and ReS2. Poly(vinyl alcohol) (PVA) coated on polydimethylsiloxane (PDMS) was used to pick up the ReS2 and hBN flakes. Drain and source contacts (5 nm Ti/40 nm Au) are deposited through e-beam evaporation followed with standard e-beam lithography. The schematic diagram of the device with light illumination is shown in Fig. 9.9A.

9.3.1.2 Working principle MoS2 shows the transition from indirect bandgap (B1.2 eV, bulk) to direct bandgap (B1.8 eV, monolayer), but ReS2 remains direct bandgap during thinning from bulk to single-layer. As is demonstrated in Fig. 9.9A. The MoS2 flake, hBN flake, and ReS2 flake serve as floating gate, potential barrier and conduction channel, respectively.

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Figure 9.9 (A) The device structure of ReS2 hBN MoS2 heterojunction when light stimulates. (B) Dual sweep transfer curves under different back gate voltage ranges. (C) Retention of device. Electrical pulse last 1 s at Vds 5 0.1 V. (D) NPC and PPC behavior under different back gate voltage. The device is exposed to 520 nm laser with 73 μW. (E) The comparison of ReS2 hBN device (little rise by light induced, PPC) and MoS2 hBN ReS2 device (abrupt drop by light induced. NPC). Source: Reproduced with permission from Y. Wang, E. Liu, A. Gao, et al., Negative photoconductance in van der Waals heterostructure-based floating gate phototransistor, ACS Nano 12 (9) (2018) 9513 9520 [32], American Chemistry Society.

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The highly doped Si could serve as back gate. When voltage sweeps at the back gate, the electrons will drive from ReS2 to MoS2, or drive from MoS2 to ReS2, depending on the sweep direction. The current flows in ReS2 layer has a large range because MoS2 could serve as floating gate or screening layer of back gate. And this results in the nonvolatile memory. Besides, considering the traps in MoS2 layer, and the thin thickness of hBN, at certain negative bias, hole traps will be fulfilled. When the light stimulates, the photogenerated electrons in the ReS2 layer will get recombination with the trapped holes, which leading to the electric field across hBN barrier becomes weaker. And this result in NPC behavior.

9.3.1.3 Device performance As is shown in Fig. 9.9B, the electrical performance (IReS2 2 Vbackgate curve) is demonstrated. The curve was tested by dual sweep, the direction is also indicated. The higher range of Vbackgate causes bigger hysteresis, which means stable storage capability of charge in MoS2. Such alike phenomenon was also found at ReS2 hBN graphene or ReS2 hBN WSe2 2D heterojunction. These confirm that 2D heterostructures are suitable for electrical nonvolatile memory devices. Further program (230 V) and erase (30 V) processes were also tested in the MoS2 hBN ReS2 device. The on off ratio of the memory device exceeds 107 (Fig. 9.9C). The stable of both program and erase proves the stable storage capability of charge in MoS2 layer and great performance of this device. Moreover, the on off state current remains unchanged over 2000 cycles, which is more stable than other MoS2 floating gate transistors. For optoelectrical measurement, the performance compared with ReS2 hBN structure is shown in Fig. 9.9D and E. The measurement was tested under 532 nm laser with two different voltage pulses (160 V and 260 V). Both NPC and positive photoconductance (PPC) behaviors have achieved in MoS2 hBN ReS2 structure, but only PPC behavior occurs in ReS2 hBN structure. These prove the work principle of this device. For photoelectroactive memory device, the further behavior when light off was tested in Fig. 9.9F. The current gradually saturates when the light on, resulting from the recombination of the hole traps in MoS2 layer and the photogenerated electrons in ReS2 layer. And the current is stable when the light off, due to the continuous stable back gate voltage. Besides, the multibit storage by NPC is achieved by different light intensities (0.3 μW, 3 μW, and 10 μW). Different light intensity gives rise to a distinctive minimum current level, which could be regarded as the readout current state. There are four states (two-bit) defined by the current, which could further increase by higher light intensity.

9.3.1.4 Discussion Both PPC and NPC contribute to the functions realized in photoelectroactive devices. Combined PPC and NPC with gate tunable transition, this device shows

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both optical write and optical erase functions. Different from graphene [33] and black phosphorus [34], in which NPC has been found, MoS2 hBN ReS2 heterojunction benefits from the floating gate structure. Besides, multibit storage has been reached by varying optical power intensity. Tunneling phototransistor shows promising performance of light-controllable multibit nonvolatile memory applications

9.3.2 Perovskite device as artificial eye 9.3.2.1 Device fabrication Highly doped Si with 300 nm thick thermal oxidation SiO2 layer serves as substrate. The monolayer graphene was first exfoliated. Due to the sensitivity to humidity and O2 gas, the followed exfoliation of 2D (PEA)2PbI4 single-crystal (PEA refers to phenethylammonium) perovskite and graphene was operated in the N2 glove box. The three-layer-stacked structure, including both vertical and in-plane direction, is shown in Fig. 9.10A. The source drain voltage applies at the top electrode, and the bottom electrode is grounded.

9.3.2.2 Working principle Fig. 9.10B illustrates how the perovskite device mimicked the bio-optical synapse in retina. The migration of I2 ions (or iodide vacancies) is similar to the Ca21 ions release under light illumination in bio-optical synapse. The top few-layer graphene could be regarded as the presynapse, the transparency of graphene makes the absorbance of 2D perovskite possible. The bottom single-layer graphene serves as the post-synapse, and the 2D perovskite layer could be regarded as the ion channel. Monolayer graphene, especially mechanical exfoliated, exhibits strong ambipolar characteristic. The conduction type and concentration of graphene could be highly

Figure 9.10 Biological and 2D synapses. (A) Schematic of the optical synaptic device. The 520 nm laser light is applied as input synaptic signal. The current flows in graphene is considered to be postsynaptic current. (B) The schematic showing the good analogy between biooptical synapse in retina region and 2D perovskite optical synapse. Source: Reproduced with permission from H. Tian, X. Wang, F. Wu, et al., High performance 2D perovskite/graphene optical synapses as artificial eyes, in: IEEE International Electron Devices Meeting (IEDM), 2018, pp. 38.6.1 38.6.4 [14], IEEE.

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tuned by the back gate. When positive (negative) back gate applies, the fermi level of the monolayer graphene will higher (lower) than the Dirac point, resulting in hole (electron) conduction. Both graphene and 2D perovskite have great optical properties. Due to the higher responsivity and thicker thickness, the photogenerated electron hole pairs in 2D perovskite layer dominates in this device. Depending on the polarity and value of the applied bias on the top monolayer graphene, the direction and intensity of the electric field change. When the light stimulates at the device, the photogenerated electron hole pairs will separate due to the electric field and the activation energy of the iodide ions in 2D perovskite layer decreased [35]. When the light stops illumination, the I2 ion concentration will slowly change due to the continuous voltage bias, resulting in synaptic-like behaviors.

9.3.2.3 Device performance The responsivity versus power under VDS 5 20.5 V of 2D perovskite is tested under 520 nm laser varying from 7.4 nW to 2.8 μW in Fig. 9.11A. The dotted black line shows the coincidence of CB and VB of graphene at the gate bias of 12 V. Further discussion indicates the linear photoresponsivity versus power, this also proves the high quality of 2D perovskite (Fig. 9.11B). Contributed by the top graphene covered as the protection layer, the device shows great stability in air for more than 70 days, as is shown in Fig. 9.11C. Optical synaptic behaviors are shown in Fig. 9.11D H. As mentioned above, the light stimulates above the top graphene. Two optical pulses with small interval time apply at the device, the PPF behavior is highly mimicked. The PPF schematic is shown in Fig. 9.11D, and the performance is shown in Fig. 9.11E. For STDP-like behavior, electric pulse and light pulse refer to the postspike and prespike (Fig. 9.11F). And the weight change refers to the conductance change of the bottom graphene (Fig. 9.11G). The fitted lines of STDP show decay time constants of 96 ms and 37 ms in potentiation and depression (Fig. 9.11H). The same magnitude of the decay time constants matches the biosystems. LTP and LTD like behaviors are also mimicked under 20.5 V (Vg 5 0 V) and 0.5 V (Vg 5 220 V), as is shown in Fig. 9.12A and B. The comparison of optical synapse in mouse retina and this device is shown in Fig. 9.13A and B.

9.3.2.4 Further discussion To demonstrate the application of this kind of optical synaptic device, a two-layer neural network is shown in Fig. 9.13A, and the first layer of the neurons are all fabricated by this optical synaptic device, the direct light input is used instead of the electric input. By using the model of Ref. [36], the accuracy versus training epoch number is shown in Fig. 9.13B. The small mismatch of the fitted curve and experiment curve in the inset image in Fig. 9.13B contributes to the high accuracy by using simple two-layer neural network.

Figure 9.11 (A) The photoresponsivity versus back gate voltage. (B) The relation of photoresponsivity and laser power. (A) and (B) are tested under VDS 5 20.5 V condition. (C) The stability of device. The photocurrent shows almost no change for 74 days. (D) The setup for lightevoked excitatory synaptic behavior (PPF) under 0.5 V bias condition. (E) The postsynaptic current (PSC) response to two successive light spikes with the interval time of 450 ms. (F) The setup for STDP by coupling light pulse (input) and electric pulse (output). (G) The synaptic response when presynaptic light pulse is before the electrical pulse with 105 ms delay time showing LTD. (H) The summarized STDP-like behavior of the device. Source: Reproduced with permission from H. Tian, X. Wang, F. Wu, et al., High performance 2D perovskite/graphene optical synapses as artificial eyes, in: IEEE International Electron Devices Meeting (IEDM), 2018, pp. 38.6.1 38.6.4 [14], IEEE.

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Figure 9.12 (A and B) Continuously light pulses applied to the optical synapses followed by keeping the device in dark condition at 20.5 V (0.5 V) bias condition. It shows continuously potentiation (depression) during the 20 pulses with instant short-term decay and slow longterm decay in dark condition. Source: Reproduced with permission from H. Tian, X. Wang, F. Wu, et al., High performance 2D perovskite/graphene optical synapses as artificial eyes, in: IEEE International Electron Devices Meeting (IEDM), 2018, pp. 38.6.1 38.6.4 [14], IEEE.

Figure 9.13 (A) The schematic of a two-layer optical neuron network with all distributed architecture. (B) Accuracy versus training epoch number based on the optical synapse for imaging recognition. The inset shows the training curves used for optical learning process. Source: Reproduced with permission from H. Tian, X. Wang, F. Wu, et al., High performance 2D perovskite/graphene optical synapses as artificial eyes, in: IEEE International Electron Devices Meeting (IEDM), 2018, pp. 38.6.1 38.6.4 [14], IEEE.

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The reconfigurable optical synapses with 2D perovskite have very good analogy to bio-optical synapse with light-evoked excitatory/inhibitory functions. The bio-PPF, STDP behaviors, and synaptic network with both excitatory and inhibitory synapses have been demonstrated. Based on this optical synapse, the accuracy for direct image recognition is up to 80 % by simulation. This artificial optical synapse provides a good path to realize neuromorphic vision and recognition in the future.

9.4

Other photoelectroactive devices

In the past two parts, typical trapping- and migration-based photoelectroactive devices for nonvolatile memory and neuromorphic computing have been introduced. In fact, this kind of photoelectroactive devices also could be achieved by many other work principles, such as the sub-bandgap optical excitation [37] and optical charging (discharging) [38]. Ref. [39] demonstrates a unique chemical reaction-based ITO MoOx Pd photoelectroactive device for data storage and neuromorphic computing (Fig. 9.14A). When light stimulates at the device, MoOx thin film absorbs UV light from top ITO electrode, holes and electrons are generated in MoOx thin film. The holes will react with H2O, and protons (H1) will be produced. MoOx film will react with electrons and protons, and HyMoOx will be produced. The high conductance of HyMoOx will transfer high-resistance state (HRS) to stable low resistance state (LRS). When negative voltage applies at ITO electrode, protons are extracted from MoOx, and drift to Pd electrode. Pd is a well-accepted metal catalyst for oxygen reduction reaction and promotes the reaction from HyMoOx to MoOx (Fig. 9.14B). The reverse reaction transfers LRS to HRS. This device provides another way to realize nonvolatile memory, even for neuromorphic computing.

Figure 9.14 The mechanism of MoOx based photoelectroactive memory and synaptic device. (A) Schematic of the MoOx based device. Due to the simple structure, array level could be easily realized. (B) The mechanism of light-induced resistance change.

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Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

Prospect and challenge

Benefit from the strong light-matter interaction, unique physical properties (especially in flexible electric devices) and gate tunability, nanomaterials have been widely employed for optoelectronics and memory applications in recent years. The photoelectroactive devices for memory devices and synaptic devices have exhibited high photoresponsivity, stable multibit storage, and excellent retention and endurance properties. Conventional memory device such as flash memory, DRAM, or 3D-NAND memory are usually realized by electric trigger. Nanomaterials make it possible to integrate the optical sensing and data storage together as photoelectroactive nonvolatile memory, such as image sensors for artificial vision for optoelectronic circuits. For conventional image processing such as object recognition and real-time tracking, the optical signals in the images are first converted to digital electronic signals through image sensors (e.g., CCD). Then the signals transferred into synaptic array for further processing. The partial distributed architecture still remains the bus problem between the image sensors and neuron networks. The constructed opto neural network through optical synaptic devices can potentially simplify the circuitry for neuromorphic image processing and reduce the power consumption during the data transmission. Additionally, the high-integration level in optical synaptic device provides future miniaturized and power-efficient artificial eye design [40]. These photoelectroactive devices for nonvolatile memory and neuromorphic computing combine electric behaviors and sensing behaviors. Besides, there is a great potential to develop other kinds of sensing synapses, such as mechanical synaptic devices, gas synaptic devices, and acoustic synaptic devices. It is worth noting that photoelectroactive memory devices or synaptic devices focus on the device level. Array level and function integration are still required for further research. Indeed, some devices demonstrate the probability to achieve image recognition, even simulation results of accuracy, but the actual results (accuracy and power consumption) by using optical synaptic devices still need to be implemented by hardware. To realize the application in artificial intelligence, it is also necessary to consider the adaptability of the algorithm. This field is still at its fancy, most of them just demos the device performance, further synaptic-based functions need to be realized.

Acknowledgments H.T. is thankful for the support from the Young Elite Scientists Sponsorship Program by CAST (2018QNRC001) and Fok Ying-Tong Education Foundation (Grant No. 171051). This work was also supported by the National Natural Science Foundation (61434001, 61574083, 61874065, and 51861145202), National Key R&D Program (2016YFA0200400) and National Basic Research Program (2015CB352101) of China. The authors are also thankful for the support of the Research Fund from Beijing Innovation Center for Future Chip, and Shenzhen Science and Technology Program (JCYJ20150831192224146).

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Xiangyu Tian1,2,*, Wuhong Xue1,3,*, Bin Zhang2, Xiaohong Xu3, Yu Chen2 and Gang Liu1 1 School of Chemistry and Chemical Engineering, Shanghai Jiao Tong University, Shanghai, P.R. China, 2School of Chemistry and Molecular Engineering, East China University of Science and Technology, Shanghai, P.R. China, 3School of Chemistry and Materials Science, Shanxi Normal University, Linfen, P.R. China

10.1

Introduction

Along with the already coming era of big data in recent years, the total volume of the digital information generated globally is increasing sharply and more complicated, which in turn poses great challenges on the electronic memory and computing devices and chips. To continuously improve the data storage capabilities of memory devices for the huge amount of data created every day, everywhere, and by everyone, the current silicon-based integrated circuits (IC) have been pacing along the down scaling campaign, under the prediction of Moore’s law for more than half a century, to incorporate more memory cells on a single chip [1
3]. However, the latest version of the “International Technology Roadmap for Semiconductors” (ITRS) declared that the Moore’s law will soon reach its foreseeable end, as the state-of-the-art silicon devices will suffer severe physical and technologic limits at the 2
3 nm node [4,5]. In the meanwhile, when processing the complicated and unstructured information, the low efficiency and high-power consumption and latency of the classical von Neumann architecture computers, running on physically separated central processing units (CPU) and memory modules, have become increasingly prominent [6,7]. Considering these concerns, the scientific and industrial communities are making efforts on designing novel electronic gadget concepts with new device structures, building materials, operating principles, and fabrication technologies to develop the next-generation IC for high-performance data storage and computing. As a possible means of overcoming these problems, organic optoelectronic devices have been intensively explored for future memory and neuromorphic 

These authors contribute equally to this work.

Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing. DOI: https://doi.org/10.1016/B978-0-12-819717-2.00010-2 © 2020 Elsevier Ltd. All rights reserved.

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computing applications. Representative examples include resistive random access memories (RRAM) [8], organic field-effect transistor (OFET) memories [9,10], and artificial synapses [11], which usually depend on the external electric field modulation of device resistance/conductance to store and process the digital information. In comparison to the electric manipulation, the light-based signal has the merits of large operation bandwidth, ultrafast signal transmission as well as the parallelism of photonics with versatility of electronics [12,13], permitting the increased density, faster data processing, and miniaturized device dimension for optoelectronic memories. Involving optical modulation in these prototype devices, light stimuli can act as an additional input to regulate the carrier concentration in the conducting channel by the fine tuning of the wavelength, power, and duration, enriching their electrical behavior for more complicated in-memory computing tasks [14]. Light signal can also be used as outputs of optoelectronic memory device to encode the stored and manipulated electrical digits for convenient human-machine interactive via direct naked-eye visualization [15]. Due to their mechanical flexibility and ductility, easy solution processability, and the most important of all, the designability of molecular and electronic structures, polymer materials promise themselves great possibility for multifunctional optoelectronic devices, especially in portable and implantable applications. To obtain the expected light responsive characteristics, photoswitchable molecules are the fundamental building blocks and have been extensively studied for constructing novel information devices. In this chapter, we mainly introduce several lightsensitive molecular systems and their application in organic and hybrid polymer optoelectronic devices.

10.2

Organic optoelectronic materials

Generally, light irradiation will enable the majority of optoelectronic materials to present different states, wherein the electronic energy levels, electrical conductivity, and other photophysical properties will be changed. The organic optoelectronic materials are mainly classified into two categories of photochromic materials and photoconductive semiconductors, and are often suited into light-modulated memory to achieve optical programming and electrical readout. There also includes electrochromic materials which can undergo reversible change in their optical properties under the applied voltages. As a result, an electrical programming and optical readout can be achieved in optoelectronic devices based on such materials.

10.2.1 Photochromic materials Upon absorption of photons with appropriate energy, photochromic materials can interconvert between their isomers through photoisomerization. Different character of these photoisomers plays a vital role in optically switched electronic devices.

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Figure 10.1 Illustration of the most common photoresponsive molecular systems.

The most extensively studied molecules are diarylethenes, spiropyrans, dihydroazulenes, and azobenzenes (Fig. 10.1). In the photoisomerization process, diarylethenes, dihydroazulenes, and spiropyrans will undergo reversible bond rupture and formation to produce the ring-closed form or ring-opened form of their isomers, respectively. It is suggested that the molecular junction containing a self-assembled monolayer of diarylethenes can show two distinct conductance states with these isomer pair, resulting from the interconversion of conjugated state in ring-closed form and nonconjugated state in ring-opened form upon being exposed to light beams with specific wavelength ranges [16]. Theoretical studies have showed the ratio of conductance is on the order of magnitude of 102 for the ring-closed and ring-opened form [17]. Both isomers of diarylethenes-type photochromic materials can attain excellent thermal stability by combing with heterocyclic aryl group, and the endurance of photochromic cycling can be more than 104 [18]. Transient absorption experiments demonstrated that the photocyclization and cycloreversion of diarylethenes in solution and in a polymer film are very rapid process in less than a few picoseconds [19]. These properties, together with the thermal irreversibility, fatigue resistance, and rapid responses, are essential for application in optoelectronic switching devices. Singledihydroazulene molecule-based junctions can also exhibit light-triggered conductance switching, wherein the high-conducting state in ring-opened form is due to the reduced energy bandgap relative to that of ring-closed form [20]. In order to improve its reversible switching performance, thiomethyl-terminated dihydroazulene was coupled to the silver electrode weakly. The conductance states can switch between isomers of the anchored molecule by using heat and light as external stimuli [21]. Theoretical study has been done to further elucidate the underlying conductance switching mechanism based on photoinduced rearrangement of bonds in these materials. DFT calculations for spiropyran-based molecular junction show different localization of the density of states (DOS) near the fermi level (Ef) in the ring-opened form and ring-closed form, while simulated transmission spectra reveal

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that the high conductivity is resulted from the broadening of DOS and shifting toward Ef in ring-opened form [22]. However, it is noteworthy that the photochromic reaction may lead to decomposition of some molecules and the production of undesired byproducts, which deteriorates the optoelectronic materials’ stability and influences their practical device applications [23]. Unlike the above three types of molecules, azobenzenes, as one of the earlier research subjects in photochromic materials [24], can interconvert between two geometric isomers (cis-form and trans-form) without the formation or breaking of bonds with optical stimuli. When irradiated with UV
visible light, the azobenzenes and many of its derivations undergo trans ! cis isomerization. Because of the metastable nature of the cis isomer, the cis ! trans isomerization can occurs thermally or following irradiation with longer wavelength light [25,26]. The photoisomerization of azobenzene will induce remarkable change as reflected in absorption spectrum, solubility, dipole moment, and molecular geometry, which are useful for designing photoresponsive materials. In Langmuir
Blodgett film consisting of azobenzene derivatives, the orientation change caused by successive photoisomerization can produce transient displacement
current pulse [27]. Electroactive molecules have be designed and synthesized with incorporated azobenzene chromophore to endow materials with excellent photoelectric properties, while their oxidation potential and hole mobility could be reversibly regulated based on appropriate light irradiation [28,29]. Different substituent groups also affect the isomerization of azobenzene [30].

10.2.2 Photoconductive semiconductors Photoconductive semiconductors are one of the most important optoelectronic materials that have broad application prospects. Generally, light-induced excitons will be generated in these semiconductors by absorbing photons with a well-distinct energy. Excitons can be further converted into free electrons and holes, which change the electrical conductivity of materials resulting from the increase of the carrier density. The concentration of generated electrons and holes can also be controlled by wavelength, duration, and intensity of light, with the HOMO
LUMO bandgap of photoconductive semiconductors often falling into the range of UV
VIS
NIR spectrum. The designing of molecular structure can decorate materials with an expected optoelectronic property to optimize exciton generation and separation. The most studied systems in photoelectric device of such a family are phthalocyanines [9,31], pentacene [32], perylene diimides [33], porphyrins [34], perovskites [11,35], thiophene polymer [36,37], etc. (Fig. 10.2). N-type organic single crystals field-effect transistor fabricated from N,N0 -dioctyl-3,4,9,10-perylene tetracarboxylic diimide show excellent photoresponsitivity of c. 3 A/W and high photo to dark current ratio of 103, which has great potential for high-speed photoswitching applications [33]. Photodiode based on p-type pentacene thin film on n-Si also exhibits a maximum photoresponsivity of 3.87 A/W, whereas appropriate deposition temperature of pentacene further benefits the improvement of photoresponsivity [38]. However, its poor photostability imprison its application [39]. Following

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Figure 10.2 The most studied photoconductive semiconductors in optoelectronic devices.

pentacene, similar p-type photosensitive semiconductors with good photostability have been prepared for optoelectronic application [10,40]. Besides, photosensitive semiconductor copper phthalocyanine (CuPc) has been hybridized with photochromic fluorine substituted diarylethene for the preparation of OFET [9]. Under UV light illumination, the HOMO of the as-obtained ring-closed form of diarylethene can be enhanced, which can easily trap the photoinduced holes from the CuPc unity to achieve nonvolatile memory performance. The extent of hole trapping can be controlled with different gate voltage, and the retention time of light-programmed current states exceeds 104 s. Different from small molecules, polymer photosensitive semiconductors usually have narrow gap due to its improving conjugation degree, which will lead to an extended absorption into VIS or NIR range. A bulk heterojunction polymer-based phototransistor with VIS light-sensing p-type polymer and NIR light-sensing n-type polymer has been reported to achieve broadband light-sensing [41]. The maximum photoresponsivities can reach 450 mA/W for VIS light and 250 mA/W for NIR light, respectively.

10.2.3 Electrochromic materials The optical absorption of electrochromic materials can reversibly change under an applied electric filed. Differing from the transformation of photoisomers in photochromic system, the change of optical properties associates with change of redox state in electrochromic molecules (Fig. 10.3). For example, Ru(II) polypyridine complexes show eight different redox states, each of these states have their specific absorbance [42]. Osmium (Os) complex deposited on indium tin oxide (ITO) coated

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Figure 10.3 The typical electrochromic materials. (A and B) Ruthenium
amine complexes and (C and D) osmium
amine complexes.

glass has been used to construct a multistate molecular memory, in which the absorbance of metal-to-ligand charge transfer band at λ 5 510 nm can be precisely controlled by applying specific potential biases [43]. The memory states are volatile because of the short retention time in this memory device. It should be noted that the photoinduced switching is much faster than the change of redox state. The work involved in the electrochromic materials for the optoelectronic application has been carried on for higher retention times, faster response times, better signal-to noise ratios, higher on/off ratios, or increased storage capacity.

10.3

Optoelectronic memory device

10.3.1 Resistive random access memory Due to its simple device structure and process, flexible design, and high compatibility with CMOS technology, polymer resistive random access memory (or polymer resistive switching memory) provides potential possibilities as candidates for the development of next-generation data storage device. The basic operation concept of resistive switching memory is analogous to conventional flash memory. The application of external stimuli can induce the reversible resistance switch between highresistance state (HRS) and low-resistance state (LRS) of memory device. The two resistance states can be regarded as “0” and “1” in the binary system for information encoding and storage. In order to meet the needs of practical application of next-generation memories, large amounts of efforts have been devoted to improve the critical memory performance including a large on/off ratio that is resistance ratio between LRS and HRS, a fast switching speed, a low-energy consumption, a good endurance, a large storage density, etc. As part of these explorations, optoelectronic memory has enormous advantages and application prospect. By utilizing

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optoelectronic materials as active layer materials, the device characteristic can be modulated by both electrical and optical signals. The introduction of light signal can not only reduce program voltage for lowing energy consumption, but also enlarge on/off current ratio for facilitating precise detection of resistance state. In addition, optoelectronic dual-modulated memory also allows far greater storage densities and diversifies the function of device. In the past decades, the study on light-modulated memory mainly focused on organic small molecular and inorganic materials [44
47]. For example, Lee et al. constructed a flexible graphene-aryl azobenzene monolayer-graphene junction device, in which the reversible photoinduced change between trans and cis configuration can achieve two conductance state [48]. Chai et al. fabricated an optoelectronic CH3NH3PbI3
xClx memory [49]. With the assistance of light illumination, the perovskite-based memory with a configuration of Au/CH3NH3PbI3
xClx/fluorine-doped tin oxide (FTO) showed a low-operation voltage of 0.1 V. Light-induced resistive switching in ZnO/Nb-doped SrTiO3 heterojunction device can also present highly tunable ON and OFF states for multilevel data storage [50]. At present, the studies about polymer-based optoelectronic memory are limited and mainly done with hybrid polymer systems [51]. Pan et al. used a mixture of poly(3-hexylthiophene) (P3HT) and [6,6]-phenyl C61-butylric acid methyl ester (PCBM) as storage medium and fabricated Cu/P3HT:PCBM/ITO resistive memory device (Fig. 10.4A), which showed a nonvolatile rewritable memory performance with an on/off ratio of 103 [52]. However, the light illumination can induce the production of an open circuit voltage of 20.15 V in HRS and it will eliminate in LRS (Fig. 10.4B). It is demonstrated that dynamic formation/rupture of Cu filament in the device is responsible for the observed resistive switching phenomenon. Various types of multilayer homo- and heterostructured film have been fabricated through the ordered assembly of two redox-active dinuclear Ru complexes,

Figure 10.4 (A) Schematic illustration of the device configuration Cu/P3HT:PCBM/ITO; (B) I
V curves of HRS and LRS measured in dark and under light. Source: Reprint with permission from S. Gao, C. Song, C. Chen, F. Zeng, F. Pan, Dynamic processes of resistive switching in metallic filament-based organic memory devices, J. Phys. Chem. C 116 (33) (2012) 17955
17959 [52].

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Figure 10.5 (A) Chemical structures for multilayer homo- and heterofilms of Ru-NP/Ru-CP, linked by Zr ions; (B) Switching between the “0” and “1” states by applying potential pulses (0.20
0.50 V and 0.2
0.70 V) in multilayer ITO||(Ru-NP)4|(Ru-CP)4 heterofilms and corresponding photocurrent responses. Source: Reprint with permission from T. Nagashima, H. Ozawa, T. Suzuki, T. Nakabayashi, K. Kanaizuka, M.A. Haga, Photoresponsive molecular memory films composed of sequentially assembled heterolayers containing ruthenium complexes, Chem. Eur. J. 22 (5) (2016) 1658
1667 [53].

containing either tetra(pyridyl)-pyrazine (Ru-NP) or tetra(pyridyl)-benzene (Ru-CP) on ITO (Fig. 10.5A), referring to ITO||(Ru-NP)m|(Ru-CP)n or ITO||(Ru-CP)m|(RuNP)n, where m and n represent the number of layers [53]. The spectroelectrochemistry of ITO||(Ru-NP)4|(Ru-CP)4 heterofilm demonstrated stepwise interlayer electron transfer (ET) processes on the ITO electrode, charge trapping on the outer Ru-CP layer, ET blocking, and ET mediation via the inner Ru-NP layer. Meanwhile, the photons with the wavelength of 573 nm can induce ITO||(Ru-NP)4|(Ru-CP)4 heterofilm to generate a cathodic photocurrent response with an open circuit potential of 10.45 V. Interestingly, the potential pulse applied to the heterolayer can reverse the direction of the photocurrent, which make it possible to fabricate photoresponsive molecular memory device by detecting the direction of photocurrent against the external potential pulse applied on the ITO||(Ru-NP)4|(Ru-CP)4 heterofilm. As shown in Fig. 10.5B, the application of 20.5 V can lead to charge trapping on the outer Ru-CP layer to form the mixed-valence RuII
RuIII state (described as “1” state), and a potential pulse of 10.7 V can regenerate an oxidized RuII
RuIII state (described as “0” state) in the Ru-CP layer. Each state can be read by measuring the photocurrent response at 10.2 V. A novel diruthenium complex with a redox-active amine bridge has been synthesized and used to prepare a polymer film by electropolymerization [54]. The polymer film displays three redox couples accompanying different NIR electrochromism. As a result, the use of electrical input allows the access to different redox states, while the use of NIR absorption signals as outputs can distinguish the obtained redox state for realizing a ternary memory.

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Figure 10.6 (A) Micrographs of the 32 3 32 pixel detector array and schematic cross-section through a single pixel and the materials used; (B) I
V curve of the organic photodiode (OPD) under dark conditions and different illumination conditions; (C) typical I
V curve of an Alq3-based organic resistive switch (ORS) device; (D) I
V curve of a stack of an ORS on top of an OPD (circle) and I
V curve of the OPD solely under dark conditions (square); the measurement sequence is indicated by the arrows. (E) I
V curve (reverse bias) of the OPD
ORS stack for various illumination conditions. Source: Reprint with permission from reference S. Nau, C. Wolf, S. Sax, E.J. ListKratochvil, Organic non-volatile resistive photo-switches for flexible image detector arrays, Adv. Mater. 27 (6) (2015) 1048
1052 [55].

List-Kratochvil et al. reported 2-terminal photoswitchable nonvolatile multibit devices by vertically integrating an OPD consisting of region-regular poly(3-hexylthiophen-2,5diyl) (rr-P3HT) and PCBM bulk heterojunction and an ORS device with a configuration of Ag/Alq3/Ag (Fig. 10.6A) [55]. The I
V curves of the individual OPD device shows a tunable rectifying behaviors at different illumination conditions (Fig. 10.6B), while the I
V curves of individual ORS device exhibits bistable current states (Fig. 10.6C). For the as-prepared device with series structures, the bias applied on the device (Vapplied) is splitted up into a voltage drop across the OPD (VOPD) and across the ORS (VORS) (VAPPLIED 5 VOPD 1 VORS 5 ROPD  I 1 RORS  I). Resultantly, VORS can be regulated indirectly by the change of resistance of the OPD using light illumination. As shown in Fig. 10.6D, the I
V curves of integrated device only show bistable current states during positive voltage sweeping under dark conditions, attributing to the rectifying behaviors of OPD. Under illumination, the resistance of OPD can decrease to further redistribute the VORS and VOPD. A large enough VORS can trigger the resistance switching of ORS at reverse bias, and the resistance states can be modulated by various illumination conditions (Fig. 10.6E) resulting in a multibit information memory and image detector.

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10.3.2 Optical organic field-effect transistor memory As another optical memory, there are also considerable works on the study of optoelectronic OFET memories. Unlike the operation concept of resistive switching memories, the data storage function can be achieved by the trapping of photogenerated charge carriers in the additional floating gate or at the interface between the dielectric and semiconductor layers. The memory characteristics are typically represented by the change of threshold voltage due to the trapped charge carriers. In 2001, Narayan et al. revealed the effect of light incident on a poly(alkylthiophene)based OFET and demonstrated that photoirradiation can dramatically change the drain
source conductance [56]. They further utilized the optical response feature to achieve optically induced memory effects. Since then, photoactive OFETs-based memory devices have been intensively studied by employing organic semiconductors or organic/inorganic composites as composites [57
60]. In the research of polymer-based optical OFET memory, polymers are mainly incorporated with photosensitive materials for charge generation and transport or employed as floating gate or dielectric layer for charge trapping [61
64]. Liu et al. fabricated optical OFET memory using pentacene or copper phthalocyanine as photoactive semiconductor layer and polystyrene (PS)- or polymethylmethacrylate (PMMA)-coated SiO2 as dielectric layer [65]. Light illumination or gate voltage can modulate the threshold voltage to achieve multibit data storage. To minimize the device structure, two-terminal OFET with an optical gate electrode has also been fabricated using poly(3-octylthiophene-2,5-diyl)/carbon nanotube composites as photosensitive semiconductor layer for nonvolatile memory applications [66]. A novel NIR light photonic flash memory has been designed using upconverting (UC) materials, Er31, Yb31 co-doped sodium yttrium fluoride (NaYF4) nanocrystals, blended with P3HT as the semiconducting layer [67]. Under IR irradiation, UC materials can emit visible light and these emissions can be reabsorbed by P3HT to generate excitons. Consequently, an applied gate bias can separate the excitons into free electrons and holes, whereas the latter can be further trapped by UC materials to produce a large memory window. NIR light can also manipulate the capability of charge trapping for the multilevel data storage. Photosensitive polymers or polymer/nanoparticles composites have also been used as charge trapping layer for OFETs-based memory, wherein the ability of charge trapping can be modulated by light illumination. Park et al. fabricated a photoswitchable OFETs using pentacene as organic semiconductor layer and a photosensitive polymer, poly(3,5-benzoic acid hexafluoroisopropylidene diphthalimide) (6FDA-DBA-SP), as the electret layer (Fig. 10.7A) [68]. Upon white-light illumination, the as-obtained ring-opened form of 6FDA-DBA-SP has a lower HOMO/ LUMO level, which can efficiently trap the electron generated from the pentacene to show a large hysteresis loop of transfer characteristics. Based on these results, light-assisted programing and electrical erasure can be available to form bistable current states for nonvolatile memory (Fig. 10.7B). The resultant memory characteristics show a high on/off ratio of greater than 104 and a long retention time of greater than 10,000 s. Afterward, they also fabricated photoresponsive

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Figure 10.7 (A) Schematic of the device configuration and two forms of 6FDA-DBA-SP; (B) the transfer curves of the SP-OFET memory device. Source: Reprint with permission from Y.J. Jeong, E.J. Yoo, L.H. Kim, S. Park, J. Jang, S.H. Kim, et al., Light-responsive spiropyran based polymer thin films for use in organic fieldeffect transistor memories, J. Mater. Chem. C 4 (23) (2016) 5398
5406 [68].

OFETs memory using PS/C60 or polyvinylnaphthalene (PVN)/C60 composites as the photoactive floating-gate layer [69]. Photoinduced carriers from the C60 molecules can eliminate the trapped charge carriers, leading to photoinduced recovery of OFETs performance, which can render the bistable current states in OFETs for information storage and retrieval through voltage-driven programming and lightdriven erasure. A good on/off current switching behavior over 100 cycles and more than 10,000 s during retention tests have been demonstrated. Liou et al. synthesized a novel photoluminescent polyamide TPA-CN-TPE, which can show strong green emission under ultraviolet light irradiation [70]. An OFET-based memory device has been fabricated using TPA-CN-TPE as the electret layer and pentacene as the semiconductor layer. In this system, ultraviolet light irradiation can stimulate the TPA-CN-TPE to emit strong green light (B510 nm), which could be further absorbed by pentacene layer to produce excitons. An applied gate voltage (100 V) can cause the charge separation, in which electrons are trapped in the electret layer and holes remained in conductive channel. The formed photocurrent results in a large shift in threshold voltage of the transfer curve, which returns to its original state by applying a gate voltage of 2100 V. As a result, a light-induced programming and voltage-drive erasing OFETs-based nonvolatile memory can be achieved. Meanwhile, different shifts of threshold voltage in the transfer curves have been obtained by varying the intensities of ultraviolent irradiation, showing great potential for the development of multilevel information storage. Samorı` et al. designed an optically switchable organic light-emitting transistors (OSOLETs) by integrating photochromic diarylethenes (DAEs) into the lightemitting semiconducting layer of organic light-emitting transistors (OLEDs), in which polymers containing poly(9,9-dioctylfluorene-alt-bithiophene) (F8T2), poly (2-methoxy-5-(30 ,70 -dimethyloctyloxy)-para-phenylenevinylene) (MDMO-PPV), and poly(9,9-dioctylfluorene) (F8) were used to emit different ranging from blue to red (Fig. 10.8A) [71]. Ultraviolet irradiation at the wavelength of 365 nm can

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Figure 10.8 (A) Chemical structures of photochromic diarylethenes (DAE_tBu and DAE_F) and light-emitting polymers (F8T2; MDMO-PPV; F8); (B) emitting pattern created and erased within a single OSOLET. Source: Reprint with permission from L. Hou, X. Zhang, G.F. Cotella, G. Carnicella, M. Herder, B.M. Schmidt, et al., Optically switchable organic light-emitting transistors, Nat. Nanotechnol. 14 (4) (2019) 347
353 [71].

induce photoisomerization of DAEs from the ring-opened form to ring-closed form, which can efficiently trap the majority of carriers. As a result, the output current and electroluminescence can be reversibly modulated with alternative UV and VIS irradiation in all three OSOLETs. More importantly, a high-density visual information memory can be realized using an optimized combination of photoswitch and emissive polymer. As shown in Fig. 10.8B, an all-light-emitting state of F8T2/DAE OSOLETs can be switched to a dark state with a homogeneous irradiation of UV light. Afterward, a well-focused green laser beam (532 nm) can regenerate the alllight-emitting state or write a specific emitting pattern. These results demonstrate that the as-fabricated OSOLETs are promising candidates in application of integrated full-color displays and active optical memory devices.

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10.3.3 Optoelectronic logic gates In addition to the memory cells, photoelectric devices modulated by multiple inputs can be used to realize different Boolean logic operations (i.e., AND and OR, NAND and NOR) [72
74], which are the basic building blocks of modern computer systems. For example, Fig. 10.9A shows organic electrochemical transistors (OECTs) with a light-sensitive polythiophene gate electrode for logic gate applications [75]. Illumination onto the gate electrode can enhance the redox reaction in OECTs, and the oxidation of PEDOT:PSS consequently results in a higher drain
source current. Opto-logic gates are then obtained by combing two OECTs. The drain
source current of 20.07 mA was selected as the logic threshold. An appropriate gate voltage applied on the OECTs, companied with or without light illumination, can produce a low-drain current—logic state of “0,” or a high-drain current—logic state of “1,” respectively, in comparison to the predefined threshold current. It has been demonstrated that AND gate and OR gate can be

Figure 10.9 (A) Schematic of the as-prepared OECTs; (B) schematics and logic tables and circuits used for opto-logic gates, AND gates and OR gates, respectively; (C) light and electric pulse programming of a hybrid cell and the corresponding truth table; (D) set/reset flip
flop circuit built with two cross-coupled NOR logic gates. Source: Reprint with permission from B. Kolodziejczyk, C.H. Ng, X. Strakosas, G.G. Malliaras, B. Winther-Jensen, Light sensors and opto-logic gates based on organic electrochemical transistors, Mater. Horiz. 5 (1) (2018) 93
98 [75]; S.Y. Cai, C.Y. Tzou, Y. R. Liou, D.R. Chen, C.Y. Jiang, J.M. Ma, et al., A hybrid optical/electric memristor for lightbased logic and communication, ACS Appl. Mater. Interfaces 11 (4) (2019) 4649
4653 [76]; B.B. Cui, C.J. Yao, J. Yao, Y.-W. Zhong, Electropolymerized films as a molecular platform for volatile memory devices with two near-infrared outputs and long retention time, Chem. Sci. 5 (3) (2014) 932
941 [77].

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implemented by a serial or a parallel connection (Fig. 10.9B), respectively. Specifically, AND gate is defined that the output can be considered to be low when either one or none of pulses are present, and is high only when both the input pulses are present simultaneously. OR gate refers to that the output is high when either one or both the input pulses are present, and is low only when none of the pulses is present. Chen et al. recently fabricated a hybrid optoelectronic memory, integrated in a vertically stacked configuration (Au/PMMA/Ag/MoO3/P3HT:PCBM/ZnO/ITO) [76]. The applied bias and incident light can be used as two independent inputs for controlling the resistance switching characteristics, while the set voltage can also be modulated by different light intensities. This behavior allows the realization of a mixed-input optoelectronic AND gate. As shown in Fig. 10.9C, using appropriate threshold level, a set transition only occurs when both electrical and optical pulses coincide. Electrochromic polymer materials are also suitable candidates for logic circuits [74]. The absorbance intensity as output signal can be easily controlled upon applying different electric pulse inputs. Boom et al. demonstrated that an electrochromic polymer poly(3,4-ethylenedioxythiophene) (PEDOT) deposited on ITO electrode exhibits multilevel data storage read by optical output signature [78]. This memory can be represented by sequential logic circuits in the form of cross-coupled NOR gates (flip
flops). However, the only drawback of the logic device is short-retention time. Zhong et al. synthesized a NIR electrochromic polymer film on ITO through electropolymerization of the cyclometalated ruthenium
amine hybridized compound [77]. The resultant polymer films present two well-defined redox processes when the applied potential stepwise increase from 20.20 to 10.55 V and then to 11.05 V versus Ag/AgCl, in which the singly and doubly oxidized states of the film exhibit intense absorption at 1070 and 700 nm, respectively. This feature was used to build a surface-confined Set/Reset flip
flop logic circuit (Figure 10.9D) with two electric inputs (10.55 V for In1, Reset, and 11.05 V for In2, Set) and two NIR optical outputs (absorbance at 700 nm for Out1 and 1070 nm for Out2). The absence or presence of two inputs is defined as 1 or 0, while the high or low absorbance is associated with the output 1 or 0. The truth table can be seen in Table 10.1. Specifically, when both Reset and Set are low (input: 00), the output Table 10.1 Truth table for the Set/Reset flip
flop logic circuit.a #

Input 1, E 5 10.55 V (Reset)

Input 2, E 5 11.05 V (Set)

1 2 3

0 0 1

0 1 0

a

Output 1, λabs 5 700 nm

1 0

Output 1, λabs 5 1070 nm

Previous state 0 1

Only one electrochemical input can be active at a time. Source: Reprint with permission from B.B. Cui, C.J. Yao, J. Yao, Y.-W. Zhong, Electropolymerized films as a molecular platform for volatile memory devices with two near-infrared outputs and long retention time, Chem. Sci. 5 (3) (2014) 932
941 [77].

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depends on the previous state because of the long retention time of both oxidation states. Generally, great progress has been made in the research of optoelectronic memory. Compared with other new memory technologies, the polymer optoelectronic memory can provide an available multilevel information storage, a simple device structure with flexibility, faster response times and information encryption, as well as the potential in-memory logic computing capabilities.

10.4

Artificial synapses

The present state-of-the-art computer system based on von Neumann architecture has fast and efficient logic functions for structured mathematical problems. However, when facing the increasing demand of information processing, more frequent data transfer between the memory and central processing units suffer severely from the high latency and energy consumption problems. Meanwhile, the poor image thinking ability and lack of self-learning ability of the von Neumann computer are not fittable for solving unstructured and pattern recognition problems, which place significant obstacle for further improvements of the overall computing performance. In comparison to the electronic computers, human brain is a delicate and harmonious superior system which can receive, transfer, process, and syncretize information to complete the high-level function with high efficiency and ultralow power dissipation. This is made possible through the distributed parallel processing via numerous interconnected neurons. Fig. 10.10A shows a biological neural system connected by synapses [79]. When an electrical stimulation was given to a neuron, neural information is conveyed along nerve fibers in the form of series of propagating action potentials. In this process, the vesicles containing neurotransmitters are to be transported to the nerve endings and released through Ca21 channel in the

Figure 10.10 (A) Schematics of a biological synapse. (B) Schematic of a representative synaptic devices. The top electrode, Si nanocrystals and transparent electrode represent the presynaptic axon terminal, vesicle, and postsynaptic dendrite terminal, respectively. Source: Reprint with permission from H. Tan, Z. Ni, W. Peng, S. Du, X. Liu, S. Zhao, et al., Broadband optoelectronic synaptic devices based on silicon nanocrystals for neuromorphic computing, Nano Energy 52 (2018) 422
430 [79].

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presynapse during membrane potential depolarization. After passing through the synaptic cleft, these transmitters will be received to bind with the receptor molecules of Na1 channel in the postsynaptic membrane, achieving the transmission of information from a presynaptic axon terminal to a postsynaptic dendrite terminal. The strength of connection between the presynaptic axon terminal and postsynaptic dendrite terminal represent synaptic weight. The change of synaptic weight is synaptic plasticity, which refers to the cognitive ability of brain such as self-learning and memory. Synaptic plasticity mainly includes spike-timing-dependent plasticity (STDP), spike-rate-dependent plasticity (SRDP), short-term plasticity (STP), longterm potentiation (LTP), short-term depression (STD), and long-term depression (LTD). STDP suggest that the synaptic weight (Δw) is decided by the order of timing or relative timing difference (Δt) between prespikes and postspikes. The absolute value of Δw will rise with the decrease of Δt. If Δt has a positive polarity, the spike signal is potentiated, while if Δt is negative, the spike is depressed. SRDP shows that Δw can be influenced by the number of spikes. If the frequency of postspike is larger than that of the prespike, the synaptic strength is potentiated, but if it is lower than that of the prespike, the synaptic strength becomes weaker. STP reflects the temporal potentiation of synaptic weight, which will decay quickly into its original state. However, a permanent change caused by repeat stimulation represents LTP. Similarly, for the depression of synaptic weight, STD indicates the temporal decrease of synaptic weight while LTD is the permanent weakness of synaptic weight. The activity-dependent plasticity enhances the information process and memory in the brain. Inspired by brain functions, neuromorphic computing based on an artificial synapse has been proposed, which can implement better combination of computing and memory to enhance the computing performance. As show in Fig. 10.10B, an artificial synapse device mainly consists of a top electrode, an active layer, and a bottom electrode, which emulate the preneuron, synaptic, and postneuron, respectively. Charge carriers or conducting filament act as the neurotransmitter and the conductivity or resistance signify connection strength between preneuron and postneuron, which can be precisely modulated by external stimulus. Up to now, a large amount of studies have been carried out for the development of high-performance synaptic devices [80
84]. However, the electrical stimulated devices still have the limited operating speed because of the bandwidth-connection density trade-off. Compared with conventional electrical stimulus, there is a growing research interest in incorporation of light into artificial synapse devices, which can significantly improve interconnect of synaptic device and broaden the bandwidth. A photoactive azobenzene polymer poly(disperse red 1 acrylate) (PDR1A) was coupled with resistive switching ZnO nanorods to fabricated an optical tunable ITO/ZnO/PDR1A/Al memristor device [85]. Upon irradiation with wavelength- and polarization-specific light, PDR1A can undergo the contraction (linearly polarized) or expansion (circularly polarized) because of photoinduced trans
cis isomerization. The reversible change enables tuning of the conductance for the achievement of synaptic plasticity. Medium-term memory state can be obtained, following an initial irradiation by circularly polarized light for 20 min. It is a depression process

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Figure 10.11 (A) Schematic of a biological synapse and 3D schematic of the CDs/silk-based optoelectronic artificial synapse. (B) Photonic facilitation and electric depression subjected to series of optical pulses and negative gate pulses. (C
E) STP or LTP formation in the photonic synapse depending on input-photonic-pulse intensity (C) (λ 5 365 nm, duration: 5 s), duration (D) (λ 5 365 nm, intensity: 0.15 mW/cm2), and repetition interval (E) (λ 5 365 nm, duration: 0.5 s). Source: Reprint with permission from Z. Lv, M. Chen, F. Qian, V.A.L. Roy, W. Ye, D. She, et al., Mimicking neuroplasticity in a hybrid biopolymer transistor by dual modes modulation, Adv. Funct. Mater. 29 (2019) 1902374 [87].

due to the decrease of conductance. The conductance can be reset to its initial state by a linearly polarized light irradiation or a thermal relaxation process. Experiments prove that contraction via thermal relaxation is eight times slower than when devices are irradiated with linearly polarized light. Therefore, these processes are similar to STD and LTD in biological systems. Polymers can also associate with other functional materials to fabricate optoelectronic neuromorphic device [86]. Han et al. reported a hybrid biopolymer transistor synapse with silicon substrate acting as the presynaptic electrode and Au pads deposited on pentacene semiconductor layer as the postsynaptic electrodes [87]. SiO2 film works as the dielectric layer, while a photoresponsive carbon dots/silk protein (CDs/silk) blend layer can provide the photogenerated charge carriers and serve as charge trapping medium (Fig. 10.11A). Through optical and electrical stimuli, the photoelectrical transistor can emulate the synaptic potentiation by the train of 20 optical pulses and depression by the train of 20 negative pulses (Fig. 10.11B). It is also demonstrated that STP and LTP can be achieved through the adjustment of optical input. As shown in Fig. 10.11C
E, when an optical pulse with a low intensity (0.04 mW/cm2), a short duration time (1 s) or a low frequency (0.1 Hz) is applied onto the device, the triggered high-conductance state can decay with time back to the initial state, emulating a STP property of biological synapse. A

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permanent high-conductance state resembling LTP behavior can be obtained through increasing the intensity, duration time or frequency. Mechanism investigation indicates that the observed optical synapse functions originates from trapping of the photogenerated electrons from CDs in the hybrid CDs/silk film. The increase of optical pulse intensity can enhance the electron trapping capacity, stabilizing the accumulated charge, and exhibiting LTP characteristic. In addition, a variety of polymers have been employed as dielectrics in photostimulated synapse transistor. Interfacial effect between the polymer dielectrics and semiconductors, which responds to the light, also plays an important role on influencing the device performance. Huang et al. studied the interfacial effect in OFET with various of organic semiconductors and polymer dielectrics (Fig. 10.12A) [88]. High-mobility organic semiconductor dinaphtho[2,-b:20 ,30 -f]-thieno[3, 2-b]thiophene (DNTT) and 2,9-didecyldinaphtho-[2,3-b:2,3-f]thieno[3,2-b]thiophene (C10DNTT) was employed in this work. 5,50 -bis(4-n-phenyl)-2,20 -bithiophene (PTTP), 5,50 -bis(4-n-ethylphenyl)-2, 20 -bithiophene (2PTTP2), and 5,50 -bis(4-n-hexylphenyl)-2,20 -bithiophene (6PTTP6) were also studied with their same π-conjugated backbone and different side chain lengths. Dielectric polymers include poly(vinyl alcohol) (PVA), cross-linked PVA (χPVA), polylactide (PLA), and polyacrylonitrile (PAN) that contain nonpolar ether group, and polar carbonyl, hydroxyl and nitrile groups on the side chain, whose dipole moments increase sequentially. In the as-prepared OFET devices, the photosensitive performance is mainly resulted from the stimulation of illumination through an interfacial effect, rather than the intrinsic photosensitivity of the organic semiconductors. Further investigation indicates that longer side chain can provide not only a higher dark current, as the increased distance between the conducting channel and the interface can weaken the interfacial effect (Fig. 10.12B), but also a reduced OFET photosensitivity. On the other hand, the capability of interfacial trapping to charge carriers in organic semiconductors will also enhance with the increase of polarity of functional group. Variation of light-to-dark current ratio (Ilight/Idark) from below 10 to beyond 104 can be observed in different DNTT-OFETs (Fig. 10.12C). A decent dipole moments can render an appropriate interfacial trapping ability for photogenerated charge carriers, leading to a high Ilight/Idark ratio. In contrast, the dark current is high in the χPVA-DNTT OFET with a low-dipole moment, which can be ascribed to the weak interfacial trapping. The low photocurrent in PAN-DNTT OFET with a high-dipole moment can be explained in terms of photogenerated charge carrier confinement by the strong interfacial traps. As a result, shorter side chain and stronger dipole moment cause stronger shallow traps and lower mobility for the device (Fig. 10.12D). Then, a light-stimulated synaptic transistor using 2,7-dioctyl[1]benzothieno[3,2-b] [1] benzothiophene (C8-BTBT) as organic semiconductor and polyacrylonitrile (PAN) as dielectric has been fabricated to mimic the synapse behavior based on interfacial charge trapping effect [89]. The synaptic weight of the transistors can be precisely controlled by PAN-assisted hole trapping and detrapping processes at the C8BTBT/PAN interface. As shown in Fig. 10.12E, a pair of light spikes with a constant drain voltage and gate voltage can trigger excitatory postsynaptic current (EPSC). The EPSC value triggered by the latter light spike is larger than that

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Figure 10.12 (A) Construction scheme of the OFETs with a range of OSCs and polymer dielectrics; Ilight/Idark variations of (B) different OFETs along with the length of the OSCs side chain (P 5 50 mW/cm2) and (C) different DNTT-OFETs along with dipole moment of the polymer dielectrics (VDS 5 260 V, P 5 80 mW/cm2); (D) polar groups of polymer dielectric induce shallow traps with different energy levels on the interface, and only the traps with appropriate energy levels (in the middle) result in an obvious photosensitive μ change for the OFET and the OSC side chain hinders the shallow trap and leads to debilitated photoinduced μ variations for the OFET; (E) EPSCs trigged by a pair of light pulses (0.90 mW/cm2, 200 ms) with a constant Vd of 21 V; (F) PPF index as the function of light pulse interval (ΔT) with a fixed light pulse intensity of 0.90 mW/cm2 and a light pulse width of 200 ms. Source: Reprint with permission from X. Wu, Y. Chu, R. Liu, H.E. Katz, J. Huang, Pursuing polymer dielectric interfacial effect in organic transistors for photosensing performance optimization, Adv. Sci. (Weinh.) 4 (12) (2017) 1700442 [88]; S. Dai, X. Wu, D. Liu, Y. Chu, K. Wang, B. Yang, et al., Light-stimulated synaptic devices utilizing interfacial effect of organic field-effect transistors, ACS Appl. Mater. Interfaces 10 (25) (2018) 21472
21480 [89].

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triggered by the former one, which is similar to the pair-pulse facilitation (PPF) behavior in the biological synapses. The PPF index can be defined as the following equation: PPF 5 100% 3

A2 2 A 1 A1

where, A1 and A2 are the EPSC value obtained by first and second light spike. PPF decrease gradually when the inter-spike interval increases (Fig. 10.12F), indicating a short-term memory behavior. A long-term memory behavior has also been realized through tuning the light stimulation parameters. It shows fully that interfacial charge trapping effect can be considered as a feasible tool to induce synapse-like behaviors in OFETs. For emulating more complicated retinal functions, Liu et al. fabricated a lighttriggered organic neuromorphic device (LOND) through integrating light-sensing components with a ferroelectric/electrochemical modulated synapse [90]. As shown in Fig. 10.13A, poly(isoindigo-co-bithiophene) [P(IID-BT)] is employed as the channel material, while poly[(1-vinylpyrrolidone)-co-(2-ethyldimethylammonioethyl methacrylate ethyl sulfate)] [P(VP-EDMAEMAES)] is printed on P(IID-BT) using an ink jet printer and encapsulated by poly(vinylidenefluoride-co-trifluoroethylene) [P(VDFTrFE)]. The as-prepared synaptic transistor exhibits three kinds of synapse signals consisting of STP, electrochemical LTP, and ferroelectric LTP. By varying gate voltage amplitude and frequency, these synaptic plasticity can last from milliseconds, seconds to hours, respectively. To achieve the visual-perception functionalities, a light-sensitive heterojunction component consisting of green-light absorbing dioctyl substituted perylene tetracarboxylic diimide (PTCDI-C8) and NIR sensitive vanadyl phthalocyanine (VOPc) is deposited above synaptic transistors. The heterojunction shows excellent wavelength selectivity (Fig. 10.13B). Then, a voltage divider was formed by connecting the heterojunction in series to a phthalocyanine (Pc) load resistor and used to convert light intensity information to output voltage (Fig. 10.13C). Following the basic structural unit, a 5 3 6 LOND array is fabricated to adhere onto a hemispheric surface for mimicking the retinal functions under light stimuli (Fig. 10.13D). NIR light (850 nm) and green light (550 nm) spikes were irradiated on the array to evaluate the LOND’s color perception ability by signal mapping in an array. It can be seen that, after 1800 s, the obtained signal trigged by NIR illumination was hardly distinguishable (Fig. 10.13E
G), while the current signal trigged by green light can retain at least 65% of original signals (Fig. 10.13H
J), achieving a wavelength recognition function in LONDs. Lee et al. reported an organic optoelectronic sensorimotor artificial synapse based on a stretchable organic nanowire synaptic transistor (s-ONWST) [91]. To satisfy the requirements on flexibility and stretchability for soft electronic, organic nanowires (ONWs) composing of a homogeneous mixture of fused thiophene diketopyrrolopyrrole (FT4-DPP)-based conjugated polymer and polyethylene oxide was used as active material. Importantly, the small hysteresis and short memory retention of FT4-DPP-based polymer NW can perfectly mimic the short build and decay

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Figure 10.13 (A) Schematic showing a LOND cross-sectional feature; (B) PTCDI-C8/VOPc heterojunction resistance change as a function of 850 and 550 nm incident light intensity. The heterojunction displays a high sensitivity toward 550 nm than 850 nm by higher dynamic range; (C) output characteristics in the voltage divider under 850 and 550 nm incident light; (D) photograph of a conformal LOND array adhered to a hemisphere. Scale bar, 7.5 mm. (E) Signals in the LOND array are immediately recorded after NIR exposure (10.80 mW/cm2, 64 Hz for 20 s). Remnant signals in the LOND array after (F) 600 s and (G) 1800 s; (H) signals in the LOND array are immediately recorded after green light exposure (10.80 mW/cm2, 64 Hz for 4 s). Remnant signals in the LOND array after (I) 600 s and (J) 1800 s. Source: Reprint with permission from H. Wang, Q. Zhao, Z. Ni, Q. Li, H. Liu, Y. Yang, et al., A ferroelectric/electrochemical modulated organic synapse for ultraflexible, artificial visual-perception system, Adv. Mater. 30 (46) (2018) 1803961 [90].

times of biological sensorimotor synapses. As shown in Fig. 10.14A, s-ONWST was coupled with a photodetector and a polymer actuator to give an organic optoelectronic neuromuscular electronic system. Light irradiation stimulated the photodetector to generate voltage spikes that trigger the s-ONWST to produce EPSCs. EPSC was then converted to voltage inputs for operating polymer actuator. EPSC responses indicated that the synaptic plasticity of s-ONWST is insensitive to strain. A good light fidelity of s-ONWST can also allow it to be used in optical wireless communication. For neuromuscular operation, the output voltage of sONWST and displacement δ of actuator increase synchronously as the number of spikers increased (Fig. 10.14B), and the displacement can be clearly seen in digital

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Figure 10.14 (A) Photograph of organic optoelectronic synapse on an internal human structure model and configuration of organic optoelectronic synapse (photodetector and artificial synapse) and neuromuscular electronic system (artificial synapse, transimpedance circuit, and artificial muscle actuator). (B) Maximum of polymer actuator and output voltage generated by s-ONWST according to 0 # nSPIKE # 60 and (C) digital images of the polymer actuator according to 0 # nSPIKE # 100 with 0% or 100% strain. Source: Reprint with permission from Y. Lee, J.Y. Oh, W. Xu, O. Kim, T.R. Kim, J. Kang, et al., Stretchable organic optoelectronic sensorimotor synapse, Sci. Adv. 4 (11) (2018) eaat7387 [91].

images (Fig. 10.14C). Meanwhile, the s-ONWST at 100% strain still modulated polymer actuator stably. Although preliminary works have been conducted on emulating biological systems for neuromorphic computing, more efforts deserve to be devoted in this wonderful area. For instance, polymer-based neuromorphic architecture composed of various artificial synapses may eventually replace the present CMOS technology for the development of biomimetic soft electronics, in which the dual control of artificial synapses with optical and electrical means render more complex functionality in real time system.

10.5

Conclusion

The age of big data and the physical limitations of silicon microprocessors speed up the development of the novel information memory and processing technologies. The developed optoelectronic memory devices and artificial synapses as a solution have aroused more and more attentions of researches in past few years, which enable the miniaturization of device structure, higher storage density, and brain-like information processing. The introduction of light can greatly improve response time

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and enrich the device function, while organic and hybrid polymer materials render the photoelectric devices with flexible characteristic. Despite the rapid and astonishing progress, there are still numerous challenges that need to be solved to satisfy the requirements for practical applications, such as the development of novel photosensitive materials with suitable energy bandgap and broader light spectrum response, exploration of working mechanism for improving the device performance, integration with other circuit components to implement more complex functions. It is believed that organic and hybrid polymer photoelectric devices are promising candidates for future information storage memory and neuromorphic computing applications.

Acknowledgement This work was financially supported by the National Natural Science Foundation of China (61974090, 61722407, 51961145402, 51973061 and 61674153), National Key R&D Program of China (2017YFB0405600), the Natural Science Foundation of Shanghai (19ZR1474500 and 19ZR1413100), the Fundamental Research Funds for the Central Universities (50321041918013) and Huawei Technologies Co., Ltd.

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Xiaobing Yan, Jianhui Zhao, Zhenyu Zhou and Bo Zhang National-Local Joint Engineering Laboratory of New Energy Photovoltaic Devices, Key Laboratory of Optoelectronic Information Materials of Hebei Province, Key Laboratory of Digital Medical Engineering of Hebei Province, College of Electron and Information Engineering, Hebei University, Baoding, P.R. China

11.1

Introduction

Eyes are indispensable organs for human beings to observe and perceive objects outside. They are the windows for human beings to communicate with the external world. The human visual memory system is also of great importance, which stores the image information observed by human eyes into their brains to realize longterm image memory. Nearly 80% of information is received by humans through their visual perception [1]. Now a number of scientists are studying various optoelectronic devices to simulate the visual memory system of human beings. With the beginning of intelligent campaign in the post-Moore era, these advanced and intelligent multifunctional optoelectronic devices are expected to replace human vision in various fields such as science, medicine, industrial, and military, so as to improve the efficiency and accuracy of work [2
5]. In recent years, nonvolatile memristors based on metal oxides, as a promising alternative to siliconbased flash memory in the future, have attracted the attention of many researchers and large companies due to their high integration, good storage performance, and excellent retention characteristics. Under the effective electric stimulation, it can be realized that the mutual conversion between high-resistance state (HRS) and lowresistance state (LRS) of nonvolatility, also corresponds to two logical states: 0 and 1 [6
9]. Compared with electrical stimulation, optical stimulation has become more attractive in the recent years because it travels farther and is not susceptible to interference from other external signals [10
12]. The resulting photosensitive resistor switch can affect the resistance conversion performance through the parameters of external optical signal, namely, the optical signal is converted into electrical signal. Thus, it has the ability to detect optical information and generate light response, which can be used to simulate human visual perception. In addition, many researchers recently have achieved many functions, such as neural plasticity, neuromorphic computing, and so on because working mechanism of memristors is similar with information transmission behavior between the synaptic. Many scientists are using Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing. DOI: https://doi.org/10.1016/B978-0-12-819717-2.00011-4 © 2020 Elsevier Ltd. All rights reserved.

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this feature of memristors to simulate the learning and memory processes in the human brain. The modulation by light signal to control the ability above has been found, and these promising devices which have this feature can be used as optical tunable synapse to simulate human visual memory system and synaptic behavior of the nervous system. These metal-oxide based devices have high uniformity, excellent repeatability and stability, and good compatibility. In this chapter, we review recent researches and describe them in two parts: optoelectronic memristor and optogenetic tunable memristors for Boolean logic and synaptic functions. The first part is consists of four aspects: structures, characteristics, photoelectrical response, and application. First of all, we systematically combined the related structures of optoelectronic memristor based on metal oxides, because the structures largely dominate the performance of the devices. Secondly, we give a detailed description of the I
V curves characteristics and photoelectric response of devices, aiming to provide readers a good reference for future research. Moreover, the internal schematics of the devices are described in detail. The second part is the application for these oxide material photoelectron devices. The three aspects are three different function realizations and applications including optoelectronic Boolean logic, neuromorphic computing and image memorization, preprocessing, and simulation of image recognition. These introduction of functions and applications aims to make readers predict the future trend and value of the research field.

11.2

Optoelectronic memristor

The human visual system can recognize various things in nature, and visual system perception and information processing is a complex process [13
15]. Artificial vision systems usually consist of visual receptors, memory that stores visual information, and processing units, which enable image recognition and object detection [14]. In current, state-of-the-art image sensors process images in real time, but generate a lot of redundant data and increase energy consumption in the process compared with the human visual system. In the future direction of artificial vision, a new optoelectronic device has been study, which can integrate sensing, memory, and processing functions for a more efficient artificial visual system. The basic functions of optoelectronic memory devices: sensing, memory, and the conductive mechanism, will be highlighted in this section. As the sensory organ of perceived light, the eye provides important visual information to distinguish the color, size, shape, and brightness of the objects, position, and distance [15,16]. Human visual information, first through the eye to the retina for initial treatment and transferred to the brain’s visual processing area (visual center) and memorized, is illustrated in Fig. 11.1. Human eyes mainly convert optical signals into electrical signals, and then filter out useful information and send it to the brain for processing as shown in Fig. 11.1. For artificial vision systems, integrating sensing, memory, and processing functions

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Figure 11.1 Schematic diagrams of human visual system when a butterfly was observed by eyes. Source: Reproduced with permission from S. Chen, Z. Lou, D. Chen, G. Shen, An artificial flexible visual memory system based on an UV-motivated memristor. Adv. Mater. 30 (7) (2018) 1705400 [15], Copyright 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

of light will be a great challenge. Meanwhile, optoelectronic devices put high demands on the light sensitivity of materials. In numerous studies, traditional metal oxides have made positive progress in optoelectronic devices [14,15,17,18]. They use the illumination to generate the vacancy adjustment defect level to achieve the device’s perception of light changes and thus change the resistance state of the devices.

11.2.1 Structure of the optoelectronic memristor devices Fig. 11.2A shows a schematic diagram of a bioinspired visual storage unit in which the top electrode of the storage device unit is shared with one electrode of the twoterminal image sensor, connected in series to integrate a visual storage device. The device is divided into two parts: one is imaging sensor based on In2O3 material and another is Ni/Al2O3/Au structure memristor device. They combine to make a simple photomemristor. Fig. 11.2B is the schematic structure of designed two-terminal optoelectronic resistive random access memory (ORRAM) with the structure of ITO/MoOx/Pd. The inset in Fig. 11.2B is a cross-section scanning electron microscopy (SEM) image of the ITO/MoOx/Pd structure. Fig. 11.2C is the schematic structure of ITO/CeO22x/AlOy/Al memory device. And the ITO electrodes of both devices act as the top electrode of the devices and the port for the electrical operations and optical input, due to its good light transmission. And light passing through the top electrode effect the functional layer to photogenerated carrier effect, which will change the physical state of the device’s functional layer to increase defect state. Fig. 11.2D is the schematic illustration of Au/ZnO nanorods (NRs)/ZnO/ITO/ glass structured memristor. ZnO in the Au/ZnO NRs/ZnO/ITO/glass structured memristor widely known for its memristive switching characteristics, and has the

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Figure 11.2 (A) Schematic illustration of the bioinspired visual memory unit integrated by image sensor and resistive switching memory device. (B) Schematic structure of the ITO/ MoOx/Pd. Pd and ITO are the bottom and top electrodes, respectively, and MoOx is sandwiched between the bottom and top electrodes. The ITO electrode is grounded and the voltage is applied to the Pd electrode. Inset, cross-section SEM image. Scale bar, 100 nm. (C) Schematic diagram of the optoelectronic memory device with ITO/CeO22x/AlOy/Al structure. (D) Schematic diagram of the device structure and electrical configuration of Au/ ZnO NRs/ZnO/ITO/Glass. Source: (A) Reproduced with permission from S. Chen, Z. Lou, D. Chen, G. Shen, An artificial flexible visual memory system based on an UV-motivated memristor. Adv. Mater. 30 (7) (2018) 1705400 [15], Copyright 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim; (B) Reproduced with permission from F. Zhou, Z. Zhou, J. Chen, T.H. Choy, J. Wang, N. Zhang, et al., Optoelectronic resistive random access memory for neuromorphic vision sensors. Nat. Nanotechnol. 14 (8) (2019) 776
782 [14], Copyright 2019 Springer Nature Limited; Reproduced with permission from H. Tan, G. Liu, H. Yang, X. Yi, L. Pan, J. Shang, et al., Light-gated memristor with integrated logic and memory functions. ACS Nano 11 (11) (2017) 11298
11305 [18], Copyright 2017 American Chemical Society. (D) Reproduced with permission from reference S. Chen, Z. Lou, D. Chen, G. Shen, An artificial flexible visual memory system based on an UV-motivated memristor. Adv. Mater. 30 (7) (2018) 1705400 [15], Copyright 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

characteristics of surface redox reaction. The orderly, high density, columnar ZnO NRs, which grows in the ZnO buffer layer, improve the light gathering process and the storage performance of the devices because of its high surface
volume ratio caused by its special structure. Four devices can be implemented functionally

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sensing, memory, and processing functions. In contrast, two devices shown in Fig. 11.2B and C are simple in structure and more conducive to future integration.

11.2.2 I
V curves characteristics and light response The response of optoelectronic devices to light and electricity is the most basic characteristic of the device. In previous reports, they have three corresponding types: (1) A separate light sensor is oxidized to generate ions when exposed to light, providing a prerequisite for the formation of back-end resistive switching conductive filaments as shown in Fig. 11.3A; (2) SET to nonvolatile LRS by applying UV light and RESET by electrical operations as shown in Fig. 11.3B; (3) SET to one initial resistance state (IRS, blue line) from two higher resistance states (HRS, red line under conditions) by applying a light gating, and low-resistance state by restimulation of light or electricity, and RESET by electrical operations as shown in Fig. 11.3C; and inset of Fig. 11.3C is the log-scale I 2 V curve (logical 1 and 0 can be directly defined with the current levels above and below 150 pA); (4) SET to nonvolatile LRS by applying a light source at a specific light angle (10 , which is less than the total internal reflection’s incidence critical angle: 48 ) as shown in Fig. 11.3D. Fig. 11.3A shows the IV measured in the dark, which shows that the device is always in a HRS. When UV light is applied, HRS and LRS conversion can be achieved by the same applied bias voltage. Fig. 11.3B shows the black I
V curve of the device without light. When light is applied on top electrode, the device becomes LRS and can remain in a LRS until a negative voltage is applied to switch from LRS to HRS. The I
V curve as shown in Fig. 11.3C defines logic “1”and “0” as defined by the LRS and HRS (including HRS and LRS in the absence of light and HRS in the light state). Fig. 11.3D shows the I
V curves that display the resistance switching behavior when it is illuminated by the light through the refraction into the device. All the devices meet the two basic requirements, namely, sensing and storage of artificial vision systems. At the same time, they also can process data in the early stage like human visual system.

11.2.3 Photoelectric response After having basic sensing, memory and processing functions, optoelectronic memory devices can form basic logic gate features through different light and electronic combinations. No significant attenuation of dynamic photoresponse from HRS to LRS while turn on and off UV light periodically as shown in Fig. 11.4A. Fig. 11.4B represents the data of the pulse-switching response of the optical set and electrical reset. The set process was operated by an optical pulse (power intensity of 150 mW/cm2 and width of 600 ms), and the reset process from LRS to HRS was initiated by applying an electrical pulse (24.5 V, 100 ms). The ITO/MoOx/Pd structure device can be turned on (SET) to LRS by light, and electrically turned off (RESET) to HRS. Therefore, it can control the light power intensity, the light energy density, and the light pulse width to realize basic function of artificial vision system. There is a certain disadvantage in this mode of operation, that is, the mode

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Figure 11.3 (A) Typical I
V characteristics of the bioinspired visual memory unit with and without UV light illumination. (B) Optical set and electrical reset in a dc sweeping mode of ITO/MoOx/Pd structure device. The black and blue lines, respectively, show the voltage sweeping before and after the removal of UV illumination. The red line shows the voltage sweeping for the electrical reset process. (C) Memristive switching of the ITO/CeO22x/AlOy/ Al structure device before and after light gating at the positive voltage sweep. The inset shows the log-scale I
V curve. (D) The resistance switching behavior of the Au/ZnO NRs/ ZnO/ITO/Glass structural device illuminated at a particular angle of light. Source: (A) Reproduced with permission from S. Chen, Z. Lou, D. Chen, G. Shen, An artificial flexible visual memory system based on an UV-motivated memristor. Adv. Mater. 30 (7) (2018) 1705400[15], Copyright 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim; (B) Reproduced with permission from reference F. Zhou, Z. Zhou, J. Chen, T.H. Choy, J. Wang, N. Zhang, et al., Optoelectronic resistive random access memory for neuromorphic vision sensors. Nat. Nanotechnol. 14 (8) (2019) 776
782 [14], Copyright 2019 Springer Nature Limited; (C) Reproduced with permission from reference H. Tan, G. Liu, H. Yang, X. Yi, L. Pan, J. Shang, et al., Light-gated memristor with integrated logic and memory functions. ACS Nano 11 (11) (2017) 11298
11305[18], Copyright 2017 American Chemical Society; (D) Reproduced with permission from reference J. Park, S. Lee, J. Lee, K. Yong, A light incident angle switchable ZnO nanorod memristor: reversible switching behavior between two nonvolatile memory devices. Adv. Mater., 25 (44) (2013) 6423
6429 [19], Copyright 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

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Figure 11.4 (A) Time domain photoresponse of the image sensor based on printed single In2O3 SMW under 350 nm UV illumination at 11 V bias voltage. (B) Pulse-switching characteristics of ITO/MoOx/Pd structure device. An optical pulse (365 nm UV light) with a power intensity of 150 mW/cm2 and a pulse width of 600 ms was used for the set process, and the reset process was initiated by an electrical pulse (24.5 V, 100 ms). (C) Optical and electrical hybrid-mode-controlled resistance switching. The read voltage is 0.2 V. Source: Reproduced with permission from reference S. Chen, Z. Lou, D. Chen, G. Shen, An artificial flexible visual memory system based on an UV-motivated memristor. Adv. Mater. 30 (7) (2018) 1705400[15], Copyright 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim; (B) Reproduced with permission from reference F. Zhou, Z. Zhou, J. Chen, T.H. Choy, J. Wang, N. Zhang, et al., Optoelectronic resistive random access memory for neuromorphic vision sensors. Nat. Nanotechnol. 14 (8) (2019) 776
782[14], Copyright 2019 Springer Nature Limited; (C) Reproduced with permission from reference H. Tan, G. Liu, H. Yang, X. Yi, L. Pan, J. Shang, et al., Light-gated memristor with integrated logic and memory functions. ACS Nano 11 (11) (2017) 11298
11305 [18], Copyright 2017 American Chemical Society.

cannot regulate the device through different optoelectronic combinations, so that the ability to process more complex signals is lacking. But in ITO/CeO22x/AlOy/Al structure device, this problem is solved very well. Fig. 11.4C is schematic diagram showing the response of the optomemristor device under the dual action of the light pulse and electric pulse. The device changes from IRS (B4 pA) to HRS (B40 pA) by applying light with a single optical (60 pW/μm2, 4 s) or voltage (10 V, 4 s) pulse, whereas LRS ( . 150 pA) or logic 1 can only be completed from HRS to LRS when two sets of optical pulses are applied or both optical and electrical pulses are present. Herein, the first set of light pulses (marked by red dash line) is defined as an “optical-set” operation, upon which the superimposition of the subsequent electrical or optical pulse will switch the device to the LRS state. Therefore, this mode of operation provides more combinations and enables basic logic gate operations. The logic gate is the next section and will not be described here.

11.2.4 Schematic of photoelectric memristor devices Illumination is the key to switch from HRS to LRS, because after illumination, the device can change from HRS to LRS after being stimulated by light or electricity.

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That is to say, the light response to the artificial vision system is the absolute priority. Here we describe the principles of three different optoelectronic devices. For In2O3 device, the photoelectric response of the series connected image sensor determines its nonvolatile memristive properties. At initial state without UV light (350 nm), both the image sensor and the memristor are located in HRS and the HRS of the sensor is higher than the HRS of the memristor, so the partial pressure obtained by the memristor cannot reach Vset as shown in Fig. 11.5A. Due to the excitation of ultraviolet photons, the resistance of the image sensor is reduced. As the resistance continues to decrease, the partial pressure on the memristor reaches the Vset voltage. Meanwhile, a positive voltage applied at the top electrode (Ni) of the memristor, the Ni electrode is excited and oxidized to nickel ions. With the action of the electric field, the Ni ions gradually enter the aluminum oxide layer and are reduced to Ni after a short migration. As the electric field continues to apply, the Ni atoms eventually accumulate to form nickel filaments, transforming the memristor from HRS to LRS and forming a nonvolatile LRS even removed the UV light and electric field. When we need to rewrite the device state, we can erase the original data by applying a negative voltage (Vset) and do not need the participation of illumination in the process. One drawback of this design is that its structure is complex and the structure is not conducive to large-scale integration. Therefore, simplifying device structure is the main research direction of photomemristors in the future. For Au/ZnO NRs/ZnO/ITO/glass structural device, it has a similar conductive filaments (CFs) mechanism with above device. When it is irradiated by light at a particular angle less than the incidence critical value (48 ), the light excitation results in desorption of adsorbed oxygen ions, which reduces the amount of adsorbed oxygen on the surface of ZnO NRs. Thus, oxygen vacancies in the device diffuse under the applied electric field, and the formation of conductive filaments can be realized through redox reaction in the device. This process corresponds to the LRS of the device. When no light is incident into the device or the incidence angle is larger than the incidence critical value, ZnO NRs surface contains a large amount of adsorbed oxygen. These adsorbed oxygen ions enter the device and combine with oxygen vacancies to prevent the formation of CFs dominated by oxygen vacancies, thus showing a continuous HRS. However, the device needs to be immersed in water to form a double water
air interface structure to display its photosensitive resistance switch features. Water can easily penetrate the device to cause fatal damage, which will lead to a low-working stability of devices and large occupancy volume. The improvement of these conditions has yet to be perfected by researchers in the future. For ITO/MoOx/Pd structure device, because ITO has good light transmission, UV light passes through the ITO film (top electrode) into the MoOx thin film, which leads to generation of electrons and holes in the MoOx film. The electrons generated by UV light are excited into the conduction band of MoOx. Photogenerated holes react with water molecules absorbed in MoOx to produce protons (H1). The photogenerated electrons and the protons change the valence state of Mo ions (from 61 to 51) with the application of UV light (a wavelength of

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Figure 11.5 (A) Schematic illustrations of switching mechanism analysis. (B) Proposed switching mechanism in the MoOx ORRAM. The resistance state transition is associated with the valence state change of Mo. Mo51 and Mo61 are represented by green and blue balls, respectively. au, arbitrary units. (C) Mechanism for the light-gate memristive characteristics of the device. Schematic energy band diagram with different operations: (left) electrically writing, (right) optical gating. The red arrows indicate the direction of electron migration, and the gray arrow indicates the direction of V1 O migration. Source: (A) Reproduced with permission from reference S. Chen, Z. Lou, D. Chen, G. Shen, An artificial flexible visual memory system based on an UV-motivated memristor. Adv. Mater. 30 (7) (2018) 1705400[15], Copyright 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim; (B) Reproduced with permission from reference F. Zhou, Z. Zhou, J. Chen, T.H. Choy, J. Wang, N. Zhang, et al., Optoelectronic resistive random access memory for neuromorphic vision sensors. Nat. Nanotechnol. 14 (8) (2019) 776
782[14], Copyright 2019 Springer Nature Limited; (C) Reproduced with permission from reference H. Tan, G. Liu, H. Yang, X. Yi, L. Pan, J. Shang, et al., Light-gated memristor with integrated logic and memory functions. ACS Nano 11 (11) (2017) 11298
11305[18], Copyright 2017 American Chemical Society.

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365 nm and a power density of 150 mW/cm2) and the formation of hydrogen molybdenum bronze (HyMoOx), which results in resistance states switching from HRS to LRS as shown in Fig. 11.5B. For ITO/CeO22x/AlOy/Al structure device, theoretically, CeO22x can absorb light at a wavelength of 375 nm, due to the existence of oxygen vacancies, the defect level is introduced and eventually leads to an increase in the energy level in the band gap, so the light absorption of the CeO22x layer is extended from the ultraviolet ray to the visible region [3,9]. Moreover, the CeO22x thin film formed a Schottky barrier with the AlOy layer, due to the difference of the Fermi level from the Al layer surface [15]. When a positive voltage is applied to the device, the electrons trapped in the oxygen vacancies of the CeO22x and AlOy interface are released and driven to the ITO electrode by the electric field, and the oxygen vacancies are driven to the interface. In these processes, additional oxygen vacancies (V1 O ) generated at the interface can reduce the effective interface barrier (Fig. 11.5C, left). When light is applied to the electrodes on the ITO/CeO22x/AlOy/ Al structure device, more electrons are excited at the interfacial CeO22x layer adjacent to the AlOy intercalation and more oxygen vacancies are generated at the interface, which will effectively reduce the Schottky barrier and thus reduce the resistance of the device (Fig. 11.5C, right). During this process, the wavelength window of the photoresponse expands from the UV light region to the visible region due to the presence of oxygen defect levels in the band gap. Since the process is a nonvolatile resistive switching process, it is necessary to apply a negative voltage to the ITO electrode when erasing the data, which will drive the electrons in the electrode back to the interface region to restore the Schottky barrier to the original state. In other word, device resistance returns from LRS (logic 1) to HRS (logic 0). Therefore, after photoelectric hybrid control, the switching changes of the device lead to logic changes, which constitute the characteristics of the memory logic based on optical gated memory. This also provides a basic guarantee for the neural control of the next section of photoelectric devices.

11.3

Optogenetic tunable memristors for Boolean logic and synaptic functions

Since the first computer “ENIAC” birth around the world in 1946, the electronic products have brought many conveniences to human activities, no one matters about military affairs, communication, life style, etc. Nowadays, the electronic products are becoming smaller and smaller with the development of the integrated circuits (IC) and ICs have been developing along Moore’s law for decades. However, the size of the device cannot be continuously reduced and the transistor size is close to the physical limitation of Si. So, it is hard to improve the IC performance in reducing the device size and it might be affordable to increase the layers vertically according to the International Technology Roadmap for Semiconductors (ITRS) 2.0. Therefore, the researchers are looking forward to find a new device, which

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has the performance comparable to the traditional device and easy for threedimensional (3D)-integration. Memristor with a top electrode, medium switching layer, and bottom electrode simple sandwich structure has attracted the researchers’ interest because of its fast operating speed, 3D-integrated character, low-power consumption, flexibility, multifunctionality, and scalability [20
25]. Especially the optoelectronic memristor based on the metal oxide could be regulated by both light signal and electrical signal, and be compatible with traditional semiconductor process. In this section, the optoelectronic logic and optoelectronic synapse will be discussed.

11.3.1 Optoelectronic Boolean logic Logic is one of the most importance features for the IC [26
28]. Therefore, it is important to build a new logic circuit with new physical state, new architecture, and new device to overcome the bottleneck for post-Moore era [27]. In recent years, many researchers have realized some Boolean logics by the memristor, such as OR, AND, NAND, etc. [29
36]. These Boolean logics perform perfect binary logics and show the potentiation to replace CMOS circuits. Moreover, it has attracted the researchers’ interest to introduce a new controlled variable except electron to realize Boolean logic in one device [33,37,38]. In these devices, the optical-controlled memristor previously introduced has high potential to build multifunctional optoelectronic logic devices, security communication, simplify the programmable logic circuit, and increase the density of chip. In device operational encryption, Chen et al. reported that the logic could be realized under the light with a structure of Pt/HfO2/p-Si [38]. Fig. 11.6 shows the circuit principle diagram and experimental results based on the optical-controlled operation. The two logical variables of A and B represent the input initial states and the B0 represents the logic states after the operation with the light and without the light illumination in Fig. 11.6A and D. Under the light illumination, the circuit produces a conditional operation; that is, the logic value of B depends on that of A. From the circuit, the output B0 always generated 1 when A 5 0. While, when A 5 1, B is unchanged because the voltage drop across B is V2
V1, which sorted out A. So, the four different input cases are presented in the truth table in Fig. 11.6B and the experimental data are reproduced in Fig. 11.6C. Both input and output logic values (A, B, and B0 in Fig. 11.6C) are confirmed by reading the photocurrent from the same mixed stimulus. While without illumination, the output B value is unchanged regardless of the input states of A and B for all the conditions, and this logic operation is nonfunctioning as shown in Fig. 11.6D and F. So, this logic circuit wants to realize any logic and the illumination is necessary. Based on this characteristic, this type of device provides a possibility in computing encryption applications in hardware level. Optical information processing is considered as a new way to improve the traditional computer performance with the reason for its large bandwidth and lowstray capacitance [39]. In order to realize the optical-based communication for the future supercomputers, Cai et al. have reported a device with structure of Au/

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Figure 11.6 Light controlled logic circuit. (A
C) Optical-controlled logic operations. The schematic diagram of logic operations circuit is shown in (A). The part figure (B) shows the truth table. The part figure (C) summarizes the experimental data and the logic of “A dependent B” was found. The part figure (D) represents operations of the circuit without light illumination operations. The part figures (E,F) show the truth table and summarize the experiment data, in which the failure of implementing the “A dependent B” operation has been highlighted as dashed line. Source: Reproduced with permission from reference Y. Chen, S. Zhu, Q. Wei, Y. Xia, A. Li, J. Yin, et al., Light-controlled stateful logic operations using optoelectronic switches based on p-Si/HfO2 heterostructures. Appl. Phys. Lett. 112 (6) (2018) 063503 [38], Copyright 2018 AIP Publishing.

PMMA/Ag/MoO3/P3HT:PCBM/ZnO/ITO for communication and information processing and it is promising application for the time-resolved SET process [40]. In the experiment, all signals are applied, namely 1 V electric pulse train and 0.172 mW/mm2 optical pulse train with 1 ms durations. By applying these short pulses, the interesting things could be found that the device could not be SET at the out of phase in Fig. 11.7A. While, when the device is in phase, the SET will occur until six pulses as shown in Fig. 11.7B. This decay of switching waiting time is related to the process of forming conductive filaments [7,22]. This phenomenon of no response at out of phase and SET in phase with signal decay is great potential to distinguish the same locational devices or closer devices. Such phenomenon device characteristics have great potential for optical-based communication by sending out a transmitter with optical pulse train to the device (Fig. 11.7C). Due to the passive component device, there are no lateral patterning steps and it will be manufactured scalable in addition be deduced to suitable scales, for cost-effective productions of IoT applications. In conventional Boolean logic gate, two or more signals are needed to complete the logic operation besides the NOT logic with all electrical input signals. All the inputs must be offered with ports to input the information. While, it is

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Figure 11.7 Logical operations of optical-based cell. (A,B) The I
T characteristics stimulated by the electoral signal and optical signal out of phase (A) and in phase (B). (C) Concept of light-based communication. Source: Reproduced with permission from reference S.Y. Cai, C.Y. Tzou, Y.R. Liou, D.R. Chen, C.Y. Jiang, J.M. Ma, et al., Hybrid optical/electric memristor for light-based logic and communication. ACS Appl. Mater. Interfaces 11 (4) (2019) 4649
4653 [40], Copyright 2019 American Chemical Society.

important to deduce the number of input ports in one logic operation to reduce area of device and increase the integration degree of devices. The optoelectrical logic memristor devices have great potentiality in simplifying complexity of the programmable logic circuits, building multifunctional optoelectronic memristor devices, and reducing the power consumption. More importantly, the opticalcontrol logic device offers a new writing method—noncontact method to decrease the port of logic [41]. In recent years, Zhao et al. manufactured an optical-electrical operating oxide memristor of TiN/BiVO4/fluorine doped tin oxide (FTO) [42]. The Boolean OR logic could be realized by both input optical signal and electrical signal as shown in Fig. 11.8. The Boolean OR logic circuit is shown in Fig. 11.8A with one electrical input (Ein), one optical input (Oin), and electrical output (Eout). The different situations for optical signal and electrical signal and the response current have been shown in truth table in

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Figure 11.8 The OR logic operation and the corresponding experimental data. (A) The circuit of OR logic. (B) The optical and electrical signal stimulation and the response current
time curve. (C) The truth table and the current in experiment measured. Source: Reproduced with permission from reference J. Zhao, Z. Zhou, H. Wang, J. Wang, W. Hao, D. Ren, et al., A Boolean OR gate implemented with an optoelectronic switching memristor. Appl. Phys. Lett. 115 (15) (2019) 153504 [42], Copyright 2019 AIP Publishing.

Fig. 11.8B and C. According to the truth table, an obvious OR operating logic for the device has been found. Therefore, a device with two ports could, which finishes two signal OR logic, reduce the number of device ports. So, the optoelectrical operating device provides a possibility for reconfiguring logic elements in simplifying the circuit complexity and increasing the effective logic device integrating density of the processor chip. Moreover, Tan et al. have reported a device with the structure of ITO/CeO2
x/AlOy/Al that could realize functions of optical adder and digital-to-analog converter (DAC), and the schematic diagram is shown in Fig. 11.9A [18]. In the experiment, the researchers use two light beams as the controlling input to regulate the current states (resistance states). For the ADDER, both inputs are used at 60 pw/μm2 with 10 s pulse duration. Fig. 11.9B shows analog output ADDER element under the digital optical twobit input, outputting current states. In the operating process, the device will add both of these two optical digital inputs and output the digital sum. Additionally, this also implied optoelectronic OR logic operation. When the input 1 changes the specific intensity (120 pw/μm2) and the input 2 retains 60 pw/μm2 intensity, the corresponding result current appears in the DAC performance as shown Fig. 11.9C. Moreover, the outputting signals are nonvolatile and could be storage in situ for all the outputting signal of the ADDER and DAC operating process. Therefore, the optoelectrical device is also capable to realize nonvolatile ADDER and DAC function, which will apply more for complex optoelectronic logic-in-memory devices. Tan et al. also realized the function of photoelectric demodulation as shown in Fig. 11.9D and E. These two degrees of freedom of a beam of light can realize the combination coding of multibit binary information

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Figure 11.9 The realization of ADDER and DAC function in memristor. (A) Schematic diagram for realizing the function of ADDER and DAC by using one single memristor cell, where light means the digital 1 and dark means digital 0. (B) In the optical ADDER operation, two same input signal light beams with 60 pW/μm2 intensity, where the output signal is equal to the digital sum of the two optical digital input signals. (C) For the optical DAC operation, two special light intensities with 120 pW/μm2 for input 1 and 60 pW/μm2 for input 2 are used and the DAC function can be realized corresponding to digital inputs from 00 to 11. (D) Decoding of the two-digit information of “00,” “01,” “10,” and “11” with the light pluses with different combinations of wavelengths and intensities, and (E) demodulating of the word “NIMTE” according to eight-bit codes of the ASCII. Source: Reproduced with permission from reference H. Tan, G. Liu, H. Yang, X. Yi, L. Pan, J. Shang, et al., Light-gated memristor with integrated logic and memory functions. ACS Nano 11 (11) (2017) 11298
11305 [18], Copyright 2017 American Chemical Society; Reproduced with permission from reference H. Tan, G. Liu, X. Zhu, H. Yang, B. Chen, X. Chen, et al., An optoelectronic resistive switching memory with integrated demodulating and arithmetic functions. Adv. Mater. 27 (17) (2015) 2797-2803 [17], Copyright 2015 WILEYVCH Verlag GmbH & Co. KGaA, Weinheim.

due to the linear relationship between photoinduced current and incident light intensity, and the different resistance generated at different wavelengths. The device is irradiated with light of different intensity and wavelength, which shows different resistance states. We can irradiate the device in different order to form multiple groups of different binary sequences. This process converts the optical signal into digital logic to obtain the information we need, so as to realize the function of photoelectric demodulation.

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11.3.2 Neuromorphic computing Memristor was proposed by Leon Chua in 1971 and found by HP Lab in 2008 [43,44]. In the recent years, memristor have not only been used to store data and realize Boolean logic, but also to mimic some functions of synapse for neuromorphic computing [7,45
54]. Optical controlling memristors unfold a new route for applying addition signal besides electric in device states switching and neuromorphic computing. This device also provides another degree of freedom to regulate the resistance states, which means the optical pulse can be used for stimulation to modify the weight of synapse. Furthermore, the optical controlling memristors will also reduce the power consumption, increasing the speed of communication and the efficiency of it. Based on that, many researchers have explored the opticalbased artificial synapse devices for neuromorphic computing. With the time to 2019, Gao et al. prepared an optoelectronic synapse based oxide Schottky junction, which performs the photoplasticity of artificial synapse [55]. By using a pair of blue light pulsed with 0.5 s interval (Δt) stimulating on the heterojunction, a gradually increasing response current could be found under the light stimulate and a much higher response photocurrent stimulated by the subsequent optical pulse shown in Fig. 11.10A. If using A1 and A2 to denote the amplitudes of photoresponsive currents evoked, respectively, by the first and second light pulses, it can be found that the current of the device increases substantially when the second optical pulse is generated. The common and important synaptic plasticity called paired pulse facilitation (PPF) is found as function of A2/A1 with a series of variable Δt as shown in Fig. 11.10B. The second presynaptic spike usually causes an increase in postsynaptic current compared with the first. PPF is essential to recognize and decode temporal information like visual and auditory signals in a biological neural system [22,56
58]. Many works based on oxide materials have reported such a phenomena in their works [41,59
61]. There are two types of memory behavior named short- and long-term memory (STM and LTM) in psychology; and both of them result from the synaptic plasticity [62]. STM is generated by short-term learning and is quickly forgotten, while LTM is generated by long-term repetitive learning and remain impressive in the brain for a long time. STM could be transferred to LTM by repeated rehearsal named consolidation. Similar to biosynapse signal or electrical signal stimulating, the STM, LTM, and STM-to-LTM transition could been found in heterojunction synapse by varied number (n) or frequency (f) as shown in Fig. 11.10C and D. In 2017, Jaafar et al. who reported the hybrid organic
inorganic device can also realize the two kinds of memory above by another way [63]. As shown in Fig. 11.11A, they irradiated the device with a circular polarized light to make the conductivity decreased, and then they make the conductivity back to the initial level through the same parameter of the linear polarized light irradiation or spontaneous thermal relaxation. Because the recovery time is different, so as to simulate the two different types of memory. The method of spontaneous thermal relaxation makes the conductivity increase slowly, corresponding to STM. Another method which is the linear polarized light irradiation

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Figure 11.10 The photoresponse of artificial optoelectronic synapse with structure of ITO/Nb: SrTiO3 under pulsed light stimuli. (A) Current response of the optoelectronic synapse under two optical pulse with 0.5-s interval. (B) The different current changes with different intervals of light pulse and the tendency could index by PPF function in biological. With the increasing pulse number (C) or frequency (D), the memory will transfer from STM to LTM by pulse light stimuli. (E) The measured “learning-experience” behavior under pulsed light stimuli. Light pulse: color, blue; intensity, 30 mW/cm2; width, 0.5 s. Pulse frequency in (C, E): 1 Hz. Source: Reproduced with permission from reference S. Gao, G. Liu, H. Yang, C. Hu, Q. Chen, G. Gong, et al., An oxide Schottky junction artificial optoelectronic synapse. ACS Nano 13 (2) (2019) 2634
2642 [55], Copyright 2019 American Chemical Society.

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Figure 11.11 (A) Optical modulation of memory storage to give STM and LTM as shown by the increase of the conductivity with two different decay time following an initial illumination by circularly polarized light. (B) The optical modulation of STDP synaptic efficacy shows the learning of optical tunability, as shown by the change of synaptic efficacy curve before and after light irradiation. By measuring the changes of pulse conductance (ΔG/G) and arrival time (Δt) before and after synapse, the synaptic efficacy curve was obtained. These lines conform to the learning rule of asymmetric Hebbian STDP. Source: Reproduced with permission from reference A.H. Jaafar, R.J. Gray, E. Verrelli, M. O’Neill, S.M. Kelly, N.T. Kemp, Reversible optical switching memristors with tunable STDP synaptic plasticity: a route to hierarchical control in artificial intelligent systems. Nanoscale 9 (43) (2017) 17091
17098 [63], Copyright 2017 The Royal Society of Chemistry.

makes the conductivity increase rapidly, corresponding to LTM. This illustrates that the transition of STM-to-LTM will occur to increase the pulse number or the frequency. Meanwhile, the interesting “learning
forgetting
relearning” behavior similar to biological brain has also been represented in Fig. 11.10E. The weight of synapse could be potentiated by the pulse train and then decayed to intermediate level after the pulse trains. If it wants to recover the weight, seldom pulses are needed. In biology, an important feature for synapse is plasticity and the spike-timingdependent plasticity (STDP) is one of the most important Hebbian learning rule for learning and memory [64
66]. Jaafar et al. realized STDP synaptic plasticity based on a device with ZnO nanorods. In their work, they reported an optical
electrical device that could regulate the current to lower by circularly polarized light and recover the current to original current states by linearly polarized light. By overlapping voltage spike pulses from pre- and postsynapse, the synaptic weight will be strengthened (potentiated) or weakened (depressed). Fig. 11.11B demonstrates that memristor weight could be modulated by voltage pulse as the asymmetric Hebbian STDP learning rule with the weight change (ΔG/G). When the device is illuminated by light, the STDP potentiation and depression are enlarged and this enlargement is modulated by the simulated time. This means that the neuromorphic computing based on oxide materials could be controlled by light.

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Figure 11.12 The heterojunction synapsis’ voltage-regulation photoresponsive measurement of (A) External voltage-modulated efficiency of photoelectric response in the same light. (B) Identical photoresponsive result obtained by setting appropriate external voltages for various illuminating conditions (different wavelengths and intensities). (C) External voltagemodulated synaptic plasticity in the same light and pulse numbers. Source: Reproduced with permission from reference S. Gao, G. Liu, H. Yang, C. Hu, Q. Chen, G. Gong, et al., An oxide Schottky junction artificial optoelectronic synapse. ACS Nano 13 (2) (2019) 2634
2642[55], Copyright 2019 American Chemical Society.

Moreover, the heterojunction synapse can change the barrier width by adjusting the electron concentration of the heterojunction through the applied voltage, which Shuang Gao et al. utilized to enable the device to effectively adjust its optical response through the sub-1 V during the photoelectric responsive measurements, as shown in Fig. 11.12A and C. As shown in the figures above, only a very small voltage is required to have a significant impact on the photoelectric response. The adjustment accuracy of this extra voltage is greatly high, and the power consumption required for the adjustment is low. Fig. 11.13B has shown that the light response process can be regulated by a small voltage, so that the light response current generated by different wavelengths and intensities can be regulated to the same level by sub-1 V. The human iris stabilizes the information it receives by adjusting the size of the pupil when exposed to different stimuli. This extra voltage is also just like an extrasynaptic excitation, mimicking the associative learning of the human brain.

11.3.3 Image memorization, preprocessing, and simulation of image recognition Based on the optical
electronical memristor, a new type of image memorization could be reconstructed to enable an integral image, accumulate weak signal, analysis spectrum, and complete other complicated image-processing function. This type of device, compared with conventional circuit based on Si complementary metaloxide semiconductor (CMOS) and field-programmable gate array, provides the potential to simplify the circuitry of a neuromorphic visual system and contribute to

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Figure 11.13 Image memorization and preprocessing. (A) Schematic structure and (B) an 8 3 8 optoelectronic memristor array of SEM image. Scale bar, 200 μm. The letter F (C) and the letter L (D) selection region and memory results. (E) Direct image comparison after four light intensities [0 (A), 0.22 (B), 0.45 (C), and 0.88 (D) mW/cm2] training processes and the current response (right panel) during and in the training processes. All the signal light input (intensity) and output current signals (density) are normalized. Source: Reproduced with permission from reference F. Zhou, Z. Zhou, J. Chen, T.H. Choy, J. Wang, N. Zhang, et al., Optoelectronic resistive random access memory for neuromorphic vision sensors. Nat. Nanotechnol. 14 (8) (2019) 776
782 [14], Copyright 2019 Nature Publishing Group.

the development of applications in edge computing and the internet of things. Zhou et al. reported an 8 3 8 optoelectronic memristor array based on the structure of Pd/ MoOx/indium tin oxide (ITO) as illustrated in Fig. 11.13A for the schematic structure and Fig. 11.13B for SEM images [14]. In this case, one memristor cell acts as one image pixel and the letters F and L images are stimulated on the array with optical mask help under 0.88 and 0.45 mW/cm2 illuminated intensities as shown in Fig. 11.13C and D. After the light stimuli, this array presents memory characteristic with the letter F and L, reflected on the response current. Where the memory effect is stronger F than L due to the stronger optical stimuli, this process indicated the capability of image memory of optical
electronical devices. To further study the response from different light intensity, a 3 3 5 optoelectronic memristor array was chosen to research an image contrast enhancement function with four gray scales of 0 mW/cm2 (pixel A), 0.22 mW/cm2 (pixel B), 0.45 mW/cm2 (pixel C), and

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0.88 mW/cm2 (pixel D) [image (1) in Fig. 11.13E]. After the light stimuli, the normalized response currents from 0 to 1 have been represented in Fig. 11.13E and the differences among different pixels are enlarged compared with the input image [image (2) in Fig. 11.13E]. One minute later, the current decay corresponding to the low-intensity pixel is faster, while the current decay from the high-intensity pixel is slower [image (1) in Fig. 11.13E], and the normalization corresponding values of pixels A, B, C, and D are shown in Fig. 11.13E, respectively. This could prove that more higher light intensity could induce larger response current. So, the main feature of an image could be highlighted and enhance contrast of the image, to realize preprocessing in imaging. The image preprocessing is important for the human retina, which could improve the quality of the sensory data, and further increasing the processing efficiency and accuracy of subsequent tasks, such as image recognition and classification. Compared with von Neumann architecture computing, the brain has the ability to parallel process information [52]. The neuromorphic computing configuration with memristors will reduce the number of hardware and power consumption in the system, especially restructure a neuromorphic visual systems based on optoelectronic memristors. The human visual system with visual information detecting of eyes, transmitting information of optic nerve and processing information of visual cortex is shown in Fig. 11.14A. In this restructured neuromorphic visual system, the optical
electronical memristor are acted as the sensing and preprocessing information liking the human retina. The preprocessed images are transported to a three-layer [an input layer (42), hidden layer (20) and output layer (3)] artificial neural network to complete the image training and recognition functions in the simulation, as shown in Fig. 11.14B. The letters P, U, and C act as the image, which normalized the light intensity, with 6 3 7 pixels for the input image to the artificial neuromorphic visual system. In the simulation, a random noise with a range of 0
0.5 is used in each image. Fig. 11.14C shows the comparison of input and output images after the preprocessing. With the optoelectronic memristor array, the image highlights the body features and smoothen the noise as shown in Fig. 11.14C and the improved recognition rate and efficiency compared with without optoelectronic memristor are shown in Fig. 11.14D. These results show that the image preprocessing can be completed by using the photoelectric memory device, and the image processing ability can be further improved.

11.4

Challenge and possible approaches

11.4.1 Challenge With the development of the technology, especially the proposal of a new prototype device, we can prove some challenges for the practical application. Researchers should look at these challenges from a developmental perspective based on existing technologies. It is the so-called meeting difficulties and making extraordinary.

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Figure 11.14 Simulations of image recognition in a neuromorphic visual system with optoelectronic memristor. (A) Schematics of the human visual system. (B) Illustration of an artificial neuromorphic visual system based on the optoelectronic memristor devices for image preprocessing and an artificial neural network for image recognition. (C) Examples of images before (left columns) and after (right columns) optoelectronic memristor-based preprocessing. (D) Comparisons of the image recognition rate with and without optoelectronic memristor-based image preprocessing. Source: Reproduced with permission from reference F. Zhou, Z. Zhou, J. Chen, T.H. Choy, J. Wang, N. Zhang, et al., Optoelectronic resistive random access memory for neuromorphic vision sensors. Nat. Nanotechnol. 14 (8) (2019) 776
782[14], Copyright 2019 Nature Publishing Group.

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1. Given an interference effect of light on multiple logic circuits, it may be even be harder for a proposed chip to increase its density than fully electronic digital chips. 2. To configure a multistage logic gate, some of the outputs should be converted to light information working as input for the next stage and it requires a photoemission device.

11.4.2 The possible approaches 1. The reasons for increase in the integrated density (taking the implementation of OR logic as an example): (a). For diode-based OR logic circuit, 2 diodes and 1 load resistor is needed as shown in Fig. 11.15A [67]. (b) For the traditional OR logic gates based transistor, 3 transistors are needed to accomplish one OR logic as shown in Fig. 11.15B [68]. (c) For fully memristor OR logic gate, 2 memristors and 1 fixed resistor are needed to accomplish one OR logic as shown in Fig. 11.15C [69]. While, if we chose the optical
electrical controlling memristor to realize OR logic function, it is only uses one memristor to complete OR logic operation with 2 inputs of light and electricity as shown in Fig. 11.15D. This will reduce the number of devices used, and increase density of the logic gate array in fixed quantity device chips. Finally, the memristor has the advantage for high density of integrated circuit because of simple structure, scalability, and 3D integration [21,70]. Moreover, the optoelectronic memristor had employed light-sensitive character to construct a multifunctional optoelectronic memristor that can co-locate the detecting, processing, and

Figure 11.15 Four types OR logic gate circuit. (A) OR logic gate based on diode. (B) OR logic gate based on transistor. (C) OR logic gate based on memristor. (D) OR logic gate based on optical
electrical memristor, where M, R, IN, O, and T is memristor, resistor, input, and output, respectively.

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memorizing functions for optical signals [17,18,55]. Therefore, the memristorbased logic device might improve its density than fully electronic digital chips. 2. Nowadays, these works just offer strong application prospects to utilize the optical to realize Boolean logic currently [15,17,18,34,40,55,63,68,71
74]. For configuring a multistage logic gate, a photoemission device should be required in the device interconnection. Recently, a light emitting memristor has been reported [75]. We think this can provide a new way for constructing all memristor interconnect system and offer a higher degree of spatiotemporal resolution compared with traditional chemical and electrical approaches [76]. In sum, the logic integration will be given more attention in the next step of research.

Acknowledgements This work was financially supported by the National Natural Science Foundation of China (Grant Nos. 61674050 and 61874158), the Outstanding Youth Project of Hebei Province (Grant No. F2016201220), the Outstanding Youth Cultivation Project of Hebei University (Grant No. 2015JQY01), the Project of Science and Technology Activities for Overseas Researcher (Grant No. CL 201602), the Project of distinguished young of Hebei province (Grant No. A2018201231), the Support Program for the Top Young Talents of Hebei Province (Grant No. 70280011807), the Training and Introduction of High-level Innovative Talents of Hebei University (Grant No. 801260201300), the Hundred Persons Plan of Hebei Province (Grant Nos. E2018050004 and E2018050003), and the Supporting Plan for 100 Excellent Innovative Talents in Colleges and Universities of Hebei Province (SLRC2019018).

Conflict of interest The authors declare no conflict of interest.

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Jinrui Chen1, Zhanpeng Wang1, Yan Wang2, Ye Zhou1 and Su-Ting Han2 1 Institute for Advanced Study, Shenzhen University, Shenzhen, P.R. China, 2Institute of Microscale Optoelectronics, Shenzhen University, Shenzhen, P.R. China

12.1

Introduction

A novel class of semiconducting materials named perovskite halides have drawn great interests due to the impressive properties, such as light-emitting properties [1], photovoltaic performance [2], optically switched magnetism [3], large piezoelectric response [4], and refrigeration mechanocaloric effects [5]. Based on the different cation-type, there are basically two kinds of perovskite halides:hybrid organic inorganic perovskite halides (HOIPHs) and the all-inorganic perovksite halides. The chemical and versatile structural tenability of perovskite halides provide exciting potential for modulating its physical properties by means of chemical modification, which have the great opportunities to be employed in the multifunctional electronic devices. The most studied perovskite halides-based phototunable memories can be categorized into resistive random access memory (RRAM) and the field effect transistor (FET)-based flash memory. The resistance switchable materials are sandwiched between two electrodes in the RRAM device. As featured with highdata storage density [6 9], information stored in the RRAM device is based on the materials bistability as it can be alternatively switch between low-resistive state (LRS) and high-resistive state (HRS) via voltage stimulation [8,9]. Although the exploration of perovskites can be dated back to ages ago, the innovative application in RRAM began in recent years [10], which contributed to the further exploration of high-performance RRAM devices [11 28]. Meanwhile, the FET-based flash memory is a typical three-terminal device with a structure similar to FET except for an additional charge storage layer [29], which acts as a floating gate between the semiconductor layer and the gate dielectric. The device has three-terminal electrodes named as gate, drain, and source, respectively. The programming phenomenon under voltage bias is exhibited as a shift of the threshold voltage when charge carriers are transferred from the conducting channel to the floating gate. The tunneling dielectric layer with an ultra-thin thickness can separate the floating gate layer and the semiconductor layer in the flash memory Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing. DOI: https://doi.org/10.1016/B978-0-12-819717-2.00012-6 © 2020 Elsevier Ltd. All rights reserved.

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device. The floating gate in the memory structure captures charges, which can be stored even without the gate voltage. Notably, the charge carriers in the floating gate partially screen the electric field between the semiconductor and the control gate. In the erasing process, the trapped charge carriers can be released back into the channel under applied reverse voltage bias, and shift the threshold voltage to the reverse direction. Although the flash memory has advantages such as easyintegrated structure, multiple-bit writing, and nondestructive reading properties, it is limited in the scalability when compared with the RRAM device. Therefore, memory protocol with desired design of scalability, reliability, and high performance still need further exploration. On the other hand, the physically separated processor and memory limit the data travel rate, sparking off the famous von Neumann bottleneck. Close and frequent communication between the microprocessors and nonvolatile memories is imperative to create the gap between the volatile memory and the external nonvolatile memory. Enlightened by the high effectiveness of human brain, artificial synapse provides the advantaged ability of strong parallel information processing with lowpower consumption, which is indispensable to explore as the essential platform to the advancement of neuromorphic structure [30,31]. On the basis of the current memory system of RRAM and the flash memory, advanced artificial synaptic devices, including memristive synapse with two-terminal [31 33] and FET-based synapse with three-terminal [34 36] have been constructed to mimic the biological synapses. Researches of artificial synapse improve the performance of computers with the deepen understanding of human brain. However, device-level impediments of nonlinearities writing, poor sustainability, and excessive noise still exist and pose challenges for memory application in neuromorphic computing. As can be considered as an extraterminal in the phototunable memories, light with large bandwidth can effectively limit interconnects energy loss. The combination of biological neuroscience, materials science, and computational science has made the rapid discovery in neuromorphic computing. Along with a variety of structures and compositions, perovskite halides demonstrate versatile electronic, physical, and chemical qualities. Both purely inorganic perovskite halides and HOIPHs have been applied for creating synaptic devices and nonvolatile memory devices [16 28,37 41]. In addition, the perovskite halides layers can be manufactured on different substrates at low temperature using various methods such as facile spraying, spin coating, and slot-die coating. Under light illumination, the migration of defect in the perovskite halide layer can exhibit a significant hysteresis in current voltage response, indicating its excellent potential in the artificial synapse and memory devices applications for neuromorphic computing. Thus, it is essential to identify the relation between the defects caused by halide vacancies and other behaviors that manifest nonvolatile memory functionalities and characteristics. A timely summarizing of the current development on phototunable memory devices and the prospective trend of artificial synapse for the neuromorphic computing with the perovskite halides is significant to provide the academic prospects in perovskite halides materials. Therefore, comprehensive understanding about new

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progresses in phototunable memories and neuromorphic computing would be the primary focus of this chapter.

12.2

Perovskite halides-based three-terminal phototunable flash memory

Considered to be another terminal in addition to source, drain, and the gate electrodes of flash memories, light can be applied to modulate the memory behavior in the device. Chen et al. in 2017 reported a perovskite-based floating-gate photomemory possessing multilevel memory property, in which a polystyrene (PS) matrix is impregnated with discrete CH3NH3PbBr3 nanoparticles (MAPbBr3 NPs) perovskite nanoparticles [26]. The device structure of the studied photomemory is highly doped Si/SiO2/(PS/MAPbBr3)/Pentacene/Au. The constant perovskite layer is likely to expose the photogenerated electrons to surrounding atmosphere, which is unfavorable in terms of creating a nonvolatile memory behavior. Thus, the necessity of employing discontinuous perovskite nanoparticles in the memory dielectric layer by impregnated with PS to provide viscosity to restrain the growth of CH3NH3PbBr3 should be highlighted, as it can efficiently enhance its charge-trapping ability. Owing to the small exciton binding energy of embedded perovskite nanoparticles as well as the morphological isolation method, the photomemory display a reproducible multilevel memory operation and the accessibility to multiple wavelength response. It is the pioneer research to disclose the nonvolatile functionality of the perovskite-based floating-gate photomemory. As a significant material for fabricating phototransistors with excellent performances, two-step vapor-assisted solution-processed CH3NH3PbI3 was reported by Li et al. in 2015, and the device structure is shown in Fig. 12.1A [42]. Under optical irradiation, hole and electron mobilities are well balanced, the related photoresponsivity are demonstrated in Fig. 12.1B and C, which are 0.18 cm2/V/s for holes and 0.17 cm2/V/s for electrons. The mixed-halide perovskite CH3NH3PbI3 xClx are also proposed for constructing phototransistors in order to improve the memory performance. It is shown that the existence of Cl2 enhanced the surface smoothness of the perovskite films and improved the charge transporting properties (Fig. 12.1D). Prompt response to optical signals with efficient charge transport and collection are demonstrated in Fig. 12.1E and F. This extremely excellent functionality of hybrid perovskite halides in photomemory can be credited to their superb light absorption properties. By developing appropriate doping strategies and tailoring the deposition procedures, the charge transporting properties can be further optimized. In 2018, Wang et al. demonstrated a novel flash memory-based photonic synapse with configuration of Si/SiO2/CsPbBr3 quantum dots (QDs)/polymethyl methacrylate (PMMA)/pentacene/Au [43]. The type II band alignment between pentacene and CsPbBr3 QDs results in the splitting up of excitons in the layer interfaces which functions as the foundation for electrically engendered charge releasing and optically caused charge trapping of this memory. KPFM results acquired from

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Figure 12.1 (A) Schematic of the phototransistor with CH3NH3PbI3. (B) Transfer characteristics of perovskite-based phototransistor in the dark. (C) Transfer characteristics of perovskite-based phototransistor under light illumination. (D) Characteristics of the CH3NH3PbI3 xClx-based phototransistors. (E) Photocurrent responses of the phototransistors on light illumination showing time-dependent photosensitivity. (F) Temporal photocurrent responses. Source: Adapted from reference F. Li, C. Ma, H. Wang, W. Hu, W. Yu, A.D. Sheikh, et al., Ambipolar solution-processed hybrid perovskite phototransistors, Nat. Commun. 6 (2015) 8238 [42] with permission from Springer Nature.

charge-trapping behaviors of the device clearly suggest that the flash memory operation results from the electron trapping capability of the CsPbBr3 QDs film. Steady current levels indicate that at least four data storage level can be achieved in single flash memory cell by simply adapting the optical wavelength. CsPbBr3 QDs/PQT12 hybrid layer was also reported to fabricate the light-stimulated flash memory in 2019 [44]. The charge splitting effectiveness of the photogenerated charges can be substantially enhanced by combining CsPbBr3 QDs and PQT-12 materials. Novel heterostructure of graphene/two-dimensional (2D) perovskite is applied to the flash memory by Tian et al. in 2018 [45]. As 2D perovskite crystals can be drytransferred to form a vertical sandwich configuration of graphene/2D perovskite/ graphene, in which the hole electron pairs in 2D perovskite film can be efficiently separated and effectively collected through an applied bias subsequently. With high photoresponsivity and excellent stability, the device can be further applied in the image recognition, which can reach to approximately 80% accuracy. Later, Sun et al. proposed a 2D perovskite (PEA)2SnI4-based flash memory [46]. Vacancydominant Sn memory characteristics in (PEA)2SnI4 have been exhibited to emphasize the outstanding potentiality of 2D perovskite as a reliable functional film in light-tunable flash memories.

Perovskites for phototunable memories and neuromorphic computing

12.3

283

Perovskite halides-based two-terminal phototunable RRAM

RRAM has been considered as the most outstanding data storage device for the following generation of computer system memory concerning its substantial advantages of low-power consumption, retention capabilities, great endurance, and nonvolatility as well as rapid switching speed along with simple metal insulator metal (MIM) framework. RRAM achieves the combination of both nonvolatile data processing and storage in one single device, which is essential for pursuing excellent functionality integrated circuit device. Perovskite halides have emerged as powerful platforms for various optical and photovoltaic devices as a result of their extraordinary physical characteristic, including tunable visible bandgap, ambipolar charge transport lowtrapping density, and long diffusion length. A distinct uniqueness repeatedly presented by perovskite halides-based devices is their large electrical hysteresis in current voltage (I V) curves under light illumination, which may also enable conductance variation in the perovskite halides-based phototunable RRAM. In 2018, Guan et al. reported a RRAM device made of CH3NH3PbBr3 (MAPbBr3) film sandwiched between indium-tin oxide (ITO) and Au electrodes with a retention time of 104 s, endurance more than 103 cycles, and an ON/OFF ratio over 103 [47]. As a focused perovskite material for resistive switching applications, MAPbI3 has the well-suited bandgap for photovoltaic devices. Meanwhile, the MAPbBr3 with a cubic structure is far more stable when comparing with MAPbI3. In terms of fabrication, different from the frequently adopted one-step spin coating approach which resulted in much rougher layers with pin holes, they employed an adjusted version of the two-step vapor conversion method to fabricate perovskite films with smooth surface areas. The as-prepared RRAM with Au/ MAPbBr3/ITO configuration is highly bendable with flexible polyethylene terephthalate substrates. Furthermore, they discovered that stable resistive switching behaviors can be credited to the MA1 vacancies migration in the perovskite film and the interfacial Schottky barrier modification. When exposed to light irradiation, photocarriers can be stimulated in the MAPbBr3 film and drift along the in-built electric field, which gives rise to the photocurrent value. Consequently, both the HRS and LRS currents boost. Furthermore, the ion charges close to the ITO/perovskite interface may trap photogenerated carriers, meanwhile the neutralization of the charged ions efficiently reduces the height of barrier, which likewise brings about the increasing of junction currents. Concurringly, under UV illumination, the hysteresis loop came to be narrower than in the dark. By tuning the intensity of UV light, both HRS and LRS current level can be modified. Notably, the current level for the initial states can be returned when the light was off. As an effective method to extend the visible light absorption ability, Zhou et al. demonstrated a photovoltaic resistive switching memory with doped organic inorganic hybrid CH3NH3PbI3 xClx perovskites [48]. The device configuration is Au/ CH3NH3PbI3 xClx/fluoride tin oxide (FTO) substrate. With the sensitized doping effect, the SET voltage of the device can be reduced to 0.1 V with photonic assistance, with which multitude of hole electron pairs are created in the perovskite

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layer and divided at low-voltage bias. It is also demonstrated that the device is able to identify the concurrence of multiple input signals and performs crucial roles in neuromorphic computing and neuroscience. The sensing and logic operations are integrated through employing one optical pulse and one electrical pulse as the input signals and can further recognize the simultaneity of optical and electric signal. Zero-dimension material such as QDs and nanocrystals (NCs) have been introduced to fabricate resistive switching memory in recent years, including graphene QDs, MoS2 QDs, black phosphorus QDs, and Fe3O4 nanoparticles. Compared with the thin-film layer in memory, NCs with ultrahigh density can serve as trapping centers, where electrons transfer between them may be restrained because of the nanoscale size, and this property is helpful to realize remarkable resistive switching operations as well as contributes to several advanced physical phenomena including quantum conductance and electric field enhancement. In 2018, Wang et al. proposed a photonic RRAM based on CsPbBr3 QDs [49]. This purely inorganic perovskite QD-based device is many more competitive compared with HOIP-based RRAM on account of its great stability and reproducibility as the CsPbBr3 QD is an archetypal all-inorganic perovskite with exceptional optoelectronic qualities and excellent stability. Furthermore, the multilevel data storage and larger ON/OFF ratio were acquired by the association of light irradiation and bias voltage. Meanwhile, by applying ultraviolet (UV) light, the stored data could be encrypted. Subsequently, as input signals, electric and light field can successfully transform the resistive states of the RRAM, which are capable for applying as an “OR” logic gate. In addition, combining this so-fabricated device with a p-channel transistor, an unique application of a RRAM-gate FET demonstrating similar operations of flash memory is presented. According to the analysis of elemental distributions of the CsPbBr3 QDs’ arrays at LRS, and the annihilation and formation of Br2 ion vacancy filament and metal conductive filament operated by light irradiation and the external electric field can result in noticeable resistive switching behaviors. This understanding is likely to speed up the technological implementation of allinorganic perovskite QD-based photonic RRAM. In 2019, Chen et al. presented an Au/CsPbBr3 APQDs/indium-tin oxide (ITO) structured light-assisted multilevel RRAM [50]. The CsPbBr3 APQDs that served as the active layer is fabricated by the solution-processed method. This lightassisted memory device demonstrates excellent reproducibility, notable lightassisted multilevel storage capability, and high-data retention ability while the ON/ OFF ratio can remarkably achieve 107. Furthermore, this device manifests great functionalities with small energy consuming: 20.3 V for reading voltage and 22.4 V/1.55 V for operation voltages. Due to the outstanding photoelectric properties of the CsPbBr3 QDs, the HRS of the device could be controlled by a 405 nm laser illumination source, which shows that the device has the great light-assisted multilevel storage ability. Various resistances can be preserved for more than 1000 s under multilevel operation with light illumination. The results present that the device has excellent electronic controlled multilevel resistance at LRS (level 0) and HRS (level 3, level 2, and level 1, respectively). Therefore, the photoconductive effect may be the cause of light-assisted multilevel data storage. The number of

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photogenerated hole electron pairs is corresponding to the power intensity of the light source. Hence, this memory can achieve light-assisted multilevel data storage as well as the electric field controlled multilevel storage. RRAM devices structured as Au/PMMA/PMMA:CsPbBr3 NCs/PMMA/ITO demonstrated bipolar resistive switching performance with On/Off ratio of HRS to LRS ranging from metastable 106 to stable 10 [51]. Under light illumination, the devices witness fast photoresponse of various wavelength in HRS with a high On/ Off ratio, while the reduction of the SET voltages of resistive switching behavior in the low On/Off ratio can be achieved. Light wavelength of 365, 405, 420, and 500 nm were, respectively, applied on the device. It is obvious that the photocurrent dramatically rises and immediately declines as the light source turns on and off, demonstrating that the resistive memory device is sensitive in producing a photocurrent with reproducible response to ON/OFF cycles. Obviously, shorter wavelength of illuminating light with stronger photon energy could lead to the higher generated photocurrent. Moreover, the tunable resistive switching and photoresponse behavior of all-inorganic CsPbBr3 NCs-based devices were explained clearly by taking the function of trapping/detrapping centers of CsPbBr3 NCs and photosensitive property into consideration. This research indicates that, through light illumination, the tunable resistive switching and manageable photoresponse by resistive states of the devices can be implemented.

12.4

Perovskite halides-based neuromorphic computing

In recent years, the rapidly growing demand for speedy data transfer rate due to information explosion imposes enormous challenges on conventional von Neumann architecture-based computing architecture, which possesses intrinsic limitation in data communication speed between separated main memory and the central computing unit (CPU). The abundant neurons connected by synapses play the role of both memory and computing unit simultaneously, which makes the human brain possess the capability of parallel handling enormous information with merely low power (,100 fJ) for each synaptic event. Nowadays, the neuromorphic computing architectures inspired by neuron can figure out unstructured issues, including figure recognition and deep learning tasks. Therefore many researchers have devoted themselves to implement neuromorphic computing in the memory device through artificial synapse, hoping to emulate the complex functions of the human brain with extremely low-energy consumption and eliminate the von Neumann bottleneck. Especially, it is believed that the synaptic plasticity is the fundamental principle for the human brain to learn and memorize, thus the simulation of artificial synapse is essential for further constructed neural network to achieve neuromorphic computing. So far, various materials have been applied to fabricate two-terminal RRAM or three-terminal FET device with superior electrical performance for simulating artificial synapse, including oxide, organic materials, and 2D materials. Halide

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Figure 12.2 Schematic illustration of perovskite based neuromorphic computing.

perovskites as ionic semiconductors possess the ionotropic effects compared with other materials, which makes them promising candidates for constructing artificial synapse with the capabilities of concurrent processing and learning (Fig. 12.2). Additionally, the conductance of the devices based on halide perovskite are normally modulated by the migration of halide ions, which is similar to the synaptic conductance change through intracellular Ca21, Na1, and K1 flux among neurons. Therefore, due to the intrinsic ionotropic effects and superior phototunable properties in halide perovskites-based memory devices, large amounts of work have been done by means of taking electric bias and light illumination as external stimuli in order to simulate several typical synaptic plasticity functions, such as short-term depression (STD) and potentiation (STP) and, long-term depression (LTD) and potentiation (LTP), paired-pulse facilitation (PPF) and depression (PPD), spikerate-dependent plasticity (SRDP), as well as four forms of essential spike-timedependent plasticity (STDP) known as Hebbian learning rule. In 2016, Xiao et al. utilized organic inorganic hybrid methyl ammonium lead iodide (MAPbI3) to fabricate two-terminal memristor with the device structure of metal-semiconductor-metal (MSM) through solution-process, and successfully simulated the functions of biological synapses via applying electrical pulse [52]. Under dark conditions, the device displays typical memristive characteristics. They have demonstrated that negative bias can switch the polarity of device to n i p while positive bias will switch it to p i n inversely, which is ascribed to the migration of MA, Pb, and I ions. In the meantime, due to the existence of small Schottky barrier at both metal semiconductor interfaces before poling the device, the p i n polarization direction under positive bias has the ability to reduce the potential barrier and results in larger current density in the device. On the contrary, the opposite n i p polarization direction under negative bias is able to decrease the current density. Therefore, the device conductivity can be continuously modulated by applying a series of polar pulses, which provide the basis of simulating synaptic functions. For this two-terminal memristive device, the bottom ITO/PEDOT:PSS and top Au electrodes play the role of pre- and postneuron in a biological synapse. Besides, the device conductivity is considered as synaptic weight that is responsive to the potentiating and depressing spikes. Afterwards, they mimicked four kinds of STDP behaviors by varying the bias time difference applied between the bottom

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and top electrode as well as the shape of spikes. Besides, the SRDP was also achieved by tuning pulse frequency in order to control the transition between STP and LTP. Normally, the organometal trihalide perovskite (OTP)-based device exhibits STP, but it can perform LTP through increasing the pulse frequency, resulting from the drift effect caused by applied spike can be compensated by diffusing back the ions/vacancies. Additionally, there are several relevant researches implemented artificial synapse based on electrical pulses [53 56]. For example, Lee group employed bromine containing OHP materials (MAPbBr3) to manufacture memristor consists of Al/ MAPbBr3/buffer-capped conducting polymer (BCCP)/substrate and characterized synaptic functions, including excitatory postsynaptic current (EPSC), LTP, STDP, PPF, and STP [53]. In virtue of transmission electron microscopy (TEM) and corresponding energy dispersive spectroscopy (EDS) of Br ions, they proved that the migration of Br ions in OHP films gives rise to consecutive modulation of device conductance under voltage spikes. Besides, due to the toxic Pb element, Pb-free perovskite materials have also been investigated to fabricate memristor and simulate synaptic functions with low-energy consumption [54]. Nevertheless, the dominant conductive mechanism is the synergetic migration of both metallic Sb and Br vacancies induced the formation or rupture of conducting filaments. Apart from the traditional bulk perovskites, 2D materials as novel promising candidates can also be used to fabricate memory devices for neuromorphic computing [55,56]. With rapid development of optogenetics in biological neuron system, light is primarily applied to the activation or deactivation of light-sensitive ion channels in the neurons. Recently, a research demonstrated that intracellular Ca21 ion channel can be modulated by light for controlling the influx of Ca21 ion across the plasma membrane, so that the synaptic plasticity can be regulated [57]. Therefore, light as an additional external stimuli can not only modulate the electrical performance of the halide perovskites-based memory devices that we have discussed, but also can modulate artificial synaptic behaviors for neuromorphic computing with less power. For instance, Zhu and Lu reported optogenetics-inspired memristors based on the bulk perovskite MAPbI3 with light-tunable synaptic functions [58]. They fabricated memristive devices which exhibited volatile behavior. The conductance increases under electrical bias while spontaneously decays once getting rid of voltage bias. By means of SEM and EDS characterization of Pb and I ion, the resistive switching mechanism is the formation/annihilation of the conductive filaments as a result of the diffusion/drift of iodine vacancies. Under light irradiation, the conductance changes (synaptic weight) in the same device are various because of different illumination intensity, which is attributed to different levels of inhibited formation and accelerated annihilation of iodine vacancies. In addition, Wang et al. also achieved photonic synapses in flash memory based on all-inorganic perovskite CsPbBr3 QDs [43]. The typical synaptic functions, including SRDP, LTP, and STP, were all successfully emulated by optical modulation. With the certification of Kelvin probe force microscope (KPFM), the device performs light-induced charge trapping as well as electric-induced charge detrapping, which results in tunable conductance for mimicking synapses.

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Since the simulation of synaptic functions have been successfully realized in many kinds of perovskites-based memory devices by both electrical and photonic modulation, some researchers have also simulated neuromorphic computing through constructing artificial neural networks (ANN). Specifically, John et al. implemented a reconfigurable and trainable 4 3 4 array, consists of 16 MAPbBr3-based memristors with simulation of synaptic behaviors [59]. After the characterizations of four kinds of STDP behaviors under electrical spikes, a simple two-layer ANN was constructed and trained in a simulation for the purpose of recognizing the handwritten digits from MNIST. In detail, the pixel information of the digital image was converted into electrical input spike trains and transported to the first excitatory input layer through synapses that are activated with random synaptic weights. However, the second layer of neurons as the inhibitory layer employed a winner-take-all strategy to bring in competition within the neuron network and estimate the error rate during training. Then the neuron that most matched the input pattern with receptive field is able to further adjust its synaptic weights through corresponding electrical spikes in order to increase the accuracy of all digits. Furthermore, Ham et al. fabricated an MAPbI3-based resistive switching memory device and achieved MNIST pattern recognition as well, but they additionally utilized the photonic synapses to modulate the conductance during the learning processes [60].

12.5

Conclusion

In conclusion, perovskite halides materials demonstrate outstanding prospect in phototunable memories and neuromorphic computing application with intriguing optical and electrical properties, which have drawn in significant attention from cutting edge research groups previously. In this chapter, exhaustive review concerning current advances in perovskite halides-based phototunable memories have been provided. Even though remarkable advancement has been achieved toward the improvement of perovskite-based phototunable memories, the functionality still hangs back that of the commercialized conventional memory devices. The phototunable memories are anticipated to have reduced operation voltage than the traditional memory device, as well as the stable ON/OFF ratio, excellent ambient stability and good endurance. Obvious defects influence the memory functionality of perovskite halides-based devices. Substantial attention ought to be concentrated on synthesizing the high-quality perovskite film and taking nice-treatment of it, which is crucial for enhancing the memory performance. In additional, carriers trapping depth should be controlled by the effective interfacial engineering technology. Therefore, the primary challenge still remains in the strategy to optimize the excellent performance of phototunable memories based on perovskite halides. Furthermore, synaptic plasticity functions motivated perovskite halides-based device can vividly imitate the memorizing and learning forget process after receiving information in the biological nervous system. Specifically, for current two-

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terminal synaptic devices, the electronic signals transfer should be separated with the process of self-learning. While in three-terminal synaptic devices, the information transmission process is simultaneous with the learning process. Recent studies about the employment of the perovskite halides on the phototunable artificial synapse expand its practice to the visual simulated neuromorphic computing. With unique structure and intriguing optical properties, we convince that this traditional material is able to make full use of its advantages in the field of optoelectronics. Although every material has its own limitations, it is worth exploring advanced perovskite halides preparing method and interface engineering approach, in addition to the combination with other new materials to promote parallel processing of signal. With deepen insight of the optoelectronic characteristics of perovskite halides, the application prospect of perovskite halides in phototunable memories and neuromorphic computing can be predicted in the near future.

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Zhe Yang, Yi Li and Xiangshui Miao Wuhan National Laboratory for Optoelectronics, School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, P.R. China

13.1

Introduction and history

Chalcogenide materials are compounds typically consisting of one or more chalcogen elements (sulfur, selenium, or tellurium, but excluding oxygen) which are covalently bonded to elements from neighboring groups in the periodic table such as As, Ge, Ga, Sb, etc. Although the global interests in these compounds started early, researchers had mainly focused on fundamental investigations, for example, photoconductor, infrared transmitting, ion-conducting, and semiconducting behaviors [1]. No big breakthrough had been made for practical applications until the observation of a rapid and reversible conductance transition in chalcogenides by Ovshinsky [2,3]. This finding as well illustrated in Fig. 13.1 and known as ovonic threshold switch (OTS), successfully opened the door of brand new “glassy device” and laid the foundation of phase change memory (PCM). Just like many other significant discoveries, a nonvolatile memory function was accidently realized in some OTS materials with slightly chemical composition changing when Ovshinsky and his group kept on working in the field of amorphous and disordered materials. The original transient electrical difference just like the electrical behavior in Fig. 13.1B was stabilized to record information “0” and “1” via appropriate electrical pulse applying instead of DC sweeping. This nonvolatile bitable memory was later well-known as PCM where the active materials inside were named as phase change materials (PCMs) for their close relevant to structure switching between crystalline and amorphous phases, corresponding to conducting and nonconducting states, respectively. Remarkably, although it started from a purely electrical effect, light was subsequently proven to induce fast speed phase change (crystallization and amorphization) in 1971 [4], inspiring the conception of nonvolatile optical memory. Due to pronounced improvements on optical contrasts and data recording speed by utilizing materials Ge-Sb-Te along the pseudo-binary line between GeTe and Sb2Te3 alloys [5 7], optical version of PCM were developed more rapidly than the electronic one and was the first to be successfully commercialized in early 1990s. It was the origin of rewritable CD, DVD, and blue-ray disk and emerging photonic memory devices. Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing. DOI: https://doi.org/10.1016/B978-0-12-819717-2.00013-8 © 2020 Elsevier Ltd. All rights reserved.

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Figure 13.1 OTS demonstrated by (A) a phase change behavior of Ge2Sb2Te5; (B) a volatile switching behavior of GeTe with rich Tellurium content.

Figure 13.2 Operation principle of optical memory by utilizing PCMs.

In these storage systems, the operation principle is sketched and explained in Fig. 13.2. Applied an intermediate laser pulse (erase pulse), amorphous PCMs are heated above the crystallization temperature Tc and transformed to crystalline state based on crystallization kinetics theory within a few nanoseconds or even subnanoseconds. Reversely, a shorter laser pulse with higher intensity (write pulse) is utilized to locally melt and then quench the PCMs quickly enough into bulk amorphous regions by reaching a high-cooling rate (109 K/s). Because both crystalline and amorphous states of PCMs own a significant difference in detective optical properties, for example, reflectivity which is dominated by refractive index (n) and extinction (k), the data can be fast recorded in different structure regions. Then, the detection of an amorphous or crystalline region can be realized by applying a lowintensity pulse which is the readout process. After decades’ development, the unique alterable optical characteristics in PCMs are appreciated again by breaking the diffraction limit and designed for new all-optical memory with the combination

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of advanced nanofabrication in emerging photonics. The review about all-photonic memory will be well illustrated later. Based on the brief introduction, excellent combination performances exhibited in PCM including fast writing speed, high endurance, and promising scaling down potential are dominated by the basic properties of PCMs. However, many issues such as phase change mechanism are still under heated debate and attract huge interests [8,9]. Thus, in this chapter, we will firstly overview the critical investigations on PCMs from the aspects of switching kinetics, long-range structure, chemical bonding, and optical properties. Then we will focus on the concrete optical and electronic memories and figure out how they utilize the PCMs and enable novel functionalities.

13.2

Basic properties of phase change materials

Although there are abundant chalcogenides, only a certain amount of them fulfill the following basic requirements for PCMs and are used for nonvolatile memory: 1. Fast transition (sub-nanoseconds or nanoseconds level) between crystalline and amorphous states on an appropriate laser irradiation or electrical pulse; 2. High stability of crystalline and amorphous states at room temperature (several decades); 3. Distinct optical contrast between crystalline and amorphous states.

These three key points can help us to find out or artificially design more suitable chalcogenides for storage application based on the well understanding of switching kinetics, structure, and optical properties in both crystalline and amorphous states.

13.2.1 Long-range and short-range order of phase change materials The chalcogenides suitable for PCM concentrate in two major material classes. The first one is the pseudo-binary alloy along GeTe-Sb2Te3 line which is known as Ge Sb Te alloy (GST). The other one is the doped Sb2Te alloy such as Ag5In5Sb60Te30 (AIST) [10]. Here, we will take Ge2Sb2Te5, which has been widely used and studied, as an example to demonstrate the feature of long-range order in other similar crystalline phase change alloys. Upon heating, the amorphous Ge2Sb2Te5 experiences two different crystalline phases which are firstly a metastable rock-salt phase and then a stable hexagonal phase. Just as schematically depicted in Fig. 13.3A, the metastable state of Ge2Sb2Te5 forms around 140 C 150 C, where Te atoms occupy one face-centered cubic (fcc) sub-lattice completely while Sb, Ge atoms and 25% vacancies randomly occupy the second sub-lattice. Interestingly, as evidenced by a pronounced difference between the iso˚ 2) of Ge (Sb) atoms through XRD detectropic atomic displacement ,u2 . (0.04 A ˚ 2) of the Te Ge tion and the mean-square relative displacements (MSRD) (0.02 A

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Figure 13.3 Crystalline structure of typical PCMs (A) metastable and (B) stable phase of Ge2Sb2Te5 alloys.

and Te Sb bond length, Ge (Sb) atoms obviously deviate from the idea cubic position and form a local distortion along a certain direction, demonstrating a rhombohedral structure in long-range order [8]. With annealing temperature increases up to about 300 C, Ge2Sb2Te5 transforms to a stable hexagonal phase consisting of nine layers of atoms (Te Ge Te Sb Te Te Sb Te Ge ) terminated by a vander-Waals gap in the [0001] direction. Considered the second phase change temperature is quite high, the phase change utilized in optical memory mainly happens between amorphous and the metastable state. Compared with other crystalline chalcogenides which are not suitable for optical memory, PCMs are characterized by the presence of vacancies. Wuttig et al. worked on the relationship between system disorder and position randomness of vacancies, evidencing a disorder induced Anderson metal-insulator transition (MIT) in GST alloys [11,12]. Tominaga et al. considered that these vacancies provide room for Ge and Sb atomic flip and motion, proposing a new phase change mechanism without melting process in phase change superlattices [13]. All these results contribute to improving the energy efficiency, switching speed of PCMs, which need further investigations. Although amorphous states lack the long-range order (periodicity), they still observe glass forming rules on a local scale. In contrast to some oxide glasses or simple tetrahedral semiconductors such as SiO2 or Si (Ge) which show little local atomic arrangement difference as well as optical contrast between their crystalline and amorphous states, PCMs turn out to be different considerably. It is experimentally confirmed by Kolobov et al. through the extended X-ray absorption fine structure (EXAFS) spectra, revealing a Ge-centered octahedral structure in crystalline states and a tetrahedral atomic arrangement of the Ge atoms in amorphous states of GST alloys [8]. Meanwhile, a series of work later [14], verify that only about

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one-third of Ge atoms are tetrahedral arrangement in amorphous state, while the remaining Ge and other atoms still display an octahedral environment, and closely resemble the crystalline atomic arrangement. But these octahedrons are defective of which the coordination number is changed to three-, four-, and fivefold as sketched in Fig. 13.4 due to the presence of internal vacancies and distortion. The existence of crystalline-like structure in amorphous network is assumed to be the feature of fast switching PCMs and helps to design PCMs. For example, SET speed of Sc Sb Te alloy has significantly improved to 700 ps for the presence of “crystalline seed” by Sc-doped in Sb2Te3 [15]. More experimental and computational investigations on the local environment elucidate the underlying mechanism of atomic arrangements in terms of chemical bonding including bond length and angle. Whereas the amorphous PCMs are covalently bonded solids with sp3 hybridization, the crystalline ones are held by another force which is known as the metal-covalent bonding where insufficient p electrons (3) dominates and bond angle gets close to 90 degrees. This new bonding type is firstly proposed by Wuttig et al. and has been proven in various PCMs by studying the dielectric function [16] and atom probe tomography [17]. This special type of bonding is considered as the gene of PCMs and assists in explaining the fastswitching behavior and distinct optical contrast [9]. Upon amorphization of PCMs, such as Ge2Sb2Te5, whereas Ge Te bond length changes significantly from 2.83 A to about 2.61 A, Sb Te bond length (about 2.9 A) changes little, indicating a high stability of Sb-octahedron and overall structure. Besides of stable Ge Te or Sb Te bonds, a few of antibonds such as Sb Sb or Ge Sb can also be found in the amorphous state and play an important role in short range order [17]. The pronounced structure differences between amorphous and crystalline PCMs induce large band structure diversity, for example, optical band gap or density of states contrasts, finally leading to optical contrasts in the infrared region and electrical contrast.

13.2.2 Switching kinetics A fast-speed phase-change phenomenon at elevated temperatures and stability at room temperature are also big issues for practical use in memory device which are strongly related with switching kinetic of PCMs. As a reversible process, it can be

Figure 13.4 Five template structures: tetrahedral, three-, four-, five-, and sixfold octahedrons.

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classified to crystallization and amorphization upon different laser irradiation, which are both extremely sensitive to temperatures. Based on the classical crystallization theory, as shown in Fig. 13.5A there are two phenomena which are known as nucleation and growth dominating the thermal dynamic, respectively. For nucleation, it is influenced by two major factors. The first one is the Gibbs free enthalpy difference (ΔGv) between amorphous and crystalline states, acting as the driving force in nucleation process. The latter is the limited atomic mobility acting as the local activation barrier. Remarkably, due to a strongly nonlinear temperature dependence of viscosity η in PCMs, the mobility of disordered atoms can increase significantly since a dramatic drop of viscosity with temperature increasing to glass transition temperature Tg, resulting in a highcrystallization speed. The overall nucleation rate Vnuc in equilibrium can be described quantitatively by [19]:   2kB T ΔGc N0 Γz exp 2 Vnuc 5 Sc ηπr 3 kB T

(13.1)

where, Sc is the number of surface atoms of the critical cluster which owns an equal probability of shrinkage and growth, ΔGc is the Gibbs free enthalpy difference at the critical cluster radii, and r is the average interatomic distance. Based on the above calculation, nucleation is most favorable between the glass transition temperature Tg and melting temperature Tm. As we know from the short-range order of PCMs, four-membered rings are considered as “crystalline embryo” which can effectively decrease the incubation of nucleation time [15]. Just as illustrated by Fig. 13.5A, once nucleation develops to a certain extent, crystal grows rapidly at elevated temperatures. According to probability of nucleation and growth as shown in Fig. 13.6, PCMs are generally classified into nucleation dominated and growth dominated classes.

Figure 13.5 (A) Crystallization process from clustering to nucleation and crystal growth. (B) Temperature dependence of crystallization growth velocity (m/s). Source: Reprinted with permission from M. Wuttig, M. Salinga, Phase-change materials fast transformers, Nat. Mater. 11 (2012) 270 271 [18].

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Figure 13.6 Probability of (A) nucleation dominated materials and (B) growth dominated materials demonstrated by sketches.

For traditional GST alloys, they are nucleation dominated which can be experimentally supported by presence of many nuclei with varying radius. As for AIST or GeSb, it has gone through growth dominated crystallization process of which nuclei incubation is quite long, leading to the crystal growth from the amorphous to crystalline interface as sketched in the insertion of Fig. 13.6B. The growth dominated materials are experimentally characterized by large crystalline clusters with similar radius on laser irradiation. Actually, these two types of processes cannot be completely distinguished for the complex interaction between PCMs and laser light of which intensity, frequency, and duration should be taken into consideration. What is more, crystallization process can also be experimentally evidenced by studying the crystallization temperature of PCMs via electrical resistance measurement and differential scanning calorimetry (DSC) upon different heating rate, such as Ge2Sb2Te5 alloy conducted by Friedrich et al. and Park et al., respectively [19]. Both results obey the strict Arrhenius behavior of crystal growth. PCMs are quite different from the “strong glass” system, such as silica in Fig. 13.5B, where logarithmic of η varies essentially linearly with 1/T, resulting a much lower crystallization rate. During amorphization process, the PCMs are firstly heated to liquid state and then quench into glass state [20]. As a high laser pulse is needed to melt crystalline PCMs by reaching melting temperature Tm, memory energy efficiency is the biggest issue during amorphization. Known from the ab-initio theoretical study of GST alloys by Qiao, mean square displacement (MSD) of atoms during the fast cooling process help to analysis the thermodynamic of PCMs atoms [17]. As shown in Fig. 13.7, time dependences of atoms’ MSD in Ge2Sb2Te5 exhibit linear behaviors in both liquid and undercooled liquid. The corresponding slopes indicate the reduction of atomic mobility with decreased temperature. Obviously, comparing all three atoms in Ge2Sb2Te5, Ge atoms move fastest in both liquid ( . 900K) and undercooled liquid (623K 900K). Sb (Te) moves slowest in liquid (undercooled liquid), consistent with the micro-structure characteristics of the amorphous Ge2Sb2Te5.

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Figure 13.7 MSD of atoms in Ge2Sb2Te5 at different temperatures from liquid to undercooled liquid. Source: Reprinted with permission from C. Qiao, Theoretical Study on the Amorphous Structures of Phase Change-Memory Ge-Sb-Te Alloys, Dissertation, 2019 [17].

13.2.3 Optical property of the phase change materials Referred to the electronic PCM of which the recorded information directly reflects on the contrast of electrical resistivity or conductivity, optoelectronic memory correspondingly measures the contrast of optical reflectance (R) or transmission (T) detected by photoreceiver, mainly dominated by refractive index n, extinction coefficient k, and absorption coefficient α. The relationship between k and α can be written as: α5

4πk λ

(13.2)

where, λ is the incident wavelength. In general, these critical parameters can be obtained by transmission and reflectance (T&R) method for bulk sample and spectroscopic ellipsometry method for films [21,22]. As shown in Fig. 13.8, both n and k values of a typical PCM Ge2Sb2Te5, significantly increase upon crystallization in the visible light regime. Meanwhile, the optical contrasts between amorphous and crystalline shows a strong dependence on the laser wavelength. A more pronounced contrast can be found in the near-infrared wavelength regime which is in favor of telecommunication applications.

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Figure 13.8 Photon energy dependence of refractive index n and the extinction coefficient k in amorphous and crystalline fcc phase of Ge2Sb2Te5. Source: Reprinted with permission from S. Raoux, Phase change materials, Annu. Rev. Mater. Res. 39 (2009) 25 48 [23].

Besides of the influence of incident light wavelength, optical contrasts can also be manipulated by the stoichiometry and the film thickness of GST alloys. As reported in Ref. [9], the more the Ge content in GST is, the higher the optical contrast will be assumed for the complex difference of optical constants. As reported by Miao et al. in [24], when film thickness of Ge1Sb2Te4 is reduced to 50 nm, the optical constants (n and k) become closely related with the film thickness, especially in shorter wavelengths as shown in Fig. 13.9, indicating the importance of film thickness in the optical device design.

13.3

Application of phase change materials in optoelectronic nonvolatile memory

13.3.1 Rewritable optical disk Since the first phase-change disk product came out by Matsushita/Panasonic in 1990, it has gone through several generations of rewriteable storage solution with increasing recording density and capacities. The whole optical memory system consists of the excitation (laser diode), beam path, sensor, and the disk media. Basic operation strategy is demonstrated in Fig. 13.10. A track is the recording media made up of rewritable PCMs controlled by write (high intensity) or erase laser (intermediate intensity) pulse. The readout principle is demonstrated in Fig. 13.10C. The white marks represent amorphous area, which is formed on write laser pulse irradiation, resulting in a drop in the reflectivity level detected by photo-receiver with ultra-low intensity pulse applying in case of information destroying. As we review the progresses of optical phase change disks made in the past decades, several major actions help to improve the performance on recording density and transfer rate. Engineering PCMs, for example, doping or stoichiometry

Figure 13.9 Film thickness dependence of n and k value on different laser irradiation from visible liaght to blue laser. Source: Reprinted with permission from X.S. Miao, T.C. Chong, Y.M. Huang, K.G. Lim, P.K. Tan, L.P. Shi, et al., Dependence of optical constants on film thickness of phase-change media, Jpn. J. Appl. Phys. 38 (1999) 1638 1641 [24].

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Figure 13.10 Basic operation strategy of phase change disk memory.

controlling is the most essential and effective one for faster data transportation and better optical contrast [25]. The second one is to improve the stacking structure of the phase-change disk. In practical use, in order to enhance the effective signal and stability, the disk basically consists of four layers comprising an active layer (PCM layer) embedded between the bottom and the upper dielectric layers as well as a reflection layer on the top as indicated by the Fig. 13.11A. Inserting more stacking layers have been proven to effectively improve the disk performances. Besides, another effective approach is to design double recording layer as displayed in Fig. 13.11B, leading to a much higher storage density. Fig. 13.12 shows continuous progress of phase-change optical disk in early years by employing improved laser source, which offers an alternative and effective way for performance improving. With the decreasing of laser wavelength from red to blue violet, the numerical aperture (NA) of the lens is significantly increased from 0.5 to 0.85, resulting in a much smaller recording size and higher recording density. However, the reduction of laser wavelength cannot be further for its fundamental limit such as the lack of suitable laser diode and the absorption of the silicon substrate in the ultraviolet [4].

13.3.2 Electronic phase change memory In the recent 10 years, electronic version of phase-change memory, which is also known as phase change random access memory (PCRAM) has developed rapidly for its broader application, higher integration and better compatibility compared

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Figure 13.11 (A) A TEM cross-section of a typical four stacking layer disk. (B) The dual layer structure for larger recording density.

Figure 13.12 Continuous progress of phase-change optical disk from CD-RW to BD-Re with decreased laser wavelength by comparison of recoding density, optics, lens, and so on. Source: Reprinted with permission from M. Wuttig, N. Yamada, Phase-change materials for rewritable data storage, Nat. Mater. 6 (2007) 824 832 [9].

with the phase change optical disk. It is also considered to replace mainstream products FLASH or DRAM soon as PCRAM can effectively balance the speed and density, mitigating a huge storage gap. In contrast to the operation mechanism of phase change disk, there are some unique characteristics for PCRAM. At first, external excitation has changed from laser to electrical pulse which is at nanosecond scale. Next, it is the magnitude of resistivity or conductivity that record “0” and “1” or even multilevel in one cell. What is more, due to the advanced semiconductor fabrication technology, the device size can sharply down to a few nanometers with high-recording density. A typical T-shaped PCRAM deice is shown in Fig. 13.13A, the PCM layer is sandwiched between the top electrode and a heater which are generally made of W or TiW. The surrounding SiO2 helps decrease the thermal dissipation. With

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Figure 13.13 (A) A traditional T-shape PCRAM device. (B) A confined structure of PCRAM device.

applying a high-intensity pulse, a current crowding effect generates at the contact between PCMs and the heater indicated by the red dashed circle. A mushroom-like shaped amorphous region is formed above the heater by following the meltingquench strategy to block off previous conductive path, exhibiting high resistivity and recoding “1.” Meanwhile, a medium pulse is applied to induce crystallization, recovering the low-resistance path and recording “0.” There are several critical indicators evaluating PCRAM, including switching speed, energy consumption (programming current), operation cycles as well as endurance, and so on. Some researchers follow the roadmap of scaling down by reducing the bottom electrode size, fabricating phase change nanowires [26,27]. The energy efficiency has been successfully improved by reaching 100 fJ [26]. In terms of materials engineering, doping, or composition modifications of Ge Sb Te and phase change superlattice [28,29] are two outstanding candidates, revealing balanced device properties for practical use, for example, excellent thermal stability, high-operation cycles (106 1012), low-power consumption (pJ nJ), and a high-switching speed (,10 ns). Then, device structure design is also a key for memory improvement. Big companies, such Intel, Micron, have paid much attention to a confined device structure as shown in Fig. 13.13B. Such structure has been used in their 3D X-point product with less thermal dissipation from electrode and high-heating efficiency. And now, with the continuous development of PCM cell, more effort is focused on array and chip level for emerging applications.

13.3.3 All-photonic memory Although considered as the best candidate for next generation memory for its outstanding performances, the employment of PCRAM is blocked by the information shuttling in the von-Neumann architecture where data storage and processing are separated. In contrast to the speed limitation of electrons, photonics is superior in data transportation because of its inherently unlimited bandwidth and ultra-high transfer speed [30 32]. Thus, a fast, multibit, and multilevel nonvolatile photonic memory which combine the optical advantages of nanoscale waveguides and PCMs is proposed and eventually realized in assistant of the advanced nanofabrication [33].

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In this section, we will firstly illustrate the device structure as well as the operation principle and strategies of multibit and multilevel in a single memory cell. Meanwhile, we will figure out the characteristic underlying mechanism of this new paradigm photonic device for deeper understanding and wider application beyond memory. At last, an overview on the current issues about the all-phonic memory is discussed for future development. Fig. 13.14A demonstrates the schematic of device configuration where the PCM is fabricated on top of nanophotonic waveguide made up of silicon nitride. Instead of detecting reflectance signals adopted in optical disk, information is recorded directly via the amount of optical transmission along waveguides controlled by the evanescent coupling between waveguides and GST as shown in Fig. 13.14B. With high-power laser pulse (Write/Erase) within nano or sub-nano timescale, GST switches between crystalline and amorphous phases. Crystalline GST is more absorptive and attenuates the light more severely compared with the amorphous state, leading to a low-readout light transmission along a waveguide which is recorded as “0.” In order to optimize the photonic memory for faster switching times and lowswitching energy, thin PCMs such as Ge2Sb2Te5 are not simply deposited on waveguides with small footprint as used before shown in Fig. 13.15A and B. Ge2Sb2Te5 is specially sandwiched by nanoantenna made up of Ag to obtain plasmonically enhancement in an all-photonic phase-change memory device as illustrated in Fig. 13.15C [34]. In additional, how to select bit correctly is a big issue in a large-scale array structure with growing integration. Individual bit is embedded in specially designed ring resonators which are away from the center waveguide. Bit selection is easy to realize with low crosstalk by inputting optical pulse of which wavelength is close to one ring resonator, to form cavity resonance. The distinct ring radii provides the spectral separation for each bit as shown in Fig. 13.16A C. More operation strategies and device design can be referred to in Refs. [31,32,35]. Meanwhile, based on the binary memory function, further utilization of GST with different crystallization ratio gives rise to the different amount of transmitted

Figure 13.14 (A) Configuration and operation schematics of all-optical memory device accompanying multicomplex laser conducting along the waveguide. (B) The information is recorded in PCMs with different structure which can be detected by the light transmission along waveguides.

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Figure 13.15 Different types of structure design of GST deposition by (A) small size of GST on top of waveguide, (B) overlying waveguide, and (C) plasmonically enhanced.

Figure 13.16 (A) SEM image of the colored resonant ring for multibit addressing. (B) The addressing of each cell is realized by inputting laser with different wavelength to form resonant and spectral separation. (C) The write and erase operations of individual resonant structure, corresponding to different color rings. Using laser pulses close to resonant to select and operate one cell without affecting others. (D) Multilevel realization by controlling the magnitude of crystallization with less interference. Source: Reprinted with permission from C. Rios, M. Stegmaier, P. Hosseini, D. Wang, T. Scherer, C.D. Wright, et al., Integrated all-photonic non-volatile multi-level memory, Nat. Photon. 9 (2015), 725 732 [32].

power by light matter interaction, representing multiple levels in one memory cell. Recently, some improved light input strategies such as dual pulse (double-step erase pulse or double-step programing pulse) to manipulate partial crystallization for better multilevel operation [36]. About 34 levels have been achieved in a 5-bit nonvolatile photonic memory. As known from reported literatures [37,38], the underlying mechanism is strongly related with the light matter interaction in PCMs through evanescent-field coupling. Though this all-photonic memory significantly reduces the cell size by breaking up the diffraction limit in the conventional optical system through nearfield optical technique, the footprint is still large compared with electronic circuits which need further investigations and improvements. Besides of all photonic memory application based on thermo-optic functionality, other effects such as photoconductive, photoinduced thermoelectric effects also are supposed to induce novel behaviors in PCMs, attracting wide attention in the area of on-chip optical switches and computation [39 42]. For instance, the multiple deterministic transmission

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levels can be used to execute computation tasks in the optical domain. Direct scalar and matrix vector multiplication has been realized and paves the way for the development of entirely photonic computers [43].

13.4

Applications of phase change memory in neuromorphic computing

Although PCMs and chalcogenide based all-photonic memory have shown promising performances for next-generation ultra-dense nonvolatile memories, their adoption in traditional von Neumann architecture is still regarded as a progressive solution to promote the existing computing system performance, while facing the limitations of device scaling and data transmission bottleneck. With the blossom of big data and artificial intelligence technologies, the demand for developing non-von Neumann computing paradigm has been posed as a long-term goal. Compared with other new computing methodologies, such as quantum computing, in-memory logic, and stochastic computing, brain-inspired neuromorphic computing provides a disruptive solution to perform robust learning and complex computing functions with higher energy efficiency and fault tolerance, taking the advantages of massive parallelism in neural networks. The key challenge to build hardware neuromorphic computing system is the development of biomimetic artificial synapses and neurons, which can emulate the functions of their biological counterparts and serve as the basic building block for artificial neural networks. Recent years, nonvolatile memories such as PCM, resistive memory (RRAM) or ferroelectric memories have been proposed to implement artificial synapse, since the device conductance can be programmed to multilevel or even analogue states and thus emulate the plastic synaptic weight modification in the neural networks. Besides, PCM also holds the promises to act as the artificial neurons owing to its energy accumulated amorphous-to-crystalline phase transition behavior. In addition, benefited from its rich optoelectronic properties, PCM also has been demonstrated to play its essential role in photonic neural networks.

13.4.1 Phase change memories for artificial neural networks Generally, the conductance of the artificial electronic synapses represents the synaptic efficacy (synaptic weight), which is the connection strength between neurons. One bioplausible synapse model is the plastic mechanism, which means the synaptic weight could be modified due to the activity of pre- and postneurons. Two opposite activity-dependent plasticity modifications: long-term potentiation (LTP) and longterm depression (LTD) and a more complex spike-timing dependent plasticity (STDP) rule have been biologically identified and regarded as the basis for learning and memory in real brain. LTP/LTD mean a persistent increase/decrease in the synaptic transmission efficacy, whereas STDP indicates the synaptic weight change is a function of the difference between the timing of the pre- and postneural spikes [44].

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As discussed in Section 14.2.2, the phase transition between amorphous and crystalline is not abrupt, but rather a progressive process of nucleation and growth. Hence, through carefully controlling the degree of crystallization and amorphization in the active region, one may realize intermediate resistance states in PCM. For instance, Kuzum et al. firstly utilized a stair-case increased voltage pulse train to gradually program a GST-based PCM to 100 adjacent resistance levels within a oneorder of magnitude dynamic range [45]. Li et al. also realize analogue potentiation and depression behaviors behavior in GeSbTe and AgInSbTe devices [44]. Moreover, based on well-designed pre- and postspike schemes, four different forms of STDP function were also successfully implemented (Fig. 13.17), which can be adopted as the learning rules in the biologically realistic spiking neural network (SNN). However, the potentiation (crystallization) and depression (amorphization) behaviors are always asymmetry. Firstly, an abrupt binary RESET is commonly observed in most PCMs while a gradual SET can be realized by means of controlling the crystallinity. Secondly, the RESET operation needs higher voltage amplitude than the SET operation and brings about peripheral circuit complexity. Therefore, Suri et al proposed a 2-PCM complementary synapse strategy to implement synaptic functionality that can overcome the limitations of asymmetry [46]. In this scheme, both PCMs are initialized to a high-resistive state before training in network and only undergo gradual crystallization during training. The differential of the currents flowing through the two PCMs contributes to the postneuron. Further optimization in the analog conductance tuning in terms of dynamic range,

Figure 13.17 Different forms STDP learning rules realized in PCM.

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precision, linearity, symmetry, and variability will be beneficial for neural network training and inference. Material engineering, such as introducing nucleation seeds to slow down the crystallization process, would help to obtain a better linear resistance decreasing behavior under identical pulses with high resolution (8 bits) and sufficient ON/OFF ratio (B102) [47], which is required for efficient network work training with high-recognition accuracy. Working in a partial amorphization regime is essential to induce gradual amorphization dynamics in PCM. Barbera et al. proposed the adaptation of the memory structure associated with an initialization pulse followed by a sequence of identical fast pulses to implement both gradual potentiation and depression [48]. Although the abrupt RESET in PCM is annoying in the implementation of artificial synapses, this energy accumulation behavior was exploited by researchers to build an artificial neuron that can emulate the integrate-and-fire functionality with stochastic dynamics [49]. In this implementation, the PCM is also initialized to the amorphous phase. Following successive applications of the moderate crystallizing pulses, the amorphous region progressively reduces and the device conductance correspondingly increases, which mimics the temporal integration of the incoming postsynaptic potentials in a neural network. Once the conductance exceeds a threshold, the phase change device is reset, representing the firing of the neuron. After a refractory period, the PCM is RESET by a melting voltage pulse. The firing rate can be controlled by the power and width of the crystallization pulse. With the implementation of the phase change synapse and neurons, the hardware implementation of a neural network is feasible [50]. Based on measured STDP rule in the 2-PCM synapse scheme, a two-layer SNN is capable to execute complex visual pattern extraction from real world data [46]. Moreover, the initial resistance state dependent STDP has been studied in the 1T1R configuration and further utilized to realize on-line pattern learning and recognition by simulations [51]. However, the performances of reported STDP-based neural network still cannot outperform the deep artificial neural networks based on the mature backpropagation rule at this stage. On the basis of the achievement of a continuum of conductance values in PCM, it is now possible to use the conductance to present the synaptic weights and to locally perform analog computation at each PCM in the dense array. Vector matrix multiplication, the essential computational expensive operation in neural network, can be realized by a read operation in the crossbar or 1T1R PCM array, achieving O(1) computational complexity. Fig. 13.18 shows how to map the neural network into the hardware 1T1R PCM array and the in-memory computing principle of forward propagation, backforward propagation and weight update [50]. A mixed hardware and software demonstration of this concept achieves a simulated test accuracy of 97.40% on the MNIST handwritten digit classification using a twolayer neural network and state-of-the-art 90 nm PCM devices [52]. By further incorporating a 2PCM 1 3T1C unit cell concept, generalization accuracies equivalent to those of software-based training on various test datasets (MNIST, CIFAR-10, and CIFAR-100) is realized. Besides, the network with a large array of 204,900 PCM synapses achieved a computational energy efficiency of 28,065 GOP/s/W, which is two orders of magnitude compared with conventional GPU-based machine learning

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Figure 13.18 (A) A two-layer neural network to classify the MNIST dataset. (B) The matrix vector multiplications operation in forward propagation. (C) The backward and synaptic weight update operations.

accelerator, while also accelerating the backpropagation algorithm by nearly two orders of magnitude [53]. Here we want to stress that the vector matrix multiplication operation can act as the generic primitives in an in-memory computing unit, which aims to solve diverse date-centric calculation problems with high energy and areal efficiency beyond deep learning, such as solving equations, data compression and recovery [50,54].

13.4.2 Phase change memory in optoelectronic neuromorphic systems Nanophotonics or integrated photonic circuit have been emerging as an important alternative approach to construct hardware neuromorphic systems. The neural networks built on photonic synapses and neurons show advantages of high-speed information processing, large bandwidth low-power consumption and high compactness [55,56]. On one hand, a photonic integrate-and-fire neuron could be realized based on PCM-embedded ring resonator [57,58]. On the other hand, the GST-based PCM device fabricated on top of the waveguide is proposed to act as an isolated artificial photonic synapse, whereas the input and output of the waveguide are connected with a preneuron and a postneuron [59]. An optical circulator is used to connect the output of the PCM synapse and the postneuron. The synaptic weight can be easily deterministically adjusted by varying the number of optical pulses sent down the waveguide, which in turn determines the optical transmission from the preneuron to the postneuron. By intentionally designing the pre- and postspikes, the weight is modulated according to their temporal relation, which mimics the STDP rule. The on-chip PCM-based photonic synapses is further integrated with all-optical PCMbased spiking neuron circuit to demonstrate an all-optical neurosynaptic system [60]. In the all-optical spiking neuronal circuits, the input spikes are weighted using PCM cells and summed up using a WDM multiplexer. If the integrated power of the postsynaptic spikes surpasses a certain threshold, the PCM cell on the ring

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resonator switches and an output pulse (neuronal spike) is generated. Supervised learning and STDP-based unsupervised learning were successfully demonstrated. These studies have leveraged the advantages of integrated optics and achieved a solid step toward ultrafast, low power, and scalable photonic neuromorphic computing framework.

13.5

Conclusion

Even though various emerging optoelectronic materials and devices have been developed to implement nonvolatile memory and neuromorphic computing, an approach to simultaneously fulfill the requirements of high-performance memory and biomimetic cognitive functions is still a challenge. We believe chalcogenide phase change materials will play an important role in the long-term competition, since they demonstrate controllable reversible amorphous-to-crystalline phase transition under electric or optical stimuli. In this chapter, we have discussed the research history and fundamental physical mechanism underneath the phase change behaviors. We have briefly reviewed the recent progresses in cutting-edge application of PCM, including all-photonic memory and neuromorphic computing. Especially, we have shown that the employment of PCM in in-memory computing framework could lead to a non von Neumann computing paradigm with lowcomputation complexity and high-energy efficient, especially for data-centric tasks.

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Ziyu Lv1, Xuechao Xing1, Ye Zhou2 and Su-Ting Han1 1 Institute of Microscale Optoelectronics, Shenzhen University, Shenzhen, P.R. China, 2 Institute for Advanced Study, Shenzhen University, Shenzhen, P.R. China

14.1

Preparation of photoelectroactive materials

In this chapter, we analyze device performance and manufacturability (i.e., scaling down and up technologies) challenges, and discuss possible solutions for practical applications of photoelectroactive memories. In addition, we consider device innovations, system optimization, and new electronics applications of the photoelectroactive technology. Photoelectroactive materials in two-terminal memristor or three-terminal flash memory, dominate the switching mechanisms and operation principles, and determine the device performance in terms of access speed, energy efficiency, multibit capacity, and reproducibility. The development of these materials offer the opportunity to miniaturize the physical cell size, therefore take a vital role in the development of optoelectronic data storage devices. For the past decade, a variety of photoelectroactive materials including perovskites, organic materials (i.e., photochromic molecules), semiconductor quantum dots, one-dimensional nanowires, and two-dimensional materials have been used as active components of nonvolatile memories and artificial synaptic devices [1 6]. To keep up with the growth in data creation, the development of new materials with advanced thin-film fabrication technologies is urgently needed.

14.1.1 Material stability and thin-film fabrication technology So far there has been enormous research effort in developing photoelectroactive nonvolatile memories. These memories, although light-programmable or lighttunable, usually suffer from poor endurance and insufficient operational stability. The reconfiguration of photoelectroactive memristive devices or flash memories can be realized through electric-field-driven ion redistribution, or charge tunneling (i.e., Fowler Nordheim tunneling, band-to-band tunneling) over large distances (in contrast with atomic spacing), ensuring reversible transition between lowconductance state (LS) and high-conductance state (HS) [7,8]. While, thousands of input bias voltages applied to memory cells, coupled with local thermal fluctuations, will cause irreversible transformation or even structural destruction of the active components, inducing unfavorable impacts on device performance, or leading to device failure. Previously reported photoelectroactive materials are usually sensitive to external environment conditions (temperature, moisture, and light), liable to Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing. DOI: https://doi.org/10.1016/B978-0-12-819717-2.00014-X © 2020 Elsevier Ltd. All rights reserved.

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mechanical damage, and often subjected to ageing effects that reduce their lifespan. For instance, perovskite-based memories often need to be operated at room temperature in an inert gas system, which is not suitable for commercial devices. Repeated electric-field stress may induce undesirable/irreversible chemical reactions in organic electronics, and the formation of reliable electrodes or tunneling layers on organic films also presents difficulties [9]. Therefore, the dominant role of photoelectroactive electronic materials, and strong motive to develop high-performance memory devices, will drive the evolution of these materials toward chemical inertness and strong tolerance to electrical operation. The next step is to use these materials to develop ideal thin-films. Thin solid film is a layer that appears on a surface with its top interface exposed to the environment. Thin-films can be porous, dense, monolayer, multilayered, and patterned, and show their ultrathin body (compared with lateral dimensions), thus possess controllable properties for different application domains. For data storage systems, thin-film deposition techniques to prepare uniform and smooth active layer is crucial to allow good contact between each layer and to reduce device variability, this is a prerequisite for high-density integration. Take organic materials as examples, solution deposition techniques such as spin coating and dip coating are facile ways to produce fairly homogeneous films, by spreading chemical solutions onto target substrates and then evaporating volatile solvents. Important factors including solution concentration, evaporation kinetics, capillarity, and annealing conditions should be taken into account for the optimal thin-film fabrication.

14.1.2 Optical modulation Phototunable feature and light writing/erasing operation will bring a new concept to enhance performance of nonvolatile memories. Nevertheless, the reported optical operation principles mainly rely on ultraviolet and visible light stimulations. In general, infrared spectra could be employed as a communication medium for a wide range of domains including fluorescence imaging, military communication and medical treatment. Infrared memories can not only enhance the controllability of nonvolatile optical memories, but may also offer better understanding of optogenetics in living organisms. Several works offer demonstrations of designing two-terminal and three-terminal infrared memories based on infrared-sensitive active components such as copper phthalocyanine nanowires, topological insulator, upconversion nanoparticles and van der Waals heterojunction materials [10 13]. However, the demonstrations of high-performance infrared memories have so far been limited, and middle and far infrared memories are still missing. To achieve this goal, more sophisticated infrared-sensitive materials need to be designed and created. Besides, another research direction, as well as a key challenge, is to endow the optoelectronic device with fully photon modulation.

14.1.3 Biodegradability and biocompatibility Electronic waste (E-waste) presents a global issue that needs global action. According to one report released by the United Nations Environment Program, 50

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million tons of E-waste such as discarded desktop computers, printers, smartphones, and liquid crystal displays are produced annually. Only 20% of these discarded electronic devices are collected and recycled, and the rest can generate serious risks to our health and environment [14]. For photoelectroactive memories, the active components are not easy to degrade and also harmful to human health. For instance, most of the perovskite-based memory cells contain lead, and the discarded cells may cause children blood lead concentrations over safe levels. Hence, the development of biodegradable electronic materials will be a valuable step toward green electronics. Natural biomaterials will help us cope with the global problem since their biocompatible, sustainable and biodegradable properties. In addition, biomaterial electronics will give a boost to the implantable and wearable electronics fields.

14.2

Device performance optimization

It is believed that photoelectroactive memristors and flash memories will supply the energy to fuel the big-data era by improving memory and computing techniques [15,16]. Notable progress has been made, but at a slow pace. Several device performance challenges require to be overcome.

14.2.1 Device variability Device variability exists even when memory cells are manufactured under the same conditions since cells may show distinct performance. In details, devices are subject to potential both cycle-to-cycle and device-to-device variability, that is, their actual functions vary greatly within a single memory from cycle to cycle, and across a high-density memory array from device to device. For two-terminal memristors, the unfavorable effect is even more pronounced because of the inherent stochasticity of the physical switching mechanism. Device variability is costly, and it is hard to obtain desired conductance states as a result of individual difference in access speed, ON/OFF ratio, operation voltage, and even physical mechanism. Generally, photoelectroactive materials such as organic materials, perovskites, semiconductor low-dimensional materials, and carbon nanomaterials can be used as the charge trapping medium or channel in flash memory, and active switching layer in memristive device. However, unavoidable nonuniformity and unevenness of the prepared film, coupled with unknown density of defects at the interface of two layers, as well as forward behaviors of photogenerated excitons, greatly affect the charge transfer and capture, leading to great device variability. The issues could be partially addressed through embedding photoelectroactive materials into dielectric matrix, using advanced thin-film fabrication technique to achieve ultra-uniform monolayer, and introducing an underneath polymeric film to enable good contact interface. Meanwhile, exploring behavior rule of photogenerated excitons and elucidating the physical mechanism may help to improve device reproducibility under optical modulation.

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14.2.2 Switching speed Nonvolatile photoelectroactive memristors and flash memories exhibit a data retention time of around 10 years without power supply, while the access speed is far from satisfactory when compared with volatile static random access memory and dynamic random access memory. As a noninvasive stimulus, light enables the possibility to modulate device conductance state with almost arbitrary spatial/temporal precision. Phototunable and photoprogrammable memories have been developed, but in honesty, the speed of optical operation is far slower than anticipated. The reported optical two-terminal and three-terminal memories exhibit slow-speed writing operation on microsecond, millisecond or even second timescale. The physical resistance switching mechanism and a new device concept related to the optoelectronic materials need to be probed. Several recent investigations have realized fast switching speeds on nanosecond timescale by employing an electric-field-driven phase transition mechanism in MoTe2-based memristive device, a new operation mechanism of band engineering the two-dimensional van der Waals heterostructures, or building a controllable barrier height for the ease of charge injection and tunneling [17 19]. Optical operation on a nanosecond timescale still presents a critical technological challenge. To address this challenge, device modeling and understanding the physical switching mechanism in situ will offer convenience.

14.2.3 Integration Easy-to-integrate properties could make photoelectroactive materials ideal components for high-density data storage layer. Another important aspect is that efficient optoelectronic memory-CMOS integration can promote the applications such as inmemory computing and raise efficiency in data transfer and storage. Compared with three-terminal flash memory, two-terminal memristor offers greater potential for low-cost fabrication and area-efficient density. Several implementations of integrated photoelectroactive memories are being demonstrated. Han et al. reported the integration of fully photon modulated neuromorphic devices, in a three-dimensional (3D) memristor crossbar [20]. The integrated system comprised stacked ZnO/PbS hybrid solids acting as the photoelectroactive memory array. System-level pattern recognition ability of the system with 67% 6 6% accuracy was achieved. More complicated systems need to be developed, and the implementation of optical modulation in an integrated system will be also a critical challenge for practical applications.

14.3

Advanced approaches for switching mechanism

Unclear switching mechanisms stem from the difficulties to detect electrical behaviors in a data storage device over a large spatiotemporal range. To enhance the device performance to a level adequate for large-scale commercial domains, in situ sophisticated characterization and device modeling are required to probe the ionic

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migration and its coupling with charge dynamics, enabling a comprehensive understanding of physical switching mechanisms [21]. For example, because of the ultrafast speed of ionic transport in memristive devices, the conductive filament may form on a nanoscale timescale. The diameters of these filaments vary from angstroms to micrometers. Advanced in situ techniques such as transmission electron microscopy (TEM), scanning electron microscope (SEM), and scanning probe microscopy (SPM) are capable of capturing morphology changes with a spatial resolution from angstroms to micrometer scale, and temporal resolution from microsecond level to several days, therefore enabling an in-depth understanding of switching mechanisms. In addition, device modeling such as COMSOL, kinetic Monte Carlo (KMC), and first principles (FP) could further broaden the spatiotemporal range. For instance, Valle et al. have used COMSOL technique to simulate the dynamic of filament formation process in a Mott nanodevices. Li et al. used KMC simulation to study the oxygen vacancy movement [22]. Combination of imaging techniques with spectroscopies including electron energy loss spectroscopy (EELS) and energy-dispersive X-ray spectroscopy (EDS) can visualize the geometry of the conductive pathway, and determine the elementary compositions and chemical states of the pathway, therefore provide a good option for probing the resistive switching mechanism in the memristive devices. Zhou et al. revealed a synergy effect of electrochemical metallization and valance change in a perovskite-based memristive device by a SEM EXS method [23]. Miao et al. have used in situ TEM EDS method to characterize the confined switching layer and the physical mechanism based on oxygen ion migration [24]. Basing on real-time monitored multiple interactions between the sample and the tip, different SPM electrical techniques, including Kelvin probe force microscopy (KPFM), conductive atomic force microscopy (CAFM), and electrostatic force microscopy (EFM), can be used to evaluate charge trapping capacity in flash memory, to identify the conductive filament geometry in memristive device. In addition, these measurements can be performed under dark or illumination condition, thus offering a helping hand to reveal mechanisms of optical modulation in photoelectroactive memories. Lv et al. have revealed the photogating mechanism in a biopolymer-based transistor memory by employing EFM and KPFM techniques [3].

14.4

Neuromorphic computing

Despite recent successful demonstrations of neuromorphic computing based on photoelectroactive memories, more researches are needed to achieve desired neuromorphic hardware.

14.4.1 Number of conductance states To achieve high efficiency of neural network operations, synaptic devices should possess a mass of separable conductance states. A large adjustable conductance

322

Photo-Electroactive Nonvolatile Memories for Data Storage and Neuromorphic Computing

range can improve hardware-based neural network accuracy and promote analogue neuromorphic computing. Most of the reported photoelectroactive memories exhibit only low- and high-conductance states. In several cases the conductance states could be tuned in a continuous way, therefore achieving multiple conductance states. Leydecker et al. developed an optical memory using the diarylethene/poly(3hexylthiophene) blend as the active component. The authors were able to modulate the conductance in a continuous fashion by varying UV and visible treatments, achieving 256 separable conductance states [25]. More photoelectroactive memories with easily tailored characteristics and numerous accessible conductance states need to be developed. In addition, a mass of linear and symmetrical conductance states can offer convenience for “blind” synaptic update.

14.4.2 Sensory synapse Our human body can simultaneously sense and process external signal, thus enabling a variety of sophisticated communication and processing tasks in an efficient way. Inspired by this, a novel device concept is to integrate both sensing capacity and neuromorphic computing in a single synaptic device, thus building compact sensory synapses with area-efficient density and multifunctionality [26]. Previously reported artificial synaptic devices can sense and react to pressure, light, chemical, and pH stimuli. Photoelectroactive memories, which display intriguing optical properties, supply a good option for optical sensory synapse (Fig. 14.1).

Figure 14.1 (A) Schematic diagram of the biological brain and five senses. (B) The 3D schematic of an optical sensory synapse.

Device challenges, possible strategies, and conclusions

323

Lee et al. demonstrated a novel optoelectronic sensorimotor system based on a stretchable organic transistor synapse [27]. This system has significant potential to be the building blocks in artificial sensorimotor nervous system of neurorobotics. More sensory synaptic devices with high sensitivity and energy efficiency need to be fabricated. By addressing the aforementioned tasks, we speculate that photoelectroactive memories can offer a powerful source to enhance the sensing, memory, and computing abilities of future electronic devices.

References [1] Y. Zhai, J.-Q. Yang, Y. Zhou, J.-Y. Mao, Y. Ren, V.A.L. Roy, et al., Toward nonvolatile photonic memory: concept, material and design, Mater. Horiz. 5 (2018) 641 645. [2] Y. Wang, Z. Lv, J. Chen, Z. Wang, Y. Zhou, X. Chen, et al., Photonic synapses based on inorganic perovskite quantum dots for neuromorphic computing, Adv. Mater. 30 (2018) 1802883. [3] Z. Lv, M. Chen, F. Qian, V.A.L. Roy, W. Ye, D. She, et al., Mimicking neuroplasticity in a hybrid biopolymer transistor by dual modes modulation, Adv. Funct. Mater. 29 (2019) 1902374. [4] G. Milano, S. Porro, I. Valov, C. Ricciardi, Recent developments and perspectives for memristive devices based on metal oxide nanowires, Adv. Electron. Mater. 5 (2019) 1800909. [5] Y.J. Jeong, D.-J. Yun, S.H. Noh, C.E. Park, J. Jang, Surface modification of CdSe quantum-dot floating gates for advancing light-erasable organic field-effect transistor memories, ACS Nano. 12 (2018) 7701 7709. [6] J. Lee, S. Pak, Y.-W. Lee, Y. Cho, J. Hong, P. Giraud, et al., Monolayer optical memory cells based on artificial trap-mediated charge storage and release, Nat. Commun. 8 (2017) 14734. [7] S.-T. Han, Y. Zhou, V.A.L. Roy, Towards the development of flexible non-volatile memories, Adv. Mater. 25 (2013) 5425 5449. [8] J. Lee, W.D. Lu, On-demand reconfiguration of nanomaterials: when electronics meets ionics, Adv. Mater. 30 (2018) 1702770. [9] Y. van de Burgt, A. Melianas, S.T. Keene, G. Malliaras, A. Salleo, Organic electronics for neuromorphic computing, Nat. Electron. 1 (2018) 386 397. [10] Z. Lv, Q. Hu, Z.-X. Xu, J. Wang, Z. Chen, Y. Wang, et al., Organic memristor utilizing copper phthalocyanine nanowires with infrared response and cation regulating properties, Adv. Electron. Mater. 5 (2019) 1800793. [11] Y. Wang, J. Yang, Z. Wang, J. Chen, Q. Yang, Z. Lv, et al., Near-infrared annihilation of conductive filaments in quasiplane MoSe2/Bi2Se3 nanosheets for mimicking heterosynaptic plasticity, Small 15 (2019) 1805431. [12] Y. Zhai, X. Yang, F. Wang, Z. Li, G. Ding, Z. Qiu, et al., Infrared-sensitive memory based on direct-grown MoS2-upconversion-nanoparticle heterostructure, Adv. Mater. 30 (2018) 1803563. [13] Q. Wang, Y. Wen, K. Cai, R. Cheng, L. Yin, Y. Zhang, et al., Nonvolatile infrared memory in MoS2/PbS van der Waals heterostructures, Sci. Adv. 4 (2018) eaap7916.

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[14] Z. Lv, Y. Zhou, S.-T. Han, V.A.L. Roy, From biomaterial-based data storage to bioinspired artificial synapse, Mater. Today. 21 (2018) 537 552. [15] H.S.P. Wong, S. Salahuddin, Memory leads the way to better computing, Nat. Nanotechnol. 10 (2015) 191 194. [16] M.A. Zidan, J.P. Strachan, W.D. Lu, The future of electronics based on memristive systems, Nat. Electron. 1 (2018) 22 29. [17] F. Zhang, H. Zhang, P.R. Shrestha, Y. Zhu, K. Maize, S. Krylyuk, et al., An Ultra-Fast Multi-Level MoTe2-Based RRAM. In: 2018 IEEE International Electron Device Meeting, 2018. pp. 22.7.1 22.7.4. [18] C. Liu, X. Yan, X. Song, S. Ding, D.W. Zhang, P. Zhou, A semi-floating gate memory based on van der Waals heterostructures for quasi-non-volatile applications, Nat. Nanotechnol. 13 (2018) 404 410. ¨ ncan, A write time of [19] M. Geller, A. Marent, T. Nowozin, D. Bimberg, N. Akc¸ay, N. O 6ns for quantum dot-based memory structures, Appl. Phys. Lett. 92 (2008) 092108. [20] H. Li, X. Jiang, W. Ye, H. Zhang, L. Zhou, F. Zhang, et al., Fully photon modulated heterostructure for neuromorphic computing, Nano Energy 65 (2019) 104000. [21] W. Sun, B. Gao, M. Chi, Q. Xia, J.J. Yang, H. Qian, et al., Understanding memristive switching via in situ characterization and device modeling, Nat. Commun. 10 (2019) 3453. [22] J. del Valle, P. Salev, F. Tesler, N.M. Vargas, Y. Kalcheim, P. Wang, et al., Subthreshold firing in Mott nanodevices, Nature. 569 (2019) 388 392. [23] Y. Wang, Z. Lv, Q. Liao, H. Shan, J. Chen, Y. Zhou, et al., Synergies of electrochemical metallization and valance change in all-inorganic perovskite quantum dots for resistive switching, Adv. Mater. 30 (2018) 1800327. [24] M. Wang, S. Cai, C. Pan, C. Wang, X. Lian, Y. Zhuo, et al., Robust memristors based on layered two-dimensional materials, Nat. Electron. 1 (2018) 130 136. [25] T. Leydecker, M. Herder, E. Pavlica, G. Bratina, S. Hecht, E. Orgiu, et al., Flexible non-volatile optical memory thin-film transistor device with over 256 distinct levels based on an organic bicomponent blend, Nat. Nanotechnol. 11 (2016) 769 775. [26] Y. Lee, T.-W. Lee, Organic synapses for neuromorphic electronics: from brain-inspired computing to sensorimotor nervetronics, Acc. Chem. Res. 52 (2019) 964 974. [27] Y. Lee, J.Y. Oh, W. Xu, O. Kim, T.R. Kim, J. Kang, et al., Stretchable organic optoelectronic sensorimotor synapse, Sci. Adv. 4 (2018) eaat7387.

Index

Note: Page numbers followed by “f” and “t” refer to figures and tables, respectively A Active layer design, FGTM, 60
61 ADDER function, 262
265, 265f Adsorbent-assisted PVD method, 181 Ag/H2O/Pt model device, 22f RESET process of, 23 Ag5In5Sb60Te30 (AIST), 295
296 Ag metal, 18
19 Ag/ZnO:Mn/Pt device, 26 cross-sectional TEM image of, 28, 29f in linear and semilogarithmic, 26
28 RS characteristics of, 27f switching mechanism of, 28 Ag/ZrO2/Pt device, RS characteristics of, 33f All-optical memory device, 305
308, 306f Al/SrZrO3:Cr/Si device, 51 Amorphous PFO film, 111 Analog-type memristor, 75
76 ANNs. See Artificial neural networks (ANNs) Artificial intelligence, 121 Artificial neural networks (ANNs), 121, 165
167, 170, 288, 308
311 Artificial optoelectronic synapse, 267f Artificial perception learning system, 160
162 Artificial synapses, 95, 121
122, 192, 237
244, 280, 308, 310 Artificial tactile sensory systems, 160
165 external-powered electrolyte-gated transistor
integrated, 162
163 self-powered EGT-based, 163
165, 164f Artificial vision system, 252
253, 255
257 Atmospheric pressure CVD (AP-CVD), 180
181 AuNPs. See Gold nanoparticles (AuNPs) Au/Pt/SrTiO3/Nb:SrTiO3, 42, 43f Au/ZnO nanorods, 253
255, 258 Azobenzenes, photoisomerization of, 226

B Bandwidth-controlled Mott transition, 50 BGTC. See Bottom-gate top-contact (BGTC) Binary memory function, 306
307 Biocompatibility, 318
319 Biodegradability, 318
319 Bioinspired visual memory unit, 254f Biological neural system, 237
238, 287 Biological neuron network, 203
204 Biological synapses, 146f, 237f metaplasticity in, 154f Biological tactile sensory system, 161f Bioplausible synapse model, 308 Biopolymer-based transistor memory, 321 Biosynapse, basics for, 202
206 Bipolar nonvolatile RS, 36 Bipolar resistive switching, 17
18, 17f Block-shaped polymers, 65 Boolean logic, 261
265 OR logic operation, 262
265, 264f and synaptic functions, 260
271 Bottom-gate top-contact (BGTC), 53
54 Bottom-up methods, 180 Brain cognitive behaviors, 146
147 Brain-like computing systems, 2 Brain-like neuromorphic devices, 145
146 Brain “multistore memory model”, 147 Butler
Volmer equation, 19
21 C Capacitance-based memory devices, 53 Carbon nanotubes (CNTs), 123, 181
182 applications, 188 synaptic transistor, 123 CdS NR-based memory phototransistor device, 185
186, 186f Chalcogenide materials, 16, 293 Charge-based electronic devices, 125
127 Charge
injection efficiency, 59, 65

326

Charge trapping/detrapping, 84
87, 85f Charge-trap transistor memories (CTTMs), 54
55, 64
66 electret layer design, 64
66 nonvolatile, 66f polymer electret based, 65f structure, 64f Chemical synapse, 203
204 Chemical vapor deposition (CVD), 180
181 CH3NH3PbI3, 281, 282f Classical conditioning, 152 Classical crystallization theory, 298 CMOS devices. See Complementary metaloxide-semiconductor (CMOS) devices CNT-based devices, for photoelectroactive memory, 209
212 device fabrication, 209
210 discussion, 212 field effect transistors, 209 performance, 210
211 SiO2- and TiO2-based, 210 working principle, 210 CNT-based transistors (CNTFETs), 191
192 CNTs. See Carbon nanotubes (CNTs) Collectively as synaptic plasticity, 122 Complementary metal-oxide-semiconductor (CMOS) devices, 3, 145 Compliance current, 18
19, 48
49 “Computing with physics,” concept of, 15 COMSOL technique, 320
321 Conceptual axon
multisynapses network, 134 Conductive filaments (CFs), 17
18, 77, 81, 84 Conformation evolution, 87
89, 87f Constant perovskite layer, 281 Control transistor (CT), source electrode of, 114
117 Conventional electrical-driven nonvolatile memory, 5
7 Conventional memory device, 220 Conventional silicon-based memory, 3 Copper phthalocyanine (CuPc), 226
227 Cross-sectional TEM image, 25 of Ag/ZnO:Mn/Pt device, 28, 29f of Cu/Ta2O5/Pt device, 26f of nanoparticle chain, 36
37

Index

Crystalline embryo, 298 Crystalline GST, 306 Crystallization process, 69
70, 298
299 in SET process, 20
21 CsPbBr3, 285 CsPbBr3 QDs, 137 CTTMs. See Charge-trap transistor memories (CTTMs) Cu ion-based ECM devices, 23
25 Cu/P3HT:PCBM/ITO, 229, 229f Curie point, 66
67 Cu/Ta2O5/Pt device, 25, 25f, 26f Cu/ZrO2:Cu/Pt device, 28
31 characteristics, 28
31, 30f multistep switching in, 31
32 CVD. See Chemical vapor deposition (CVD) D DAC function. See Digital-to-analog converter (DAC) function Data storage, 15 DEA-Me-c isomer, 109
111 DEA-Me-o isomer, 109
111 Deep-ultraviolet (DUV) active synaptic device, 190
191 Dendrite integration process, 165
169 Dendrite synapse functions, 147
148 Dendritic integration, 165
167 Depression functions, 130 Device fabrication, 182 CNT-based devices, 209
210 perovskite device as artificial eye, 215 Si NC-based devices, 206 2D tunneling phototransistor for nonvolatile memory, 206 Device performance optimization, 319
320 device variability, 319 integration, 320 switching speed, 320 Device variability, 319 Diarylethene (DAE), 108
109, 115f Dielectric layer, characteristics of, 54
55 Dielectric/organic semiconductors, 125 Digital-to-analog converter (DAC) function, 262
265, 265f Digital-type memristor, 75
76 Direct-printed synthesis method, 189
190, 190f Direct tunneling, 58

Index

Drift and diffusion theory, 20 of oxygen vacancies, 47
48 Drop-casting method, 192 “Dry” method, 182 Dynamic random access memory (DRAM), 2
3 E ECM. See Electrochemical metallization (ECM) EDL. See Electric-double-layer (EDL) EDX. See X-ray fluorescence spectrometer (EDX) EELS. See Electron energy loss spectroscopy (EELS) EEPROM. See Electrically erasable programmable read-only memory (EEPROM) EGTs. See Electrolyte-gated transistors (EGTs) Eight-wise and counter-eight-wise VCM, 46
48, 46f Electrical-driven memory, 2
3 Electrically erasable programmable readonly memory (EEPROM), 3 Electrically programmable read-only memory (EPROM), 3 Electrical memory devices, 53 Electrical stimulation, 237
238 Electrical synapse, 203
204 Electric-double-layer (EDL), 130
131, 148
149, 189
190 Electric-field stress, 317
318 Electroactive molecules, 226 Electrochemical anodization, 181 Electrochemical metallization (ECM), 17
38 crystallization, 20
21 drift and diffusion theory, 20 electrochemical reactions, 19
20 electroforming process in, 18
19 filament overgrowth, 32
35 filament undergrowth, 35
38 multiple filaments, 26
32 resistive switching of, 77 single filaments, 21
25 switching kinetics, 19
21 Electrochemical reactions, 19
20 Electrochromic materials, 227
228, 228f

327

Electrochromic polymer materials, 236 Electrodes floating-gate transistor memories, 59
60 materials, 16 Electroforming process, 17
18, 36 in ECM, 18
19 Pt/BiFeO3/Pt in, 47f in VCM device, 47 Electrolyte-gated neuromorphic transistors, 148
160, 170 on artificial tactile sensory systems, 160
165 electrolyte-gated transistors, 148
150 Hodgkin
Huxley artificial synaptic membrane, 159
160 ionic liquid, 150
151 metaplasticity mimicked on, 154
159 solid-state ionic conductor, 151
153 Electrolyte-gated transistors (EGTs), 145
146, 148
150, 149f Electrolyte-gate synaptic transistors, 130
134 low-voltage operating characteristics, 130
131 Electron energy loss spectroscopy (EELS), 320
321 Electronic phase change memory, 303
305 Electronic waste (E-waste), 318
319 Electrophoretic deposition methods, 181 Electrostatic/electronic effects, 49
51 metal-insulator transition, 50 Poole
Frenkel emission, 50
51 space-charge-limited conduction, 49 Electrostatic force microscopy (EFM), 321 Emulating synaptic functions, optoelectronic memristors for, 95
99 optogenetics-inspired tunable synaptic functions, 97
99, 99f photoactivated synaptic functions, 95
97 Energy dispersive spectroscopy (EDS), 287 Energy-dispersive X-ray spectroscopy (EDS), 321 EPROM. See Electrically programmable read-only memory (EPROM) EPSC. See Excitatory postsynaptic current (EPSC) EXAFS. See Extended X-ray absorption fine structure (EXAFS)

328

Excitatory postsynaptic current (EPSC), 163
165, 179, 189
191, 207, 240
244 Excitons, 226
227 Extended X-ray absorption fine structure (EXAFS), 296
297 External-powered EGT
integrated artificial tactile sensory systems, 162
163 F Fabricated devices, 128
129 Fabricated synaptic transistors, 124
125, 128
129 Faraday’s law, 21 FeFTMs. See Ferroelectric field-effect transistor memories (FeFTMs) Ferroelectric field-effect transistor memories (FeFTMs), 54
55, 66
70, 68f layer design, 67
70 Ferroelectric field-effect transistors (FeFETs), 127
128 Ferroelectric-gate synaptic transistor, 127f Ferroelectric memories, 188, 308 Ferroelectric synaptic transistors, 130 FET-based flash memory, 279
280 FETs. See Field-effect transistors (FETs) FGTMs. See Floating-gate transistor memories (FGTM) Field-effect transistors (FETs), 3, 123 Filament formation/dissolution, 81
84, 83f Filament overgrowth, 32
35 Filling-controlled Mott transition, 50 FinFETs, 130 Flash memories, 3, 320 charge storage element in, 4 FET-based, 279
280 with single transistor realization, 3 Flexible three-terminal optoelectronic memory device, 117
118 Flexible visual memory system, 91, 93f Floating-gate devices, 111
112 Floating-gate synaptic transistors, 123
127, 124f, 139
140 Floating-gate transistor memories (FGTM), 54
55, 58
63 active layer design, 60
61 design, 62
63 electrode design, 59
60 hybrid structured, 62
63

Index

schematic, 61f structure, 58f tunneling/blocking dielectric layer design, 61
62 F
N tunneling. See Fowler
Nordheim (F
N) tunneling Forming-free device, 17
18 FORMING process, 88
89 Fowler
Nordheim (F
N) tunneling, 58 FT4-DPP-based polymer, 242
244 Functional layer materials, 107
113 G Gap junction, 203
204 Gate-controlled electrochemical doping, 132 Gate electrode, of memory transistor, 114
117 Ge2Sb2Te5, 295
297, 299, 300f, 306 Ge
Sb
Te alloy (GST), 295
296, 305 Gibbs free enthalpy difference, 298 GO. See Graphene oxide (GO) Gold nanoparticles (AuNPs), 114
117 Graphene, 35 Graphene oxide (GO), 88
89 H Hebbian learning rule, 204, 268, 285
286 Heterojunction synapsis, 269f Highest occupied molecular orbital (HOMO), 88, 108
111 High-resistance state (HRS), 3
4, 17
18, 26
28, 75
76, 88, 279
280 in humid atmosphere, 44 Hodgkin
Huxley artificial synaptic membrane, 159
160 HOIPHs. See Hybrid organic
inorganic perovskite halides (HOIPHs) Holographic storage, 100 HRS. See High-resistance state (HRS) HRTEM, 34
35 of nanocrystal, 36
37 Human brains, 121, 188
189 CPU in computer and, 202t Human perception system, 160 Human visual memory system, 5, 204, 251
252, 253f, 271 Humid atmosphere HRS in, 44 LRS in, 44

Index

RESET process in, 44 Hybrid optoelectronic memory, 236 Hybrid organic
inorganic perovskite halides (HOIPHs), 279
280 Hydrothermal technique, 181 I IHP QDs. See Inorganic halide perovskite quantum dots (IHP QDs) Image memorization and preprocessing, 269
271, 270f Image recognition simulation, 269
271, 272f Indium gallium zinc oxide (IGZO)
aluminum oxide (Al2O3), 134
136, 135f, 136f Indium tin oxide (ITO), 79
81, 206 Infrared-sensitive active components, 318 Inorganic dielectric layers, 61
62 Inorganic 1D material photoelectroactive memory. See Photoelectroactive memory in photoelectroactive synaptic device, 189
191 three-terminal synaptic device, 189
191 two-terminal synaptic device, 189 synthesis of, 180
181 Inorganic ferroelectric materials, 67
69 Inorganic halide perovskite quantum dots (IHP QDs), 137, 138f Inorganic materials, 63 Inorganic perovskite QD-based device, 284 InP transistor, 155 In situ techniques, 320
321 Integrated circuits (IC), 260
261 Integration, 320 International Technology Roadmap for Semiconductors (ITRS), 223, 260
261 Internet of things, 121 Ionic liquid electrolyte-gated neuromorphic transistors, 150
151 Ions, in electrolyte, 130
131 Ion sputtering, 62
63 Iontronics, 148
149 IPSC, 163
165 ITO. See Indium tin oxide (ITO)

329

ITRS. See International Technology Roadmap for Semiconductors (ITRS) I
V curves characteristics and light response, 255, 256f J Joule heating, 48
49 K Kelvin probe force microscope (KPFM), 287, 321 L Langmuir
Blodgett film technique, 182, 226 Law of mass conservation, drift-diffuse, 20 Light illumination process, 81
83, 97
99, 107
109, 114
117, 189
190, 232 Light-triggered organic neuromorphic device (LOND), 242 Liquid phase synthetic methods, 181 Lobula giant movement detector (LGMD) neuron, 167 Logic gate operations, 91, 235
237, 255
257, 263f of optoelectronic memristors, 92f LOND. See Light-triggered organic neuromorphic device (LOND) Long-range and short-range order PCM, 295
297 Long-term depression (LTD), 97, 204 Long-term memory (LTM), 266
268, 268f Long-term potentiation (LTP), 154
155, 204 Low-pressure CVD (LP-CVD), 180
181 Low-resistance states (LRS), 3
4, 17
18, 26
28, 75
76, 88, 279
280 in humid atmosphere, 44 Low-voltage operating characteristics of EGTs, 130
131, 139
140 LRS. See Low-resistance states (LRS) LTD. See Long-term depression (LTD) LTP. See Long-term potentiation (LTP) LUMO, 108, 112
113 M Material engineering, 309
310 Material stability, 317
318 MATLAB PDE tools, 31
32, 32f

330

Mean-square relative displacements (MSRD), 295
296 Mechanical exfoliation, 212 Mechanoreceptors, 162
163 Medium-term memory, 238
239 Memory ferroelectric, 188 medium-term, 238
239 photoelectroactive. See Photoelectroactive memory Memory and photonic computing, optoelectronic memristor for, 89
95 logic operation, 91 multilevel storage, 89
90 vision sensors, 91
95 Memory devices, 53, 107
108 structure and mechanisms, 113f Memory on/off current ratio, 57 Memory switching, 36 Memory transistor, gate electrode of, 114
117 Memory wall, 202 Memory window, 56
57, 109
111, 114f Memristors, 4
5, 14f, 75
76, 79
81, 91, 251
252, 260
261, 266 classification, 76f concept of, 13, 15, 17 operation mechanism of, 81
83 photons and, 76
77 responsive efficiency, 79
81 with UV light illumination, 95 Metal electrodes, 59
60 Metal-insulator-metal (MIM), 3
4 Metal-insulator transition (MIT), 50, 296 Metal nanoparticles (NPs), 62
63 Metal-organic CVD (MOCVD), 180
181 Metal-oxide based devices, 251
252 Metal oxides, 16 Metal oxide semiconductor (MOS) process, 53 Metal/semiconductor contacts, 81 Metal-semiconductor-metal (MSM), 286
287 Metaplastic EPSC (MEPSC), 157
158, 158f Metaplastic facilitation of long-term potentiation (MFLTP), 155, 157
158 Metaplasticity mimicked, 154
159 MFLTP. See Metaplastic facilitation of longterm potentiation (MFLTP)

Index

Microscopic mechanism, 77
89, 78f interfacial barrier, 79
81 of optoelectronic memristors, 77
79 Migration-based devices, 212
219 2D tunneling phototransistor for nonvolatile memory, 212
215 Mild “photoforming” strategy, 88
89 MIM. See Metal-insulator-metal (MIM) MIT. See Metal-insulator transition (MIT) Modified National Institute of standards and Technology (MNIST) database, 130 Moore’s law, 75, 145, 179 MoOx thin film, 258
260 MoS2
hBN
ReS2 device, 214
215 MoS2 neuromorphic transistor, 155
156 MOS process. See Metal oxide semiconductor (MOS) process MoS2
UCNPs, 84
86 MoTe2-based memristive device, 320 MPT-MMPT-HFCP, 188 MSM. See Metal-semiconductor-metal (MSM) Multigate neuromorphic transistors, 165
169 dendritic integration, 165
167 neuronal arithmetic, 167 orientation selectivity, 168
169 Multilevel storage of optoelectronic memristors, 89
90, 90f Multiple ferroelectric domains, 128
129 Multiple filaments, 26
32 in Cu/ZrO2:Cu/Pt device, 28
31 Multisensory system, 160 Multistep switching in Cu/ZrO2:Cu/Pt device, 31
32 in SET process, 31f “Multistore memory model”, 147 Multiterminal transistors, 145
146 Multiwalled CNTs (MWCNTs), 181
182 N Nanoparticle organic memory field-effect transistor (NOMFET), 125, 127f Natural biomaterials, 318
319 N-CuMe2Pc NWs, 84 Negative photoconductance (NPC), 186
187, 212 Negative-SET phenomenon, 32
35 Nernst
Planck equation, 20

Index

Neural plasticity, 251
252 Neuromorphic computing systems, 15, 17, 75, 76f, 95, 121, 170, 201
203, 251
252, 308
312 concept, 2 issues, 202 nonvolatile memory and, 219 number of conductance states, 321
322 optogenetic tunable memristors, 266
269 perovskite halides-based, 285
288 sensory synapse, 322
323 Neuromorphic devices, 147
148 Neuromorphic engineering, 146
148 Neuromorphic tactile processing system (NeuTap), 162
163 Neuromorphic transistors, 147
148 Neuronal arithmetic, 167 Neuron and synapse, 146
147, 203f Neurotransmitters, 130
131 NeuTap. See Neuromorphic tactile processing system (NeuTap) Ni/Al2O3/Au memristor, 91 N,N0 -diheptylperylenetetracarboxylic diimide, 84 NOMFET. See Nanoparticle organic memory field-effect transistor (NOMFET) Nonlinear relation (hysteresis), 15 Nonpolar resistive switching, 17
18 Nonvolatile memory devices, 2
3, 6f, 53, 308, 317
318 and artificial synapse, 4
5 characteristic, 212 conventional electrical-driven, 5
7 photoelectroactive devices for, 220 2D tunneling phototransistor for, 212
215 device fabrication, 212 performance, 214 working principle, 212
214 Nonvolatile memory function, 293, 295 Nonvolatile optical memories, 318 Nonvolatile photoelectroactive memristors, 320 Nonvolatile transistor memories, 58
70 charge-trap transistor memories, 64
66 ferroelectric field-effect, 66
70 floating-gate. See Floating-gate transistor memories (FGTM)

331

with high-dielectric constant, 109 Novel nonvolatile memory, 1 NPC. See Negative photoconductance (NPC) n-type organic semiconductors, 60 Nucleation and crystal growth, 298, 298f Nucleation, 20
21 O OECTs. See Organic electrochemical transistors (OECTs) OHPs. See Organic
inorganic hybrid perovskites (OHPs) One-dimensional (1D) materials, 179 application in photoelectroactive memory. See Photoelectroactive memory in photoelectroactive synaptic device, 188
193 array photoelectroactive memory device, 183
185 device fabrication, 182 metal-organic frameworks, 188 synthesis. See Synthesis, of onedimensional materials One transistor
one transistor (1T1T)-type MoS2 device, 114
117, 116f Operation mechanisms heterojunction, 81 interpretation, 4 of memristor, 81
83 of TBM, 55f three- and two-terminal in, 4
5 Operation principle of optical memory, 294
295, 294f Optical-based communication, 261
262 Optical
electronical memristor, 269
271 Optically switchable organic light-emitting transistors (OSOLETs), 233
234 Optical organic field-effect transistor (OFET) memory, 232
234 Optical programing/erasing, 4 Optical property of phase change materials, 300
301 “Optical-set” operation, 255
257 Optical signal, 251
253 Optical synaptic behaviors, 216 Optoelectronic applications, 76
77 Optoelectronic Boolean logic, 261
265 Optoelectronic logic gates, 235
237

332

Optoelectronic memory device, 228
237 on 2D transition metal dichalcogenide, 114 functional layers of, 112
113 optical organic field-effect transistor memory, 232
234 optoelectronic logic gates, 235
237 preparation, 114 resistive random access memory, 228
231 Optoelectronic memristor devices, 252
260 I
V curves characteristics and light response, 255, 256f photoelectric memristor devices, 257
260 photoelectric response, 255
257 structure of, 253
255 Optoelectronic memristors charge trapping/detrapping in, 85f for emulating synaptic functions, 95
99 formation/dissolution in, 83f logic operations of, 92f material conformation evolution of, 87f for memory and photonic computing, 89
95 microscopic mechanism of, 77
79 multilevel storage of, 90f with multiple functions, 91 photoactivated synaptic functions in, 98f photocontrolled interfacial barrier of, 80f visual information detecting and, 94f Optoelectronic neuromorphic systems, phase change memory. See Phase change memory (PCM) Optoelectronic nonvolatile memory, 1
2 for chalcogenide materials. See Chalcogenide materials multifunctional, 5 phase change materials in, 301
308 Optoelectronic resistive memory, 4 Optoelectronic resistive random access memory (ORRAM), 253
255 Optoelectronic sensorimotor system, 322
323 Optoelectronic synaptic transistors, 134
139 Optogenetics, 287 Optogenetics-inspired tunable synaptic functions, 97
99, 99f Optogenetic tunable memristors, 260
271 challenge, 271
273

Index

image memorization, preprocessing, and simulation of image recognition, 269
271, 270f, 272f neuromorphic computing, 266
269 optoelectronic Boolean logic, 261
265 possible approaches, 273
274 Organic dielectric layers, 61
62 Organic 1D material, 181 photoelectroactive memory, 188 photoelectroactive synaptic device, 191 Organic electrochemical transistors (OECTs), 150
151, 235
236, 235f Organic field-effect transistor memory device, 111 Organic
inorganic hybrid perovskites (OHPs), 81 Organic optoelectronic materials, 224
228, 244f electrochromic materials, 227
228, 228f photochromic materials, 224
226 photoconductive semiconductors, 226
227, 227f Organic semiconductor materials, 60, 240
242 on device structures, 111
113 Orientation selectivity, 168
169 OR logic operation, 262
265, 264f, 273f, 284 ORRAM. See Optoelectronic resistive random access memory (ORRAM) OSOLETs. See Optically switchable organic light-emitting transistors (OSOLETs) Ovonic threshold switch (OTS), 293, 294f Oxide-based neuromorphic transistor, 167 Oxide ferroelectrics, 128
129 Oxide semiconductors, 136
137 Oxygen exchange kinetics in VCM, 41
46 Oxygen exchange reaction, 47 Oxygen vacancy drift and diffusion, 47
48 filament, 44 P P(VDF-TrFE). See Poly(vinylidene fluoridetrifluoroethylene) (P(VDF-TrFE)) Paired-pulse depression (PPD), 157
158, 179, 189
191, 204
206 Paired-pulse facilitation (PPF), 97, 157
158, 179, 189
191, 204
207, 240
242, 266

Index

Paired-pulse ratio (PPR), 204
206 PCM. See Phase change materials (PCM) PCM-based photonic synapses, 311
312 PCRAM. See Phase change random access memory (PCRAM) PDR1A. See Poly(disperse red 1 acrylate) (PDR1A) PEDOT:PSS-based synaptic transistors, 132
134, 133f PEDOT:PTHF-based synaptic transistor, 132
134 PEG polymer, 151 PENG. See Piezoelectric nanogenerator (PENG) Pentacene/CuPc, 109 Perovskite-based memories, 317
318 Perovskite device as artificial eye, 215
219 device fabrication, 215 discussion, 216
219 performance, 216 working principle, 215
216 Perovskite halides, 279 -based neuromorphic computing, 285
288 -based three-terminal phototunable flash memory, 281
282 -based two-terminal phototunable RRAM, 283
285 Perovskites, 16, 40 metal-insulator transition in, 50 oxygen vacancy-rich, 44 PET substrates, 117
118 Phase change materials (PCM), 293, 295 for artificial neural networks, 308
311 crystalline structure of, 296f long-range and short-range order, 295
297 in neuromorphic computing, 308
312 operation strategy of, 303f optical property, 300
301 in optoelectronic nonvolatile memory, 301
308 all-photonic memory, 305
308, 306f electronic phase change memory, 303
305 rewritable optical disk, 301
303 properties, 295
301 RESET in, 310 switching kinetics, 297
299

333

Phase change memory in optoelectronic neuromorphic systems, 311
312 Phase change random access memory (PCRAM), 303
304, 305f Phenethylammonium, 215 Photoactivated synaptic functions, 95
97, 98f Photochromic DAEs, 109
113 Photochromic materials, 107
108, 224
226 Photochromic spiropyran memory device, 108
109, 112
113 Photochromism molecule, 188 Photoconductive semiconductors, 224, 226
227, 227f Photoconductivity (PPC), 136
137 Photoelectric memristor devices, 257
260 Photoelectric response, 255
257 Photoelectric synapse, 97 Photoelectroactive materials, 319 preparation, 317
319 biodegradability and biocompatibility, 318
319 material stability, 317
318 optical modulation, 318 thin-film fabrication technology, 317
318 in two-terminal memristor, 317 Photoelectroactive memory, 179, 188, 219, 321
322 application in, 182
188 CNT-based devices for, 209
212 for data storage, 201
202 inorganic 1D material in, 182
187 three-terminal memory device, 185
187 two-terminal memory device. See Twoterminal memory device migration-based devices, 212
219 organic 1D material, 188 perovskite device as artificial eye. See Perovskite device as artificial eye Si NCs. See Si nanocrystals (NCs) Photoelectroactive nonvolatile memory devices, 206 Photoelectroactive synaptic device, 188
193 inorganic 1D material, 189
191 three-terminal synaptic device, 189
191

334

Photoelectroactive synaptic device (Continued) two-terminal synaptic device, 189 organic 1D material, 191 Photogenerated charges, 108, 112, 114
117 Photoillumination, 77
79 Photoinvolved memristive mechanism, 100 Photoinvolved synaptic functions, 77 Photoirradiation, 87 Photoisomerization, of azobenzene, 226 Photonic modulation, 2
3 Photons, and memristor, 76
77 Photoprogrammable memories, 320 Photoresponsive active materials, 112 Photoresponsive molecular systems, 225f Photosensitive polymers, 117
118, 232
233 Photostimulated synapse transistor, 240
242 Phototransistor device, 185
186 Phototunable memory devices, 280
281 Physical resistance switching mechanism, 320
321 Physical vapor deposition (PVD) methods, 181 Piezoelectric nanogenerator (PENG), 163
165 PIM. See Processing-in-memory (PIM) Poly(2-vinynaphthalene) (PVN), 64 Poly(3,4-ethylenedioxythiophene) (PEDOT), 236 Poly(3,5-benzoic acid hexafluoroisopropylidene diphthalimide) (6FDA-DBA-SP), 117
118, 232
233, 233f Poly(3-octylthiophene) (P3OT), 188 Poly(disperse red 1 acrylate) (PDR1A), 238
239 Poly (methyl methacrylate) (PMMA), 128
129 Poly(vinyl alcohol) (PVA), 212 Poly(vinylidene fluoride) (PVDF), 69
70 Poly(vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)), 128
129, 129f, 185 Poly(vinylpyrrolidone) (PVP), 189
190 Polyacrylonitrile (PAN) film, 134
136 Polycyclic aromatic hydrocarbons, 60 Polymer-based optical OFET memory, 232 Polymer-based optoelectronic memory, 229 Polymer electrets, 111

Index

Polymer ferroelectric materials, 69
70 Polymer films, 230, 236
237 Polymers, as electret layers, 64 Polymer semiconductor materials, 60 Poly [2-methoxy-5-(20-ethylhexyloxy)-pphenylene vinylene] (MEH-PPV)/ RbAg4I5, 130
131 Poly (ethylene glycol) monomethyl ether (PEG), 131 Poly(isoindigo-co-bithiophene) [P(IID-BT)], 242 Polystyrene (PS) matrix, 281 Poole
Frenkel emission, 50
51 Positive photoconductivity (PPC), 186
187 Postsynaptic current (PSC), 84
86 in postneuron, 97 PPC. See Positive photoconductivity (PPC) PPD. See Paired-pulse depression (PPD) PPF. See Paired-pulse facilitation (PPF) P(VDF-TrFE)
PMMA blended film, 128
129 PPR. See Paired-pulse ratio (PPR) Processing-in-memory (PIM), 17 Programming/erasing cyclic endurance, 57 Pt/BiFeO3/Pt, 47, 47f p-type organic semiconductors, 60 Pulsed laser deposition (PLD) technique, 180
181 PVA. See Poly(vinyl alcohol) (PVA) PVDF. See Poly(vinylidene fluoride) (PVDF) PVDF to form P(VDF-TrFE), 69
70, 69f PVD methods. See Physical vapor deposition (PVD) methods PVN. See Poly(2-vinynaphthalene) (PVN) PVP. See Poly(vinylpyrrolidone) (PVP) PZT, 128 Q Quantum dots (QDs), 183
184 and nanocrystals (NCs), 284 R Reduced graphene oxide (RGO), 88
89 RESET process, 17
19 Ag filament and electrode in, 24f of Ag/H2O/Pt model device, 23 in dry atmosphere, 44 by electrical operations, 255

Index

in humid atmosphere, 44 operation, 309
310 SET process and, 79
81 Resistance-based memory devices, 53 Resistance state transition, 259f Resistive random access memory (RRAM), 75
76, 223
224, 228
231, 279 applications, 17 and biological nervous systems, 15 concept, 13
15 conductive filament in, 17
18 materials, 16, 16f mechanisms, 17
51 electrochemical metallization. See Electrochemical metallization (ECM) electrostatic/electronic effects. See Electrostatic/electronic effects thermochemical, 48
49 valence-change, 39
48. See also valence-change mechanisms (VCM) operation, 15 structure, 16f switching mechanisms, 17, 24f thermochemical mechanism, 48
49 two-terminal phototunable, 283
285 Resistive switching (RS), 13, 18
19, 88, 183. See also Resistive random access memory (RRAM) Ag/ZnO:Mn/Pt device characteristics, 27f Ag/ZrO2/Pt device characteristics, 33f characteristics, 75
76 of 1D material array-based memory device, 184
185 of electrochemical metallization memory, 77 filament growth in, 22 graphene oxide mechanism, 88
89 memristor mechanism, 77, 78f microscopic dynamic processes in, 17 in TiO2-based devices, 14f types, 17f Resistive switching (RS) memory, 4 concept of, 228
229, 232 Rewritable optical disk, 301
303 RRAM. See Resistive random access memory (RRAM)

335

S Scanning electron microscope (SEM), 22, 320
321 Scanning TEM (STEM) mode, 34
35 SCLC. See Space-charge-limited conduction (SCLC) Self-assembled monolayer (SAM), 59
60, 62
63, 225
226 Self-powered EGT-based artificial tactile sensory systems, 163
165, 164f Self-power-synaptic transistor (SPST), 163
165 SEM. See Scanning electron microscope (SEM) SEM
EXS method, 321 Semiconducting memory, 188 Semiconductor channel variation, 4
5 Semiconductor layer (P3HT), 109
112 Semiconductor layer materials, 107
109 Sensory organ, 252 Sensory synapse, 322
323 SET process, 17
19 of Ag/H2O/Pt model device, 23f conduction mechanism in, 26
28 crystallization in, 20
21 electroforming and, 32 multistep switching in, 31f operation, 309
310 and RESET process, 79
81 single filament in, 21
22 Short-/long-term plasticity (STP/LTP), 121
122 Short-term memory (STM), 266
268, 268f Short-term potentiation (STP), 97, 204 Si nanocrystals (NCs), 205f, 206 based optical synaptic devices, 206
209 discussion, 209 fabrication, 206 performance, 207
209, 208f working principle, 206
207 STDP-like behavior of, 209f Single-dihydroazulene molecule-based junctions, 225
226 Single filaments, 21
25 Single 1D material, 182
183 photoelectroactive memory device, 182
183 Single-wall carbon nanotubes (SWCNTs), 181
182, 191, 210

336

Single-wall carbon nanotubes (SWCNTs) (Continued) synaptic transistor, 131, 132f thin film transistor, 192
193 SiO2-based CNT devices, 210
211 Si/SiO2 substrate, 117
118 SmNiO3 synaptic transistor, 131 SmNiOx (SNO)-based neuromorphic transistor, 150
151, 150f Solid-state ionic conductor gated neuromorphic transistors, 151
153 Solution deposition techniques, 318 Solution phase growth (SPG), 180
181 Solution-processed method, 284
285 s-ONWST. See Stretchable organic nanowire synaptic transistor (s-ONWST) Space-charge-limited conduction (SCLC), 26
28, 49 SPG. See Solution phase growth (SPG) Spike-rate-dependent plasticity (SRDP), 237
238, 286
287 Spike-timing dependent plasticity (STDP) rule, 97, 121
122, 151
152, 155, 204, 205f, 268, 308
311, 309f SPST. See Self-power-synaptic transistor (SPST) SRDP. See Spike-rate-dependent plasticity (SRDP) State-of-the-art image sensors process, 252 State-of-the-art synaptic transistors, 122
139 electrolyte-gate synaptic transistors, 130
134 ferroelectric-gate synaptic transistors, 127
130 floating-gate synaptic transistors, 123
127, 124f optoelectronic synaptic transistors, 134
139 STDP rule. See Spike-timing dependent plasticity (STDP) rule STP. See Short-term potentiation (STP) Stretchable organic nanowire synaptic transistor (s-ONWST), 191, 242
244 “Strong glass” system, 299 SWCNTs. See Single-wall carbon nanotubes (SWCNTs) Switching kinetics, 19
21 phase change memory, 297
299

Index

Switching mechanism advanced approaches for, 320
321 analysis, 259f Switching speed, 320 Symmetric STDP function, 136
137 Synapses, 202
203, 203f Synaptic devices, 179, 220 Synaptic functions, 15 Boolean logic and, 260
271 Synaptic plasticity functions, 95
97, 146
147, 154
155, 167, 207, 285
286 Synaptic strength, 146
147 Synaptic transistors, 136
137, 139
140, 162
163 film-based floating-gate in, 124
125 state-of-the-art. See State-of-the-art synaptic transistors Synaptic weight, 95
97, 122, 146
148, 165
167, 206
207, 237
238, 311
312 of transistors, 240
242 Synthesis, of one-dimensional materials, 180
182 inorganic, 180
181 organic, 181 T Tactile sensory system, 163
165 Tafel equation, 20 TBM devices. See Transistor-based memory (TBM) devices TEM
EDS method, 321 TFTs. See Thin-film transistors (TFTs) Thermochemical mechanisms, 48
49 Thermo-optic functionality, 307
308 Thin-film fabrication technology, 317
318 Thin-film of Au, 123 Thin-film transistors (TFTs), 53
54 structures of, 54f SWCNT synaptic, 192
193 working principle, 54 Thin solid film, 318 Three-/multiterminal transistor-based artificial synapses, 121
122 Three-terminal optoelectronic memory device, 107
108 conventional structure, 107f, 108
109 development, 109
111

Index

flexible, 117
118 floating-gate layer, 111
112 functional layer for, 108
109 organic semiconductors based on, 111
113 performance, 118 working mechanism of, 108
109 Three-terminal phototunable flash memory, 281
282 Threshold switching phenomenon, 35
36 conduction mechanism in, 37
38, 39f and memory switching, 36 Time-dependent data storage retention capability, 57 Time-of-flight secondary-ion mass spectrometry (ToF-SIMS), 41
42, 43f TiO2-based CNT devices, 210 TiO2-based devices, 13 resistive switching in, 14f ToF-SIMS. See Time-of-flight secondary-ion mass spectrometry (ToF-SIMS) Top-down methods, 180 TPA-CN-TPE, 233 Traditional charge-based memories, 15 Traditional field-effect transistors, 123 TRAM. See Two-terminal tunneling random access memory (TRAM) Transistor, 4
5 Transistor-based artificial synapse, 121
122, 139
140 Transistor-based flash memory, 3 Transistor-based memory (TBM) devices, 53, 70, 108 structures and working principles, 53
57, 55f memory on/off current ratio, 57 memory window, 56
57 programming/erasing cyclic endurance, 57 time-dependent data storage retention capability, 57 Transmission electron microscopy (TEM), 320
321 Trapping-based photoelectroactive devices, 206
212 CNT-based devices, 209
212 Si NC-based optical synaptic devices. See Si nanocrystals (NCs)

337

Triboelectric nanogenerator (TENG), 163
165 Tunable electroluminescence characteristic, 88 Tunneling/blocking dielectric layer design, 61
62 Two-dimensional (2D) cluster, 21 2D mica crystal, 65
66, 67f Two-dimensional (2D) inorganic materials, 60
61 2D materials-based floating gate memory device, 114
117 Two-dimensional (2D) perovskite, 282 Two-dimensional transition metal dichalcogenide, 114
117 Two-layer optical neuron network, 218f Two-step RESET process, 26
28 Two-terminal memory device, 121
122 photoelectroactive memory device, 182
185 1D material array, 183
185 single 1D material, 182
183 three-terminal memory device, 185
187 Two-terminal memristors, 319 photoelectroactive materials in, 317 Two-terminal neuromorphic devices, 145
147 Two-terminal optoelectronic memory device, 75 charge trapping/detrapping, 84
87, 85f conformation evolution, 87
89 filament formation/dissolution, 81
84 microscopic mechanism, 77
89, 78f Two-terminal phototunable RRAM, 283
285 Two-terminal synaptic device, 189 Two-terminal tunneling random access memory (TRAM), 4
5 U Unipolar resistive switching (RS), 17
18, 17f, 48
49, 88 Upconversion nanoparticles (UCNPs), 84
86 UV light illumination, 81, 91

338

V Valence-change mechanisms (VCM), 17, 39
48 eight-wise and counter-eight-wise, 46
48, 46f filament in, 39
40 oxygen exchange in, 41
46 point defects in, 40
41 switching process, 48
49 Valence change memory (VCM), 77 Valence change memory memristor (VCMM), 155 Vanadyl phthalocyanine (VOPc), 242 Vapor
liquid
solid (VLS) processes, 180
181 Vapor phase growth (VPG), 180
181 VCM. See Valence-change mechanisms (VCM) VCMM. See Valence change memory memristor (VCMM) Very large-scale integration (VLSI), 209 Vision sensors, optoelectronic memristor for, 91
95, 96f

Index

VLS processes. See Vapor
liquid
solid (VLS) processes Volatile memory, 2
3 Voltage
time dilemma, 23
25 von Neumann computing system, 2, 201
202 VOPc. See Vanadyl phthalocyanine (VOPc) VPG. See Vapor phase growth (VPG) W “Wet” method, 182 Whole optical memory system, 301 Work function (WF), of conductive materials, 59, 59t X X-ray fluorescence spectrometer (EDX), 25 Z Zero-dimension material, 284 ZnO NRs surface, 258 ZnO/NSTO heterojunction, 81