Transmission Lines: Theory, Types and Applications : Theory, Types, and Applications [1 ed.] 9781617614231, 9781617613005

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Copyright © 2011. Nova Science Publishers, Incorporated. All rights reserved. Transmission Lines: Theory, Types and Applications : Theory, Types, and Applications, Nova Science Publishers, Incorporated, 2011. ProQuest Ebook

Copyright © 2011. Nova Science Publishers, Incorporated. All rights reserved. Transmission Lines: Theory, Types and Applications : Theory, Types, and Applications, Nova Science Publishers, Incorporated, 2011. ProQuest Ebook

ELECTRICAL ENGINEERING DEVELOPMENTS

TRANSMISSION LINES

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THEORY, TYPES AND APPLICATIONS

No part of this digital document may be reproduced, stored in a retrieval system or transmitted in any form or by any means. The publisher has taken reasonable care in the preparation of this digital document, but makes no expressed or implied warranty of any kind and assumes no responsibility for any errors or omissions. No liability is assumed for incidental or consequential damages in connection with or arising out of information contained herein. This digital document is sold with the clear understanding that the publisher is not engaged in rendering legal, medical or any other professional services.

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ELECTRICAL ENGINEERING DEVELOPMENTS

TRANSMISSION LINES THEORY, TYPES AND APPLICATIONS

DANA M. WELTON Copyright © 2011. Nova Science Publishers, Incorporated. All rights reserved.

EDITOR

Nova Science Publishers, Inc. New York

Transmission Lines: Theory, Types and Applications : Theory, Types, and Applications, Nova Science Publishers, Incorporated, 2011. ProQuest Ebook

Copyright ©2011 by Nova Science Publishers, Inc. All rights reserved. No part of this book may be reproduced, stored in a retrieval system or transmitted in any form or by any means: electronic, electrostatic, magnetic, tape, mechanical photocopying, recording or otherwise without the written permission of the Publisher. For permission to use material from this book please contact us: Telephone 631-231-7269; Fax 631-231-8175 Web Site: http://www.novapublishers.com

NOTICE TO THE READER The Publisher has taken reasonable care in the preparation of this book, but makes no expressed or implied warranty of any kind and assumes no responsibility for any errors or omissions. No liability is assumed for incidental or consequential damages in connection with or arising out of information contained in this book. The Publisher shall not be liable for any special, consequential, or exemplary damages resulting, in whole or in part, from the readers’ use of, or reliance upon, this material. Any parts of this book based on government reports are so indicated and copyright is claimed for those parts to the extent applicable to compilations of such works.

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Independent verification should be sought for any data, advice or recommendations contained in this book. In addition, no responsibility is assumed by the publisher for any injury and/or damage to persons or property arising from any methods, products, instructions, ideas or otherwise contained in this publication. This publication is designed to provide accurate and authoritative information with regard to the subject matter covered herein. It is sold with the clear understanding that the Publisher is not engaged in rendering legal or any other professional services. If legal or any other expert assistance is required, the services of a competent person should be sought. FROM A DECLARATION OF PARTICIPANTS JOINTLY ADOPTED BY A COMMITTEE OF THE AMERICAN BAR ASSOCIATION AND A COMMITTEE OF PUBLISHERS. Additional color graphics may be available in the e-book version of this book.

Library of Congress Cataloging-in-Publication Data Transmission lines : theory, types, and applications / editor, Dana M. Welton. p. cm. Includes bibliographical references and index. ISBN 978-1-61761-423-1 (E-Book) 1. Electric lines. 2. Electric power transmission. I. Welton, Dana M. TK3221.T73 2010 621.319--dc22 2010027641

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CONTENTS Preface Chapter 1

Chapter 2

Chapter 3

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Chapter 4

Chapter 5

Chapter 6

vii Applications of Fault Location Techniques for Transmission and Distribution Systems Tamer A. Kawady

1

Current Transmission Fibers and R&Ds on Future Transmission Fibers Kazunori Mukasa, Katsunori Imamura and Takeshi Yagi

41

Recent Developments in Transmission Pole Dynamic Analysis and Design Kaoshan Dai and Shen-En Chen

81

Electric Transmission Line Approach to Non-Electric Transmission Lines R. Uklejewski and T. Czapski

115

The Effects of Priority Service on Electricity Transmission: The Case of Interconnection Investment Isamu Matsukawa

165

Modelling of Strain Accumulation Process in Cyclically Loaded Transmission Belts Barbara Zupancic and Igor Emri

185

Chapter 7

Stepped Transmission Line and Impedance Matching Chunqi Qian

221

Chapter 8

To the Theory of Magnetically Insulated Transmission Lines Svyatoslav Ya. Belomyttsev, V. Alexander Kirikov and V. Victor Ryzhov

237

Chapter 9

Periodic Regimes for Distortionless Lossy Transmission Lines Terminated by Parallel Connected RCL-Loads G. Vasil Angelov

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vi

Contents

Chapter 10

Spatial Auction Markets with Unique Consumer Price E. Allevi, A. Gnudi, I.V. Konnov, M.T. Vespucci

295

Chapter 11

Testing of CMOS Driven VLSI Interconnects Devendra Kumar Sharma, B.K.Kaushik and R.K.Sharma

309

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Index

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PREFACE A transmission line is the material medium or structure that forms all or part of a path from one place to another for directing the transmission of energy, such as electromagnetic waves or acoustic waves, as well as electric power transmission. This book presents current research data from across the globe in the study of transmission lines, including fault location fundamentals in transmission and distribution systems; optical fibers used for terrestrial and submarine transmission systems; transmission pole dynamics and design; the impacts of priority service on transmission investment using a mathematical programming model; impedance matching by segmented transmission lines; and wave propagating in the magnetically insulated transmission line. Chapter 1 - Due to the increasing complexities of modern power system networks, improving the existent protection functions and developing new ones have got much attention recently. The goal is to enhance the overall power system performance. A few years ago, the supplementary protection equipment such as fault locators has got little consideration compared with the main protection ones. Nowadays, these ones have an increasing attention resulting in remarkable investments for these purposes. The essential factors behind these new strategies are due to the competitive markets and new deregulation policies, in which the terms such as the continuity, dependability and reliability play an important role. Chapter 2 - This chapter covers the current situation for optical fibers used for terrestrial and submarine transmission systems. In the terrestrial systems, even though various types of transmission fibers, including non-zero dispersion shifted fibers (NZ-DSFs), have been developed and proposed, standard single mode fibers (SMFs) have been far more widely used all over the world. In the submarine systems, on the other hand, new optical fibers, such as NZ-DSFs and dispersion management lines (DMLs), have been developed, proposed and deployed in the real field systems. Among them, DMLs, which use dispersion compensating fibers as a part of dispersion management lines together with SMFs, showed a quite high performance. Because SMFs and DMLs showed quite high and matured properties, it seems that no new fibers, except for improved SMFs and/or DMLs, will be required at the moment. However, it should be noted that the internet traffic is rapidly growing, and around 20152020, it is expected that the current transmission fibers will become inadequate. Considering the circumstances, there are three important directions in terms of R&D for future highcapacity transmission. (1) Reducing non-linearity by means of enlarging Aeff and/or reducing attenuation loss. It is of particular importance in the case of transmission systems using new multi-level signal format. (2) Using a wider transmission band than the current C and/or L-

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Dana M. Welton

Band with new transmission fibers. For example, holey fibers (HFs), which have an endlessly single mode property, are one of the interesting candidates. (3) Using space division multiplexing (SDM) by using multi-core fibers. A multi-core fiber literally multiples the core number within the fiber dimension, which results in multiple transmission capacity per one fiber. These three approaches may be combined with each other to increase the factor of capacity-improvement. Examples of novel R&Ds on these transmission fibers will be discussed in the latter part of this chapter. Chapter 3 - Transmission poles are extensively used as support structures in electric power transmission and distribution lines. Design of pole structures primarily follows reliability-based procedures using stress analysis of these structures for weight, wind/ice loading, and effects either due to conductor breaking or due to collapse of adjacent structures. Understanding transmission pole dynamic performance is essential for reliable design of these support structures against wind, earthquakes, and other time-variant loads. Fundamental frequencies used in design guidelines are mostly approximate values and lack the details to warrant actual pole behaviors. Therefore, field studies of transmission pole free vibration are presented in this chapter to provide the scientific basis for more detailed designs. Parameters that have influence on the pole modal behaviors, such as material properties, prestress, and boundary conditions, are discussed. Complex coupling issues between the pole and the power line are also investigated along with an introduction to some simple but reliable approaches to model the transmission poles. Commercial blasts can induce ground movements, air vibrations, flyrock and subsidence. There is a lack of industry-wide study on how transmission structures respond to blasting and there are no widely accepted guidelines to regulate blast operations near transmission structures. To help the power industry protect transmission assets against blast impact, an approach to establish a blast limit based on actual structural response is presented. Details of ground vibration measurement, structural response analysis, and blast design consideration are introduced, which provide scientific data and a systematic research procedure that allow engineers to design a blast plan based on actual structural responses. Chapter 4 - The notions and methods developed during more than 100 years in the electric parameter-distributed circuits theory have been successfully applied to solve various problems concerning the electric transmission lines working at low frequencies 50 Hz or 60 Hz, and also the microwave electronic circuits [15]. However, they can also be applied to analyse and solve one-dimensional problems occurring in various domains of the continuum physics, especially in the coupled fields problems: mechano-electric, acousto-electric, thermo-electric, thermo-elastic, thermo-elasto-diffusive, etc. Chapter 5 - Reliability management of electric power systems, which used to be implemented through coordination among regulated utilities, is one of the main issues in deregulated electricity markets. The efficient management of system reliability is a crucial factor for the generation sector to be competitive because generators rely on transmission networks to send power to consumers. Priority service, which is a nonlinear pricing mechanism and efficiently rations the usage of scarce resources through consumer selfselection of a reliability level of service, can be applied to electricity transmission as an efficient method of reliability management. Examples include tariff options of ‘firm’ and ‘non-firm’ transmission services in the PJM Regional Transmission Organization in the United States. Even if the number of classes is two, efficiency gain from priority service is sufficient in comparison to random rationing such as rotating outages.

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Preface

ix

This study investigates the impacts of priority service on transmission investment, using a mathematical programming model. The model solves a mixed integer programming problem in which the transmission utility’s decision to interrupt wheeling demand is represented by binary variables. Prior to the transmission service, customers can assign the various increments of their transmission demand to different service options to maximize the expected net benefits. The transmission utility is assumed to determine service prices and transmission investment to maximize the expected social welfare. The model is applied to a hypothetical project that adds an interconnector to the congested power grid in Japan. Examples include frequency converters, which are used for power exchange between 50 Hz regions (the eastern part of Japan) and 60 Hz regions (the western part of Japan). As these frequency converters have often been congested, price differences between the east and west of Japan have emerged, and these price differences may discourage power trade between two regions. The application of priority service with two classes to the usage of frequency converters is expected to efficiently ration congested power grid. The results indicate that high costs of building an interconnector exclude customers exhibiting relatively lower willingness to pay for transmission service, though priority service for electricity transmission enables other customers to raise their net benefits in comparison to random rationing. The exclusion of these customers leads to a loss of social welfare through a decrease in power trade. A welfare analysis based on a mathematical programming model of this paper is useful for understanding the impact of priority service on interconnection investment. Chapter 6 - This chapter presents the analysis of time-dependent behaviour of polymeric (viscoelastic) materials under cyclic loading conditions that polymeric products, such as transmission belts, are exposed to during their operation. Time-dependent behaviour of cyclically loaded transmission belts is studied through the newly developed methodology for analyzing strain accumulation process that may be one of the mechanisms responsible for the hardening of material, crack formation, and ultimately for the failure of polymeric products. Strain accumulation analysis, presented here, is based on the theoretical approach that takes in consideration time-dependent material properties expressed with material retardation spectrum. By using developed methodology one can analyze the intensity of strain accumulation process in relation to different material retardation spectra, and operating loading conditions, determined by frequency of cyclic loading, number of loading cycles, and belt-drive geometry. It turns out that critical operating frequency at which the strain accumulation in the material is the most intensive, depends on the material retardation time (location of retardation spectrum), whereas the magnitude of accumulated strain depends on the strength of corresponding discrete spectrum lines. Thus, the spectrum distribution defines the intensity and the magnitude of accumulated strain and is, in this aspect, one of the most important functions for predicting durability of cyclically loaded polymeric products through proposed strain accumulation approach. Based on here presented analysis a new designing criterion is proposed for use in engineering applications for selecting a proper material for general drive-belt operations. Chapter 7 - Transmission line is routinely used as power transfer medium. A propagating wave will experience reflection at the boundary between the transmission line and the loading device. Because the wave reflection is generally undesirable for efficient power transfer, impedance transformation is required to match the load impedance with the characteristic impedance of the transmission line. Circuit networks composed of discrete reactive

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components, such as inductors, capacitors and transformers are often used as impedance transformation devices. Versatile as they are, each particular network can only match a specific range of load impedance. And in order to match the impedance of different loading components, different circuit networks need to be used. In many practical circumstances however, there is a need to use the same impedance matching network to cover a broader range of load impedance, thus greatly simplify the circuit design. In this chapter, we will introduce the concept of impedance matching by segmented transmission line which consists of a short section of uniform transmission line inserted with multiple sliding dielectric segments. We will demonstrate that the proper positioning of each individual element can result in the total cancellation of internal reflections. And a broad range of load impedance can be matched without the necessity to reconnect the circuit. After a brief review of the impedance transformation relation, we will deduce an analytical expression for the position of each dielectric segment. A pictorial description of the analytical method will be presented with the language of Smith chart. The applications and restrictions of stepped transmission line will be addressed at the end of the chapter. Chapter 8 - In this paper, the model of the wave propagating in the magnetically insulated transmission line (MITL) is proposed allowing to determine the potential of the anode boundary of the electron sheath near the cathode and thus the total current in the wave. The model is based on energy and axial momentum conservation, as well as on “average electron” approximation, which means that all the electrons leaking to the anode at the front of the wave have the same energy and incidance angle. Conversion of the sheath current to the cathode current (retrapping) at the wave reflection from the load is considered. Noticeable retrapping is predicted even in a near-matched mode, i.e., when the variation of voltage and current after the reflection is negligible. Chapter 9 - The processes in a distortionless lossy transmission line terminated by parallel connected RCL-loads can be formulated as a mixed problem for first order hyperbolic system with constant coefficients. It can be reduced to a neutral functional differential system with polynomial nonlinearities. The main purpose of the present paper is to obtain periodic solutions of a functional differential system obtained by fixed point method instead of usually accepted numerical methods. Chapter 10 - We consider a collection of auctions representing zonal electricity markets, which are joined by transmission lines in a spatial system. At each market, generating companies (traders) and customers (buyers) submit their fixed offer/bid prices together with maximal offer/bid volumes, respectively. In addition to the usual balance and capacity constraints, we consider also the additional requirement of utilizing the minimal unique purchase price for all the zones. As a result, we obtain spatial equilibrium type problems with special parameter for finding zonal prices and offer/bid volumes. We show that the streamlined formulation can be inconsistent under rather natural assumptions and propose a relaxed formulation. This problem admits suitable solution methods. We propose a parametric method combined with a bisection type procedure to solve this problem. Chapter 11 - Wiring-up of on-chip devices takes place through various conductors produced during fabrication process. In past, on-chip interconnect wires were not considered important in circuit analysis except in high precision analysis. The shrinking feature size of MOSFET devices is largely responsible for growth of VLSI circuits. In deep submicron (DSM) technology, the interconnect geometry is scaled down for high wiring density. The complex geometry of interconnects and high operational frequency introduce wire parasitics

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and inter-wire parasitics. These parasitics cause delay, power dissipation and crosstalk that may affect the signal integrity in VLSI system. Accurate analysis, sophisticated design and effective test methods are the requirement of the day to ensure the proper functionality and reliability of VLSI circuits. The testing of interconnect is becoming important and a challenge in the current technology. This chapter provides an overview of on-chip interconnects. Furthermore, the parasitics of interconnects and their effects on circuit performance have been discussed. The transmission line models for on-chip interconnects have been discussed along with Enhanced Transmission Line (ETL) model which is effective in modeling high frequency effects in RF ICs. Full wave analysis is also described. Recent years have seen the rapidly growing prominence of new techniques for testing CMOS based VLSI chip with innovative features to allow high quality and fast test time. Besides basic techniques of testing, BIST, an important technique has been described with its different approaches and economics. The defects in VLSI circuits and fault models are described. The type of test pattern generation (TPG) circuitry is the most relevant issue while dealing with BIST. This issue of TPG is discussed in the chapter. The most important requirement is that TPG must have high fault coverage and low area overhead. Later, the testing of interconnect defects affecting the circuit performance has been reviewed. Finally, future challenges in VLSI interconnect and their testing is explored.

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In: Transmission Lines: Theory, Types and Applications ISBN: 978-1-61761-300-5 Editor: Dana M. Welton © 2011 Nova Science Publishers, Inc.

Chapter 1

APPLICATIONS OF FAULT LOCATION TECHNIQUES FOR TRANSMISSION AND DISTRIBUTION SYSTEMS Tamer A. Kawady Electrical Engineering Department, Minoufiya University, Shebin El-Kom, Egypt

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1. INTRODUCTION Due to the increasing complexities of modern power system networks, improving the existent protection functions and developing new ones have got much attention recently. The goal is to enhance the overall power system performance. A few years ago, the supplementary protection equipment such as fault locators has got little consideration compared with the main protection ones. Nowadays, these ones have an increasing attention resulting in remarkable investments for these purposes. The essential factors behind these new strategies are due to the competitive markets and new deregulation policies, in which the terms such as the continuity, dependability and reliability play an important role. Transmission and distribution lines experience usually faults owing to different causes including storms, lightning, snow, rain, insulation breakdown. Short circuits may occur as well by birds or other external objects. In most cases, these electrical faults manifest in mechanical damage resulting in disconnecting the power supply to some costumers. The restoration can be expedited if the location of the fault is either known or can be estimated with reasonable accuracy. The aimed fault locators should provide successful estimation of fault distances for both sustained and transient faults. In contrast with sustained faults, transient ones may cause minor damage that is not easily visible on inspection. Hence fault locators may help identify these locations for early repairs to prevent recurrence and consequent major damages [1], [2]. For the purpose of fault location estimation, in particular, distance relays can be considered as the first attempt to realize this aim. However, these relays provide a fast and reliable indication of the faulted area rather than pinpointing the fault position accurately. They are, therefore, employed for initiating the protection reaction after the fault inception as soon as possible. On the other hand, fault location estimation requires more accurate and

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sophisticated computation routines. Thus, the need for particular fault location algorithms is obvious. Distance relays have multiple protection zones to provide back capability. The relay that detects the fault in the 1st-zone is designed to trip first. Generally, a pair of distance relays is used to protect a two-terminal line. Usually, they can communicate with each other, forming a pilot relaying. As a result of exchanging information between the distance relays from the line terminals, they both could trip at the 1st-zone setting. Operation of a distance relay may be significantly influenced by the combined effect of load and fault resistance, which is known as the reactance effect. The distance relay may miss-operate for a forward external fault, or may not operate for an internal fault if the value of the fault resistance is too large. The value of the fault resistance may be particularly large for ground faults, which are the most frequent faults on overhead lines [3]-[8]. Fault locators and protective relays are closely related, however, there are some important differences between them. Fault locators are used for pinpointing the fault position accurately and not only for indication of the general area (defined by a protective zone) where a fault occurred – which is the case for protective relays. Both the measurement and decision making of protective relays are performed in an on-line regime. High speed of operation of protective relays appears as a crucial requirement imposed on them. This is so since in order to prevent spreading out the fault effects; the faulted line has to be switched off as quickly as possible. Therefore, high-speed measuring algorithms are applied in contemporary protective relays. Use of high-speed operating circuit breakers is also of prime importance. Fault-clearing time is an important consideration in the selection of protective relays and requirements for relaying speed must be carefully determined. If the relaying is too slow, system instability, excessive equipment damage, and adverse effects on customer service may result. On the other hand, faster protection tends to compromise relay system security and selectivity. Requirement for fast clearing of faults demands that the decision for tripping transmission lines has to be made in short time, even faster than in one cycle of the fundamental frequency (20 ms for the systems operating at 50 Hz) [2], [9], [10]. In contrast, the calculations of fault locators are performed in an off-line mode since the results of these calculations (position of the fault and in the case of some algorithms also the involved fault resistance) are for human users. This implies that the fault-location speed of calculations can be measured in seconds or even minutes. Including the fault-location function as an additional function of microprocessor-based relays is commonly used in practice. In this case high computational capability and communication with remote sites of modern relays are utilized at little or almost no additional cost. Also, digital fault recorders enable easy and not costly incorporation of the fault-location function. In turn, stand-alone fault locators are applied in the case of using sophisticated fault-location algorithms and under the condition that higher cost of the implementation is accepted. Yet the other possibility is related to post-fault analysis programs with included fault-location algorithms. Such programs are used mainly for verification of operation of protective relays [11], [12], [13]. In spite of the developed research efforts in the literatures for fault location studies, providing a reliable and accurate fault location algorithm is still considered a challenge. This is mainly due to the varieties of the technical problems that can remarkably affect the behavior of the existing algorithms. Thus, the research for fault location methodologies is an attractive area till present in order to have a better understanding of the problem essence and to develop advanced solutions.

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Applications of Fault Location Techniques for Transmission and Distribution …

3

This chapter presents a summary of the basic concepts of fault location fundamentals in transmission and distribution systems. The history of the fault location process is firstly reviewed. Then, the faults in transmission nets are highlighted including their types, causes and occurrence rates. Fault location process is finally outlined including the process description, the aimed benefits and the classification of the various fault location algorithms. Differences between transmission and distribution systems will be also highlighted.

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2. HISTORICAL BACKGROUND A few years ago, most power companies elected to have little or no investment for improving fault location methods. This is mainly due to a belief that most of the faults are transient ones needing no information about their locations. Also, the weak or in accurate behavior of the earlier fault locators may have played a role in this belief. On the other hand, a huge amount of research contributions were presented for fault location purposes as reported in the literatures. However, these efforts received little consideration from these companies. These viewpoints are recently changed due to the new concepts of free marketing and de-regulation all over the world. These competitive markets force the companies to change their policies to save money and time as well as to provide a better service. This consequently leads to increasingly consider the benefits of fault location estimation methods. Nowadays, it is quite common for almost all modern versions of multi-function line protection units to include separate routines for fault location calculation. Since the distance relay was not accurate enough to detect the fault distance precisely, research efforts were directed to develop dedicated fault location schemes by measuring the reactance from the sending end to the fault location. A brief coverage of the earliest methods for this purpose was presented in [13]. However these simple and approximated methods also suffered from the limited accuracy. Then the first generations of travelling wave-based fault locators were introduced in the field in the 50s of the last century [14]. The basic idea of these schemes was based on determining the time for the injected wave to travel between the injection point and the fault position. In spite of their remarkable performance as compared with reactance-based ones at that time, they were gradually abandoned due to the reliability and maintenance problems as well as to the economical factor [15]. Later, the great developments of injecting and capturing traveling wave signals as well as the modern algorithms support travelling wave-based fault locators to represent strong competitors to other fault location methods. A lot of papers were then published to employ this technique for fault location purposes. However travelling wave-based schemes still suffer from different shortcomings and disadvantages [16-18]. Another way has been introduced to capture and analyze the propagated transient waves into the voltages or currents during the fault [19]. The revolution of solid state relays and the later advancement in digital technologies attracted the researchers to develop modern impedance measurement-based fault locators. These schemes can optimally benefit from the mathematical handling abilities of microprocessors to develop modern digital fault location schemes. Each of them has its own advantages and disadvantages. These locators are basically distinctive with needing no further equipment as compared with travelling wave ones.

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From the historical viewpoint, digital relaying was firstly initiated to implement all computational protection equipment in a substation during the late 1960s [20]. The first outline of a digital distance protection scheme was suggested in 1971 [21]. The first practical implementation of digital relay was introduced for line protection by Westinghouse and Pacific Gas & Electric company in USA in 1972 [22, 23]. The use of Fourier analysis to estimate the fundamental components of voltage and current phasors was proposed in 1975 for distance protection applications [24]. The moving window with Fourier Transform and the employment of Digital Fourier Transform (DFT) was introduced, implemented and tested in the early 1980s [25, 26]. Then a huge amount of contributions were developed establishing the foundations of this art [27, 28]. These tools were successfully employed for developing impedance based fault locator algorithms as well. The employment of these digital versions of protection equipment has numerous advantages such as reliability, flexibility adaptability, self monitoring and cost reduction. In spite of the promising performance and their remarkable performance, they still suffer from the associated shortcomings with the protection function itself. This is mainly due to a fact that the new digital versions of protection relays are, in most cases, modern replica for the old ones employing the new features of digital equipment. On the other hand, they are still suffering from those shortcomings related to the protection function essence. Thus their overall accuracy is sometimes questionable in certain circumstances. This requires further efforts to improve these approaches in order to realize the aimed performance.

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3. PROPERTIES OF TRANSMISSION LINE FAULTS Transmission lines are considered the most vital components in power systems connecting both generating and consumer areas with huge interconnected networks. They consist of a group of overhead conductors spreading in a wide area in different geographical and weather circumstances. These conductors are dispensed on a special metallic structure “towers”, in which the conductors are separated from the tower body with some insulating components and from each other with an adequate spacing to allow the air to serve as a sufficient insulation among them. Unfortunately these conductors are frequently subjected to a wide variety of fault types. Thus, providing proper protection functions for them is an attractive area for research specialists. Different types of faults can occur including phase faults among two or more different conductors or ground faults including one or more conductors to ground types [1]. Transmission and distribution lines usually experience both permanent and temporary faults. For permanent faults, power supply can be restored after the maintenance crew finishes the repair of the damage caused by the fault. This raise the solid importance of fault location processes; otherwise the whole line has to be inspected to find the damage place. This allows saving money and time for the inspection and repair, as well as to provide a better service due to the possibility of faster restoration of power supply. Moreover, this also enables avoiding large blackouts as well. If a given line is taken out of service, the connected loads are not supplied or, if possible, the other lines are forced to supply the loads supplied by the tripped line. It is also possible that a series of cascading trips can happen, taking out of service successively larger and larger parts of the system [2]. In some unfavorable cases this can lead

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Applications of Fault Location Techniques for Transmission and Distribution …

5

even to blackouts of large power systems, as has happened recently in some countries. Contemporary power systems operate closer and closer to their operating limits. Therefore, in order to avoid blackouts special care ought to be paid in equipping power systems with protection and control devices, as well as in their settings. On the other hand, temporary faults are mostly self-cleared. These faults represent the most dominant faults in power systems with more than 80% of the occurring faults. In consequence, the power-supply continuity is not permanently affected, which is an advantage. Most of them occur temporarily as a result of a flashover on the insulation due to the environmental factors such as the lightning or humidity. Also, they may occur due to the insulation failures resulting from the deterioration of the insulating material itself. The current path for these faults includes the arc resistance, tower impedance and tower footing resistance. These factors can, therefore, impact the impedance ground returns and may consequently affect the related fault current. Although temporary faults are self-cleared and do not affect permanently the supply continuity, location of such faults is important to help to pinpoint the weak spots on the line. As a result, the plans of maintenance schedules can be then fixed for avoiding the expected problems in the future. For example, tree growth could reduce clearances, resulting in a flashover during severe conductor sagging. Also, the knowledge that repeating faults are occurring in the same area can be valuable in detecting the cause. Weak spots that are not obvious may be found because a more thorough inspection can be focused in the limited area defined by the fault locator. Temporary faults are normally characterized by the existence of non-linear arcs. Almost all known fault location algorithms were developed by assuming a linear fault arc with constant impedance. However, the simulation results showed that the non-linear physical behavior of the fault arc in air may remarkably influence the performance of all impedance measurement-based protection equipment such as distance relays and fault location equipment [29]. This is mainly due to the impedance nonlinearity resulting from the time varying parameters of the arcs during these faults. It is therefore more proper to consider the influence of these situations in order to realize the aimed accurate performance. Tower footing resistance (impedance between tower foundation and the earth) represents the basic factor that can remarkably affect the fault currents. This resistance is typically less than 10Ω for good transmission line lightning performance. Different factors can practically affect this value. The soil resistivity is considered a basic one as the tower footing resistance increases with increasing of the soil resistivity. The existence of overhead ground wires is another factor as they help to reduce the effective footing resistance. This happens by allowing the flashover ground current to find a path to ground through several lines. Then the total footing resistance of several lines in parallel results in an overall reduction in the effective resistance value. However the application of ground wires is not common for all utilities. Thus footing resistance can vary from less than one Ohm to some hundreds of Ohms resulting in a wide range of the related fault resistance. As an example, some ground fault cases were actually measured from real field tests passing through a fault resistance as high as 800Ω [30]. Another type of temporary faults can happen when the path to ground is established due to growing trees in the gradient breakdown zone characterizing with a higher resistance path. Also ground faults may occur as a result of fallen conductors resulting in permanent single or double phases to ground faults. However, proper and continuous maintenance for overhead lines eliminates these faults greatly [3].

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6

4. FAULT LOCATION ESTIMATION BENEFITS Different benefits can be gained with utilizing fault location schemes in power systems. These benefits can be summarized as follows [1]:

4.1. Time and Effort Saving After the fault, the related relaying equipment enables the associated circuit breakers to de-energize the faulted sections. Once the fault is cleared and the participated faulted phase(s) are declared, the adopted fault locator is enabled to detect the fault position. Then, the maintenance crews can be informed of that location in order to fix the resultant damage. Later, the line can be reenergized again after finishing the maintenance task. Since transmission line networks spread for some hundreds of kilometers in different environmental and geographical circumstances, locating these faults based on the human experience and the available information about the status of all breakers in the faulted area is not efficient and time consuming. These efforts can therefore effectively help to sectionalize the fault (declare the faulted line section) rather than to locate precisely the fault position. Thus the importance of employing dedicated fault location schemes is obvious.

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4.2. Improving the System Availability There is no doubt that fast and effective maintenance processes directly lead to improve the power availability to the consumers. This consequently enhances the overall efficiency of the power nets. These concepts of (availability, efficiency, quality …. etc) have an increasingly importance nowadays due to the new marketing policies resulting from deregulation and liberalization of power and energy markets.

4.3. Assisting Future Maintenance Plans It is quite right that temporary faults (the most dominant fault on overhead lines) are self cleared and hence the system continuity is not permanently affected. However, analyzing the location of these faults can help to pinpoint the wake spots on the overall transmission nets effectively. This hopefully assists the future plans of maintenance schedules and consequently leads to avoid further problems in the future. These strategies of preventive maintenance enable to avoid those large problems such as blackouts and help to increase the efficiency of the overall power system.

4.4. Economic Factor All the mentioned benefits can be reviewed from the economical perspective. There is no doubt that time and effort saving, increasing the power availability and avoiding future

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accidents can be directly interpreted as a cost reduction or a profit increasing. This is an essential concept for competitive marketing. Thus the importance of proper fault location schemes for power system utilities is obvious.

5. CLASSIFICATION OF DEVELOPED FAULT LOCATION METHODS Generally speaking, fault location methods can be classified into two basic groups, travelling wave-based schemes and impedance measurement-based ones as shown in Figure 1. Travelling wave schemes can be used either with injecting a certain travelling wave from the locator position or with analyzing the generated transients due to the fault occurrence. Impedance measurement schemes are classified whether they depend on the data from one or both line ends. Each category can be then classified according to the considered line model during the derivation method using either simpler (lumped) models or detailed (distributed parameters) ones.

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5.1. Travelling Wave-Based Fault Locators Voltage and current transients travel towards the line terminals after the fault occurrence. These transients continue to bounce back and forth between the fault point and the two terminals for the faulted line until the post-fault steady state is reached [31]. If a fault occurs at a distance x from the sending end, an abrupt injection appears at the fault point. This injection will travel like a surge along the line in both directions between the fault point and two terminals until the post-fault steady state is reached. Hence, these traveling waves can be captured and then utilized for locating these faults. These methods rely on calculating the time of line disturbance to reach the end of the line. This is achieved by comparing the wave arrival time difference at each end to determine the distance to the disturbance position. Since the wave moves at the speed of light, this requires extremely accurate timing for calculation of the fault location. Either voltage or current wave data can be used. The voltage portion of the traveling waveform tends to be reduced as the result of buses with lower impedance. On the other hand, the current waveform tends to double as the result of a constant current source. Then, the aimed fault location can be calculated based on the precise wave-arrival times on each end of the line. For this target, different equipment are technically required including accurate time-stamping device such as GPS devices on both ends of the line, appropriate sensors to detect the voltage or current and communication circuits. Employing travelling wave phenomena for fault location purposes for both underground cables and overhead lines was reported since 1931. In 1951, Lewis classified travelling wavebased schemes into different four types A, B, C and D according to their modes of operation using the traveling voltage waves. Types A and D depend on analyzing the resulting transients from the fault itself needing no further pulse generating circuitry. Type A is a single end one capturing the transients only at one end. It relies on the generated transients from the arcing flashover during the fault. However the assumption of getting generated transients at the line end is not always satisfied. Moreover, the arc itself may extinguish rapidly. This makes the analysis of these transients to be almost impossible. Type D is a double end

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scheme depending on the difference in arrival times of the generated transients at both line ends. However, the communication and synchronized timing between both line ends are essentially important. Pulse generating circuitry is employed from a single line end (type C) or from both line ends (Type B). They rely on measuring the required time for the injected pulses to go and to be captured after reflection from the fault point. This time can be directly interpreted as a fault distance. A new single end scheme (type E) was proposed in 1993. Unlike the previous types, it employs the generated transients when the line is re-energized by the circuit breaker. Its field test records in various conditions show a promising performance, in which the maximum resulted estimation error does not exceed 2.7 % [32]-[35]. Travelling wave-based schemes, when they work properly, can provide very accurate results with estimation error near to 300 m. However, different factors may affect their performances remarkably. The propagation can be affected by the system parameters and the network configuration leading to a strong attenuation of the waves. Another difficulty arises for near faults to the busses or for those faults occurring at near zero voltage inception angles. Moreover, the reflected waves can be seriously affected by the line discontinuities such as branches, tapped loads and cable sections. The complexity of their simulation, especially when considering the frequency dependency of system parameters is also another difficulty [28]. Also, the economical factor is an essential disadvantage due to the extra required hardware for these schemes including wave sending and capturing instruments as well as the communication and timing synchronization tools for double end ones. Actually, different requirements are required for realizing an accurate performance of such schemes. Time stamping must be very precise. Then, GPS-based traveling-wave fault-locating systems, where time-stamp information is provided from both line ends, show accurate performance. Also, utilizing data from both line terminals allows timing from the initiation of the short circuit which effectively assists to realize a precise estimation of the fault distance. More accurate current and voltage transformers are required to provide reasonable reproduction of transients.

Figure 1. Classification of fault location methods.

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5.2. Impedance Measurement-Based Fault Locators These schemes provide another alternative for the fault location estimation problem. Figure 2.2 shows the one line diagram of a three phase double infeed faulted transmission line. A line to ground fault occurred on phase A at point F through a resistance RF at a distance x from the locator position. The fault current IF is comprised from two components IFs and IFr flowing from sending and receiving ends respectively. The essential task of the fault location algorithm is to estimate the fault distance x as a function of the total line impedance ZL using the sending end measurements (for single end algorithms) or both end measurements (for double end algorithms) with the most possible accuracy. Both schemes are briefly described in the following sections  

S

R

x

IFs Sending end

IFr

F

RF

IF

Receiving end

Fault locator

Figure 2. One line diagram of a faulted transmission line.

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  C.B.

C.B.

Relaying

Relaying

DFR

DFR

Locator I/P manipulator

Locator I/P manipulator

Fault locator

Comm. link

Figure 3. General requirements for fault location schemes.

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5.3. Non-Conventional Methods These methods depend mainly on different methodologies for estimating the required fault distances utilizing different techniques. Artificial intelligence (AI) tools such as Artificial Neural Networks (ANNs), Fuzzy Logic and Genetic Algorithms are examples for these methodologies. Also, mathematical optimization techniques and advanced signal processing tools represent possible alternatives for this target. This will be covered later in this chapter.

5.4. Requirements for Fault Location Process

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Figure 3 presents a general explanation of the essential requirements for fault locators. Generally speaking, fault locator works in off-line mode after performing the relaying action. Once the fault is detected and the faulty phase(s) are successfully classified, the fault locator is enabled to find out the estimated fault distance. The recorded data by the Digital Fault Recorder (DFR) is passed through the locator input manipulator to the fault locator. A few seconds or minutes (according to the locator speed) later, the fault distance is estimated and then the maintenance crews can be sent to the fault position [53, 54]. For those locators that use double terminal information, an extra data communication link is fitted between both line ends. Also, travelling wave-based locators require extra hardware for generating and capturing the resulting waves. Practical fault locators may be stand alone devices in the substations or included as parts of the modern multi-function protection equipment for overhead lines, which is the most economical and common protection tools for transmission networks recently.

6. IMPEDANCE –BASED ALGORITHMS USING DOUBLE END DATA There is no doubt that the direct and most accurate way to calculate the fault distance is to depend on the measuring voltage and current quantities VS, IS and VR, IR at both sending and receiving ends for the faulted phase respectively. As shown in Figure 2, the voltage of the fault point VF can be described as functions of both sending and receiving end voltages as,

VF = VS − I Fs x Z L VF = VR − I Fr (1 - x)Z L

(1) (2)

Equating both equations and rearranging yield,

VS − VR + I Fr ZL x = I Fs + I Fr

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Applications of Fault Location Techniques for Transmission and Distribution …

11

Then, the formulas for other fault types (double phase, double phase to ground and three phase faults) can be derived similarly [36]. In spite of the simple and direct derivation of the algorithm equations, its performance is remarkably questionable due to the simple line model (basic lumped resistance model) neglecting the capacitive currents and mutual coupling. The same algorithm was reformed using the distributed parameter line model aiming to realize a more accurate performance [37]. For this purpose, equations (1) and (2) are modified using the line characteristic impedance Z0 and line propagation constant γ as

VF = cosh( xγ ) VS − Z sin( xγ ) I Fs 0

(4)

VF = cosh((L - x) γ ) VR − Z sin((L - x) γ ) I Fr 0

(5)

The unknown fault distance x can be then written as

⎛ −B⎞ tanh −1 ⎜ ⎟ A⎠ ⎝ x = γ

(6)

Where

A = Z cosh(γL)I Fr − sin(γL)VR + Z I

0 Fs

0

(7)

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and

B = cosh(γL)VR − Z sin(γL)I Fr − V 0

S

(8)

On the other hand, the extra requirements for communication and accurate timing at both line ends are essential disadvantages of all double end algorithms. In order to overcome this disadvantage, non-synchronized double end algorithms were introduced [38, 39]. These algorithms fully utilized the advantages of modern digital technologies and the wide capabilities of signal processing to estimate the synchronizing difference between both ends using non-linear mathematical optimization. For this purpose equating equations (1) and (2) yields,

V − V + Z L I Fr = xZ L (I Fr + I Fs ) S

j( α + δ )

R

jβ

(9)

and VR = |VR| e . The angles α and β are the own phase angles for Where VS = |VS| e sending and receiving end voltages to their own references respectively. The angle δ is the required angle to synchronize the sending end voltage as related to the receiving end one. Equation (2.9) can be rewritten as

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Tamer A. Kawady

12   GPS rec. A

GPS rec. B F

RF

PMU A

IF

PMU B

Fault locator

Figure 4. PMU-based fault location schematic.

V e jδ − V + Z L I Fr = xZ L (I Fr + I Fs e jδ ) S

R

(10)

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jδ

The two unknowns, the fault distance x and the complex number e , can be estimated by least square optimization. Simulation tests have shown an accurate performance as compared with single end algorithms. However, the mathematical derivation is based on a simple lumped parameter line model. The existence of mutual coupling for double circuit lines and the charging currents for long lines are expected to affect their performances remarkably. Another two ends algorithm was introduced utilizing the Global Positioning System (GPS) in conjunction with the Phase Measurement Unit (PMU) for fault location purposes [40, 41]. Employing the GPS enables to ensure the accurate timing between both of the line ends, whereas the PMU is employed for phasor estimation purposes as described in Figure 4. The algorithm core is basically similar to the main double end algorithm equations by equating the fault point voltage from both line ends using a distributed parameter line modeling. All evaluation tests of its performance revealed its higher accuracy as reported in their relevant references. However, the economical factor arises here as a basic disadvantage due to the required cost for the GPS synchronization systems as well as for the communication requirements. Two different methods were introduced by measuring the seen impedance from each line end [42, 43]. However, both algorithms depend on a simple line modeling suffering from the same shortcomings as well.

7. IMPEDANCE –BASED ALGORITHMS USING SINGLE END DATA Due to the extra costs for double end algorithms, single end ones attract an increasing attention and consequently they have the superiority from the commercial viewpoint. From Figure 2, equation (1) can be rewritten as:

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Applications of Fault Location Techniques for Transmission and Distribution …

VS = xZ L I Fs + R I

F F

13

(11)

The unknown fault distance x can be directly found by equating the imaginary parts of both equation sides as follows:

x=

Im{VS − R F I F } Im{Z L I Fs }

Im{ =

VS I } − Im{R F ( F )} I Fs I Fs Im{Z L }

(12)

In order to solve the above equation, the unknown RF should be excluded considering here some proper simplifying assumptions. If both sending end and fault currents (IFs and IF) are considered to be in phase, the term containing RF vanishes as its imaginary part equal to zero. This yields the final form for fault distance x as [44]

VS } I Fs x= Im{Z L }

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Im{

(13)

This derivation summarizes the basic feature of single end algorithms, in which the lower amount of available data (as compared with other two end ones) leads to simplify the fault location equations with some assumptions. It consequently affects the overall accuracy of the calculation process remarkably. The research efforts aim therefore to improve these algorithms in order to get the possible highest accuracy. One of the earliest and practical algorithms was introduced depending on decomposing the faulted system network into a pre-fault network and a pure-fault one as shown in Figure 5 [45, 46]. The fault point voltage VF can be described as

VF = R F I F = − R F (I´´Fs + I´´Fr ) = − R F I´´Fs (1 + k( x ))

, k( x ) =

(14)

I Fr I Fs

(15)

Where k(x) is the current distribution factor defined as a function of the fault distance x. IFs and IFr correspond to the total fault current parts contributing from both line ends ´

respectively. I Fs and I´Fr are the loading current contributions towards the fault point from ´´

both line ends. I Fs and I´´Fr are the fault currents at the point F flowing to the sending and receiving ends respectively. VF and IFs can be expressed as functions of the sending end quantities as

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14

VF = cosh(xγ) VS − Z 0 sinh(xγ ) I S

(16)

sinh( xγ ) ´´ VS − cosh ( xγ ) I´´S Z0

(17)

I´´Fs =

Substituting with equations (16) and (17) into equation (15) and rearranging yields,

R F (1 + k( x)) = -

cosh( xγ ) VS − Z 0 sinh( xγ ) I S sinh( xγ ) ´´ VS − cosh( xγ ) I´´S Z0

(18)

If both sending and receiving end currents are assumed to have a common phase angle, then k(x) is a real number yielding,

Im{

cosh( xγ ) VS − Z 0 sinh( xγ ) I S }= 0 sinh( xγ ) ´´ ´´ VS − cosh( xγ ) I S Z0

(19)

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Equation (2.19) can be solved numerically to find out the fault distance x. The above algorithm was modified later using the same fault network decomposition as well [47]. Then, the estimated fault distance x was found as

x=

Im{VS I´´S } Im{ZL IS I´´S }

(20)

Two other fault location algorithms were proposed considering a real current correction factor with a simple lumped line model depending on analyzing the phasor diagram for impedance phasors [48, 49].

Zs

VS

VR

F

IFr

IFs IF

Zr

Zs

VS´

F

IFr´

IFs´

Zr

Zs

VS´´

F

VR´´

IFs´´ RF IFr´´ IF´´

RF

(a)

VR´

(b)

(c)

Figure 5. Faulted network analysis decomposition., (a) Faulted network (b) Pre-fault network (c) pure-fault network.

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Zr

Applications of Fault Location Techniques for Transmission and Distribution …

15

The apparent impedance approach (the seen impedance from the locator location) was employed in conjunction with current compensation for fault location purposes. This approach is similar to the distance relay phenomena, while utilizing a suitable current compensation for the occurring fault (after detecting and classifying the fault type). Starting from Figure 2.2 the apparent voltage Vapp, seen by the locator, can be expressed similarly with equation (11). Then, the unknown equation part of IFRF can be replaced by IFsRFs , in which RFs is the apparent part of fault impedance seen form the relay location. The relation between the total and the apparent fault resistances can be expressed as,

R Fs = R F C( x)

(21)

Where the correction factor C(x) depends on the fault current contribution from both ends and can be therefore an imaginary value. Equation (11) can be rewritten by dividing by IFs as,

V

app

I

= Z app = xZ L + R Fs

Fs

(22)

Equation (22) can be considered as the main equation to find out the seen apparent impedance (Zapp) from the locator location. In order to get the unknown fault distance x, the equation should be simplified by considering only a real correction factor. The above equation can be solved by equating the real and imaginary parts in both equation sides [50], [51].

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x F

IFs Sending end Input transducers & sampling

RF

IFr IF

Receiving end

Phasor estimation (DFT) Fault detector & classifier

Modal transformer

Fault locator

Figure 6. Schematic of a Modal Transform-based single end fault locator.

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Another single end algorithm was proposed utilizing Modal Transform in conjunction with the apparent impedance approach [52], [53]. Based on the decoupling feature of this transform, a precise fault location computation can be realized for both single and double circuit lines. The A general schematic description of the locator is given in Figure 6. The three phase currents and voltages are extracted, sampled and then fed to both fault detector & classifier, and fault locator via DFT filtering stage. The DFT filter has been nominated amongst different digital filter routines, as the most dependable filter for relay implementation. Once the disturbance occurred, the fault detector & classifier enables the locator to recognize, where all extracted voltage and current phasors are fed to the locator via a modal transformer routine based on the following equations, [Vm] = [Tv] -1 * [Vp ]

(23)

[Im] = [Ti] -1 * [Ip]

(24)

where the indices m and p are related to modal and phase quantities, respectively. Tv and Ti are voltage and current modal transformation matrices. For balanced (equally transposed) multi-phase lines both Tv and Ti matrices can be easily chosen to Clarke transformation as,

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T =T =T= v i

⎛ ⎜ ⎜1 1 ⎜1 3⎜ ⎜ ⎜1 ⎝

2 −1 2 −1 2

⎞ ⎟ 0 ⎟ 3 ⎟ 2 ⎟ − 3⎟ ⎟ 2 ⎠

(25)

The proposed locator is based on the apparent impedance approach, in which the resulted impedance, seen from the relay location, is equal to the ratio of a selected voltage Vsel to a selected current Isel as described earlier. In order to explain the mathematical basis of the proposed approach, an example of a line to ground fault is considered first. A line to ground fault occurred on phase A through a resistance RF at a distance of a percentage x of the total line length measured from the sending end. The fault current IF comprises from two components IFs and IFr flowing from the sending and receiving ends. First the fault is assumed to be solidly earthed to explain the algorithm essence. The fault resistance is considered later. The equation for this fault type can be written as VAF = 0

(26)

where VAF is the measured voltage for phase A at the fault point F. Transforming the above equation into modal form yields VAF = T1,1VFm1 + T1,2VFm2 + T1, 3VFm3

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Applications of Fault Location Techniques for Transmission and Distribution …

17

where VFm1, Vfm2 and VFm3 are the modal voltages at the point F. As explained in Appendix A, each modal voltage can be expressed using the associated network parameters as a function of relay location modal voltages and currents. Then equation (27) can be rewritten as 3 VAF = ∑ T1, j (Vmj − xZ mj I mj ) j=1

(28)

where j is the number of modes (3 for balanced lines). From equations (26) and (28) with rearranging the apparent impedance seen from the relay location can be found as

Z

app, AG

= xZ

m1

=

T1,1Vm1 + T1,2Vm2 + T1,3Vm3 T1,1I m1 + T1,2I m2

Z m2 Z m1

+ T1,3Vm3

Z m3 Z m1

(29)

where the apparent impedance Zapp, AG seen by the locator is selected to be a percentage of the modal impedance Zm1. The related selected voltage and current can be expressed as,

Vsel, AG = T1,1 Vm1 + T1,2 Vm2 + T1,3 Vm3

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I sel, AG = T1,1I m1 + T1,2 I m2

Z m2 Z m1

+ T1,3 I m3

(30)

Z m3 Z m1

(31)

Now the existence of the fault resistance is considered. Both the sending and receiving end supply the fault current through RF. This is can be expressed as IF = IFs + IFr

(32)

VAF = VA - xZ * IA = RF * IF

(33)

Then equation (5) is rewritten as

However, the locator requires only the data seen from the sending end. Thus the part RF * IF can be replaced by RFs* IFs, where RFs is the apparent fault resistance part seen from the sending end which can be expressed as

R Fs = R F (1 +

I Fr

)

I Fs

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18

It is assumed here that this resistance has only a resistive component, where RFs must be a real number, i.e. both IFs and IFr are in phase. To fulfill this assumption, the system is assumed to be homogeneous. Then equation (33) can be rewritten as, VA - xZ * IA = RFs * IFs

(35)

Similarly, the following equation can be described using modal transformation as

Z app, AG =

Vsel, AG I sel, AG

= xZ m1 + R Fs

I Fs I sel, AG

(36)

The compensation current for this case, IFs, is calculated as

∑ j =1

3

3

3

I Fs =

T I + 1, j mj

∑ j =1

T I + 2, j mj

∑ j =1

T I 3, j mj

(37)

In order to compensate the effect of pre-fault currents, these currents should be considered in the selected compensation current calculation. The pre-fault current matrix IL can be written for each circuit as IL = [ ILA ILB ILC ] t

(38)

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where ILA , ILB and ILC are designated for pre-fault currents for phases A, B and C respectively. The equivalent modal quantity matrix ILM is then found as ILM = Ti-1 * IL = [ IL1 IL2 IL3] t

(39)

The preceding analysis is repeated for other fault types with all possible phase combinations. A similar equation to equation (15) can be written for each individual fault type depending on the associated selected voltage, current and compensation quantities. These quantities are designated as Vsel, Isel and Icomp respectively. Then a general expression for the seen impedance Zapp can be written as

Zapp =

Vsel Isel

= xZm1 + R Fs

I comp Isel

(40)

The fault distance is directly calculated by solving equation (19) for the unknown distance x. This is achieved by equating real and imaginary parts in both equation sides where the unknown apparent fault resistance RFs is excluded. The coefficients Vsel, Isel and Icomp are calculated as expressed in the following equations:

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Applications of Fault Location Techniques for Transmission and Distribution …

 

Isel = a 1

∑ j =1

3

3

3

Vsel = a 1

T V +a 1, j mj 2

3

Z mj

j =1

Z m1

∑ T1, jImj

+a 2

∑ j =1

19

∑

T V +a 2, j mj 3

3

Z mj

j =1

Z m1

∑ T2, jImj

j =1

+a 3

T V 3, j mj

(41)

3

Z mj

j =1

Z m1

∑ T3, jImj

3 3 3 I comp = (b ∑ T I + b ∑ T I + b ∑ T I ) − I LC 1 j = 1 1, j mj 2 j = 1 2, j mj 3 j = 1 3, j mj

(42)

(43)

where ILC is the subtracted current part due to pre-fault currents and can be calculated as

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∑ j =1

3

3

3

I LC = b 1

T I +b 1, j Lj 2

∑ j =1

T I +b 2, j Lj 3

∑ j =1

T I 3, j Lj

(44)

The above equations (40)-(44) represent the general equations of the proposed locator and are available for all fault types, where the associated constants are selected depending on the fault type. A key of values for the related constants is given in Table 1. Another source of estimation error arises due to charging currents. Several test cases were accomplished in order to investigate the contribution of these currents into the overall estimation error. It has been concluded that these currents introduce a significant error contribution particularly with high resistance faults. This is due to the relatively low fault currents during these faults. Thus the compensation of these currents effectively improves the overall performance. Figure 7 shows the current contribution from both self and mutual capacitance parts, lumped at locator location, which are designated as Cs and Cm. To illustrate the mathematical description for this compensation, a line to ground fault on phase A is considered as an example as shown in Figure 7. Table 1. Key table for equation constants Fault type A-G B-G C-G A-B/A-B to G A-C/A-C to G B-C/B-C to G A-B-C

a1 1 0 0 1 1 0 1

a2 0 1 0 -1 0 1 0

a3 0 0 1 0 -1 -1 0

b1 1 1 1 1 1 0 1

b2 1 1 1 -1 0 1 1

b3 1 1 1 0 -1 -1 1

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20

IA

Cm

IB IC

IA´

ICs

ICm

RF

IB´ I C´

Cs

Figure 7. Contribution of capacitance currents at the relay location.

In order to get more accurate fault distance estimation, the locator should depend on the contributed current in the fault, IA´, rather than the current seen by the locator at its location, IA. Thus the resulted self and mutual capacitance currents ICs and ICm are subtracted respectively as follows: IA´ = IA - ICs - ICm

(45)

where the associated values for both ICs and ICm are calculated as,

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I Cs = C s

I Cm = C m

d(V − V ) A B dt

dVA dt

+ Cm

(46) d(V − V ) A C dt

(47)

Similarly IB´ and IC´ are calculated, and then the three line current values are updated before the fault location calculation routine is executed. Further details for this algorithm are available in [1].

8. NON-CONVENTIONAL FAULT LOCATION SCHEMES Instead of the normal mathematical derivation, non-conventional fault location algorithms were introduced depending on other processing platforms such as Wavelet Transform (WT), ANN or GA. These methods have their own problems that result from the line modeling accuracy, data availability and the method essences. ANN provides a promising tool for classification and non-linear mapping problems. For power system purposes, many successful applications have been proposed for different

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Applications of Fault Location Techniques for Transmission and Distribution …

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purposes such as load forecasting, security assessment, control ...etc. This is well covered in the published literatures. For protection purposes, different applications were developed covering a wide range of protection purposes such as faulted area estimation, fault direction discrimination, generator protection, transformer protection ...etc. However, almost all of these applications mainly use the ANN as a simple discriminator having only the outputs of 1 or 0 using voltage and current samples directly. This simple topological use of ANN may reach the aimed accuracy with the proper training. However, employing ANN for fault location purposes requires the ANN to perform more advanced calculations in order to predict the fault impedance seen from the locator location. The training sets should be prepared properly covering all situations that can happen in the real situations. Thus, the ANN efficiency essentially depends on the properly selected network design as well as the sufficient amounts of training data. Some successful applications employing the ANN for fault location purposes were published as seen in [54]-[56]. WT provides an advanced tool for signal analysis purposes. Unlike the conventional signal processing tools such as Fourier analysis, the wavelets are not only localized in frequency domain but also in time domain as well. This localization enables to detect the occurrence times of even fast disturbances such as fault transients. These transients are generated by the fault and travel continuously between the fault point and the line terminals until the post fault steady state is reached. Thus, processing these signals with WT reveals their travel times between the fault point and the locator position. These times can directly refer to the unknown fault distance [57]-[59]. The fault location problems can be interpreted as an optimization problem, in which the seen impedance from the relay location can be described as the objective function of this problem. Then, it can be mathematically optimized in order to find out the function unknowns including the fault distance as well as the fault resistance. For this purpose, GA can be employed successfully [60], [61]. As example for such non-conventional fault locators, a GAbased two end fault location system is proposed as described in Figure 8 [62]. This locator was distinctive with basing on unsynchronized quantities between both line ends. Unlike other reported algorithms, the EHV line example is represented using distributed line parameters aiming to increase the proposed scheme practicality and reveal its accuracy. Also, the GA was used as an optimization tool to avoid the associated problems with conventional optimization methods. Steps of problem formalization for GA are covered. The proposed scheme is extensively tested and its superiority is confirmed. As illustrated in Figure 5, local voltage and current inputs are sampled with 32 samples/cycle. Then, the associated phasors are computed with the Discrete Fourier Transform (DFT). , while the magnitudes of the remote voltages and currents are only retrieved. A GA mechanism is utilized for optimizing the generated objective unction for each phase. Three different variables are defined here as the unknown optimization parameters; the fault distance x (as a function of the line length L) and δri & δrv angles for remote end current and voltage, respectively. Upon the occurring fault type, the corresponding GA mechanism(s) to the participated phase(s) are initialized. The total error sum is then minimized in order to get the corresponding unknowns. Three sequential steps have been carried out in order to develop the proposed GA fault locator. First, the fault location problem itself should be computationally formulized as a typical minimization problem to cope with the nature of GA procedure. Then, the primary GA mechanism is established by constructing the procedure

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details as well as the associated objective function. Finally, the parameters of each utilized GA mechanism should be optimized to realize the highest accuracy as described below.

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(a)

(b) Figure 8. GA-based un-synchronized double end fault location scheme, (a) GA-based fault locator schematic (b) Mathematical computation of GA-based locator.

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For a line to ground fault occurring on phase (A) at point F is assumed at a distance x from the sending end (shown in Figure 8 (a)). The calculated voltage VSF for point F, seen from the sending end side, can be described considering distributed line parameters as, VSF = cosh(γx) VSA – Z0sinh (γx) ISA

(48)

Where VSA and ISA are the sending end voltage and current for phase (A) respectively. γ and Z0 are the propagation constant and the surge impedance for the line. Both quantities are calculated as a function of line impedance and admittance as follow: γ = Z Y

Z =

Z Y

(49)

(50)

Similarly, the fault voltage point VRF, seen from the receiving end can be written as a function of the receiving end voltage and current as, VRF= cosh(γ(L-x))VR–Z0sinh (γ(L-x)) IR

(51)

Searching for the fault distance x is carried out by minimizing the computed fault location error eFA defined as follows,

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eFA = |VSF| - |VRF|

(52)

The target of the GA mechanism is to search the complete space for the relevant unknowns including x, δri and δrv to realize the global minimum as a typical optimization problem. These unknowns are constrained through the following conditions: 0 c for rate of return regulation to be effective. Under price cap regulation, there is no need for constraining the price for the low priority class, p1, because p2 always exceeds p1, as shown by (2) and (3). Table 15 summarizes the optimal values of key variables under alternative forms of regulation for the case c = 0.2. Table 15 also presents the welfare maximizing solutions ('welfare maximization') and the profit maximizing solutions without any regulatory constraint ('no regulation'). The expected profit of the transmission utility becomes zero in the case of welfare maximization, because the revenue earned from priority service must be equal to the total costs net of fixed costs, as indicated at the end of Section 3. Thus, consumer surplus is equal to welfare under welfare maximization. Welfare maximization leads to the

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largest capacity of the interconnector. In contrast, the profit -maximizing transmission utility under no regulation would install the interconnector with the smallest capacity. Table 15. Optimal values of key variables with two priority classes: c = 0.2 No regulation

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K v0 v1 r1 r2 p1 p2 Rate of return Profit Consumer surplus Welfare

0.4249 0.6360 0.8180 0.3575 0.7858 0.2274 0.5778 0.3449 0.0616 0.0307 0.0923

Minimum reliability: R = 0.6000 0.4437 0.7006 0.9444 0.6000 0.9374 0.4204 0.7390 0.3236 0.0548 0.0274 0.0822

Rate of return: a = 0.3236 0.4889 0.6046 0.8023 0.3934 0.7978 0.2378 0.5623 0.3236 0.0604 0.0387 0.0991

Price cap: P = 0.5623

Welfare maximization

0.4280 0.6297 0.8052 0.3398 0.7724 0.2140 0.5623 0.3437 0.0615 0.0315 0.0930

0.8498 0.2720 0.6360 0.3575 0.7858 0.0972 0.3697 0.2000 0.0000 0.1231 0.1231

For comparison, the allowed rate of return, a, is set equal to the rate of return on capital at the optimum under a minimum reliability regulation with R = 0.6. A price ceiling, P, is set equal to p2 at the optimum under rate of return regulation. Rate of return regulation results in a larger capacity and more interconnector users subscribing to the priority service than minimum reliability regulation. Minimum reliability regulation leads to higher reliability levels and prices for both priority classes than rate of return regulation. Note that interconnection capacity under rate of return regulation is larger than that under no regulation. The capital-enhancing effect of rate of return regulation, which seems to be counterintuitive, is also indicated by Baumol and Klevorick (1970, Proposition 5) and by Lyon (2007, p.52). In comparison to the profit maximization under no regulation, minimum reliability regulation with R = 0.6 worsens both consumer surplus and welfare, while rate of return regulation contributes to an improvement in consumer surplus and welfare. The improvement in consumer surplus and welfare is also found in the case of price cap regulation that sets P equal to p2 under rate of return regulation. In comparison to rate of return regulation, the effects on capacity and market size (1 − v0) of price cap regulation are modest because a price ceiling, which is set equal to the optimal value of p2 under rate of return regulation, is slightly lower than the optimal value of p2 under no regulation. In Table 15, rate of return regulation leads to larger consumer surplus and welfare than price cap regulation. Note that in Table 15, interconnection capacity under price cap regulation exceeds that under no regulation. The capacity-enhancing effect of price cap regulation seems to be counterintuitive. In fact, Armstrong et al. (1994, p.173) argue that the regulated firm has an incentive to underinvest in quality for the given price level under price cap regulation, because the regulated firm neglects the effect of quality on total consumer surplus, and is interested only in the effect of quality on demand at the margin. Price cap regulation forces the regulated firm to lower the price, thereby decreasing the willingness to pay for quality at the margin. The decrease in the willingness to pay for quality leads to underinvestment.

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In the case of priority service, however, the regulated firm needs to consider the effect of reliability on total consumer surplus, along with the effect of reliability on demand at the margin. This is because the prices of higher priority classes reflect the surplus loss of consumers choosing lower priority (Chao and Wilson, 1987). The cap on these prices forces the regulated firm to reduce the surplus loss of lower priority consumers. To reduce this surplus loss, the firm must raise reliability levels for lower priority consumers, and therefore must increase capacity. This capacity-enhancing effect is more or less offset by a decrease in v0, the willingness to pay for reliability at the margin, which reduces capacity. Thus, whether price cap regulation raises capacity depends on the effects of reliability on total consumer surplus and demand at the margin. In Table 15, the effect of reliability on total consumer surplus exceeds that on demand at the margin, and price cap regulation leads to larger capacity than no regulation.

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6. CONCLUSION This study investigates how the application of priority service to transmission demand affects the operation and investment of an electricity interconnector, using a mathematical programming model. Priority service contributes to an increase in economic efficiency in the short-run through price rationing of transmission service in congested networks. The issue of applying priority service to transmission demand is how to secure the efficient level of reliability in the long run through the appropriate addition of an interconnector to the congested network of electricity. The model employed in this study explicitly solves a mixed integer programming problem in which the transmission utility’s decision to interrupt interconnector usage is represented by a binary variable. In the model, interconnector users can assign the various increments of their transmission demand to different service options to maximize the expected net benefits. Then, the transmission utility determines interconnector capacity and the interruption of transmission demand to maximize the expected social welfare. Prices of priority service of transmission are computed by solving a dual problem in the model, given the optimal decision of demand curtailment. The results indicate that priority service for electricity transmission enables most users to raise their net benefits in comparison to random rationing. The results also imply that an increase in costs of building an interconnector would exclude users exhibiting relatively lower willingness to pay for transmission service. The exclusion of these interconnector users leads to a loss of social welfare through a decrease in power trade. In the assessment of interconnection investment, a cost-benefit analysis is often applied to examine the economic impacts of the investment on the power market (Giesbertz and Mulder, 2008; Kupper et al., 2009). In addition to the cost-benefit analysis, a welfare analysis based on a mathematical programming model of this study is useful for understanding the impact of priority service on interconnection operation and investment. The welfare analysis of this study is particularly relevant to the case where transmission rights could be allocated according to users’ preferences over priority in access. Examples include tariff options of ‘firm’ and ‘non-firm’ transmission service in the PJM Regional Transmission Organization in the United States. Those who choose firm service are entitled to hold transmission rights that

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enable them to use an interconnector whenever they want, and those who choose non-firm service can access the interconnector only if capacity in the interconnector exceeds the total usage of rights holders. Thus, those who choose firm service receive high priority while those who choose non-firm service receive low priority. Such priority service could be applied to electricity interconnection as an efficient method for reliability management of transmission networks.

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REFERENCES Armstrong, M. et al. (1994). Regulatory Reform: Economic Analysis and British Experience. Massachusetts: MIT Press. Baumol, W. & Klevorick, A. (1970). “Input Choices and Rate-of-Return Regulation: An Overview of the Discussion,” Bell Journal of Economics and Management Science, 1, 162-190. Braton, J. (1997). “Transmission Pricing in Norway,” Utilities Policy, 6, 219-226. Chao, H. & Peck, S. (1998). “Reliability Management in Competitive Electricity Markets,” Journal of Regulatory Economics, 14, 189-200. Chao, H. & Wilson, R. (1987). “Priority Service: Pricing, Investment, and Market Organization,” American Economic Review, 77, 899-916. Chao, H. et al. (1988). “Priority Service: Market Structure and Competition.” In Munasinghe, M. et al. (Eds), Special Issue on Electricity Reliability, Energy Journal, 9, 77-104. Crew, M. & Fernando, C. (1994). Pricing Priority Service: Theory versus Utility Practice. In Crew, M. (Ed.), Incentive Regulation for Pubic Utilities (125-142). Boston: Kluwer Academic Publishers. Crew, M. & Kleindorfer, P. (1980). Public-Utility Regulation and Reliability with Applications to Electric Utilities. In Crew, M. (Ed.), Issues in Public-Utility Pricing and Regulation (51-75). Massachusetts: Lexington Books. Deng, S. & Oren, S. (2001). “Priority Network Access Pricing for Electric Power,” Journal of Regulatory Economics, 19, 239-270. ESCJ [Electric Power System Council of Japan] (2007). A Study on Electricity Interconnection in Japan (in Japanese). Giesbertz, P. & Mulder, M. (2008). “Economics of Interconnection: the Case of the Northwest European Electricity Market,” International Association for Energy Economics Newsletter, Second Quarter, 17-21. Harris, M. & Raviv, A. (1981). “A Theory of Monopoly Pricing Schemes with Demand Uncertainty,” American Economic Review, 71, 347-365. Ibaraki, T. & Fukushima, M. (1991). FORTRAN 77 Programming for Optimization. Tokyo: Iwanami Shoten (in Japanese). Joskow, P. (2005). Patterns of Transmission Investment. MIT CEEPR Working paper No. 4. Massachusetts Institute of Technology. Kupper, G. et al. (2009). “Does More International Transmission Capacity Increase Competition in the Belgian Electricity Market?” Electricity Journal, 22(1), 21-36. Lyon, T. (2007). “Why Rate-of-Return Adders Are Unlikely to Increase Transmission Investment,” Electricity Journal, 20(5), 48-55.

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Matsukawa, I. (2008). “The Effects of Average Revenue Regulation on Electricity Transmission Investment and Pricing,” Energy Economics, 30, 696-714. Matsukawa, I. (2009). “Regulatory Effects on the Market Penetration and Capacity of Reliability Differentiated Service,” Journal of Regulatory Economics, 36, 199-217. Rudnick, H. & Raineri, R. (1997). “Transmission Pricing Practices in South America, ” Utilities Policy, 6, 211-218. Smith, S. (1987). “A Linear Programming Model for Pricing Alternative Service Conditions for Electric Power.” In: H. Chao, et al. (Eds.), Selected Papers on Priority Service Methods, Electric Power Research Institute, Report P-5350. Spulber, D. (1993). “Monopoly Pricing of Capacity Usage under Asymmetric Information,” Journal of Industrial Economics, 41, 241-257. Viswanathan, N. & Tse, E. (1989). “Monopolistic Provision of Congested Service with Incentive-Based Allocation of Priorities,” International Economic Review, 30, 153-174. Wilson, R. (1989). “Efficient and Competitive Rationing,” Econometrica, 57, 1-40. Woo, C. et al. (1998). “Reliability Differentiation of Electricity Transmission,” Journal of Regulatory Economics, 13, 277-292. Young, E. (2006). “A Look Back at the Long Path to Mandating Electric Reliability Standards through the Energy Policy Act of 2005,” Electricity Journal, 19(6), 11-23.

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Chapter 6

MODELLING OF STRAIN ACCUMULATION PROCESS IN CYCLICALLY LOADED TRANSMISSION BELTS Barbara Zupancic and Igor Emri Centre for Experimental Mechanics, Faculty of Mechanical Engineering, University of Ljubljana, Ljubljana, Slovenia

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ABSTRACT This chapter presents the analysis of time-dependent behaviour of polymeric (viscoelastic) materials under cyclic loading conditions that polymeric products, such as transmission belts, are exposed to during their operation. Time-dependent behaviour of cyclically loaded transmission belts is studied through the newly developed methodology for analyzing strain accumulation process that may be one of the mechanisms responsible for the hardening of material, crack formation, and ultimately for the failure of polymeric products. Strain accumulation analysis, presented here, is based on the theoretical approach that takes in consideration time-dependent material properties expressed with material retardation spectrum. By using developed methodology one can analyze the intensity of strain accumulation process in relation to different material retardation spectra, and operating loading conditions, determined by frequency of cyclic loading, number of loading cycles, and belt-drive geometry. It turns out that critical operating frequency at which the strain accumulation in the material is the most intensive, depends on the material retardation time (location of retardation spectrum), whereas the magnitude of accumulated strain depends on the strength of corresponding discrete spectrum lines. Thus, the spectrum distribution defines the intensity and the magnitude of accumulated strain and is, in this aspect, one of the most important functions for predicting durability of cyclically loaded polymeric products through proposed strain accumulation approach. Based on here presented analysis a new designing criterion is proposed for use in engineering applications for selecting a proper material for general drive-belt operations.

Keywords: transmission belts, cyclic loading, strain accumulation, polymers, elastomers, time-dependent; mechanical spectrum, durability, failure

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INTRODUCTION Since noticeable differences between the fatigue process in polymers and metals have been observed, one should be aware of the basic mechanisms that are responsible for the fatigue failure in both cases in order to model the process appropriately. Fatigue failure mechanism in metals is, in general, a process of crack initiation, propagation, and failure. Fatigue damage in metals is cycle dependent, but basically remains independent of test frequency. Unlike that of metals, fatigue response of polymers strongly depends on polymers’ viscoelastic effects [1]. There are two basic competitive mechanisms that govern the failure of cyclically loaded polymers, which are both affected by the frequency of cyclic loading. At higher frequencies usually dominates local overheating of the material due to the hysteresis dissipation of mechanical energy within each cycle of loading. Whereas, at lower frequencies the fatigue failure is essentially caused by localized strain accumulation process that leads to the crack initiation, followed by its propagation, and failure of product's functionality. Transmission belts of different types, as some of the most widely used rubber-based structural elements in the automotive industry, are one of the representative products that are exposed to cyclic loading conditions during their operation. Belts’ durability is a critical element for sustainable operation of the engines. Thus, understanding the mechanisms which affect their durability is extremely important. Their rather complex hybrid structures consist of components with very different time-dependent (viscoelastic) mechanical properties [2]. Although the components of belts exhibit time-dependent behaviour, several papers [3-5] consider rubbers and cord-rubber composites as linear elastic materials in the stress-strain analysis for the composites failure. In the present chapter we focused on the study of strain accumulation process in transmission belts by developing and applying the theoretical model that is based on the constitutive law of stress-strain relations for viscoelastic (time-dependent) materials. Due to the time-dependent viscoelastic nature of polymeric materials we can expect that under cyclic loading conditions material will undergo a combination of creep and retardation process within each loading cycle. At certain conditions, that are implied by the frequency of cyclic loading and geometry of the belt-drive, the retardation process between two loading cycles cannot be fully completed to a strain-free state. Therefore material enters the next loading cycle with a strain residual. This means that the strain starts to accumulate, and consequently leads to the hardening of material, crack formation, and ultimately to its failure. First part of this chapter is dedicated to short introduction on material functions' in timeand frequency-domain. Since material time-dependency, which governs the product's durability, is most intensive in shear [6] we discuss the shear creep compliance, J (t ) , and the corresponding retardation spectrum, L (ξ ) , in more detail. Starting from the constitutive relation between the shear stress loading conditions and the shear strain response the next part of this chapter presents development of the model for strain accumulation analysis. As a first step, cyclic loading conditions in terms of the shear stress are modelled by implementing geometry parameters of transmission belt and angular velocity of rotating pulleys. By introducing modelled loading conditions and time-dependent material

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Modelling of Strain Accumulation Process in Cyclically Loaded Transmission Belts 187 properties (retardation spectrum) into the constitutive law the strain accumulation model is obtained. Implementation of the developed model is then demonstrated on the 3-parametric material model presented with the single spectrum line. Rather simple description of the material time dependence enables to treat derived equations analytically, and analyze the importance of the spectrum line location (retardation time) and its strength in relation to the strain accumulation process intensity. This analysis shows that critical angular velocity, at which the strain accumulation in the material is the most intensive, depends on the material retardation time, whereas the magnitude of accumulated strain depends on the strength of corresponding spectrum line. Thus the mechanical spectrum proves to be the most important material function for predicting durability of cyclically loaded polymeric products. Due to the fact, that real time-dependent materials posses more complex spectra, continuation of this chapter turns to analysis of the effect of mechanical spectrum distribution, i.e. “shape” of material time-dependent property [6], on the process of strain accumulation. The analysis is demonstrated on five different synthetic spectra that mimic most of the polymeric materials used in production of drive belts and other polymeric products. We also analyze the effect of operating angular velocity, and belt geometry one the process of strain accumulation. Results show that by knowing spectrum distribution of the time-dependent material property we may predict the critical operating angular velocity that may lead to the highest level of accumulated strain. Based on these results the durability criterion is proposed for predicting the life-span of cyclically loaded polymeric products. Based on the theoretical treatment special software DAB (“Durability Analysis of Belts”) was developed. The software enables user-friendly systematic study of the strain accumulation process as function of (a) different-spectrum-distribution-shapes, (b) belt geometry, (c) number of loading cycles, and (d) operating angular velocity. Features of this DAB software are presented at the end of this chapter.

TIME-DEPENDENT BEHAVIOR OF POLYMERS 2.1. Viscoelastic Functions Polymers belong to viscoelastic materials which are characterized by their timedependent mechanical properties. In practice, this means that the functionality and applicability of polymeric products can change considerably after a certain period of time. This may lead to appearance of defects and loss of product functionality. It is therefore important to understand material functions that describe time-dependency and durability of polymeric products. The stress-strain relations describing the mechanical behaviour of polymers are given in the form of convolution integrals. Material constants are replaced by material functions defined as the response of material to a step load in the form of stress or strain. [6, 7]. The form of material function depends on the mode of loading, i.e., static or time-dependent, and dynamic or frequency-dependent type of loading. There are 21 material functions that

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188

describe viscoelastic behaviour of solid polymers, seven of which are determined by static, and 14 by dynamic methods of measurements (see Table 1). Material functions determined in shear represent changes of specimen geometry, whereas bulk material functions represent changes of its volume. While the bulk material functions change with time very little, the shear material functions show very distinctive time dependency. This means that time-dependent behaviour, which determines product's durability, depends mostly on shear [6]. Let us now consider an event when material is exposed to a shear stress,

τ (t ) = τ 0 ⋅ h(t ) ,

(1)

where h(t ) is a Heaviside step function, and τ0 is the intensity of the shear stress. The corresponding shear strain response, γ(t), is then [6], t

γ (t ) = ∫ J (t − ξ ) 0

∂τ (ξ ) ∂ξ

dξ ,

(2)

where J(t) is material shear creep compliance, ξ is the integration variable, and τ (ξ ) is the shear stress described with the Eq. (1). Considering that [6]

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∂τ (ξ ) = τ 0 ⋅ δ (ξ ) , ∂ξ

(3)

where δ (ξ ) is a delta function, we obtain t

γ (t ) = τ 0 ⋅ ∫ J (t − ξ )δ (ξ )dξ = τ 0 ⋅ J (t ) . 0

Table 1. Viscoelastic material functions Mode

Static Dynamic

Relaxation Creep Relaxation Creep

In phase Out of phase In phase Out of phase

Shear

Bulk

G(t) J(t) G'(ω) G''(ω) J'(ω) J''(ω)

K(t) B(t) K'(ω) K''(ω) B'(ω) B''(ω)

Type of loading Uniaxial Poisson's ratio extension E(t) ν(t) D(t) E'(ω) ν'(ω) E''(ω) ν''(ω) D'(ω) D''(ω)

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(4)

Modelling of Strain Accumulation Process in Cyclically Loaded Transmission Belts 189

(a)

τ(t)

(b)

γ(t)

Shear stress loading

Shear strain response

τ0 t

t J (t ) =

(c)

γ (t ) τ0

Shear creep compliance, J(t)

J(t)

(d)

log J(t)

t

log t

Figure 1. Schematically shown principle of shear creep: the shear stress loading (a), the response of the material in the form of an increasing shear strain (b), and shear creep compliance as function of time in linear (c), and in logarithmic scale (d).

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Equation (4) is commonly used to calculate the shear creep compliance,

J (t ) =

γ (t ) . τ0

(5)

Figure 1 schematically shows the shear creep process and the corresponding creep compliance master curve, J (t ) (in linear and logarithmic scale), that describes long-term creep behaviour of the material. The interrelations between the harmonic, J (ω ) , and the time-dependent, J (t ) , ∗

material functions are given in the form of the (generalized) Fourier transform, ℑ[

] , see,

e.g., [6]. For creep compliance functions in shear we have, ∞

J (ω ) = J ′(ω ) + j J ′′(ω ) = jω ℑ [ J (t ); jω ] = jω ∫ J (t ) exp(− jωt )dt , ∗

−∞

where j =

−1 . The real and the imaginary part of the harmonic response function are

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Barbara Zupancic and Igor Emri

190 ∞

∞

0

0

J ′(ω ) = ω ∫ J (t ) sin ωt dt , and J ′′(ω ) = −ω ∫ J (t ) cos ωt dt .

(7)

Relations in the opposite direction are given with the inverse Fourier transforms. Hence,

1 J (t ) = ℑ ⎡⎣ J ∗ (ω ) jω ; t ⎤⎦ = 2π −1

∞

J ∗ (ω ) ∫ jω exp( jωt )dω . −∞

(8)

The creep compliance, J (t ) , may be equivalently expressed in terms of the real and the imaginary components of the two harmonic response functions,

J (t ) = J g +

∞ 2 J ′(ω ) − J g

π

∫ 0

ω

sin ωt dω + {φ f t} =

2 J ′′(ω ) − {φ f ω} ∞

= Jg + Here

π

∫

ω

0

(9)

(1 − cos ωt ) dω + {φ f t} .

φ f is the steady-state, or steady-flow (shear) fluidity, while J g is the glassy

(instantaneous) shear creep compliance, respectively. They are defined as

φ f = lim Copyright © 2011. Nova Science Publishers, Incorporated. All rights reserved.

t →∞

dJ (t ) = lim ω J ′′(ω ) , ω →∞ dt

(10)

J g = lim J (t ) = lim J ′(ω ) .

(11)

ω →∞

t →0

{ }

In the Eq. (9) curly brackets denote that the term φ f t

is present when the material is

rheodictic, and absent when it is arrheodictic [6].

2.2. Material Functions Expressed in Terms of Discrete Retardation Spectra Material functions are in principle transfer functions. In general, for each excitation to which a system has been exposed we may find the corresponding transfer function. Timedependent structural rearrangements caused by the stress excitation may be represented by the “transfer function” which we call the retardation spectrum. Providing that the (continuous) retardation

spectrum,

L (ξ ) ,

or

the

corresponding

discrete

counterpart,

L(λi ) = { Li , λi ; i = 1, 2," , K } , is known, we can simply calculate material functions in time-, and in frequency-domain. Here Li denotes the strength of spectrum line, and

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λi the

Modelling of Strain Accumulation Process in Cyclically Loaded Transmission Belts 191 corresponding retardation time. The real and the imaginary part of the complex (dynamic) creep compliance are given as,

J ′(ω ) = J g +

∞

1

∫ L(ξ ) 1 + ω ξ 2

{0}

2

d ln ξ = J e

−∞

∞

∫

J ′′(ω ) =

L(ξ )

−∞

∞

ω 2ξ 2 d ln ξ , (12) − ∫ L(ξ ) 1 + ω 2ξ 2 −∞

⎧φ f ⎫ ωξ ξ d ln + ⎨ ⎬. 1 + ω 2ξ 2 ⎩ω ⎭

(13)

Similarly the time-dependent creep compliance is expressed as follows, ∞

J (t ) = J g +

∫ L(ξ ) [1 − exp(−t / ξ ] d ln ξ + {φ t} .

(14)

f

−∞

In terms of the discrete retardation spectrum, the three material response functions may be respectively expressed as, K

1

i =1

1 + ω 2 λi2

J ′(ω ) = J g + ∑ Li

K

J ′′(ω ) = ∑ Li

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i =1

K

= J e{ } − ∑ Li 0

i =1

ω 2 λi2 , 1 + ω 2 λi2

(15)

⎧φ f ⎫ ωλi + ⎨ ⎬ 1 + ω 2 λi2 ⎩ ω ⎭

(16)

and K

J (t ) = J g + ∑ Li [1 − exp(−t / λi ] + {φ f t} .

(17)

i =1

In these expressions ξ denotes continuous retardation time variable and

λi denote

discrete retardation times, J g is the glassy (instantaneous) shear creep compliance, defined in Eq. (11), while the equilibrium (shear) compliance, J e , and the steady-state (shear) 0

compliance, J e , are defined as [9-13],

J e{0} = lim ⎡⎣ J (t ) − {φ f t}⎤⎦ = lim J ′(ω ) . t →∞

ω →0

(18)

The curly brackets in the above equations again denote the presence or absence of the corresponding physical quantity depending on the arrheodictic, or rheodictic behaviour of the material [6 ].

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192

It is important to recognize the following interrelations between the viscoelastic constants, and their relations to the retardation spectrum, L (ξ ) ,

J e{0} − J g =

∞

∫ L(ξ )d ln ξ ,

(19)

−∞

If the retardation spectrum is given in a discrete form the above interrelation becomes, K

J e − J g = ∑ Li {0}

(20)

i =1

Calculation of the material functions from the retardation spectrum requires integration or summation if the corresponding discrete form of the relation is used. These procedures belong to a group of so-called straight solutions, and they are numerically stable. Thus, knowing a spectrum that keeps the complete information on time dependence of the material, allows exact calculation (within computational accuracy) of all corresponding time- and frequencydomain material functions. Discrete retardation spectrum will in continuation serve as input information on the timedependent behaviour of the material that is exposed to cyclic loading.

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3. MODELLING OF THE TIME-DEPENDENT STRAIN ACCUMULATION PROCESS IN TRANSMISSION BELTS 3.1. Loading Conditions During the normal operation of transmission belt certain segments of the belt structure are loaded with the tooth-like periodical loading in terms of the shear stress. More detailed analysis of the stress-strain state of the operating belt can be found in [14]. The loading conditions of the belt were determined through the finite element analysis, assuming elastic behaviour of all belt's components. The belt was pre-stressed with a certain force F and loaded with a desired torque M, so that the pre-stressing force was adequately divided into the strand on the tension, F1 , and on the slack side, F2 . Geometry of the belt-drive was determined by the distance between the two pulleys, l , and the radius of the two pulleys, R , Figure 2. Stress-strain analysis presented in [14] has shown that for selected point on the tooth of the belt the time evolution of the shear stress within one loading cycle can be modelled with the tooth-like function schematically presented in Figure 3. Time t1 in Figure 3 denotes the moment when selected point on the belt enters the contact with the driving pulley, and t2 indicates the moment, when it leaves the driving pulley. t0 is the time period of one loading cycle. Transmission Lines: Theory, Types and Applications : Theory, Types, and Applications, Nova Science Publishers, Incorporated, 2011. ProQuest Ebook

Modelling of Strain Accumulation Process in Cyclically Loaded Transmission Belts 193 l ... central distance lar gu ity n a loc ... ω ve

F1

F1

F

F

F2

R ... radius of the pulley

t2

t1

F2

Figure 2. Schematics of the geometry and loading conditions of the belt (recorded after [14]).

τ(t) τ0

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t1

t2

t0

t

Figure 3. Schematics of the belt loading conditions in terms of the shear stress for selected point on the tooth of the belt in one loading cycle.

According to the assumed loading conditions, shear stress for a selected point on the belt may be for one loading cycle modelled as a difference of two Heaviside step functions multiplied with the shear stress intensity,

τ 0 . If we consider N loading cycles that the belt

has been exposed to, the shear stress loading conditions may be described by the following equation, N

τ (t ) = τ 0 ∑ ⎡⎣ h ( t − t1 − (i − 1)t0 ) − h ( t − t2 − (i − 1)t0 ) ⎤⎦ , for t ≤ N ⋅ t0 .

(21)

i =1

Representative times that characterize loading conditions within one loading cycle, t1 , t2 , and time period t0 , can be expressed as functions of geometry, and the angular velocity of the pulleys’

drive,

ω.

Hence,

t1 = (l + π R) /(ω R) ,

t2 = (l + 2π R) /(ω R) ,

and

t0 = (2l + 2π R) /(ω R) , where l is the distance between the axes of the two pulleys, and R

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194

is the radius of the pulleys. In this way Eq. 21 for the tooth-like shear stress loading for N loading cycles may be rewritten as,

⎡ ⎛ i =1 ⎣ ⎝ N

τ (t ) = τ 0 ∑ ⎢ h ⎜ t − (2i − 1)

l + π R ⎞ ⎛ 2i (l + π R) − l ⎞ ⎤ −h t− ⎟ ⎥ , for t ≤ N ⋅ t0 . (22) ω R ⎟⎠ ⎜⎝ ωR ⎠⎦

When the time scale of cyclic loading meets the time scale of time-dependent material properties this will induce a complex response process of strain accumulation in the material, which is analyzed in the following subchapter.

3.2. Time-Dependent Response and Strain Accumulation Process The time-dependent shear strain response of a viscoelastic material to the shear stress loading may be expressed with constitutive law described in Eq. (2). If we introduce Eq. (22) equation into Eq. (2) we obtain the following expression for the shear strain response within N loading cycles, N ⎡ ⎛ l +π R ⎞ ⎛ 2i (l + π R) − l ⎞ ⎤ = γ (t ) τ 0 ∑ ⎢ J ⎜ t − (2i − 1) ⎟ − J ⎜t − ⎟ ⎥ , for t ≤ N ⋅ t0 . (23) ωR ⎠ ωR ⎝ ⎠⎦ i =1 ⎣ ⎝

Figure 4, shows the shear strain response to the loading conditions within one loading cycle presented in Figure 3. Copyright © 2011. Nova Science Publishers, Incorporated. All rights reserved.

During the loading phase (from t1 to t2 ) the material starts to creep. At point t2 the load is removed and the retardation process begins. Under certain conditions, determined by the drive belt geometry and the operating angular velocity, the retardation process between two loading cycles cannot be completed to a strain free state. Thus, the residual strain in each cycle, ΔΓ , will start to sum up from cycle to cycle. To determine accumulated strain after N completed loading cycles, i.e., at

t = N ⋅ t0 = N ⋅ (2l + 2π R) / (ω R) , we define the magnitude of accumulated strain, Γ N , as N ⎡ ⎛ 2l + 2π R l +π R ⎞ ⎛ 2l + 2π R 2i(l + π R) − l ⎞ ⎤ (24) Γ N = γ ( N ⋅ t0 ) = τ 0 ∑ ⎢ J ⎜ N ⋅ − (2i − 1) − ⎟− J ⎜N ⋅ ⎟⎥ ω R ω R ωR ωR ⎠ ⎝ ⎠⎦ i =1 ⎣ ⎝

Shear creep compliance, J (t ) , in Eq. 24 may be expressed in terms of a discrete retardation spectrum { Li , λi ; i = 1, 2, " , K } as K

J (t ) = J g + ∑ Li [1 − exp(−t / λi )] , i =1

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(25)

Modelling of Strain Accumulation Process in Cyclically Loaded Transmission Belts 195 with J g , the glassy compliance, and

λi retardation times where the corresponding spectrum

lines with intensities Li = L(λi ) are located. K denotes the number of discrete spectrum lines with which material time-dependent property is described.

cr ee p

γ(t)

γel

}

γel

re ta

{ t1

rd a

t2

Accumulated strain, ΔΓ, in 1 cycle ti o n t0

t

Figure 4. Schematics of the shear strain response to the tooth-like shear stress loading conditions within one loading cycle.

Introducing the representation of material property with the retardation spectrum Eq. (25), the equation for the magnitude of accumulated strain after N completed loading cycles may be rewritten as follows,

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N K ⎡ ⎛ (2( N − i ) + 1)(l + π R ) − π R ⎞ ⎛ (2( N − i ) + 1)(l + π R ) ⎞ ⎤ Γ N = τ 0 ∑∑ L j ⎢exp ⎜ − ⎟⎟ − exp ⎜⎜ − ⎟⎟ ⎥ = ⎜ ω Rλ j ω Rλ j i =1 j =1 ⎢⎣ ⎝ ⎠ ⎝ ⎠ ⎥⎦ . N K ⎡ ⎛ (2( N − i ) + 1)(κ + π ) − π = τ 0 ∑∑ L j ⎢exp ⎜ − ⎜ ωλ j i =1 j =1 ⎝ ⎣⎢

(26)

⎞ ⎛ (2( N − i ) + 1)(κ + π ) ⎞ ⎤ ⎟⎟ − exp ⎜⎜ − ⎟⎟ ⎥ ωλ j ⎠ ⎝ ⎠ ⎦⎥

l , as a ratio of the R central distance between the two pulleys’ axes, l , and the radius of the pulleys, R . Here we introduced the non-dimensional geometry parameter

κ=

To track the process of strain accumulation after every cycle Eq. 26 may also be written as a recursive formula,

Γn = Γ n + ΔΓ n ; n = 1, 2, 3,", N ,

(27)

where Γ1 = ΔΓ1 , and K ⎛ (2n − 1)(κ + π ) − π ΔΓ n = τ 0 ∑ L j exp ⎜ − ⎜ ωλ j j =1 ⎝

⎞⎡ ⎛ π ⎟⎟ ⎢1 − exp ⎜⎜ − ⎠ ⎢⎣ ⎝ ωλ j

⎞⎤ ⎟⎟ ⎥ ⎠ ⎥⎦

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(28)

Barbara Zupancic and Igor Emri

196

denotes strain accumulation in each consecutive cycle. Consequently, Eq. 26 may be written as N

Γ N = ∑ ΔΓi ,

(29)

i=1

and further on as N K ⎛ (2i − 1)(κ + π ) − π Γ N = τ 0 ∑∑ L j exp ⎜ − ⎜ ωλ j i =1 j =1 ⎝

⎞⎡ ⎛ π ⎟⎟ ⎢1 − exp ⎜⎜ − ⎠ ⎢⎣ ⎝ ωλ j

⎞⎤ ⎟⎟ ⎥ . ⎠ ⎥⎦

(30)

Developed Eqs. 26-30 present theoretical tool to model the strain accumulation, and to evaluate the magnitude of accumulated strain. Input parameters of the model that can affect the magnitude, either within each loading cycle or within completed number of loading cycles, are: •

τ 0 , shear stress intensity;

•

κ=

•

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• •

l , non-dimensional geometry parameter with non-linear effect to the R

magnitude of accumulated strain; N , number of completed loading cycles with non-linear effect to the magnitude of accumulated strain; ω , operating angular velocity that determines time period of one loading cycle (frequency), and is in non-linear relation to the magnitude of accumulated strain; material parameters,

{Li , λi ; i = 1, 2,", K } , i.e.,

K retardation times, λi , and K

corresponding spectrum lines, Li = L(λi ) . We will proceed now with the analysis of the effects of these input parameters on the process of the strain accumulation, and demonstrate applicability of the proposed methodology.

STRAIN ACCUMULATION ANALYSIS As it was analyzed in [14], the contribution of accumulated strain in each cycle, ΔΓ n , will be smaller and smaller with increasing consecutive number, n . Besides that, this paper reveals that for very small or very large operating angular velocities strain accumulation contributions ΔΓ n will diminish, and that there practically will not be any strain accumulation. From this perspective there should exist critical angular velocity,

0 < ωCR 0 is the stepsize parameter. Clearly, (16) is always a convex quadratic programming problem, which has a unique solution if the set W (π) is nonempty, i.e. under very mild assumptions. Moreover, its solution can be found by finite algorithms, for instance, by the dual Uzawa type method. In fact, we can solve (16) via the dual problem maximize ϕs (p), p ∈ Rn where

ϕs (p) =

min

(x,y,f )∈X×Y (π)×F

(17)

Ls (x, y, f, p),

(18)

 n X X  (gi + 0.5θs−1 xi )xi Ls (x, y, f, p) = k=1

−

X

j∈Jk (π)

+

n X k=1

i∈Ik



(hj − 0.5θs−1 yj )yj  +



X

(ca + 0.5θs−1 fa )fa

a∈A



X X X  X  pk ( fa − fa ) − ( xi − yj ) . a∈A− k

a∈A+ k

i∈Ik

j∈Jk

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Spatial Auction Markets with Unique Consumer Price

303

Clearly, the computation of the values of ϕ and its gradient can be made componentwise, i.e. (18) is decomposed into a set of separable one-dimensional problems each of them has the explicit solution formula. That is, " n
P P min gi xi + 0.5λs(xi − xs−1 ) 2 − p k xi ϕs (p) = i k=1 i∈Ik xi ∈[0,αi] #   P s−1 2 max hj yj − 0.5λs(yj − yj ) − pk yj − j∈Jk (π) yj ∈[0,βj ]
P + min cafa + 0.5λs(fa − fas−1 )2 + (pk − pl )fa . a=(k,l)∈A fa ∈[γa ,γa ] 0

00

In order to solve (17) we can apply a suitable conjugate gradient method. On the other hand, method (16) coincides with the proximal point method and possesses the finite termination property; see [18]. Besides, some other decomposition type methods seem also suitable for the reduced problem (12)–(14). For instance, the variant of the alternating direction method described in [14, Section 6] is even simpler for implementation, however increases the dimensionality after reformulation of the initial problem. Anyway, these methods were implemented for solving several spatial auction problems arising in electricity market systems and showed rather fast convergence to a solution; see [11, 14].

5.

Solution Finding for the Relaxed Formulation

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Being based on the above properties, we can propose the following algorithm for solving problem (15). Algorithm. Step 0. Rearrange all the prices of buyers from Jk , k = 1, . . ., n in the common finite sequence of indices J˜ = {j1 , j2, . . . , jk , . . .} such that hjk ≤ hjk+1 for all k = 1, 2, . . . Set hj0 = 0 and k = 1. Step 1. Solve problem (12)–(14) with π = hjk and determine the function Ψ(π) on (hjk−1 , hjk ]. Step 2. If ψ < 0 for ψ ∈ Ψ(hjk ) or the cutting price π is not correct, set k = k + 1 and go to Step 1. Otherwise choose π ∗ as the minimal π ∈ (hjk−1 , hjk ] such that ψ ≥ 0 for ψ ∈ Ψ(π) and stop. We note that a solution of the auxiliary problem (12)–(14) can be found by help of the iterative algorithm of the previous section. We illustrate the work of this algorithm by the following examples. Example 5.1 Let us consider two auction markets joined by a costless two-directional line with capacity 200. The first market involves two traders and two buyers with the following data: g1 = 5, α1 = 1000, g2 = 5.5, α2 = 1000; h1 = 15, β1 = 100, h2 = 6, β2 = 900. The second market involves one trader and one buyer with the following data: g3 = 20, α3 = 2000, h3 = 100, β3 = 1000; see Fig. 2.

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304

E. Allevi, A. Gnudi, I.V. Konnov et al.

'$ trader 1: g1 trader 2: g2 market buyer 1: h1 1 buyer 2: h2 &%

capacity: 200

= 5, α1 = 1000 = 5.5, α2 = 1000 = 15, β1 = 100 = 6, β2 = 9000

social surplus value = 83000 π ∗ = 17 Ψ(π ∗ ) = 0

'$ trader 3: g3 = 20, α3 = 2000 market buyer 3: h3 = 100, β3 = 1000 2 &%

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Figure 2. Example 5.1 The cutting price π = 6, where J1 (π) = {1, 2}, J2(π) = {3}, was correct and gave the solution: market 1: x1 (π) = 1000, x2(π) = 200, y1(π) = 100, y2(π) = 900, p1(π) = 5.5; market 2: x3 (π) = 800, y3(π) = 1000, p2(π) = 20; flow (1 → 2) = 200. Then the social surplus value = 84800, Ψ(π) = 2000π − 22600 for 0 ≤ π ≤ 6 and Ψ(6) = −10600 < 0. Note that Ψ(˜ π ) = 0 for π ˜ = 11.3, but π ˜ > 6. The cutting price π = 15, where J1 (π) = {1}, J2(π) = {3}, was correct and gave the solution: market 1: x1 (π) = 300, x2(π) = 0, y1 (π) = 100, p1(π) = 5; market 2: x3 (π) = 800, y3(π) = 1000, p2(π) = 20; flow (1 → 2) = 200. Then the social surplus value = 84000, Ψ(π) = 1100π − 17500 for 6 < π ≤ 15 and Ψ(15) = −1000 < 0. Note that Ψ(˜ π ) = 0 for π ˜ = 15.91, but π ˜ > 15. The cutting price π = 100, where J1 (π) = ∅, J2 (π) = {3}, was correct and gave the solution: Transmission Lines: Theory, Types and Applications : Theory, Types, and Applications, Nova Science Publishers, Incorporated, 2011. ProQuest Ebook

Spatial Auction Markets with Unique Consumer Price

305

market 1: x1 (π) = 200, x2(π) = 0, p1 (π) = 5; market 2: x3 (π) = 800, y3(π) = 1000, p2(π) = 20; flow (1 → 2) = 200. Then the social surplus value = 83000, Ψ(π) = 1000π − 17000 for 15 < π ≤ 100 and Ψ(100) = 83000 > 0.

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Note that Ψ(˜ π ) = 0 for π ˜ = 17, and π ˜ ∈ (15, 100], hence π ∗ = π ˜ = 17 is the optimal cutting price. The example with a costless one-directional line (1 → 2) with capacity 200 gave the same results. Example 5.2 Let us consider six auction markets joined by costless two-directional edges 00 00 00 00 with the following symmetric capacities: γ12 = 300, γ23 = 300, γ24 = 250, γ45 = 00 220, γ56 = 300. Also, we have the prices market 1: traders (50, 55, 60, 60, 65, 70), buyers (80, 75, 70, 65, 60, 55); market 2: traders (50, 55, 60, 65, 75, 80), buyers (75, 70, 65, 65, 60, 55); market 3: traders (50, 55, 65, 70, 80), buyers (80, 75, 70, 60, 50); market 4: traders (50, 55, 60, 70, 75), buyers (80, 75, 70, 65, 60, 55); market 5: traders (50, 55, 60, 60, 70, 75), buyers (75, 70, 65, 65, 60, 55); market 6: traders (55, 60, 65, 70), buyers (80, 75, 70, 65, 60, 55). The maximal volumes are the following: market 1: sells (366, 241, 366, 241, 366, 241), bids (307, 300, 270, 300, 307, 300), market 2: sells (396, 241, 120, 380, 110, 241), bids (290, 350, 290, 350, 115, 335), market 3: sells (159, 141, 159, 141, 233), bids (311, 340, 181, 122, 181), market 4: sells (120, 178, 120, 178, 120), bids (280, 410, 230, 188, 188, 112), market 5: sells (180, 118, 180, 118, 180, 380), bids (159, 141, 159, 141, 159, 141), market 6: sells (118, 160, 118, 110), bids (288, 132, 288, 132, 188, 188). For this problem, the cutting prices π = 50, 55, 60, and 65 appeared to be incorrect. The correct cutting price π = 70 gave the following solution: market 1: offers (366, 241, 329, 241, 0, 0), bids (307, 300, 0, 0, 0), p1 = 60; market 2: offers (396, 241, 120, 132, 0, 0), bids (290, 350, 0, 0, 0, 0), p2 = 65; market 3: offers (159, 141, 159, 0, 0), bids (311, 340, 108, 0, 0), p3 = 70; market 4: offers (120, 178, 120, 0, 0), bids (280, 410, 126, 0, 0, 0), p4 = 70; market 5: offers (180, 118, 180, 118, 0, 0), bids (159, 140, 0, 0, 0, 0), p5 = 70; market 6: offers (118, 160, 118, 0), bids (288, 132, 125, 0, 0, 0), p6 = 70; flows: f12 = 300, f23 = 300, f24 = 250, f54 = 148, f56 = 149; the social surplus value = 74720. But Ψ(π) = 3936.051π − 259307.632 for 65 < π ≤ 70 and Ψ(70) = 16215 > 0. We have π ∗ = 65.88, where Ψ(π ∗ ) = 0; see Fig. 3. It has been noted that Procedure UPPO for determining a solution of a spatial electricity market with minimal unique consumer price and potentially different zonal prices was proposed in [15]. Its description is not complete and its work is only illustrated by Transmission Lines: Theory, Types and Applications : Theory, Types, and Applications, Nova Science Publishers, Incorporated, 2011. ProQuest Ebook

306

E. Allevi, A. Gnudi, I.V. Konnov et al.

'$ market 1 &%

social surplus value = 74720 Ψ(70) = 16215 Ψ(˜ π ) = 0 for π ˜ = 65.88

capacity:300

'$ capacity:250 market 2 &%

'$

'$

'$ capacity:300 market 5 &%

capacity:300

market 3 &%

market 4 &% capacity:220

'$ market 6 &%

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Figure 3. Example 5.2 several examples. For this reason, we should indicate that our algorithm was developed independently from that in [15]. It is possible to understand from the description that Procedure UPPO investigates of the behavior of the total demand curve along its horizontal and vertical pieces while varying the uniform purchase price P ∗ from the zero value (at which all purchase bids are accepted) to a maximum value given by the highest zonal price of the equilibrium solution without uniform purchase price. For each value of P ∗ a preliminary solution is determined which satisfies at the minimal cost (determined on the basis of sell bids) the demand determined by P ∗ . Then those preliminary solutions will be selected that satisfy the monetary balance condition. Finally, among the preliminary solutions with monetary balance, the solution will be detected that maximizes the net transaction value. It also involves certain heuristic rules. Further extensions and more complete formulations of this model were proposed in [7]. Nevertheless, those models were formulated as parametric mixed integer optimization problems which created certain difficulties in developing efficient solution methods, especially in the case of high-dimensionality. We observe that our formulation is placed in a more general setting and admits rather simple solution methods described.

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Spatial Auction Markets with Unique Consumer Price

6.

307

Conclusions

We considered the problem of managing a system of spatially separated auction markets with joint capacity and balance constraints and also with the additional requirement of providing the minimal unique purchase price for all the zones. We showed that the streamlined formulation can be inconsistent under rather natural assumptions. We suggested a relaxed formulation as a spatial equilibrium type problem with special parameter. A new iterative algorithm which combines solution an auxiliary linear programming problem at each iteration and a bisection type procedure for finding the optimal value of the unique purchase price was proposed. This problem admits suitable solution methods. We illustrated its work by examples which showed rather satisfactory results.

References [1] A. Cournot, Recherches sur les Principles Math´ematiques de la Th´eorie des Richesses, Paris, 1838; English translation: Researches into the Mathematical Principles of the Theory of Wealth, N. Bacon, ed., Macmillan, New York, 1897. [2] P.T. Harker, Editor, Spatial Price Equilibrium: Advances in Theory, Computation and Application, Springer-Verlag, Berlin, 1985. [3] A. Nagurney, Network Economics: A Variational Inequality Approach, Kluwer Academic Publishers, Dordrecht, 1999.

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[4] J.Y. Wei and Y. Smeers, Spatial oligopolistic electricity models with Cournot generators and regulated transmission prices, Oper. Res., 47 (1999), 102–112. [5] C. Metzler, B.F. Hobbs, and J.-S. Pang, Nash- Cournot equilibria in power markets on a linearized DC network with arbitrage: formulations and properties, Networks and Spatial Economics, 3 (2003), 123–150. [6] E.J. Anderson and A.B. Philpott, Optimal offer construction in electricity markets, Mathem. Oper. Res., 27 (2002), 82–100. [7] P. Beraldi, D. Conforti, C. Triki, and A. Violi, Constrained auction clearing in the Italian electricity market, 4OR, 2 (2004), 35–51. [8] I.V. Konnov, On modeling of auction type markets, Issled. Inform., 10 (2006), 73–76 (in Russian). [9] I.V. Konnov, Equilibrium Models and Variational Inequalities, Elsevier, Amsterdam, 2007. [10] I.V. Konnov, On variational inequalities for auction market problems, Optimization Letters, 1 (2007), 155–162. [11] I.V. Konnov, Application of variational inequalities for modelling of spatial systems of auction markets, Issled. Inform., 12 (2007), 47–57 (in Russian). Transmission Lines: Theory, Types and Applications : Theory, Types, and Applications, Nova Science Publishers, Incorporated, 2011. ProQuest Ebook

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E. Allevi, A. Gnudi, I.V. Konnov et al.

[12] I.V. Konnov, Modelling of auction type markets, Report DMSIA No.7, Universita degli Studi di Bergamo, Bergamo, 2007. [13] I.V. Konnov, Spatial equilibrium problems for auction type systems, Russ. Mathem. (Iz. VUZ), 52 (2008), No.1, 30–44. [14] I.V. Konnov, Decomposition approaches for constrained spatial auction market problems, Networks and Spatial Economics, 9 (2009), 505–524. [15] GME, Determinazione dell’equilibrio del mercato del giorno prima dell’energia con prezzo uniforme per i consumatori e prezzi zonali per i generatori, Analisi Tecnica, (2002), No. 5. [16] G.B. Dantzig, Linear Programming and Extensions, Princeton University Press, Princeton, 1963. [17] M. Minoux, Programmation Math´ematique: Theorie et Algorithmes, Dunod, Paris, 1989.

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[18] B.T. Polyak and N.V. Tretyakov, An iterative method for linear programming and its economic interpretation, Matekon, 10 (1974), 81–100.

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Chapter 11

TESTING OF CMOS DRIVEN VLSI INTERCONNECTS Devendra Kumar Sharma1, B.K.Kaushik2 and R.K.Sharma3 1

Department of Electronics and Communication Engineering, Meerut Institute of Engineering and Technology, Meerut, UP, India 2 Department of Electronics and Computer Engineering, Indian Institute of Technology, Roorkee, Uttarakhand, India 3 Department of Electronics and Communication Engineering, National Institute of Technology, Kurukshetra, Haryana, India

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ABSTRACT Wiring-up of on-chip devices takes place through various conductors produced during fabrication process. In past, on-chip interconnect wires were not considered important in circuit analysis except in high precision analysis. The shrinking feature size of MOSFET devices is largely responsible for growth of VLSI circuits. In deep submicron (DSM) technology, the interconnect geometry is scaled down for high wiring density. The complex geometry of interconnects and high operational frequency introduce wire parasitics and inter-wire parasitics. These parasitics cause delay, power dissipation and crosstalk that may affect the signal integrity in VLSI system. Accurate analysis, sophisticated design and effective test methods are the requirement of the day to ensure the proper functionality and reliability of VLSI circuits. The testing of interconnect is becoming important and a challenge in the current technology. This chapter provides an overview of on-chip interconnects. Furthermore, the parasitics of interconnects and their effects on circuit performance have been discussed. The transmission line models for on-chip interconnects have been discussed along with Enhanced Transmission Line (ETL) model which is effective in modeling high frequency effects in RF ICs. Full wave analysis is also described. Recent years have seen the rapidly growing prominence of new techniques for testing CMOS based VLSI chip with innovative features to allow high quality and fast test time. Besides basic techniques of testing, BIST, an important technique has been described with its different approaches and economics. The defects in VLSI circuits and fault models are described. The type of test pattern generation (TPG) circuitry is the most relevant issue while dealing with BIST. This issue of TPG is discussed in the chapter. The most important requirement is that

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Devendra Kumar Sharma, B.K.Kaushik and R.K.Sharma TPG must have high fault coverage and low area overhead. Later, the testing of interconnect defects affecting the circuit performance has been reviewed. Finally, future challenges in VLSI interconnect and their testing is explored.

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1. INTRODUCTION The task of testing of chips for its complete functionality is complex and time consuming. However, when faulty chips are used in system integration, they can cause system failures and create much difficulty in system debugging. It is known that the debugging cost increases by about ten times at each level of system integration as per the relationship known as the rule of ten [100]. Thus, it is of great importance to detect faults as early as possible. The rule of ten says: if a chip fault is not detected by it’s testing, then finding the fault at PCB level costs ten times as much as the chip level. Similarly, if a board fault is not found by PCB testing, then finding the fault at the system level costs ten times as much as the board level. The fabrication technology of integrated circuits is still in the process of evolution which is leading to smaller feature size, line width and high packing density on chip. Scaling is an important factor for the designers however, the details of its implementation and limitations is not in the scope of this chapter. Readers interested in preliminary study of scaling can refer [41,100, 101]. The scaling down of device size in ICs i.e. scaling of integrated circuits has resulted in more complex chips having millions of interconnections. Also with increase in switching speed and using drivers with varied driving capability on the same chip results in crosstalk effects. The prime objective of technology scaling is to increase packing density, decrease gate delay and power dissipation. Higher densities are only possible if the interconnects are also scaled. In interconnect scaling, the width reduces with increase in density. Reduced width means increased resistance and denser interconnect means higher coupling capacitance. With huge functionalities being integrated, long interconnects have become a common feature. The increase in wire density and high operational frequency of the circuit on-chip causes coupled noise or crosstalk because of associated parasitics, which may lead to critical delays or logic malfunctions and hence become an important parameter to test. The major difficulties in performance improvement are increased interconnect delays and coupling effects. Crosstalk effect induces pulse and unpredictable delay. The pulse or glitch is induced on victim line which is static and when neighboring lines called aggressors have a transition. The crosstalk pulse produced on victim line due to coupling parasitics has an impact on performance of the circuit. The crosstalk effect produces delay in signal transmission when both victim and aggressor lines have simultaneous transitions. When transitions of the lines are in opposite direction, then the worst case occurs wherein the delay is maximised. This is because of Miller effect stated as “a capacitor experiencing identical but opposite voltage swings at both its terminals can be replaced by a capacitor to ground whose value is twice the original value”. So, due to coupling capacitor the delay of the nth wire is the function of transitions on the neighboring wires n-1 and n+1. The capacitively coupled interconnects driven by unbalanced drivers causes high enough interference to affect the logic value of the digital signal [1]. So crosstalk which is due to poor design can be seen as a defect in the circuit which produces logic errors [2]. Although physical defects causes electrical faults and logical faults in ICs, the existing fault models viz. stuck open, stuck on, bridging and stuck at fault models do not ensure the

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coverage for crosstalk faults. The use of Ultra Deep Submicron technology (UDSM)/nanotechnology causes continuous miniaturization of circuits on chip that leads to a large number of long interconnects and with rapid increase in operational frequency, the parasitics are dominated and signal integrity becomes a major problem for chip designers. The problems are further aggravated by fabrication. Although many of researchers have analyzed and modeled crosstalk noise and delay [3-8], but less attention is paid to test these effects. Efforts has been made to test the interconnect faults in PCBs and FPGA architecture [9-16]. However, some work has been done to test VLSI interconnect defects [17-25, 27]. Few researchers have adopted scan based BIST technique and some have proposed their own technique for testing of interconnect faults.

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2. INTERCONNECTS Interconnects are metal or polysilicon structures used to connect different cells/devices. The function of interconnects or wiring systems is to distribute clock and other signals and to provide power/ground to and among the various circuits/system functions on the chip. The performance s.a. time delay and power dissipation of a high-speed chip is highly dependent on the interconnects which connect different macro cells within a VLSI chip. To escape prohibitively large delays, designers scale down global wire dimensions more sluggishly than the transistor dimensions. As technology advances, interconnects have turned out to be more and more important than the transistor resource, and it is essential to use global interconnects optimally. For high-density high-speed chips of submicron-geometry, it is mostly the interconnection rather than the device performance that determines the chip performance. Wide wires are frequently encountered in clock distribution networks, power and ground lines, and other global interconnects such as data bus and control lines in upper metal layers. These wires are low resistive lines that can exhibit significant inductive effects at high frequencies. Due to presence of these inductive effects, the new generation VLSI designers have been forced to model the interconnects as distributed RLC transmission lines, rather than simple RC–ones. Modeling interconnects as distributed RLC transmission line has posed many challenges in terms of accurately determining the signal propagation delay, power dissipation through an interconnect, crosstalk between co-planar interconnects and interconnects on different planes due to capacitive and inductive coupling, and optimal repeater insertion. If we compare a interconnect line with the transmission line, the purpose of both is same i.e to transmit electrical signals from one point to another. One familiar example includes the connections between devices on a circuit board or PCB which is designed to operate at high frequencies. The concept behind it is that the devices to be connected through conducting lines or wires are separated by distances of the order of a wavelength or much larger. However in basic circuit analysis, the connections between elements are of negligible length. This ensures that the voltage across a resistor on one side of a circuit is exactly in phase with the voltage source on the other side, so there is no delay induced. The basic elements in the circuit such as resistors, capacitors, inductors and the connections between them are considered lumped elements if the time delay to traverse the elements is negligible. But if the elements or interconnections are large enough so that the time to traverse is significant, then

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these are considered as distributed elements. This means that R, L, C characteristics must be considered on per unit distance basis. Transmission lines have this property in general. If we look into the VLSI interconnects, the same principle is applied here for the characteristics of parasitics. Since with the high speed ICs, the length of interconnect is comparable to wavelength, so distributive elements R, L, C called interconnect parasitics have to be considered as shown in Fig.1. In addition to this, interwire or coupling parasitics are also present in the circuit because of complex geometry, short spacing of interconnects between themselves, its long length and high frequency of operation. The interwire parasitics lead to mutual inductance (M) and coupling capacitance (CC). All the parasitics lead to crosstalk noise, propagation delay and power dissipation which affects the signal integrity and degrade the performance of the circuit. Signal integrity is the ability of a signal to generate correct responses in a circuit.

R

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Figure 1. Interconnect wire distributed parasitic.

Distribution of the clock and signal functions is accomplished on three types of wiring (local, intermediate, and global). An interconnect depending on its length, can be classified as local, semi-global and global [41]. Local wiring, consisting of very thin lines, connects gates and transistors within an execution unit or a functional block (such as embedded logic, cache memory, or address adder) on the chip. Local wires usually span a few gates and occupy first and sometimes second metal layers in a multi-level system. The length of a local interconnect wire approximately scales with scaling of technology, as the increased packing density of the devices makes it possible to similarly reduce the wire lengths. Intermediate wiring provides clock and signal distribution within a functional block with typical lengths up to 3–4 mm. Intermediate wires are wider and taller than local wires to provide lower resistance signal/clock paths. Global wiring provides clock and signal distribution between the functional blocks, and it delivers power/ground to all functions on a chip. Global wires, which occupy the top one or two layers, are longer than 4mm and can be as long as half of the chip perimeter. The length of global interconnect wires grow proportionally to the die size. The length of semi-global interconnect behaves intermediately. The global interconnects are much wider than local and semi-global interconnects. Thus resistance of global interconnects is small and therefore their behavior resembles that of lossless transmission lines. At lower frequencies, interconnects cause no difficulty for signal propagation. However, at higher frequencies, they cause severe signal degradation such as signal delay, crosstalk, ringing, reflections and distortions which must be addressed by VLSI designers. It has been

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predicted since long time that interconnect wiring delays rather than transistor logic delays would be the major contributor to the overall global path delays for ICs fabricated by deep submicron CMOS processes. The increasing dominance of the interconnect coupled with the aggressive scaling at operating frequencies to increase chip performance has fundamentally changed the nature of IC design. The impact of the interconnect, therefore, needs to be considered during all stages of design and at all levels of design hierarchy. Even during process development, interconnect performance is an important consideration in the design of the on-chip metal system. With the upgrade of technology from micron to nanometer regime, technological, device and interconnect challenges are closely examined by different researchers. Propagation delay, crosstalk and power dissipation in global interconnects have become a core research problem. Therefore, a lot of work is being carried out to address these problems. Various models have been suggested in literature to analyze interconnects.

2.1. Interconnect Parasitics Capacitive parasitic of a wire is a function of shape, distance to nearly wires and distance to the substrate. Fig.2 shows different parasitic capacitances [28, 127]. For denser wiring, width ‘W’ is small, W/H ratio becomes even below unity in the advanced process. In this situation, the parallel plate capacitance (Cp) model is no more accurate and the effect of fringe capacitance Cf (the capacitance between side wall and substrate) must also be taken into account while estimating the parasitic capacitive effect.

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CC

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Cf Substrate

Figure 2. Capacitive Parasitic between two Parallel Lines on the same level.

Inter wire capacitances starts dominating in multi layer interconnect structures. The effect is more pronounced in higher interconnect layers as these interconnects are further away from the substrate. However, in multilayer structure, wires on adjacent layers are routed orthogonally to minimize the crosstalk. Inter wire capacitance causes crosstalk. Crosstalk is an unwanted coupling from neighbouring signal wire to a network node that introduces interference. This disturbance is the source of noise. The value of noise depends on the transient value of the neighbouring signal. Noise in the digital circuits is the unwanted

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variations of voltage and current at logic nodes. Mostly the noise in digital circuit is internally generated and its value is proportional to the signal swing. Crosstalk adversely affects the circuit operating at high frequencies in GHz range. The crosstalk induced faults are glitch fault and delay fault. A crosstalk induced glitch occurs when the victim line is intended to be at stable state and a noise pulse on the net occurs. A crosstalk induced delay occurs when both the affecting and victim lines have simultaneous transitions. If both lines make transitions in the same direction, the effective delay is reduced, resulting in a phenomenon called crosstalk speedup. If the affecting line and victim line make transitions in the opposite direction then delay will be increased, so called crosstalk slow down. In most of the circuits, crosstalk induced delay mainly slowdown delay causes chip failure more than crosstalk induced glitch. The crosstalk faults can be minimized by resizing drivers, shielding interconnect, rerouting signals and repeater insertion techniques. However, these redesign techniques are expensive in terms of time and design efforts. Encoding of data before transmitting leads to crosstalk minimization under worst case patterns. This minimizes the delay and can also help to reduce power dissipation by minimizing the number of transitions. In DSM technology, use of low resistance interconnect material and with increasing clock speed, increasing interconnect lengths and decreasing rise time, the inductance significantly plays a major role in on-chip circuit performance. Apart from other consequences of on-chip inductive parasitic, inductive coupling between interconnects causes crosstalk noise as in case of capacitive coupling and affects the signal integrity as shown in Fig.3. The presence of significant coupling inductance can result in damped voltage oscillations superimposed on top of a glitch or delay.

Aggressor (A)

i (t) M

Victim (V) L Figure 3. Inductive Coupling.

As interconnects are conducting wires, it exhibits some resistance. The current flowing through a resistance causes voltage drop and degrades the signal levels. Also wire delay is proportional to the resistance of the wire (RC delay). For long interconnect, the delay is dominated by RC effect. So far, the resistance of interconnect is considered to be linear and constant but at very high frequencies well in to the GHz region, an additional effect called skin effect plays a significant role. The resistance becomes frequency dependent and the high frequency current starts flowing on the surface of interconnect wire with current density falling off exponentially with the depth into the wire resulting decrease in effective cross

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sectional area and so increase in resistance. This increased resistance causes an extra attenuation which in turn results in distortion of the signal travelling over the interconnect wire. Skin effect results in an increase of propagation delay through the interconnects. The depth into the conductor at which the current falls off to a value of (e-1) of its nominal value is called skin depth. However, skin effect is a problem related to wider interconnects.

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2.2. Interconnect Models Electrical models are required to analyze the effects of interconnect parasitics. These models estimate and approximate the real behavior of the interconnect wire as a function of its parasitics. An ideal wire is one which does not have any impact on electrical behavior of the circuit i.e. no parasitics are associated with it. But the reality is far beyond it and requires complex electrical models for interconnects. During early phase of VLSI design, the gate parasitic impedances had been much larger than the interconnect parasitic impedances, since the size of gate (width and length) was quite large. For example, 5µm was a typical minimum feature size in 1980. Therefore, interconnect parasitic impedances were modeled as short circuit. With the conventional technology that used a feature size of 1μm or above, interconnects resistance was negligible compared to the driver resistance. Thus, the interconnect and loading gates were modeled as a lumped loading capacitance. The interconnect delay was determined by the driver resistance times the total loading capacitance. However, with the scaling of technology and increased chip sizes (submicron VLSI technology), the cross-sectional area of interconnects had been scaled down while their lengths increased. Therefore, the interconnect resistance was comparable to the driver resistance and the interconnect capacitances became comparable to the gate parasitic capacitances, which forced the designers to model interconnects as RC line. With the introduction of RC models interconnection delay, power consumption and repeater insertions became important in realizing high performance VLSI’s. Almost every aspect of the design and analysis was affected by new interconnect model. Interconnects are modelled differently which is dependent on the applications. Interconnect analytical models can be categorized as lumped and distributed. The lumped model is useful only when a single parasitic component is dominant. When resistance of the interconnect wire is small and switching frequency is not high, then only capacitive component is dominated and it is useful to lump it. If interconnects are having a significant resistance then lumped capacitive model is inaccurate and lumped RC model is considered. However in actuality, the circuit parasitics of a interconnect wire are distributed along its length and it is not lumped. A simple circuit based on one aggressor and one victim is shown in Fig. 4(a). However, this circuit is not practical since in a realistic VLSI chip more number of aggressors are coupled to the victim line.

V A Figure 4(a). Simple one- aggressor one- victim circuit.

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V RV CV

CC A Ra

Ca

Figure 4(b). Equivalent lumped model.

The equivalent model is shown in Fig. 4(b). In this model, each pulling resistance (RV and Ra) is composed of the driver resistance and the line resistance. The load capacitances CV and Ca are composed of line capacitance and the gate capacitance of the load driven by the line. Earlier, most of the models presented are similar to lumped model [29-32]. In DSM technology, lumped models are no longer accurate. Also on-chip metal wire of more than a few millimeter length has significant resistance. So, distributed coupled RC models become necessary even for early design stages. Some researchers [33-35] have discussed this problem. The distributed π , 3π and 4π models are proposed in [32, 36, 37]. A distributed RC model of an interconnect is shown in Fig. 5 [127]. RV

RV

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CV

Ra Ca

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Figure 5. Interconnect distributed RC line.

With ever-growing length of interconnects and increased clock frequency, the effects of on chip interconnects cannot be restricted to RC models. The importance of on-chip inductance is continuously increasing with faster on-chip rise times, wider wires, and the introduction of new materials for low resistance interconnects. The usage of higher operating frequencies increases the value of jω L , which plays an important role in interconnect delay calculation and its design. In DSM technology, the inductance is becoming more important and it is necessary to take transmission line properties in to account when modeling long interconnects. These properties affect both signal propagation within the interconnect and signal reflections at its transmitting and receiving ends. There are two time constants associated with a distributed

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RLC line, an inductive time constant LC and a resistive time constant RC [38]. The onchip inductance becomes significant when inductive time constant is comparable to or exceeds the resistive time constant [39, 40]. A distributed RLC transmission line model of an interconnect line is shown in Fig. 6 [127]. This also includes mutual inductance and coupling capacitance. LV

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Figure 6. Interconnect distributed RLC Line.

A distributed RLC model of an interconnect known as the transmission line model, becomes the most accurate approximation of the actual behavior. For copper (Cu) board, the interconnects on PCB are wide and thick enough and furthermore due to the high conductivity of copper, the interconnect resistance can be safely ignored. Thus it is called lossless transmission line model. But the same is not entirely true for on-chip interconnects where the resistance of the wire has significant value and is considered to be an important factor while determining the performance parameters. Therefore, the lossy transmission line model is considered in case of on-chip interconnects. Inductance has a significant effect on the response of a signal propagating across an interconnect line for the range of the length given in Eq. (1) [38].

tr 2 LC