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Power electronics in renewable energy systems and smart grid: technology and applications
 9781119515623, 1119515629

Table of contents :
Cover......Page 1
Power Electronicsin RenewableEnergy Systemsand Smart Grid:Technology and Applications......Page 4
© 2019......Page 5
Contents......Page 6
Preface......Page 14
About the Editor......Page 19
About the Contributors......Page 21
List of Abbreviations......Page 32
1 Energy, Environment,Power Electronics,Renewable Energy Systems,and Smart Grid......Page 40
2 Power SemiconductorDevices For Smart GridAnd Renewable EnergySystems......Page 123
3 Multilevel Converters –Configuration of Circuitsand Systems......Page 191
4 MULTILEVELCONVERTERS – CONTROLAND OPERATIONIN INDUSTRIAL SYSTEMS......Page 257
5 FLEXIBLE TRANSMISSIONAND RESILIENT DISTRIBUTIONSYSTEMS ENABLED BY POWERELECTRONICS......Page 309
6 RENEWABLE ENERGY SYSTEMSWITH WIND POWER......Page 353
7 PHOTOVOLTAICENERGY SYSTEMS......Page 384
8 OCEAN AND GEOTHERMALRENEWABLE ENERGY SYSTEMS......Page 427
9 FUEL CELLS AND THEIRAPPLICATIONS IN ENERGYSYSTEMS......Page 478
10 GRID ENERGY STORAGESYSTEMS......Page 530
11 Smart Grid Simulationsand Control......Page 619
12 ARtificial IntelligenceApplications in RenewableEnergy Systems and SmartGrid – Some NovelApplications......Page 659
Index......Page 710
IEEE Press Serieson Power Engineering......Page 728

Citation preview

Power Electronics in Renewable Energy Systems and Smart Grid

IEEE Press 445 Hoes Lane Piscataway, NJ 08854 IEEE Press Editorial Board Ekram Hossain, Editor in Chief Giancarlo Fortino David Alan Grier Donald Heirman Xiaoou Li

Andreas Molisch Saeid Nahavandi Ray Perez Jeffrey Reed

Diomidis Spinellis Elya B. Joffe Sarah Spurgeon Ahmet Murat Tekalp

Power Electronics in Renewable Energy Systems and Smart Grid Technology and Applications

Edited by

Bimal K. Bose

© 2019 by The Institute of Electrical and Electronics Engineers, Inc. All rights reserved. Published by John Wiley & Sons, Inc., Hoboken, New Jersey. Published simultaneously in Canada. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, scanning, or otherwise, except as permitted under Section 107 or 108 of the 1976 United States Copyright Act, without either the prior written permission of the Publisher, or authorization through payment of the appropriate per‐copy fee to the Copyright Clearance Center, Inc., 222 Rosewood Drive, Danvers, MA 01923, (978) 750‐8400, fax (978) 750‐4470, or on the web at www.copyright.com. Requests to the Publisher for permission should be addressed to the Permissions Department, John Wiley & Sons, Inc., 111 River Street, Hoboken, NJ 07030, (201) 748‐6011, fax (201) 748‐6008, or online at http://www.wiley.com/go/ permission. Limit of Liability/Disclaimer of Warranty: While the publisher and author have used their best efforts in preparing this book, they make no representations or warranties with respect to the accuracy or completeness of the contents of this book and specifically disclaim any implied warranties of merchantability or fitness for a particular purpose. No warranty may be created or extended by sales representatives or written sales materials. The advice and strategies contained herein may not be suitable for your situation. You should consult with a professional where appropriate. Neither the publisher nor author shall be liable for any loss of profit or any other commercial damages, including but not limited to special, incidental, consequential, or other damages. For general information on our other products and services or for technical support, please contact our Customer Care Department within the United States at (800) 762‐2974, outside the United States at (317) 572‐3993 or fax (317) 572‐4002. Wiley also publishes its books in a variety of electronic formats. Some content that appears in print may not be available in electronic formats. For more information about Wiley products, visit our web site at www.wiley.com. Library of Congress Cataloging‐in‐Publication Data is available. Hardback: 9781119515623 Set in 10/12pt Times by SPi Global, Pondicherry, India Printed in the United States of America 10 9 8 7 6 5 4 3 2 1

Contents PREFACE About the Editor About the Contributors LIST OF ABBREVIATIONS Chapter 1

xiii xix xxi xxxiii

Energy, Environment, Power Electronics, Renewable Energy Systems, and Smart Grid

Bimal K. Bose and Fei (Fred) Wang 1.1 Introduction  1 1.2 Energy  1 1.3 Environment  4 1.3.1 Environmental Pollution by Fossil Fuels  4 1.3.2 Climate Change or Global Warming Problems  7 1.3.3 Several Beneficial Effects of Climate Change  11 1.3.4 The Kyoto Protocol and Carbon Emission Control  12 1.3.5 How Can We Solve or Mitigate Climate Change Problems?  1.4 Power Electronics  14 1.4.1 The Role of Power Electronics in Renewable Energy Systems and Grids  14 1.4.2 Fundamentals of Power Electronics  16 1.4.3 Power Electronics Applications  35 1.5 Renewable Energy Systems  48 1.5.1 Wind Energy Systems  50 1.5.2 PV Systems  52 1.5.3 Grid Energy Storage  53 1.6 Smart Grid  54 1.6.1 FACTS Technologies  54 1.6.2 HVDC Technologies  60 1.6.3 DC Grid and Supergrid  66 1.6.4 Power Electronics for Distribution Grids  73 1.7 Summary and Future Trends  76 Acknowledgments  78 References  78

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Chapter 2

Power Semiconductor Devices For Smart Grid And Renewable Energy Systems

85

Alex Q. Huang 2.1 Introduction  85 2.2 Power Semiconductor Device Operation in Power Converters  87 2.2.1 Commercially Available Power Semiconductor Devices  87 2.2.2 Modern Power Semiconductor Device Characteristics  90 2.3 State‐of‐the‐Art Power Semiconductors: A Comparison  101 2.3.1 Voltage Rating  102 2.3.2 Current Rating  103 2.3.3 Switching Frequency  108 2.3.4 Maximum Junction Temperature  114 2.4 Recent Innovations in SI Power Devices  117 2.4.1 Silicon Superjunction (SJ) MOSFET  117 2.4.2 Thin Wafer Field Stop IGBT (FS‐IGBT)  119 2.4.3 Reverse Conducting IGBT (RC‐IGBT)  123 2.4.4 Reverse Blocking IGBT  124 2.4.5 Integrated‐Gate‐Commutated Thyristor (IGCT)  124 2.5 Recent Innovations in WBG Power Devices  127 2.5.1 SiC and GaN Diodes  128 2.5.2 SiC MOSFET  131 2.5.3 Ultra High‐Voltage SiC Power Devices  135 2.5.4 GaN Heterojunction Field Effect Transistor  137 2.6 Smart Grid and Renewable Energy System Applications  138 2.7 Conclusions  144 References  144 Chapter 3 Multilevel

Converters – Configuration of Circuits and Systems

Hirofumi Akagi 3.1 Introduction  153 3.1.1 Historical Review of Multilevel Converters  153 3.1.2 Overview of Chapter 3  155 3.2 Multilevel NPC and NPP Inverters  155 3.2.1 Circuits of Three‐Level NPC and NPP Inverters  155 3.2.2 Principles of the Three‐Level NPC and NPP Inverters  156 3.2.3 Comparisons Between the Three‐Level NPC and NPP Inverters  3.2.4 Five‐Level NPC Inverters  160 3.3 Multilevel FLC Inverters and Hybrid FLC Inverters  161 3.3.1 Circuits of the Three‐Level and Four‐Level FLC Inverters  161 3.3.2 Principles of the Three‐Level FLC Inverter  162 3.3.3 Hybrid Four‐Level and Five‐Level FLC Inverters  162 3.4 Modular Multilevel Cascade Converters  164 3.4.1 Terminological Issue and Solution  164 3.4.2 Circuits and Individualities of Six Family Members  167

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3.4.3 Topological Discussion on the DSBC and DSCC Converters  168 3.4.4 Comparisons among the Six MMCC Family Members  169 3.4.5 Circulating Current  170 3.5 Practical Applications of SSBC Inverters to Medium‐Voltage Motor Drives  3.6 Hierarchical Control of an SSBC‐Based STATCOM  173 3.6.1 Background and Motivation  173 3.6.2 Hierarchical Control  174 3.7 A Downscaled SSBC‐Based STATCOM With Phase‐Shifted‐Carrier PWM  3.7.1 System Configuration  177 3.7.2 Control Technique  179 3.7.3 Experimental Waveforms  181 3.8 Circulating Currents in DSCC Converters  183 3.8.1 Circulating Current in a Cycloconverter  184 3.8.2 Circulating Current in a Single‐Leg DSCC Inverter  185 3.8.3 Similarity and Difference in Circulating Current  186 3.9 A Downscaled DSCC‐Based BTB System  187 3.9.1 Circuit Configuration  187 3.9.2 Operating Performance under Transient States  189 3.10 Practical Applications of DSCC Converters to Grid Connections  192 3.11 Applications of DSCC and TSBC Converters to Motor Drives  193 3.11.1 DSCC‐based Motor Drive Systems  193 3.11.2 Experimental Motor Drives Using a DSCC Inverter and a TSBC Converter  195 3.11.3 Comparisons in Start‐up Performance when the 50 Hz Induction Motor was Driven  198 3.11.4 Operation of the DSCC‐Driven 50 Hz Motor and the TSBC‐Driven 38 Hz Motor at the Rated Frequency and Torque  202 3.11.5 Four‐Quadrant Operation of the TSBC‐driven 38 Hz Motor at No Load Torque  204 3.11.6 Discussion of the Two Motor Drives  204 3.12 Distributed Dynamic Braking of a DSCC‐FED Induction Motor Drive  204 3.12.1 Background and Motivation  206 3.12.2 Circuit and System Configurations  206 3.12.3 Experimental Verification  210 3.13 Practical Applications of DSCC Inverters to Medium‐Voltage Motor Drives  212 3.14 Future Scenarios and Conclusion  213 References  214 CONVERTERS – CONTROL AND OPERATION IN INDUSTRIAL SYSTEMS

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Chapter 4 MULTILEVEL

Jose I. Leon, Sergio Vazquez and Leopoldo G. Franquelo 4.1 Introduction  219 4.2 Summary of Multilevel Converter Topologies  221 4.3 Control Structure of Multilevel Power Converters  223 4.3.1 The Outer Control Loop (Stage 1)  225 4.3.2 The Inner Control Loop (Stage 2)  225

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4.3.3 The Zero‐Sequence Injection (Stage 3)  226 4.3.4 The In‐phase Balancing Strategy (Stage 3)  227 4.4 Modulation Methods for Multilevel Power Converters (Stage 4)  227 4.4.1 Carrier‐Based Modulation Techniques  228 4.4.2 Space‐vector Based Modulation Methods  242 4.4.3 Pseudo‐Modulation Techniques and Control Methods with Implicit Modulator  243 4.5 Applications of Multilevel Power Converters  245 4.5.1 Grid‐connected Multilevel Converters for the  Integration of Renewable Energy Sources  245 4.5.2 Power Quality Applications  248 4.5.3 Motor Drive Applications  250 4.5.4 HVDC Transmission Systems  251 4.6 Additional Practical Challenges of Multilevel Converters  257 4.7 Future Perspective of Multilevel Converters and Conclusions  258 References  259 Chapter 5

FLEXIBLE TRANSMISSION AND RESILIENT DISTRIBUTION SYSTEMS ENABLED BY POWER ELECTRONICS

Fang Z. Peng and Jin Wang 5.1 Introduction  271 5.2 FACTS Configurations in the Smart Grid  279 5.2.1 Shunt Compensation  281 5.2.2 Series Compensation  284 5.2.3 Shunt‐Series Configuration  285 5.2.4 Back‐to‐Back Configuration  286 5.3 RACDS Configurations in the Smart Grid  287 5.3.1 RACDS: Microgrids  287 5.3.2 RACDS: Controllable Distribution Network  289 5.3.3 RACDS: Meshed Distribution Systems  290 5.4 Evolution of FACTS and RACDS  291 5.4.1 Traditional FACTS and RACDS  291 5.4.2 Modern FACTS and RACDS  293 5.5 FACTS and RACDS Installations  298 5.5.1 Traditional FACTS Installations  298 5.5.2 Modern FACTS Installations  299 5.5.3 RACDS Installations  301 5.6 Future Perspectives  301 5.6.1 Transformerless Unified Power Flow Controller  301 5.6.2 Compact Dynamic Phase‐Angle Regulator  303 5.6.3 Distributed FACTS  303 5.6.4 Power Regulator for Parallel Feeders  305 5.6.5 High Power Density CMIs  307 5.7 Conclusion  309 Acknowledgments  310 References  310

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RENEWABLE ENERGY SYSTEMS WITH WIND POWER

ix 315

Frede Blaabjerg and Ke Ma Overview of Wind Power Generation and Power Electronics  315 Technology Challenges and Driving Forces in this Field  318 6.2.1 Low Levelized Cost of Energy (LCOE)  318 6.2.2 Complex Mission Profiles  320 6.2.3 Strict Grid Codes  322 6.2.4 Increasing Reliability Requirements  325 6.3 Wind Turbine Concepts and Power Electronics Converters  326 6.3.1 Wind Turbine Concepts  326 6.3.2 Power Electronics Converters in Wind Power Applications  328 6.4 Control of Wind Turbine Systems  333 6.5 Power Electronics for Multiple Wind Turbines and Wind Farms  336 6.6 Conclusion  340 References  341 6.1 6.2

Chapter 7

PHOTOVOLTAIC ENERGY SYSTEMS

347

Mariusz Malinowski, Jose I. Leon and Haitham Abu‐Rub 7.1 Introduction  347 7.2 Thermal and PV Solar Energy Systems  351 7.3 The Solar Cell  354 7.4 Solar PV System Costs  357 7.4.1 Incentives for More Investments in PV Systems  361 7.5 General Scheme for a Solar PV System  362 7.6 Grid‐Connected PV Systems  363 7.6.1 Utility‐scale PV Power Plants  364 7.6.2 Residential and Industrial PV Applications  366 7.6.3 Low‐power PV Systems  371 7.7 Control of Grid‐Connected PV Systems  372 7.8 Stand‐Alone PV Systems  374 7.9 Energy Storage Systems for PV Applications  379 7.10 Operational Issues for PV Systems  381 7.11 Conclusions 385 References  386 Chapter 8 OCEAN AND GEOTHERMAL

RENEWABLE ENERGY SYSTEMS

Annette von Jouanne and Ted K.A. Brekken 8.1 Introduction  391 8.2 Wave Energy  392 8.2.1 Resource Characteristics  392 8.2.2 Wave Energy Conversion Technologies and Resource Characterization  394 8.2.3 Power Electronics and Control  397 8.2.4 Autonomous Applications  401 8.2.5 Cost 403

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8.2.6 Rotating Machines in Marine Energy Converters  405 8.2.7 Unique Testing Opportunity for Wave Energy Converters  406 8.3 Ocean Thermal Energy Conversion  411 8.3.1 Resource Characteristics  412 8.3.2 OTEC Technologies  413 8.3.3 Open‐cycle OTEC  414 8.3.4 Closed‐cycle OTEC  415 8.3.5 OTEC Generator Grid Interface  415 8.3.6 Cost 416 8.4 Tidal and Ocean Currents  417 8.4.1 Resource Characteristics  418 8.4.2 Tidal Barrage, Tidal Current, and Ocean Current Technologies  8.4.3 Power Electronics and Grid Interface  422 8.4.4 Cost 425 8.5 Geothermal Energy Systems  426 8.5.1 Resource Characteristics  428 8.5.2 Geothermal Power Plant Technologies  429 8.5.3 Dry Steam  431 8.5.4 Flash Steam  431 8.5.5 Binary Cycle  432 8.5.6 Geothermal Generator Grid Interface  432 8.5.7 Cost 433 8.6 Conclusion  434 Acknowledgment  435 References  435 Chapter 9

420

FUEL CELLS AND THEIR APPLICATIONS IN ENERGY SYSTEMS

Jih‐Sheng (Jason) Lai and Michael W. Ellis 9.1 Introduction  443 9.2 Different Fuel Cell Technologies  446 9.2.1 Low‐temperature Fuel Cells  447 9.2.2 High‐temperature Fuel Cells  453 9.3 Fuel Cell Applications  457 9.3.1 Transportation Applications  457 9.3.2 Stationary Power Generation Applications  460 9.4 Electrical Characteristics  462 9.4.1 Steady‐state Operation  462 9.4.2 Dynamic Operation  465 9.4.3 Dynamic Operation with a Paralleled Ultracapacitor  468 9.5 Fuel Cell Power System Architecture  468 9.5.1 Balance‐of‐Plant 468 9.5.2 Fuel Cell DC Power Systems  469 9.5.3 Grounding Requirement for Fuel Cell AC Power Systems  9.6 Power Electronics for Fuel Cell Applications  472 9.6.1 DC‐DC Converters  472

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9.6.2 DC‐AC Inverter  479 9.6.3 Double‐Line Frequency Issues  9.7 Summary  485 References  486 Chapter 10 GRID

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ENERGY STORAGE SYSTEMS

495

Marcelo G. Molina 10.1 Introduction 495 10.2 Smart Grid Applications of Energy Storage  500 10.3 Energy Storage Technologies  506 10.3.1 Mechanical Energy Storage  507 10.3.2 Electrical Energy Storage  518 10.3.3 Electrochemical Energy Storage  529 10.3.4 Chemical Energy Storage  547 10.3.5 Thermal Energy Storage  552 10.4 Assessment of Energy Storage Technologies  555 10.5 Power Conditioning System for Interfacing Energy Storage Technologies with the Smart Grid 565 10.6 Conclusion 572 References  574 Chapter 11 Smart

Grid Simulations and Control

Aranya Chakrabortty and Anjan Bose 11.1 Introduction 585 11.2 Simulation Models  586 11.2.1 Synchronous Generators  588 11.2.2 Models of Renewable Energy Sources  589 11.2.3 Transmission Line Models  591 11.2.4 Load Models  591 11.3 Current Approach for Smart Grid Simulation  592 11.3.1 Power Flow Analysis  592 11.3.2 Dynamic Simulations  593 11.3.3 Economic Dispatch and OPF  593 11.3.4 Fault Analysis  594 11.3.5 Load Frequency Control  594 11.3.6 Operator Training Simulator  594 11.3.7 Reliability Modeling and Simulation  594 11.3.8 Simulation of Power Markets  595 11.4 Challenges for Grid Simulation  595 11.4.1 Structural Properties  596 11.4.2 Scalability  596 11.4.3 Model Validation  596 11.4.4 Model Aggregation  597 11.4.5 Role of Power Electronics  597

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11.4.6 Co‐simulation of T&D Models  598 11.4.7 Co‐Simulation of Infrastructures  599 11.4.8 Cyber‐Physical Modeling and Simulations  601 11.5 Next‐Generation Grid Control Systems  605 11.5.1 Wide‐area Control  605 11.5.2 Cyber‐Physical Challenges for Wide‐area Control  11.5.3 Scheduling Protocols  612 11.5.4 Co‐designing Wide‐area Control in Tandem with Communication Protocols  613 11.5.5 Plug‐and‐play Control of DERs  615 11.5.6 Distributed Load Frequency Control  616 11.5.7 Inner‐loop + Outer‐loop Hierarchical Control  617 11.6 Experimental Testbeds for Simulations and Control  618 11.7 Conclusions 619 References  620 Chapter 12

608

ARtificial Intelligence Applications in Renewable Energy Systems and Smart Grid – Some Novel Applications

Bimal K. Bose 12.1 Introduction 625 12.2 Expert Systems  627 12.2.1 Expert System Principles  627 12.2.2 Expert System‐Based Control of Smart Grid  631 12.3 Fuzzy Logic  636 12.3.1 Fuzzy Inference System Principles  637 12.3.2 Fuzzy Logic Control of a Modern Wind Generation System  12.4 Neural Networks  650 12.4.1 Neural Network Principles  650 12.4.2 Neural Network Applications  662 12.5 Conclusion 672 Acknowledgment  673 References  673 Index

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Preface With a sense of pride and immense accomplishment, I am presenting this book to the professional communities of the world with the hope that it will be enthusiastically received like my other books in the power electronics area. This is essentially the eighth book in power electronics that I have authored and edited in my long professional career of more than 50 years. It is well‐known that the revolution in power electronics was ushered in by the introduction of solid‐state power semiconductor devices almost 60 years ago, along with the evolution in digital electronics that has created significant impact in our society. Since the beginning, power electronics has grown as a multidisciplinary technology and has been applied extensively in industrial, commercial, residential, transportation, aerospace, military and utility systems, with automation and efficient energy conversion systems that contribute to efficiency improvement of the equipment. Recently, the advent of artificial intelligence techniques is creating a challenging frontier for power electronics, with many novel applications in renewable energy systems and smart grid. Power electronics has now grown to be possibly the most important technology in the twenty‐first century. In our future vision of smart grid, the role of power electronics in high‐voltage DC (HVDC) systems, static VAR compensators (SVCs), flexible AC transmission systems (FACTs), fuel cell energy conversion systems, uninterruptible power systems (UPS), besides the renewable energy and bulk energy storage systems, will be tremendous. The renewable energy segment is continuously growing, and our dream of 100% renewables in the long run (with the complete demise of fossil fuels and nuclear energy) is not unrealistic. Therefore, the increasingly important role of power electronics in our society remains obvious. This book contains 12 chapters which were contributed by my invitation from well‐renowned professionals across the world who are specialists in the respective areas. All the chapters essentially review the state‐of‐the‐art technology with application examples to cater for the needs of readers who want to learn about power electronics applications in modern renewable energy systems and smart grid. In fact, the idea for this book came after publication of our special issue of the Proceedings of the IEEE on Power Electronics in Smart Grid and Renewable Energy Systems in November 2017. Chapter  1, “Energy, Environment, Power Electronics, Renewable Energy Systems and Smart Grid,” was contributed by me and my colleague Fred Wang. This is an introductory chapter for the book that gives a comprehensive overview of xiii

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the important elements. Energy and environmental issues, such as climate change problems, their consequences and remedial measures, are somewhat emphasized in the beginning because these are the foundations upon which the motivations for clean energy systems and modernization of the power grid are based. However, the main focus of this chapter is introduction of modern power electronics technology and its applications in renewable energy systems and smart grid. The discussion includes modern power semiconductor devices, converter topologies, and some of the most common power electronics applications, particularly those related to modern power grids. Finally, the renewable energy systems and smart grid features are overviewed, emphasizing their basis on power electronics. Chapter  2, “Power Semiconductor Devices for Smart Grid and Renewable Energy Systems,” was contributed by Alex Huang. It provides a critical review of some of the major power semiconductor device technologies and their applications in renewable energy systems and smart grid. Highly efficient and reliable power electronic systems that convert and process electrical energy from one form to another are critical for smart grid and renewable energy systems. The power semiconductor device, as the cornerstone technology in a power electronics system, plays a pivotal role in determining the system efficiency, size, and cost. Starting from the invention and commercialization of the silicon bipolar junction transistor around 60 years ago, a whole array of silicon power semiconductor devices have been developed and commercialized. These devices enable power electronics systems to reach ultra‐high efficiency and the high power capacity needed for various smart grid and renewable energy system applications, such as photovoltaic (PV), wind, energy storage, electric vehicle (EV), flexible AC transmission systems (FACTS), and high‐voltage DC (HVDC) transmission. In the last two decades, newer generations of power semiconductor devices based on wide bandgap (WBG) materials, such as SiC and GaN, have been developed and commercialized, further pushing the boundary of power semiconductor devices to higher voltages, higher frequencies, higher temperatures, and higher efficiencies. Chapter 3, “Multilevel Converters – Configuration of Circuits and Systems,” was contributed by Hirofumi Akagi. It begins with the definition of “multilevel converters” in a broad sense, followed by a chronological overview. The multilevel converters can be categorized as three‐level neutral‐point clamped (NPC) and neutral‐point‐piloted (NPP) inverters, three‐level and four‐level flying capacitor (FLC) inverters, combinations of the FLC inverter with the NPC or NPP inverter, and a family of modern modular multilevel converters (MMCs). Then it goes on to a discussion of their circuits and systems, as well as their applications to smart grids and medium‐voltage, high‐power motor drives. Some multilevel converter types have already been put into commercial use, some are in a research and development stage, and others are within the academic research stage. It is interesting to note that the modern MMCs based on a cascaded half‐bridge topology are receiving maximum attention in the literature Chapter  4, “Multilevel Converters  –  Control and Operation in Industrial Systems,” was contributed by Jose Leon, Sergio Vazquez, and Leopoldo Franquelo.

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Considering the importance of multilevel converters in renewable energy systems and smart grid, an additional chapter was introduced to deal with their applications in industrial systems. It summarizes the best‐known multilevel converter topologies and addresses their common modulation techniques. The main applications of multilevel converters are introduced, showing the implementation of conventional control methods. Grid‐connected multilevel converters for the integration of renewable energy sources, power quality and motor drive applications, and HVDC systems are studied in some detail. Practical challenges and a future perspective of the application of multilevel converters are also addressed. Chapter  5, “Flexible Transmission and Resilient Distribution Systems Enabled by Power Electronics,” was contributed by Fang Peng and Jin Wang. It provides a broad review of the modernization efforts in FACTS technology leading up to its usage in the modern smart grid. Extension of FACTS technology to the resilient AC distribution system (RACDS) to facilitate the transition to “smart‐ distribution” is also discussed in some detail. The key benefits for the application of the modern FACTS technology lie in its ability to achieve fast, efficient and dynamic voltage/VAR control, optimized power routing, and independent real and reactive power control using a small footprint. On the other hand, the key benefits of the RACDS technology include its ability to improve grid resiliency and impart a “self‐ healing” capability to the power grid. Additionally, RACDS has the ability to integrate distributed energy sources into the power grid and enables bi‐directional, interconnected distribution systems that are essential for a smart grid. Detailed analysis of different configurations of these technologies, a review of existing and ongoing commercial installations, and an overview of current and future research in this area form the essential contents of this chapter. Chapter 6, “Renewable Energy Systems with Wind Power,” was contributed by Frede Blaabjerg and Ke Ma. This chapter gives a broad review of the major challenges as well as the technology solutions in power electronics for wind power generation. First, the development of wind power along with power electronics, as well as the global market, are discussed. Several technological challenges and driving forces in this area are addressed. Afterwards, some important wind turbine concepts are summarized along with current/future power electronics solutions and control methods, either for individual wind turbines or for entire wind farms. As the level of grid penetration has begun to increase dramatically, wind power is starting to have significant impacts on the modern power grid systems, and advanced power electronics technologies are being introduced to improve the characteristics of wind turbines in order to make them more suitable for integration with the power grid. Chapter  7, “Photovoltaic Energy Systems,” was contributed by Mariusz Malinowski, Jose Leon, and Haitham Abu‐Rub. It describes solar energy systems, which essentially constitute a mature technology. The rapid growth of solar photovoltaic energy worldwide indicates that this will become a very large source of energy in several decades, and will certainly become the core energy element for future power grids. The details of the types of PV solar cells, grid‐connected PV systems with their converter topologies and control, and stand‐alone PV systems

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are discussed in this chapter. Furthermore, operational aspects of PV systems with energy storage are discussed. As storage costs reduce, storage will be an important part of PV systems not only for better energy management, but also for voltage and frequency stabilization of the AC system. Chapter  8, “Ocean and Geothermal Renewable Energy Systems,” was ­contributed by Annette von Jouanne and Ted Brekken. It reviews several forms of ocean energy including wave, tidal, ocean current, and ocean thermal, along with land‐based geothermal energy. The chapter presents a broad technological ­overview of each type, along with summaries of cost of energy studies, and an overview of conversion technologies and grid interface systems. Key techno‐economic findings are presented, including assessments of the resources and near‐term and long‐term cost projections. Autonomous, non‐grid‐connected ocean wave energy applications are also presented, including adapting utility‐scale ocean wave energy devices for small‐scale autonomous and sensor applications. Geothermal energy and ocean thermal energy track closely with traditional dispatchable synchronous generator‐ based generation systems, while wave, tidal, and current systems bear greater ­similarities to wind power in terms of technology, cost trends, and grid interface technology. Chapter 9, “Fuel Cells and Their Applications in Energy Systems,” was contributed by Jih‐Sheng (Jason) Lai and Michael Ellis. The chapter explains the basic operation of fuel cell systems and their characteristics, such as the polarization curve, dynamic response, efficiency, energy density, and specific energy. Based on their operating temperature, different fuel cell types, such as PEMFC, AEMFC, PAFC, DMFC, DAFC, SOFC and MCFC, are described with their respective ­applications. To make fuel cell systems practical for use in either stationary or transportation applications, power electronics is the essential part. This chapter then depicts system architectures and different power conversion circuits for effective application of fuel cells, with illustrations of conceptual diagrams and experimental results. Chapter  10, “Grid Energy Storage Systems,” was contributed by Marcelo Molina. Comprehensive investigation was made on key energy storage technologies in electrical energy storage systems for smart grid applications, including their power electronic interfaces and control schemes. The chapter covers all the important energy storage technologies, including BESS, FES, SCES, SMES, CAES, TES, and hydrogen. It then puts also a spotlight on the design and implementation of the power electronic conditioning system for these energy storage technologies, and the issues derived from their integration with the power grid, and discusses the challenges and future perspectives. Finally, the chapter is completed with a list of major practical storage installations around the world. Chapter  11, “Smart Grid Simulations and Control,” was contributed by Aranya Chakrabortty and Anjan Bose. It gives a comprehensive overview of the state‐of‐the‐art practices as well as future directions of power system simulations in both academia and industry. The discussion covers commonly used numerical methods and their applications in solving problems in planning, operation, control, and markets. The chapter also overviews various feedback control mechanisms that

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are currently used in the grid for wide‐area oscillation damping and power flow control. Special attention is paid to cyber‐physical implementation of wide‐area controllers, as well as plug‐and‐play designs for next‐generation converter‐based control of renewable energy resources. The last chapter (Chapter 12) entitled “Artificial Intelligence Applications in Renewable Energy Systems and Smart Grid – Some Novel Applications” was contributed by me. It gives a brief but comprehensive review of the principal AI techniques, such as expert systems, fuzzy logic and neural networks. Then it decribes some new applications for smart grid and wind generation system, such as control of smart grid based on a real‐time simulator, wind generation systems with fuzzy logic control, adaptive neuro‐fuzzy inference system‐based health monitoring of wind generation systems, and fault identification of smart grid subsystem by neural networks. Many more applications can be formulated based on these concepts. The AI techniques are expected to have major impacts on renewable energy systems and smart grid in the future. Finally, I would like to convey my sincere thanks to all the contributors for their enthusiasm, cooperation and timeliness, without which this book would not have been possible. All of them are recognized as authorities in their respective fields. I also thank the reviewers of the book manuscript, the Wiley-IEEE Press editor, Mary Hatcher, along with Louis Manohar, and Shiji Sreejish for their help. I ­sincerely wish that this book fulfills the reader’s need for knowledge of power electronics in the areas of renewable energy systems and smart grid. Bimal K. Bose University of Tennessee Knoxville, USA

About the Editor Bimal K. Bose (Life Fellow, IEEE) is currently an Emeritus Professor in the Department of Electrical and Computer Engineering of the University of Tennessee, Knoxville, TN, USA. He was Endowed Chair Professor (Condra Chair of Excellence in Power Electronics) at the University of Tennessee from 1987 until 2003, where he was responsible for organizing the power electronics education and research program. Concurrently, he was the Distinguished Scientist (1990–1992) and the Chief Scientist (1987–1989) of EPRI (Electric Power Research Institute) Power Electronics Applications Center (PEAC) in Knoxville, TN, USA. Prior to that, he was a Research Engineer in General Electric Corporate Research and Development (GE‐CRD) (now GE Global Research Center), Schenectady, NY, USA during 1976 to 1987. From 1971 to 1976, he was an Associate Professor of Electrical Engineering at the Rensselaer Polytechnic Institute, Troy, NY, USA. He received the BE degree from the Indian Institute of Engineering Science and Technology (IIEST), India, in 1956, the MS degree from the University of Wisconsin, Madison, WI, USA, in 1960, and a PhD from Calcutta University, India, in 1966. He is recognized as a world‐renowned authority and pioneer in power electronics for his many contributions, including high frequency link power conversion, advanced control techniques by microcomputers, invention of the transistor AC power switch for matrix converters, adaptive hysteresis‐band current control, and artificial intelligence applications in power electronics. He has authored/edited eight books (including this one): Power Electronics and Motor Drives – Advances and Trends (New York, NY, USA: Academic Press, 2006); Modern Power Electronics and AC Drives (Englewood Cliffs, NJ, USA: Prentice‐Hall, 2001); Power Electronics and Variable Frequency Drives (Piscataway, NJ, USA: IEEE Press, 1997); Modern Power Electronics (Piscataway, NJ, USA, IEEE Press, 1992); Microcomputer Control of Power Electronics and Drives (Piscataway, NJ, USA: IEEE Press, 1987); Power Electronics and AC Drives (Englewood Cliffs, NJ, USA: Prentice‐Hall, 1986); and Power Electronics and AC Drive Systems (Piscataway, NJ, USA: IEEE Press, 1982). He holds 21 US Patents and has authored more than 260 papers.

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Dr Bose received the IEEE Power Electronics Society Newell Award (2005), the IEEE Millennium Medal (2000), the IEEE Meritorious Achievement Award in Continuing Education (1997), the IEEE Lamme Gold Medal (1996), the IEEE Industrial Electronics Society (IES) Eugene Mittellmann Award (for lifetime achievement) (1994), the IEEE Region 3 Outstanding Achievement Award (1994), the Industry Applications Society Outstanding Achievement Award (1993), the GE Silver Patent Medal (1986), and the GE Publication Award (1985). He has also received the IIEST Alumni Association Lifetime Achievement Award (2018), the IIEST Distinguished Alumnus Award (2006), a DSc degree (Honoris Causa) from IIEST (2013), Distinguished Lecturership of IAS and IES, and a number of prize paper awards. He was elected a member of the US National Academy of Engineering. The IEEE Industrial Electronics Magazine published a special issue (June 2009) Honoring Bimal Bose and Celebrating his Contributions in Power Electronics with a cover photo. The IES Dr. Bimal Bose Energy Systems Award was established in 2014, which was funded by the IEEE Foundation and the IEEE IE Society. Dr Bose has served the IEEE in various capacities, including Member of the IEEE Awards Board, Chairman of the IEEE Medal in Power Engineering Committee, Chairman of the IEEE IES Power Electronics Council, Associate Editor of IEEE Transactions of Industrial Electronics, Member of the IEEE Fellow Committee, Vice‐Chair of the IEEE Medals Council, and Member of the Proceedings of the IEEE Editorial Board (1995–2006). He was the Guest Editor of the Proc. IEEE Special Issues on Power Electronics in Smart Grid and Renewable Energy Systems (November 2017) and Power Electronics and Motion Control (August 1994).

About the Contributors Haitham Abu‐Rub is a full professor holding two PhDs from Gdansk University of Technology (1995) and from Gdansk University (2004). Dr Abu‐Rub has extensive teaching and research experience at many universities in countries including Poland, Palestine, USA, UK, Germany, and Qatar. Since 2006, Dr Abu‐Rub has been associated with Texas A&M University at Qatar, where he is currently the chair of the Electrical and Computer Engineering program and the Managing Director of the Smart Grid Center ‐ Extension in Qatar. His main research interests are energy conversion systems, smart grid, renewable energy systems, electric drives, and power electronic converters. Dr Abu‐Rub is the recipient of many prestigious international awards and recognitions, such as the American Fulbright Scholarship and the German Alexander von Humboldt Fellowship. He has co‐authored more than 250 journal and conference papers, five books, and five book chapters. Hirofumi Akagi was born in Okayama, Japan, in 1951. He received his PhD in electrical engineering from the Tokyo Institute of Technology, Tokyo, Japan, in 1979. Since 2000, he has been Professor, currently Distinguished Professor, in the Department of Electrical and Electronic Engineering at the Tokyo Institute of Technology. Prior to that, he was with Kayama University, Okayama, Japan, and the Nagaoka University of Technology, Nagaoka, Japan. His research interests include power conversion systems and their applications to industry, transportation, and utilities. He has authored and co‐authored some 140 IEEE Transactions papers and three invited papers in the Proceedings of the IEEE in 2001, 2005, and 2017. Dr Akagi has received six IEEE Transactions Prize Paper Awards and 16 IEEE IAS Committee Prize Paper Awards. He was elected as an IEEE Fellow in 1996. He is the recipient of the 2001 IEEE PELS William E. Newell Power Electronics Award, the 2004 IEEE IAS Outstanding Achievement Award, the 2008 IEEE Richard Harold Kaufmann Technical Field Award, the 2012 IEEE PES Nari Hingorani Custom Power Award, and the 2018 IEEE Medal in Power Engineering. Dr Akagi served as the President of the IEEE Power Electronics Society for 2007–2008, and as the IEEE Division II Director for 2015–2016. xxi

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Frede Blaabjerg was with ABB‐Scandia, Randers, Denmark, from 1987 to 1988. From 1988 to 1992, he obtained a PhD in Electrical Engineering at Aalborg University. He became an Assistant Professor in 1992, an Associate Professor in 1996, and a Full Professor of power electronics and drives in 1998. From 2017 he became a Villum Investigator. He is honoris causa at University Politehnica Timisoara (UPT), Romania, and Tallinn Technical University (TTU) in Estonia. His current research interests include power electronics and its applications, such as in wind turbines, PV systems, reliability, harmonics and adjustable speed drives. He has published more than 500 journal papers in the fields of power electronics and its applications. He is the co‐author of two monographs and editor of seven books in power electronics and its applications. He has received 26 IEEE Prize Paper Awards, the IEEE PELS Distinguished Service Award in 2009, the EPE‐PEMC Council Award in 2010, the IEEE William E. Newell Power Electronics Award 2014, and the Villum Kann Rasmussen Research Award 2014. He was the Editor‐in‐Chief of the IEEE Transactions on Power Electronics from 2006 to 2012. He has been Distinguished Lecturer for the IEEE Power Electronics Society from 2005 to 2007, and for the IEEE Industry Applications Society from 2010 to 2011, as well as 2017 to 2018. In 2018 he is President Elect of the IEEE Power Electronics Society. He was nominated in 2014, 2015, 2016 and 2017 by Thomson Reuters to be one of the 250 most‐cited researchers in engineering in the world. Anjan Bose has over 40 years of experience in industry and academia, as an engineer, educator, and administrator. He is well known as a technical leader in the power grid control industry, a researcher in electric power engineering, an educator in engineering, and an administrator in higher education. He is a Regents Professor at Washington State University (WSU), where he also served as the Dean of Engineering and Architecture (1998–2005) and in 2012–13 served as a Senior Advisor to the US Department of Energy (DOE) in the Obama administration. Dr Bose is a Member of the US National Academy of Engineering (2003) and has served on many National Academy Committees. He is a founding Member of the Washington State Academy of Sciences and has been elected as its President. He is also a Foreign Fellow of the Indian National Academy of Engineering. He is a Fellow of the IEEE and is active in several international professional societies. He was the recipient of the Outstanding Power Engineering Educator Award (1994), the Third Millenium Medal (2000) and the Herman Halperin Electric Transmission & Distribution Award (2006), from the IEEE.

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He  has been recognized as a distinguished alumnus of the Indian Institute of Technology, Kharagpur (2005) and the College of Engineering at Iowa State University (1993). Bimal K. Bose (Life Fellow, IEEE) is an Emeritus Professor in the University of Tennessee, Knoxville. Early in the career, he was a faculty member in India during 1960 to 1971. From 1971 to 1976, he was an associate professor of electrical engineering at the Rensselaer Polytechnic Institute, Troy, New York. From 1976 to 1987, he was a research engineer in GE Corporate Research and Development (GE-CRD) (now GE Global Research Center), Schenectady, New York. Since 1987, he had been Endowed Chair Professor (Condra Chair of Excellence in Power Electronics) in the University of Tennessee, Knoxville until 2003. He is specialized in power electronics and motor drives. He was awarded IEEE Power Electronics Society Newell Award (2005), IEEE Millennium Medal (2000), IEEE Meritorious Achievement Award in Continuing Education (1997), IEEE Lamme Gold Medal (1996), IEEE Industrial Electronics Society (IES) Eugene Mittellmann Award (1994), IEEE Region 3 Outstanding Engineer Award (1994), IEEE Industry Applications Society (IAS) Outstanding Achievement Award (1993), GE Silver Patent Medal (1986), GE Publication Award (1985), and Calcutta University Mouat Gold Medal (1970). He also received IIEST Distinguished Alumnus Award (2006), D. Sc. Degree (Honoris Causa) from IIEST (2013), and Distinguished Lecturership of IAS and IES. He is a member of US National Academy of Engineering (2017), and Member of the Proceedings of the IEEE Editorial Board (1995–2006). He was the Guest Editor of the Proc. IEEE Special Issues on “Power Electronics and Motion Control” (August 1994) and Power Electronics in Smart Grid and Renewable Energy Systems (November 2017). Ted K. A. Brekken (Senior Member, IEEE) is a Professor in Energy Systems at Oregon State University. He received his BS, MS, and PhD from the University of Minnesota in 1999, 2002, and 2005 respectively. He studied electric vehicle motor design at Postech in Pohang, South Korea, in 1999. He also studied wind turbine control at the Norwegian University of Science and Technology (NTNU) in Trondheim, Norway, in 2004–2005 on a Fulbright scholarship. His research interests include control, power electronics and electric drives; specifically digital control techniques applied to renewable energy systems. He is co‐director of the Wallace Energy Systems and Renewables Facility (WESRF), and a recipient of the NSF CAREER award.

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About the Contributors

Aranya Chakrabortty received his PhD degree in Electrical Engineering from Rensselaer Polytechnic Institute, Troy, NY, in 2008. He is currently an Associate Professor in the Electrical and Computer Engineering department of North Carolina State University, Raleigh, NC, where he is also affiliated to the FREEDM Systems Center. His research interests are in all branches of control theory with applications to power systems, especially in wide‐area monitoring, stability, and control of large power systems using Synchrophasors. He is particularly interested in investigating different cyberphysical modeling and control challenges for the next‐generation power grid, at both transmission and distribution levels. He currently serves as an Associate Editor for the IEEE Control Systems Society Conference Editorial Board (2012–present), for IEEE Transactions on Power Systems (2018–present), and also for the IEEE Transactions on Control Systems Technology (2015–present). He has held visiting positions at University of Illinois Urbana‐Champaign, Tokyo Institute of Technology, and Osaka Prefecture University. He is a Senior Member of the IEEE. He received the NSF CAREER award in 2011. Michael W. Ellis earned a BS degree in mechanical engineering from the University of Tennessee in 1985, and MS and PhD degrees in mechanical engineering from Georgia Tech in 1993 and 1996 respectively. Dr Ellis has nearly 30 years of experience in engineering, research, and education related to the development and application of advanced energy systems. In 1996, Dr Ellis joined the faculty at Virginia Tech where he is currently an Associate Professor of Mechanical Engineering. His teaching and research focuses on the development of sustainable energy systems in general, with an emphasis on improved porous electrode materials for fuel cells and batteries. His work includes modeling of transport phenomena and electrochemical processes in fuel cell electrodes, modeling of stress/strain behavior and durability in polymer fuel cell membranes, and analysis of ­durability in commercial‐scale lithium ion batteries. He teaches undergraduate and graduate courses in thermodynamics, fuel cell systems, computer‐aided design of thermal systems, and sustainable energy systems. Prior to his academic career, Dr Ellis was a design engineer and project manager for an engineering‐ architecture firm, focusing on the design of energy systems for large commercial and industrial buildings. Dr Ellis is a former chair of ASME’s Advanced Energy  Systems Division, a Fellow of ASME, and a licensed professional engineer.

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Leopoldo G. Franquelo was born in Malaga, Spain. He received MSc and PhD degrees in electrical engineering from the Universidad de Sevilla, Seville, Spain in 1977 and 1980, respectively. He has been an Industrial Electronics Society (IES) Distinguished Lecturer since 2006, an Associate Editor for the IEEE Transactions on Industrial Electronics since 2007, Co‐Editor‐in‐Chief since 2014, and Editor‐in‐Chief since 2015. He was a Member‐at‐ Large of the IES AdCom (2002–2003), the Vice President for Conferences (2004–2007), and the President Elect of the IES (2008–2009). He was the President of the IEEE Industrial Electronics Society (2010–2011) and currently is IES AdCom Life Member. His current research interest lies in modulation techniques for multilevel inverters and their application to power electronic systems for renewable energy systems. Dr Franquelo has received a number of best paper awards from journals of the IEEE. In 2012 and 2015 he received the Eugene Mittelmann Award and the Anthony J. Hornfeck Service Award from the IES respectively. Alex Q. Huang was born in Zunyi, Guizhou, China, in 1964. He received his BSc degree from Zhejiang University, China, in 1983 and his MSc degree from Chengdu Institute of Radio Engineering, China, in 1986, both in electrical engineering. He received his PhD from the University of Cambridge, UK, in 1992. From 1992 to 1994, he was a Research Fellow at Magdalene College, Cambridge. From 1994 to 2004, he was a Professor at the Bradley Department of Electrical and Computer Engineering, Virginia Tech, Blacksburg, Virginia. From 2004 to 2017, he was the Progress Energy Distinguished Professor of Electrical and Computer Engineering at North Carolina State University, Raleigh, North Carolina. At NC State University, he led and established the NSF FREEDM Systems ERC in 2008, and the DOE PowerAmerica Institute in 2014. Since 2017, he has become the Dula D. Cockrell Centennial Chair in Engineering at the University of Texas at Austin, and director of the Semiconductor Power Electronics Center (SPEC). Since 1983, Dr Huang has been active in the development of modern power semiconductor devices and power integrated circuits. He fabricated the first IGBT power device in China in 1985 and was one of the early pioneers in developing CMOS‐ compatible high‐voltage integrated circuit (HVICs) in the early 1990s. While at Virginia Tech, he led one of the earliest developments in integrated voltage regulator (IVR) for microprocessor and POL applications. He is the inventor and key developer of the emitter turn‐off (ETO) thyristor technology that received a prestigious R&D 100 Award in 2003. His group has also recently demonstrated a world record 22 kV SiC

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ETO and the world’s first symmetric SiC GTO. In 2007, he proposed the concept of the Energy Internet as a new innovation engine for large‐scale integration of renewable and distributed energy resources. To support such a paradigm shift, he led the development of the 15 kV SiC MOSFET‐based smart solid‐state transformers as a universal interface for future grid. The smart transformer technology was named by MIT Technology Review in 2011 as one of most important technologies of the year. He has mentored and graduated more than 80 PhD and Masters students, and has p­ ublished 500 papers in international conferences and journals. He has also been granted more than 20 US patents. Dr Huang is a fellow of the IEEE and a recipient of the NSF CAREER Award and the 2013 Energy Leadership Award. His current research ­interests are smart grid, power electronics, power management microsystems, and power ­semiconductor devices. Jih‐Sheng (Jason) Lai received MS and PhD degrees in electrical engineering from the University of Tennessee, Knoxville, in 1985 and 1989 respectively. In 1989, he joined the Electric Power Research Institute (EPRI) Power Electronics Applications Center (PEAC), where he managed EPRI‐sponsored power electronics research projects. In 1993 he joined the Oak Ridge National Laboratory as the Power Electronics Lead Scientist, where he initiated a high power electronics program and developed several novel high‐power converters including multilevel converters and soft‐switching inverters. In 1996, he joined the Virginia Polytechnic Institute and State University. Currently, he is the James S. Tucker Professor at the Electrical and Computer Engineering Department, and Director of the Future Energy Electronics Center. He also holds an Honorary International Chair Professorship at National Taipei University of Technology, Taiwan, and serves as a Visiting Professor at Nanyang Technological University, Singapore, and National Chiao Tung University, Taiwan. His main research areas are in high‐efficiency power electronics conversions for high power and energy applications. He has published more than 430 refereed technical papers and two books, and received 27 patents. He received a Technical Achievement Award at a Lockheed Martin Award Night, two Journal Paper Awards, 12 Best Paper Awards from IEEE sponsored conferences, and Virginia Tech Dean’s Award on Research Excellence. He was the recipient of the 2016 IEEE IAS Gerald Kliman Innovator Award. He led the student teams to win the Top Three Finalist in Google Little Box Challenge in 2016, Grand Prize Award from International Future Energy Challenge (IFEC) in 2011, and Grand Prize Award from Texas Instruments Engibous Analog Design Competition in 2009. Dr Lai is the founding chair of the 2001 IEEE Future Energy Challenge (IFEC) and 2016 IEEE Asian Conference on Energy, Power, and Transportation Electrification (ACEPT), and General Chairs of the IEEE Workshop on Computers in Power Electronics (COMPEL 2000) and IEEE Applied Power Electronics Conference and Exposition (APEC 2005).

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Jose I. Leon was born in Cadiz, Spain. He received BS, MS and PhD degrees in telecommunications engineering from Universidad de Sevilla (US), Spain, in 1999, 2001 and 2006, respectively. Currently, he is an Associate Professor with the Department of Electronic Engineering, US. His research interests include modulation and control of power converters for high‐power applications and renewable energy systems. Dr Leon was recipient as co‐author of the 2008 Best Paper Award of the IEEE Industrial Electronics Magazine, the 2012 Best Paper Award of the IEEE Transactions on Industrial Electronics, and the 2015 Best Paper Award of the IEEE Industrial Electronics Magazine. He was the recipient of the 2014 IEEE J. David Irwin Industrial Electronics Society Early Career Award and the 2017 IEEE Bimal K. Bose Energy Systems Award. He is currently serving as an Associate Editor of the IEEE Transactions on Industrial Electronics. Ke Ma received his BSc and MSc degrees in electrical engineering from Zhejiang University, China, in 2007 and 2010 respectively. He received a PhD from Aalborg University, Denmark, in 2013, where he became an Assistant Professor in 2014. He was part‐time consultant with Vestas Wind Systems A/S, Denmark, in 2015. In 2016 he joined the faculty of Shanghai Jiao Tong University, China, as a tenure‐track Research Professor. His current research interests include power electronics and its reliability in the application of HVDC, renewable energy and motor drive systems. He is now serving as Associate Editor for two IEEE journals. In 2016 he was awarded with the “1000 Talents Plan Program for Young Professionals” of China. He received an “Excellent Young Wind Doctor Award 2014” from the European Academy of Wind Energy, and several prize paper awards from the IEEE. Mariusz Malinowski received PhD and DSc degrees in electrical engineering from the Institute of Control and Industrial Electronics, Warsaw University of Technology (WUT), Warsaw, Poland, in 2001 and 2012, respectively. He has been a Visiting Scholar at Aalborg University, Denmark; the University of Nevada, Reno, NV, USA; the Technical University of Berlin, Germany; and ETH Zurich, Switzerland. He is currently with the Institute of Control and Industrial Electronics, WUT. His current research interests include the control and modulation of grid‐side converters, multilevel converters, smart grids, and

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power‐generation systems based on renewable energies. He has co‐authored over 130 technical papers and six books. He holds two implemented patents. Prof. Malinowski was the recipient of the Siemens Prize in 2002 and 2007; the WUT President Scientific Prize in 2015; the Polish Minister of Science and the Higher Education Awards in 2003 and 2008; the Prime Minister of Poland Award for Habilitation in 2013; and the IEEE Industrial Electronics Society (IES) David Irwin Early Career Award in 2011 and Bimal Bose Energy Systems Award in 2015. His industry application received several awards and medals, the Innovation Exhibition in Geneva in 2006, and the Exhibition in Brussels ”Eureco” in 2006. Marcelo G. Molina was born in San Juan, Argentina. He received his MS degree in electronic engineering from the Universidad Nacional de San Juan (UNSJ), Argentina in 1997 and his PhD degree in electrical engineering from the UNSJ in 2004. Dr. Molina is currently a Full Professor in Power Electronics, Renewable Energy Systems and Smart Grids at the UNSJ and a Senior Researcher at the National Scientific and Technical Research Council (CONICET), Argentina, where he also holds various academic and administrative positions. From 2019 he serves as Director of the Institute of Electrical Energy (IEE), UNSJ-CONICET. Concurrently, he is Co-director of the Renewable Energies Laboratory at the IEE, Director of the Smart Grids Research Group and Director of the Binational Master Program in Intelligent Energy Systems at UNSJ-Universität Siegen, Germany. He is also a Senior Power Systems Engineering Consultant at the IEE. In all these positions, he has had extensive research, teaching, speaking and executive experience. Dr. Molina has co‐authored over 200 peer‐reviewed journal and conference publications, authored one book in the energy storage field and eight book chapters in various EE areas. His current research interests include power systems modeling, analysis and control, power electronics, smart grids, renewable generation and energy storage. Fang Z. Peng received the BS degree from Wuhan University, China, in 1983, and MS and PhD degrees, all in  electrical engineering, from Nagaoka University of Technology, Japan, in 1987 and 1990, respectively. From 1990 to 1992, he was a Research Scientist with Toyo Electric Manufacturing Co., Ltd., Tokyo, Japan, and was engaged in the R&D of active power filters, flexible AC transmission systems (FACTS), and motor drives. From 1992 to 1994, he was with the Tokyo Institute of Technology, Tokyo, Japan, as a Research Assistant Professor, where he initiated a multilevel inverter program for FACTS and a speed‐sensorless motor control project. From 1994 to 1997, he was a Research Assistant Professor with the University of Tennessee, Knoxville, TN, USA, working for the Oak Ridge National Laboratory, where from 1997 to 2000, he became

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the Lead Scientist with the Power Electronics and Electric Machinery Research Center. Since 2000, he has been with Michigan State University, where he is currently a University Distinguished Professor with the Department of Electrical and Computer Engineering. He holds more than 15 patents. Dr Peng has received many awards, including the IEEE/IAS IPCSD 2013 Gerald Kliman Innovator Award, the 2009 Best Paper Award in the IEEE Transactions on Power Electronics, the 2011, 2010, 1996 and 1995 Prize Paper Awards of the Industrial Power Converter Committee in IEEE/IAS; the 1996 Advanced Technology Award of the Inventors Clubs of America, Inc., the International Hall of Fame; the 1991 First Prize Paper Award in IEEE Transactions on Industry Applications; and the 1990 Best Paper Award in the Transactions of the IEE of Japan, the Promotion Award of the Electrical Academy. He was an IEEE TAB Awards and Recognition Committee (TABARC) member and has served the IEEE Power Electronics Society in many capacities: Chair of the Technical Committee for Rectifiers and Inverters, an Associate Editor for the IEEE Power Electronics Transactions, Region 1‐6 Liaison, Member‐at‐Large, Awards Chair, and Fellow Evaluation Committee member. Sergio Vazquez was born in Seville, Spain, in 1974. He received MS and PhD degrees in industrial engineering from the University of Seville (US) in 2006 and 2010, respectively. Since 2002, he has been in the Power Electronics Group working in R&D projects. He is an Associate Professor with the Department of Electronic Engineering, US. His research interests include power electronics systems, modeling, modulation and control of power electronics converters applied to renewable energy technologies. Dr Vazquez was recipient as co‐author of the 2012 Best Paper Award of the IEEE Transactions on Industrial Electronics and 2015 Best Paper Award of the IEEE Industrial Electronics Magazine. He is involved in the Energy Storage Technical Committee of the IEEE industrial electronics society and is currently serving as an Associate Editor of the IEEE Transactions on Industrial Electronics. Annette von Jouanne (Fellow, IEEE) received her PhD degree in electrical engineering from Texas A&M University, College Station, TX, USA. She worked with Toshiba International Industrial Division, Houston, TX, USA. She was a Professor in the School of Electrical Engineering and Computer Science, Oregon State University (OSU), Corvallis, OR, USA, for 22 years, starting in 1995. Her research interests have been in energy systems, including power electronics and power systems. With a passion for renewables, she initiated the Wave Energy Program at OSU in 1998, developing it into an

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internationally recognized, multidisciplinary program. She was also co‐director of the Wallace Energy Systems and Renewables Facility (WESRF). In August of 2017, Dr von Jouanne joined the Department of Electrical and Computer Engineering at Baylor University in Waco, TX. Dr von Jouanne has received national recognition for her research and teaching; she was a recipient of the NSF CAREER award, and she is a registered professional engineer as well as a National Academy of Engineering “Celebrated Woman Engineer”. Fei (Fred) Wang (Fellow, IEEE) received the BS degree from Xi’an Jiaotong University, Xi’an, China, and MS and PhD degrees from the University of Southern California, Los Angeles, in 1982, 1985, and 1990, respectively. He worked for GE between 1992 and 2001, as an Application Engineer in Power Systems Engineering Department, Schenectady, NY, a Senior Product Development Engineer in Industrial Systems, Salem, VA, and also as the Manager of the Electronic & Photonic Systems Technology Lab, GE Global Research Center, Niskayuna, NY, and Shanghai, China. He was a faculty member at the Center for Power Electronics Systems (CPES) at Virginia Tech, Blacksburg, VA from 2001 to 2009. From 2003 to 2009, he also served as the CPES Technical Director. Since 2009, he has been with the University of Tennessee and Oak Ridge National Lab, Knoxville, TN, as a Professor and the Condra Chair of Excellence in Power Electronics. He is a founding member and the Technical Director of the multi‐university NSF/DOE Engineering Research Center for Ultra‐wide‐area Resilient Electric Energy Transmission Networks (CURENT). His research interests include power electronics and power systems. Dr Wang has published over 400 journal and conference papers, authored one book and four book chapters, and holds 15 US patents. His achievements also include the IEEE IAS Gerald Kliman Innovation Award, seven IEEE prize paper awards, the GE Dushman Award, and three University of Tennessee Faculty Research Achievements Awards. He is a fellow of the US National Academy of Inventors. Jin Wang received a BS degree from Xi’an Jiaotong University in 1998, a MS degree from Wuhan University in 2001, and a PhD from Michigan State University, East Lansing, in 2005, all in electrical engineering. From 2005 to 2007, he worked at the Ford Motor Company as a Core Power Electronics Engineer. He joined Ohio State University in 2007 as an Assistant Professor and was promoted to Associate Professor in 2013 and full Professor in 2017. His research interests include wide bandgap power devices and their applications, high‐voltage and high‐power converter/inverters, integration of

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renewable energy sources, and electrification of transportation. Dr Wang has over 150 peer‐reviewed journal and conference publications and six patents. Dr Wang received the IEEE Power Electronics Society Richard M. Bass Young Engineer Award in 2011, the National Science Foundation’s CAREER Award in 2011, and the IEEE Will Portnoy Prize Paper Award in 2018. At Ohio State University, Dr Wang received the Ralph L. Boyer Award for Excellence in Undergraduate Teaching Innovation in 2012, the Lumley Research Award in 2013, and the Harrison Faculty Award for Excellence in Engineering Education in 2017. Dr Wang served as the General Chair and the Steering Committee Chair for the IEEE Future Energy Challenge in 2016 and 2017, respectively. Dr Wang had been an Associate Editor for the IEEE Transactions on Industry Applications from 2008 to 2014. Currently, Dr Wang serves as the Tutorial Co‐chair for the IEEE Applied Power Electronics Conference 2019, an Associate Editor for the IEEE Transactions on Power Electronics and the IEEE Journal of Emerging and Selected Topics in Power Electronics (J‐ESTPE). Dr Wang initiated and served as the General Chair for the 1st IEEE Workshop on Wide Bandgap Power Devices and Applications in 2013.

List of Abbreviations AC ACE ACT ADCP AEC AEM AFC AFE AG AGC AGM AI AN ANFIS ANGCC ANN ANPC APF ARL ART ASIC ATRU AVR BAM BESS BJT BOP BP BSB BTB BV CAES CAN CCC CC‐OTEC

alternating current area‐control‐error advanced combustion turbine acoustic Doppler current profile aluminum electrolytic capacitor anion exchange membrane alkaline fuel cell active front end asynchronous generator automatic generation control absorbed glass mat (battery) artificial intelligence advanced nuclear adaptive neuro fuzzy inference system advanced natural gas combined cycle artificial neural network active NPC active power filter Abbreviated Rule Language adaptive resonance theory application‐specific integrated circuit auto‐transformer rectifier unit automatic voltage regulator bi‐directional associative memory battery‐energy storage system bipolar junction transistor balance‐of‐plant backpropagation brain‐state‐in‐box back‐to‐back breakdown voltage compressed air energy storage cable area network capacitor‐commutated converter closed‐cycle ocean thermal energy conversion xxxiii

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List of Abbreviations

CCS CEC CFCs CFL CHB CL CM CMC CMI COA COE CPS CSC CSI CSP CT CTE CVSR DAB DAE DAFC DC DCESG DDBC DER DFIG DFIM DFOM DG DHT DM DM DMFC DMOS DoD DOE DOF DPC DSBC DSCC DSO DSP DSTATCOM

carbon capture and storage California Energy Commission chlorofluorocarbons compact fluorescent lamp cascaded H‐bridge (converter) catalyst layer common mode cascaded multicell cascaded multilevel inverter center of area cost of energy cyber‐physical system current source converter current source inverter concentrated solar power combustion turbine coefficient of thermal expansion continuously variable series reactor dual active bridge differential‐algebraic direct ammonia fuel cell direct current DC‐excited synchronous generator DC‐link double‐delta bridge‐cell distributed energy resources doubly‐fed induction generator doubly‐fed induction machine device(‐level) figure‐of‐merit distributed generation distributed hash table differential mode diffusion media direct methanol fuel cell double diffusion MOS depth of discharge US Department of Energy degree of fulfilment direct power control double‐star bridge‐cell double‐star chopper‐cell distribution system operator digital signal processor distribution static synchronous compensator

List of Abbreviations

DTC DVR EC EDLC EGS EIA EMC EMI EMS EMTP EREV ES ESS ETO EV FACTS FAD FBESS FBSOA FC FC or FLC FCEV FE FES FET FIS FiT FIT FL FLL FNN FOC FOM FPGA FRT FS FS‐IGBT FS‐MPC FTF FWD G2V GA GHG GHP

direct torque control dynamic voltage restorer evolutionary computation electric/electrochemical double‐layer capacitor enhanced geothermal system (US) Energy Information Administration electromagnetic compatibility electromagnetic interference environmental management system electromagnetic transient program extended range electric vehicle Expert Systems energy storage system(s) emitter turn‐off electric vehicle flexible alternating current transmission systems frequency and duration flow battery‐energy storage system forward biased safe operation area fuel cell flying capacitor fuel cell electric vehicle forwarding engine flywheel energy storage field effect transistor fuzzy inference system feed‐in tariff failure in time fuzzy logic frequency‐locked‐loop fuzzy neural network field oriented control figure‐of‐merit field‐programmable gate array fault‐ride‐through fuzzy system field stop IGBT finite states model predictive control front‐to‐front freewheeling diode grid‐to‐vehicle genetic algorithm greenhouse gas geothermal heat pump

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List of Abbreviations

GIC GRN GT GTO GUI HDR HEMT HESS HFET HFT HID HIL HOR HP HTS HVAC HVDC HVRT IBC IBR ICE ICT IE IG IGBT IGCT IM IPC IPFC IPM IPS ISOP JBS JFET LCC LCOE LFC LFT LFT LIB LMI LOEP LOLP LP

geomagnetic induced current general regression network gas turbine gate‐turn‐off thyristor graphical user interface hot dry rock high electron mobility transistor hybrid energy storage system(s) heterojunction field‐effect transistor high‐frequency transformer high‐intensity discharge hardware‐in‐loop hydrogen oxidation reaction high pressure high‐temperature superconductor high‐voltage alternating current high‐voltage direct current high voltage ride‐through intermediate bus converter inverter‐based resource internal combustion engine information and communication technology injection enhancement induction generator insulated‐gate bipolar transistor integrated‐gate‐commutated thyristor induction machine interphase power controller interline power flower controller interior permanent magnet integrated power system input series and output parallel junction barrier Schottky junction field effect transistor line‐commutated converter levelized cost of energy load frequency control line frequency transformer low‐frequency transformer lithium ion battery linear matrix inequality loss of energy probability loss of load probability low pressure

List of Abbreviations

LQG LQR LS‐PWM LVQN LVRT MCFC MEA MEA MF MFT MG MLP MMC MMCC MMMC MNC MNW MOCVD MOS gate MOSFET MPC MPP MPPT MTBF MTDC MVAC NEC NFV NG NGCC NLC NMC NNW NPC NPP NPT OBC OC‐OTEC OCR ODE OPF ORR OTEC OTS

linear quadratic Gaussian linear quadratic regulator level‐shifted PWM learning vector quantization network low voltage ride‐through molten carbonate fuel cell more‐electric aircraft membrane electrode assembly membership function medium‐frequency transformer microgrid multilayer perceptron modular multilevel converter modular multilevel cascade converter Marquardt modular multilevel converter metal‐nitrogen‐carbon modular neural network metal‐organic chemical vapor deposition metal‐oxide semiconductor gate metal‐oxide semiconductor field effect transistor model predictive control molypermalloy powder maximum power point tracking mean time between failure multiterminal HVDC medium‐voltage alternating current National Electric Code network function virtualization natural gas natural gas combined cycle nearest level control nickel manganese cobalt neural network neutral‐point clamped (multilevel converter) neutral‐point‐piloted (inverter) non‐punchthrough onboard charger open‐cycle ocean thermal energy conversion optical character recognition ordinary differential equation optimal power flow oxygen reduction reaction ocean thermal energy conversion operator training simulator

xxxvii

xxxviii

List of Abbreviations

OWC PADA PAFC PBI PC PC PCC PCM PCS PDC PDU PE PEI PEM PEMFC PEV PFC PFSA PGM PHEV PHS PI PI PLL PM PMSG PMSM PMU PNN PNPC POL PPMV PSB PSM PS‐PWM PSS PSU PT PTO PV PWM RACDS RBSOA RB‐IGBT RBFN

oscillating water column power analysis and data acquisition phosphoric acid fuel cell polybenzimidazole pseudo‐capacitor pulverized coal point of common coupling phase change material power conditioning system phasor data concentrator power distribution unit processing element polyetherimide polymer electrolyte membrane proton exchange membrane fuel cell plugged‐in electric vehicle power factor correction perfluorosulfonic acid platinum group metal pure/hybrid electric vehicle pumped hydro‐storage proportional‐integral (controller) proportional‐integral‐derivative (controller) phase‐locked‐loop permanent magnet permanent magnet synchronous generator permanent magnet synchronous machine phasor measurement unit probabilistic neural network passive NPC point‐of‐load parts per million by volume polysulfide bromide phase‐shift modulation phase‐shifted PWM power system stabilizer power supply unit punchthrough power take‐off photovoltaic pulse width modulation resilient AC distribution system reverse bias safe operation area reverse blocking IGBT radial basis function network

List of Abbreviations

RC RC‐IGBT RC‐IGCT RES RFB RICE RIE rms RNN RTS SBD SCES SCIG SCM SCR SCR SCSOA SDBC SDN SDP SE SG SG SHE SHM SIT SJ SLA SM SMES SOA SOC SOFC SPE SPWM SSBC SSCB SSFCL SSSC SSST SST SSTS STATCOM SVC SVC

resistor‐capacitor reverse conducting IGBT reverse conducting IGCT renewable energy sources redox flow battery reciprocating internal combustion engine reactive ion etch root mean square recurrent neural network real‐time simulator Schottky barrier diode supercapacitor energy storage squirrel‐cage induction generator staircase modulation silicon controlled rectifier (or thyristor) short‐circuit ratio short‐circuit safe operation area single‐delta bridge‐cell software defined networking semidefinite programming state estimation smart grid synchronous generator selective harmonic elimination selective harmonic mitigation static induction transistor superjunction sealed lead‐acid (battery) submodule superconducting magnetic energy storage safe operation area state‐of‐charge solid oxide fuel cell solid polymer electrolyte sinusoidal pulse width modulation single‐star bridge‐cell solid‐state circuit breaker solid‐state fault current limiter static synchronous series compensator solid‐state smart transformer solid‐state transformer solid‐state transfer switch static synchronous compensator space vector control static VAR compensator

xxxix

xl

List of Abbreviations

SVM T&D TCPST TCR TCSC TCVR TDNNW TES TF THD TOU TRU TSBC TSC TSO TSR TSSC UC UPFC UPQC UPS USC V2G VAR VLA VM VOC VR VRFB VRLA VSC VSD VSI WAMS WBG WEC WPT WRIG WTS YSZ ZCS ZCS ZEBRA ZVS

space vector modulation transmission and distribution thyristor‐controlled phase‐shifting transformer thyristor‐controlled reactor thyristor‐controlled series capacitor thyristor‐controlled voltage regulator time‐delayed neural network thermal energy storage transfer function total harmonic distortion time‐of‐use transformer rectifier unit triple‐star bridge‐cell thyristor‐switched capacitor transmission system operator thyristor‐switched reactor thyristor‐switched series capacitor ultracapacitor unified power flow controller unified power quality controller uninterruptible power supply ultra supercritical coal vehicle‐to‐grid volt ampere reactive vented lead‐acid (battery) virtual machine voltage oriented control voltage regulator vanadium redox flow battery valve‐regulated lead‐acid (battery) voltage source converter variable speed drive voltage source inverter wide‐area measurement systems wide bandgap wave energy converter wireless power transformer wound‐rotor induction generator wind turbine system yttria‐stabilized zirconia zero‐current switching zero‐current‐transition Zero Emission Battery Research Activities zero‐voltage switching

Ch a p ter 

1

Energy, Environment, Power Electronics, Renewable Energy Systems, and Smart Grid Bimal K. Bose and Fei (Fred) Wang

1.1 INTRODUCTION This introductory chapter will attempt to set the stage for the remainder of the book by providing an overview of energy, environment, power electronics, renewable energy systems, and the smart grid. The main focus of the chapter is on power electronics for renewable energy systems and smart grid, which is the theme of this book. Many of the challenges for renewable energy systems and smart grid are related to energy and environmental issues. Considering the relevance and their recent importance, these topics have been discussed in some detail. The modern renewable energy system cannot function, and the smart grid cannot be realized, without power electronics. In fact, power electronics is the most important element in these areas. An overview of power electronics [1, 2] is presented that includes power semiconductor devices, converter types, commonly used circuit topologies, converter compositions, and some of the most common power electronics applications, in particular, those related to power grids. Finally, the renewable energy system and smart grid will be considered again with those features that mainly require power electronics. The overview essentially covers the present technology, technology under research and development, as well as future trends.

1.2 ENERGY Energy is the life‐blood of human civilization and the wheel of its progress moves continuously with energy. The present global total energy generation scenario [3–7] is shown in Figure 1.1. About 86% of the total energy is generated by fossil fuels, Power Electronics in Renewable Energy Systems and Smart Grid: Technology and Applications, First Edition. Edited by Bimal K. Bose. © 2019 by The Institute of Electrical and Electronics Engineers, Inc. Published 2019 by John Wiley & Sons, Inc.

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of which 30% comes from coal, 24% from natural gas, and the remaining 32% comes from oil. About 4% of our total energy is generated in nuclear plants, and the remaining 10% comes from renewable energy sources (RES). The renewable energy segment can be subclassified as: hydroelectric, 20%; solar, 3%; wind, 11%; geothermal, 1%; and biomass (biofuels including biodiesel and ethanol, wood, biomass waste), 65%. The US total energy generation, shown in Figure 1.2, generally follows a similar pattern. It is interesting to note that the recent shale oil and natural gas revolution by hydraulic fracking is altering the energy scenario of the world, particularly that of the USA. The price of these fuels and their share of imports have decreased significantly in the USA, and in fact, shows signs that the USA may become a net energy exporter in the near future. The share of coal is also being replaced by cheaper and cleaner natural gas in energy generation. The USA has a voracious appetite for energy. Per capita energy consumption there is the highest in the world. With nearly 4.4% of world population (322 million out of 7.4 billion), the USA consumes nearly 23% of world energy, and this reflects a very high living standard (Norway now has the highest living standard, with lower per

30% Coal 32% Oil 24% Gas

10% Res

• Hydro – 20% • Solar – 3% • Wind – 11% • Geothermal – 1% • Biomass – 65% Total – 100%

4% Nuclear

Figure 1.1  Global total energy generation (2014) with the breakdown of renewable energy sources.

19% Coal 10% Res

35% Oil 28% Gas

• Hydro – 26% • Solar – 4% • Wind – 18% • Geothermal – 2% • Biomass – 50% Total – 100%

8% Nuclear

Figure 1.2  US total energy generation (2014) with the breakdown of renewable energy sources.

1.2 ENERGY

3

capita consumption of fossil fuels compared with the USA). In comparison, China (now the world’s second largest economy), with nearly 19% of the world population (1.4 billion), consumes a slightly higher total amount of energy than the USA. Of course, this scenario is changing fast due to rapid industrialization of China. Figure 1.3 shows the projected depletion curves of fossil fuel energy resources [3, 6] considering their present availability and rate of consumption. The curves plot the amount of energy (in 109 MBtu) vs. the year, and the area under each curve gives the total available energy. Of the different types of fossil fuels, the world has large reserves of coal. The coal consumption is expected to peak around 2070, and will last around 280 years. As mentioned before, the coal burning rate has decreased recently due to environmental reasons that will be discussed later. The oil and natural gas reserves are small in comparison, but are expected to last around the same period. However, there may be discoveries of new resources in the future. The Arctic Ocean is believed to contain more than 25% of the world’s oil and gas, which may be very expensive to explore. With conservation and discovery of new resources, the depletion curves in Figure 1.3 can be extended in time. The nuclear energy availability is small compared with fossil fuel energy and is not included in the figure. Again, Figure 1.3 does not include renewable energy resources, which provide another dimension of infinite and inexhaustible energy sources that are now getting increasing emphasis throughout the world. Figure 1.4 shows electricity generation by different types of fuel for several selected countries [3]: USA, Japan, China and India. In the USA, around 40% of total energy is consumed in electrical form. Of this, 39% comes from coal, 2% from oil, 27% from gas, 19% from nuclear, and the remaining 13% comes from renewable sources (mainly hydroelectric, as indicated in Figure  1.2). Japan does not have World fossil-fuels energy

300 250

109 MBtu

200 150 100 50 0

1900 1925 1950 1975 2000 2025 2050 2075 2100 2125 2150 2175 2200 2225 2250 2275 2300

Year Coal energy

Crude oil energy

Natural gas energy

Total fossil fuels energy

Figure 1.3  Projected global fossil fuel energy depletion curves. (See electronic version for color representation of this figure.)

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Chapter 1 Energy, Environment, Power Electronics, Renewable Energy Systems

USA

Japan

China

India

Coal Oil Gas Nuclear Renew Coal Oil Gas Nuclear Renew Coal Oil Gas Nuclear Renew Coal Oil Gas Nuclear Renew

39%

2% 13%

27% 19%

32%

9% 1%

44%

14%

2% 3% 2%

1% 4% 3%

77%

16% 75%

17%

Figure 1.4  Electricity generation for several selected countries (2014).

much indigenous energy resources [8], and mainly depends on imports. The recent nuclear accident in Fukushima has reduced its share from 30% to 1%, which may be revived in spite of public opposition. It is interesting to note that the world’s two fastest developing countries (China and India) mainly depend on coal. Currently the world’s energy generation scenario is changing fast because of the progressively decreasing costs of wind (typically 5 cents/kWh) and photovoltaic (typically 6 cents/kWh) energies in comparison with the cost of coal (typically 5.2 cents/ kWh) and gas (typically 10 cents/kWh) [9]. This will be further discussed later.

1.3 ENVIRONMENT 1.3.1  Environmental Pollution by Fossil Fuels Burning of fossil fuels (coal, oil and natural gas), as mentioned before, produces pollutant gases, such as SO2, CO, NOx, HC, and CO2, as shown in Figure 1.5, that cause environmental pollution problems [10–13]. Of these, SO2, CO2, HC and NOX gases mix with rainwater and cause acid rain that destroys vegetation. It also acidifies the ocean water, thus affecting marine life. Urban pollution is mainly caused by automobile exhaust gases (CO, NOX, SO2, HC and particulate matter) that are harmful for human breathing. The most dominant effect of fossil fuel burning is the global warming or climate change problems caused by greenhouse gases (GHG) (CO2, N2O, CH4 (methane), CFCs (chlorofluorocarbons), and others), because they create a “greenhouse effect” by trapping solar heat in the atmosphere. James Hansen, a

1.3 ENVIRONMENT

Coal

5

Natural gas

Oil

Pollutant gases SO2 CO CO2 NOX HC Particulate matter

Acid rain

Urban pollution

Global warming

SO2, CO2, HC, NOX

SO2, CO, NOX, HC

CO2, N2O, CH4 + others green house gases

Figure 1.5  Environmental pollution by fossil fuel burning.

NASA scientist (also an activist), first predicted global warming problems in 1988 by this greenhouse effect. The UN‐IPCC (Intergovernmental Panel for Climate Change) now predicts with 90% certainty that global warming is caused by burning of fossil fuels. The CO2 gas generated by burning of fossil fuels is the main cause due to its higher concentration in the atmosphere. Although methane is significantly more harmful than CO2, itsconcentration is low in the atmosphere and it is lighter than air. Figure 1.6 summarizes the different sources and sinks of GHGs [14]. Note that the Sun is the source of nearly all our energy. Some of this energy is absorbed, and some is reflected to maintain the heat balance and stabilize the Earth’s temperature. Besides fossil fuel burning, a considerable amount of GHG is contributed by natural sources, such as volcanic eruptions, land and ocean floor emissions, and so on. Human beings and animals exhale GHGs (human beings exhale CO2, but animals exhale CH4), but trees absorb CO2 by photosynthesis (called the carbon fertilization effect) and emit oxygen. A considerable amount of GHG is washed away by rain to raise the acidity of ocean water. A secondary cause of global warming is due to the increase in world population and large‐scale deforestation that tend to upset the natural ecological balance. In normal conditions, different natural sources and sinks of GHG maintain a stable atmospheric temperature. It is interesting to note,

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Chapter 1 Energy, Environment, Power Electronics, Renewable Energy Systems

Figure 1.6  Sources and sinks of greenhouse gases. (See electronic version for color representation of this figure.)

however, that a significant amount of greenhouse effect is caused by water vapor in the atmosphere (including the cloud effect), which maintains a bias temperature and helps to sustain plant and animal life on Earth. Global warming processes are extremely complex, and many scientific studies are now being carried out by climate scientists. Scientists have studied the historical changes in CO2 concentrations in the atmosphere, going back thousands of years into the past [10] (see Figure 1.7), and have found that the curve is cyclic in nature (called Ice Age Cycles), where the peak is nearly 280 ppmv (parts per million by volume) and the trough is near 180 ppmv. The atmospheric temperature variation (0 °C to –10 °C) is nearly proportional to this curve, as indicated in the figure. The data for Figure 1.7 were obtained by ice core studies in Antarctica by US National Science Foundation (NSF). In this study, steel tubes were inserted deep in the ice for miles to extract samples of ice that were deposited over thousands of years [14]. Layer by layer, these ice cores are like a fingerprint of atmospheric conditions, such as chemical composition, dust particle composition, air temperature, nuclear radiation, and unusual events like volcanic eruptions. The exact cause for cyclic variation of CO2 is not known. The one sure thing in Figure 1.7 is that in the past 1000 years (particularly in the post‐industrial revolution era), the CO2 concentration has increased dramatically (see upper curve)

7

1.3 ENVIRONMENT

Carbon dioxide variations

400

350

The Industrial revolution has caused a dramatic rise in CO2

350

300 1000

1200

0°C

1400 1600 Year (AD)

1800

2000

300

Ice age cycles

250

CO2 concentration (ppmv)

400

200 –10°C 400

300

200

100

0

Thousands of years ago

Figure 1.7 CO2 cycles in the atmosphere over thousands of years, highlighting the rise since the industrial revolution in 1785. (See electronic version for color representation of this figure.)

to near 400 ppmv, which is much higher than the pre‐industrial revolution peak values. Scientists now believe that this peak is due to man‐made burning of fossil fuels, and may be irreversible. The potential impact of this rise [15], as shown in Figure 1.8, in terms of a consequential rise in global temperature is dangerous.

1.3.2  Climate Change or Global Warming Problems What are the effects of global warming? Climate scientists around the world are trying to model the climate system (extremely complex) and study it using supercomputer simulations [3–14]. Figure  1.9 shows the global warming projections made by different research agencies; they have estimated that the temperature rise will typically be 2–5 °C every 100 years. The long‐term effects of climate change are very serious, and can be summarized as follows: •• Gradual melting of Arctic and Antarctic ice caps, Greenland and a large number of glaciers around the world will raise the sea‐level and cause inundation of low‐lying areas. Figure 1.10 shows the melting of the Arctic Ocean and the vanishing habitat of polar bears, and Figure 1.11 shows melting of the Morano glacier in the Andes mountains of South America [16]. The predicted sea‐level rise, as studied by the NASA/Poseidon project of NASA/JPL, is typically 1.0 inch every 10 years. The projected sea‐level rise over 100 years [3, 17] is shown in Figure 1.12. It has been estimated that, in 2006 alone, half a million square miles of Arctic ice melted, which was three times faster than that predicted by climate model studies. One possible reason for accelerated melting is that 90% of the incident heat is absorbed by water and only 10% by ice.

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Chapter 1 Energy, Environment, Power Electronics, Renewable Energy Systems

654

60% rise

300

0

CO2 11.3 billion tons/yr.

62% rise Fossil fuels

410 CO2 7.0 billion tons/yr.

Fossil fuels

World energy consumption (quadrillion btu)

600

Alternative energy sources Nuclear Hydroelectric Wind Solar Biomass Geothermal

2002

2030

Figure 1.8  Potential rise in emissions of CO2 during 2002–2030, without control of GHG. 5 2 – 5 deg. C/100 yrs.

4 3 2 1 0

–0.6 –1

1900

Temperature anomaly (°C)

CCSR/NIES CCCma CSIRO Hadley centre GFDL MPIM NCAR PCM NCAR CSM

–1 1950

2000

2050

2100

Figure 1.9  Global warming projections by different research agencies around the world, without control of GHG. See electronic version for color representation of this figure.

The Arctic Ocean is predicted to be ice‐free by 2050. Sea‐level rise has serious consequences because about 100 million people (mostly poor) live within 3 feet of sea‐level. With the present rate of global warming, it has been predicted that 50% of Bangladesh (very low‐lying ground) (Bose’s birth

1.3 ENVIRONMENT

9

Figure 1.10  The melting Arctic Ocean and vanishing habitat of polar bears.

Figure 1.11  Melting of the Morano glacier, the Andes mountains, South America.

place) will be under water in 300 years time, displacing about 75 million people. Several island nations in the Pacific Ocean (such as Tuvalu) will be under water within 100 years. It has been estimated that if all the ice in the world melts, sea‐level will rise by 210 ft and will completely immerse the island of Manhattan in New York [16, 17]. •• Severe droughts in tropical countries such as India and parts of Africa, and particularly near the equator, will damage agriculture and vegetation.

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Chapter 1 Energy, Environment, Power Electronics, Renewable Energy Systems

Figure 1.12  Sea‐level rise projections over 100 years, without control of GHG.

The UN has predicted that by 2080 India’s agricultural production will decrease by 38% due to drought, but the carbon fertilization effect will offset it  by 9%. The African countries have demanded billions of dollars compensation from Western countries, which are blamed for the global warming problems. •• The quality and quantity of fresh water supplies will deteriorate. •• The circulation of air with high moisture content will cause more hurricanes, tornadoes, heavy rains and floods, which are already evident in some parts of the world (including the USA). •• Tropical climates with more moisture will spread diseases. •• Some animal species like polar bears and penguins will become extinct because of their vanishing habitats (see Figure 1.10). Higher acidity of seawater from dissolved GHGs along with higher temperatures will threaten marine life such as corals (already evident in the Great Barrier Reef of Australia and other parts of the world). It has been predicted that even if fossil fuel burning is completely stopped today, sea‐levels are expected to rise several feet in the next 1000 years. A kind of statistical/ecological balance will tend to occur when natural carbon emissions (volcanoes, ground emission, etc.) and animal exhalation will tend to balance by the sinks due to rainwater and carbon fertilization of trees. There may be other effects of climate change which will be uncovered by further scientific studies.

1.3 ENVIRONMENT

11

1.3.3  Several Beneficial Effects of Climate Change Although climate change problems will have serious harmful effects on our society, there are also a few beneficial effects [3, 17]. As stated before, CO2 absorption by photosynthesis will tend to help nutrition of plants, but will be offset heavily by droughts. Melting of polar ice caps in the summer is opening shorter transcontinental navigation routes. For example, as shown in Figure 1.13, a new Arctic Ocean route (shown as the Northern Sea route) has opened recently that takes 35 days for a ship to travel between Dalian in China to Rotterdam in the Netherlands during summer (July to November), instead of 48 days by the Suez Canal route that is already open throughout the year [18]. As mentioned before, it is believed that more than 25% of world’s oil and natural gas resources lie beneath the Arctic Ocean. However, this exploration is very expensive. Recovery of new land due to melting of ice will enable habitation, agriculture and mining. For example, Greenland will be exposed for Nd mining, which is important for widely used high‐energy NdFeB magnets. Although cooling or air‐conditioning costs of many countries will

Figure 1.13  The shrinking Arctic Ocean trade route between China and the Netherlands. (See electronic version for color representation of this figure.)

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Chapter 1 Energy, Environment, Power Electronics, Renewable Energy Systems

increase, the heating cost of some countries in cold climates will decrease. Melting of polar ice is expected to promote fishing industries.

1.3.4  The Kyoto Protocol and Carbon Emission Control Considering the serious consequences of climate change, the United Nations (UN) called a series of international meetings over a period of time to discuss the challenges posed by climate change. Finally, as a result, an international agreement called the Kyoto Protocol or Global Climate Treaty emerged in 1997 [14]. Under this treaty, many industrialized nations were assigned quotas for GHG emissions which were essentially based on per‐capita emission of CO2. The protocol went into effect in 2005, and now has 192 member countries. However, the USA refused to participate in the Kyoto Treaty for emission control, although its per‐capita emissions are the highest in the world, as shown in Figure 1.14 [17]. It is interesting to note that although China’s per‐capita emissions are much lower than those of the USA, considering its large population and the recent trend of industrialization, the total emissions (given by the area of the rectangle) of China became higher than the USA from 2006. The USA refused to accept the emission control mandate unless China took adequate remedial measures. But China blamed the USA and other industrialized nations for creating this mess and was not willing to sacrifice its growing living standards by reducing its fossil fuel‐based energy consumption. With no remedial measures, the projected world CO2 increase for 2002–2030 is shown in Figure 1.8. 21

USA

Canada

CO2 emission/person (tons)

18 Australia

15 12 Russia

9

Japan, UK, Denmark Austria New Zealand, Italy France

6

Switzerland Mexico China

3 0

Brazil

0

700

1400

2100

2800

India

3500

Africa

4200

4900

5600

7 billion

Population (millions)

Figure 1.14  Per‐capita CO2 emission vs. population of selected countries in the world (2004) (some Middle‐Eastern countries have higher per‐capita emissions).

1.3 ENVIRONMENT

13

According to the Kyoto Treaty, a country with higher emissions can cap it by advanced technology or by purchasing credits from a country with lower emissions (called cap‐and‐trade policy). For example, the UK with higher‐than‐quota emissions can purchase credits from Brazil, which has emissions below its quota. Within a country, a quota can be assigned to an industry or individual person (or family) who can buy or sell credits to satisfy the quota. In 1990, the Clean Air Act (similar to a cap‐and‐trade policy) was enforced successfully in the USA to control power plant and automobile air pollutions. Alternatively, carbon tax can be imposed on polluters, based on a carbon tax rate (tax on CO2 emissions per ton per year). Both strategies are difficult to implement. Although many UN conferences have been held since the Kyoto Treaty and policy changes have been made, carbon emission control strategies are not working satisfactorily in the world.

1.3.5 How Can We Solve or Mitigate Climate Change Problems? The first step we can take is to promote all of our energy consumption to be in electrical form. In a large centralized fossil‐fuel based power generating station, it is somewhat convenient to apply advanced emission control standards. Since coal is a dirty fuel for environmental pollution, coal‐fired power generation can be cut down and eventually eliminated in the long run. The success of clean coal technology is not promising. CO2 capture from coal plants and underground sequestration (carbon capture and storage (CCS) strategies) is still expensive. Since trees absorb CO2, tropical rainforests (such as the Amazon rainforest) can be preserved and widespread forestation can be promoted to mitigate the global warming problems. Controlling human and other animal populations to reduce GHGs is not easy. A substantial portion of global energy demand can be met by promoting environmentally clean renewable energy sources, and the whole world is now moving in that direction. Fuel cells, although currently expensive, can be promoted if clean energy is used to generate its fuel – the H2 gas. Internal combustion engine (ICE) vehicles can be replaced by electric vehicles to substantially improve the environment, if the battery‐storage electricity is generated by renewable sources. However, if the electricity is generated by fossil fuels, the urban pollution is transferred to generating station pollution. Similarly, other fossil‐fuel based transportations (railways, ships, etc.) can be replaced by electric transportation. Promoting mass electric transportation as Japan has done will mitigate the global warming effect. A substantial amount of energy can be saved by improving efficiency in generation, transmission, distribution, and utilization of electrical energy. Finally, wastage of energy can be prevented. Typically, a third of US energy is wasted because it is cheap and people are affluent. Note that power electronics plays a significant role in renewable energy generation, transportation and energy efficiency improvement, as mentioned before, and will be further discussed later. Unfortunately, as mentioned before, the global climate control strategies are not working satisfactorily. These are progressing more or less on a voluntary basis by piecemeal efforts of different countries. Of course, further R&D is required both

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Chapter 1 Energy, Environment, Power Electronics, Renewable Energy Systems

in climate sciences and in methods of mitigation. Many countries in the world are dependent on fossil fuels. The recent glut of oil and gas from shale technology has made these fuels cheaper, promoting their increased consumption. Nuclear energy is pollution free in the traditional sense, but nuclear plants have safety problems. Improvement of safety measures means it has become more expensive in recent years. Besides, nuclear waste remains radioactive for thousands of years and there is no safe method for its disposal. For these reasons, nuclear power generation is gradually decreasing in the USA. Again, because of long‐term effects, environmental problems are not considered seriously. European countries have taken the leadership role in solving the problems, but there is not much enthusiasm in the USA. A segment of the population has tried to propagate the idea that the global warming problem is a hoax. There is also political pressure from coal, oil and gas companies. The US leadership is essential to tackling climate change problems, but recently it has gone in the opposite direction.

1.4 POWER ELECTRONICS 1.4.1  The Role of Power Electronics in Renewable Energy Systems and Grids From the previous sections, it can be clearly seen that the energy future that will help both the sustainability and environmental issues lies in renewable energy. As will be described in detail in Section  1.5, the most abundant renewable energy sources in the foreseeable future will be wind and solar energy. Modern society runs on electricity or electric energy. For wind and solar energy (or any energy sources for that matter) to be converted to electric energy, conversion equipment is needed. For wind, turbines and generators are used. However, the variable wind turbine and generator speed can lead to variable frequency and variable voltage electricity. In order to meet the grid requirement of fixed frequency of 50 or 60 Hz at certain standard voltage levels, additional electrical conversion equipment, in this case to convert variable frequency, variable voltage to a fixed frequency, fixed voltage, is required. For solar energy, photovoltaic (PV) cell‐based panels are the most popular technology to convert solar energy to electrical energy. However, PV panels produce DC power at unregulated low voltage (e.g., PV panels typically rated around 60 V). In order to meet the grid requirement for frequency and voltage, a DC‐to‐AC converter that converts DC source at various voltage levels to a fixed‐frequency, fixed‐voltage AC supply is required. In fact, all energy sources require conversion equipment to convert them into electrical energy sources at fixed frequency and voltage. For traditional electrical energy sources, thermal power (including nuclear power) is converted to electricity through steam or gas turbines and fixed speed or frequency synchronous

1.4 POWER ELECTRONICS

15

generators; and hydro‐power is converted to electricity through hydro turbines and fixed speed or frequency synchronous generators. Unlike wind and solar power conversion, no frequency conversion equipment is generally required for thermal and hydro‐power. After its generation, electric energy generally must be transferred or delivered before consumption, since the energy sources, such as thermal power plants, hydroelectric dams, and wind farms, are often some distance away from loads. The energy/power delivery is realized though the electrical power system, or grid. In addition, electrical energy needs to be controlled as well, since the energy delivery and use often require electricity in a form different from the original form generated at the source. Examples are the voltage magnitude and frequency. For long‐distance transmission, the voltage needs to be stepped up at the sending end to reduce the energy loss along the lines, and then stepped down at the receiving end for users. For many modern consumer devices, DC voltage is needed and obtained through transforming the 50 or 60 Hz utility power to DC power. Note that electric energy delivery and control is often used interchangeably with the electric power delivery and control. This is because in the modern electric power system or grid, there is still very limited energy storage and the energy generated must be consumed at the same time. Since the beginning of the electricity era, electric energy delivery and control technologies have been an essential part of electrical power systems. Many types of equipment were developed and applied for these purposes. The commonly used equipment includes transmission and distribution lines, generators (which are both for mechanical to electrical energy conversion and for control), transformers, switchgears, inductors or reactors, and capacitor banks. The traditional equipment is electromechanical or electromagnetic in nature, and all has limited control ­capability. Many cannot be controlled at all or can only be controlled to connect or disconnect with mechanical switches; others have a limited control range, such as transformers with tap‐changers. Even with fully controllable equipment such as generators, the control dynamics is relatively slow due to the electromechanical or  magnetic nature of the controller. Almost no traditional control and delivery equipment has frequency conversion capability (a rotating transformer is an exception), as needed by some loads, similar to the cases of wind and PV energy sources. To achieve frequency conversion, power electronics‐based conversion equipment can provide convenient solutions. In addition, power electronics ­converters can have many other advantages over traditional electromechanical or electromagnetic equipment. Power electronics are based on semiconductor devices. These devices are derived from transistors and diodes used in microelectronic circuits, with additional large power‐handling capability. Due to their electronic nature, power electronic devices are much more flexible and faster than their electromechanical or electromagnetic counterparts for electrical energy conversion, delivery, and control. Since the advent of power electronics in the late 1950s, they have steadily gained ground in electrical grid applications. Today, power electronics converters and

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controllers are an important part of equipment for electrical energy generation, delivery, and control, and their role is growing rapidly with the continuous improvement of power electronics technologies, as well as with emerging needs like renewable energy systems, smart grid, and electronic loads. The examples of electronic loads include motor drives, electric vehicle (EV) charging stations, data centers, LED and compact florescent lighting, and other digital systems.

1.4.2  Fundamentals of Power Electronics Power Semiconductor Devices At the heart of the power electronics conversion equipment or converters are power semiconductor devices. Different from semiconductor devices in microelectronics, the power electronic semiconductor devices only act as switches for desired control functions, such that they incur minimum losses when they are either on (closed) or off (open). As a result, the power electronics converters are basically switching ­circuits. The power semiconductor devices or switches are therefore the most important elements of the power electronics converters. Since the 1950s, many ­different types of power semiconductor devices have been invented and developed, and can be selected based upon the applications. The performance of a power semiconductor device is mainly characterized by the voltage and current ratings, conduction or on‐state loss, as well as the switching speed (or switching frequency capability) and associated switching loss. The most popular and practical types of power semiconductor devices are listed with their symbols and the state‐of‐art ratings and frequency range in Table 1.1. •• Power diode  –  a two‐terminal device with similar characteristics to diodes used in microelectronics but with higher voltage and power ratings. •• Thyristor – also called a SCR (silicon controlled rectifier). Unlike a diode, a thyristor is a three‐terminal device with an additional gate terminal. It can be TABLE 1.1  Commonly used Si‐based power semiconductor devices and their maximum ratings.

Types

Voltage

Current

Switching frequency

Max 80 kV, typical ~10ms

≈.1ms..1s..

Converter control

- PLL synchronization - αβ↔dq transformations - id- and iq current control

PLL. αβ↔dq transformations id/iq current control

Modulator

2nd level protection 6

A/D & D/A

Gate drives & device protection

VDC1 T

FB Ω1..6

l

- Modulator - Converter switching logic - 2nd level protection

Hardware control

- Stack or module assembly - Snubbers for safe commutation - Gate drives & feedbacks - 1st level device protection - A/D & D/A conversion VA/B/C (optional) - Gate drive power supply - Current and voltage sensors - AC/DC power terminals ∧ - Thermal management

≈1..10µs

Protection

Configuration & diagnostics

Switching control

Converter switching logic

A/D & D/A

≈10µs..1ms

≈0.1..1µs



Figure 1.23  Recommended control architecture for power electronics applications [44].

such as synchronous timing (phase‐locked‐loop), current and voltage ­filtering, measurements, and feedback control calculations. This layer will include the current control loop, which is independent of the application. 4.  Switching control layer: Enables the power electronics to behave as a switch‐ mode controlled source and includes modulation control and pulse generation. 5.  Hardware control layer: Manages everything specific to the power devices, such as gate drives and protection circuits. Gate drive is particularly important as it is responsible for controlling the switching action of power semiconductor switches. The above control functions are realized with control hardware and software. The system, application and converter control layers are usually implemented with software in digital controllers such as digital signal processors (DSP); the switching

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control is often implemented with digital hardware circuit, such as a field‐programmable gate array (FPGA); and the hardware control is usually implemented through an analog circuit. To realize the control functions, several important auxiliary components are needed, including sensors and auxiliary power supplies. Sensors are needed to ­provide converter operation information (e.g., voltages, currents, temperature, etc.) to the controllers. Auxiliary power supplies, which are usually AC–DC or DC–DC converters themselves, are needed to provide power needed for controller hardware and circuit boards. Note that sensors and power supplies, together with the hardware control layer circuit (e.g. gate drive), need to interface both with the power ­electronics converter main circuit, which is often at a high voltage level, and with the digital control circuit, which is at signal voltage level. Therefore, isolation is important. The isolation between the switching control layer and hardware control layer is often achieved by optical means: opto‐coupler in lower voltage, lower power (10 kV) can potentially replace Si devices in future HVDC converters, with their superior losses and switching characteristics. Cables with higher voltage ratings than today’s 525 kV are being developed to improve the voltage and power capability of VSCs. Another important technology associated with HVDC is the DC breaker. The traditional AC circuit breakers will not work for DC due to the lack of zero current crossing. A paralleled resonant circuit can be added to create zero current, or purely using a solid‐state semiconductor switch. However, the mechanical switch is too slow and the semiconductor switch has unacceptably high losses. The recently developed hybrid DC circuit breaker, as shown conceptually in Figure  1.45, can achieve both low losses and fast breaking time, which is the trend for future DC breaker development [91]. Despite many advantages, HVDC lines make up only a small portion of the transmission grid, mainly due to the high converter cost. Some alternative schemes have been proposed, including hybrid AC/DC and low‐frequency AC schemes. 1.  Hybrid AC/DC. One of the main advantages of the HVDC scheme is its superior power transmission capability over the HVAC scheme. To increase its transmission capability, an existing AC line can be converted to a DC line by fully or partially rebuilding the line and adding HVDC converter stations at both terminals. An alternative is to convert the AC line into a hybrid AC and DC line with both AC and DC currents flowing in the same line. Figure 1.46 shows a basic hybrid AC/DC scheme based on a double‐circuit, where the DC

Main solid state breaker Auxiliary solid state breaker Disconnector

Fast mechanical switch

Figure 1.45  Configuration of hybrid DC breaker.

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AC Bus 2

AC Bus 1 Transmission Line CB1

CBx

CBy

CB2

CB3

CB4

CB5

CB6

CB7

CBx

CBy

CB8

Figure 1.46  Basic scheme of hybrid AC/DC transmission (CB: circuit breaker).

current can be injected into the AC lines through the neutral point of a three‐phase transformer. With hybrid AC/DC, the total transmission power capability can be significantly increased compared with the original AC‐only transmission [92]. A special zigzag transformer is needed for DC current injection in order to avoid saturation. A small line conditioner may also be required to deal with line imbalance issues [93]. Even with the additional components required, the hybrid AC/DC scheme can still be more cost‐effective than the full HVDC conversion. 2.  Low‐frequency AC transmission. One significant issue with HVDC transmission is the lack of cost‐effective DC breakers during a DC line short‐circuit fault. Given that the power transmission capability for a long AC line is inversely proportional to the line impedance, reducing the line frequency can increase the power transfer capability, while preserving the short‐circuit current control with AC breakers. In this case, relatively low‐cost, thyristor‐ based cycloconverters can be used to convert the 50/60 Hz to below a third of the nominal frequency.

1.6.3  DC Grid and Supergrid Multiterminal HVDC Grid As mentioned previously, today’s power grids are predominantly based on interconnected HVAC lines, with limited point‐to‐point or two‐terminal HVDC lines embedded to serve certain special needs. With the development of HVDC

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technologies, especially the VSC HVDC, interest in multiterminal HVDC (MTDC) or DC grids are growing. Increased penetration of renewable energy resources has also driven the research and development of MTDC technologies. For example, with a MTDC system or a DC grid, wind energy from several distributed offshore wind farms can be transferred to multiple onshore AC grids, offering better transmission flexibility. In comparison, if relying on only point‐to‐point HVDC, each wind farm will need to have a separate HVDC link connected to an onshore AC grid. Compared with the point‐to‐point HVDC links, the MTDC offers the following merits [94]: •• Lower costs: When more than two adjacent AC systems need to be connected, MTDC provides a more economical solution than employing several point‐ to‐point HVDC links. •• Improved reliability: The faults on a point‐to‐point HVDC link can lead to significant power transfer interruption and the whole system may need to be shut down. For a MTDC network, the faulted link can be isolated by DC breakers and continuous power transfer is possible through power flow rearrangement. •• Reduced curtailment from renewable energy sources: If a renewable energy source, such as an offshore wind farm is connected to an AC grid through a point‐to‐point HVDC link, energy curtailment may be necessary to follow the load profile of the corresponding AC system. With MTDC, the surplus renewable energy can be better exchanged among different AC area systems. •• Low spinning reserve requirement: Connected with multiple renewable energy sources and AC grids through MTDC, the spinning reserve requirement for AC systems can be reduced. •• High power exchange and trading flexibility: Energy exchange and trading can be realized among multiple renewable energy sources and the AC grids they are connected to, which will help to reduce the electricity price. A MTDC system has more than two converter stations, which can be connected either in series or in parallel [95]. As shown in Figure 1.47a, in the series structure of a MTDC network (assuming four terminals), the converters are connected to form a voltage loop, and identical DC current will flow through each converter. The system is grounded at only one point, and the insulation levels for different converter stations are distinct, making insulation coordination complicated and challenging. Moreover, it is very difficult to expand an existing series‐ connected MTDC system because of the varied insulation levels. Furthermore, the entire MTDC needs to be shut down when a DC fault occurs. In contrast, the converters in a parallel MTDC system have identical voltage ratings, while their current ratings can be different based on the power needs. The parallel structure can have either radial or meshed connection, as illustrated in Figure 1.47b and c, respectively. In a radial system, disconnection of one line or converter will interrupt power flow to at least part of the grid. This type of segment

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(a) DC cable AC

+ DC –

AC DC

AC

AC DC

DC

(b) AC

AC DC

DC

AC

AC DC

DC

(c) AC

AC DC

DC

AC

AC DC

DC

Figure 1.47  A MTDC network with (a) series connection, (b) radial connection, and (c) meshed connection.

removal, however, will not cause power transfer disruption in a meshed MTDC grid, if lines, cables and converters have enough capacity. Consequently, meshed MTDC provides higher reliability and control flexibility. Compared with the series structures, the parallel structure also enables reduced control complexity and easier expansion. Hybrid connection structures have also been proposed, where several HVDC converters with relatively lower voltage ratings are first connected in series to form a string, and then the whole string can be connected to the full voltage MTDC grid with multiple paralleled strings. The scheme may be advantageous in applications like wind farms, similar to string inverters in photovoltaic cases.

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For series connections, the CSC topology is easier to implement. The DC currents in all converters will be the same and the power control can be realized through individual converter DC voltage controls. The power reversal can be realized through voltage polarity reversal. For parallel connections, the VSC ­ topology is much easier to implement. The DC voltages for all converters will be at the same level, with differences only accounting for the small voltage drops due to line resistances. The power control can be realized through individual converter current control and the power reversal can be conveniently achieved through current polarity reversal. The advantages of a MTDC grid cannot be fully realized without DC breakers or equivalent DC fault current prevention/protection equipment. At present, cost‐ effective and fast HVDC breakers are not yet available. Consequently, there have been very limited commercial MTDC projects. Table 1.8 lists all existing MTDC projects in the world [96]. The first two started from point‐to‐point links and then extended to multiterminal schemes using LCC. The second pair were built more recently as pilot projects, and adopted half‐bridge MMC as their converters. All four projects employed parallel connection. China is also planning to build the first meshed MTDC project, called the Zhangbei Project, in northern China. Supergrid The concept of the “supergrid” was first proposed in Europe as a continent‐wide solution to transfer renewable energy from remote resource locations to load centers. Some of the more abundant renewable energy resources in Europe include offshore wind in the North Sea and the Baltic Sea, solar energy around the Mediterranean Sea, and hydropower in Scandinavia and the Alps [97]. Since the existing HVAC transmission grids were not designed for high power transfer from remote regions, new transmission capabilities are needed. As these transmissions will involve long distances and offshore locations, HVDC can provide a more economical solution. In particular, MTDC grids should be employed to deal with the distributed resources and multiple connection points to existing AC grids. Another motivation for supergrid is the wide‐area energy balance to counter the intermittency of the wind and solar energy [98]. A precise definition of “supergrid” does not yet exist. It is generally understood as an “overlay” or assimilation of HVDC and HVAC networks. Tying with the existing grids, the supergrid connects and serves entire regions and markets, with the objective of integrating large‐scale renewable energy sources into the grid [99]. The supergrid can hence be characterized by: •• high flexibility in power balancing of the whole system; •• bulk power transfer capacity; •• geographically long distances between energy sources and load centers. Employing HVAC, HVDC and FACTS, the supergrid can increase transmission capacity. The overall system reliability, efficiency and economics can be improved

TABLE 1.8  Global MTDC projects.

Project

Commissioning year

Location

Terminal no.

Power transmitted

DC voltage (kV)

Italy–Corsica–Sardinia (SACOI)

Phase I: 1967 Phase II: 1988

Phase I: Sardinia, Italy Phase II: Corsica

3

200 kV

Hydro‐Quebec‐New England

Phase I: 1986 Phase II: 1992

Canada, USA

5

Nan’ao

2013

China

3

Zhoushan

2014

China

5

Dalmazio: 300 MW Codrongianos: 300 MW Lucciana: 50 MW Radisson: 2250 MW Nicolet: 2138 MW Des Cantons: 690 MW Comerford: 690 MW Sandy pond: 1800 MW JN: 100 MW QA: 50 MW SC: 200 MW ZhouShan: 400 MW Daishan: 300 MW Qushan: 100 MW Yangshan: 100 MW Sijiao: 100 MW

Topology LCC

450 kV

LCC

±160 kV

Half‐bridge MMC

±200 kV

Half‐bridge MMC

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Figure 1.48  A conceptual plan of a European supergrid [100]. (See electronic version for color representation of this figure.)

by pooling the resources of all participating parties (countries, utilities, etc.). The potential issues caused by large‐scale renewable energy fluctuation can be greatly reduced or even eliminated with wide‐area coordination. Figure 1.48 represents the conceptual supergrid in Europe [100]. This huge supergrid will link large‐scale offshore wind farms from the Baltic Sea to the Mediterranean, via the North Sea and the Atlantic. Energy from wind turbines will be transferred and distributed among countries, driving a single energy market in Europe. Some initial planning has already been developed for this European supergrid, in parallel with an ambitious plan to entirely phase out coal‐based and nuclear power, and replace them with renewable energy by 2050 [101]. The Phase I plan requires that, by 2020, the remote bulk offshore wind plants be developed and linked together to form a meshed DC grid for high reliability and control flexibility. Meanwhile, coal and nuclear power plants can be phased out. Power flow control will be implemented over the whole of Europe to balance power generation and demands from the large populated load centers. Phase II will be from 2020 to 2050, when a Europe‐wide overlay grid can be achieved through system integration. Based on DC transmission, this supergrid will link large‐scale wind farms as well as pumped hydro‐storage in the north, and bulk solar power plants in the south, then together supplying power for the European load centers. A transcontinental power

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Figure 1.49  A conceptual US HVDC supergrid by MISO [106]. (See electronic version for color representation of this figure.)

transmission system is also under consideration, which can use power from solar power plants in the deserts of northern Africa. Since the supergrid concept was proposed, several European countries have already met their 2020 renewable energy penetration targets. Overall, the share of renewables in gross final energy consumption in Europe in 2013 reached 15%, and the target set for 2020 is 20%, which is very much achievable [102]. On the other hand, the offshore wind farms grew slower than planned, due to higher costs than expected. Similar supergrid concepts have also been proposed for Asia‐Pacific and the Americas. One scheme envisions a pan‐Asia‐Pacific supergrid based on ultra‐high‐ voltage (±800 kV or higher) DC transmission grids, connecting wind farms in Siberia, Mongolia, and offshore Australia, and solar power in China and Australian deserts [103, 104]. The total power could supply the electricity needs of the whole region. In the United States, the continent‐wide DC overlay has been preliminarily investigated, with one example shown in Figure  1.49, which connects all three North American Interconnections with HVDC lines. The implementation of the supergrid, however, will face numerous challenges [105]. Technically, since it relies on DC grids, it has to overcome the same barriers that the MTDC grid faces, such as the lack of cost‐effective and fast DC circuit breakers. In addition, coordinated wide‐area control involving several system operators will require new methods, rules, and standards to ensure system reliability. Also, the societal acceptance of large grid infrastructures will be low, and the economic and environmental benefits of such an overlay grid must be clearly established to gain public support. Furthermore, a supergrid may suffer quite difficult decision‐making processes in order to satisfy all parties involved.

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1.6.4 Power Electronics for Distribution Grids Due to the rapid growth of DERs, power electronics loads, and microgrids, distribution grids are the new frontier for power electronics applications for grids. This subsection will highlight some of the power electronics technologies for distribution grids. Custom Power Parallel to FACTS technology for transmission grids, Custom Power has been proposed and developed for the distribution grid. Custom Power can be classified into three broad categories: 1.  Power flow control and interruption includes solid‐state transfer switch (SSTS), solid‐state circuit breaker (SSCB), and solid‐state fault current limiter (SSFCL). 2.  Power system conditioning and compensation includes distribution static synchronous compensator (DSTATCOM), static VAR compensator (SVC), dynamic voltage restorer (DVR), thyristor‐controlled voltage regulator (TCVR). 3.  Power quality enhancement equipment includes shunt active power filter (APF), and unified power quality controller (UPQC). Table 1.9 shows the corresponding circuit configurations for the above‐listed controllers, with their main functions, control principles and basic power electronics functions. Note the similarities between some of the Custom Power devices and the FACTS devices. Microgrids The US Department of Energy (DOE) describes a microgrid as “… a group of interconnected loads and distributed energy resources within clearly defined electrical boundaries that act as a single controllable entity with respect to the grid. A microgrid can connect and disconnect from the grid to enable it to operate in both grid‐connected or island‐mode.” Microgrids (MGs) are expected to enable grid modernization; enhance integration of distributed energy resource (DER); provide efficient, low‐cost, clean power; reduce peak loads; promote customer participation; and significantly improve reliability and resiliency of the power grid, especially during major outages [107]. Figure 1.50 illustrates a conceptual diagram of the microgrid design being developed at University of Tennessee, Knoxville. It shows the microgrid connecting to the grid through multiple points of common coupling (PCC) – one feeder serving as a primary PCC and two backups. The diagram also illustrates the concept of a central microgrid controller interfacing directly with the utility distribution management system and, through local controllers, the distributed generation and loads at the site. During an outage, the microgrid will first choose a healthy feeder to connect to, if any. With the microgrid, it is expected that the outage time of

TABLE 1.9  Common Custom Power equipment.

Controller

One‐line configuration

System functions

Control principle

Basic power electronics function

SSTS – solid‐state transfer switch

• Power supply transfer for reliability and power quality • Power flow control

On–off control of thyristors

Controlled bi‐directional AC switch

SSCB – solid‐state circuit breaker

• Protection • Power flow control

On–off control of thyristors

Controlled bi‐directional AC switch

SSFCL – solid‐state fault current limiter

• Protection • Stability enhancement

Phase angle control of thyristors

Controlled bi‐directional AC switch

SVC – static VAR compensator

• Voltage regulation and VAR compensation

VAR control through varying L & C in shunt connection

Controlled bi‐directional AC switch

DSTATCOM – Distribution static synchronous compensator

• Power enhancement • Voltage regulation and VAR compensation

VAR control through current control in shunt connection

Bi‐directional AC/DC voltage source converter

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• Power quality and stability enhancement • Power flow control • Fault current limiting

VAR control through voltage control in series connection

Bi‐directional AC/DC voltage source converter

TCVR – thyristor controlled voltage regulator

• Voltage control • Motor starter

Voltage control through on–off thyristor control, like electronic tap changer for transformer

Controlled bi‐directional AC switch

Shunt AF – shunt connected active filter

• Harmonic current filtering

Harmonic current injection through harmonic voltage control

Bi‐directional AC/DC voltage source converter

• Power flow control • Power quality enhancement • Fault current limiting

Power and VAR control through back‐to‐back converters in both series and shunt connections

Bi‐directional AC/DC voltage source converter

UPQC – unified power quality controller

Load

DVR – dynamic voltage restorer

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Chapter 1 Energy, Environment, Power Electronics, Renewable Energy Systems DMS/SCADA Local protective devices

Local controllers PV

PV

Non Critical Load

Multiple feeders

Normal open smart switch Normal closed smart switch

PCC

Microgrid central controller

Backup generator

PCC Batter Energy Storage System

Critical Load

Electrical network

Communication and control network Combined Heat andPower (CHP)

PCC

Figure 1.50  A conceptual microgrid and its controller. (See electronic version for color representation of this figure.)

critical loads will be reduced by >98% at a cost comparable to non‐integrated baseline solutions (uninterruptible power supply plus backup generator); emissions will be reduced by >20%; and the energy use efficiencies will be improved by >20%. It can clearly be seen that power electronics interface converters are present for PV and battery energy storage systems. These power converters need to operate with different grid support modes during the grid‐connected and islanded modes. More Recent Developments There are many newly emerging power electronics controllers under development to solve various issues with distribution grids. SST, mentioned earlier, is a well‐ known equipment that can help with distribution grid power flow and voltage regulation. There are also a number of so‐called grid‐edge solutions using power electronics to deal with voltage and other issues associated with roof‐top PV and other DERs.

1.7  SUMMARY AND FUTURE TRENDS The chapter discusses briefly and comprehensively the basics of energy, environment, power electronics, renewable energy systems, and smart grids. The important points are summarized here: 1.  The energy and environmental issues are extremely important today. The rising global population with an appetite for higher living standards is causing increasing energy consumption. Most of our energy comes from burning fossil fuels, which causes environmental pollution, and correspondingly ­climate change problems. These will cause serious unrest in our society. With

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determination and the united efforts of humanity, we can solve these problems. Energy and environmental issues are the main motivating factors for modern R&D on smart grid and renewable energy systems, where power electronics plays a very important role. 2.  Power semiconductors have been the main driving force for power electronics technologies. So far, Si has dominated power electronics ­converters, with devices like thyristors and IGBT. WBG SiC‐ and GaN‐based devices are the future, with their superior characteristics with lower losses, higher voltage, higher switching speed and capability, and higher temperature capability. Other attributes of the power electronics converters like passives, thermal management systems, control, and filters are also important to the overall performance and cost of the converter. 3.  Grid‐related power electronics can be classified as related to source, loads, and transmission and distribution. The grid becomes increasingly power electronics‐based due to the rapid growth of power electronics‐interfaced sources and loads. The key power electronics loads in today’s and future grids include: motor drives, lighting (fluorescent, HID, and LED lamps), EV charging stations, and data centers. 4.  Renewable energy systems, mainly wind and PV solar systems, require power electronics interfaces. The most promising energy storage systems, battery energy storage systems, also require power electronics interfaces to deal with the variability of the renewable energy sources. The key development needs for these power converters are grid‐support functions traditionally performed by rotating generators. They also need to tolerate grid conditions such as fault, imbalance, and transient overvoltages. 5.  Smart grids require more controllability and better power quality, two areas with which power electronics can help. Power electronics‐based grid controllers include more conventional FACTS and HVDC for transmission, and Custom Power for distribution. Most of these technologies are thyristor‐ based. Newer IGBT‐based and future WBG device‐based converters will enable new technologies such as SST and DC grid. Power electronics have progressed steadily since the invention of thyristors in the 1950s. The progress is in all aspects: semiconductor devices, passives, circuits, control, and system integration, leading to converter systems with better performance, higher efficiency, higher power density, greater reliability, and lower cost. Because of these developments, the power electronics applications in power systems have become more and more widespread. However, in general, power electronics controllers are still not sufficiently cost‐effective, reliable, or efficient. Many improvements are needed and expected, especially in the following areas: •• Semiconductor devices. Devices used today are almost exclusively based on silicon. The emerging devices based on wide bandgap materials such as SiC

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and GaN are expected to revolutionize power electronics with their capabilities of higher voltage, lower losses, faster switching speed, higher temperature, and smaller size. •• Power electronics converters. More cost‐effective and reliable converters will be developed as a result of better devices, passive components and circuit structures. Modular, distributed, and hybrid with non‐power‐electronics approaches are expected to result in greater benefits overall. •• Enhanced functions. Power electronics controllers can be designed to have multiple functions in the system. For example, wind and PV solar inverters can provide reactive power to the grid, in addition to transferring real energy. Today, power electronics controllers are mostly locally controlled. With better measurement and communication technologies, they may be controlled over a wide area for supporting the system‐level functions. •• New applications. The new applications for future power systems include a DC grid based on multiterminal HVDC and energy storage. Critical technologies include cost‐effective and efficient DC transformers and DC circuit breakers. Power electronics will play key roles in these technologies.

ACKNOWLEDGMENTS This work (except the Energy and Environment sections) made use of the Engineering Research Center Shared Facilities ­supported by the Engineering Research Center Program of the National Science Foundation and DOE under NSF Award Number EEC‐1041877, and the CURENT Industry Partnership Program. The authors would like to acknowledge the help and contribution of current and former CURENT ­students Shuoting Zhang, Zheyu Zhang, Yalong Li, and Xiaojie Shi.

REFERENCES [1] B. K. Bose. Modern Power Electronics and AC Drives. Upper Saddle River, NJ: Prentice‐Hall, 2001. [2] B. K. Bose. Power Electronics and Motor Drives – Advances and Trends. Burlington, MA: Academic Press, 2006. [3] B. K. Bose. “Global warming,” IEEE Ind. Electron. Mag., vol. 4, no. 1, pp. 1–17, 2010. [4] B. K. Bose. “Energy, environment and advancement of power electronics,” IEEE Trans. Power Electron., vol. 15, no. 4, pp. 688–701, July 2000. [5] B. K. Bose. “Global energy scenario and impact of power electronics in 21st century,” IEEE Trans. Ind. Electron., vol. 60, pp. 2638–2651, 2013. [6] International Energy Agency. (2016) Available online at: http://www.iea.org. [7] G. R. Davis. “Energy for planet Earth,” Sci. Amer. vol. 263, no. 3, pp. 54–62, Sept. 1990. [8] M. Negishi. “Japan’s shift to renewable energy loses spark,” Wall Street Journal, Sept. 14, 2016. [9] M. Froese. “Onshore wind and solar lead as cheapest source of new bulk power, finds BNEF,” Wind Power Engineering, November 19, 2018.

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Ch a p t e r 

2

Power Semiconductor Devices For Smart Grid And Renewable Energy Systems Alex Q. Huang

2.1 INTRODUCTION According to the Energy Information Administration [1], world energy ­consumption is projected to increase by 48% from 2012 to 2040. Unfortunately, fossil fuels are still expected to account for three‐fourths of this in 2040. This is a grand challenge issue for humanity because increased CO2 emissions will accelerate global warming and climate change. Addressing this grand challenge requires the immediate decarbonization of all energy sectors and a shift of all energy generation and delivery to clean, renewable electrical energy. This means not only that the electric power grid should be powered 100% by renewable and clean energy such as wind and solar, but the generation and delivery capacity must also increase ­dramatically to provide electrical energy to all decarbonized energy sectors such as transportation. The 100% renewable energy powered transmission and distribution scenario is currently being studied by many utilities around the world and is expected to drive the exponential growth of power electronic converters needed to interface renewable energy resources with the alternating current (AC) electric power grid. In addition to wind and solar, energy storage and electrical vehicles are the two other major drivers for increased demand for power electronic converters. In the transmission and distribution systems, increased power electronics are needed in high‐voltage direct current (HVDC) power transmission systems, FACTS devices such as SVC and STATCOM, as well as in emerging applications such as solid‐state transformers [2].

Power Electronics in Renewable Energy Systems and Smart Grid: Technology and Applications, First Edition. Edited by Bimal K. Bose. © 2019 by The Institute of Electrical and Electronics Engineers, Inc. Published 2019 by John Wiley & Sons, Inc.

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At the heart of power electronic converters are power semiconductor switch­ ing devices. They switch at a relatively high frequency (10–100 kHz) to synthesize the voltage and current wave shapes to match the source and the AC grid. Not only are higher and higher power ratings needed, but the increased demands for higher converter efficiency are also driving the incremental and revolutionary break­ through in power semiconductor technology. The efficiency improvement can be related to the reduction in the conduction and switching losses in power semicon­ ductor devices. Over the last several decades, the power conversion efficiency has been steadily increasing through the advancement of several generations of power semiconductor technology. Efficiency approaching 99% is widely achieved in PV inverters and large industry motor drives. Moving the efficiency from 99% to 99.5%, a seemingly very small step, will require the reduction of the losses by 50%! So future development focusing on power density, reliability, and cost reduction are also being considered as other major drivers for power electronics technology. The need to cover a large range of power levels also necessitates the development of power devices from a few hundred volts to more than ten thousand volts, and from a few amperes to several thousand amperes. In addition to the power level, the switching frequency of these power devices also ranges from 60 Hz to more than 1 Mz, driven by the system requirement as well as the need to improve the power density. To meet these demands, power devices based on various current conduction mechanisms have been invented and manufactured in the last six decades. The main driver behind these innovations is to obtain power devices that can conduct more current for a given chip area and breakdown voltage. This requires the improvement of the conductivity of the device when it is in the ON state or conducting state. Improving the controllability of these devices from ON state to OFF state and vice versa is another major driver behind many of the device innovations. A brief historical view of modern power semiconductor development is sum­ marized in [3]. According to [3], there have been three major waves of innovations as shown in Figure 2.1. The first wave of innovation can be called the silicon bipolar wave. It started with the invention of the first point contact transistor at Bell Lab on germanium material in 1948. Practical Si bipolar junction transistor (BJT) and the silicon controlled rectifier (SCR), or thyristor, were commercialized in 1958. This can be considered the starting point of modern solid‐state power electronics due to the practical power rating achieved by the SCR at that time. Controlled three‐ terminal switches like the BJT and the gate‐turn‐off (GTO) thyristor [4] were intro­ duced in the 1960s and 1970s for power supply and motor drive applications. In the 1980s, the second wave of innovation was characterized by the use of the metal‐ oxide semiconductor (MOS) gate as the control terminal of the power devices. The BJT was first displaced by the power MOSFET (metal‐oxide semiconductor field effect transistor) [5–6], which has better static and dynamic performance as well as a simpler MOS gate control interface. The second most important event in the 1980s was the invention and development of the insulated‐gate bipolar transistor (IGBT) [7] that capitalizes on the power MOSFET fabrication process but relies on a very different device physics in which both electrons and holes contribute to the current

2.2 POWER SEMICONDUCTOR DEVICE OPERATION IN POWER CONVERTERS

87

Third wave

Wide bandgap(WBG) SiC MOSFET SiC SBD/JBS GaN HFET

Second wave

First wave

Silicon MOSFET Silicon IGBT

Silicon thyristor Silicon GTO Si BJT PIN diode 1950 – 1980

Silicon SJ MOSFET

IGCT ETO

1980 – 1990

1990 – 2000

2000 – now

Figure 2.1  A brief history of power semiconductor development.

conduction. The IGBT has since pretty much replaced the GTO in high‐power applications. Another important innovation was the invention and development of superjunction (SJ) MOSFET in the mid‐1990s. which reduced the conduction loss of the power MOSFET below the so‐called “silicon limit” [8]. High‐power GTOs also received a much needed lift in the late 1990s by the so‐called hard‐riven GTO ­technology in the form of the integrated‐gate‐commutated thyristor (IGCT) [9] and emitter turn‐off (ETO) [10] thyristor, making them viable solutions in ultra‐high‐ power converters. The third wave of major innovations comprised the commercial introduction of the Schottky barrier diode [11], the power MOSFET [12, 13] based on wide bandgap (WBG) SiC material, and the heterojunction field‐effect transistor (HFET) based on WBG GaN/AlGaN heterojunction material [14]. This chapter intends to provide a comprehensive and comparative discussion of these important power device technologies which are critical for industrial, smart grid and r­ enewable energy applications.

2.2 POWER SEMICONDUCTOR DEVICE OPERATION IN POWER CONVERTERS 2.2.1  Commercially Available Power Semiconductor Devices A power semiconductor switch is a three‐terminal device that can either conduct a current when it is commanded ON, or block a voltage when it is commanded OFF through the control terminal. This change of conductivity is made possible in a  semiconductor switch by specially arranged device structures that control the ­carrier transportation. In three‐terminal power semiconductor switches, the third

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Chapter 2 Power Semiconductor Devices For Smart Grid SYSTEMS

terminal serves as a control terminal that utilizes small amounts of power to con­ trol the conductivity between the other two terminals. The time that it takes to change the conductivity is at the microsecond level, compared with the tens of milliseconds of a mechanical switch. Today, SiC MOSFET or GaN HFET can achieve nanosecond‐level switching speeds. By employing this kind of switch operating at a high switching frequency (from a few kHz to Mhz), a properly designed electrical system can control the flow of electric energy, shaping the electricity into desired forms. In renewable energy and smart grid applications, the most important circuits involve the transformation of a DC energy source such as PV and energy storage, to another DC voltage level or to the legacy AC grid operating at 60 Hz or 50 Hz. For single‐phase application, this means connecting to the grid at the 120 V/240 V level, or in the case of a three‐phase system, connecting to the 480 V three‐phase grid. For these reasons, power semiconductor switches that can withstand a voltage higher than 600 V are typically needed for renewable energy and smart grid applications, although lower‐voltage devices can also be used if they are isolated from the grid by a high‐frequency isolation transformer. An example is the panel level microinverter in which devices with a breakdown voltage of 200 V or lower can be used. For large renewable energy systems such as a MW‐scale solar farm, the output AC voltage is further stepped up to a much higher level such as 35 kV by a step‐up line frequency transformer (LFT). By ­utilizing multilevel power converter topology and very high voltage power devices, the solar inverter can be directly connected to the 35 kV distribution system without the LFT. These types of applications are driving the development of power devices with breakdown voltages in excess of 6.5 kV. To process the amount of renewable energy from a few hundred watts in the case of a microinverter, to a solar farm exceeding 5 MW, the current rating of the power devices ranges from a few amperes to several thousands of amperes. Although many power semiconductor switches have been developed or fabri­ cated in the past, for practical renewable energy and smart grid applications, only a few power switches are relevant because they provide the amount of power‐handling capability, switching speed and costs acceptable to the market. These switches are summarized in Table 2.1. In addition to three‐terminal switches, two‐terminal switching devices such as PN junction diodes are also widely used in power converters to serve as a unidirectional current conducting device. In this case, the conductivity is controlled directly by the direction of the current. In the forward direction, the conductivity is high, while in the reverse direction the conductivity is extremely low and stops the current flow. Two types of diode rectifier that are currently used in the marketplace are summa­ rized in Table 2.2. In all voltage source converters (VSCs), blocking only a single polarity of voltage is required while conducting current in both directions is required. So a combination of a three‐terminal unidirectional blocking switch together with an antiparallel diode is the most commonly used configuration in VSCs. In some cases, the antiparallel diode is inherently embedded in the three‐terminal switch (e.g., MOSFET), hence an externally connected diode may not be needed.

TABLE 2.1  Practical three‐terminal power switches used in renewable energy and smart grid systems.

Silicon power switch Switch

MOSFET

Switch symbol

D

SiC power switch

IGBT

Thyristor C: Collector

ID

Anode

IGCT Anode

ETO

MOSFET

Anode

D

GaN power switch HFET

ID

D

G: Gate

G

G

G

Turn-on E: Emitter

S

Gate Cathode

Gate Cathode

S

Turn-off

Cathode

S

Turn‐on signal Turn‐off signal

+15 V 0 V or −5 V

+15 V 0 V or −5 V

~100 mA −5 V*

~3 A −IAK and −18 V

~3 A 0 V

20 V −4 V

5 V 0 V or −3 V

*A thyristor cannot be turned off by the gate alone. It needs the anode‐to‐cathode current IAK to reduce to zero and the voltage VAK changes polarity from positive to negative.

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Chapter 2 Power Semiconductor Devices For Smart Grid SYSTEMS

TABLE 2.2  Practical two‐terminal power switches used in renewable energy and smart grid systems.

Silicon Switch

SiC

PN diode

Schottky diode

Switch symbol

Cathode

Anode

(+)

A

K

Symbol of a diode

(–) Schottky diode symbol

TABLE 2.3  An incomplete list of important power device parameters.

Static

Dynamic

Thermal Control

S1. Maximum current carrying capability. S2. Forward voltage drop during “ON” and its temperature dependency. S3. Leakage current during “OFF”. S4. Maximum voltage blocking capability. D1. Switching transition times during both turn‐on and turn‐off. D2. Switching losses for three‐terminal switch or reverse recovery loss for diode. D3. Controllable dI/dt or dV/dt capability during switching transition. D4. Ability to interrupt large amount of current, also known as reverse bias safe operation area (RBSOA). D5. Ability to withstand both high current and voltage simultaneously, also known as short‐circuit safe operation area (SCSOA). T1. Maximum junction temperature. T2. Junction to case thermal resistance. C1. Control power requirement and control circuit complexity.

2.2.2  Modern Power Semiconductor Device Characteristics A market‐acceptable power conversion system must have high reliability, high conversion efficiency, be small in size and low in cost. While many of these ­properties are also governed by the converter circuit topology and its associated control, the power switches play an important role in determining these system‐ level performances. As shown in Tables 2.1 and 2.2, there are many choices of power switches and diodes for a given power converter. The selected device must match the application requirements in terms of power handling capability, ­switching speed and cost. Table 2.3 summarizes some of the important parame­ ters when selecting a semiconductor switch for power conversion applications. Most of the above items can be found in a typical device datasheet provided by manufacturers, although sometimes they are listed under different names. They are divided into several main categories: static, dynamic, thermal, and control parameters. S1 to S4 are related to the static performance of a switch, or more directly the conduction loss of a switch. D1 to D5 are related to the dynamic performance of the switch, or more directly the switching loss of a switch. T1 and T2 characterize the thermal handing capability of the device. C1 applies to

2.2 POWER SEMICONDUCTOR DEVICE OPERATION IN POWER CONVERTERS

91

(a) L

ISW

IL

+ –

VO

+ VD –

VCC

SW + VSW –

ID

CO

DF

RL

(b) Control IL IL

ISW Vcc VSW

Vcc

VD

IL

ID t0

t 1 t2

t3

Switch turn-on Diode turn-off

t4 t5 t6 Switch turn-off Diode turn-on

Figure 2.2  (a) Buck converter and (b) its switching waveforms.

three‐terminal devices only, and is related to the amount of power needed to drive the control terminal at a switching frequency of fsw. An ideal power switch is considered the one that does not generate any energy losses. Since no such “ideal switch” really exists, one must carefully choose a ­suitable switch for one’s application. Generally, the power level and switching ­frequency are two major considerations in selecting a power semiconductor switch. To facilitate the discussion of the importance of the device level parameters on con­ verter operation, a Buck converter and its typical waveforms shown in Figure 2.2 are used as an example. Inductor current ripple is not shown for simplicity. There are two switches in a Buck converter: a three‐terminal switch SW and a two‐terminal freewheeling diode switch DF. The waveform after t = t6 is repeating itself and is the same as that from t0 to t6. The switch SW is switching at a constant frequency fsw

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with a controlled ON time defined by Ton = t4 − t1 or the SW duty cycle is defined as D = Ton/T where T = 1/fsw. The turn‐on and turn‐off transient times are exaggerated in Figure 2.2 for clear visualization purposes. In reality, they are much smaller than Ton. The Buck converter circuit has four different operating modes. Two of them are related to the conduction of the switches, and they are therefore closely related to the static parameters of the device and are responsible for the conduction loss. Two of them are associated with the switching of the switch from one state to another, and are therefore closely related to the dynamic parameters of the device and are respon­ sible for the switching loss. Other converter circuits also have these four modes of operation, although the duty cycle d(t) and inductor current iL(t) may both be a function of time in the case of DC to AC converters. However, these time‐varying quantities are slower than the switching period T, therefore within each switching period they can be treated as quasi‐static variables so that D = d(ti) and IL = iL(ti). Conduction Losses •• Mode 1: From t3 to t4, the SW is on and the DF is off. During this time, the major power loss is the conduction loss in switch SW and is generally expressed as d i L vF (2.1)

Pcond SW



where VF is the forward voltage drop of SW (related to Parameter S2 in Table 2.3) and IL is the average inductor current. The diode DF loss is approx­ imately zero since modern power switching produces very small leakage current (Parameter S3) as long as the device is within the acceptable temper­ ature range (Parameter T1):

Poff D F

d vCC i DF ,LKG ~ 0 (2.2)

During this time the maximum voltage on the diode is VCC, therefore VCC must be such that it is lower than the diode’s breakdown voltage BV(DF) or Parameter S4. •• Mode 2: From t0 to t1, the SW is off and the DF is on. The SW power dissipation is:

Poff SW

1 d

vCC i SW ,LKG ~ 0 (2.3)

where ISW, LKG is the leakage current of SW. The diode DF conduction loss is

Pcond D F

1 d

i L vD (2.4)

where VD is the diode forward voltage drop (Parameter S2). During this time the maximum voltage on the SW is VCC, therefore VCC must be such that it is lower than the SW’s breakdown voltage BV(SW) or Parameter S4. In Mode 1 and Mode 2, it is clear that a lower forward voltage drop will result in lower losses. The total circuit level conduction loss can be expressed as Eq. (2.5):

Pcond

d i L vF

1 d

i L vD (2.5)

2.2 POWER SEMICONDUCTOR DEVICE OPERATION IN POWER CONVERTERS

93

For devices that exhibit resistive I–V characteristics, such as a MOSFET, the conduction loss equation can also be written as

Pcond

i 2 rms ron

1 d

i L vD (2.6)

where Ron is the resistance when the switch is ON. In almost all devices, VF, Ron and VD are all functions of the device operating temperature Tj. As current increases, power dissipation increases, which increases the device temperature. Reducing conduction loss by reducing the forward voltage drop VF or VD or Ron is the most important driver in developing newer power devices for the same current and breakdown voltage levels. The maximum usable current in the SW therefore is related to the Pcond(SW), the maximum junction temperature Tj,max, the junction‐to‐ case thermal resistance Rjc, and circuit operation condition that determines the Irms. Modern silicon power devices have a maximum junction temperature of 125 °C while WBG power devices are typically limited to 175 °C. Also, there are additional losses associated with dynamic switching which should also be considered. Switching Losses •• Mode 3: From t1 to t3, the SW is being turned on and the DF is being turned off automatically as a consequence of the change of the current direction in the diode. Since the inductor behaves like a current source during this period of time, the resulting switch and diode waveforms, as shown in Figure 2.2, are called “inductive hard turn‐on”. The switching transit time for the SW is ton = t3 − t1 (Parameter D1). The reverse recover time for the diode is trr = t3 – t2 (Diode’s parameter related to D1). Diode reverse recovery loss is generated during t3 – t2 and can be approximately expressed as:

Prr

k3 Qrr vcc

fsw (2.7)

where k3 is a coefficient parameter smaller than 1 and is related to the dV/dt of the SW (parameter D3) and Qrr is the diode reverse recovery charge (Parameter D1). Diode reverse recovery also adds an additional current spike to the SW, therefore the switch’s turn‐on loss is increased by this additional diode reverse recovery current. By controlling the dI/dt of the SW turn‐on (parameter D3), the reverse recovery current can be reduced, hence the turn‐off loss of the DF is reduced. This is one of the fundamental reasons to desire a switch with dI/dt controllability (parameter D3) stated in Table 2.3. The controllability of the dV/dt during t2 to t3 allows the control of the diode loss as well as lowering the dV/dt‐generated common mode noise. These dI/dt or dV/dt controls are typi­ cally realized through the control of the gate of the power MOSFET or IGBT, and is at the expense of increased losses in the SW since the turn‐on time ton is extended. So there is a trade‐off between the switching losses and noise. •• Mode 4: From t4 to t6, the SW is being turned off and the DF is being turned on as a consequence of the SW turn‐off. The switching transit time for the SW is toff = t6 − t4 (Parameter D1). There is virtually no turn‐on loss for the

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diode DF since the diode voltage is reduced first before there is any current increase. This can also be defined as zero‐voltage switching (ZVS) turn‐on for the diode. The voltage is reduced to zero by the discharge of the junction capacitance of the diode Coss(DF) by a portion of the load current IL. In most cases, the load current is much higher than is needed for the discharge of Coss(DF) hence the majority of the current is still flowing through the SW, resulting in a substantial turn‐off loss in the switch SW. The turn‐off loss is dominated by the turn‐off time toff during which there is an overlap of voltage and current. A voltage overshot is generated by the parasitic inductance in the loop formed by the voltage source Vcc, switch SW and diode DF. The peak of this voltage is related to the Lp * dI/dt where the dI/dt is determined by the switch during time t5 to t6. Therefore controlling the dI/dt is desirable to lower this overshot voltage, in addition to reducing Lp in the first place. During t4 − t5, a high dV/dt will generate undesirable common mode noise, hence controlling dV/dt during this time is desirable. Again, there is a trade‐ off between noise and losses. Generally speaking, the switching losses in the switch and diode can be expressed as: Psw SW

k1 i L vcc ton fsw k 2 i L vcc toff fsw k 3 Qrr vcc fsw 0.5 lp i L2 fsw eoss Psw D F

k 3 Qrr vcc

fsw

(2.8)

fsw (2.9)

Parameters k1 and k2 are equal to or smaller than 0.5. The last term in Psw(SW) is related to the energy stored in the parasitic output capacitance of the switch Coss(SW) and is important if the switching frequency is high. For switches that have large amounts of current tail during the turn‐off (not shown in Figure  2.2), such as the  IGBT, manufacturers typically provide the measured energy loss Eoff in the ­datasheet. Similarly, for devices like IGBTs, there is also a large voltage tail after the device turns on (after t3 in Figure 2.2), so the manufacture typically provides the measured turn‐on energy Eon in the datasheet. In this case, the switching loss can be expressed as:

Psw SW

eon

fsw

eoff

fsw (2.10)

Here Eon and Eoff are the measured energy losses. Diode reverse recovery and the impact of the parasitic inductance Lp are typically included in the measured Eon and Eoff data. From (2.8) to (2.10), it is clear that an increase in switching frequency results in an increase in all dynamic losses. This is the limiting factor in selecting the maximum switching frequency for a given switch. Switching frequency is ­typically selected so that the conduction loss Pcond(SW) and the switching loss Psw(SW) are about the same for a given application.

2.2 POWER SEMICONDUCTOR DEVICE OPERATION IN POWER CONVERTERS

95

FBSOA, SCSOA and RBSOA In order to operate the switch at a higher switching frequency, short transition times are required in order to reduce the switching losses. These transition times are a function of the device physics (internal rate of change in conductivity) and the speed of the gate control. For unipolar power devices like the power MOSFET, the gate control is the dominating factor in determining the speed. For bipolar devices such as the IGBT, internal device physics dominates the switching physics. While short turn‐on and turn‐off times are desirable, a good switch should also be able to provide the system with an acceptable electromagnetic noise and to accommodate other switches in the same leg of a VSC. This requires controllable dI/dt and dV/dt capa­ bilities from the switch, in other words, they should have the ability to slow down. A typical turn‐on operation of a switch in a power conversion system is associated with the turn‐off process of another switch (or diode). The dI/dt is generally deter­ mined by the turn‐on switch and shared by the turn‐off switch, which may not be able to withstand the high dI/dt. For example, a silicon PN junction diode has a fundamental turn‐off reverse recovery problem indicated by a relatively large reverse recovery charge Qrr and large reverse recovery current Irr. A silicon ­controlled ­rectifier (SCR) or thyristor also has a very large reverse recovery current. A high turn‐off dI/dt may overstress and damage the diode or SCR. In a VSC such as the Buck converter shown in Figure 2.2, the diode will experience the highest instanta­ neous power stress during reverse recovery and the peak of such stress must be limited within the so‐called “reverse bias safe operation area” (RBSOA). This is illustrated in Figure  2.3. The two curves are the instantaneous voltage–current ­trajectories as the diode turns off with two different dI/dt. With a lower dI/dt, the stress is lower, hence safer for the diode. In the time domain shown in Figure 2.2, the turn‐off of the diode DF is initiated with the turn‐on of SW starting from t1. DF’s IAK

Ending point (t3)

Starting point (t1)

–BV(DF)

VAK

Lower dI/dt

Higher dI/dt

RBSOA

Current zero crossing (t2)

Irr

Irr

Figure 2.3  Diode reverse recovery trajectory and its reverse bias safe operation area (RBSOA) boundary.

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Chapter 2 Power Semiconductor Devices For Smart Grid SYSTEMS

0

20 10

–200

0

–400

–10

–600

–20

–800

–30 –40

Pin diode G5 diode 0

0.1

0.2

0.3

Diode voltage [V]

Diode current [A]

25°C

–1000 –1200 0.4

Time [μs]

Figure 2.4  Reverse recovery behavior of a fast state‐of‐the‐art 1200 V Si PIN diode and a SiC Schottky diode generation 5 (G5). VDC = 700 V. Reverse voltage applied to the diode is represented in black curves [15]. (See electronic version for color representation of this figure.)

falling dI/dt is equal to that of SW’s rising dI/dt. After t2, DF enters its reverse recovery process, experiencing its highest instantaneous power stress before its current finally goes to zero. To effectively protect the diode, the maximum turn‐on dI/dt may need to be limited. SiC diodes as shown in Table 2.2 are based on an entirely different internal current conduction mechanism (this will be discussed in more detail later in this chapter). Their Qrr or Irr are very low and can be considered zero. Therefore, the above‐discussed need to limit the dI/dt no longer applies to VSCs that use a SiC Schottky barrier diode (SBD). The case for limiting the dI/dt will come from other system requirements such as electromagnetic interference (EMI). Figure 2.4 shows a comparison of a 1200 V Si p‐i‐n diode (PIN diode) and a SiC SBD [15]. The reverse recovery current of the SiC SBD is dramatically smaller than the Si PIN diode. Today, the reverse recovery losses associated with SiC SBDs are considered to be eliminated in power converters using SiC SBDs. Similarly, a typical turn‐off operation of a switch in a power conversion cir­ cuit is associated with the turn‐on process of another switch (or diode). The dV/dt is generally determined by the turn‐off switch and shared by the turn‐on switch. The maximum dV/dt of the active switch should be limited to protect the switch itself and the associated switch from false triggering into an ON state. There is also a need to reduce dV/dt in order to reduce the common mode current through device packaging and enclosure parasitic capacitance. Both dV/dt and dI/dt controls normally require the switching device to pos­ sess a forward biased safe operation area (FBSOA). Devices with FBSOA normally have an active region in which the device current is determined by the control signal level as shown in Figure 2.5. The device current can be controlled through its gate

2.2 POWER SEMICONDUCTOR DEVICE OPERATION IN POWER CONVERTERS

97

I IG4(or VG4) or beyond IG3(or VG3) IG2(or VG2) IG1(or VG1)

V

Figure 2.5  Forward I–V characteristics of a three‐terminal switching device and its FBSOA (shaded area) definition. The control of the device may be current in the case of a BJT, or voltage in the case of a MOSFET/IGBT. 40 6th gen. dv/dt

35 Reverse-recovery dv/dt [kV/msec] @Tj = R.T., Ic = 10A

RC-IGBT dv/dt 30 25 20 15 10 5 0

0

10

20

30

40

Rg [Ω]

Figure 2.6 dV/dt control by using Rg for two types of IGBTs tested at Vcc = 600 V, Ic = 10 A, Vge = +15 V/−15 V [16].

(or base). In a typical application, the gate driver resistance Rg is selected to control the dI/dt and dV/dt. Two IGBT examples are shown in Figure 2.6 [16] and Figure 2.7 [17]. Clearly the use of a larger gate resistance decreases the dI/dt and dV/dt. It should be noted, however, that the dV/dt and dI/dt controls mean slowing down the transient process and increasing the turn‐on and turn‐off losses. Power devices shown in Table 2.1 all have a FBSOA except the thyristor and IGCT. So dI/dt control in a thyristor or IGCT will have to rely on an external dI/dt snubber, such as that shown in Figure 2.8. In this case, a series‐connected inductor Lsnubber limits the dI/dt when the IGCT is turning on. The disadvantage of this circuit, compared with the gate resistance‐based dV/dt control in IGBT, is that the stored

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Chapter 2 Power Semiconductor Devices For Smart Grid SYSTEMS

5000 FDT-IGBT

dVce/dt (V/us)

GDT-IGBT

4000

3000

2000 0

1

2

3

4

5

6

7

8

Rgoff (ohm)

Figure 2.7  Tested IGBT dI/dt control by gate resistance Rg for two different types of IGBT [17]. Lsnubber

RCl Vcc

CSM

Lp

S1

D1

D2

S2

DCl CCl

il

Figure 2.8 dI/dt snubber circuit used in IGCT converters. Inductor Lsnubber is used to limit the dI/dt for diodes D1 and D2 when either S1 or S2 turns on.

energy in the Lsnubber is dissipated in the clamp resistor Rcl. The total loss associated with the Lsnubber can be calculated as

Psnubber

0.5 lsnubber i L2

fsw (2.11)

Depending on the current level and the size of the snubber needed, this loss could be substantial and will limit the switching frequency fsw. On the other hand, the turn‐on loss Eon on the switch itself is substantially reduced when a dI/dt ­snubber is used. This is shown in Figure 2.9 where the switch turn‐on trajectories with or without a dI/dt snubber are compared. The trajectory with a dI/dt snubber is much smaller, resulting in lower turn‐on losses. So at the system level, a trade‐off ­between Psnubber and Psw(SW) needs to be made. During a typical inductive turn‐off process, the voltage of the switch will rise and its current will decrease. During the transition, the device observes both high

2.2 POWER SEMICONDUCTOR DEVICE OPERATION IN POWER CONVERTERS

99

I Without snubber INOM

With snubber

VNOM

V

Figure 2.9  Turn‐on I–V trajectories of a switch under a typical inductive load condition with or without a dI/dt snubber.

I

D

Without snubber

ID

INOM Csnubber

G

With snubber

S

VNOM

V

Figure 2.10  RBSOA of a power switch and the inductive turn‐off voltage–current trajectories with and without a turn‐off snubber.

voltage and high current simultaneously. Therefore, a switch is also subject to its RBSOA limitation. Figure  2.10 depicts the typical voltage–current trajectory of the switch as it turns off under inductive load condition, as is the case in the Buck circuit shown in Figure 2.2 or all VSC circuits. The device’s current stays constant while its voltage rises. Its current begins to decrease once its voltage reaches its nominal value. The voltage spike is caused by the dI/dt and stray inductance in the current commutation loop. On the device’s I–V plane, the curve that defines the maximum voltage and current boundary within which the device can turn off safely is referred to as the RBSOA of the device. Obviously, a device’s RBSOA should be larger than all its possible turn‐off I–V trajectories in a given application. Devices without a large enough RBSOA need an external circuit (such as an auxiliary soft‐ switching circuit or a dV/dt snubber) to shape their turn‐off I‐V trajectories to a smaller one to ensure safe turn‐off operation. Modern power devices such as the IGBT have a very large RBSOA (typically > 200% of the current rating), hence the snubber is not typically needed. Prior to IGBTs, devices such as BJTs or GTOs

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Chapter 2 Power Semiconductor Devices For Smart Grid SYSTEMS

(gate‐turn‐off thyristor) would need to have a dV/dt snubber to have a safe opera­ tion. A dV/dt snubber is simply a capacitor in parallel with the device, also shown in Figure 2.10. However, a dV/dt snubber increases the system’s component count, hence the system’s size and cost. The turn‐off operation conducted without the help of a snubber is called “snubberless turn‐off” or “hard turn‐off”, while a process with the help of a snubber is called snubbered turn‐off. The energy stored in the snubber capacitor is typically dissipated during the next cycle when the switch turns on, and this loss can be calculated as Psnubber



0.5 csnubber vcc2

fsw (2.12)

Therefore a high switching frequency cannot be used if a large snubber capacitance is used. So to summarize what has been discussed, the RBSOA is mostly used to describe a device’s maximum turn‐off capability, while FBSOA is used to measure the turn‐on capability of a device. FBSOA, as implied by its name, is also used to measure a device’s capability to withstand high voltage and high current under short‐circuit conditions. A load short‐circuit (in the case of the Buck shown in Figure 2.2, the inductor L is shorted or saturated) is a threat to the switch SW if it is ON or is turning on. A failure in diode DF or a short circuit in DF will also cause the switch to experience a short‐circuit condition. A short‐circuit can introduce an extremely high current that generates high instant power dissipation, leading to the failure of the switch. To effectively protect the switch under a short‐circuit condition, the capability to limit its maximum current at a given DC link voltage is required. In this case, the peak instant power is (VCCILIM) while for the device without this capability it is (vCC2 /r ) , where VCC is the DC voltage, ILIM is the device’s maximum current limitation, and r is the effective resistance of the switch when it is ON. Since r is normally low in a practical device, the instant power of a device under a load short‐circuit without the maximum current limiting is much higher. Figure  2.11

I

Device without current limiting capability

ILIM Device with current limiting capability

INOM

V

Figure 2.11  Forward I–V characteristics of two type of devices with / without self‐current limiting capability.

2.3  STATE‐OF‐THE‐ART POWER SEMICONDUCTORS: A COMPARISON

101

shows the I–V characteristics during the ON state for devices with or without the self‐current limitation capability. The ability for a switch to limit its maximum current regardless of the voltage applied is an effective method for limiting its instant power. A device with FBSOA capability normally has a self‐current limiting capability, hence can survive a short‐circuit fault for a short time determined by its thermal limitation. Short‐circuit SOA, or SCSOA, expressed in microseconds, is typically used to describe the short‐circuit capability of the device. IGBT power switches are typically capable of a 10 µs short‐circuit without damaging the device. Si power MOSFETs and SiC MOSFETs are also capable of providing 10 µs or more short‐circuit capability.

2.3  STATE‐OF‐THE‐ART POWER SEMICONDUCTORS: A COMPARISON A modern power semiconductor device operates between ON and OFF states at a high switching frequency. An ideal switch has zero ON state and OFF state power losses, and can switch at any frequency. Practical devices do have losses, mostly dur­ ing the ON state and during the switching transitions. To achieve the controlled ON and OFF transitions, three‐terminal switches are needed where the third terminal controls the ON/OFF transition by applying either a voltage or a current signal. Examples of current controlled devices are BJTs, thyristors, and GTO ­thyristors, and example voltage controlled switches are the MOSFET and IGBT. The insulating gate in the MOSFET and IGBT substantially reduces the driving power needed during the switching and is therefore preferred from a user point of view. Two terminal switches with unidirectional current flow capability such as a diode are also needed in modern power electronics converters. A combination of a three‐terminal switch together with an antiparallel diode creates a functional device with bidirectional current conduction capability and unidirectional voltage blocking capability. This configura­ tion is needed in almost all voltage source converters such as those used in PV, wind inverters, and EV motor drives. Advanced devices, such as reverse conducting IGBTs (RC‐IGBTs), have an internally integrated diode; therefore, no external antiparallel diode is needed. A MOSFET has an internal body diode that can be used as the free­ wheeling diode. However, the reverse recovery current of the body diode may be too high to be attractive. The situation in a SiC MOSFET is much better since its body diode has a very low reverse recovery current due to an extremely low carrier life­ time. A series connection of a three‐terminal switch and a diode allows voltage to be blocked in both directions, and this is frequently used in current source converters. Advanced devices, such as the reverse blocking IGBTs (RB‐IGBT), can block the voltage in both directions, hence the external series‐connected diode is not needed. Generally speaking, the most important specifications for any power device are its voltage and current ratings. Switching speed is another major specification that can be used to compare device capability. Devices with various voltage ratings (breakdown voltage) are developed for applications with varying voltage levels.

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For critical industry and renewable energy applications, such as PV, wind, EV and industry motor drives, power devices with breakdown voltages higher than 600 V are typically required. For power supply applications used in computers, mobile computing devices, and data centers, power devices with a voltage rating from 20 V to 600 V are typically used. Different devices are only comparable when they are designed for the same breakdown voltage, since the performance depends strongly on the voltage rating of the device.

2.3.1  Voltage Rating Modern power semiconductor devices are constructed on a substrate crystal wafer vertically, using several P‐type and N‐type semiconductor layers. Main electrical terminals are located at the two sides of the chip. The switch function can be achieved by changing the conductivity of the device from high in the ON state to low in the OFF state. In the OFF state the device’s conductivity is very low since all conducting carriers are blocked by a barrier from conducting. The device supports the high voltage within a depletion region exhibiting very low conductivity. A high electric field exists in the depletion region as well as the associated surface and edge areas during the OFF state. The voltage rating is typically defined as the breakdown voltage when the maximum electric field reaches a critical breakdown field Ec. Ec is determined by the semiconductor material in question. Electrically, a large OFF state leakage current will be observed if the breakdown is reached. The operation voltage is typically selected to be much lower than the breakdown voltage, and this derating is based on the need to tolerate transient overvoltage spikes as well as the long‐term reliability of the converter. For Si material, the critical field, Ec, is about 20 V/µm while for wider band­ gap materials, such as SiC and GaN, Ec is closer to 300 V/µm. This is graphically illustrated in Figure 2.12 for the three mentioned materials [18]. A chief advantage of using a wider bandgap material is their higher Ec as well as other preferred material properties, such as higher thermal conductivity. From the device design point of view, allowing the electric field to be distributed over a greater distance is the most frequently used method to achieve a specific breakdown voltage for a given material, since the integration of the electric field is the applied voltage. In order to reduce the surface electric field to be below Ec, a technology called junction termination [19–27] is used that aims at extending the electric field supporting area at the edge of the device to be even larger than that in the inner region of the device. A silicon thyristor with a breakdown voltage of 8000 V requires a surface depletion region of more than 1.3 mm in order to keep the surface peak electric field below 10 V/µm [28]. As a comparison, the same breakdown can be achieved in SiC material with an inner depletion thickness of less than 70 µm and a surface termina­ tion region of around 200 µm. It is, therefore, a much easier task for SiC power devices to achieve extremely high breakdown voltages. The literature has reported 27 kV SiC IGBTs [29] and 22 kV SiC GTO/ETOs [30]. These blocking voltages are far higher than any Si power devices reported [31, 32].

2.3  STATE‐OF‐THE‐ART POWER SEMICONDUCTORS: A COMPARISON

4H-SiC

Si

Low on-state losses

103

Wurtzite GaN

Critical electrical field(MV/cm) 4

High voltage capability

3 2

Electron mobility (103cm2/V-s)

Energy bandgap(eV)

1 0

High temperature operation Electron saturation velocity(107cm/s)

Thermal conductivity(W/cm-K)

Figure 2.12  The pentagon diagram showing the critical material properties important to power semiconductor devices. A larger pentagon is preferred [18]. (See electronic version for color representation of this figure.)

2.3.2  Current Rating The current rating is selected so that when the device conducts current in the ON state, the generated heat is reasonable and does not cause the device to exceed its maximum operating temperature. The motivation of device innovation is to increase the current density for a given breakdown voltage. For devices exhibiting an ohmic ON state voltage–current relationship, such as the MOSFET, the current density of the device is expressed in Eq. (2.13a), while for devices exhibiting nonlinear I–V characteristics such as a diode, thyristor or IGBT, it is expressed in Eq. (2.13b). J J

tj,max tcase rjc

sp

ron

tj,max tcase rjc

sp

vF

sp

(2.13a)

(2.13b)

Here, Rjc‐sp is the specific thermal resistance from junction to case, expressed in °C‐cm2/W, and Ron‐sp is the specific on‐resistance, expressed in ohm‐cm2. Both ­quantities are not related to the chip area. Tj,max is the maximum junction temperature of the device and Tcase is the case temperature of the packaged device. In Eq. (2.13b), VF is the ON state forward voltage drop of the device expressed in volts. From Eq.  (2.13a), it is clear that a 100‐times reduction in Ron‐sp could result in tenfold improvement in the current density of the device. On the other hand, a reduction in the forward voltage drop, VF, will directly result in an increase of the current density

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Chapter 2 Power Semiconductor Devices For Smart Grid SYSTEMS

14000 ABB 5SDD 0135Z0401 400V 13500A

Diode

12000

Current rating (A)

Diode

ABB 5SLA 3600E170300 Fuji Electric 1MBI3600VS-170E Infineon FZ3600R17HP4 1700V 3600A IGBT 5SNA3000K452300 ABB 4.5kV 3kA IGBT IGCT

ABB 5SHY 35L4522 4500V 2100A IGCT

Mitsubishi FG4000EX-50DA 2500V 1600A GTO

0

ETO

ABB 5SDD 50N5500 5kV 4570A Diode

Thyristor

IGBT

0

GTO

ABB 5SDD 54N4000 3600V 5200A Diode

4000

GTO

IGCT

ABB 5SDD 65H2400 2400V 6520A Diode

8000

2000

IGBT

ABB 5SDD 60Q2800 2kV 7385A Diode

10000

6000

Thyristor

ABB 5STP50Q1800 1800V 6100A Thyristor

2500

ABB 5STP48Y7200 7200V 4840A Mitsubishi FG4000GX-90DA 4500V 1200A GTO POWEREX RBK86525XX Mitsubishi 6500V 3200A Diode FT1500AU-240 12kV 1500A ABB 5SHY 42L6500 6500V 1290A IGCT Mitsubishi CM750HG-130R ABB 5SNA0750G650300 6.5kV 750A IGBT

NCSU ETO4045TA 4500V 1390A ETO

5000

7500

10000

12500

Voltage rating (V)

Figure 2.13  State‐of‐the‐art commercial Si power devices in terms of the upper boundary of the voltage and current ratings achieved in a single‐packaged device. The current rating shown is the DC current rating at a case temperature of 85 °C. (See electronic version for color representation of this figure.)

according to Eq. (2.13b). Higher current density, J, results in a smaller chip area, and hence lower cost, since I = J × Achip. Many device innovations that will be dis­ cussed below are related to leapfrog reduction in Ron‐sp or VF. For a given generation of technology (J is fixed), increasing the chip area Achip or parallel many devices in a module is needed in order to scale the current rating into thousands of amperes. Taking into account the manufacturing yield, the maximum chip size is typically less than 1 cm2. One way to compare state‐of‐the‐art power devices, especially their com­ mercial readiness, is to compare their absolute voltage and current ratings. This is shown in Figure  2.13 for commercially available Si power devices, and Figure  2.14 for SiC and GaN power devices. Since the current rating is deter­ mined by the underlying device technology (as suggested by Eqns (2.13a) or (2.13b)) as well as the total packaged chip area, it also represents the state‐of‐the‐ art in manufacturing and packaging technology. Figure 2.13 clearly shows that the Si thyristor and Si diode have achieved the highest voltage and current ratings due to the excellent bipolar conduction mechanisms in these two devices. These two devices are also manufactured in a single wafer using a bevel‐edge termina­ tion technology [26–28] and packaged in a so‐called press‐pak package, as shown

2.3  STATE‐OF‐THE‐ART POWER SEMICONDUCTORS: A COMPARISON

1000

Current rating (A)

BJT

Hybrid SiC module Full SiC module

POWEREX CMH1200DC-34S Fuji 2MSI1200VAT-170EC 1700V 1200A Hybrid SiC module

MITSUBISHI FMF800DX-24A 1200V 800A Full SiC module

SEMIKRON SKM260MB170SCH17 1700V 383A Full SiC module

GeneSiC GA100JT12-227 1200V 160A BJT

Thyristor

JFET

10

GeneSiC GA100JT17-227 1700V 160A BJT GeneSiC GB50SLT12-247 1200V 100A SBD

100 GaN System GS66516T 650V 60A USCi UJN1205K 1200V 38A JFET Rohm SCT3017AL 650V 118A MOSFET

105

Wolfspeed C2M0045170D 1700V 72A MOSFET

GeneSiC GA080TH65 6500V 80A Thyristor

Wolfspeed C3D25170H GeneSiC GB10MPS17-247 1700V 25A SBD Rohm SCT3022KL 1200V 95A MOSFET

GeneSiC GA01PNS80-220 8kV 2A PIN

GeneSiC GA01PNS150-220 15kV 1A PIN

PIN Diode

1 1000

10000 Voltage rating (V)

Figure 2.14  State‐of‐the‐art commercial WBG power devices in terms of the upper boundary of the voltage and current ratings achieved in a single‐packaged device. The current rating shown is the DC current rating at a case temperature of 25 °C.

in Figure 2.15. Connected in series, high‐power Si thyristors are the key device enabling ultra‐high voltage high power HVDC power stations, and the largest one has a power‐handling capability of 8 GW operating at ±800 kV [33]. For three‐terminal devices that have controlled turn‐on and turn‐off, the IGBT, GTO, IGCT, as well as the ETO have also achieved excellent power‐handling capability suitable for ultra‐high power applications. The IGBT is typically packaged in a multichip module as shown in Figure 2.15, although there is an increasing interest in press‐pak IGBT [34–37] due to improved reliability in critical applications such as VSC‐based HVDC power stations [35]. VSC‐based HVDC, which typi­ cally uses IGBT as the switching device, has reached a power rating of 3 GW operating at ±500 kV [33]. Although only introduced to the market in the last decade, SiC and GaN power devices have also made significant progress in terms of commercially avail­ able voltage and current ratings, as shown in Figure 2.14. Nevertheless, there is still a big gap in matching the current ratings of Si power devices as shown in Figure 2.13. To fill this gap, hybrid devices formed by Si IGBTs and SiC diodes are being offered [38–39] as shown in Figure 2.14 for devices at 1700 V and 1200 V levels. High‐power WBG devices above 1700 V have yet to be introduced to the market,

106

Chapter 2 Power Semiconductor Devices For Smart Grid SYSTEMS

(a)

(b)

Typical appearance

(c) Puces sur tranche silicium

Module StakPakTM

IGBT seul

Sousmodule

Figure 2.15  (a) ABB 150 mm/8.5 kV thyristor wafer and its press‐pak packaging. (b) Infineon wire bond type IGBT module. (c) ABB press‐pak IGBT.

although some low‐current devices are already available at very high voltages. Compared with SiC, GaN power devices are only available at relatively low voltage (1200 V RB‐IGBT 15 kV SiC GTO/ ETO/PIN >15 kV SiC GTO/ ETO/PIN 20–50 kV SiC thyristor 15 kV SiC IGBT/ GTO/ETO/PIN 1200–1700 V SiC MOS/JBS

15 kV SiC MOSFET/JBS diode 15 kV SiC MOS/JBS

Increase operation voltage to reduce wiring cost for ≫ MW level converter systems Reduced number of MMC cells Reduce number of devices in series Reduce devices in series Reduced number of MMC cells in >200 kV DC applications. High frequency (>50 kHz) to reduce transformer size, hence increase power density. High efficiency Simple topology to achieve medium frequency (10 to 50 kHz) and high efficiency Isolated DC/DC between MVDC and LVDC grid

141

0004339650.INDD 141

06/19/2019 3:58:48 PM

A Si power conversion system

Si devices

A SiC power conversion system

Rest of system

SiC devices

Rest of system

Saving

Figure 2.39  Potential system cost benefit from SiC devices. (See electronic version for color representation of this figure.)

SiC-solar inverter efficiencies @ varied load and Vdc

100

Efficiency (%)

99 98 97 96 95

0

10

20

30

40

50

60

70

80

90

100

Load (%) 900 Vdc

1000 Vdc

1100 Vdc

Figure 2.40  GE 1 MW SiC PV inverter installed in Berlin, and its efficiency curve [155].

2.6  SMART GRID AND RENEWABLE ENERGY SYSTEM APPLICATIONS

143

Higher voltage SiC power devices are expected to be commercially available in the near future, perhaps initially at 3.3 kV and 4.5 kV levels, in order to compete with IGBTs in existing applications. In HVDC MMC applications, the desired voltage rating should be much higher than 4.5 kV since the switching frequency is low [59], so the total number of MMC cells can be reduced. Therefore, higher voltage devices based on SiC IGBT/GTO/PIN operation should be developed in the future. This will also have a dramatic impact on several other high voltage applica­ tions such as the STATCOM and HVDC circuit breaker [120, 121]. The switching frequency in these applications does not need to be high due to large number of cascaded converter cells. High voltage and high frequency capability is needed in applications where an isolated topology is used, such as the emerging application of solid‐state transformers (SSTs) for the future smart grid [2, 74, 89]. This is in order to reduce the size of the medium‐frequency isolation transformer. GE has developed a 1 MVA solid‐state transformer based on a 15 kV/120 A SiC MOSFET module operating at 20 kHz [156]. Compared with a traditional transformer with the same rating, it facilitates a 50% reduction in size and 75% reduction in weight, while at the same time achieving 98% efficiency. Recently, a single‐phase SST for a 7.2 kV distribution grid has been developed, as shown in Figure 2.41 [147]. This SST, using

Switches and LEDs Aux input

MV AC input

LV AC output

vMV:5 kV/div

t:4 ms/div

3 vLV:500 V/div Vds_P2:5 kV/div 2

ir:10 A/div

4

Figure 2.41  A 20 kVA solid‐state transformer based on 15 kV SiC MOSFET [147].

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Chapter 2 Power Semiconductor Devices For Smart Grid SYSTEMS

a resonant AC/AC conversion topology and 15 kV SiC MOSFET at 40 kHz, achieved an efficiency of 97.5%. The steady‐state AC/AC waveforms are also shown in Figure 2.41.

2.7 CONCLUSIONS More and more energy is expected to be in the form of clean electrical energy. Efficient processing and delivery of these energies will require more and more effi­ cient power semiconductor devices that approach the “ideal” performance. Significant improvements in Si power devices have been made in the last six decades, and more are expected from this cost‐effective technology. Newer power devices based on  WBG materials (SiC and GaN) are the most exciting developments in recent years. These devices are becoming even closer to “ideal” switches. For smart grid and renewable energy applications, higher voltage and high power handling capa­ bility will be needed; hence, SiC MOSFETs and SiC JBS diodes are the preferred devices for the future. Ultra high‐voltage SiC power devices, such as SiC MOSFETs, IGBTs and GTOs, could greatly simplify existing high‐voltage converter systems, as well as enable new applications, such as the solid‐state transformer. More progress is needed to commercialize these devices and to increase their current ratings in order to challenge the dominance of Si power devices in high power applications. In addition to SiC and GaN, research is also underway to find other WBG materials and devices that can one day challenge SiC and GaN.

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C h a p t e r 

3

Multilevel Converters – Configuration of Circuits and Systems Hirofumi Akagi

3.1 INTRODUCTION Multilevel converters or, strictly speaking, multilevel voltage‐source converters, bring multilevel waveforms of voltage to their AC terminals. The prefix “multi” in the technical term “multilevel” means any positive integer more than two, in contrast to traditional two‐level voltage‐source converters. Moreover, the multilevel converters do not include any transformer for synthesizing or forming multilevel voltage waveforms, although the technical term does not include any explicit information about that. Throughout this chapter, “inverters” take the positive direction of power flow from the DC input to the AC output, whereas “rectifiers” from the AC input to the DC output. On the other hand, “converters” pay no attention to the direction of power flow, or represent direct AC‐to‐AC power conversion [1].

3.1.1  Historical Review of Multilevel Converters In 1979, Nabae, Takahashi, and Akagi invented a three‐level neutral‐point‐clamped (NPC) inverter capable of being free of simultaneous switching of two series‐ connected bipolar junction transistors (BJTs) per arm. They designed, built, and tested an adjustable‐speed motor drive that combined a three‐phase, three‐level NPC inverter using 12 BJTs, 12 freewheeling diodes, and six clamping diodes with an induction motor rated at 200 V and 2.2 kW. They presented a short paper including experimental results of the motor drive in March 1980 [2]. They then presented the full paper at the 1980 IEEE IAS Annual Meeting in October, which

Power Electronics in Renewable Energy Systems and Smart Grid: Technology and Applications, First Edition. Edited by Bimal K. Bose. © 2019 by The Institute of Electrical and Electronics Engineers, Inc. Published 2019 by John Wiley & Sons, Inc.

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was followed by its IEEE Transactions paper in September 1981 [3]. Meanwhile, Baker applied for a circuit patent including the NPC inverter topology in 1979, although he did not disclose any experimental verification in his patent [4]. Since the three‐level NPC inverter was put into practical use at the beginning of the 1990s, it has been recognized as the dawn of “classic” multilevel inverters. Nowadays, this inverter is often referred to as a three‐level diode‐clamped inverter, the naming of which comes from the use of six clamping diodes. In 1992, Meynard and Foch invented a three‐level flying‐capacitor (FLC) inverter that might be stimulated by the NPC inverter [5]. The FLC inverter is often referred to as a three‐level capacitor‐clamped inverter, where attention is paid to the special‐purpose capacitor for clamping the AC output terminal in each phase leg to half of the DC input voltage. Around 1994, Robicon Corporation, presently a part of Siemens AG, put medium‐voltage high‐power motor drives using multilevel inverters on the market [6]. The emergence of these products surprised and impressed research scientists and engineers who were engaged in research and development of medium‐voltage motor drives. The per‐phase circuit configuration of the multilevel inverter is based on the cascade connection of the AC output terminals of modular single‐phase full‐ bridge or “H‐bridge” inverter cells with pulse width modulation (PWM). This multilevel inverter has been recognized as the origin of “modern” multilevel inverters. In 1996, Lai and Peng presented a static synchronous compensator (STATCOM) for reactive‐power control in power transmission systems [7, 8]. This topology is based on the cascade connection of multiple full‐bridge or H‐bridge converter cells with staircase modulation (SCM) based on the so‐called “one‐pulse PWM.” The actual switching frequency of the one‐pulse PWM is equal to the line frequency, intended for switching‐loss reduction. In 2006, Akagi and his coauthors presented a practical paper on a three‐phase STATCOM with phase‐shifted‐carrier PWM at the 2006 IEEE IAS Annual Meeting, followed by its IEEE Transactions paper [9]. The STATCOM used a cascaded multilevel converter with star connection as a main power circuit. Experimental waveforms obtained from a three‐phase downscaled STATCOM rated at 200 V and 10 kVA were included to verify the validity and effectiveness of voltage‐balancing control of all the floating or flying DC capacitors. Hierarchical control was introduced to the voltage-balancing control, in which inter-cluster balancing control was integrated into the middle layer. From 2003 to 2005, Marquardt and his coauthors presented a series of innovative papers on high‐power conversion systems intended for applications to HVDC (high‐voltage direct current) transmission systems [10–13] (see Figures 3.8b and 3.10). They named the power conversion systems as “modular multilevel converters (MMCs)” and gave a lucid description of both circuit configurations and operating principles. However, they disclosed neither experimental result nor waveform, and made no description of realizing not only capacitor‐voltage balancing but also pulse width modulation. In 2008, Akagi and his co‐author presented a seminal paper on an MMC or, strictly speaking, a DSCC (double‐star chopper‐cell) inverter with phase‐shifted‐carrier PWM

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at the last IEEE PESC [14], followed by its IEEE Transactions paper [15]. They defined a “circulating” current from the positive and negative arm currents in a phase leg of the DSCC inverter, and introduced it to the control system. This led to success in achieving capacitor‐voltage balancing. In addition, the paper provided experimental verification of the effectiveness and validity of the capacitor‐voltage balancing. In 2009, a few research papers on MMCs or DSCC converters were presented [16, 17]. However, these papers made no description of capacitor‐voltage balancing, and disclosed neither experimental result nor waveform. Since 2010, many scientists and engineers in academia and industry have been doing further research on MMCs or DSCC converters. Nowadays, high‐voltage, high‐power DSCC converters are finding a good market for long‐distance HVDC transmission systems and asynchronous inter‐ties between two AC grids with the same or different line frequencies.

3.1.2  Overview of Chapter 3 This chapter includes an extensive description of multilevel converters, putting emphasis on circuits and systems, as well as applications. It starts with three‐level NPC and neutral‐point‐piloted (NPP) inverters, and three‐level and four‐level FLC inverters, followed by the modular multilevel cascade converter (MMCC) family. Then it provides an intensive discussion on circuits and systems of the following two grid‐tied applications: the first is a three‐phase transformerless STATCOM based on one family member for industrial and utility distribution systems; the other is a back‐to‐back (BTB) system based on another family member for an asynchronous inter‐tie between two transmission power systems. Finally, this chapter gives a detailed description of circuits and systems of electric motor drives based on two different multilevel converters. Attention is paid to differences in motor‐driving performance between the two converters. Three downscaled systems were designed, built and tested to verify their practicability and effectiveness. Experimental waveforms obtained from the downscaled systems are included to reveal the prominent individualities of the two converters.

3.2  MULTILEVEL NPC and NPP INVERTERS This section discusses three‐level neutral‐point‐clamped (NPC) and neutral‐point‐ piloted (NPP) inverters, followed by a comparison of two three‐level inverters from a practical point of view. Then, it extends the three‐level NPC inverter to a five‐level NPC inverter equipped with a DC‐voltage‐balancing circuit.

3.2.1  Circuits of Three‐Level NPC and NPP Inverters Figure 3.1 shows the following two circuit configurations on a per‐leg basis: the three‐level NPC inverter in (a), and the three‐level NPP inverter in (b), where an insulated‐gate bipolar transistor (IGBT) is used as a switching device. Historically,

156 (a)

Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

(b)

Figure 3.1  Per‐leg circuit configurations of (a) the three‐level neutral‐point‐clamped (NPC) inverter [3], and (b) the neutral‐point‐piloted (NPP) inverter [19, 20].

the authors of [3] made an in‐depth description of topology, control, and verification of the three‐phase NPC inverter. In addition, they introduced the three‐phase NPP inverter resulting from the NPC inverter. Holtz built and tested a prototype of the NPP phase leg, using thyristors in 1977 [18]. Since the thyristor‐based NPP phase leg needs a forced‐commutation technique, it looks much more complicated in circuit configuration than the IGBT‐based NPP phase leg shown in Figure 3.1b. The authors of [19] named this topology the “NPP inverter” for the first time, applying it to high‐speed motor drives. The naming was also used in [20]. At present, the three‐level NPP inverter is often referred to as an “advanced NPC” inverter, a neutral-point-switched (NPS) inverter, or a “T‐type NPC” inverter.

3.2.2 Principles of the Three‐Level NPC and NPP Inverters Figure 3.2 shows five operating modes in the three‐level NPC inverter phase leg, making the following assumptions: •• The mid‐point voltage of the two split DC capacitors with respect to the negative DC‐link bus is regulated to a constant value of E, that is, half of the DC‐link voltage 2E. •• The positive direction of the AC current is defined from the AC terminal X to a load terminal that is not shown in Figure 3.2. Modes I, III, and V are the main players, whereas modes II and IV are the supporting players. Where the latest IGBTs are available on the market, an actual operating time during modes II and IV is currently in the range of 2–20 µs, depending on the voltage and current ratings of the IGBTs. Generally, the period of time in either mode II or IV is referred to as a “dead time” or “blanking time.” As a result, the AC

3.2  MULTILEVEL NPC and NPP INVERTERS

(a)

(b)

(c)

E

E

E

X vXM

M

E

X vXM

M

(d)

(e)

E

E

E

X vXM

M

E

E

M

157

X vXM

M

X vXM

E

Figure 3.2  Five operating modes in a phase leg of the three‐phase three‐level NPC inverter, where X = u, v, and w. (a) Mode I, where vXM = E. (b) Mode II, where vXM = 0 or E. (c) Mode III, where vXM = 0. (d) Mode IV, where vXM = −E or 0. (e) Mode V, where vXM = −E.

terminal voltage with respect to the mid‐point of the two split DC capacitors, vXM, depends on the polarity of the AC current. To avoid simultaneous switching of two IGBTs, the NPC inverter takes the following sequence of the modes: mode I ⇔ mode II ⇔ mode III ⇔ mode IV ⇔ mode V. Attention is paid to the transition from mode I to mode III in the following. During mode I, both the top and second‐top IGBTs remain turned on, so that vXM is equal to E, independent of the polarity of the AC current. Note that saturation/forward voltages or on‐state voltages are neglected from the IGBTs and its freewheeling diodes. After the top IGBT is turned off to execute the transition to mode II, two possible current paths exist, as shown in Figure 3.2b. Thus, vXM can take either 0 or E, depending on the polarity of the AC current. After a passage of dead time in the range of 2–20 µs, the second‐bottom IGBT is turned on to complete the tradition to mode III. As a result, vXM is equal to 0, independent of the polarity of the AC current. Practical advantages of the three‐level NPC inverter, as well as differences from a traditional two‐level inverter, can be summarized as follows: •• The three‐level inverter takes values of E, 0, or − E at the AC terminal of each phase leg, whereas the two‐level inverter takes either E or − E. •• When the three‐level and two‐level inverters use IGBTs with the same voltage rating, the three‐level inverter can produce a double AC voltage.

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•• The three‐level inverter has the following welcome advantage: the four IGBTs, the four freewheeling diodes, and the two clamping diodes have the same voltage rating in each phase leg. •• When each phase arm consists of two series‐connected IGBTs in the two‐ level inverter, it can produce a double AC voltage. However, it has to put up with simultaneous switching of the two series‐connected IGBTs. •• No simultaneous switching is required for the three‐level inverter as long as mode II is always inserted in the transition between modes I and III, and mode IV between modes III and V. From a practical point of view, the NPC inverter should give care to “floating” in the mid‐point voltage of the two split DC capacitors. Acceptable tolerances in active and passive components, and control may produce a DC bias in the mid‐point voltage if no negative feedback loop exists on the mid‐point voltage. The three‐ phase NPC inverter consisting of three phase legs has 27 (= 33) switching states resulting from all the combinations of three main operating modes per phase leg. The authors of [21] made a detailed description of how to choose the most appropriate switching state from moment to moment out of the 27 switching states. Their approach based on space‐vector theory can bring three‐phase five‐level (line‐to‐ line) voltage waveforms to the AC terminals, eliminating the DC bias from the mid‐point voltage. For example, a switching state of vuM = E, vvM = 0, and vwM = 0 produces the same three‐phase line‐to‐line voltages as another switching state of vuM = 0, vvM = −E, and vwM = −E under the same three‐phase AC currents. Which switching state is chosen, the former or the latter, determines whether the mid‐point current flows into the mid‐point M, or flows out of it [21]. Figure 3.3 shows four operating modes in a phase leg of the three‐level NPP inverter. Modes I, III, and IV are the main players, whereas mode II is the supporting player. To avoid simultaneous switching of two IGBTs, the NPP inverter takes the following sequence of the modes: mode I ⇔ mode II ⇔ mode III ⇔ mode II ⇔ mode IV. The three‐phase NPC and NPP inverters are the same in the waveform of vXM during the three main modes. However, the supporting modes II and IV in the NPC inverter are different in the waveform of vXM from the supporting mode II in  the NPP inverter, as shown in Figure  3.3. Like the NPC inverter, the NPP inverter  should give care to “floating” in the mid‐point voltage of the two split DC capacitors.

3.2.3  Comparisons Between the Three‐Level NPC and NPP Inverters The NPC and NPP inverters look slightly different in topology. However, they are almost the same in operation, control, and waveform. The NPC and NPP inverters have the following advantages over a two‐level inverter that consists of two series‐ connected IGBTs per arm without the two clamping diodes shown in Figure 3.1a:

3.2  MULTILEVEL NPC and NPP INVERTERS

(a)

(b)

E

E M

X

M

vXM

E

E

(c)

(d)

E

E M

X

M

vXM E

159

X vXM

X vXM

E

Figure 3.3  Four operating modes in a phase leg of the three‐phase three‐level NPP inverter, where X = u, v, and w. (a) Mode I, where vXM = E. (b) Mode II, where vXM = −E or E. (c) Mode III, where vXM = 0. (d) Mode IV, where vXM = −E.

•• Each phase leg in the NPC and NPP inverters brings a three‐level voltage to the AC terminals. This means that a voltage step at the AC terminals in the NPC and NPP inverters is always half of that in the two‐level inverter. Strictly speaking, however, the NPP and two‐level inverters produce the same voltage step during the period of their dead time. •• The NPC inverter requires no simultaneous switching of the two series‐ connected IGBTs per arm. The NPP inverter would be preferable to the NPC inverter when the maximum DC input voltage is lower than, for example, 750 V. The reason is that a single 1.2 kV IGBT can be used as a switching device per arm, and that two 600 V IGBTs connected in anti‐series can be used for voltage clamping. Thus, the NPP inverter has been used as a low‐voltage photovoltaic (PV) inverter for grid‐tied applications. However, the NPC inverter using 1.2 kV IGBTs and 1.2 kV freewheeling diodes, as well as 1.2 kV clamping diodes, would be preferable for the 1.5 kVdc PV inverter. In particular, the NPC inverter would be superior to the NPP inverter in efficiency and cost if SiC (silicon carbide) MOSFET dual modules and Schottky barrier diode (SBD) dual modules were available. The reason stems from the following: the NPC inverter per leg consists of two 1.2 kV SiC‐MOSFET dual modules and a single 1.2 kV SiC‐SBD dual module used as two clamping diodes. On the other hand, the NPP inverter consists of

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

a single 2.5 kV SiC‐MOSFET dual module and a single 1.2 kV SiC‐MOSFET dual module in which the two SiC‐MOSFETs are connected in anti‐series. As a result, a set of the two series‐connected 1.2 kV SiC‐MOSFETs in the NPC inverter has a lower on‐state resistance than the single 2.5 kV SiC‐MOSFET in the NPP inverter. On the other hand, a set of two series‐connected 1.2 kV Si (silicon) IGBTs has higher on‐ state voltage than a single 2.5 kV Si‐IGBT, because the Si‐IGBT has a non‐negligible built‐in voltage, whereas the SiC‐MOSFET has no built‐in voltage. Since the beginning of the 1990s, the three‐level NPC inverters have been put into practical use for various industrial medium‐voltage and low‐voltage motor drives, including steel‐mill drives [22]. Since March 1999, the Japanese high‐speed train or the “Shinkansen” has been adopting a three‐level NPC rectifier/inverter using IGBTs for driving the main traction motors, providing the capability of regenerative braking. A three‐level active NPC (ANPC) inverter [23] was first introduced in 2001 for the purpose of improving the unequal loss distribution of the original NPC inverter shown in Figure 3.1. This circuit configuration is characterized by replacing each clamping diode with a pair of an IGBT and a diode connected in anti‐ parallel each other. The original NPC inverter is sometimes referred to as the passive NPC (PNPC) inverter to avoid confusion with the ANPC inverter.

3.2.4  Five‐Level NPC Inverters Figure 3.4 shows a three‐phase “three‐leg” five‐level NPC inverter equipped with a DC‐voltage‐balancing circuit [24]. This comes from a straightforward extension of the three‐level NPC inverter shown in Figure  3.1a. Note that all the IGBTs and Diode rectifier

Voltage-balancing circuit

LC

6.6 kV

9 kV

Five-level inverter

Cdc1

Cdc2 M

IM

Cdc3

Cdc4 0

Figure 3.4  A three‐phase five‐level NPC inverter with a DC‐voltage‐balancing circuit [24].

3.3  MULTILEVEL FLC INVERTERS AND HYBRID FLC INVERTERS

161

diodes used in Figure 3.4 have the same voltage rating of 4.5 kV for driving the 6.6 kV induction motor. The voltage at mid‐point M with respect to the negative DC bus can be regulated to 4.5 kV (= 9 kV/2) by control without any auxiliary circuit. However, the individual voltages across capacitors Cdc1 and Cdc2, as well as those across capacitors Cdc3 and Cdc4, should be regulated to 2.25 kV (= 4.5 kV/2) by the voltage‐balancing circuit shown in Figure 3.4. Unless the balancing circuit exists, capacitors Cdc2 and Cdc3 continue discharging, while capacitors Cdc1 and Cdc4 continue charging. A single three‐phase, six‐pulse diode rectifier is connected directly to the 6.6 kV AC mains without transformer. Each arm of the diode rectifier consists of four diodes connected in series. Therefore, a practical solution to harmonic mitigation would be to install a transformerless hybrid active filter [25] at the 6.6 kV AC mains side, in order to comply with harmonic guidelines in an actual system (see Figure 3.16a). The authors of [24] designed, built, and tested the 200 V, 5.5 kW, 50 Hz induction motor drive system using a three‐phase “three‐leg” five‐level NPC inverter. Experimental waveforms obtained from the downscaled system verified the effectiveness and validity of the five‐level NPC inverter shown in Figure 3.4. However, no company or manufacturer has commercialized any three‐phase “three‐leg” four‐level or five‐level NPC inverter, although academic research is going on [24, 26].

3.3  MULTILEVEL FLC INVERTERS AND HYBRID FLC INVERTERS This section pays special attention to a three‐level flying capacitor (FLC) inverter with focus on its circuit configuration and operating modes, followed by four‐level and five‐level FLC inverters combined with a three‐level NPC, ANPC, or NPP inverter.

3.3.1  Circuits of the Three‐Level and Four‐Level FLC Inverters Figure 3.5 shows three‐level and four‐level flying capacitor (FLC) inverters. For example, the three‐level FLC inverter is required to maintain the flying capacitor voltage at half of the DC input voltage. Some scientists and engineers of power electronics have done extensive research on capacitor‐voltage control, including natural balancing based on phase‐shifted‐carrier pulse width modulation (PWM), focusing on motor drives [27–30]. Alstom Power and Grid, presently a part of General Electric, brought medium‐voltage motor drives using four‐level FLC inverters to the market. The five‐level FLC inverter needs three flying capacitors per phase leg, and their voltage ratings are different from each other. Moreover, the five‐level inverter is much more complicated to control than the four‐level inverter.

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

(a)

(b)

Figure 3.5  Per‐leg circuit configurations of the three‐level and four‐level flying capacitor (FLC) inverters [5]. (a) The three‐level FLC inverter. (b) The four‐level FLC inverter.

3.3.2 Principles of the Three‐Level FLC Inverter Figure 3.6 shows nine possible operating modes in a phase leg of the three‐level FLC inverter. Since the FLC inverter has the nine operating modes, it is more flexible in choosing an appropriate operating mode from moment to moment than the NPC and NPP inverters. Modes I, III, VII, and IX are the main players to produce a three‐level voltage waveform, whereas modes II, IV, V, VI, and VIII are the supporting players preventing any “short‐through occurrence” inside the phase leg. Both modes III and VII can produce the same AC voltage of vXO = E, independent of the polarity of the AC current. However, modes III and VII have the following significant difference in terms of circuit operation: the positive current is charging the flying capacitor, and the negative current is discharging it in mode III. On the other hand, the positive current is discharging the flying capacitor, and the negative current is charging it in mode VII. This essential difference means that the appropriate choice of either mode III or VII is mandatory for regulating the mean DC voltage across the flying capacitor to E, which is half of the DC input voltage of 2E. To avoid simultaneous switching of two IGBTs, the FLC inverter has to choose the best one out of the five supporting modes during a period of transition from one main mode to another.

3.3.3  Hybrid Four‐Level and Five‐Level FLC Inverters Recently, attention has been paid to research on four‐level and five‐level inverters based on combinations of a three‐level FLC phase leg with a three‐level NPC, ANPC, or NPP phase leg. A five‐level ANPC inverter was introduced in 2005 [31], each leg of which is based on a combination of the three‐level ANPC leg and the three‐level FLC leg.

3.3  MULTILEVEL FLC INVERTERS AND HYBRID FLC INVERTERS

(a)

(b)

(c)

2E

2E

2E

E

E X vXO

O

(d)

(e)

2E

2E

E

X vXO

O

(f) 2E

E X vXO

E X vXO

O

O

(g)

(h)

2E

2E

E

X vXO

O

(i) 2E

E

E X vXO

X vXO

O

E X vXO

O

O

163

X vXO

O

Figure 3.6  Nine possible operating modes in a phase leg of the three‐phase, three‐level FLC inverter, where X = u, v, and w. (a) Mode I, where vXO = 2E. (b) Mode II, where vXO = E or 2E. (c) Mode III, where vXO = E. (d) Mode IV, where vXO = 0 or E. (e) Mode V, where vXO = 0 or 2E. (f) Mode VI, where vXO = E or 2E. (g) Mode VII, where vXO = E. (h) Mode VIII, where vXO = 0 or E. (i) Mode IX, where vXO = 0.

Figure 3.7a shows the per‐leg circuit configuration of the four‐level “nested” NPC inverter proposed in 2014 [32]. It is based on a combination of the inner three‐ level NPC phase leg with the outer three‐level FLC phase leg. Figure 3.7b shows the per‐leg circuit configuration of the five‐level “nested” NPP inverter introduced in 2016 [33]. It can be considered as a combination of the inner three‐level FLC

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

(a)

(b)

Figure 3.7  Per‐leg circuit configurations of four‐level and five‐level nested inverters. (a) The four‐level nested NPC inverter [32]. (b) The five‐level nested NPP inverter [33].

phase leg with the outer three‐level NPP phase leg. Much effort has been made toward capacitor‐voltage balancing and switching‐frequency reduction with relation to PWM methods.

3.4  MODULAR MULTILEVEL CASCADE CONVERTERS Figures  3.8 to 3.10 depict six circuit configurations belonging to the family of modular multilevel cascade converters. The common concepts hidden in the family members are based on “modular” structure, “multilevel” voltage, and “cascade” connection. These concepts allow power electronics engineers to use the term “modular multilevel cascade converter (MMCC)” as a family name. However, the family name alone cannot identify the individual family members. Therefore, a given/first name should be introduced to each family member as if to identify each circuit configuration.

3.4.1  Terminological Issue and Solution In 1971, McMurry patented a basic idea of multiple cascaded bridge‐cells [34]. In 1981, Alesina and Venturini published an IEEE Transactions paper describing a generalized concept of multiple cascaded bridge or chopper‐cells [35]. However, it was impossible to verify their idea and concept in the 1970s and 1980s. The remarkable development of power electronics over the last three decades has made it possible to put the multilevel converters on the market.

3.4  MODULAR MULTILEVEL CASCADE CONVERTERS

(a)

(b)

vS

165

(c)

O

M

K

J vac

Figure 3.8  Three circuit configurations of modular multilevel xSBC converters, where x = S, D, and T. Each of the five white boxes is the same as the SSBC surrounded by the dashed‐line box on the left. (a) The SSBC (single‐star bridge‐cell) converter. (b) The DSBC (double‐star bridge‐cell) converter. (c) The TSBC (triple‐star bridge‐cell) converter.

(a)

(b)

Figure 3.9  Two circuit configurations of modular multilevel xDBC converters, where x = S and D. Each of the eight white boxes is the same as the cluster surrounded by the dashed‐line box on the left. (a) The SDBC (single‐delta bridge‐cell) converter. (b) The DDBC (double‐delta bridge‐cell) converter.

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

vS O

P

N

Vdc

Figure 3.10  Circuit configuration of the DSCC (double‐star chopper‐cell) converter.

Around 1994, Robicon Corporation put an innovative multilevel inverter for medium‐voltage motor drives on the market. This multilevel inverter was referred to as a “cascade multilevel inverter” [8], a “cascaded H‐bridge inverter” [36], or a “chain‐link multilevel inverter” [37]. This means that different manufacturers or companies use different names, like trade names. However, the multilevel inverter can be considered also as a “modular multilevel inverter” because it is one of the modular multilevel inverters based on the cascade connection of multiple modular H‐bridge (single‐phase full‐bridge) cells. From 2003 to 2005, Marquardt and his coauthors presented pioneering multilevel converters that they named as “modular multilevel converters.” However, the name or designation makes it impossible for beginners in power electronics to distinguish one circuit configuration from the others. The reason is that both terms “modular” and “multilevel” do not have enough information to identify their circuit configurations. Moreover, it is reasonable to call a modular multilevel converter as a “cascade multilevel converter.” The reason is that the converter is based on the cascade connection of either multiple bidirectional chopper (half‐bridge) or H‐bridge (full‐bridge) cells. Nevertheless, it is also appropriate to use the term “modular multilevel converter” as a proper noun. This may lead to the following confusion: when a power electronics engineer uses either “modular multilevel converter” or “cascade multilevel converter” in their technical paper/article or presentation, other engineers cannot identify the circuit configuration or in the worst case may misunderstand it [38].

3.4  MODULAR MULTILEVEL CASCADE CONVERTERS

167

To avoid the above‐mentioned confusion, this chapter introduces a combination of a given/first name and a family/last name to the modern multilevel converters, including six different circuit configurations. The family/last name of “modular multilevel cascade converters” merges the two terms “cascade multilevel converters” and “modular multilevel converters” together [38]. The following given/first names are assigned to the six family members: •• SSBC (single‐star bridge‐cell) for Figure 3.8a, or a “cascade multilevel converter with star configuration” in [8]. •• DSBC (double‐star bridge‐cell) for Figure 3.8b, or an “MMC with full‐bridge submodules” in [39]. •• TSBC (triple‐star bridge‐cell) for Figure 3.8c, or a “modular multilevel matrix converter” in [40]. •• SDBC (single‐delta bridge‐cell) for Figure 3.9a, or a “cascade multilevel converter with delta configuration” in [8]. •• DDBC (double‐delta bridge‐cell) for Figure 3.9b, or a “hexagonal converter” in [41]. •• DSCC (double‐star chopper‐cell) for Figure  3.10, or an “MMC with half‐ bridge submodules” in [39]. These given/first names can be used to identify the six individual circuit configurations. Note that the DSCC converter can be considered as a special case of the DSBC converter from a topological point of view.

3.4.2  Circuits and Individualities of Six Family Members Figure 3.8 shows the following three converter circuit configurations: the single‐ star bridge‐cell (SSBC) converter, the double‐star bridge‐cell (DSBC) converter, and the triple‐star bridge‐cell (TSBC) converter. The naming convention is that the three converters are based on one (single), two (double), and three (triple) set(s) of three star‐connected clusters, respectively, and that each cluster consists of multiple “bridge‐cells” connected in cascade. This chapter refers to a string of the multiple bridge‐cells as a “cluster,” to distinguish it from existing terms “arm” and “leg” used for traditional two‐level converters. Figure 3.8a has no current path or branch connected between the cluster mid‐ point M and the supply neutral point O. Hence, no current would flow between points M and O even if any voltage appeared between points M and O. An appropriate adjustment of vMO allows the SSBC converter to achieve cluster‐voltage balancing [42–44]. Note that the intentionally‐injected voltage vMO does not appear in the cluster line‐to‐line voltages. Figure 3.8b has a current path connected between two mid‐points J and K. The voltage difference between vJO and vKO is given by:

vJK

vJO

vKO

vac . (3.1)

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

Collaborative adjustments of vJO and vKO allow the DSBC converter to achieve bi‐ directional power conversion between the three‐phase supply voltage vS and the single‐phase AC voltage source vac. Figure  3.8c has the capability of bi‐directional power conversion between three‐phase supply voltage sources and three‐phase load voltage sources such as an induction or synchronous motor. This TSBC converter is suitable for medium‐ voltage, high‐power, low‐speed, high‐torque motor drives. Figure 3.9 shows the following two converter configurations; the single‐delta bridge‐cell (SDBC) converter, and the double‐delta bridge‐cell (DDBC) converter. The naming convention is that the two converters are based on one (single) and two (double) set(s) of three delta‐connected clusters, respectively, and that each cluster consists of multiple “bridge‐cells” connected in cascade. Figure  3.9a allows a circulating current to flow through the three delta‐ connected clusters. Appropriate adjustment of the circulating current brings an additional function of negative‐sequence reactive‐power control to the SDBC converter [45]. However, the bridge‐cell count per cluster in the SDBC converter is 1.73 times as high as that in the SSBC converter, as long as the IGBTs used in Figure 3.8a and Figure 3.9a have the same voltage rating. Figure 3.9b can achieve bi‐directional power conversion between three‐phase supply voltage sources and three‐phase load voltage sources. The DDBC converter has the same function in power conversion as the TSBC converter. However, the DDBC converter has only one degree of freedom in circulating current, whereas the TSBC converter has four degrees of freedom [1]. This difference would produce a significant effect on capacitor‐voltage‐balancing performance. Figure 3.10 can achieve bi‐directional power conversion between three‐ phase supply voltage sources vS and a single DC voltage source Vdc. This DSCC converter can be considered as two identical single‐star chopper‐cell (SSCC) converters. However, the three clusters in one SSCC converter are opposite in voltage polarity to those in the other. Note that the SSCC converter would not be able to find any suitable application to AC grids from a practical point of view, although it is an interesting circuit configuration from a theoretical point of view.

3.4.3  Topological Discussion on the DSBC and DSCC Converters The DSBC converter can connect a single‐phase AC voltage source vac between two mid‐points J and K, as shown in Figure 3.9b. On the other hand, the DSCC converter can connect a DC voltage source Vdc between two mid‐points P and N, as shown in Figure 3.10. The DC voltage source is given by

vdc

vPO

vNO (3.2)

3.4  MODULAR MULTILEVEL CASCADE CONVERTERS

169

The DC voltage in Eq. (3.2) can be considered as a special case of the AC voltage source vac in Eq. (3.1). Consider the following constraint between VS and Vdc vdc



2 2vS

3 (3.3)

where VS is the three‐phase supply line‐to‐line rms voltage. Whenever the constraint in Eq. (3.3) is effective in Figure 3.9b, each bridge cell always produces a positive voltage at the arm side. This means that each bridge cell can be replaced with each chopper cell. Hence, it is concluded that the DSCC converter is a special case of the DSBC converter in terms of circuit configuration because it can be derived from the DSBC converter, as discussed above.

3.4.4  Comparisons among the Six MMCC Family Members Tables  3.1 and 3.2 summarize comparisons among the six family members. The “IGBT‐count ratio” signifies the count ratio of the IGBTs used in each member with respect to those in the SSBC under the following assumptions: •• The six members have the same power and voltage ratings, using the same voltage‐rating IGBTs. •• As for the DSBC, TSBC, and DDBC converters, their AC output voltage is the same in rms voltage as the three‐phase supply voltage. •• As for the DSCC converter, the DC voltage Vdc meets the following equation: vdc 2 2vS 3 . Note that the IGBTs have different current ratings because the count of the IGBTs differs among the six members. The “applicability” in the last row includes technical aspects as well as the potential market size for each member. TABLE 3.1  Comparisons among the family members of modular multilevel cascade converters: Part I.

Circuit Given/first name Effective terminal count Prominent function IGBT‐count ratio Circulating current Applicability

Figure 3.8a

Figure 3.8b

SSBC (single‐star bridge‐cell) Three terminals

DSBC (double‐star bridge‐cell) Five terminals

TSBC (triple‐star bridge‐cell) Six terminals

Positive‐sequence‐ current control 1 No

3‐ph‐to‐1‐ph direct power conversion 4 Two degrees of freedom ++++

3‐ph‐to‐3‐ph direct power conversion 6 Four degrees of freedom

+++++

Figure 3.8c

+++

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

TABLE 3.2  Comparisons among the family members of modular multilevel cascade converters: Part II.

Circuit Given/first name Effective terminal count Prominent function IGBT‐count ratio Circulating current Applicability

Figure 3.9a

Figure 3.9b

Figure 3.10

SDBC (single‐delta bridge‐cell) Three terminals

DDBC (double‐delta bridge‐cell) Six terminals

DSCC (double‐star chopper‐cell) Five terminals

Negative‐sequence‐ current control

3ph‐to‐3ph direct power conversion

Rectification and inversion

3 One degree of freedom +++++

4 3 One degree of freedom

2 Two degrees of freedom +++++

++

3.4.5  Circulating Current The “circulating current” (as defined in [14, 15, 45, 46]) plays an important role in achieving voltage balancing of all the bridge‐cell or chopper‐cell capacitors. The SSBC has no circulating current flowing inside it, although it can inject a common‐ mode zero‐sequence voltage instead. From a practical point of view, therefore, the SSBC has been used as a static synchronous compensator (STATCOM) for positive‐sequence reactive‐current control and as a battery‐energy storage system (BESS) for positive‐sequence active‐current control at the lowest cost among the six members. The reason is that the SSBC has a minimum cell count among the six family members, as shown in Table  3.1. The SSBC can use the common‐mode zero‐sequence voltage vMO for achieving capacitor‐voltage balancing of all the floating bridge cells in the STATCOM [9, 42–44], and for achieving SOC (state‐ of‐charge) balancing control, fault‐tolerant control, and active‐power control of the individual bridge cells in the BESS [47–50]. The SDBC allows an AC current to circulate through three delta‐connected clusters [45]. This circulating current plays an essential role in exchanging active power among the three clusters, although the circulating current is accompanied by a slight increase in conduction and switching losses. The SDBC is more suitable for a STATCOM for negative‐sequence, as well as positive‐sequence, reactive‐current control [51], and a BESS for negative‐sequence reactive‐current control as well as positive‐sequence active‐current control. Both DSCC and DSBC have two degrees of freedom in the circulating currents [38]. The TSBC has four degrees of freedom, whereas the DDBC has one degree of freedom. Although both TSBC and DDBC can achieve three‐phase AC‐ to‐AC direct power conversion, the TSBC is superior to the DDBC in capacitor‐ voltage‐balancing performance. The reason is because the TSBC is more flexible than the DDBC in terms of circulating‐current control.

3.5 PRACTICAL APPLICATIONS OF SSBC INVERTERS TO MEDIUM‐VOLTAGE MOTOR DRIVES

171

3.5 PRACTICAL APPLICATIONS OF SSBC INVERTERS TO MEDIUM‐VOLTAGE MOTOR DRIVES Figure  3.11 shows a well‐known multilevel motor drive based on an SSBC converter, which combines a multiple‐phase‐shifted‐windings line‐frequency ­ transformer with multiple three‐phase six‐pulse diode rectifiers [6]. Some companies across the world have already established a good business market for (a) Fig 3.11(b) Fig 3.11(b) Fig 3.11(b) Fig 3.11(b) Fig 3.11(b) Fig 3.11(b) Fig 3.11(b) Fig 3.11(b) Fig 3.11(b)

M

(b)

Figure 3.11  A medium‐voltage motor drive system based on an SSBC inverter [6]. (a) Power circuit. (b) Power cell.

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(a) Fig 3.12(b) Fig 3.12(b) Fig 3.12(b) Fig 3.12(b) Fig 3.12(b) Fig 3.12(b) Fig 3.12(b) Fig.12(b) Fig 3.12(b)

M

(b)

Figure 3.12  Another medium‐voltage motor drive system based on an SSBC inverter [52]. (a) Power circuit. (b) Power cell.

medium‐voltage motor drives for fan, blower, and pump applications. However, the  manufacturers have had to put up with the indispensable line‐frequency transformers which are complicated, heavy, bulky, costly, and prone to failure. Figure  3.12 shows a newly‐developed medium‐voltage motor drive based on  an SSBC converter [52]. Although it is somewhat similar to Figure  3.11, the ­following significant differences exist between the two drive systems. •• Figure 3.11 has a three‐phase, multiple‐phase‐shifted‐windings transformer. On the other hand, Figure 3.12 has three three‐phase transformers with open‐ end windings but without any phase‐shifted winding in the secondary.

3.6 HIERARCHICAL CONTROL OF AN SSBC‐BASED STATCOM

173

•• Figure 3.11 has a three‐phase diode rectifier as the front end of each single‐ phase, two‐legged (full‐bridge), two‐level inverter, so that it has no function of regenerative braking. On the other hand, Figure 3.12 uses a single‐phase, two‐legged (full‐bridge), three‐level NPC rectifier as the front end. This ­circuit configuration allows Figure 3.12 to provide the function of regenerative braking for applications such as conveyors, cranes, and so on. In addition, introducing the so‐called “phase‐shifted‐carrier PWM” to multiple three‐level NPC rectifiers makes the three‐phase line currents sinusoidal and balanced. The three three‐phase transformers in Figure  3.12 can be replaced with a single three‐phase transformer in which the primary has a set of simple three‐phase ­windings and the secondary has three sets of three‐phase open‐end windings.

3.6  HIERARCHICAL CONTROL OF AN SSBC‐BASED STATCOM This section is a general description of an SSBC‐based STATCOM characterized by phase‐shifted‐carrier PWM, with a focus on capacitor‐voltage balancing. The phase‐shifted‐carrier PWM is applicable to any chopper‐cell count per cluster when it is integrated into a hierarchical control system with three layers.

3.6.1  Background and Motivation In the 1990s, flexible AC transmission system (FACTS) devices such as unified power flow controllers (UPFCs) and STATCOMs using gate‐turn‐off (GTO) thyristors were installed on power transmission systems. At present, in Japan there are a few operational FACTS devices in a broad sense, and relatively few globally. The GTO thyristors had been replaced gradually with insulated‐gate bipolar transistors (IGBTs). Since March 1999, IGBTs have been put into practical use as power switching devices in three‐level neutral‐point‐clamped (NPC) PWM inverters [3] for driving main traction motors in Japanese bullet trains or the “Shinkansen.” This epoch‐making event made Akagi interested in power conversion systems using 3.3 kV IGBTs, intended for direct installation to the 6.6 kV industrial and utility distribution systems in Japan. In 2002, Akagi and his graduate students commenced doing comprehensive research on the 6.6  kV transformerless SSBC‐based STATCOM shown in Figure 3.8a. His long experience in power electronics helped him to recognize the superiority of phase‐shifted‐carrier PWM to staircase modulation or one‐pulse PWM for the SSBC converter used in the STATCOM. The reason was that IGBTs have better switching performance as well as much more compact gate‐drive and auxiliary circuits than GTO thyristors. The better switching performance leads to higher switching frequencies, thus resulting in bringing better current‐control

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performance to the SSBC converter, even in grid‐faulty conditions. In fact, a phase‐shifted‐carrier PWM has the following practical advantage: the actual switching frequency of each IGBT is exactly equal to the triangular‐carrier frequency, independent of control gains, circuit parameters, and operating conditions including transient states. This advantage is welcomed by power electronic engineers in industry, although research scientists in academia may not be so interested in it. However, one of the most crucial issues at that time was how to realize voltage balancing of all the floating or flying capacitors in the SSBC converter with phase‐ shifted‐carrier PWM [53, 54].

3.6.2  Hierarchical Control In 2002, Akagi posed himself the following question: “What should be given the top priority in academic research on capacitor‐voltage balancing for an SSBC‐based STATCOM with phase‐shifted‐carrier PWM?” His answer was that the top priority should be given to easy expansion to any SSBC‐based STATCOM, independent of bridge‐cell counts per cluster. This priority led him to introduce so‐called “hierarchical control” to the STATCOM. It consists of the following three layers: •• The top layer takes part in both reactive‐power control and overall capacitor‐ voltage control. •• The middle layer is responsible for cluster capacitor‐voltage-balancing control [9] or inter‐cluster capacitor‐voltage-balancing control [55, 56]. •• The bottom layer is responsible for individual capacitor‐voltage balancing control [9] or intra‐cluster capacitor-voltage-balancing control [55, 56]. Figure  3.13 depicts the conceptual circuit of the top layer, in which the SSBC ­converter shown in Figure  3.8a would act as if it were a traditional three‐phase two‐level converter equipped with a single floating or flying DC capacitor. The capacitor voltage vC is given as an arithmetic-average voltage of all the DC ­capacitors in the SSBC converter: vC



1 vCu 3

vCv

vCw (3.4)

For example, vCw can be calculated by

vCw

1 vCw1 vCw 2 n

vCwn (3.5)

and, for example, vCw1 in Eq. (3.5) means an analog or digital signal after passing through either a low‐pass filter or moving‐average filter for mitigating a 100 Hz (double line frequency) voltage ripple included in the real DC‐capacitor voltage vCw1. This overall capacitor‐voltage control technique in Figure 3.13 is the same in principle as a traditional technique used in a STATCOM based on a three‐phase, two‐level or three‐level neutral‐point‐clamped (NPC) converter.

3.6 HIERARCHICAL CONTROL OF AN SSBC‐BASED STATCOM

175

vC

Figure 3.13  Conceptual circuit of the top layer responsible for both reactive‐power control and overall capacitor‐voltage control [53, 54].

O

vCw

M

Figure 3.14  Conceptual circuit of the middle layer responsible for inter‐cluster capacitor‐ voltage balancing control [53, 54].

Figure 3.14 shows the conceptual circuit of the middle layer, where the SSBC converter would act as if it were three single‐phase two‐level converters or bridge cells. Each of the three bridge cells is equipped with a single floating or flying DC capacitor. For example, vCw, given by Eq. (3.5), means an arithmetic‐average voltage of all the DC capacitors in the w‐phase cluster. This middle layer plays an important role in achieving capacitor‐voltage balancing among the three bridge cells or the three clusters, as shown in experimental waveforms in Figure 3.21. The inter‐cluster balancing control technique relies on superimposing a small amount of three‐phase negative‐sequence current on the three‐phase supply currents drawn from the AC

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

(a)

(b)

(c)

vCu1

vCu2

vCun

Figure 3.15  Conceptual circuit of the bottom layer responsible for intra‐cluster capacitor‐ voltage balancing control. (a) The a‐phase cluster. (b) The b‐phase cluster. (c) The c‐phase cluster [53, 54].

mains [9], or injecting an appropriate amount of zero‐sequence voltage vMO between points M and O in Figure 3.14 [43, 44]. Figure 3.15 shows the conceptual circuit of the bottom layer. The SSBC converter would act as if it were three independent clusters, each of which is equipped with multiple floating or flying DC capacitors. The intra‐cluster balancing control technique is so straightforward that it actually adjusts a small amount of active power flowing into, or out of, each bridge cell inside each cluster [53, 54]. The integration of the inter‐cluster balancing control into the middle layer brought a technological breakthrough to SSBC‐based STATCOMs [42–44] and battery energy storage systems [47–50], and to SDBC‐based STATCOMs [45] and utility‐scale photovoltaic systems [55, 56].

3.7 A DOWNSCALED SSBC‐BASED STATCOM WITH PHASE‐SHIFTED‐CARRIER PWM This section presents a downscaled SSBC‐based STATCOM with phase‐shifted‐ carrier PWM. It is rated at 200 V and 10 kVA with three bridge cells per cluster. Experimental waveforms verify the validity and effectiveness of the hierarchical control system described in the previous section, keeping the nine bridge‐cell‐ capacitor voltages controlled and balanced, even in a more severe transition from capacitive to inductive (or capacitive to inductive) operation at the rated reactive power of 10 kVA within 20 ms.

3.7 A DOWNSCALED SSBC‐BASED STATCOM WITH PHASE‐SHIFTED‐CARRIER PWM

177

3.7.1  System Configuration Figure 3.16 shows the system configuration of the three‐phase 200 V, 10 kVA, 50 Hz STATCOM. Table 3.3 summarizes the circuit parameters. It consists of nine bridge cells in total with the same voltage and current ratings. As a result, it produces a seven‐level line‐to‐neutral (13‐level line‐to‐line) voltage waveform. The phase‐ shifted unipolar sinusoidal PWM with a carrier frequency of 1 kHz is applied to the STATCOM. Each bridge cell is equipped with a floating or flying DC capacitor with a capacitance value of 16.4 mF. The unit capacitance constant is calculated as 36 ms at 70 V [57]. Note that neither external circuit nor power source is installed on the DC side of each bridge cell, except for the DC capacitor and a DC voltage sensor. This chapter refers to a cluster of three bridge cells in the u‐phase as the u‐phase “cluster,” not the u‐phase arm or leg. Moreover, vuM is the u‐phase cluster voltage with respect to the neutral point of the star‐connected STATCOM, M, while vuv is the u‐phase cluster voltage with respect to the v‐phase cluster voltage. Figure 3.17 shows the digital control system of the STATCOM. It consists of a fully‐digital control circuit based on a single DSP (digital signal processor) and

LS

vS

iu iv

O

iw

200 V, 50 Hz

MC1 R

vvM

vu1

vCu1

Cu1

vCu2

Cu2

Cell 2

vu2

vCu3

Cu3

Cell 3

vu3

The u-phase cluster

vwM

The w-phase cluster

Lac vuM

The v-phase cluster

MC2

M

Figure 3.16  The three‐phase 200 V, 10 kVA, 50 Hz STATCOM used in experiment [9].

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

TABLE 3.3  Circuit parameters for Figure 3.16 [9].

Rated reactive power Nominal line‐to‐line rms voltage Bridge‐cell count per cluster Background system inductance AC inductor Starting‐up resistor Capacitor voltage reference Capacitor capacitance Unit capacitance constant [57] Triangular‐carrier frequency Equivalent carrier frequency Low‐pass‐filter cut‐off frequency Dead time in each bridge cell

Q

10 kVA

VS n LS Lac R vC* C HC fC 2nfC

200 V 3 48 μH (0.4%) 1.2 mH (10%) 10 Ω 60–70 V 16.4 mF 36 ms at 70 V 1 kHz 6 kHz 15 Hz 2 µs

Per‐unit values of 0.4% and 10% are on a three‐phase 200 V, 10 kVA, 50 Hz base.

Voltage sensors vS

Lac

i

DCCTs

3ϕ, 200 V,50 Hz PT

vCu1

SSBC converter

LS

vCu2 . . . vCw3

2 PLL

3

3

A/D 6

9

36 PWM (FPGAs) 18 ∗ v Control (DSP)

A/D 9



q

Figure 3.17  Digital control system for the 200 V, 10 kVA STATCOM [9].

three FPGAs (field‐programmable gate arrays). The PLL (phase‐locked‐loop) ­circuit in Figure  3.17 is used to synchronize internal control signals with the supply voltage. Figure 3.18 shows three triangular‐carrier signals with the same frequency of 1 kHz, which are phase‐shifted by 2π/3 from each other, to realize phase‐shifted‐ carrier PWM. Thus, the line‐to‐neutral voltage at the AC side of the u‐phase cluster, vuM, results in being a seven‐level PWM waveform with the lowest harmonic sideband centered at 6 kHz (= 1 kHz × 2 × 3).

3.7 A DOWNSCALED SSBC‐BASED STATCOM WITH PHASE‐SHIFTED‐CARRIER PWM

167 μs

Sampling Computation Reference renewal

179

Voltage reference Carrier signal

Bridge cell 1 0

Bridge cell 2 0

Bridge cell 3 0

Figure 3.18  Three triangular‐carrier signals with a phase shift of 2π/3 between one and another, along with sampling timing [9].

Data sampling for bridge cell 1, for example, is carried out at every top or bottom of the carrier signal for bridge cell 3. A pair of voltage references for bridge cell 1 is renewed at the following top or bottom of the carrier signal for bridge cell 1 with a sampling delay of 167 µs (= 1/6 ms). Then, it is held for 500 µs to avoid the so‐called “multi‐switching.” As a result, the sampling period is 167 µs (the sampling frequency is 6 kHz), and the reference renewal period is 500 µs. The total delay time including the zero‐order holder in the digital control is 667 µs. The digital control system in Figure 3.17 has to execute a sequence of voltage/ current signal acquisition and voltage‐reference computation within the sampling period of 167 µs. The DSP sends a pair of voltage references every 167 µs to one of the three FPGAs that play an essential role in generating 36 PWM signals. A pair of voltage references corresponds to a pair of legs in a bridge cell: one voltage reference is opposite in polarity to the other, thus resulting in the so‐called “unipolar modulation.” Note that one voltage reference is drawn while the other is eliminated from Figure 3.18.

3.7.2  Control Technique Figure 3.19 shows the control block diagram for the STATCOM. It is based on the so‐called “hierarchical control” consisting of three layers, as described in the previous section. The top layer is responsible for both reactive‐power control and overall capacitor‐voltage control. The middle layer is for inter‐cluster capacitor‐ voltage balancing control among the three clusters. The bottom layer is for

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

vCu1 v ∗C

Voltage reference calculation

vSuO vSvO vSwO iu iv iw

d-q trans.

d-q trans.

vSd

i ∗d

vSq id

9 (vCu1, vCu2 , ···, vCw3) vBum

Capacitorvoltagebalancing control

vC i ∗q

v ∗d

Instantaneous reactive power control

iq

vCw3

LPF (15 Hz)

Overall capacitorvoltage control

q∗

vCv2

v ∗q

vBvm vBwm

Inv. d-q trans.

v ∗um v ∗vm v ∗wm

Figure 3.19  Control block diagram for the 200 V, 10 kVA STATCOM [9].

intra‐cluster capacitor‐voltage balancing control among the three bridge cells in each cluster. The following set of voltage and current equations can be obtained, neglecting resistance components from Figure 3.16.



vSuO vSvO vSwO

vuM vvM vwM

lac

iu d iv (3.6) dt iw

Invoking the d‐q transformation yields lac

d dt

lac

lac lac

d dt

id iq

vSd vSq

vd (3.7) vq

Here, vd and vq are the d‐axis and q‐axis components corresponding to the three‐ phase cluster voltages, vuM, vvM and vwM, and vSd and vSq are those corresponding to the three‐phase supply voltages, respectively. When the three‐phase line‐to‐neutral supply voltages vSuO, vSvO and vSwO are sinusoidal and balanced, vSq is always zero because vSuO is aligned with the d‐axis supply voltage. The instantaneous real power p and the instantaneous imaginary power q [58] are given as follows:

p

vSd id

vSq iq

vSd id (3.8)



q

vSd iq

vSq id

vSd iq (3.9)

The mean DC‐capacitor voltage in the u‐phase cluster, vCu, for example, can be ­calculated by

3.7 A DOWNSCALED SSBC‐BASED STATCOM WITH PHASE‐SHIFTED‐CARRIER PWM

1 vCu1 vCu 2 3

vCu



181

vCu 3 (3.10)

The mean DC‐capacitor voltage of the three clusters, vC is given by 1 vCu 3

vC



vCw (3.11)

vCv

The d‐axis current reference id* and the q‐axis current reference iq* are determined by id*



K1 vC* iq*



vC (3.12)

q* (3.13) vSd

The d‐axis voltage reference vd* and the q‐axis voltage reference vq* are given by



vd* vq*

1 3

vSd vsq

0 lac

lac 0

id iq

K2

id* id iq* iq

K2 t2

0 dt (3.14) iq* iq

The first and second terms of the right hand side in Eq. (3.14) act as feedforward compensators for canceling out the supply voltage and the voltage appearing across the AC inductor, respectively. The third term is a proportional controller for the d‐axis current, and the fourth term is a proportional plus integral controller for the q‐axis current. The coefficient of 1/3 comes from the bridge‐cell count per cluster.

3.7.3 Experimental Waveforms Figure  3.20 shows experimental waveforms in a transient state from inductive to capacitive operation with a ramp change in q* from −10 kVA to 10 kVA. Although a set of waveforms at the bottom are the nine capacitor voltages and its reference, it is difficult to distinguish the nine waveforms from Figure 3.20. The capacitor‐voltage reference was controlled in a range between 60 V and 70 V, being synchronized with the ramp change in q* [kVA] in a time interval of 20 ms as follows:

vC*

65 q* / 2

V (3.15)

The above equation means that capacitive operation at q* = 10 kVA takes the maximal voltage reference of 70 V, whereas inductive operation at q* = −10 kVA takes the minimal voltage reference of 60 V. Each capacitor voltage contains a 100 Hz (double line frequency) component inherent in a bridge cell. However, each mean DC‐capacitor voltage was kept balanced and controlled, even in the transient state. The u‐phase supply current flowing into the STATCOM, iu, had a current THD (total harmonic distortion) of 3.7%.

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

200 0 −200 60

vSuO [V]

iu [A]

0 −60 15

q [kVA]

q q∗

0

−15 80 vC [V] 70 60 50

v ∗C vC

50 ms

Figure 3.20  Experimental waveforms in a transient state from inductive to capacitive operation at 10 kVA [9]. 200 0 −200 60

vSuO [V]

iu [A]

0

−60 90 80 70 vC [V] 60 50

Inter-cluster balancing control was enabled

50 ms

Figure 3.21  Experimental waveforms confirming the effectiveness of the inter‐cluster capacitor‐voltage balancing control when the STATCOM was in capacitive operation at 10 kVA with vC* = 70 V. Both overall capacitor‐voltage control and intra‐cluster capacitor‐ voltage balancing control remained active through this experiment [9].

Figure 3.21 shows experimental waveforms of the u‐phase supply current iu and the nine capacitor voltages, verifying the effectiveness of the inter‐cluster capacitor‐voltage balancing control. During capacitive operation at 10 kVA with vC* = 70 V, the inter‐cluster balancing control was intentionally disabled for three seconds, and then it was enabled again. Note that the intra‐cluster capacitor‐ voltage balancing control remained active in this experiment. Although the inter‐ cluster balancing control was disabled, both overall capacitor‐voltage control and intra‐cluster capacitor‐voltage balancing control remained active. As a result, the nine waveforms looked like the three waveforms corresponding to the u‐phase, v‐phase,

3.8  CIRCULATING CURRENTS IN DSCC CONVERTERS

183

200 vSuO [V] 0 −200 60 iu [A]

0

−60 90 80 vC [V] 70 60 50

Intra-cluster balancing control was enabled

50 ms

Figure 3.22  Experimental waveforms confirming the effectiveness of the intra‐cluster capacitor‐voltage balancing control when the STATCOM was in capacitive operation at 10 kVA with vC* = 70 V. Both overall capacitor‐voltage control and inter‐cluster capacitor‐ voltage balancing control remained active through this experiment [9].

and w‐phase clusters in Figure 3.21. This interesting fact indicates that the three capacitor voltages inside each cluster were well balanced, although the capacitor‐ voltage imbalance occurred among the three clusters. As soon as the inter‐cluster balancing control was enabled, each mean DC‐capacitor voltage converged to its reference voltage, and finally reached 70 V in 70 ms. The reason why the capacitor‐ voltage imbalance occurred during the interval of disabling the inter‐cluster balancing control might be related to component and control tolerances. Figure 3.22 shows experimental waveforms verifying the effectiveness of the intra‐cluster capacitor‐voltage balancing control during capacitive operation at 10 kVA with vC* = 70 V. The intra‐cluster balancing control was intentionally disabled for ten seconds, and then it was enabled again. Note that the inter‐cluster capacitor‐voltage balancing control remained active in this experiment. Whether the intra‐cluster balancing control was disabled or enabled produced little effect on the waveform of iu. However, serious voltage imbalance occurred in the nine DC capacitors while the intra‐cluster balancing control was disabled. As soon as it was enabled, each mean DC‐capacitor voltage started to converge to its reference voltage, and finally reached 70 V in 150 ms [9].

3.8  CIRCULATING CURRENTS IN DSCC CONVERTERS Around 2005, Akagi had the opportunity to read a series of Marquardt’s papers on two slightly-different modular multilevel converters [10–13], or more strictly, DSCC and DSBC converters. At a glance, he had an intuition that the two modular multilevel converters show considerable promise as high‐voltage AC‐to‐DC and AC‐to‐AC bidirectional power converters in terms of circuit configuration and operating principles.

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

In 2005, Akagi’s research group succeeded in experimental verification of the three‐phase SSBC‐based STATCOM with phase‐shifted‐carrier PWM, as described in the previous section [9]. This precious experience convinced him to conduct academic research on a DSCC converter with phase‐shifted‐carrier PWM, with focus on capacitor‐voltage balancing.

3.8.1  Circulating Current in a Cycloconverter The DSCC converter shown in Figure 3.10 is more complicated in capacitor‐voltage balancing than the SSBC converter shown in Figure 3.8a. Akagi gained experience of research on naturally‐commutated cycloconverters operating with either circulating‐current mode or non‐circulating‐current mode in the 1970s. In other words, his research experience with the cycloconverters allowed him to recognize what the circulating current in the cycloconverter operating with circulating‐current mode was, and how it contributed to power conversion. Figure  3.23 shows a naturally-commutated cycloconverter operating in circulating‐current mode. It consists of a three‐phase 12‐pulse transformer, two three‐phase full‐bridge positive and negative thyristor converters, and a center‐ tapped inductor. This cycloconverter feeds electric power from the three‐phase AC mains to a single‐phase R‐L load at much lower frequencies than the line frequency. The cycloconverter is characterized by having both positive and negative thyristor converters operating always. Each thyristor converter continues carrying a positive DC current because no negative current flows in the thyristor. Hence, the circulating

iP iZ

iL /2 iL

iL /2

iN

Figure 3.23  A naturally-commutated cycloconverter with a single‐phase R‐L load, operating with circulating‐current mode [53, 54].

3.8  CIRCULATING CURRENTS IN DSCC CONVERTERS

185

current iZ should be controlled so as to satisfy the following two requirements, taking into account the positive directions of all the three loop currents in Figure 3.23. The requirement for the positive converter is given by iZ iL /2



0 (3.16)

The requirement for the negative converter is given by iZ iL /2



0 (3.17)

3.8.2  Circulating Current in a Single‐Leg DSCC Inverter Figure  3.24 shows a single‐leg DSCC inverter loaded with a single‐phase R‐L ­circuit. The following equation regarding three branch currents iP, iN, and iL exists at nodes M and N: iL



iP iN (3.18)

The above equation suggests that two independent branch currents among the three should be taken into account. Figure 3.24a shows two independent loop currents when a pair of iP and iN is selected. This selection is so straightforward that almost all beginners of power electronics do it. However, it would be an unfavorable selection for the following reasons: the waveforms of iP and iN include DC and AC components even in ideal operating conditions, where the AC component is related to the output frequency. (a)

(b) iP iZ

iP E

iL/2

iL M

N

N

M iL/2

iN

E

iN

Figure 3.24  Two independent loop currents in a single‐leg DSCC inverter. (a) When a pair of iP and iN is selected. (b) When a pair of iZ and iL is selected [53, 54].

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

On the other hand, when iL is selected as one independent loop current, either iP or iN should be selected as the other independent loop current. However, this selection would be unfavorable because it leads to “asymmetry” in terms of control. Figure 3.24b shows two independent loop currents when a pair of iL and iZ is selected. This selection is so favorable as to fully solve the above issues caused by the selection of a pair of iP and iN or a pair of iL and either iP or iN. The reason is that the waveform of iZ includes only a DC component under ideal operating conditions, thus resulting in the current control of iZ being simple, easy, and accurate [53, 54]. The above interesting consideration can be discussed from a different point of view. The following equation comes into existence among the four loop currents in Figure 3.24a and b:



iL iZ

iP (3.19) iN

1 1 0.5 0.5

Since the determinant of the two‐dimensional matrix in Eq. (3.19) is unity, the inverse matrix exists as follows: iP iN

1

iL 1 1 iZ (3.20) 0.5 0.5 0.5 1 iL 0.5 1 iZ

Eq. (3.20) concludes that the two‐dimensional linear transformation based on (3.19) is reversible between the pair of iP and iN and the pair of iL and iZ [46, 53, 54]. This transformation is somewhat similar in mathematical formula to the well‐ known “three‐phase to two‐phase transformation” that is often used in modeling, analysis, and control of three‐phase circuits and motors without zero‐sequence voltage or current. The single‐leg DSCC inverter in Figure 3.24b has the following constraint on the circulating current from active‐power balance between the DC and AC sides:

2ei Z

vL i L cos (3.21)

where IZ is the DC component of iZ, VL and IL are the load voltage and current in rms, and cos θ is the load power factor.

3.8.3  Similarity and Difference in Circulating Current Figure 3.23 looks somewhat similar to Figure 3.24 in circuit configuration. This enables the reader to define the circulating current iZ for the DSCC inverter, as discussed in the previous subsection. However, the following differences exist in circulating current between the cycloconverter and the DSCC inverter. •• Equations (3.16) and (3.17) mean strict constraints on the circulating current in the cycloconverter because each thyristor converter has the nature of

3.9 A DOWNSCALED DSCC‐BASED BTB SYSTEM

187

unidirectional current flow. However, power balance between the three‐phase AC input and the single‐phase AC output has no relation to the circulating current. This means that the cycloconverter should regulate the circulating current to a constant value that should be larger than the peak load current, independent of the electric power converted by the cycloconverter. •• Equation (3.21) results from active‐power balance between the DC input and the AC output. It is a strict constraint on the circulating current in the DSCC inverter. However, the peak load current itself imposes no constraint on the circulating current.

3.9 A DOWNSCALED DSCC‐BASED BTB SYSTEM This section presents a three‐phase downscaled back‐to‐back (BTB) system without DC‐link capacitor between the two identical 17‐level DSCC converters [59]. Each DSCC converter consists of 16 chopper cells per phase leg. The so‐called “phase‐ shifted‐carrier PWM” is applied to the two DSCC converters that are the same in circuit and control. Experimental waveforms obtained from the BTB system are compared with simulated waveforms obtained from the software package, “PSCAD/ EMTDC,” under the same operating conditions, circuit parameters, and control gains. Both waveforms agree well with each other not only in steady states but also in transient states. This means that both experiment and simulation are reliable enough to look into more practical systems and fault‐ride‐through (FRT) performance [60].

3.9.1  Circuit Configuration Figure 3.25 shows the overview of the three‐phase 200 V, 10 kW, 50 Hz BTB system that was designed, built, and tested to verify the validity and effectiveness of the capacitor‐balancing control. The two non‐coupled inductors per leg in Figure 3.10

p = vdc idc qA

vSA

Lac

CB-A MC-A 200 V 50 Hz

200 V/200 V



p

PT

∗ ∗ q A and q B

DSP (TMS320C6713)

qB

iSA

R

idc

DSCC-A (Fig.10)

vdc

DSCC-B (Fig.10)

Lac

vCA

MUX 2

R

6

iPA iNA 6

48

iPB iNB 96 96 gate signals

FPGA-A (Altera cyclone II) A/D converters

MUX 6

6

vSB

MC-B CB-B PT

vCB 48

vSuvA vSvwA

iSB

200 V/200 V

vSuvB vSvwB 2

PT: Potential transformer MUX: Multiplexer

FPGA-B (Altera cyclone II) A/D converters

Figure 3.25  Overview of the three‐phase 200 V, 10 kW, 50 Hz downscaled BTB system with no DC‐link capacitor between DSCC‐A and DSCC‐B [59].

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

DSCC-A

DSCC-B

DSP and FPGAs

DAQ-B

DAQ-A

Figure 3.26  Photograph of the experimental BTB system of Figure 3.25 [59].

are replaced with a single center‐tapped inductor LZ per leg in DSCC‐A and DSCC‐B. This replacement brings the two non‐coupled inductors to significant reductions in volume and weight [15]. The AC terminals of each DSCC converter are connected to the three‐phase 200 V AC mains through a per‐phase AC‐link inductor Lac, a starting circuit and a line‐frequency transformer for galvanic isolation. Each of the two line‐frequency transformers is rated at 200 V, 15 kVA, and 50 Hz. The positive directions of idc and p are defined as the direction from DSCC‐A to DSCC‐B (left to right). Figure  3.26 presents the photograph of the 400 Vdc, 10 kW BTB system, including the digital controller and data acquisition systems. This BTB system was used in the following experiments. Table 3.4 summarizes the circuit parameters of Figure 3.25, which were used in both experiment and simulation. The DC reference voltage of each DC floating capacitor is set to vC* = 50 V, so that the DC‐link voltage reference should be set to vdc* = 400 V. Each triangular‐carrier frequency is set at fC = 450 Hz, and its dead or blanking time is 8 µs. Note that 16 triangular‐carrier signals are phase‐shifted each other by 22.5° (= 360°/16) to each other. Therefore, each DSCC converter produces a 17‐level waveform (line‐to‐neutral) with a voltage step as low as 25 V at the AC terminals. The unit capacitance constant of the DC capacitors in Table 3.4, HC, is defined by



HC

3nCvC2 (3.22) 2P

3.9 A DOWNSCALED DSCC‐BASED BTB SYSTEM

189

TABLE 3.4  Circuit parameters for Figure 3.25 [59].

Rated power

P

10 kW

Nominal line‐to‐line rms voltage Nominal line frequency Per‐leg chopper‐cell count AC‐link inductor Center‐tapped inductor Starting resistor DC‐link reference voltage

VS fS n Lac LZ R

200 V 50 Hz 16 2 mH (16%) 3 mH (24%) 20 Ω 400 V

DC‐capacitor reference voltage DC capacitor Unit capacitance constant [57] Triangular‐carrier frequency Equivalent carrier frequency Dead or blanking time

vdc* vC* C HC fC nfC

50 V 6.6 mF 40 ms at 50 V 450 Hz 7.2 kHz 8 µs

Per‐unit values of 16% and 24% are on a three‐phase, 200 V, 10 kW, 50 Hz base.

The energy stored in all the DC capacitors is divided by the rated power of the converter [57]. The SI unit of HC is [J/W] or [s]. The unit capacitance constant is useful and effective in designing DC capacitors and in comparing DC capacitors in one BTB system to another one with different voltage and current ratings. The reason is that the unit capacitance constant can be considered as a kind of per‐unit value, although per‐unit values have no physical unit.

3.9.2  Operating Performance under Transient States Figures 3.27 and 3.28 show the experimental and simulated waveforms in DSCC‐A, where the active‐power reference p* was changed from 10 kW to −10 kW with a ramp function in a time interval of 20 ms. Note that qA* and qB* were set to zero. This means that DSCC‐A changes its operation from the rated rectification to the rated inversion, whereas DSCC‐B does it from the rated inversion to the rated rectification. Such an extremely fast response makes a significant contribution to enhancing transient system stability and frequency‐regulation capability in contingency situations such as emergency disconnections of large‐capacity synchronous generators in thermal power plants from either power system. However, such a fast response may not be required under normal operating conditions. No overcurrent occurred in the supply current iS, the arm currents iP and iN, the circulating current iZ, and the DC‐link current idc. The DC‐link current was changing from 25 A (= 10 kW/400 V) to −25 A. Moreover, the mean DC‐capacitor voltages and the mean DC‐link voltage were well regulated to their references even during the transient period. The experimental and simulated waveforms agree well with each other even under such a transient‐state condition.

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

20 ms [kW] p∗

10 0 –10

[V] vSuvA vSvwA vSwuA [V] vuvA vvwA vwuA [A] iSuA iSvA iSwA [A] iPuA iNuA

400

vSuvA

0 –400

vuvA

400 0 –400

iSuA

50 0 –50 50

iNuA

iPuA

0 –50

[A] iZuA

50 0 –50

[V] vC1uA vC9uA

75

vC1uA

vC9uA

50 25 0

[V] vdc

600 400 200 0

[A] idc

50

24.5 A

0 –50

−23.4 A

Figure 3.27  Experimental waveforms to a ramp change in p* from 10 kW (rated) rectification to 10 kW inversion, where qA* = qB* = 0 [59]. (See electronic version for color representation of this figure.)

3.9 A DOWNSCALED DSCC‐BASED BTB SYSTEM

191

20 ms [kW] p∗

10 0 –10

[V] vSuvA vSvwA vSwuA [V] vuvA vvwA vwuA [A] iSuA iSvA iSwA [A] iPuA iNuA

400

vSuvA

0 –400

vuvA

400 0 –400

iSuA

50 0 –50 50

iNuA

iPuA

0 –50

[A] iZuA

50 0 –50

[V] vC1uA vC9uA

75

vC1uA

vC9uA

50 25 0

[V] vdc

600 400 200 0

[A] idc

50

24.8 A

0 –50

−24.5 A

Figure 3.28  Simulated waveforms to a ramp change in p* from 10 kW (rated) rectification to 10 kW inversion where qA* = qB* = 0 [59]. (See electronic version for color representation of this figure.)

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

(a)

idc [A]

30 25

5 ms τ = 0.9 ms

20 15

(b) idc [A]

30 25

5 ms τ = 0.9 ms

20 15

Figure 3.29  (a) Experimental and (b) simulated waveforms with a small step change in p* from 8 to 10 kW [59]. TABLE 3.5  400 MW HVDC system in the Trans Bay Cable Project [61].

DC power DC voltage DC current Controllable reactive power Cable length Overall system efficiency Commissioned

400 MW ±200 kV 1050 A ±145 Mvar 86 km 96% at 400 MW November 2010

Figure 3.29 shows the experimental and simulated waveforms with a small step change in p* from 8 to 10 kW, where qA* qB* 0. The experimental waveform in Figure  3.29a is almost the same as the simulated waveform in Figure  3.29b except for a few small spikes superimposed on the experimental waveform. These spikes were just unintentional electrical noise that occurred on the PC‐based data acquisition system. The time constant obtained from the experimental and simulated waveforms in Figure 3.29 is as short as about 0.9 ms, which is almost the same as the theoretical value of 0.94 ms [59].

3.10 PRACTICAL APPLICATIONS OF DSCC CONVERTERS TO GRID CONNECTIONS Several back‐to‐back (BTB) systems and long‐distance high‐voltage direct‐current (HVDC) transmission systems, based on DSCC converters, are operating in the world. In addition, there are some ongoing BTB and HVDC projects in Europe, USA, China, Japan, and other countries. Table  3.5 summarizes the ratings and specifications of the long‐distance HVDC system referred to as the Trans Bay Cable project, California, USA [61].

3.11 APPLICATIONS OF DSCC AND TSBC CONVERTERS TO MOTOR DRIVES

193

TABLE 3.6  750 MW BTB unit in the Tres Amigas Superstation [62].

DC power DC voltage DC current Chopper‐cell count Switching devices

750 MW ±326 kV 1150 A 372 cells/arm 3.3 kV 1.5 kA IGBTs

Each DSCC converter has six inductors in total or a single inductor per arm. Each one is an air‐core inductor, which is more bulky but less expensive than a magnetic‐ core inductor. This system is the world’s first long‐distance HVDC system based on DSCC converters. It was reported that this system was able to ride successfully through a two‐phase voltage sag occurring upstream of Potrero substation on March 18, 2016. At that time, the DSCC converter at the side of Potrero substation was operating with inversion mode. Table 3.6 summarizes the ratings and specifications of a DSCC‐based BTB system rated at 750 MW [62]. This is due to be installed at the Tres Amigas superstation on the border of the western interconnection, the eastern interconnection, and ERCOT interconnection in the USA. One power module consists of eight chopper‐cells, and each arm consists of 47 power modules. The final installation capacity will reach 5 GW, including three sets of 750 MW BTB systems based on DSCC converters, and three sets of 920 MW BTB systems based on traditional line‐commutated thyristor converters.

3.11 APPLICATIONS OF DSCC AND TSBC CONVERTERS TO MOTOR DRIVES Historically, the following two main streams exist in basic research on both DSCC and TSBC converters. One has come from three‐phase two‐level voltage‐source inverters and matrix converters [11, 63–65]. The other has come from the SSBC converter shown in Figure 3.8a [14, 15, 38, 41, 46, 59, 66–80]. The former has no inductor connected in series with each arm or cluster, whereas the latter does. The existence of the inductor allows a circulating current to flow through the corresponding arm or cluster. This makes it possible to adjust the circulating current actively and appropriately to provide voltage‐balancing capability for all the chopper‐cell or bridge‐cell capacitors [14, 15, 46].

3.11.1  DSCC‐based Motor Drive Systems Figure 3.30 shows four possible power circuit configurations at the front end of a motor drive using a DSCC converter [81]. Note that no DC‐link capacitor is required between either diode or DSCC rectifier and the DSCC inverter [82].

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

(a)

DSCC inverter

M

DSCC inverter

M

DSCC inverter

M

DSCC inverter

M

NPC

(b)

NPC

(c)

(d)

DSCC rectifier

Figure 3.30  Possible front‐end power‐circuit configurations for a DSCC‐based motor drive. (a) Six‐pulse diode rectifier equipped with a shunt hybrid active filter; (b) 12‐pulse diode rectifier equipped with a shunt hybrid active filter; (c) 18‐pulse diode rectifier at the front end; (d) DSCC rectifier at the front end [81].

Figure 3.30a uses a three‐phase six‐pulse diode rectifier at the front end. This configuration is characterized by eliminating a line‐frequency transformer from the motor drive system. However, it requires installing a shunt hybrid active filter combining a three‐level NPC converter with a single tuned passive filter at the front end, to meet harmonic guidelines [83]. The required power ratings of the passive and active filters are 25% and 6%, respectively, of that of the diode rectifier [25].

3.11 APPLICATIONS OF DSCC AND TSBC CONVERTERS TO MOTOR DRIVES

195

Figure 3.30b is the case where a three‐phase 12‐pulse diode rectifier sits at the front end. A three‐phase 12‐pulse transformer can be employed for voltage matching and galvanic isolation between the supply and the motor. Another shunt hybrid active filter is connected to mitigate the most dominant 11th‐ and 13th‐harmonic currents, where the passive and active filters require power ratings of 8% and 0.8%, respectively, with respect to the power rating of the 12‐pulse diode rectifier [84]. Figure 3.30c uses an 18‐pulse diode rectifier at the front end. This rectifier would meet harmonic regulations without any harmonic filter, but at the expense of using a complicated phase‐shifted‐windings transformer. The three power circuit configurations using the diode rectifiers are suitable for large‐capacity fans, blowers, and pumps in terms of reliability and availability, because neither fast‐ speed control nor regenerative braking is required for these applications. Figure  3.30d shows a back‐to‐back (BTB) system using two DSCC converters, which provides the function of regenerative braking. Three‐phase sinusoidal currents can be drawn from the supply due to three‐phase multilevel voltage waveforms produced by the front‐end DSCC rectifier. This may result in eliminating both the harmonic filter and transformer from the system.

3.11.2 Experimental Motor Drives Using a DSCC Inverter and a TSBC Converter Figure 3.31 illustrates the circuit configuration of a three‐phase DSCC inverter with eight chopper‐cells per arm, which is used for the following experiments. Two arms in each phase are connected in series via a center‐tapped inductor. The center tap of each inductor is directly connected to one of the three motor terminals. Figure 3.32 depicts the 400 V, 15 kW downscaled motor drive system using the DSCC inverter. The mean DC‐capacitor‐voltage reference of each chopper‐cell, vC*, was set to 70 V. Figure 3.33 illustrates the circuit configuration of a three‐phase TSBC converter with four bridge cells per cluster, which is used for the following experiments. The TSBC converter consists of three star‐connected subconverters or SSBC converters, each of which consists of three clusters. Each cluster is connected directly to one of the three terminals in a three‐phase three‐leg inductor. The use of three three‐phase three‐ leg inductors for the TSBC converter makes it possible to reduce their size and weight dramatically, compared with using nine non‐coupled inductors [74]. The neutral point of each subconverter is connected to one of the three motor terminals. Figure 3.34 depicts the 400 V, 15 kW downscaled motor drive system using the TSBC converter. The mean DC‐capacitor‐voltage reference of each bridge cell, vC* was set to 200 V. The following two three‐phase induction motors with the same power rating were used for experiments: one is rated at 50 Hz, 380 V, 15 kW, four poles, and 1460 r/min, while the other is at 38 Hz, 320 V, 15 kW, six poles, and 750 r/min. The former is a general‐purpose motor, and the latter is a specially designed low‐speed, high‐torque motor.

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

a-phase

idc

b-phase

Cell 1b

Cell 1c

Cell 2a

Cell 2b

Cell 2c

Cell 8a

Cell 8b

Cell 8c

vC1a v1a

iPa vdc

c-phase

Cell 1a

iMa iMb

iNa

vMa

vMab iMc

vMb vMc

vC9a Cell 9b

Cell 9c

Cell 10a

Cell 10b

Cell 10c

Cell 16a

Cell 16b

Cell 16c

Cell 9a

Figure 3.31  Circuit configuration of the three‐phase 17‐level DSCC inverter used for experiments. Regenerative load

IG 200 V 50 Hz

τL

vMab Fig.31

vdc

IM

200 V/400 V 400 V/200 V 200 V V ∗C = 70 V

vC MUX 6

N ∗rm

DSP (TMS320C6678)

PG

48 iP iN

6 96 gate signals

FPGA (Altera cyclone IV) MUX: Multiplexer

Nrm

Figure 3.32  The 400 V 15 kW downscaled DSCC inverter system used for experiments [81].

3.11 APPLICATIONS OF DSCC AND TSBC CONVERTERS TO MOTOR DRIVES

v vS

i vS

vw S

iw S v uv a

Subconverter a

i ua

i va

v1 u vCa v1a

u1 vCa

v vw a v wu a

iw a

w1 vCa

Cell 1 v-a

Cell 2 v-a

Cell 2 w-a

Cell 3 u-a

Cell 3 v-a

Cell 3 w-a

Cell 4 u-a

Cell 4 v-a

Cell 4 w-a

Cluster v-a

i uc

Cell 1 w-a

Cell 2 u-a

Cluster u-a

i ub

Subconverter c

i uS

Subconverter b

v uS

197

Cluster w-a

iMa

iMb

vMa

iMc

vMb

vMc

Figure 3.33  Circuit configuration of the three‐phase nine‐level TSBC converter used for experiments.

Figure 3.35 shows the photograph of two sets of induction motors and generators used in the following experiments. The two motors are the same in power rating but are significantly different in volume and weight because their rated frequencies are different. Table 3.7 summarizes the circuit parameters of the DSCC inverter. Table 3.8 summarizes circuit parameters of the TSBC converter.

198

Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

Regenerative load

IG 200 V 50 Hz

τL vMab IM

Fig. 33 200 V/400 V vC V ∗C = 200 V

[v Suvw ] 2

PG

36 MUX

9 uvw

18 N ∗rm

DSP (TMS320C6713)

[i abc ]

144 gate signals

FPGA (Altera cyclone IV) MUX: Multiplexer

Nrm

Figure 3.34  The 400 V 15 kW downscaled TSBC‐converter system used for experiments [81].

Figure 3.35  Photograph of the 50 Hz, 380 V, four‐pole, 15 kW induction motor (back‐left side), the 38 Hz, 320 V, six‐pole, 15 kW induction motor (front‐left side), and mechanically coupled induction generators (right‐side). Note that mechanical‐coupling covers for safety were removed to take this photograph.

3.11.3  Comparisons in Start‐up Performance when the 50 Hz Induction Motor was Driven Figures  3.36 and 3.37 show the experimental start‐up performance of the 50 Hz induction motor loaded at 40% torque, driven by the DSCC inverter and the TSBC converter, respectively. The motor‐speed reference Nrm* was increased up from 0 to 1500 r/min with a ramp rate of 90 r/min/s for both experiments.

3.11 APPLICATIONS OF DSCC AND TSBC CONVERTERS TO MOTOR DRIVES

199

TABLE 3.7  Circuit parameters for Figure 3.31 (DSCC inverter).

Rated active power

P

15 kW

Rated DC‐link voltage Center‐tapped inductor DC capacitor of chopper‐cells DC‐capacitor voltage Unit capacitance constant Cell count per leg Triangle‐carrier frequency Equivalent carrier frequency

Vdc LZ C VC H n fC nfC

560 V 2 mH (5.9%)* 6.6 mF 70 V 52 ms 16 1.5 kHz 24 kHz

*A per-unit value of 5.9% is on a three‐phase 400 V, 15 kW, and 50 Hz base.

TABLE 3.8  Circuit parameters for Figure 3.33 (TSBC converter).

Rated active power Supply line‐to‐line rms voltage Supply line frequency Three‐legged inductor DC capacitor of bridge cells DC‐capacitor voltage Unit capacitance constant Cell count per cluster Triangular‐carrier frequency Equivalent‐carrier frequency

P

15 kW

VS fS L C VC H n fC 2nfC

400 V 50 Hz 5 mH (15%)* 1.7 mF 200 V 81 ms 4 1 kHz 8 kHz

*A per-unit value of 15% is on a three‐phase 400 V, 15 kW, and 50 Hz base.

In Figure  3.36, the AC‐voltage‐mitigating control discussed in [69] was switched over, according to the motor frequency as follows: •• t = t0 to t1 (0 to 20 Hz): it was active where a square‐wave circulating current and a square‐wave common‐mode voltage of 200  V and 100 Hz were superimposed. •• t ≥ t1 (20 Hz): it was inactive completely. Note that the mitigating control gradually deactivates from 10 to 20 Hz, where both circulating current and common‐mode voltage were reduced linearly. The peak value of the arm current iPa takes the maximum of 39 A at 1 Hz and 18 A at 50 Hz. The maximum peak‐to‐peak voltage fluctuation of vC1a is 19 V at 15 Hz. In Figure 3.37, two kinds of AC‐voltage‐mitigating controls were switched over as follows: •• t = t0 to t = t1 (0 to 14 Hz): the control proposed in [73] was active. •• t = t1 to t = t2 (14 to 35 Hz): neither control was active.

200

Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

16.7 s

[r/min] 2000 N*rm

1500 r/min

1000

Nrm [V] vMab

0 800 0

[A]

–800 30

iMa

0

[A] iPa iNa [V] vC1a vC9a

–30 50

39 A ↓

18 A ↓

0 19 V (27% of 70 V) ↓

–50 84 70 42 0

↑ t0

t1

t2

t3

Figure 3.36  Experimental start‐up performance of the DSCC‐driven 50 Hz induction motor loaded at 40% torque. (See electronic version for color representation of this figure.)

•• t = t2 to t = t3 (35 to 40 Hz): the other control in [75] was being gradually activated where both circulating current and DC common‐mode voltage were increasing linearly. •• t ≥ t3 (40 Hz): the mitigating control in [75] was activated completely. The peak value of the cluster current iau in a low‐frequency range was 10 A, and the maximum value around 50 Hz was 41 A. The voltage fluctuation of vCau1 is 67 V at 50 Hz. These experimental results show clear differences in peak‐to‐peak voltage fluctuation and arm or cluster current between the DSCC inverter and the TSBC converter. Figure 3.38 shows the voltage and current waveforms of the DSCC inverter when the motor was loaded at 40% torque, and running at 30 r/min. Each of the positive and negative arm currents in the a‐phase, iPa and iNa, includes the following three‐frequency components; 100 Hz square‐wave circulating current, 1 Hz motor current, and small switching‐ripple components. The rms value of the positive arm current iPa was 15 A in rms (47% on a 32 A base). The capacitor‐voltage fluctuation vC1a was 11 V in peak‐to‐peak (16% on a 70 V base).

3.11 APPLICATIONS OF DSCC AND TSBC CONVERTERS TO MOTOR DRIVES

16.7 s

[r/min] 2000 N*rm 1000 Nrm [V]

0

[A]

–800 30

iMa

0

[A]

–30 50

iua

u1 vCa v1 vCa

1500 r/min

0 800

vMab

[V]

201

0

41 A ↓

10 A ↓

67 V (34 % of 200 V) ↓

–50 240 200

w1

0

vCa

↑ t0

t1

t2

t3

t4

Figure 3.37  Experimental start‐up performance of the TSBC‐driven 50 Hz induction motor loaded at 40% torque. (See electronic version for color representation of this figure.)

[A] iMa iMb iMc [A] iPa iNa [V] vC1a vC9a

500 ms

30 0 –30 50

15 A in rms (47% of 32 A) ↓

0 –50 84 70 42

11 V (16% of 70 V) ↓ ↑

0

Figure 3.38  Experimental steady‐state performance of the DSCC‐driven 50 Hz induction motor loaded at 40% torque and fM =1 Hz. (See electronic version for color representation of this figure.)

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

3.11.4  Operation of the DSCC‐Driven 50 Hz Motor and the TSBC‐Driven 38 Hz Motor at the Rated Frequency and Torque Figure 3.39 shows the steady‐state waveforms of the DSCC‐driven 50 Hz induction motor at the rated motor frequency and torque. Two kinds of voltage ripples were included in the DC‐link voltage vdc: •• One came from the 12‐pulse diode rectifier: it was absorbed by the capacitor of each chopper‐cell. •• The other came from the DSCC inverter: it had no effect on the motor‐drive performance because its voltage step was as small as a single‐capacitor voltage.

[V] vdc

[A] idc [V] vMab vMbc vMca [A] iMa iMb iMc [A] iPa iNa [V] vC1a vC9a

600 520 500 400 50 25 0 600

20 ms

0 –600 50 0 –50 50 0 –50 80

8.2 V (12% of 70 V) ↓

70 60



Figure 3.39  Experimental steady‐state performance of the DSCC‐driven 50 Hz, four‐pole * induction motor loaded at the rated torque at n rm = 1500 r/min. (See electronic version for color representation of this figure.)

3.11 APPLICATIONS OF DSCC AND TSBC CONVERTERS TO MOTOR DRIVES

203

Installing a simple filter on the DC link would eliminate the voltage ripples from the DSCC inverter [82]. Each of three‐phase line‐to‐line voltages, vMab, vMbc, and vMca, has a 27‐level voltage waveform. The multilevel line‐to‐line voltages resulted in three‐phase sinusoidal motor currents iMa, iMb, and iMc. The arm current waveforms iPa and iNa included DC, 50 Hz, and switching‐ripple components, where the switching‐ripple component was negligibly small. Capacitor voltages vC1a and vC9a were balanced perfectly with its peak‐to‐peak value of 6.3 V (9.6%). The experimental results shown in Figure 3.39 suggest that it would be possible to reduce the unit capacitance constant of the DSCC inverter from 52 to 24 ms if a peak‐to‐peak capacitor voltage fluctuation of 25% was acceptable [81]. Figure  3.40 shows the steady‐state waveforms of the TSBC‐driven 38 Hz induction motor at the rated motor frequency and torque. Each of three‐phase line‐ to‐line voltages at the supply side, vauv, vavw, and vawu, had a nine‐level voltage [V] uv

vS vw vS wu vS [A] u

iS v iS w iS [V] vMab vMbc vMca [A] iMa iMb iMc [A] iav u ia iaw [V] u1

vCa

1000 0 –1000 80 0 –80 1000

36 ms

0 –1000 80 0 –80 80 0 –80 300

v1 vCa

200

w1 vCa

100

50 V(25% of 200 V) ↓ ↑

Figure 3.40  Experimental steady‐state performance of the TSBC‐driven 38 Hz, six‐pole * induction motor loaded at the rated torque at n rm = 750 r/min. (See electronic version for color representation of this figure.)

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Chapter 3  Multilevel Converters – Configuration of Circuits and Systems

waveform. This made iSu, iSv, and iSw sinusoidal at unity power factor. Moreover, three‐phase line‐to‐line voltages at the motor side vMab, vMbc, and vMca and currents iMa, iMb, and iMc were controlled to produce the rated torque with a negligible amount of torque ripple. Cluster currents iau, ibu, and icu were controlled to sinusoidal waveforms with small current ripples. The peak‐to‐peak capacitor voltage fluctuation in vCau1, vCav1, and vCaw1 was only 50 V (25%) [81].

3.11.5  Four‐Quadrant Operation of the TSBC‐driven 38 Hz Motor at No Load Torque Figure  3.41 shows experimental waveforms during the so‐called “four‐quadrant operation” of the TSBC‐driven 38 Hz induction motor [77]. This experiment was carried out with no load torque, although the generator was coupled with the motor. The speed reference Nrm* was changed, as shown in Figure 3.41, where the speed‐ ramp rate in both rising and falling was set to such a value that the motor would produce the rated torque during both acceleration and deceleration. It is convincing, from the experimental waveforms, that medium‐voltage, low‐speed, high‐torque motor drives will replace traditional cycloconverters using thyristors with the TSBC converter in the near future.

3.11.6  Discussion of the Two Motor Drives The following simple question may arise: “Which is suitable for motor drives, the DSCC inverter or the TSBC converter?” The answer depends strongly on the torque‐to‐speed profile of a load driven by the motor. The DSCC inverter brings capacitor‐voltage fluctuations to all the chopper‐cells in a low‐frequency range including the startup, whereas the TSBC converter brings them to all the bridge cells as the motor frequency gets close to, and equal to, the supply frequency, even when any appropriate mitigating control is applied. Hence, the exact answer to the above question can be summarized as follows: the DSCC inverter is suitable for a high‐speed motor drive of a load with a quadratic torque‐to‐speed profile such as fans, blowers, pumps, and centrifugal compressors. The TSBC converter is suitable for low‐speed, high‐torque motor drive applications such as mills, kilns, conveyors, and extruders, which are required for regenerative braking.

3.12  DISTRIBUTED DYNAMIC BRAKING of a DSCC‐ FED INDUCTION MOTOR DRIVE This section provides an experimental discussion of dynamic braking for a DSCC‐ fed induction motor. Each chopper‐cell consists of a bi‐directional chopper and and a braking chopper connecting a single small‐rated braking resistor in series

3.12 DISTRIBUTED DYNAMIC BRAKING of a DSCC‐FED INDUCTION MOTOR DRIVE

[r/min] 800 N*rm 0 Nrm –800 [A]

205

700 r/min

0.28 s –700 r/min

60 iuS ivS

0

iw S –60 60

[A] iuS ivS

0

iw S –60 [A]

60 iMa iMb

0

iMc –60 [V]

1000 vMab vMbc 0 vMca –1000

[V]

240 u1 v Ca v1 v Ca 200

vw1

Ca

160

Figure 3.41  Experimental waveforms during four‐quadrant operation in which the motor continued operating at no load torque to run up from a standstill to the speed of 700 r/min over a time period of 0.28 s [77]. (See electronic version for color representation of this figure.)

with a single IGBT. This configuration results in a “distributed dynamic brake” that provides a distinctive welcomed side‐effect of protecting all the bi‐directional chopper‐cells against sudden overvoltage. Experimental waveforms verify satisfactory operating performance in both dynamic braking and overvoltage ­ protection.

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3.12.1  Background and Motivation Some of medium‐voltage motor drives for fans, blowers, pumps, and compressors run day and night, lasting for more than one month. In general, these drive systems often require the capability of dynamic braking, primarily for emergency and maintenance. Dynamic braking is more cost‐effective than regenerative braking in adjustable‐speed motor drives. DSCC‐fed motor drives can use three‐phase diode rectifiers as the front end as long as they require no regenerative braking. However, some motor drives often combine dynamic braking with regenerative braking. The reason is that regenerative braking works well under normal grid conditions, whereas it may not work under abnormal grid conditions such as voltage sags. In the worst case, the motor drives would lose the function of regenerative braking if a so‐called “blackout” occurred. Possible dynamic brakes for the DSCC‐fed motor drives can be divided into: •• centralized dynamic brakes; •• distributed dynamic brakes. A centralized dynamic brake consists of a single medium‐voltage high‐power braking resistor, multiple series‐connected IGBTs, and a medium‐voltage DC‐link capacitor. It is installed at the DC input side of the DSCC inverter. Therefore, strict simultaneous switching of all the IGBTs connected in series is indispensable for stable operation. A distributed dynamic brake integrates a braking chopper consisting of an IGBT and a low‐power braking resistor into each chopper‐cell. This simple circuit configuration enables no series connection of multiple IGBTs, and makes it possible to remove the medium‐voltage DC‐link capacitor from the DSCC inverter. Moreover, the distributed dynamic brake provides an additional function of protecting all the bi‐directional chopper‐cells against sudden overvoltage. This welcomed function makes a system engineer free of concern about the occurrence of sudden overvoltage [85].

3.12.2  Circuit and System Configurations Figure 3.42a shows the overall circuit configuration of a three‐phase DSCC inverter used for the following experiments. Each arm consists of eight chopper cells. Figure 3.42b shows the bi-directional chopper, and Figure 3.42c shows the combined bi‐directional and braking choppers [85]. The IGBTs used in the bi‐directional and braking choppers are the same in voltage rating but different in current rating. Each leg of the DSCC inverter has a center‐tapped DC inductor. The center tap is directly connected to one of the three motor terminals. Here, vdc is the DC‐link voltage, idc is the DC‐link current, vPu and vNu are the positive and negative arm voltages in the u‐phase, respectively, and vuv is the line‐to‐line motor voltage between the u‐phase and the v‐phase. Moreover, vC1u is the u‐phase capacitor voltage in the chopper‐cell

3.12 DISTRIBUTED DYNAMIC BRAKING of a DSCC‐FED INDUCTION MOTOR DRIVE

207

(a) idc

vPu

Cell 1u

Cell 1v

Cell 1w

Cell 2u

Cell 2v

Cell 2w

Cell 8u

Cell 8v

Cell 8w

iPu vdc

iNu

vu vv vw

vuv

iu iv

iw

vNu

Cell 9u

Cell 9v

Cell 9w

Cell 10u

Cell 10v

Cell 10w

Cell 16u

Cell 16v

Cell 16w

(c)

(b)

vC1u

vR1u vC1u

Figure 3.42  Circuit configuration of the three‐phase DSCC inverter consisting of 16 chopper‐cells per leg. (a) Power circuit. (b) Bi-directional chopper. (c) Combined bi‐directional and braking choppers [85].

numbered 1, and vR1u is the voltage across the braking resistor. The u‐phase positive and negative arm currents are represented as iPu and iNu, respectively, and the three‐ phase motor currents are iu, iv, and iw. Figure 3.43 shows the 400 V, 15 kW experimental system. Table 3.9 summarizes the circuit parameters of the experimental system [85]. The IGBTs shown in Figure 3.42c were replaced with low‐voltage MOSFETs because the rated capacitor voltage of each chopper‐cell is 70 V. The triangular carriers used in bi‐directional and braking choppers for pulse width modulation (PWM) have the same frequency of 1.5 kHz. Thus, all the low‐voltage MOSFETs used in both bi‐directional and  braking choppers have the same actual switching frequency of 1.5 kHz.

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Regenerative load IG τL

200 V 50 Hz

Figure 3.42a,c

vuv

vdc

IM DSCC inverter

200 V/200 V/200 V

vC 48 MUX 6

iP iN 6

Braking choppers vC 48 MUX 6

96 gate signals

FPGA V *C N*

48 gate signals

FPGA V *C

DSP

DSP MUX: Multiplexer

Figure 3.43  Experimental system rated at 400 V and 15 kW [85]. TABLE 3.9  Circuit parameters in Figure 3.43.

Rated active power Rated line‐to‐line rms voltage Rated DC‐link voltage Center‐tapped inductor Chopper‐cell capacitor Unit capacitance constant Chopper‐cell count per arm Rated capacitor voltage Braking resistance Triangular‐carrier frequency Equivalent carrier frequency

15 kW VS Vdc LZ C H VC R fC 16fC

400 V 560 V 2 mH (5.9%)* 6.6 mF 52 ms 8 70 V 10 Ω 1.5 kHz 24 kHz

*A per‐unit value of 5.9% is on a 400 V, 15 kW, and 50 Hz base.

Each braking chopper includes a braking resistor of R = 10 Ω. The braking resistor was designed considering the following: •• The maximum peak current allowable is 7 A. •• The continuous power rating is 16 W, and the short‐time (five seconds) power rating is 208 W (16 W × 13), that is, 13 times as high as the continuous power rating. The control system is implemented by two individual digital controllers; one is responsible for the bi‐directional choppers, and the other is for the braking

3.12 DISTRIBUTED DYNAMIC BRAKING of a DSCC‐FED INDUCTION MOTOR DRIVE

209

TABLE 3.10  Motor ratings and parameters in Figure 3.43.

Rated output power Rated line‐to‐line rms voltage Rated frequency Rated rotor mechanical speed Rated stator rms current Pole‐pair number Total moment of inertia Unit inertia constant Rated motor torque

15 kW V f N I p J HJ τM

380 V 50 Hz 1460 r/min 32 A 2 0.2 kg m2 0.16 s 95.5 Nm

A unit‐inertia‐constant value of 0.16 s is on a 15 kW, 1460 r/min base.

choppers. Each of the two controllers are mainly of an FPGA (Cyclone IV) and a DSP (TMS320C6678). The two controllers, independent of each other, require no communications between the two, except for a startup signal in dynamic‐braking operation. Table  3.10 summarizes the ratings and parameters of the induction motor used in this experiment. The total moment of inertia of the motor and generator is 0.2 g⋅m2, which is equal to a unit inertia constant of HJ = 0.16 s.1 The first step is achieved as follows. During motoring operation, the measured DC‐link voltage vdc is used as the reference of the DC‐link voltage control [67]. During dynamic‐braking operation, however, the measured DC‐link voltage is replaced with a preset voltage reference of 630 V, that is, the summation of the DC‐link voltage of 560 V and the rated capacitor voltage of 70 V.2 This comes from the fact that one capacitor voltage is always superimposed on the DC‐link voltage [59]. Secondly, during motoring operation, the overall balancing control adjusts the total DC component of the three circulating currents to regulate the arithmetic‐average voltage of all the 48 capacitors to the rated capacitor voltage reference. As a result, the DC‐link current is regulated indirectly to the summation of three DC‐circulating currents in the u‐, v‐, and w‐phases. During dynamic‐ braking operation, the overall balancing control regulates the three DC‐ circulating currents to zero.

1  The unit inertia constant HJ is defined by the ratio of an amount of rotating kinetic energy with respect to the motor power rating. 2  Practically, it would be preferable to set the DC‐link voltage to be higher by 10% (616 V in this experiment), considering a grid‐voltage swell of 10%. The experiment did not consider the voltage swell.

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3.12.3 Experimental Verification During dynamic‐braking operation, the DSCC inverter should prevent any current flowing from the three‐phase AC mains. This can be achieved by the following steps: •• blocking all the diodes in the rectifier; •• regulating the DC‐link current to zero. Figure 3.44 shows the experimental waveforms obtained from the system shown in Figure 3.43. Here, Figure 3.44a is in the case that no barking chopper was activated, whereas Figure 3.44b is in the case that all the braking choppers were activated. Note that the induction motor was loaded at no torque. The motor speed reference N* started being reduced from the rated speed to zero with a speed‐deceleration rate of 1500 r/min/s from t0. In Figure 3.44a, the capacitor voltages, vC1u and vC9u, were increasing from their rated voltage of 70 V, indicating that the total rotating kinetic energy of the induction motor and generator was being transformed to the electrostatic energy of all the capacitors. The DSCC inverter stopped operating at t1 because the overvoltage protection integrated into the controller was triggered at the instant in time when one of the 48 capacitors reached 90 V. When the rotating kinetic energy is transformed equally to the 48 capacitors, an increased value of each capacitor voltage can be theoretically calculated as 18.7 V. This theoretical value agrees well with the experimental value of 20 V that can be obtained from Figure 3.44a. In Figure  3.44b, the individual times on the horizontal axis indicate as follows: •• t0: the time when the dynamic brake started to be operated. •• t1 and t2: the times at the beginning and end of the zoomed-up waveforms shown in Figure 3.45, respectively. •• t3: the time when the AC‐voltage‐fluctuation mitigation control [69] started to be operated. •• t4: the time when the motor speed reached zero. The actual motor speed N was following its reference N* from t0 to t4 without causing any instability. The DC‐link voltage vdc increased smoothly from 560 V to 630 V at t0. Before and after t3, the waveforms of the arm currents, iPu and iNu, changed from sinusoids (t0 ≤ t ≤ t3) to trapezoids (t ≥ t3) because the AC‐voltage‐fluctuation mitigation control [69] was activated at t3. As a result of having injected a non‐ negligible amount of common‐mode voltage, the DC‐link voltage changed its amplitude at the instant of t3. However, it caused no negative effect on the dynamic braking performance, as can be seen from the waveform of the motor speed N. The mean DC values of vC1u and vC9u were regulated to 70 V in all the speed ranges. The waveform of vR1u concludes that the braking chopper was operating properly to consume the rotating kinetic energy coming from the motor.

(a)

Overvoltage protection triggered

0.1 s

N

[r/min] 1500 N* 750 N 0 [V] 600 vuv 0 vvw vwu –600 [A] 50 iu 0 iv iw –50 [V] 800 vdc 630 → [A] iPu iNu [V] vC1u vC9u [V] vR1u

N*

0 50 0 –50 100 70

20 V↑↓

0 70 0

t0

(b)

t1

1s

[r/min] 1500 N* 750 N 0 [V] 600 vuv vvw 0 vwu –600 [A] 50 iu 0 iv iw –50 [V] 800 vdc 630 → [A] iPu iNu [V] vC1u vC9u [V] vR1u

N →← 10 ms N*

0 50 0 –50 100 70 0 100 70 0

t0 t1 t2

t3

t4

Figure 3.44  Experimental waveforms during distributed dynamic braking, where the induction motor was operated at no‐load torque. (a) Dynamic braking without activating any braking chopper. (b) Dynamic braking while activating all the braking choppers [85]. (See electronic version for color representation of this figure.)

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[V]

2 ms

100

→ ← 0.17 ms

70 VR1u 0

t1

t2

Figure 3.45  Time‐expanded waveform of vR1u from t = t1 to t2 in Figure 3.44b. [V] vCju j=1–8 [V] vR1u

1s

100 80 → 70 60 100 70 0

vC1u

t0

t1

Figure 3.46  Experimental waveforms of eight capacitor voltages, where the capacitor voltage numbered 1 in the u‐phase started being increased intentionally from 70 V at t0, and the corresponding braking chopper started operation at t1 [85]. (See electronic version for color representation of this figure.)

Figure 3.45 shows the expanded waveform of vR1u with respect to time and voltage in Figure 3.44b from t1 to t2. During an interval of 2 ms, the voltage pulses can be counted up as three because the triangular‐carrier frequency was set to 1.5 kHz. The duty ratio was measured as 25%, where the power consumed by a single braking resistor can be calculated as 123 W (= 7 A × 7 A × 10 Ω × 0.25). It was still lower than the designed short‐time power rating of 208 W. Figure 3.46 shows the experimental waveforms of all the eight capacitor voltages in the u‐phase positive arm. Among them, the DC mean voltage of vC1u was being increased intentionally from 70 to 80 V at t0 with the help of the individual‐ balancing control [14]. The motor speed reference was set to 1080 r/min, and the motor was loaded at 50% of the rated torque. After the braking chopper was enabled at t1, the DC mean value of vC1u decreased immediately to 70 V with an acceptable undershooting voltage. The waveform of vR1u verified that the braking chopper has the capability to protect the chopper‐cell capacitor against the sudden overvoltage.

3.13 PRACTICAL APPLICATIONS OF DSCC INVERTERS TO MEDIUM‐VOLTAGE MOTOR DRIVES Benshaw, presently taken over by Regal Beloit Corporation, and Siemens AG have put medium‐voltage motor drives using DSCC inverters on the market. Table 3.11 summarizes the electrical specifications of the product from Benshaw [86], and Table 3.12 the product from Siemens AG [87].

3.14 FUTURE SCENARIOS AND CONCLUSION

213

TABLE 3.11  Motor drive system from Benshaw [86].

Product name System configuration Motor voltage Motor frequency Motor power Line‐side converter Cooling Applications

M2L 3 000 Series Figure 3.30c 2.3–6.6 kV 0–180 Hz 0.23–7.5 MW 18‐pulse (min.) diode rectifier Forced air cooling Fans, blowers, and pumps

TABLE 3.12  Motor drive system from Siemens AG [87].

Product name System configuration Motor voltage Motor frequency Motor power Line‐side converter Cooling Applications

GH150 drive Figure 3.30c 4.16–7.2 kV 0–150 Hz 4–30 MW 12‐pulse to 36‐pulse diode rectifier Water cooling Fans, blowers, and pumps

Both manufacturers use three‐phase 12‐pulse to 36‐pulse diode rectifiers at the front end. Since the diode rectifiers have no capability for regenerative braking, practical applications of the DSCC‐fed motor drives to industry include fans, blowers, and pumps for energy savings. The adoption of the DSCC‐fed motor drives shown in Figure 3.30a,d will make it possible to eliminate the 12‐pulse to 36‐pulse multiwinding line‐frequency phase‐shifted transformers from medium‐ voltage motor drive systems in the near future. No company or manufacturer has commercialized medium‐voltage motor drives using TSBC converters due to reasons including costs. However, traditional line‐commutated cycloconverters will be replaced by TSBC converters in the near future.

3.14  FUTURE SCENARIOS AND CONCLUSION Classic multilevel converters include NPC, NPP and FLC inverters, and their ­combinations, while modern multilevel converters include a family of modular multilevel cascade converters. Some have already established a good business market, some have been in the R&D stage, and others have been in the academic research stage.

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Future scenarios for multilevel converters can be summarized as follows: •• Replacing traditional IGBT modules with the latest SiC‐MOSFET/SBD modules bring higher “power efficiency” and “energy efficiency” not only at the rated load but also in partial loads to multilevel converters. Hence, it makes the heat sinks or cooling systems that are indispensable to SiC‐ MOSFET/SBD modules simpler in configuration, smaller in size, and lighter in weight. As a result, it would bring cost reductions to the whole power conversion system. •• Passive components such as capacitors, inductors, and transformers will take the place of the main players in the near future, although they are considered as the supporting players at present [53]. Moreover, line‐frequency transformers would be eliminated, or replaced with medium‐frequency transformers. •• Remote sensing and monitoring in collaboration with the cutting‐edge “Internet of Things” will make a significant contribution to conditioning modular multilevel cascade converters and motor drives, as well as to diagnosing and/or preventing their malfunction [54]. Many research scientists and engineers in power electronics have long been dreaming of “a multilevel converter higher in efficiency than a line‐frequency (50 or 60 Hz) transformer when the converter and the transformer had the same voltage and current ratings.” Sophisticated converter design and fabrication, along with the use of the latest SiC‐MOSFET/SBD modules with extremely low internal stray inductance values, will make the dream come true in the near future [1]. Fortunately or unfortunately, no “versatile” multilevel converter exists from a practical point of view, or strictly speaking, in terms of cost‐effectiveness. This fact will encourage scientists and engineers of power electronics to do further research on multilevel converters in a broad sense.

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[31] P. Barbosa, P. K. Steimer, J. Steinke, L. Meysenc, M. Winkelnkemper, and N. Celanovic. “Active neutral‐point‐clamped multilevel converters,” Proc. IEEE PESC, June 2005, pp. 2296–2301. [32] M. Narimani, B. Wu, Z. Cheng, and N. R. Zargari. “A new nested neutral point‐clamped (NNPC) converter for medium‐voltage (MV) power conversion,” IEEE Trans. Power Electron., vol. 29, no. 12, pp. 6375–6382, Dec. 2014. [33] J. Li, J. Jiang and S. Qiao. “A space vector pulsewidth modulation for five‐level nested neutral‐ point‐piloted converter,” IEEE Trans. Power Electron., vol. 32, no. 8, pp. 5991–6004, Aug. 2017. [34] W. McMurry. “Fast response stepped‐wave switching power converter circuit,” US Patent, 3 581 212, May 24, 1971. [35] A. Alesina and M. G. B. Venturini. “Solid‐state power conversion: A Fourier analysis approach to generalized transformer synthesis,” IEEE Trans. Circuits Syst., vol. 28, no. 4, pp. 319–330, July/ Aug. 1981. [36] Y. Fukuta and G. Venkataramanan. “DC bus ripple minimization in cascaded H‐bridge multilevel  ­ converters under staircase modulation,” Proc. IEEE IAS Annual Meeting, Oct. 2002, pp. 1988–1993. [37] C. Oates. “A methodology for developing ‘chainlink’ converters,” Proc. EPE, Sept. 2009. [38] H. Akagi. “Classification, terminology, and application of the modular multilevel cascade converter (MMCC),” IEEE Trans. Power Electron., vol. 26, no. 11, pp. 3119–3130, Nov. 2011. [39] J. Dorn, H. Gambach, J. Strauss, T. Westerweller, and J. Alligan. “HVDC and power electronic systems for overhead line and insulated cable applications,” Proc. CIGRE San Francisco Colloquium, 2012, no. B4–8. [40] C. Oates and G. Mondal. “DC circulating current for capacitor voltage balancing in modular multilevel matrix converter,” Proc. EPE, Aug. 2011. [41] L. Baruschka and A. Mertens. “A new three‐phase ac/ac modular multilevel converter with six branches in hexagonal configuration,” IEEE Trans. Ind. Appl., vol. 49, no. 3, pp. 1400–1410, May/ June 2013. [42] C. Lee, B. Wang, S. Chen, S. Chou, J. Huang, P. Cheng, H. Akagi, and P. Barbosa. “Active power balancing control of a STATCOM based on the cascaded H‐Bridge PWM converter with star configuration,” IEEE Trans. Ind. Appl., vol. 50, no. 6, pp. 3893–3901, Nov./Dec. 2014. [43] J. I. Y. Ota, Y. Shibano, N. Niimura, and H. Akagi. “A phase‐shifted PWM D‐STATCOM using a modular multilevel cascade converter (SSBC) – Part I: Modeling, analysis, and design of current control,” IEEE Trans. Ind. Appl., vol. 51, no. 1, pp. 279–288, Jan. 2015. [44] J. I. Y. Ota, Y. Shibano, and H. Akagi. “A phase‐shifted PWM D‐STATCOM using a modular multilevel cascade converter (SSBC) – Part II: Zero‐voltage‐ride‐through capability,” IEEE Trans. Ind. Appl., vol. 51, no. 1, pp. 289–296, Jan. 2015. [45] M. Hagiwara, R. Maeda, and H. Akagi. “Negative‐sequence reactive‐power control by a PWM STATCOM based on a modular multilevel cascade converter (MMCC‐SDBC),” IEEE Trans. Ind. Appl., vol. 48, no. 2, pp. 720–729, Mar./Apr. 2012. [46] N. Niimura and H. Akagi. “Decoupled control of a three‐phase modular multilevel cascade converter based on double‐star chopper‐cells” (in Japanese), IEE Japan, vol. 132‐D, no. 11, pp. 1055– 1064, Nov. 2012. [47] L. Maharjan, S. Inoue, H. Akagi, and J. Asakura. “State‐of‐charge (SOC)‐balancing control of a battery energy storage system based on a cascade PWM converter,” IEEE Trans. Power Electron., vol. 24, no. 6, pp. 1628–1636, June 2009. [48] L. Maharjan, T. Yamagishi, and H. Akagi. “Active‐power control of individual converter cells for a battery energy storage system based on a multilevel cascade PWM converter,” IEEE Trans. Power Electron., vol. 27, no. 3, pp. 1099–1107, Mar. 2012. [49] N. Kawakami, S. Ota, H. Kon, H. Akagi, H. Kobayashi, and N. Okada. “Development of a 500‐kW modular multilevel cascade converter for battery energy storage systems,” IEEE Trans. Ind. Appl., vol. 50, no. 6, pp. 3902–3910, Nov./Dec. 2014. [50] J. I. Y. Ota, T. Sato, and H. Akagi. “Enhancement of performance, availability, and flexibility of a battery energy storage system based on a modular multilevel cascade converter (MMCC‐SSBC),” IEEE Trans. Power Electron., vol. 31, no. 4, pp. 2791–2799, Jan. 2016.

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[71] Y. Okazaki, M. Hagiwara, and H. Akagi. “A speed‐sensorless start‐up method of an induction motor driven by a modular multilevel cascade inverter (MMCI‐DSCC),” IEEE Trans. Ind. Appl., vol. 50, no. 4, pp. 2671–2680, July/Aug. 2014. [72] J. Kolb, F. Kammerer, G. Mario, and M. Braun. “Cascaded control system of the modular multilevel converter for feeding variable‐speed drives,” IEEE Trans. Power Electron., vol. 30, no. 1, pp. 349–357, Jan. 2015. [73] W. Kawamura, M. Hagiwara, and H. Akagi. “Control and experiment of a modular multilevel cascade converter based on triple‐star bridge cells,” IEEE Trans. Ind. Appl., vol. 50, no. 5, pp. 3536– 3548, Sept./Oct. 2014. [74] W. Kawamura, M. Hagiwara, and H. Akagi, “A low‐speed, high‐torque motor drive using the modular multilevel cascade converter based on triple‐star bridge cells (MMCC‐TSBC),” IEEE Trans. Ind. Appl., vol. 51, no. 5, pp. 3965–3974, Sept./Oct. 2015. [75] W. Kawamura, Y. Chiba, M. Hagiwara, and H. Akagi. “Experimental verification of an electrical drive fed by a modular multilevel TSBC converter when the motor frequency gets closer or equal to the supply frequency,” IEEE Trans. Ind. Appl., vol. 53, no. 3, pp. 2297–2306, May/June 2017. [76] W. Kawamura, Y. Chiba, and H. Akagi. “A broad range of speed control of a permanent magnet synchronous motor driven by a modular multilevel TSBC converter,” IEEE Trans. Ind. Appl., vol. 53, no. 4, pp. 3821–3830, July/Aug. 2017. [77] W. Kawamura, M. Hagiwara, H. Akagi, M. Tsukakoshi, R. Nakamura, and S. Kodama. “AC‐ inductors design for a modular multilevel TSBC converter, and performance of a low‐speed high‐torque motor drive using the converter,” IEEE Trans. Ind. Appl., vol. 53, no. 5, pp. 4718– 4729, Sept./Oct. 2017. [78] F. Kammerer, M. Gommeringer, J. Kolb, and M. Braun. “Energy balancing of the modular multilevel matrix converter based on a new transformed arm power analysis,” Proc. EPE, Aug. 2014. [79] A. J. Korn, M. Winkelnkemper, P. K. Steimer, and J. W. Kolar. “Direct modular multilevel converter for gearless low‐speed drives,” Proc. EPE, Aug. 2011. [80] F. Kammerer, M. Gommeringer, M. Schnarrenberger, and M. Braun. “Operating performance of the modular multilevel matrix converter in drive applications,” Proc. IEEE PCIM, May 2015, pp. 549–556. [81] Y. Okazaki, W. Kawamura, M. Hagiwara, H. Akagi, T. Ishida, M. Tsukakoshi, and R. Nakamura. “Experimental comparisons between modular multilevel DSCC inverters and TSBC converters for medium‐voltage motor drives,” IEEE Trans. Power Electron., vol. 32, vol. 3, pp. 1805–1817, Mar. 2017. [82] H. Peng, M. Hagiwara, and H. Akagi. “Modeling and analysis of switching‐ripple voltage on the dc link between a diode rectifier and a modular multilevel cascade inverter (MMCI),” IEEE Trans. Power Electron., vol. 28, no. 1, pp. 75–84, Jan. 2013. [83] “IEEE recommended practice and requirements for harmonic control in electric power systems,” IEEE Std 519‐2014, pp. 1–29, 2014. [84] H. Akagi and K. Isozaki. “A hybrid active filter for a three‐phase 12-pulse diode rectifier used as the front end of a medium‐voltage motor drive,” IEEE Trans. Power Electron., vol. 27, no. 1, pp. 69–77, Jan. 2012. [85] Y. Okazaki, S. Shioda, and H. Akagi. “Performance of a distributed dynamic brake for an induction motor fed by a modular multilevel DSCC inverter,” IEEE Trans. Power Electron., vol. 33, vol. 6, pp. 4796–4806, June 2018. [86] BENSHAW, Medium‐Voltage Variable Frequency Drive M2L 3000 Series. Available online at http://www.benshaw.com/ [87] SIEMENS Sinamics Perfect Harmony GH 150 drives. Available online at http://www.siemens. com/sinamics‐perfect‐harmony‐gh150

Ch a p t e r 

4

MULTILEVEL CONVERTERS – CONTROL AND OPERATION IN INDUSTRIAL SYSTEMS Jose I. Leon, Sergio Vazquez and Leopoldo G. Franquelo

4.1 INTRODUCTION The increasing demand for electrical energy worldwide is coming hand‐in‐hand with the development of new power electronic converters capable of managing high power. The power limits of the power converters are defined by the power switch features and the cooling systems. If the power of a specific application is higher than the maximum limit of a power converter, a classical solution is to install extra power converters working in parallel to deal with it. This increases the cost of the power conversion system. In addition, the use of several power converters working in parallel introduces drawbacks such as non‐negligible resonances and circulating currents, which lead to efficiency reduction. One way to face the challenge of high‐power conversion, but avoiding the use of parallel converters, is to design new power converters capable of increasing the maximum power conversion rating limits in terms of maximum DC‐link voltage and maximum currents. One possible option is to build a power converter but connecting the power devices in series and parallel to achieve higher voltages and currents respectively. However, this solution presents problems with voltage and current imbalances due to the unavoidable mismatching between the power devices. This leads to a complex converter design, reducing the power system reliability. In order to overcome

Power Electronics in Renewable Energy Systems and Smart Grid: Technology and Applications, First Edition. Edited by Bimal K. Bose. © 2019 by The Institute of Electrical and Electronics Engineers, Inc. Published 2019 by John Wiley & Sons, Inc.

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this problem, for more than half a century, academia and industry have been working together on the development of a new family of power converters, usually called multilevel converters [1–3]. In general terms, multilevel converters are capable of dealing with high‐ power applications thanks to the converter topology design. In some cases, the multilevel converter circuits stack the power devices in series in order to share the medium or high voltage present in the DC‐link. This is the case of the well‐known neutral‐point‐clamped (NPC) converter or the flying capacitor (FC) converter. Another possibility for achieving high voltages is to split off the DC‐link voltage in  several independent DC voltages, as is the case for the well‐known cascaded H‐bridge (CHB) converter topology. As usually happens, the introduction of multilevel converters introduces a high number of advantages, but also comes with some disadvantages and challenges to be faced. These pros and cons can be listed as follows: •• Increase of the nominal power of the conversion system without exceeding the power device limits (voltages and currents). •• High quality of the output waveforms (voltages and currents) because of the large number of output voltage levels. •• Possible reduction of the output filter stage, leading to a decrease in the weight, volume and cost of the power converter. •• Possible fault‐tolerant capability (depends on the multilevel converter topology) leading to continued operation of the converter even when one or several power devices fail. •• The management of control signals and data acquisition becomes more complex because the number of power devices (active and passive) is higher. •• The control methods are more complex because extra control targets, such as internal DC voltage balancing, are required. •• The modulation strategies are also more complex in order to achieve maximum quality of output waveforms with minimum power losses. It has to be said that academia has been facing the disadvantages of multilevel converters for the last decades. Nowadays, it can be affirmed that most of the challenges have been overcome with the development of new modulation and control techniques. These techniques, although complex compared with the conventional ones applied to classical two‐level converters, can be easily implemented in current microprocessors. In this way, a large number of multilevel converters can now be found as commercial products in a good number of product portfolios in the power electronics industry. Multilevel converters are currently successfully applied for applications such as motor drives (fans, pumps, conveyors, compressors, etc.), high‐voltage DC transmission systems (HVDC), inverters for renewable energy sources, and flexible AC transmission systems (FACTS), among others [4, 5].

4.2  SUMMARY OF MULTILEVEL CONVERTER TOPOLOGIES

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4.2  SUMMARY OF MULTILEVEL CONVERTER TOPOLOGIES As commented previously, multilevel converters are an attractive solution mainly for medium‐power high‐voltage applications, and many commercial products can nowadays be found. In this section, a brief summary of some of the main topologies adopted by industry will be presented. In Figures  4.1 to 4.5, some multilevel converter topologies are represented, also introducing their advantages and drawbacks. It should be noted that Chapter 3 focused on introducing these topologies in detail. Mature technology for three-level converters, possibly the most successful multilevel converter topology to date

Sa1 Vdc +

Simple multi carrier modulation method based on level-shifted PWM

2

Sa2 a

Vdc Sa1

Zero-sequence injection to carry out DC-link voltage balance control Typical applications: FACTS and motor drives for fans, pumps, blowers, compressors, conveyors Unequal usage of power devices leading to unequal aging

Vdc + 2

Sa2

Not straightforward extension to achieve more than three levels because of the impossibility of achieving dc-link voltage balance control

Figure 4.1  NPC circuit topology (single‐phase circuit) and pros and cons. + Vdc S1

S1

+ m–1 V dc m

S2

S2

Operated using PS-PWM leading to high quality output waveforms with low power losses per cell and aging equalization Topology formed by the connection of simple power cells composed of two power devices and one floating capacitor leading to high modularity The floating capacitor voltages are naturally controlled using the PS-PWM method Typical applications: FACTS and motor drives mainly for traction purposes

+ Vdc Sm

m

Sm

a

Multilevel converter topology protected by a patent Large number of capacitors leading to a reduction in the converter lifetime The natural DC voltage balance of floating capacitors using PS-PWM has low dynamic performance and requires high output frequency

Figure 4.2  FC circuit topology (single‐phase circuit) and pros and cons.

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Vdc

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Operated with PS-PWM leads to high performance output waveforms with power loss equalization

AC

Mature converter topology capable of achieving very high DC voltages by stacking power cells

DC

Va Vdc

Very high modularity because the converter is formed by the series connection of power cells (usually full bridges)

AC DC

+

Power cell

S1

S2 Out+

_ S1

Straight forward fault tolerant capability adding bypass switches per cell Typical applications: FACTS and motor drives Out–

_ S2



The converter requires an independent DC source per cell (or operates with floating capacitors) Requires a complex structure if a back-to-back configuration is required

Figure 4.3  CHB circuit topology (single‐phase circuit) and pros and cons. Recent converter topology becoming mature mainly for high-voltage DC transmission (HVDC) using a back-to-back configuration The converter topology is capable of achieving very high dc voltages by stacking a large number of power cells which usually are half-bridges

AC DC

AC

Very high modularity with straight forward fault tolerant capability

DC

a

Vdc

Power cell AC Sa

DC

AC DC

Sa

Usually operated using nearest level control per phase which achieves high performance, power loss equalization and DC voltages control The converter is usually formed by a large number of cells which deals to a complex control hardware structure and rate limitations for data management The converter presents floating DC voltages which need to be controlled. This can be done but is complex when the number of cells is large

Figure 4.4  Modular multilevel converter (MMC) circuit topology (single‐phase circuit) and pros and cons.

All these converter topologies have had industrial impact, playing an important role in the last decades in the medium‐power range. It can be affirmed that the NPC and the CHB are probably the most successful multilevel converter topologies for motor drives and grid‐connected applications. Year by year, more power converter manufacturers introduce these converter topologies into their product portfolios for classical applications and also for recent ones. Modifications of the conventional multilevel converter topologies are also periodically introduced in order to fit with specific applications that require particular features. Every year, new multilevel converter topologies appear, such as the three‐level active NPC [6],

4.3  CONTROL STRUCTURE OF MULTILEVEL POWER CONVERTERS

Vdc + 2

Three-level topology recently commercialized as a industrial product for medium-power grid-tied applications (up to 2.7 MW)

S1 S2 a

Vdc Vdc + 2

223

S2 S3

Simple converter topology similar to NPC but avoiding the use of clamping diodes Similar operation compared with NPC with the possibility to use exactly the same controller and very similar modulator based on LS-PWM The reduced number of power devices leads to high efficiency with low power losses The outer power devices have to block all the DC-link voltage which reduces the possibility of using the converter in medium-voltage range applications

Figure 4.5  T‐type circuit topology (single‐phase circuit) and pros and cons. TABLE 4.1  Summary of the most well‐known multilevel converter topologies.

Converter topology Neutral‐point‐clamped (NPC) Flying capacitor (FC) Cascaded H‐bridge (CHB) T‐type converter (T‐type) Active NPC (ANPC) Five‐level H‐bridge NPC (5 L‐HNPC) Five‐level active NPC (5 L‐ANPC) Modular multilevel converter (MMC)

Ref.

Commercial product

[15–17] [18] [19, 20] [21] [6] [7] [14] [22, 23]

MV7000 by GE ALSPA VDM6000 by ALSTOM MVW3000 by WEG Solar Ware Samurai by TMEIC PCS8000 by ABB Dura‐Bilt5i MV by TMEIC ACS2000 by ABB HVDC PLUS by Siemens

the five‐level H‐bridge NPC [7], the stacked multicell [8, 9], the packed U‐cell [10], the cross‐connected multilevel converter [11], series‐connected two‐level plus H‐bridge converter [12], the generalized multilevel active‐clamped converter [13], and the five‐level active NPC [14], among others. A summary of some commercial products implementing the most well‐ known multilevel converter topologies is presented in Table 4.1.

4.3  CONTROL STRUCTURE OF MULTILEVEL POWER CONVERTERS The general structure of a closed‐loop operation of a multilevel converter is shown in Figure 4.6. Taking into account the measurements of the power system, a first stage of the control structure is usually the outer control loop which takes into account the control targets defined by the user in order to generate the reference currents to be generated by the power converter.

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Stage 4

Measurements

Stage 2

Current measurements

Stage 3

Measurements

Stage 1

Rotational speed, torque, flux for motor drives dc-link voltage for active-front ends

Target

Outer control loop i* Inner control loop v*

^*

Zero-sequence v injection

Modulator

In-phase balancing strategy

v *k

Sj

Figure 4.6  General operational structure of a multilevel converter: control and modulation stages.

These current references are the input for the second stage, that is, the inner control loop which generates the reference voltages to be generated by the power converter in order to achieve the current control. As a third control structure stage, a modification of the voltage reference can be done. This is usually carried out by a zero‐sequence injection (such as the third harmonic injection method). As a particular issue for multilevel converters, an additional modification can also be done by applying modifications in the voltage reference per phase – what is called the in‐phase balancing strategy in Figure 4.6. Finally, the output of the third stage is the reference voltage to be generated by the power converter. This is done carrying out a modulation method which generates the firing pulses of the power devices. It is important to note that the structure introduced in Figure 4.6 is not used by other control methods such as the direct torque control (DTC) (for motor drive applications), the direct power control (DPC) (for grid‐connected applications) or the finite states model predictive control (FS‐MPC) method [24–31]. These control techniques were initially introduced for conventional two‐level converters and have been successfully adapted to be used in multilevel converters. DTC and DPC are based on the definition of look‐up tables, which define a priori the switching of the power converter depending on the instantaneous control

4.3  CONTROL STRUCTURE OF MULTILEVEL POWER CONVERTERS

225

target errors. So, they do not present outer or inner control loops and they even avoid the use of modulators because they apply just one switching state every ­sampling period.

4.3.1  The Outer Control Loop (Stage 1) The outer control loop receives as inputs the control targets defined by the user. For instance, in motor drive applications, the objective is to regulate the speed (or the torque) of the machine [32]. In the case of grid‐connected applications operating as a rectifier (usually called active front end, AFE), the control target is to keep the DC‐link voltage constant. In the case of an uninterruptible power supply (UPS) system, the control objective is to generate a pure sinusoidal voltage, whatever the load may be. In the case of using a power converter working as a static synchronous compensator (STATCOM), the target is to generate a specific value of reactive power. In this way, any application defines the control objectives, which are the inputs of the outer control loop. For instance, for the AFE application, a well‐known solution is based on using a proportional plus integral (PI) controller [33, 34]. Other possible methods such as the passivity control or PI including an extended state observer, among others, can also be used [35–38]. The outer control loop is executed every sampling time and determines the reference currents to be generated by the power converter in order to achieve the control targets. These reference currents can be expressed in the natural abc ia* ,ib* ,ic* , stationary αβ (i* , i* ) or synchronous dq (id* , iq* ) reference frames.

4.3.2  The Inner Control Loop (Stage 2) Each sampling time, the inner control loop receives as input the current reference values i*. These are the currents that the power converter has to generate in order to achieve the desired control targets defined by the user. In order to implement this inner control loop, the dynamic equations of the power converter output currents have to be known. These equations can be obtained from the system model, taking into account what is connected in the power converter output terminals. In the case of motor drive applications, the power converter is connected to a machine (an induction machine (IM), permanent magnet synchronous machine (PMSM), etc.) [39]. On the other hand, for grid‐tied applications, the power converter output terminals are connected to the grid by an output filter (L filter, LC filter, etc.) [33, 40, 41]. As commented previously, the inner control loop can be defined in different reference frames. For instance, in the case of motor drive applications, the synchronous dq reference frame is normally used. In order to implement the inner control loop, the well‐known field oriented control (FOC) method is usually adopted. FOC is based on PI regulators to control the current flowing into the machine [42].

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In the case of grid‐tied applications, the inner control loop is mostly based on the well‐known voltage oriented control (VOC) method, which is the dual case of the FOC technique for motor drive applications. VOC is usually developed in the dq frame and also is based on PI regulators including a decoupling term [43–45]. As the converter is connected to the grid, VOC needs a phase‐locked loop (PLL) or a frequency‐locked loop (FLL) to achieve synchronization with the grid voltage [46– 48]. It is important to note that VOC method only takes into account the fundamental frequency component and presents some problems with distorted or unbalanced grid conditions. In these cases, the VOC method has to be modified to achieve high performance [49]. The inner control loop can be also implemented using the stationary αβ reference frame. These controllers are normally based on a proportional plus resonant (PR) filter tuned at the harmonic components of interest [50–52]. Finally, the inner control loop output is the reference voltage v* to be generated by the power converter. As the inner control loop can be defined in different reference frames, the same happens with the reference voltage, and (va* , vb*, vc*) for the abc frame, (v* , v*) for the stationary αβ frame, or (vd* , vq*) for the synchronous dq frame can be used.

4.3.3  The Zero‐Sequence Injection (Stage 3) Once the reference voltage has been determined by the inner control loop, it can be  generated directly by the power converter by applying a proper modulation ­technique. However, in many applications, a previous modification is done to the reference voltages in order to improve some power converter features. For instance, the zero‐sequence injection methods add or subtract a specific voltage to all reference phase voltages and, therefore, it is applied in the abc frame. If it is done in a proper manner, it affects the phase voltages but does not affect to the phase‐to‐phase voltage or the phase currents. A conventional zero‐sequence injection method is the third harmonic injection which can be applied to any three‐phase voltage source converter. In this method, a scaled sinusoidal waveform with three times the fundamental frequency is added to the reference voltages. As the triple harmonics are naturally eliminated in a balanced three‐phase system, it does not introduce disadvantages. The third harmonic injection method extends the DC‐link voltage utilization by approximately 15%. A similar method to the third harmonic injection is the well‐known min‐max injection technique, which also adds a waveform with triple fundamental frequency to the reference voltages. In this case, the waveform is determined by measuring at each sampling time the maximum and minimum reference voltages. It achieves the same good results as the classical third harmonic injection, but comparing both methods, the min‐max method is superior. It can be applied without the synchronization requirement of the third harmonic injection method. These methods can also be applied to multilevel converters. In fact, the zero‐ sequence injection techniques can carry out DC voltage balance control in NPC or

4.4  MODULATION METHODS FOR MULTILEVEL POWER CONVERTERS (STAGE 4)

227

T‐type converters. This idea came with the invention of the NPC converter [53]. In fact, it has been demonstrated that the DC‐link voltage imbalance in the NPC is directly related to the third harmonic component of the power converter output voltages [54]. In this way, a possibility for achieving this control objective is to manage the amplitude of the zero‐sequence injection by introducing a simple controller. Consequently, the zero‐sequence injection was also proposed as part of the control including a PI regulator [33]. Another approaches include a properly tuned resonant filter or a Luenberger observer [34, 55]. In addition, zero‐sequence injection can deal with the circulating current minimization in MMC or three‐phase delta‐connected CHB converters. In this case,  the zero‐sequence injection amplitude is determined normally by a PI ­regulator [56]. If the grid is not balanced, the method has to be correspondingly modified [57]. It is important to note that the zero‐sequence injection methods are related to  carrier‐based modulation methods. However, the same concept has also been applied to vector‐based modulation methods, taking into account the redundant vectors present in multilevel converters. In this way, the zero‐sequence injection method can appear as a separate task or can be included in the modulation ­technique [58].

4.3.4  The In‐phase Balancing Strategy (Stage 3) This part of the control structure shown in Figure 4.6 is only present in multilevel converters and is optional. Using the in‐phase balancing strategy, the DC voltages of each phase of converters such as the CHB or the MMC can be controlled. It is important to note that this method is applied independently per phase once the phase reference voltage has been determined by the previous stages. The in‐phase balancing strategy can be included directly in the controller stages, but can also be part of the modulator [59]. If the in‐phase balancing method is included in the controller stages, it is normally implemented by applying proportional plus resonant controllers per cell [60–62]. The idea is that each cell absorbs or delivers the required power in order to keep its DC voltage equal to a specific DC voltage reference.

4.4  MODULATION METHODS FOR MULTILEVEL POWER CONVERTERS (STAGE 4) The power converter controller usually determines the reference voltage to be ­generated in order to achieve the control targets. The modulation is defined as the process to generate this reference voltage, on average over a modulation period, by applying a combination of commutations of the power devices. This is a crucial task in a power converter because the quality of the final output waveforms and the converter efficiency is directly related to the modulation method used. In this way,

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the design of optimal modulation strategies has been the focus of researchers for decades, always looking for minimum output waveforms harmonic distortion with minimum power losses [63]. Each power converter topology and application requires a specific modulation method in order to achieve these objectives. The modulation strategy complexity usually increases with the number of power switches in the circuit. This is the case for the multilevel converter family where the number of power devices can be very large compared with the conventional two‐level converters. Over the years, each new multilevel converter topology requires a specifically designed modulation method to take advantage of all the good features of the topology (best harmonic performance with maximum efficiency). In most cases, the modulation strategies for multilevel converters have been born as modifications or extensions of well‐known modulation methods for two‐ level converters [63]. In this way, modulation strategies such as the classic pulse width modulation (PWM), space vector modulation (SVM), interleaved PWM for parallel converters, selective harmonic elimination (SHE), and others have been adapted to be applied to different multilevel converter topologies. In this section, the most well‐known modulation strategies for multilevel converters will be addressed, focusing on the advantages and drawbacks of each method.

4.4.1  Carrier‐Based Modulation Techniques The invention of the bipolar transistor in 1947 and the silicon controlled rectifier (SCR) in 1956 provoked a big bang in power electronics. Since this boom, the PWM method has represented the most important modulation strategy since its appearance in the 1960s [64, 65]. PWM presents great advantages such as good performance and extreme simplicity [66]. PWM has been deeply studied in recent decades, and it is the base for most of the new modulation methods for the new power converter topologies. The PWM method is based on the generation of the switching pulses of the power converter by comparing the reference voltage with a high‐frequency triangular carrier. The frequency modulation index mf is defined as the ratio between the frequencies of the carrier fcr and the reference voltages fm [67]. Applying this, the obtained output voltage gives the desired fundamental harmonic content. In addition, the harmonic distortion created by the converter switching is centered around the ­carrier frequency fcr, facilitating the design of the output filtering stage. A schema of the conventional PWM method is represented in Figure  4.7, where a conventional two‐level three‐phase power converter is used to show the modulation strategy results. It is clear that the quality of the output waveforms and their harmonic performance is improved whilst mf is increased. In this way, increasing mf leads to output filters with reduced size, weight and costs. However, the power converter efficiency is reduced if mf is large. This fact leads to a trade‐off between these two factors: harmonic performance and its corresponding economic effect, and

4.4  MODULATION METHODS FOR MULTILEVEL POWER CONVERTERS (STAGE 4) V*

Controller 3.3

Modulator

Sa(digital)

V *c

Digital switching signals

0

Sa

Measurements

+ – V cr

Isolated switching signals

–8

Sc (a) Sb

+ –

V *a

Drivers 15

+

V *b



229

Sa

Output waveforms

DC AC

V *a

(b)

Inverter P

vdc

+

N

Sa

Sb

vaN

a vbN

Sa

_ Sb

Sa

Sc b vcN _ Sc

(c)

vcr

c vaN

vaN{f1}

(d) vdc t

Figure 4.7  Conventional PWM method for a two‐level three‐phase inverter. (a) PWM control scheme. (b) Reference voltages and carrier signal. (c) Switching signal for phase a (Sa). (d) Phase voltage of phase a (vaN)

efficiency and its corresponding effect on the design of the cooling system. In general, the nominal power of the power converter limits the minimum efficiency to be permitted using any specific cooling system (natural convection, forced air, or liquid cooling). This forces the maximum switching frequency to be applied in the modulation method and fixes the output filter to be designed and finally installed. In the following subsections the different strategies to extend the classic two‐ level PWM method will be introduced. Level‐shifted PWM Method (LS‐PWM) The basis of a multilevel converter topology is the generation of an output voltage with more than two voltage levels. One possible straightforward method for designing a modulation strategy is to apply a PWM method to commutate between two consecutive voltage levels generating the reference voltage on average. The level‐shifted pulse width modulation (LS‐PWM) strategy for a N‐level multilevel converter is based on the disposition of N − 1 triangular carriers equally distributed in the converter voltage range [68, 69]. For instance, in a three‐level NPC converter with a DC‐link voltage equal to Vdc, two carriers are required. The first carrier is between zero and Vdc/2 and the second one is between zero and − Vdc/2. The base of the LS‐PWM applied to a three‐level NPC is represented in Figure 4.8. In the conventional implementation of the LS‐PWM method, the carriers and the

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Chapter 4  MULTILEVEL CONVERTERS – CONTROL AND OPERATION IN INDUSTRIAL SYSTEMS

(a)

va*

vcr1 vcr2

(b)

+ –

+

Sa1 Sa2



vcr1 va*

(c) S a1

vcr2

t Sa2 t

(d)

vaN

va{f1} Vdc/2

Vdc/2 t

Figure 4.8  LS‐PWM method for a three‐level NPC. (a) PWM control scheme. (b) Reference voltage for phase a and carrier signals. (c) Switching signals for phase a (Sa1 and Sa2). (d) Phase voltage of phase a (vaN)

reference voltage waveforms are normalized by dividing them by Vdc, fitting all the waveforms in the [–1, 1] range. It is important to note that LS‐PWM stands out for its conceptual simplicity and easy hardware implementation. The harmonic spectrum of the resulting output phase voltage has high quality and presents the lowest order harmonic distortion due to the switching around the carrier frequency fcr. The typical harmonic spectrum of the phase voltage of a multilevel converter applying the LS‐PWM method is represented in Figure 4.9. LS‐PWM strategy is very well designed to be applied to the non‐modular multilevel converters such as the three‐level NPC or the three‐level T‐type converter. In these cases, the comparison of the reference voltage with the triangular carriers directly generates the switching signals. However, it can be affirmed that the LS‐PWM method can be applied to any multilevel converter topology with good performance [63].

4.4  MODULATION METHODS FOR MULTILEVEL POWER CONVERTERS (STAGE 4)

1 1 0.8 0.6 0.4 0.2 0

mf mf –2

mf + 2

231

va[pu] 2mf ± 2 2mf

3mf ± 2 3mf

Harmonic number

Figure 4.9  Harmonic spectrum of the phase voltage of a multilevel converter applying the LS‐PWM method.

Phase‐shifted PWM Method (PS‐PWM) Some multilevel converter topologies such as the FC, the CHB or the MMC stand out for their modularity, as they are formed by the series connection of power cells. In these cases, the phase output voltage is usually determined by the sum of the cells’ output voltages. For instance, in the case of a three‐cell CHB inverter, the phase output voltage va can be calculated as the sum of the output voltages of the three cells (va1, va2 and va3). This phenomenon is dual to that present in the parallel converters where the output current can be determined as the sum of the output currents of each power cell. It is very well known that, in the case of parallel converters (for instance, several DC/DC converters), a very convenient working method is to implement an interleaving operation in the system. The interleaved operation is achieved by shifting the power devices’ switching instants in order to reduce the total output current ripple and to increase the output current equivalent frequency. These two features improve the overall operation of the system, allowing reduction in the power system output filter without introducing drawbacks [68]. So, a dual method for the interleaved operation of parallel converters can be applied to voltage stacked converters, which is the case for many multilevel converters. The PS‐PWM strategy is based on applying a simple modulation technique to each power cell of the converter. After this, a phase shift is applied to the switching of each power cell, looking for the same advantages present in the interleaved operation of parallel converters [70]. For instance, in the case of a CHB inverter, each cell is formed by a DC voltage source (Vdc) and a full bridge that can be operated using a conventional unipolar PWM. In this way, the output voltage of each cell is a three‐level waveform (0 and ± Vdc). The three‐cell CHB inverter and the unipolar PWM method are introduced in Figure 4.10. If all power cells apply exactly the same unipolar PWM strategy with the same phase voltage reference and the same triangular carriers, the switching of all the cells coincide. This would lead to high phase voltage ripple, and it is not the best way to operate the CHB. As introduced in the interleaved operation of parallel converters, the unipolar PWM of the cells in a CHB inverter should be shifted among them. In the case of the CHB topology applying unipolar PWM per cell, it is

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AC

Vdc

v1

DC

v* AC

Vdc

v2

DC AC

Vdc

va v*

v3

DC

π 3

v*

Power cell + 2 π –vcr3

S31

S32 Out+

S31 –

3

S32

Out–

v* +

1

– vcr3

+

– –vcr3

0 1 0

vcr3

S31 S32

Figure 4.10  Phase‐shifted pulse width modulation (PS‐PWM) method for a three‐cell CHB inverter based on the application of unipolar PWM per cell: control scheme and generation of the phase‐shifted triangular carriers.

demonstrated that the best angle to shift the operation of the unipolar PWM ­between consecutive power cells is equal to π/(M) where M is the number of power cells [71]. Figure 4.11 shows the output voltages of each cell of a three‐cell CHB and the resulting phase voltage determined as the sum of the power cells. In PS‐PWM, all the power cells use a unipolar PWM where the reference voltage for all the power cells is the same. So, PS‐PWM achieves a natural equal power distribution between the power cells. On the other hand, in PS‐PWM all the power cells use a unipolar PWM with the same carrier frequency, and the number of commutations is the same for all the cells. In addition, in the CHB converter (and other modular topologies) the voltages of all the cells are the same and the phase current flows through all the power cells. As a result of all these facts, the power losses are inherently equalized between all the power cells. The equal power distribution and the power losses equalization between the cells achieved by the PS‐PWM lead to an equalized aging of the power cells. This is an important feature of the PS‐PWM method, improving the lifetime between failure of the power converter and facilitating the maintenance process, hence reducing the operation costs.

4.4  MODULATION METHODS FOR MULTILEVEL POWER CONVERTERS (STAGE 4)

233

Vdc

v1(t)

v1(t)

Vdc 0

–Vdc Vdc

–Vdc

v2(t)

v2(t)

Vdc 0

0

–Vdc Vdc

–Vdc v3(t)

Vdc v3(t)

0

0

0

–Vdc

–Vdc

2Vdc

v (t)

v (t)

2Vdc 0

0

–2Vdc –2Vdc

20 23

Time (ms)

24

30 Time (ms)

40

Figure 4.11  PS‐PWM method for a three‐cell CHB inverter: output voltages of the CHB cells (v1, v2 and v3) and total phase output voltage v.

Another very important feature achieved by the PS‐PWM is related to its high harmonic performance. The phase‐shifting applied to the switching of each cell leads to a multiplication of the lowest‐order harmonic distortion. The cell output voltage using unipolar PWM presents the harmonic distortion at around twice the carrier frequency. The PS‐PWM moves this harmonic distortion to higher frequencies with the number of cells of the converter. In the case of a M‐cell CHB, the lowest harmonic distortion is located around 2Mfcr. The typical harmonic spectrum of the phase voltage of a multilevel converter applying the PS‐PWM method is represented in Figure 4.12. In addition, the application of the PS‐PWM method also reduces the dV/dt of the output phase voltage, limiting it to one power cell voltage. These facts are crucial because this leads to an output filter reduction in terms of weight, volume and cost. As with the CHB topology, the PS‐PWM method can also be applied to other modular converters. In the case of the FC converter, the PS‐PWM strategy is implemented with some modifications. In this case, the modulation method applied to each

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Chapter 4  MULTILEVEL CONVERTERS – CONTROL AND OPERATION IN INDUSTRIAL SYSTEMS

1

1

0.8

Va[pu] 2M mf ± 2

0.6 0.4

4M mf ± 2

0.2 0

Harmonic number

Figure 4.12  Harmonic spectrum of the phase voltage of a multilevel converter applying the PS‐PWM method.

power cell is a conventional bipolar PWM strategy. The angle to be used in the PS‐ PWM method between consecutive power cells is in this case 2π/M where M is again the number of cells. Applying this, the advantages previously noted with the CHB are also achieved. In addition, a PS‐PWM strategy also obtains a natural balance of the floating DC voltages of the FC topology (but with low dynamic performance) [72]. The MMC topology also can be operated with the PS‐PWM strategy. In this case, the power cells are also operated with bipolar PWM and the angle between consecutive power cells is 2π/M where M is the number of cells per arm (number of cells per phase divided by two). Again, all the advantages typically obtained by the PS‐PWM method are achieved, as well as the natural DC voltage balance of the power cells as in the FC converter case. In order to improve the DC voltage balance performance, the voltage reference of each power cell can be slightly changed [73–75]. Hybrid PWM Methods In some cases, the multilevel converter topology does not achieve the expected results when applying the LS‐PWM or the PS‐PWM methods. Normally, this occurs when the converter topology is not purely modular or when it is formed by non‐equal power cells. In these cases, although the conventional modulation methods can be applied, the obtained performance is not good enough. One possible case to illustrate this idea is to consider the asymmetrical CHB topology which is formed by power cells with different DC voltages. A representation of this topology is introduced in Figure 4.13 where the voltage of each cell is different, such that V3 > V2 > V1. In this case, the PS‐PWM method does not achieve good results, leading to distorted output waveforms and non‐equalized power losses. Consequently, a new modulation method has to be developed trying to achieve similar features to that achieved by the PS‐PWM method in the symmetrical CHB case. This operation of the asymmetrical CHB is usually called the hybrid PWM method because it applies a different switching signal generation technique for each power cell of the topology. In the hybrid PWM for the asymmetrical CHB, the high‐voltage cells are operated with fundamental switching frequency by comparing their voltage

235

4.4  MODULATION METHODS FOR MULTILEVEL POWER CONVERTERS (STAGE 4)

AC

V3

va1

DC AC

V2

va2

DC

V 3 > V2 > V1

va

AC

V1

va3

DC

Power cell + S31

S32 Out–

Out+

S31

S32



v3*

v*

h3 V3

V3

va2

h3

+

_

v*2

V2

h2

+

h2

V2

+

3

1

+_ h3 +_ h3

0 1 0

_

v*1

Control cell 2:

Control cell 1: v*

S31

S32

v* 2

1

+_ h2 + –h2

+

va2

0 1 0

unipolar PWM

+

va1

Control cell 3: S21

S22

v*1

1

+_ vcr +_ –vcr

0 1 0

Figure 4.13  Three‐cell asymmetrical CHB topology and hybrid PWM scheme.

S11

S12

va

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Chapter 4  MULTILEVEL CONVERTERS – CONTROL AND OPERATION IN INDUSTRIAL SYSTEMS

Cell 3 output voltage [pu]

references with their corresponding DC voltages. This concept is introduced in Figure 4.13 where the voltage reference of the highest voltage cell (v3*) is compared with V3 to generate the switching of the cell (S31 and S32). The voltage generated by the highest voltage cell (va3) is subtracted from the reference voltage v3* to determine v2*. The process applied to the highest cell is also applied to the second cell in order to generate its cell output voltage va2 and the voltage reference for the lowest voltage cell v1*. Finally, the lowest voltage cell is operated using an unipolar PWM to obtain its output voltage, va1. This modulation method is also introduced in Figure 4.13 where the switching signal generation scheme for all the cells is represented. The obtained waveforms using this hybrid modulation method are represented in Figure 4.14. It can be observed that the high‐voltage cells are operated at fundamental switching frequency while the low‐voltage cell commutates at the carrier frequency. This hybrid modulation method obtains a phase voltage with high 1 va3 0

v* = v*3

–1 0

2

4

6

8

10

12

14

16

18

20

16

18

20

Cell 2 output voltage [pu]

0.5 va2 v*2

0

–0.5

0

2

4

6

8

10

12

14

Cell 1 output voltage [pu]

0.2 va1

0 v*1

Inverter output voltage [pu]

–0.2

0

2

4

6

8

10

12

14

16

18

20

10

12

14

16

18

20

1 0

va

v*

–1 0

2

4

6

8

Time [ms]

Figure 4.14  Obtained waveforms of the three‐cell asymmetrical CHB topology applying the hybrid PWM scheme. (See electronic version for color representation of this figure.)

4.4  MODULATION METHODS FOR MULTILEVEL POWER CONVERTERS (STAGE 4)

237

quality, with the lowest order harmonic distortion located at 2fcr. Taking a look at the results, it can be observed that the power managed by each cell is as high as its DC voltage. Also, the number of commutations of the highest voltage cells are very reduced, leading to a reduction of power losses. The utilization of hybrid PWM methods is usual in new multilevel converter topologies that are formed by the connection of different power cells. This is the case, for instance, for the five‐level active NPC (5 L‐ANPC) which is formed by the connection of an active NPC converter with flying capacitor power cells. The 5 L‐ANPC topology is represented in Figure  4.15 and has been successfully ­commercialized as the ACS2000 by ABB [3]. This topology can be extended to achieve a higher number of output voltage levels just by adding extra power cells to each phase. Three-level ANPC

Vdc

S1

S1

S1

S1

Flying-capacitor cell

S3

S2

a

Vdc 2

Vdc

S1

S1

S1

S1

S2

S3

1

S1 0

+

v*a Sign(va*) +

– + vdc

1

+

S2 – vcr1

0

– vcr2

0

1

+

S3

Figure 4.15  Five‐level active NPC (5 L‐ANPC) topology and hybrid PWM scheme.

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Chapter 4  MULTILEVEL CONVERTERS – CONTROL AND OPERATION IN INDUSTRIAL SYSTEMS

In this case, the hybrid modulation to be applied also takes into account the power losses to improve the converter performance. The eight power devices are managed by switching signal S1 which has fundamental frequency because it is generated by a square‐wave modulation. The other power devices are managed by switching signals S2 and S3 generated by a PS‐PWM method. The shift angle to be applied between consecutive cells is 2π/(M + 1) where M is the number of flying capacitor cells. In the case of the 5ive‐level active NPC (5 L‐ANPC) this angle is equal to π [76]. In order to show the performance of this hybrid PWM method, the obtained waveforms of the 5 L‐ANPC converter are represented in Figure  4.16. It can be observed that all power devices managed with signal Si (i ≠ 1) have equalized power losses. In addition, the multiplicative effect on the switching frequency of the output phase voltage is also present, leading to high‐performance waveforms where the lowest harmonic distortion due to the switching is located at (M + 1)fcr. Finally, it is important to note that using this hybrid PWM, the DC floating capacitors are also inherently balanced, as happens in the FC converter case when a conventional PS‐PWM method is applied. vcr

–vcr

vc*

1 0.5 0 0

0.002

0.004

0.006

0.008

0.01

0.012

0.014

0.016

0.018

0.02

0

0.002

0.004

0.006

0.008

0.01

0.012

0.014

0.016

0.018

0.02

0

0.002

0.004

0.006

0.008

0.01

0.012

0.014

0.016

0.018

0.02

0

0.002

0.004

0.006

0.008

0.01

0.012

0.014

0.016

0.018

0.02

0

0.002

0.004

0.006

0.008

0.01

0.012

0.014

0.016

0.018

0.02

1

S1

0.5 0

1

S2

0.5 0

1

S3

0.5 0 Vdc

va

Vdc/2 0 –Vdc/2 –Vdc Time (s)

Figure 4.16  Obtained waveforms of the five‐level 5 L‐ANPC topology, applying the hybrid PWM scheme represented in Figure 4.15. (See electronic version for color representation of this figure.)

4.4  MODULATION METHODS FOR MULTILEVEL POWER CONVERTERS (STAGE 4)

239

Pre‐programmed PWM Methods When a conventional PWM method is applied to a power converter, the lowest order harmonic distortion due to the switching is located at the carrier frequency fcr. So, from the harmonic performance point of view, it is very convenient to increase fcr as much as possible. However, to increase fcr has a direct impact on the switching losses and therefore on the power converter efficiency. As commented in previous sections, a trade‐off between the harmonic performance and the efficiency must be taken into account when designing a modulation technique. This trade‐off is especially important when the converter has to manage high power because the efficiency and correspondingly the cooling system becomes a critical part of the power system. In the case of high‐power converters, a possible option for dealing with this trade‐off is to use a pre‐programmed PWM method such as the SHE technique. The SHE method is based on the generation of the phase voltages by applying a predetermined waveform taking into account specific values of switching angles αi, that is, switching instants. A typical pre‐programmed waveform of a three‐level converter is shown in Figure  4.17, where seven switching angles are used to ­generate the phase voltage. Usually, a quarter period symmetry is considered to generate the phase voltage, so the switching angles are defined in the first quarter period of the phase voltage such that 0