116 84 64MB
English Pages 312 Year 2012
IEEE TRANSACTIONS ON
MICROWAVE THEORY AND TECHNIQUES A PUBLICATION OF THE IEEE MICROWAVE THEORY AND TECHNIQUES SOCIETY
tY\ MTTS
MAY 2012
VOLUME 60
NUMBER 5
IETMAB
(ISSN 00189480)
MINISPECIAL ISSUE ON 2011 RADIO FREQUENCY INTEGRATED CIRCUITS (RFIC) SYMPOSIUM 2011 RFIC Symposium MiniSpecial Issue Editorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . G. E. Ponchak
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PAPERS
Theory and Numerical Methods Analysis of Composite Right/LeftHanded Unit Cells Based on Even–OddMode Excitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M. A. Eberspächer and T. F. Eibert An Equivalent Circuit for Discontinuities Exciting Evanescent Accessible Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . L. Zappelli Passive Components and Circuits A Broadband USlot Coupled MicrostriptoWaveguide Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . X. Huang and K.L. Wu Approach to the Design of Asymmetric CoupledLine Directional Couplers With the Maximum Achievable ImpedanceTransformation Ratio . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . K. Wincza, S. Gruszczynski, and S. Kuta Compact Broadband Gysel Power Divider With Arbitrary PowerDividing Ratio Using Microstrip/Slotline Phase Inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F. Lin, Q.X. Chu, Z. Gong, and Z. Lin Crosstalk Reduction for Superconducting Microwave Resonator Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . O. Noroozian, P. K. Day, B. H. Eom, H. G. LeDuc, and J. Zmuidzinas Synthesis of Microwave Filters by Inverse Scattering Using a ClosedForm Expression Valid for Rational Frequency Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I. Arnedo, I. Arregui, A. Lujambio, M. Chudzik, M. A. G. Laso, and T. Lopetegi Switchless Tunable BandstoptoAllPass Reconfigurable Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E. J. Naglich, J. Lee, D. Peroulis, and W. J. Chappell Design and Diagnosis of Wideband CoupledResonator Bandpass Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . H.M. Lee, K. A. Zaki, A. E. Atia, and A. J. Piloto Highly Miniaturized Multiband Bandpass Filter Design Based on a Stacked Spiral Resonator Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C.H. Chen, C.H. Huang, T.S. Horng, and S.M. Wu A NarrowPassband and FrequencyTunable Microwave Photonic Filter Based on PhaseModulation to IntensityModulation Conversion Using a PhaseShifted Fiber Bragg Grating . . . . . . . . . . . . . . . . . W. Li, M. Li, and J. Yao A 2D Electronically Steered PhasedArray Antenna With 2 X 2 Elements in LC Display Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . O. H. Karabey, A. Gaebler, S. Strunck, and R. Jakoby
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(Contents Continued on Back Cover)
♦.IEEE
(Contents Continued from Front Cover) Hybrid and Monolithic RF Integrated Circuits WBand SiliconBased Frequency Synthesizers Using InjectionLocked and Harmonic Triplers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C.C. Wang, Z. Chen, and P. Heydari A Wideband CMOS/GaAs HBT Envelope Tracking Power Amplifier for 4G LTE Mobile Terminal Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M. Hassan, L. E. Larson, V. W. Leung, D. F. Kimball, and P. M. Asbeck A CMOS Distributed Amplifier With Distributed Active Input Balun Using GBW and Linearity Enhancing Techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A. Jahanian and P. Heydari MillimeterWave SelfHealing Power Amplifier With Adaptive Amplitude and Phase Linearization in 65nm CMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J. Y.C. Liu, R. Berenguer, and M.C. F. Chang Analysis and Implementation of Doherty Power Amplifier With TwoPoint Envelope Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J. H. Kim and C. S. Park TwoWay CurrentCombining Band Power Amplifier in 65nm CMOS . . . . . . . . . Q. J. Gu, Z. Xu, and M.C. F. Chang A 130nm CMOS 100Hz–6GHz Reconfigurable Vector Signal Analyzer and SoftwareDefined Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A. Goel, B. Analui, and H. Hashemi SingleChip Multiband EGPRS and SAWLess LTE WCDMA CMOS Receiver With Diversity . . . . . . . . . . . . . . . . . . H. Xie, O. Oliaei, P. Rakers, R. Fernandez, J. Xiang, J. Parkes, J. Riches, R. Verellen, M. Rahman, V. Bhan, and D. B. Schwartz Subharmonic 220 and 320GHz SiGe HBT Receiver FrontEnds . . . . . . . . . E. Öjefors, B. Heinemann, and U. R. Pfeiffer A Band CMOS UWB Radar Transmitter With a BiPhase Modulating Pulsed Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S. Lee, C.Y. Kim, and S. Hong A Sub10 nJ/b 1.9dBm Output Power FSK Transmitter for Body Area Network Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J. Masuch and M. DelgadoRestituto A Fully SiP Integrated Band Butler Matrix EndFire BeamSwitching Transmitter Using FlipChip Assembled CMOS Chips on LTCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C.C. Kuo, H.C. Lu, P.A. Lin, C.F. Tai, Y.M. Hsin, and H. Wang Instrumentation and Measurement Techniques Regularized 1D Dielectric Profile Inversion in a Uniform Metallic Waveguide by Measurement and Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E. Kılıç, U. Siart, and T. F. Eibert A SelfSustained Microwave System for DielectricConstant Measurement of Lossy Organic Liquids . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V. Sekar, W. J. Torke, S. Palermo, and K. Entesari Cryogenic SelfCalibrating Noise Parameter Measurement System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D. Russell and S. Weinreb
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RF Applications and Systems A Novel Carrier Leakage Suppression FrontEnd for UHF RFID Reader . . . . . . . J.Y. Jung, C.W. Park, and K.W. Yeom Autoregressive Modeling of Mobile Radio Propagation Channel in Building Ruins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . L. Chen, M. Loschonsky, and L. M. Reindl
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Information for Authors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Special Issue on Biomedical Applications of RF/Microwave Technologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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IEEE MICROWAVE THEORY AND TECHNIQUES SOCIETY
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Digital Object Identifier 10.1109/TMTT.2012.2197238
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 5, MAY 2012
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2011 RFIC Symposium MiniSpecial Issue Editorial
T
HIS TRANSACTIONS’ “MiniSpecial Issue on 2011 Radio Frequency Integrated Circuits (RFIC) Symposium” has eight papers that are based on papers originally presented at the IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, June 5–10, 2011, Baltimore, MD. This is one of the IEEE Microwave Theory and Techniques Society (IEEE MTTS) premier symposia and is colocated with the IEEE MTTS International Microwave Symposium (IMS) each year. The conference chairs invited 20 authors of papers presented at the symposium to submit expanded papers to this TRANSACTIONS’ MiniSpecial Issue. A total of 14 papers were submitted, and every paper was reviewed by the EditorinChief, Associate Editors, and re
viewers of this TRANSACTIONS in the same manner as all other submissions to this publication. I have distributed the eight papers that were accepted in the subsection “Hybrid and Monolithic RF Integrated Circuits,” but to make it easier for you to find and appreciate these papers, a note has been added to the footnote on the first page of each paper that identifies it as part of the 2011 RFIC Symposium. I hope that you enjoy these papers, and because these papers represent only a small part of the content presented at the 2011 RFIC Symposium, please use IEEE Xplore to read the rest of the papers from this symposium.
Digital Object Identifier 10.1109/TMTT.2012.2189285
00189480/$31.00 © 2012 IEEE
GEORGE E. PONCHAK, EditorinChief NASA Glenn Research Center Cleveland, OH 44135 USA
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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 5, MAY 2012
Analysis of Composite Right/LeftHanded Unit Cells Based on Even–OddMode Excitation Mark A. Eberspächer, Student Member, IEEE, and Thomas F. Eibert, Senior Member, IEEE
Abstract—Even–oddmode analysis is applied to symmetric composite right/lefthanded (CRLH) structures in order to deand . It is compose the network into the two impedances shown that these impedances are sufficient to completely describe the behavior of arbitrary symmetric CRLH structures. Consequently, the propagation constant, as well as the Bloch impedance, are derived based on and . Furthermore, the balancing condition, as well as the band limits, are formulated in terms of poles and . This simplifies significantly the analysis and zeros of and design process of unit cells, especially when the structure comprises transmission lines. The theoretical expectations are validated by circuit simulations and electromagnetic simulations, as well as measurements of fabricated prototypes. Index Terms—Composite right/lefthanded (CRLH) unit cells, even–oddmode analysis, metamaterials, periodic structures.
I. INTRODUCTION
R
ECENTLY, considerable attention has been paid to artificially produced transmission lines, referred to as composite right/lefthanded (CRLH) transmission lines. These transmission lines exhibit different frequency bands in which their response can be distinguished into righthanded (RH) and lefthanded (LH) behavior. Research on such transmission lines goes back to the Russian physicist Victor Veselago, who postulated in 1968 [1] that materials having simultaneously negative values of permittivity and permeability would support waves possessing LH properties. The utilization of structures possessing CRLH characteristics allows to realize alternative concepts for a multitude of applications like power dividers, antennas, and beam forming [2], [3]. Since such materials have not been found in nature yet, they are required to be produced artificially. A very powerful synthesizing approach is the transmissionline approach [2], which is based on periodically arranged unit cells emulating a homogeneous material. A standard analysis approach for such twoport networks is the matrix approach [4], [5]. Generally, the matrix is found by several matrix multiplications of the different matrices representing the circuit elements of the Manuscript received July 21, 2011; revised February 02, 2012; accepted February 06, 2012. Date of publication March 23, 2012; date of current version April 27, 2012. This work was supported by the Technische Universität München (TUM) Graduate School’s Faculty Graduate Center Electrical Engineering and Information Technology. The authors are with the Lehrstuhl für Hochfrequenztechnik, Technische Universität München (TUM), 80290 Munich, Germany (email: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2188722
network. Although this matrix can be calculated for arbitrary networks in a straightforward manner, the resulting mathematical expressions may be rather complicated, in particular for networks containing transmission lines. In this case, the matrix entries are composed of rational and trigonometric functions. If the lengths of the transmission lines are small in terms of wavelength, the trigonometric functions can be replaced by their linear Taylor expansions, e.g., as done in [6]–[8]. If this is not feasible, one may try to reduce the complexity of the transcendental matrix parameters by using trigonometric identities and algebraic operations (see, e.g., [9]). Even if in some circumstances a simplification is possible, the resulting expressions can often only be evaluated numerically. As an alternative, the dispersion relations can be deduced matrix. This is espefrom the matrix instead of the cially useful for port networks, e.g., as considered in [10] and [11]. Although arbitrary port structures are supported, setting up the impedance matrix is not straightforward. Another alternative is the procedure of Nicolson–Ross–Weir [12]–[14], which can be enhanced to the scattering matrix approach allowing to take higher order modes into account [15]. All these methods are useful to determine the realized material parameters; however, in the design process, they do not directly point out the required structural modifications. In this paper, many drawbacks of the existing approaches are overcome by applying even–oddmode excitations to symmetric CRLH unit cells. Thus, the unit cell is decomposed into and , which are less complex the two separate impedances than the initial network. Consequently, the Bloch impedance, as well as the propagation constant, is reinterpreted in terms of and and important unitcell properties such as passband limits, balancing condition, and the frequency of the infinite wavelength phenomenon are derived from these impedances and their poles and zeros. On one hand, this approach can be utilized for a networkbased analytical treatment of a CRLH circuit and on the other hand, it can be employed within an electromagnetic (EM)simulationbased design process. In particular, in many cases, the even–odd networks can be directly found apwith standard circuit theory, and in contrast to the proach, matrix multiplications are not needed. Finding the poles and is, moreover, much easier than the analand zeros of ysis of the parameter in the traditional approach. The proposed method may be extended to synthesize systematically CRLH networks possessing specified dispersion characteristics, and even the treatment of 2D and 3D structures is straightforward. Typically, the design process is an iterative process, where the unit cells are analyzed using fullwave solvers and adjusted until the specifications are met. For a short design process, it
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EBERSPÄCHER AND EIBERT: ANALYSIS OF CRLH UNIT CELLS BASED ON EVEN–ODDMODE EXCITATION
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Fig. 2. Equivalent circuit of the CRLH unit cell seen in Fig. 1, which is valid in a limited frequency range and for small length only.
Fig. 1. Microstripbased CRLH unit cell taken from [22].
is important that the desired structural modifications can be inferred from the EM simulation results. This is achieved by the poles and zeros of and since they are directly linked to the balancing condition and the band limits. The introduced approach is validated by circuit simulations, fullwave simulations, as well as measurements, and by comparison with the standard procedure based on the matrix when possible. It shall be noted that even–oddmode analysis is a wellestablished concept [16] even in the field of CRLH structures. However, it has been applied only to treat coupled lines within an unit cell, as in [17]–[19] and [20]. In contrast, in this paper, the complete waveguiding properties of arbitrary symmetric CRLH unit cells are related to and . The basic concept of treating symmetric networks by even–oddmode analysis is comparable to Bartlett’s bisection theorem, which states that every symmetric network can be transformed into a lattice network. The impedances in the two resulting branches of the lattice network are equal to and , respectively [21]. II. CRLH UNITCELL ANALYSIS BASED ON ITS MATRIX REPRESENTATION As shown in [2], LH behavior can be achieved by replacing in the equivalent circuit of a transmission line the series inductance with a capacitance and the shunt capacitance with an inductance. Taking the parasictics into account requires either additional lumped elements, as in [2], or a transmission line, as in [9], which both lead to a CRLH structure. As long as the resulting equivalent circuits are rather simple, the standard analysis approach using the matrix is applicable, and the parameter can be evaluated analytically in order to determine the unitcell properties. However, certain structures require a more elaborate equivalent circuit. For example, the unit cell presented in [22] and shown in Fig. 1 may possess the equivalent circuit seen in Fig. 2. This circuit model is useful as long as only a narrow frequency band is considered and the length of the transmission line is small compared to the wavelength [4]. In this case, the matrix element may be computed as (1)
For a symmetric unit cell, holds [4], and the propagation constant may be determined using (2)
A. Balancing Condition and Band Regions Depending on the parameter , for the lossless case, the following different propagation constants are possible:
This reveals that an unattenuated operation (passband) is only possible for . The passband limits may be determined solving for , which results in (3) and (4) to In order to reduce the stopband at the transition frequency 0, is solved for yielding , which represents the socalled balancing condition. In a similar way, the upper and lower band limits can be found by solving with . Consequently, the LH and RH bandwidths are given by and , respectively. Setting (5) leads to (6)
with which reveals that element values.
cannot exceed
for positive circuit
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Hence, the ratio of voltage and current seen at the terminals yields (9) Fig. 3. Equivalent circuit of the CRLH unit cell seen in Fig. 1 taking the influence of the transmission lines into account. The circuit is valid in a limited frequency range only.
Accordingly, for the oddmode analysis, it follows that: (10) and
In order to take the influence of the transmission lines of the unit cell into account, its equivalent circuit must be enhanced, as seen in Fig. 3. The characteristic impedance and the physical length of the transmission line can both be modified, at least within certain limits. In contrast, the phase constant , which is mostly determined by the inherent parameters of the supporting media, is not changeable once the substrate has been chosen. Therefore, and are considered as variables, whereas the phase velocity , with , is considered as a constant. Although the matrix representation of this equivalent circuit can be determined as (7), shown at the bottom of this page, with
this expression cannot be solved for the balancing frequency analytically. Thus, drawing qualitative conclusions regarding band limits and the balancing condition is not easy. III. GENERAL ASPECTS OF EVEN–ODDMODE ANALYSIS APPLIED TO CRLH STRUCTURES A. Relationship Between
and the Parameter
Considering the matrix representation of an arbitrary symmetric unit cell, the evenmode excitation is performed by identical voltages at the two ports resulting in identical currents, which can be written as (8)
(11) Eliminating
in (9) and (11) gives (12)
Due to (12), the values of be determined as
and
resulting in
can
or
(13)
or
(14)
As pointed out above, the balancing condition is met if the equation has only one solution in the considered frequency range. This means that the series resonance of and the parallel resonance of must appear at the transition frequency , regardless of the network topology of the unit cell. For and , the two solutions of , and hence, the band limits are given. However, thus far we cannot distinguish which of them represents the LH band limit and which represents the limit of the RH band . As both impedances obtained by the even–odd excitation represent reactive oneports, Foster’s reactance theorem can be applied. This theorem states that the slope of the reactance of any reactive oneport circuit is always positive, i.e., , and consequently, the poles and zeros are arranged in an alternating manner along the axis [5]. Therefore, the qualitative characteristics of the impedances can be inferred from a given unitcell topology and frequencies representing the limits can be determined. To clarify the procedure, a Telement is compared to a shaped element. Both networks are balanced at and shown in Fig. 4. For the Tshaped unit cell, is basically the series resonant circuit, whereas is composed of a series resonator connected in series with a parallel resonator. Hence, has a root at . starts at a negative value, has a pole at , and two roots at representing the band limits. This behavior is shown in Fig. 5. In contrast, for a shaped unit cell, is a parallel resonator only and is composed by a parallel resonator connected in
(7)
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This reveals that a purely real Bloch impedance requires . Since for lossless networks both impedances are purely imaginary, i.e., and , the Bloch impedance is (18) Fig. 4. CRLH unit cell realized as a Telement and element network.
As a consequence, a Bloch impedance, which is purely real, can only be achieved if and possess different signs. This is fulfilled within the frequency range if the balancing condition and is met since then both impedances change their signs simultaneously at . C. Propagation Constant Considering a unit cell excited with an odd mode as a shortcircuited transmission line of length , which transforms the load impedance into the oddmode impedance observable at the terminals, yields [5], Fig. 5.
and for the CRLH Tnetwork seen in Fig. 4 and balanced at GHz with pF, nH yielding GHz, and GHz.
(19) or (20) where (17) was used. For the sake of convenience, we replace the hyperbolic function in (20) by (21) and obtain
Fig. 6. and for the CRLH according to Fig. 5.
network seen in Fig. 4 with parameters
parallel to a series resonator. As seen in Fig. 6, the band limits are solely determined by the poles of occurring at and .
(22) This shows that a purely real valued argument of the tangent, i.e., , is only achieved if , which is basically the balancing condition derived above [see also (18)]. IV. CRLH UNITCELL ANALYSIS IN TERMS OF
B. Bloch Impedance According to [5], the Bloch impedance can be determined parameters, which reads for symmetric based on the reciprocal networks (15)
AND
In order to clarify the proposed analysis method, it is applied to the CRLH unit cell, as shown in Fig. 7, and the results are compared with the ones presented in [9]. In [9], the network is analyzed using the standard matrix approach. The determination of the parameter requires a matrix multiplication of the five matrices associated with the subelements of the cell. This yields
and (16) holds. Using (9), (11), and (16), the Bloch impedance can be expressed as
(23)
(17)
with . is also the characteristic impedance of the transmission lines. For the balanced case, must possess exactly one solution. The solution of this transcendental
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Fig. 7. CRLH unit cell taken from [9].
Fig. 9. Impedances and network seen in Fig. 3.
resulting from even–oddmode excitation of the
In the following, the proposed analysis method will be applied to the equivalent circuit presented in Fig. 3. The circuits resulting from even–oddmode excitation are shown in Fig. 9. Both circuits can be considered as purely imaginary impedances, denoted by and , which are transformed by the transmission line characterized by the phase velocity , the length , and the characteristic impedance . Thus, the transformation of the impedances [4] leads to
Fig. 8. Even and odd impedances of the network given in Fig. 7.
equation is achieved by using trigonometric identities and performing several algebraic operations leading to a pseudopolynomial. The balancing condition is found if the discriminant of the solution of the quadratic pseudopolynomial vanishes. The same result is obtained by the even–odd analysis approach, but with considerably less effort. Without any matrix operations the impedances
(29)
with
(24) and (30)
(25) and are found by standard circuit theory applied to the circuits seen in Fig. 8. According to (13), the balancing condition is given by and . Thus, the numerator of and the denominator of must both be equal to zero, which allows to write
(31)
with
(26) Obviously, this is fulfilled for (27) yielding the balancing condition. Consequently, (28) or the delay which can be solved easily for the elements , time . In contrast to this, in [9], the balancing condition (27) must be inserted into the much more complex equation (23) and solved for the unknowns. Due to the high complexity of (23), the transition frequency for given elements can only be found numerically, whereas (28) may be solved graphically. Furthermore, the upper band limit, known from , is directly given by the frequency where . In contrast, represents the lower band limit, which allows to solve (24) in order to obtain the particular network elements or the delay time for a given frequency.
(32) As seen in (13) and (14), the band limits and the balancing and condition are determined by either poles or zeros of . Therefore, it is convenient to split up both impedances into terms resulting from the denominator and the numerator yielding (33) and (34) which can be analyzed in terms of zeros individually. For such a simplification, it must be ascertained that the denominator and numerator terms are not both equal to zero at the same frequency
EBERSPÄCHER AND EIBERT: ANALYSIS OF CRLH UNIT CELLS BASED ON EVEN–ODDMODE EXCITATION
of interest. This is fulfilled since quency. Hence, (13), (14), and (29)–(34) give
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regardless of fre
(35) (36)
Fig. 10. Parameter of the unit cell depicted in Fig. 3 obtained by circuit pF, nH, nH, mm, simulation with m/s. Red solid line (in online version): balanced case and pF. Blue dashed line (in online version): unbalanced case with with pF.
(37) and (38)
A. Balancing Condition In order to balance the structure, only one solution for is allowed, i.e., . Depending on the given parameters, (35) and (36) can be solved for the unknowns analytically. Often the elements and , which are usually the parasitics, cannot be reduced below a certain limit. Hence, these elements are considered here as the given ones and the balancing condition is solved for the LH elements shown in (39) and (40) at the bottom of this page. Inspecting the poles and zeros of and yields immediately the limit for which balancing is possible. This limit is given by (41) That is, the product depending on the transmission line length and the inductance may not exceed a certain limit. As an alternative, the balancing condition can be derived for the situation where only the transmission line length instead of the LH inductance is variable, yielding (42)
Fig. 11.
and
corresponding to Fig. 10.
is not influenced by
.
B. Qualitative Discussion Considering the circuit models resulting from even–oddmode excitation and applying Foster’s theorem allows to estimate the behavior of and . For this, we assume that the length of the transmission line is small and does not transform the connected impedances significantly. Consequently, behaves inductively at low frequencies, possesses a parallel resonant frequency , and subsequently a series resonant frequency . In principal, has a similar characteristics with the parallel resonant frequency and the series resonant frequency , but the characteristics is shifted toward lower frequencies due to the fact that the parallel capacitance is increased by . This reveals different band limits when compared to a purely  or Tshaped network. For this unit cell, the lower band limit is determined by the parallel resonant frequency of , whereas the upper band limit is given by the series resonant frequency of . Comparing Figs. 10 and 11 visualizes the relationship between the matrix parameter
(39) and (40)
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Fig. 12. Possible positions of the frequencies and according to the network topology of the CRLH unit cell. Frequencies connected by arrows . The beginning of the arrow represents a are linked by the LH capacitance , the frequency at the end of the arrow frequency that is not influenced by . The arrow length increases with increasing capacitance. The depends on balancing condition is not met in (a) and (b), in contrast to (c), in which the unit cell is balanced.
and the poles and zeros of the impedances obtained by even–oddmode excitation for typical values of this CRLH unit cell. As seen, if the zero of and the pole of occur at different frequencies, the balancing condition is violated, resulting in two solutions for . The different positions of the frequencies and , which are supported by the network topology of the considered unit cell, are depicted in Fig. 12. Thus, a practical balancing process for the given elements and is as follows. First, determine either the length or by using (39) or (42), depending on what is variable, in such a way that . Second, determine using (40). As a result of this, the LH bandwidth follows. C. Bandwidth Considerations Comparing (35) and (38) shows that the only difference bein (35). In tween the two equations is the LH capacitance the balanced case, and the RH bandwidth is given by . Hence, the bandwidth is governed by . However, not the absolute value of is the important figure of merit, but the relative value with respect to , since it describes how much the denominator is changed by adding . In order to estimate the resulting bandwidth, we set , which allows to write the normalized expression . Inserting this into (35), setting and replacing and with their linearized approximation in (35), (38) yields (43) and (44) These two equations can be solved for , which gives
Fig. 13. resulting from the balancing condition with varying length . The GHz, m/s, and parameters are nH resulting in mm.
, the capacitance . Furthermore, tends toward infinity for a certain length, denoted as , since the denominator of the balancing condition in (40) becomes zero. This maximum length is given by (46) A minimum of solving
may be found between these two extrema by , which yields (47)
That is, the unit cell can be balanced for and a certain length exists for which the LH capacitance possesses its minimal value, resulting in a minimal bandwidth. A typical dependency of given by the balancing condition is shown in Fig. 13. Although increases if the length is extended toward , the upper passband limit cannot exceed since, at this frequency, the tangent function in (31), and hence, change their signs and the stopband arises. As shown in Fig. 13, a long transmissionline length is required to achieve , resulting in a lowfrequency . Therefore, the maximum RH bandwidth is achieved for . As shown in (5) and (6), the LH bandwidth is not independent of the RH one, and above all, it cannot exceed the RH one. Thus, a certain LH bandwidth requires a particular RH bandwidth. In accordance to the procedure above, a comparable dependency for the LH bandwidth can also be determined using (36) and (37). However, the resulting expression is not practical and does not allow to infer general design guidelines. Therefore, (37), which determines the lower stopband, is considered further. Since all element values, the length , and the frequency are purely positive, the equation can only be fulfilled for
(45) Thus, the bandwidth can be controlled theoretically by manipulating the ratio . However, in a practical realization, two difficulties arise. Firstly, due to parasitics, the RH capacitance cannot be reduced below a certain limit. Secondly, the LH capacitance cannot be chosen arbitrarily since it has already been defined in (40) so that the balancing condition is met. Since the length of the transmission line is considered as a variable, the question may arise how influences , and hence, the bandwidth. Equation (40) reveals that for a vanishing length
(48) which can be written with (45) as (49) may be decreased by increasing As a consequence of this, the element values. However, it is important to note that the elements and may not be chosen arbitrarily because they
EBERSPÄCHER AND EIBERT: ANALYSIS OF CRLH UNIT CELLS BASED ON EVEN–ODDMODE EXCITATION
Fig. 14. resulting from the balancing condition with varying length . The GHz, m/s, pF, parameters are nH resulting in mm. and
Fig. 15. Maximum of the stopband frequency resulting from the GHz, balancing condition with varying length . The parameters are m/s, pF, and nH resulting mm. in
are determined by the balancing condition given by (39) and (40). Although can be enlarged for longer length , the inductance decreases simultaneously and finally drops to zero at , as shown in Fig. 14. Thus, small values for may only be accomplished for small transmissionline lengths , as seen in Fig. 15. It should be mentioned that does not represent the actual stopband frequency, but it gives the upper limit of it. That is, for a certain LH bandwidth, a maximum length of the transmission lines can be calculated based on the known elements (mostly the parasitics). Depending on this length, the realized stopband frequency is either equal to or even below this limit. V. RESULTS CRLH unit cells are normally designed supported by EM fullwave solvers, which provide scattering parameters of the unit cell. It is possible to inspect the peaks of the impedances and admittances derived from the scattering parameters that represent the resonances of the parallel and series resonant circuits, respectively. However, only the product of the element values and representing the resonances is known, but not the particular element to be modified in order to optimize the circuit. This difficulty can be overcome by applying the even–oddmode analysis described above, which is employed for different variations of the unit cell seen in Fig. 1. It is important to note that the analysis approach itself, based on the even–odd impedances, does not require any circuit model, since the poles and zeros of these impedances can be directly obtained by fullwave simulations or measurements. However, if an equivalent circuit can be assumed whose elements are qualitatively linked to the structural elements of
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Fig. 16. Fabricated prototypes of the CRLH unit cells with the geometry parameters and results given in Fig. 17 for (a), Fig. 19 for (b), and Fig. 21 for (c).
Fig. 17. Parameter of the unit cell depicted in Fig. 16(a) and balanced at GHz. According to Fig. 1, the geometry parameters are mm, mm, mm, mm, and mm. Red solid and dashed lines (in online version) result from EM simulations and measurements, respectively. The blue line (in online version), marked with stripes, is obtained pF, by circuit simulation of the equivalent circuit seen in Fig. 3 with nH, pF, nH, mm, and m/s.
the guiding structure, the balancing process is considerably simplified since the influence of structural adjustments to the band characteristics and vice versa is predictable. As all results are taken from fullwave simulations and no equivalent circuit is used to extrapolate any unitcell properties to nonsimulated frequencies, it is sufficient that the circuit model emulates the guiding structure within the operational frequency range only. In view of this, the considered unit cells can be represented by the equivalent circuit seen in Fig. 3. All fullwave simulations were performed using CST Microwave Studio [23] and all circuit simulations were carried out with AWR Microwave Office [24]. The substrate that is used is Taconic TLY5 possessing and mm. Considering the unit cell in Fig. 16(a) with results according to Figs. 17 and 18 shows that the presented equivalent circuit emulates the behavior of the unit cell within a certain bandwidth correctly. This bandwidth is limited since, in the actual CRLH structure, the parallel inductance and capacitance are composed of stubs, whose frequency characteristics are determined by the tangent function, whereas for the sake of simplicity, the equivalent circuit comprises linear reactive elements only. Besides the simulation results, Figs. 17 and 18 show both the results obtained by measurements of the prototype. As seen, good matching is achieved over a bandwidth of approximately 4.5 GHz. Since the pole of occurs at the same frequency as the zero of , the parameter reaches only at rad/s and the unit cell is well balanced. Furthermore, it can be observed that the band limits given by
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Fig. 19. Parameter of the unit cell depicted in Fig. 16(b) and balanced at GHz. According to Fig. 1, the geometry parameters are mm, mm, mm, mm and mm. Solid line: results from EM simulations. Dashed line: results from measurements.
Fig. 18. Impedances corresponding to the results given in Fig. 17. The upper graph results from EM simulations (solid lines) and measurements (dashed lines), whereas the lower one is obtained by circuit simulation of the equivalent circuit.
coincide exactly with the pole of and the zero of , as predicted in Section IV. Using (45), the upper stopband limit can be estimated, which yields
Fig. 20. Impedances corresponding to the results given in Fig. 19. Solid lines represent results from EM simulations, whereas dashed lines are obtained by measurements of the prototype.
(50) and hence, rad/s. As derived above, may be estimated with (49) yielding rad/s, which is valid for the circuit model. The difference of the amplitudes of the peaks between circuit simulation and EM simulation results from the fact that, in the latter, lossy materials are involved, which are not considered in the circuit simulations. Generally, losses result in real parts of and leading to an imaginary part of the parameter and even for a balanced structure to . Due to the losses, the poles and zeros are located at complex frequencies and can thus no longer be reached at real frequencies. However, for small losses, they are still identifiable in the imaginary parts of the impedances and the proposed approach is still applicable. Utilizing the presented method, the element values of the equivalent circuit are not required for the balancing process, and thus, they are not determined for the remaining unit cells. For the next example, as shown in Fig. 16(b), the length of the transmission line is increased from 0.93 to 3.185 mm. According to the balancing condition in (39) and (40), this requires that the elements and must both be reduced. The LH capacitance can either be decreased by increasing the gap or by reducing the length of the capacitive stubs. If the last possibility is chosen, it is obvious that not only is changed, but also is reduced. Thus, may remain approximately constant and the upper cutoff frequency is unchanged. As seen in Figs. 19 and 20, EM simulation and measurement confirm this expectation. In turn, the lower stopband frequency is increased. The second possibility to balance the structure requires
Fig. 21. Parameter of the unit cell depicted in Fig. 16(c) and balanced at GHz. According to Fig. 1, the geometry parameters are mm, mm, mm, mm, and mm. Solid line: results from EM simulations. Dashed line: results from measurements.
to enlarge the gap , as depicted in Fig. 16(c), which does not influence the parallel capacitance significantly. As a result of this, the quotient is reduced, yielding not only a reduction of the LH bandwidth, but also a significant decrease of the RH bandwidth being shown in Figs. 21 and 22. Analyzing the structure of the unit cell in more detail reveals that the capacitive stubs limit the operational bandwidth of the arrangement. Unfortunately, a reduction of their length, and consequently a reduction of this parasitic capacitance, leads to a reduction of the LH capacitance as well. This is due to the fact that the openended stubs possess their field maximum at their ends, and consequently most of the series capacitance arises at the end regions. In order to overcome this problem, the openended stubs generating the inductance are replaced by shortcircuited ones. As a consequence of this modification, the electric field distribution changes in such a way that in the new arrangement the series capacitance originates mostly from the beginning of the stubs,
EBERSPÄCHER AND EIBERT: ANALYSIS OF CRLH UNIT CELLS BASED ON EVEN–ODDMODE EXCITATION
Fig. 22. Impedances corresponding to the results given in Fig. 21. Solid lines represent results from EM simulations, whereas dashed lines are obtained by measurements of the prototype.
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trary CRLH unit cells was presented. The method can be applied as long as the unit cell to be considered is structurally symmetric and behaves linearly, which also includes higher order cells. Relationships between the poles and zeros of and and the characteristics of the unit cell were pointed out. Furthermore, the balancing condition, the Bloch impedance, and the frequencies at which the stopband arises are derived in terms of and . The proposed procedure was successfully applied within the design of various unit cells supported by EM simulations and validated by measurements. The analysis approach may not only be employed during the design process of CRLH unit cells, but also to investigate fabricated structures using measured parameters, and thus to control the fabrication process. REFERENCES
Fig. 23. Parameter obtained by EM simulation of the unit cell depicted in GHz. The geometry parameters are Fig. 1 and balanced at mm (short circuited), mm, mm, mm, mm. and
Fig. 24. Impedances corresponding to the parameter
given in Fig. 23.
which is close to the location where the hostline is connected. As a result of this, the capacitive stubs may be reduced considerably, and hence, the quotient and finally the bandwidth increases. Further EM simulation together with the analysis approach to balance the structure yields a CRLH unit cell with an operational bandwidth of more than 13 GHz, as demonstrated in Figs. 23 and 24. It should be noted that even though the possibility exists to vary the poles and zeros of the impedances quite flexibly, difficulties may arise to match the unit cell to a certain impedance level if the pole of is very close to the pole of . In this case, the Bloch impedance defined by (17) varies strongly around the balanced frequency. This effect can be reduced by lowering the stopband frequency . VI. CONCLUSION Based on the impedances and resulting from even–oddmode excitation, an analysis method for arbi
[1] V. Veselago, “The electrodynamics of substances with simultaneously negative values of permittivity and permeability,” Sov. Phys.—Usp, vol. 10, no. 4, pp. 509–514, 1968. [2] C. Caloz and T. Itoh, Electromagnetic Metamaterials. Hoboken, NJ: Wiley, 2006. [3] K. Eccleston, “Beam forming transition based upon a zerophaseshift metamaterial,” IET Microw. Antennas Propag., vol. 4, no. 10, pp. 1639–1646, Oct. 2010. [4] D. M. Pozar, Microwave Engineering, 3rd ed. Hoboken, NJ: Wiley, 2005. [5] R. E. Collin, Foundation of Microwave Engineering, 1st ed. New York: McGrawHill, 1966. [6] M. A. Antoniades and G. V. Eleftheriades, “Compact linear lead/lag metamaterial phase shifters for broadband applications,” IEEE Antennas Wireless Propag. Lett., vol. 2, no. 1, pp. 103–106, 2003. [7] G. V. Eleftheriades, A. K. Iyer, and P. C. Kremer, “Planar negative refractive index media using periodically L–C loaded transmission lines,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 12, pp. 2702–2712, Dec. 2002. [8] A. Grbic and G. V. Eleftheriades, “Dispersion analysis of a microstripbased negative refractive index periodic structure,” IEEE Microw. Wireless Compon. Lett., vol. 13, no. 4, pp. 155–157, Apr. 2003. [9] J. PerruisseauCarrier and A. K. Skrivervik, “Composite right/lefthanded transmission line metamaterial phase shifters (MPS) in MMIC technology,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 4, pp. 1582–1589, Apr. 2006. [10] M. Zedler, G. V. Eleftheriades, and P. Russer, “Investigation on the dispersion relation of a 3D LCbased metamaterial with an omnidirectional lefthanded frequency band,” in IEEE MTTS Int. Microw. Symp. Dig., Jun. 2006, pp. 1477–1479. [11] M. Zedler, C. Caloz, and P. Russer, “Analysis of a planarized 3D isotropic LH metamaterial based on the rotated TLM scheme,” in Eur. Microw. Conf., Oct. 2007, pp. 624–627. [12] A. M. Nicolson and G. Ross, “Measurement of intrinsic properties of materials by time domain techniques,” IEEE Trans. Instrum. Meas., vol. 19, no. IM11, pp. 377–382, Nov. 1970. [13] W. B. Weir, “Automatic measurement of complex dielectric constant and permeability at microwave frequencies,” Proc. IEEE, vol. 62, no. 1, pp. 33–34, Jan. 1974. [14] S.G. Mao, S.L. Chen, and C.W. Huang, “Effective electromagnetic parameters of novel distributed lefthanded microstrip lines,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 4, pp. 1515–1521, Apr. 2005. [15] B. Bandlow, R. Schuhmann, G. Lubkowski, and T. Weiland, “Analysis of singlecell modeling of periodic metamaterial structures,” IEEE Trans. Magn., vol. 44, no. 6, pp. 1662–1665, Jun. 2008. [16] J. Reed and G. J. Wheeler, “A method of analysis of symmetrical fourport networks,” IRE Trans. Microw. Theory Tech., vol. MTT4, no. 4, pp. 246–252, Oct. 1956. [17] A. M. E. Safwat, “Microstrip coupled line composite right/lefthanded unit cell,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 7, pp. 434–436, Jul. 2009. [18] C. Caloz, A. Sanada, and T. Itoh, “A novel composite right/lefthanded coupledline directional coupler with arbitrary coupling level and broad bandwidth,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 3, pp. 980–992, Mar. 2004.
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[19] C. Liu and W. Menzel, “Broadband viafree microstrip balun using metamaterial transmission lines,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 7, pp. 437–439, Jul. 2008. [20] M. Hashemi and T. Itoh, “Coupled composite right/lefthanded leakywave transmission lines based on common/differentialmode analysis,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 12, pp. 3645–3656, Dec. 2010. [21] W. C. Yengst, Procedures of Modern Network Synthesis, 1st ed. New York: Macmillan, 1964. [22] M. A. Eberspächer, K. Eccleston, and T. F. Eibert, “Realization of viafree microstrip composite right/lefthanded transmission lines,” in German Microw. Conf., Mar. 2009, pp. 1–4. [23] CST Microw. Studio. CST, Framingham, MA, 2012. [Online]. Available: http://www.cst.com/ [24] AWR Microw. Office. AWR, El Segundo, CA., 2012. [Online]. Available: http://www.awrcorp.com/ Mark A. Eberspächer (S’09) received the Dipl.Ing. degree in electrical engineering from the Universität Stuttgart, Stuttgart, Germany, in 2008. Since 2008, he has been a Research Assistant with the Lehrstuhl für Hochfrequenztechnik, Technische Universität München (TUM), Munich, Germany. His research activities are focused on design and analysis methods for CRLH materials, periodic structures, and leakywave antennas.
Thomas F. Eibert (S’93–M’97–SM’09) received the Dipl.Ing. (FH) degree from Fachhochschule Nürnberg, Nuremberg, Germany, in 1989, the Dipl.Ing. degree from RuhrUniversität Bochum, Bochum, Germany, in 1992, and the Dr.Ing. degree from Bergische Universität Wuppertal, Wuppertal, Germany, in 1997, all in electrical engineering. From 1997 to 1998, he was with the Radiation Laboratory, Electrical Engineering and Computer Science (EECS) Department, The University of Michigan at Ann Arbor. From 1998 to 2002, he was with Deutsche Telekom, Darmstadt, Germany. From 2002 to 2005, he was with the Institute for Highfrequency Physics and Radar Techniques of FGAN e.V., Wachtberg, Germany, where he was Head of the Department of Antennas and Scattering. From 2005 to 2008 he was a Professor of RF technology with the Universität Stuttgart, Stuttgart, Germany. Since October 2008, he has been a Professor of highfrequency engineering with the Technische Universität München (TUM), Munich, Germany. His major areas of interest are numerical electromagnetics, wave propagation, measurement techniques for antennas and scattering, as well as all types of antenna and microwave circuit technologies for sensors and communications.
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An Equivalent Circuit for Discontinuities Exciting Evanescent Accessible Modes Leonardo Zappelli, Member, IEEE
Abstract—An equivalent circuit for discontinuities exciting evanescent accessible modes is proposed. The key feature of this equivalent circuit is its capability for simplification if a port relative to an accessible evanescent mode is matched, or connected to a very long line. Circuit drawing is simple, fast, and based on a regular polygon with as many susceptances as the sides and diagonals. Each side is connected with a line of electrical length to the terminal ports, and if the port refers to an evanescent accessible mode, a series reactance is added. This reactance is the key to the evanescent part of the circuit because it is able to cancel the effect of the evanescent mode if the relative port is matched or connected to a very long evanescent line, reducing the complexity of the circuit by one degree. With the help of the proposed equivalent circuit, we can define some approximating functions for the elements of a circuit representing a post in a waveguide, which can be used to speed up the optimization of complex structures, like filters or diplexers, based on posts. Index Terms—Equivalent circuits, evanescent modes, generalized scattering matrix, interacting discontinuities, matrix theory.
I. INTRODUCTION
T
ODAY, the development of many components at microwave frequencies are obtained with the help of numerical software applications, such as CST, HFSS, or others, which perform a very accurate numerical model, obtaining the scattering matrix describing the interactions between the ports of the device. These types of software not only take into account the presence of propagating and evanescent modes that are necessary to represent the interactions between adjacent interacting obstacles, but are also able to optimize the dimensions of the interacting discontinuities to satisfy the required characteristics of the overall device. Typical applications of these types of software are the development of passband and stopband filters, diplexers, and folded multiplexers. This approach is very effective and it can be defined as a “black box” one since the developer chooses the kind of discontinuities, obstacles, and waveguides contained in the device and the electromagnetic software optimizes all the parameters. The
Manuscript received July 27, 2011; revised January 24, 2012; accepted January 30, 2012. Date of publication March 05, 2012; date of current version April 27, 2012. The author is with the Dipartimento di Ingegneria dell’Informazione, Università Politecnica delle Marche, 60131 Ancona, Italy (email: l.zappelli@univpm. it). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2187533
scattering matrix satisfying the required mask of the overall device is obtained after some cycles of iterations. This “modern” approach can be seen as an evolution of the “classic” approach that has been used for many years, based on the equivalent circuits of waveguide discontinuities, as discussed in the two excellent books by Marcuvitz [1] and Montgomery et al. [2]. The equivalent circuits in the “classic” approach have the great advantage of giving a physical explanation for the interactions, modeling them with reactive series/ shunt inductive/capacitive loads. Once an equivalent circuit has been defined, it can be used in an optimization process to satisfy the required characteristics. The limit of the equivalent circuits in [1] and [2] lies in the fact that they always refer to electrical quantities (voltage and current) defined only for the propagating fundamental mode at the input/output ports of the discontinuity. Hence, a correct optimization process must be based on the assumption that the interconnecting discontinuities of very complex structures, like a passband or stopband filter, or a multiplexer, must be “far” enough from each other to avoid interactions with higher order evanescent modes. The actual devices very often require a compact design, with the smallest overall dimensions, which is a cogent requirement for satellite equipment. Hence, the discontinuities in the devices are arranged so closely that the interactions between higher order evanescent, but accessible, modes must be taken into account. In fact, the accessible modes are the first modes excited by the discontinuity (all the propagating modes plus the first few nonpropagating modes) and are responsible for the interaction between adjacent discontinuities. The localized (or nonaccessible) modes are the infinite remaining modes localized in the neighborhood of the discontinuity. Moreover, the introduction of the accessible modes in electromagnetic representation increases the number of the modal ports required to describe the interactions. Hence, the “classic” approach based on equivalent circuits seems to be no longer effective because: 1) the equivalent circuits do not contain the effects of the accessible evanescent modes and 2) even if any circuit describing these effects is defined, the number of ports needed to describe all the effects would produce a very complex topology of the equivalent circuits, which does not help the optimization process. For example, the presence of one evanescent accessible mode at the output section of a generic discontinuity would produce a threeport equivalent circuit (one input port and one output port for the input/output propagating modes plus the output port relative to the accessible evanescent mode), like the one reported in Fig. 1(a) [1], with a topology that is difficult to manage in an optimization process. Recently, Levy has proposed an approach that can solve this problem for a discontinuity with three propagating modes [3].
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Fig. 1. Equivalent circuit of a generic threeport device: (a) as reported in [1] with the impedances being , . represents (b) as reported in [3] in the hypothesis of th element of the device matrix. the
The starting point is that, once the matrix representing the discontinuity is obtained, the equivalent circuit can be “simplified” if some arrangements can be made, firstly involving a normalization of the voltages and currents [1] and then a proper choice of the terminals at which the ports of the equivalent circuit are defined. Referring to the case of the coupling from a rectangular mode waveguide to a / circular waveguide, Levy normalized the impedance matrix to a set of arbitrary terminating impedances so that, at all frequencies, , obtaining a simpler equivalent circuit representing the coupling, as shown in Fig. 1(b). With the aid of HFSS, Levy derived the and matrices of the discontinuity and then obtained the values of the reactances in the equivalent circuit of Fig. 1(b), which can be used in an optimization process without the aid of HFSS or other software. Subsequently, Levy applied this approach to the case of evanescent accessible modes. In fact, in [4]–[6], he proposes a circuit like the one in Fig. 1(b) where the series reactance represents the effect of the evanescent accessible mode. To the author’s knowledge, this is the first attempt to model an equivalent circuit that considers the presence of propagating and evanescent modes, and this circuit increases the possibility of developing a filter based on evanescent modes [7]–[13]. Recently, Rautio [14], [15] has proposed some equivalent circuits to model port Tnetworks that could take into account the presence of evanescent modes. The problem arising from these approaches lies in the fact that, even for the models proposed by Levy and Rautio, the extensions to the presence of several evanescent modes is not very simple. In fact, let us consider a compact filter or diplexer based on the iris model [6]. Very close irises imply the presence of higher order evanescent modes coupling in the device, and their effects can be modeled taking into account the previous threeport equivalent circuit shown in Fig. 1(b). Unfortunately, the circuit refers only to the first (or the last) iris, which couples the input propagating and the output propagating modes plus the output evanescent mode [for the last iris, the equivalent circuit is the reverse of the one in Fig. 1(b)]. The other irises, assumed to be very close, must be modeled with the propagating input/output modes and one (or more) evanescent mode at the
input and one (or more) at the output ports. Hence, the equivalent circuit for any inner iris must have at least four ports (two ports for the input/output propagating modes and ports for the other accessible evanescent modes at the input/output ports). The equivalent circuits become very complex, and some examples can be found in [1, Ch. 3]. The normalization proposed by Levy can help to simplify the topology, but the approach is not so easy. To overcome this problem, in this paper we propose a general equivalent circuit made up of susceptances and electrical lines, which takes into account propagating and evanescent modes in a topologically simple network. Moreover, under the hypothesis that the scattering matrix of the discontinuity has been evaluated with a commercial or selfdeveloped software, some approximating functions for the electrical parameters of the circuit are proposed, which can be used to integrate the equations in [1] and [2] and to implement simple and fast software to perform optimization with very little runtime effort. II. THEORY The definition of an equivalent circuit starting from the knowledge of the matrix is very loose [1]. In fact, as Marcuvitz states, “the arbitrariness in the choice of the terminal planes implies the existence of a variety of equivalent networks for the representation of a waveguide structure . No general criterion exists to determine which of the equivalent networks is most appropriate . Usually, there is a “natural” one distinguished by having minimum number of impedance elements . In special cases, however, the same criteria of a minimum number of network parameters, simple frequency dependence, etc., can be employed to determine the best network representation.” To that effect, Levy [3] chose to normalize some elements of the matrix of a threeport network to reduce the number of the parameters, obtaining the circuit shown in Fig. 1(b). The equivalent circuit in Fig. 1(b) is very effective if the three ports refer to propagating modes. For example, the evaluation of the scattering parameter is obtained by matching ports 2 and 3 to the impedances and (1) (2) (3) A similar evaluation is performed for the other elements of the scattering matrix. Hence, from (1), it is clear that the scattering parameters are functions of the modal impedances , as must be the case if the modes are all propagating. If port 3 refers to an evanescent accessible mode, (1) is still valid, if we replace with , as the modal impedance relative to the evanescent mode is purely imaginary. This fact seems to be a limit for the Levy’s circuit. In fact, if evanescent port 3 is matched, the effects of the third evanescent mode disappear. Hence, the reflection coefficient seen at the input port 1, , should not be a function of the characteristic
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reactance , the equivalent load seen at terminal 13 is a short circuit that cancels the presence of the evanescent mode 3, reducing the whole equivalent network to the one shown in Fig. 2(b), which contains electrical quantities relative only to the propagating modes 1 and 2, with (4)
Fig. 2. (a) Equivalent circuit of a generic threeport device proposed in this paper. Ports 1 and 2 refer to propagating modes with real modal impedance , while port 3 to the evanescent accessible mode with purely imagi. The series reactance at port 3 is exactly the nary modal impedance conjugate of the modal impedance of the evanescent accessible mode. The six independent parameters representing the network described by the matrix are and the susceptances . (b) Equivathe electrical lengths with . lent circuit of (a) if port 3 is matched to
Apart from the transformers, the equivalent network shown in Fig. 2(b) is very similar to those used in microwave theory to represent a twoport network, for example, an inverter [6]. It should be noted that the electrical lengths and do not change by reducing the circuit in Fig. 2(a) to that in Fig. 2(b) and that the value of is perfectly known from and . Some other interesting properties of the proposed equivalent circuit can be derived from its scattering matrix , obtained with the classic relationship between and matrices or by matching one port at a time (5) (6) (7)
impedance of the third evanescent mode. From this point of view, the circuit in Fig. 1(b) with scattering coefficients like (1), does not seem to be the most “natural” to describe the presence of an evanescent mode at port 3 since reflection coefficient (1) is a function of the modal impedance of the evanescent port. To overcome this problem, we try to model an equivalent circuit that contains a “natural” representation of the evanescent modes with the number of the electrical parameters represented in the circuit being fixed to the six independent ones for a threeport network [16]. By “natural” representation of the evanescent mode, we mean an equivalent circuit where the effect of the evanescent mode disappears when its port is connected to its modal impedance. To that end, we propose the equivalent network shown in Fig. 2(a), where the six independent parameters are the three susceptances and the three electrical lengths of the lines . is the susceptance between nodes and and the apex represents the number of the ports (modes) in the circuit. The electrical lengths and refer to propagating lines, characterized by terms such as , while refers to an evanescent line, characterized by terms such as . The transformers are introduced to normalize the susceptances contained in the kernel of the circuit (hereafter, quantities written in lowercase are dimensionless while those in uppercase are expressed in the proper dimension). The presence of the series reactance , the conjugate of the modal impedance of the evanescent accessible mode, in front of the evanescent line of length , should be noted since this is the key feature of the equivalent circuit. In fact, let us suppose that a very long transmission line relative to the evanescent mode is connected to port 3 (or suppose the port is matched to its modal impedance): the equivalent load at the port is only the modal impedance and the input impedance seen at terminal CC is again . Due to the presence of the series
(8) (9) (10) It should be noted that (5)–(7) depend only on the susceptance relative to ports 1 and 2. On the contrary, the scattering coefficients depend on all the susceptances of the equivalent circuit. Once the equivalent circuit has been defined and its scattering matrix (5)–(10) has been derived, we can use them to speed up the optimization process of a complex structure, like a passband filter or a diplexer. In fact, the optimization process starts from the knowledge of a prototype, which has been evaluated, for example, by a Chebishev synthesis. With the help of a commercial or selfdeveloped electromagnetic analysis software, the dimensions of the irises, posts, screws, or any other discontinuity in the waveguide are then optimized in order to satisfy the requested performance. This process usually requires a considerable runtime because the interactions between the discontinuities must be analyzed, and they become stronger as the discontinuities grow closer. Hence, it is fundamental to take into account the presence of evanescent interacting modes to correctly optimize the device. The proposed equivalent circuit can help in this process. In fact, having fixed the dimension of the waveguide and the kind of discontinuities (posts, irises, ), we can evaluate and from our knowledge of the numerical value of the scattering matrix, obtained with a commercial or selfdeveloped software for various values of the post or iris dimensions. Finally, we can extract some approximating functions for and , depending on the
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frequency and the dimensions, which integrate the formulas reported in [1], and we can use them to speed up the optimization process. First of all, once the numerical form of the matrix of the discontinuity has been extracted by a commercial or selfdeveloped software, it can be used to evaluate the elements relative to the propagating ports . In fact, as ports 1 and 2 are lossless, the susceptance can be obtained directly from in (6)
(18)
(13)
and are the susceptances and when port 3 is excited and 4 is matched. With this reduced circuit, we can evaluate from (11)–(17) with replaced by . Similarly, we can match port 3 on its modal impedance and the effects of port 3 disappear, as a short circuit is present at terminals 3 and 4: the equivalent circuit reported in Fig. 3(a) transforms into the one reported in Fig. 3(c) with
can
(19)
(11) The electrical lengths can be derived from (5) and (7) (12)
and the susceptances The electrical length be obtained from (8)–(10)
network like the one shown in Fig. 2(a) and that do not change. Hence, let us match port 4 of the circuit shown in Fig. 3(a) on its modal impedance. The input impedance seen at terminal DD is just . Hence, due to the series reactance , a short circuit is present at terminal 14 and the effects of port 4 disappear, producing the reduced circuit shown in Fig. 3(b) [formally equal to the one in Fig. 2(a)] with
(14) (15) (16)
(17) Equations (11)–(17) describe completely the equivalent network in Fig. 2(a) relative to threeport device represented by the numerical scattering matrix . It should be noted that, if the matrix has been correctly evaluated, the values of (11)–(17) are purely real, as must be the case. The equivalent circuit can be similarly defined to also take into account the presence of another evanescent accessible mode. The proposed equivalent circuit is represented in Fig. 3(a) and it has been drawn starting from the equivalent circuit proposed in [2] for fourarm junctions. It has been obtained by adding port 4, with modal impedance and electrical length , with a series reactance and a shunt susceptance , relative to the evanescent mode, to the circuit relative to the three modes model. Moreover, two other susceptances across the diagonals of the square have been added. The susceptances contained in the circuit shown in Fig. 3(a) (fourmode model) can differ from those relative to the threemode model shown in Fig. 2(a), and this is emphasized by the apex of the susceptances, which refers to the number of the ports (modes) of the circuit. The unknown parameters are ten, as they must be for a symmetric 4 4 scattering matrix, and our goal is to obtain them starting from our knowledge of the matrix of the discontinuity, obtained numerically by means of a selfdeveloped or commercial software. The evaluation starts from the consideration that we have previously obtained the unknown parameters for a threeport
and are the reactances and when port 3 is matched and 4 is excited. Hence, can be obtained from equations similar to (14)–(17) replacing with . It should be noted that (18) and (19) are not linearly independent because . The last unused scattering parameter is , which can be obtained from the circuit in Fig. 3(a) with ports 1 and 2 matched to , respectively, (20) By combining (15)–(17) and (18)–(20), we can obtain the by simple mathematical manipulations [see susceptances (A.1)–(A.6)]. The equivalent circuit relative to a fourport discontinuity can be extended to any number of ports relative to propagating or evanescent modes. The circuit is based on a regular polygon with the number of sides, , equal to the number of the ports (modes). Each side has a susceptance. Moreover, there are as many other susceptances as there are diagonals of the polygon. The series reactances are added to the ports relative to the evanescent modes. Finally, lines with proper electrical length are connected to the sides. The case of the equivalent circuit with five ports (one input propagating mode, one output propagating mode, and three output evanescent accessible modes) is shown in Fig. 4(a). The ease in drawing this type of circuit should be noted. The electrical lengths do not change and is obtained by introducing and in (14). The evaluation of the susceptances is based on an iterative reduction of such a circuit to a fourport circuit like the one shown in Fig. 3(a) by matching one port relative to an evanescent mode at a time and using the previously discussed methodology three times, in order to obtain some relationships between the susceptances of the circuit similar to (15)–(19). By combining all the obtained equations, all the susceptances can be evaluated, as described in the Appendix.
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Fig. 3. (a) Equivalent circuit of a generic fourport device. Ports 1 and 2 refer to propagating modes with real modal impedance , while ports 3 and . The series reactances at ports 3 and 4 are the conjugate of 4 to evanescent accessible modes with imaginary modal impedances and the modal impedances of the evanescent accessible modes. The ten independent parameters representing the network are the electrical lengths . (b) Equivalent circuit of (a) if port 4 is matched to with . the susceptances with . (c) Equivalent circuit of (a) if port 3 is matched to
This iterative process can be extended to the case of an equivalent circuit with ports (one propagating input mode, one propagating output mode, and evanescent output modes) based on a side polygon. The susceptances can be obtained as described in the Appendix,
(26) susceptances on diagonals
(21) susceptances on sides (22)
(27)
(23)
(28)
(24)
(29)
(25)
(30)
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Fig. 4. (a) Equivalent circuit of a fiveport device with one input propagating mode, one output propagating mode and three output evanescent modes. The lines referring to the evanescent accessible modes have purely reactive modal impedances. (b) Equivalent circuit of a fourport device with one input propagating mode and three output evanescent modes.
(31) (32)
only to the electrical length The last scattering parameter 1 and 2
of the input propagating mode. is obtained by matching ports
(33)
(43)
and are obtained from (11)–(13). The case of a discontinuity with one propagating mode at the input and only evanescent accessible modes at the output, whose equivalent circuit is shown in Fig. 4(b) for the fourport case, is analyzed in the same way as the previous case. The only difference is the form of the scattering matrix, which is simpler than the previous one. In fact, the equivalent network is represented by the following matrix when port 4 is matched:
Hence, the susceptances can be obtained by combining (18) and (19) and (37)–(43) by simple mathematical manipulations. The extension to an port circuit (one propagating input mode and evanescent output modes) is similar to the previous case, obtaining (44) (45)
(34) (35)
susceptances on sides
(36)
(46)
(37) (47)
(38) (39) with being as in (18). It should be noted that has unit modulus, as it must, because the output ports of the circuit are only relative to the evanescent modes. By matching port 3, we obtain ( are not repeated) (40)
(48) (49) susceptances on diagonals
(41)
(50)
(42)
(51)
with being as in (19). It should be noted that, conversely to the previous case, the amplitudes of depend only on the electrical length relative to the evanescent modes, while the phase is the same for all the , being related
(52) (53)
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applying to the matrix , representing the complex power entering from the ports of the scattering matrix (54) Fig. 5. Structure analyzed with the proposed equivalent circuit: the thick inductive post in a rectangular waveguide.
III. NUMERICAL RESULTS The rectangular thick inductive post in the plane of a rectangular waveguide shown in Fig. 5 can be analyzed by the cascade of two discontinuities (rectangulartobifurcated waveguide transition at and its opposite at ) separated by a bifurcated waveguide of length . The modes of the bifurcated waveguide are below cutoff, and an equivalent circuit like those previously discussed can be obtained. The choice of the number of modes in the bifurcated waveguide affects the accuracy of the model in that the shorter the bifurcated waveguide is, the larger the number of modes must be, to correctly take into account the interactions via the evanescent modes in the bifurcated guide. The geometrical parameters affecting the interactions are the length of the bifurcated waveguide and the thickness of the post. It should be noted that the thickness acts differently with different waveguides. For example, a post of thickness 0.2 mm is about 0.87% of the width of an input WR90 waveguide operating at band (8.2–12.4 GHz), while it is about 2.81% of the width of an input WR28 operating at band (26–40 GHz). The first discontinuity placed at (rectangulartobifurcated waveguide transition) has been analyzed in the past and an equivalent circuit (for a zero thickness inner wall) has been proposed in [1] only for the input waveguide, as the bifurcated waveguide is supposed to be very long and the input guide “sees” a short circuit placed at a certain distance . This hypothesis must be removed to model the thick post shown in Fig. 5 and the equivalent circuit shown in Fig. 6(a) can be proposed to analyze the cascade of discontinuities, under the hypothesis of three interacting evanescent modes. The left and right equivalent circuits [equal to the circuit shown in Fig. 4(b)] replace the rectangulartobifurcated waveguide transition placed at and its opposite placed at , respectively. The three lines of length represent the effect of the connecting bifurcated waveguide of length with being the attenuation constant of the modes. It must be remembered that one aim of this paper is the evaluation of the electrical parameters of the equivalent circuit shown in Fig. 6(a) from our knowledge of the values of the scattering parameters, in order to permit a faster and more effective evaluation and/or optimization of the overall structure. Hence, first of all, with the help of a commercial or selfdeveloped electromagnetic simulation tool, we evaluate the scattering matrix relative to the first discontinuity placed at in Fig. 6(a) for three evanescent modes in the bifurcated evanescent waveguide. It should be noted that numerical software must handled with care when some modes are below cutoff at the input/output ports. In fact, these modes can cause some instabilities in the numerical evaluation and their correctness has to be verified by
the following conditions for a lossless network [17]: (55) or if index refers In (54), is a diagonal matrix with to the propagating or evanescent mode, respectively. Having verified the correctness of the data referring to the scattering parameters, we can use them to extract from (44)–(52). As an example, the contour plot of the electrical length of the line at the input port, for a rectangulartobifurcated transition is shown in Fig. 7(a), in the range (corresponding to the band for a WR90 waveguide and to the band for a WR28 waveguide) and with being the frequency cutoff of the guided mode at the input port. From the values of , we can define a mathematical function that is the best fitting for these values. This can easily be done with the help of mathematical and software technologies, which had still not been developed in the years when Marcuvitz wrote his handbook [1]. The same fitting can be applied to the other electrical quantities, and the following function can be defined in the range previously established:
or
(56)
and are chosen in order to maintain the percentage where relative error between the real and the approximated values, and respectively, at less than 1%. The values obtained for to that effect are with
(57) obtained The percentage error with (56) and (57) is shown in Fig. 7(b), and it is maintained at below 0.5%. The same procedure can be applied to the other parameters of the equivalent circuit shown in Fig. 4(b). Once the electrical parameters of the left circuit in Fig. 6(a) have been obtained and approximated with (56), we can combine them in the arrangement shown in the same figure. The bifurcated waveguide of length acts differently on the three evanescent modes due to the different modal attenuation constants : the higher the order of the mode is, the higher the attenuation is and the less the effects on the global circuit are. To better analyze the effects of the length , all the lines between the two circuits on the opposite side in Fig. 6(a) can be put together and only one line for each mode is placed between the opposite circuits with electrical length equal to (58)
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Fig. 6. (a) Equivalent circuit of the metallic post in a rectangular waveguide shown in Fig. 5, obtained by the cascade of the equivalent circuits relative to the rectangulartobifurcated waveguide transition (left) and its opposite (right) connected with a bifurcated waveguide of length . (b) Equivalent circuit shown in as in (60) and (61). (a) where three T circuits replace the three evanescent lines and the series reactances, with
Moreover, each line can be replaced by a T circuit with series reactances and shunt reactances (59) (60) in series to . Finally, as the circuit is symmetwith rical with respect to the middle plane, the overall circuit can be reduced as shown in Fig. 6(b), where
34 or 14, deleting the effect of the evanescent line and reducing the complexity of the circuit. Hence, with the help of (58) and of the results obtained for in the range , we can find the minimum value for the bifurcation length in order to neglect the evanescent mode at the th port, by imposing at the maximum frequency
(61) It should be noted that the two shunt reactances near the middle plane produce an equivalent reactance equal to (60). The series reactances in the lines relative to the evanescent modes are fundamental in the equivalent circuits shown in Fig. 6(a) and (b) because they can cancel the effects of the evanescent lines if . In fact, under this condition, in (60), and a short circuit is present at the middle plane. Moreover, in (61); hence, a short circuit is also present at terminal 23 or
(62) The results for are shown in Fig. 8: the regions above each line represent the combination of and , which ensures that the relative mode can be neglected because the equivalent total electrical length of the line connected to the th port in Fig. 6(a) is greater than 10, as previously discussed. For example, the “0mode region” refers to the case of such a
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Fig. 8. Normalized minimum length of the bifurcated waveguide of width shown in Fig. 5 to neglect the evanescent mode excited by the rectangulartobifurcated waveguide transition.
sider in the electromagnetic model of the connecting bifurcated waveguide. Having defined the modal range of validity of the fourmode model, the scattering parameters seen at the input/output terminals of the post of width and length can be obtained by applying the symmetry condition on the circuit in Fig. 6(b), corresponding to the presence of a short or an open circuit in the middle plane, as reported in Fig. 6(b), neglecting the other half of the circuit, yielding to (63) (64) Fig. 7. Contour plots of: (a) the electrical length of the line at the input port of a rectangulartobifurcated waveguide, (b) the percentage relative error between the real and approximated value obtained with the approximating function (56) in the range and with being the frequency cutoff of the fundamental mode in the rectangular waveguide.
long bifurcated waveguide that any evanescent mode can be neglected (the equivalent load is a short circuit directly connected at terminal 12). Similarly the “2mode region” ensures that the length is so long that the modes can be neglected and only must be considered in the bifurcated waveguide. To define the minimum value for of the “3mode region,” an analysis is needed based on fivemode model, and the curve relative to the fourth mode ( ) has been evaluated and it is shown in Fig. 8. It should be noted that, without the proposed equivalent circuit, the minimum length would be obtained simply from in (62), yielding its overestimation, and consequently, a greater number of modes to con
(65) (66) are the input reactances seen at terminals 23 or 34 or 14 in the presence of a short ( ) or an open ( ) circuit in the middle plane (67) (68)
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Fig. 9. Contour plots of the relative percentage error between the real and for a post of length the approximated values of the scattering parameter in the range and . The approximated values have been obtained with the introduction of the expansions (56) and their coefficients in (63)–(66).
The reflection coefficients (64) and (65) have been cast in a form that allows a simplification to be easily performed if the number of the evanescent modes is less than 3. This occurs when the total line (62) is so long that the effect of the evanescent mode connected to the th port can be neglected. In this condition, in (66) because and (65) can be simplified neglecting the terms contained in the square brackets corresponding to . Hence, if the third, or the second and third, evanescent mode can be neglected, the last two, or three, lines in (65) can be deleted. The previously defined approximations (56) can be introduced in (63)–(66) to implement a very userfriendly worksheet, or a simple program, which is able to analyze a post with normalized width and length . This was performed and the contour plot of the relative percentage error between the real values of the scattering parameter of a post of length in the range and and the value obtained with the application of the expansion (56) is shown in Fig. 9, denoting a very low relative percentage error. Hence, the expansions (56) with their coefficients are able to give a good representation of a post with low runtime. Having obtained the scattering coefficients from (63)–(66), the overall equivalent circuit of a post of normalized length can be cast in a form similar to the one shown in Fig. 2(b). The equivalent circuit of the post can be more detailed by adding one input evanescent accessible mode in the circuit of the rectangulartobifurcated waveguide transition placed at in Fig. 6(a) and one output evanescent accessible mode in the circuit of the bifurcatedtorectangular waveguide transition placed at . If the output side of the rectangulartobifurcated waveguide transition is represented with three evanescent accessible modes, the overall equivalent circuit of the rect
angulartobifurcated waveguide transition at is represented by the fivemode model shown in Fig. 4(a), with the difference that port 2 is replaced by an evanescent port similar to ports 3–5 with an opposite polarity to describe an input port. As previously discussed, the coefficients in the expansions (56) for the electrical quantities and involved in the fivemode model in Fig. 4(a) can be evaluated from (44)–(52). By cascading this circuit with a bifurcated waveguide of length followed by the same reverse circuit, representing the bifurcatedtorectangular waveguide transition at , we can obtain the equivalent circuit of the whole post of length , which can be cast in the form shown in Fig. 3(a) in the hypothesis of two input and two output accessible modes, where ports 3 and 4 refer to the input and output evanescent accessible modes. Finally, we can use (56) to evaluate the fourport scattering matrix relative to a post with two accessible modes at input and two accessible modes at output with equations similar to (63)–(66). In the hypothesis of applying this approach to the synthesis and optimization of filters based on posts of equal width and different length , let us evaluate the scattering matrix for a given width in the range and with step equal to 0.05. We can represent the matrix with the fourmode model shown in Fig. 3(a) and we can extract the electrical parameters from (21)–(30). Finally, we can define an expansion similar to (56) to approximate the electrical quantities involved in the fourmode circuit representing the post
or
(69)
The presence of the normalized variable in (69) should be noted instead of the appearing in (56), as is fixed. With this approach, the coefficients in (69) of the susceptances and electrical lengths of the post of length have been obtained for , i.e., in the hypothesis of posts 0.15mm width, realized in a WR28 waveguide. With their help, the synthesis of filters in WR28 is greatly simplified. As an example, the coefficients for the expansion (69) of and are used to analyze a band bandpass filter in WR28 ( mm, mm), as described in [18]. The four posts are realized with a thin sheet of copper ( mm) and their lengths are mm, mm, corresponding to 0.143 and 0.504, respectively. The posts are placed at distances mm and mm. The results obtained for this filter are reported in Fig. 10 for in (69). The results are also in very good agreement with those discussed in [18]. The final consideration is that, with the proposed circuits and approximations (56) or (69), an optimization process is very fast because the evaluation of the electrical quantities (or the scattering matrices related to the equivalent circuits) is made with simple series like (56) or (69) with very little effort in terms of software and machine time.
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Hence, nodes 1 and 3 are of M kind, node 2 of P kind, and node 4 of E kind. The electrical lengths and the susceptances of the equivalent circuit can be obtained with the approach described in Section II as follows: (A.1) (A.2) (A.3) (A.4) (A.5) (A.6)
Fig. 10. for the passband filter discussed in [18] obtained with the application of the proposed equivalent circuit shown in Fig. 3(a) and of the expansions (56) and (69) (continuous line). The experimental results discussed in [18] are also shown via dotted lines.
TABLE I EVALUATION OF THE SUSCEPTANCES OF A FIVEPORT CIRCUIT BY MATCHING ONE PORT AT A TIME
The first column represents the kind of the nodes at which the suceptance is connected. The case of the equivalent circuit with five ports is shown in Fig. 4(a). The combinations of nodes containing a susceptance are PM, EM, EE on the sides and PE, ME, MM on the diagonals of the polygon. The evaluation of the susceptances is based on an iterative reduction of the fiveport circuit to a fourport circuit like the one shown in Fig. 3(a), by matching one port relative to an evanescent mode at a time for three times, in order to obtain some relationships between the susceptances of the circuit, as shown in Table I. Susceptances must be evaluated from (A.1)–(A.6) with ports and instead of ports 3 and 4 in the scattering coefficients, as explained in the third row of Table I. For example, if port 3 is matched, ports and of the fiveport circuit transform in ports 3 and 4 of the fourport circuit shown in Fig. 3(a). Hence, is obtained from the fourth column in the last line
IV. CONCLUSION In this paper, an equivalent circuit for discontinuities exciting evanescent accessible modes has been proposed. The electrical susceptances and electrical lengths involved in the circuit can be approximated with simple series functions, which make the analysis and the optimization of waveguide filters made with irises or posts cascades very easy and fast. APPENDIX Let us define the nodes of the susceptance square in the fourport equivalent circuit shown in Fig. 3(a) as follows: • P (propagating): if the sides connected to the node are both relative to propagating modes; • M (mixed): if the sides connected to the node are relative to a propagating mode and an evanescent one; • E (evanescent): if the sides connected to the node are both relative to evanescent modes.
We can observe that and do not change with respect to , , and , relative to the fourport circuit shown in Fig. 3(a). This is due to the fact that these susceptances are connected to nodes 2–4, which do not change their tipology with respect to the fourport circuit, remaining fixed to P, M, and E, respectively, and are connected to the same ports of the fourport circuit, as can be observed by comparing Figs. 3(a) and 4(a). The susceptances change with respect to the case of the fourport circuit because the relative nodes change the tipology or are connected to a different port, listed as follows: • : the nodes are P and M for the fourport circuit and the fiveport circuit, but port 5 connected to node 1 has different impedance with respect to port 4 connected to node 1 in the fourport circuit; • : the nodes are M and E for the fourport circuit and the fiveport circuit, but port 5 connected to node 1 has
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TABLE II EVALUATION OF THE SUSCEPTANCES OF A SIXPORT CIRCUIT BY MATCHING ONE PORT AT A TIME
Fig. 11. Simplified “kernel” of the circuit of a sixport circuit.
different impedance with respect to port 4 connected to node 1 in the fourport circuit; • moves from the side to the diagonal. Finally, the susceptances are not defined in the fourport circuit. Combining equations shown in Table I and (A.1)–(A.6), the new susceptances can be obtained as follows: (A.7)
(A.15)
(A.8)
(A.16) (A.9)
(A.17)
(A.10) (A.18) (A.11)
(A.19)
(A.12)
(A.20)
(A.13)
(A.21)
If another evanescent accessible mode is added to the equivalent circuit, we obtain the sixport circuit shown in Fig. 11 (only the simplified “kernel” of the circuit is shown and the susceptances are drawn without the “box”). The combinations of nodes containing a susceptance are PM, EM, EE on the sides and PE, ME, MM, EE on the diagonals of the polygon. It should be noted that increasing the number of ports, other combinations of nodes are not possible. Hence, the analysis of the sixport circuit is the most general we can expect. Following the previous discussion, we can expect that the susceptances do not change with respect to because the nodes or the ports connected to them do not change their properties, as can be observed by comparing Figs. 4(a) and 11. The susceptances change and the susceptances are not defined in the fiveport circuit. The susceptances are obtained by matching one port relative to an evanescent mode at a time, as reported in Table II. Combining equations shown in Table II and (A.7)–(A.13), the new susceptances can be obtained as follows: (A.14)
(A.22) By comparing (A.1)–(A.6), (A.7)–(A.13), and (A.14)–(A.22), and recalling that circuits with seven or more sides have no other combinations of nodes containing susceptances other than those previously discussed (PM, ME, EE on the sides and PE, MM, ME, EE on the diagonals), we can obtain the susceptances (21)–(30) relative to the general case of a circuit with ports (one propagating input mode, one propagating output mode and evanescent output modes). ACKNOWLEDGMENT The author wishes to thank Prof. A. Morini, Università Politecnica delle Marche, Ancona, Italy, for providing the experimental results reported in [18]. REFERENCES [1] N. Marcuvitz, Waveguide Handbook. 1951.
New York: McGrawHill,
ZAPPELLI: EQUIVALENT CIRCUIT FOR DISCONTINUITIES EXCITING EVANESCENT ACCESSIBLE MODES
[2] C. G. Montgomery, R. H. Dicke, and E. M. Purcell, Principles of Microwave Circuits, 1st ed. New York: McGrawHill, 1948, [Peter Peregrinus on behalf of the IEE, London, U.K. (1987, II ed)]. [3] R. Levy, “Derivation of equivalent circuits of microwave structures using numerical techniques,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 9, pp. 1688–1695, Sep. 1999. [4] R. Levy, “Determination of simple equivalent circuits of interacting discontinuities in waveguides or transmission lines,” IEEE Trans. Microw. Theory Tech., vol. 48, no. 10, pp. 1712–1716, Oct. 2000. [5] L. Hendrick and R. Levy, “Design of waveguide narrowwall shortslot couplers,” IEEE Trans. Microw. Theory Tech., vol. 48, no. 10, pp. 1771–1774, Oct. 2000. [6] F. Vanin, D. Schmitt, and R. Levy, “Dimensional synthesis for wideband waveguide filters and diplexers,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 11, pp. 2488–2495, Nov. 2004. [7] H. Haskal, “Matrix description of waveguide discontinuities in the presence of evanescent modes,” IEEE Trans. Microw. Theory Tech., vol. MTT12, no. 2, pp. 184–188, Mar. 1964. [8] G. Craven and C. Mok, “The design of evanescent mode waveguide bandpass filters for a prescribed insertion loss characteristic,” IEEE Trans. Microw. Theory Tech., vol. MTT19, no. 3, pp. 295–308, Mar. 1971. [9] C. Mok, “Design of evanescentmode waveguide diplexers,” IEEE Trans. Microw. Theory Tech., vol. MTT21, no. 1, pp. 43–48, Jan. 1973. [10] R. Snyder, “New application of evanescent mode waveguide to filter design,” IEEE Trans. Microw. Theory Tech., vol. MTT25, no. 12, pp. 1013–1021, Dec. 1977. [11] R. Snyder, “Dielectric resonator filters with wide stopbands,” IEEE Trans. Microw. Theory Tech., vol. 40, no. 11, pp. 2100–2103, Nov. 1992. [12] R. Levy, R. Snyder, and G. Matthaei, “Design of microwave filters,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 3, pp. 783–793, Mar. 2002.
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[13] R. Snyder, E. Niver, K. Um, and S. Shin, “Suspended resonators for filtersreduced excitation of evanescent cavities using high dielectric constant feedlines,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 12, pp. 2890–2895, Dec. 2002. [14] J. Rautio, “Synthesis of compact lumped models from electromagnetic analysis results,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 12, pp. 2548–2554, Dec. 2007. [15] J. Rautio, “ port Tnetworks and topologically symmetric circuit theory,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 4, pp. 705–709, Apr. 2010. [16] R. Collin, Foundations for Microwave Engineering. New York: McGrawHill, 2001. [17] A. Morini and T. Rozzi, “On the definition of the generalized scattering matrix of a lossless multiport,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 1, pp. 160–165, Jan. 2001. [18] T. Rozzi, F. Moglie, A. Morini, W. Gulloch, and M. Politi, “Accurate fullband equivalent circuits of inductive posts in rectangular waveguide,” IEEE Trans. Microw. Theory Tech., vol. 40, no. 5, pp. 1000–1009, May 1992.
Leonardo Zappelli (M’97) received the M.S. degree (summa cum laude) and Ph.D. degree in electronic engineering from the University of Ancona, Ancona, Italy, in 1986 and 1991, respectively. Since 1988, he has been with the Dipartimento di Ingegneria dell’Informazione, Università Politecnica delle Marche, Ancona, Italy, where he is currently an Assistant Professor. His research interests are microwaves, electromagnetic compatibility, phasedarray antennas, and frequencyselective surfaces.
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A Broadband USlot Coupled MicrostriptoWaveguide Transition Xiaobo Huang and KeLi Wu, Fellow, IEEE
Abstract—A novel planar broadband microstriptowaveguide transition is proposed in this paper. The referred waveguide can be either rectangular waveguide or ridged waveguide. The transition consists of an opencircuited microstrip quarterwavelength resonator and a resonant Ushaped slot on the upper broadside wall of a shortcircuited waveguide. A physicsbased equivalentcircuit model is also developed for interpreting the working mechanism and providing a coarse model for engineering design. The broadband transition can be regarded as a stacked twopole resonator filter. Each coupling circuit can be approximately designed separately using the groupdelay information at the center frequency. In addition to its broadband attribute, the transition is compact in size, vialess, and is highly compatible with planar circuits. These good features make the new transition very attractive for the system architecture where waveguide devices need to be surface mounted on a multilayered planer circuit. Two design examples are given to demonstrate the usefulness of the transition: one is a broadband ridgedwaveguide bandpass filter and the other is a surfacemountable broadband lowtemperature cofired ceramic laminated waveguide cavity filter. Both filters are with the proposed transition for interfacing with microstrip lines, showing promising potentials in practical applications. Index Terms—Broadband, laminated waveguide, microstriptowaveguide transition, ridged waveguide, transition, waveguide filters.
I. INTRODUCTION
I
N COMMERCIAL and military communication systems operating in microwave and millimeterwave frequencies, microstrip and waveguide are the two most commonly used transmission lines for effectively transferring highfrequency signals among various modules. Microstrip lines are often used for connecting multiple active circuit modules involving transistors, monolithic microwave integrated circuits (MMICs), and various surface mounted components, whereas waveguides are usually the first choice for antenna feed network, high filters, and lowloss transmission lines if space is permitted. In a system architecture design, it is advantageous to have coexisting modules that use different types of transmission Manuscript received June 27, 2011; revised January 03, 2012; accepted January 05, 2012. Date of publication March 08, 2012; date of current version April 27, 2012. This work was supported in part by the Research Grants Council of the Hong Kong Special Administrative Region under Grant 2150499. X. Huang was with the Department of Electronic Engineering, The Chinese University of Hong Kong, Shatin, Hong Kong. He is now with the China Research and Development Center, Comba Telecommunication Systems, Guangzhou 510530, China (email: [email protected]). K.L. Wu is with the Department of Electronic Engineering, The Chinese University of Hong Kong, Shatin, Hong Kong (email: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2187677
line, such as microstrip lines and waveguides. In this connection, a broadband microstriptowaveguide transition is required when a waveguide device needs to be connected with a module whose interfacing transmission line is microstrip. In many applications, such interconnections are preferred to be surface mounted on a multilayered system board. Therefore, developing a broadband microstriptowaveguide transition, which is conformal to a planar substrate, easy to fabricate, and more importantly compact in size, is a very important subject. In addition to meeting the increasing demands on signal bandwidth, a broadband transition also provides other attractive characteristics, such as low insertion loss and less manufacturing tolerance requirement. There are many microstriptowaveguide transition configurations proposed in the past. The earliest published work can be traced back to 1967 [1]. The existing microstriptowaveguide transitions can be classified into three categories: the probe insert type, impedancetaper type, and aperture coupled type. For the probe insert type, the probe can be considered as a kind of extension of the microstrip line that is inserted into the waveguide from either a sidewall or the end wall. Various probe configurations were proposed for broadening the working bandwidth. Some prior works in this category include patch probe [2], Yagi antennalike probe [3], gradually tapered ridges at opposite sides of an inserted dielectric substrate and a Tshaped probe with an impedance transformer [4], [5], and radialshaped probe [6]. The probetype transitions are usually not conformal to planar circuits. The most unfavorable feature of these types of transitions is the inconvenience of installation for mass production, particularly in millimeterwave applications due to their nonplanar structure in nature. The impedance taper type of transitions can be considered as an improvement of the probe insert type in terms of conformity to planar circuits. The popular approaches in this category use multisection ridgedwaveguide impedance stairs or microstrip taper to convert the quasiTEM mode of microstrip line to a dominant mode in rectangular waveguide [7]–[9]. Although the structure allows a waveguide device to be integrated with other planar circuits, its oversized dimensions and the narrow bandwidth would be the limitations for many applications. On the other hand, aperture coupled transitions were also investigated by many researchers in the past. It is interesting that in all these aperture coupled microstriptowaveguide transitions found in the literature, the signal is coupled at the end wall or narrow sidewall of the waveguide [10]–[13] and the apertures are small in terms of wavelength. It is understandable that the electric field coupled by an electrically small aperture at the end wall of rectangular waveguide is in line with the mode, and with an appropriate matching element the mode
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HUANG AND WU: BROADBAND USLOT COUPLED MICROSTRIPTOWAVEGUIDE TRANSITION
can be excited effectively. Nevertheless, considering the conformity to planar circuits and the convenience of installation for highvolume production, the broadside wall aperture coupled microstriptowaveguide transitions would be a favorite configuration for system integrations. Therefore, developing a new coupling mechanism with a slot on the broadside wall of a waveguide and an effective circuit structure for transferring the broadband signal is an important subject. In this paper, a novel broadband microstriptowaveguide transition is proposed. The transition is analogous to a twopole resonator filter with two resonant poles (reflection zeros) in the passband. For clearly revealing the working principle and providing an engineering design guideline, a physicsbased equivalentcircuit model for the transition is also developed. Based on the equivalentcircuit model, the coupling coefficients of the physical circuit model can be expressed in terms of groupdelay information of an approximated individual subcircuit model. For a typical application in microwave frequencies, more than 55% bandwidth for the return loss better than 15 dB can be achieved. In addition to the excellent broadband performance, the new vialess transition will be an attractive choice for system integration in terms of its compact size, the conformity to planar circuits, and the simplicity in manufacturing for mass production. The declared features are demonstrated through two filter design examples: one is a surface mountable broadband ridgedwaveguide filter; the other is a surface mountable lowtemperature cofired ceramic (LTCC) laminated waveguide filter module. Both are in band. To show the broadband feature of a standalone transition, a backtoback microstripwaveguidemicrostrip test module was designed, manufactured, and tested. The two filter examples were designed by following the given design formula and fullwave electromagnetic (EM) simulation tool Ansoft HFSS. The designed modules were manufactured and verified by experiment. Very good agreement between the measured and simulated results is shown, which further verifies the proposed transition structure and the design procedure. II. CONFIGURATION OF THE TRANSITION The proposed transition consists of an opencircuited quarterwavelength microstrip line resonator that is directly coupled to the input microstrip line, a halfwavelength resonant Ushaped slot on the substrate ground plane, which also serves as a broadside wall of the waveguide, and a shortcircuited waveguide underneath the ground plane. The waveguide here is defined as a single conductor tube with the electric field of its dominant mode perpendicular to the broadside wall. Both rectangular waveguide and ridged waveguide fall into the category. Fig. 1(a) and (b) shows an exploded view of the proposed transition for a microstrip line to rectangular waveguide transition and a microstrip line to ridgedwaveguide transition, respectively. In the transition structure, the microstrip line printed on a dielectric substrate is placed perpendicularly to the short middle section of the Ushaped slot. The coupling between them can be controlled by the width of the slotline and an offset displacement from the center. In general, the characteristic impedance of the input microstrip line and that of the opencircuited quarter
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Fig. 1. Structure of the proposed transition. (a) Microstriptorectangular waveguide transition. (b) Microstriptoridgedwaveguide transition.
wavelength transmission line can be different for controlling the coupling between them. The open end is deliberately placed approximately away from the middle section for creating an opencircuited resonator. Being a Ushaped half wavelength slotline resonator, the transition only occupies a space of less than a quarterwavelength. The waveguide is short circuited at the end near the middle section of the Ushaped slot and the other end defines as a port of the transition. The coupling between the waveguide and the halfwavelength Ushaped slotline resonator can be controlled by introducing an obstacle in the waveguide section that is in the vicinity of the slotline resonator. Such an obstacle can be a tuning screw or an impedance step, as illustrated in the transition for ridged waveguide shown in Fig. 1(b). The working mechanism of the proposed transition can be explained by the concept of a twopole resonator filter having two resonant poles in the passband. As compared to the conventional transitions of prior art, the proposed transition provides a much wider bandwidth, and consequently, lower insertion loss. III. PHYSICSBASED EQUIVALENTCIRCUIT MODEL In order to reveal the working mechanism of the transition, an equivalentcircuit model using transmission lines and ideal transformers is given in Fig. 2. The circuit model comprises three transformers, an opencircuited quarterwavelength
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Fig. 3. (a) Coupling circuit between a transmission line and an opencircuited resonator by an ideal transformer. (b) Corresponding lumpedelement circuit model.
Fig. 2. Equivalentcircuit model of the proposed microstriptowaveguide transition.
resonator and two shunt shortcircuited quarterwavelength resonators. The transformers in the circuit represent the EM couplings between the input/output transmission lines and the resonators. The Ushaped slot is represented by two parallel shortcircuited quarterwavelength slotline resonators and acts as a middleman between the two types of transmission line. Specifically, transformer represents the coupling between the Ushaped slotline resonator and the microstrip line. Transformer describes the coupling between the opencircuited quarterwavelength resonator and the microstrip line. Similar to transformer , depicts the coupling between the slotline resonator and the waveguide.
For the quarterwavelength opencircuited resonant circuit in Fig. 3(a), where , in the vicinity of resonant frequency ( ), the input impedance of the resonator
(2) whereas its counterpart in the equivalent circuit Fig. 3(b) looking into the series resonator can be expressed by (3) Comparing (3) with (2) leads to the inductance of the equivalent circuit (4)
A. Coupling for OpenCircuited Resonator Thus, (1) for the external In the equivalentcircuit model shown in Fig. 2, there are two interlaced resonators: an opencircuited quarterwavelength microstrip resonator and a pair of shunt shortcircuited slotline quarterwavelength resonators. Having appropriately determined the dimensions of the two resonators for a giving center frequency, designing the physical dimensions for realizing the three coupling transformers, namely, , , and , will be critical. It is known that an opencircuited quarterwavelength resonator can be approximated by a series resonant circuit. Therefore, the coupling circuit of the input microstrip line and the quarterwavelength opencircuited resonator as depicted in Fig. 3(a) can be represented by the lumpedelement circuit of Fig. 3(b). Note that by definition of an ideal transformer with turns ratio , there is , where is the resistance looking toward the transformer from the resonator and is the source resistance, or the characteristic impedance of the input microstrip line in the physical model. Therefore, the external of the series resonant circuit of Fig. 3(b) at the resonant frequency is (1)
reduces to (5)
can be measured from reflection coefficient If the external , then the coupling coefficient can be determined by (5). By examining Fig. 3 and using the definition of an ideal transformer, the reflection coefficient looking at the input port of the microstrip line is given by where
(6)
More specifically,
(7)
. where It can be found that, at resonance, the group delay of the reflection coefficient is (8)
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Fig. 4. (a) Coupling circuit between a transmission line (microstrip or waveresonators by an ideal transformer. guide) and a pair of shortcircuited shunt (b) Corresponding lumpedelement circuit model.
The above relation is not new and is valid for any single resonator circuit [14]. Once is obtained from (8), the coupling coefficient can be determined by (5). B. Coupling Coefficients to UShaped Slotline Resonator At resonant frequency, the opencircuited quarterwavelength resonator short circuits transformer 2. Therefore, the coupling and to a Ushaped slotline resonator become isolated. Thus, the coupling circuit between the transmission line, which could be either a microstrip line or a waveguide, and the halfwavelength slotline resonator can be represented by an ideal transformer, as shown in Fig. 4(a), where input admittance is given by (9) Since a shortcircuited quarterwavelength transmission line tank, the physical circuit can be approximated by a shunt of a transmission line that is coupled to the halfwavelength Ushaped slotline resonator, as shown in Fig. 4(a), can be represented by the lumped element circuit of Fig. 4(b). By a similar procedure as that for finding coupling coefficient , it can be obtained that (10) and that the group delay of the reflection coefficient is related to the external by (8). Note that the notation refers to the coupling coefficient or . IV. DESIGN OF PHYSICAL DIMENSIONS The detailed guideline for designing physical dimensions of the proposed transition is illustrated by a design example of a broadband transition between a microstrip line and a ridge waveguide. Fig. 5(a) shows a centered longitudinally crosssectional view of the microstriptoridge waveguide transition. Fig. 5(b)–(d) are plan views of the reference planes A–A’, B–B’, and C–C’, respectively. The related dimensional variables of the transition are also given in Fig. 5. With the aid of the equivalentcircuit model discussed in Section III, an optimal circuit model for a given frequency band of interest, the characteristic impedances of the microstrip line and the ridgedwaveguide dimension can be obtained by adjusting or optimizing the parameters in the circuit model shown in Fig. 2 using a circuit simulator such as Agilent ADS software. Due to the simplicity of the equivalentcircuit model,
Fig. 5. Dimensions of the microstriptoridgedwaveguide transition.
it takes nearly no time to optimize the circuit model that operates in the desired frequency bandwidth. The optimized circuit model should provide all the realizable coupling coefficients and serve as the coarse model in a spacemapping optimization process, whereas the Ansoft HFSS EM simulation software is used as the fine model for designing the physical structure [15]. It is known that changing the width of the slotline not only changes the characteristic impedance, but also affects its couplings to the input/output transmission lines. With a given slotline width, the total length of the Ushaped slotline is designed to be approximately half guided wavelength according to the designed circuit model. Fig. 6(a)–(c) shows the physical models for the determining coupling coefficients , , and in the equivalent circuit of Fig. 2, respectively. Since the opencircuited quarterwavelength resonator is nearly short circuited at the point extended to the edge of the slotline, in the physical model for calculating , the microstrip line crossingover the U slotline will be short circuited to ground, as shown in Fig. 6(a). It can be seen from Fig. 2 that when calculating coupling , the U slotline resonator must be detuned so that no energy is divided. In addition, the dominant factor for determining coupling is the discontinuity of the section of slotline that divides the microstrip line and the quarterwavelength opencircuited resonator. Therefore, for calculating coupling , one only needs to consider a simplified physical model that consists of a short section of the slotline,
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TABLE I COMPARISON OF THE CIRCUIT MODEL PARAMETERS
TABLE II DIMENSIONS OF THE TRANSITION IN MILLIMETERS
Fig. 6. Physical models for calculating the coupling coefficients.
as shown in Fig. 6(b). By the same token as that for calculating , the coupling coefficient can be calculated with the simplified model given by Fig. 6(c) in which a true shortcircuited node is realized by the waveguide end wall naturally. In other words, the waveguide end wall should not be placed too far from the middle section of the slotline resonator. In the design procedure, the required couplings can be determined one by one independently by using the groupdelay information of each corresponding simplified physical model at the center frequency and with appropriate reference planes. Having had an optimized circuit model, the initial physical dimensions of a transition can be obtained by the abovementioned process. The final dimensions will be determined by a few steps of tuning using the concept of spacemapping optimization technique, which are: 1) EM simulation response of an nonoptimized transition (fine model) is curve fitted by the response of corresponding circuit model described by Fig. 2 (coarse model); 2) the extracted circuit model is compared to the optimized circuit model (golden template) for obtaining the error vector; and 3) a new EM simulation will be conducted using the updated fine model according to the error vector. The process will be repeated for a few iterations. Once the extracted circuit model is close enough to the golden template, an optimized transition design is achieved. V. DESIGN EXAMPLES In this section, the claimed features will be demonstrated by two design examples by following the design procedure outlined in Section IV. A. Example 1 In this design example, a surface mountable broadband ridgedwaveguide bandpass filter with microstrip line as filter interface is investigated. The detailed design procedure of a microstriptoridgewaveguide transition is given here, where a 50 microstrip line printed on the substrate is used for both microstrip line and the quarterwavelength resonator. Rogers
Duroid 5870 substrate with dielectric constant of 2.33 and loss tangent of 0.0012 is used. The Ushaped slotline and the ridged waveguide are with the characteristic impedance of 160 and 88 , which were calculated by closedform formulas given in [16] and [17], respectively. With the impedances are chosen, the other circuit parameters in the circuit model shown in Fig. 2 can be easily optimized to achieve maximum bandwidth and are given in Table I. Having had required coupling coefficients, the design equations and the segregated physical coupling models described in Sections III and IV can be applied directly to obtain the initial dimensions. The obtained initial, as well optimized, final physical dimensions are summarized in Table II. Fig. 7 shows the parameters of the initial EM model, the optimal circuit model, and the final EM designed model. The EM simulation is done by commercial Ansoft HFSS software. To verify the proposed circuit model, the final EM designed responses are curve fitted for extracting its corresponding circuit parameters according to the circuit model shown in Fig. 2. The extracted circuit parameters are also listed in Table I for comparative purposes. A slight discrepancy in the resonance frequencies of the quarterwavelength resonators is caused by the parasitic effects of the open end and the bends of the Ushaped slotline resonator. The excellent agreement of the designed and the extracted coupling coefficients demonstrates that the proposed circuit model is fully competent for a practical engineering design. The EM simulated results in Fig. 7 show that more than 55% bandwidth for the return loss of better than 15 dB across the whole frequency band can be achieved. To show the broadband feature of a standalone transition, a backtoback test module
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Fig. 9. Sectional view of the ridgedwaveguide filter. (a) Side view. (b) Top view.
Fig. 7. Simulated results of the equivalentcircuit model and EM model of the microstriptoridgewaveguide transition.
TABLE III DIMENSIONS OF THE FILTER IN MILLIMETERS
Fig. 8. Measured and simulated parameters of the backtoback microstriptoridgewaveguide transition module.
was designed, manufactured, and tested. The measured and EM simulated parameters of the test module are superimposed in Fig. 8. The measured in band insertion loss of the backtoback module is better than 0.5 dB from 4.6 to 9.1 GHz with a return loss better than 15 dB. It can be derived that the measured insertion loss of a single transition will be better than 0.2 dB from 4.6 to 9.1 GHz. Very good agreement between the simulated and measured firmly proves the concept of the proposed compact broadband transition and the circuit model. With the designed transition, a broadband ridgedwaveguide bandpass filter with microstrip interfaces is designed using ten ridge post resonators and 11 evanescent mode rectangular waveguide as coupling sections. The heights of each ridge post resonator are set to be the same and the structure of the filter is symmetric both in the transversal and the longitudinal directions. The crosssectional views of the filter is given in Fig. 9, in which the microstrip line that is printed on a Duroid 5870 substrate and the transition are not shown in this figure. An inhouse fullwave EM simulation based on modematching theory is applied for designing the ridgedwaveguide filter with ridgedwaveguide interfaces. Having merged the transition design with the filter design that is conducted separately into one entity, the final structure needs slight tuning at the input/output sections to accommodate the higher order mode effect. The designed filter dimensions are given in Table III.
Fig. 10. Photograph of the ridgedwaveguide broadband bandpass filter with the microstriptowaveguide transition.
The filter is fabricated with an ordinary milling machine and the photograph of the filter is shown in Fig. 10. The measured and EM parameters are superimposed in Fig. 11, showing a good broadband characteristic of nearly 2GHz bandwidth with the return loss next to 20 dB. B. Example 2 Laminated waveguides not only provides a lowloss attribute similar to traditional waveguide, but they also provides manufacturability in a planar multilayered fashion. In this example, an integrated LTCC laminated waveguide cavity filter with the interface of a microstrip line is designed, fabricated, and tested. The substrate tape used is Dupont 951 with the dielectric constant of 7.6 and loss tangent of 0.006. The thickness of each green tape layer is 0.095 mm. The laminated waveguide and microstrip line substrate occupies eight and four layers, respectively. A microstriptolaminatedwaveguide transition for a given desired frequency band is designed using the design
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Fig. 11. Measured and simulated parameters of the broadband ridgedwaveguide filter with microstrip interfaces.
Fig. 14. Measured and simulated parameters of the backtoback microstrip to LTCC laminated waveguide transition module.
Fig. 15. Structure and dimensions of the LTCC laminated waveguide filter.
TABLE IV DIMENSIONS (UNIT: MILLIMETERS) OF THE LAMINATED WAVEGUIDE FILTER
Fig. 12. Simulated performance of a single microstriptolaminatedwaveguide transition.
Fig. 13. Top view of the backtoback transition between a microstrip and an LTCC laminated waveguide. Fig. 16. Photograph of the LTCC laminated waveguide filter.
procedure similar to that in design example 1. The designed performance of a single transition is shown in Fig. 12. The backtoback transition module, as illustrated in Fig. 13, is also prototyped and tested, whose measured and simulated results are shown in Fig. 14. The measured magnitudes of parameters indicate that inband insertion loss is better than 0.76 dB from 5.8 to 8.2 GHz with a return loss better than 15 dB. Thus, the measured insertion loss of a single transition will be better than 0.38 dB from 5.8 to 8.2 GHz. The structure and dimensions of the laminated waveguide filter are shown in Fig. 15, which consists of four inline laminated waveguide cavity resonators. The dominant mode
is excited in each halfwavelength resonator. The interresonator couplings are realized by inductive irises. Using an HFSS solver, the optimum filter parameters can be obtained after a few steps of fine tuning and are provided in Table IV. The photograph of the laminated waveguide filter with interfaces to microstrip is illustrated in Fig. 16. The measured and simulated results presented in Fig. 17 are in good agreement. It is seen that the filter is with a bandwidth of 0.7 GHz at center frequency of 7.1 GHz and is with the return loss better than 20 dB. The insertion of the filter module near center frequency
HUANG AND WU: BROADBAND USLOT COUPLED MICROSTRIPTOWAVEGUIDE TRANSITION
Fig. 17. Measured and simulated parameters of the LTCC laminated waveguide filter with microstrip interfaces.
is about 2.5 dB. It is worth mentioning that the laminated LTCC cavity filter module is designed to be surface mountable. Its insertion loss can be improved by increasing the thickness of the cavities. VI. CONCLUSION This paper has presented a novel broadband microstriptowaveguide transition. A more than 55% bandwidth for the return loss better than 15 dB has been demonstrated in band. In addition to the broadband feature, it is compact in size, convenient for mass production, and highly compatible with planar circuits. A physicsbased equivalentcircuit model and an initial design procedure are also developed. The circuit model clearly reveals the working mechanism of the transition and can be used as a very pertinent coarse model in using the spacemapping optimization technique. The developed formulas and the simplified models for calculating coupling coefficients can provide a very good starting point. Two typical uses of the transition in band applications are given: one for a broadband ridgedwaveguide bandpass filter and one for an integrated LTCC laminated waveguide bandpass filter. Both theoretic and measured results have demonstrated its versatile applications and its excellent performance in terms of broad bandwidth and low insertion loss. REFERENCES [1] J. C. Hoover and R. E. Tokheim, “Microstrip transmissionline transitions to dielectricfilled waveguide,” IEEE Trans. Microw. Theory Tech., vol. MTT15, no. 4, pp. 273–274, Apr. 1967. [2] F. J. Villegas, D. I. Stones, and H. A. Hung, “A novel waveguidetomicrostrip transition for millimeterwave module applications,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 1, pp. 48–55, Jan. 1999. [3] N. Kaneda, Y. Qian, and T. Itoh, “A broadband microstriptowaveguide transition using quasiYagi antenna,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 12, pp. 2562–2567, Dec. 1999. [4] J. H. C. Van Heuven, “A new integrated waveguidemicrostrip transition,” IEEE Trans. Microw. Theory Tech., vol. MTT24, no. 3, pp. 144–147, Mar. 1976. band reducedheight wave[5] H.S. Oh and K.W. Yeom, “A full guideto microstrip transition with a short transition length,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 9, pp. 2456–2462, Sep. 2010. [6] Y. Lou, C. H. Chan, and Q. Xue, “An inline waveguidetomicrostrip transition using radialshaped probe,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 5, pp. 311–313, May 2008. [7] H. W. Yao, A. Abdelmonem, J. F. Liang, and K. A. Zaki, “Analysis and design of microstriptowaveguide transitions,” IEEE Trans. Microw. Theory Tech., vol. 42, no. 12, pp. 2371–2380, Dec. 1994.
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[8] Y. Ding and K. Wu, “Substrate integrated waveguidetomicrostrip transition in multilayer substrate,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 12, pp. 2839–2844, Dec. 2007. [9] D. Deslandes and K. Wu, “Integrated microstrip and rectangular waveguide in planar form,” IEEE Microw. Wireless Compon. Lett., vol. 11, no. 2, pp. 68–69, Feb. 2001. [10] B. N. Das, K. V. S. V. R. Prasad, and K. V. S. Rao, “Excitation of waveguide by stripline and microstriplinefed slots,” IEEE Trans. Microw. Theory Tech., vol. MTT34, no. 3, pp. 321–327, Mar. 1986. [11] W. Grapher, B. Hudler, and W. Menzel, “Microstrip to waveguide transition compatible with mmwave integrated circuits,” IEEE Trans. Microw. Theory Tech., vol. 42, no. 9, pp. 1842–1843, Sep. 1994. [12] L. Hyvonen and A. Hujanen, “A compact MMICcompatible microstrip to waveguide transition,” in IEEE MTTS Int. Microw. Symp. Dig., San Francisco, CA, 1996, vol. 2, pp. 875–878. [13] L. T. Hildebrand and J. Joubert, “Fullwave analysis of a new microstriptowaveguide interconnect configuration,” IEEE Trans. Microw. Theory Tech., vol. 48, no. 1, pp. 1–7, Jan. 2000. [14] J. S. Hong and M. J. Lancaster, Microstrip Filters for RF/Microwave Applications. New York: Wiley, 2001, sec. 8.4. [15] J. W. Bandler, R. M. Biernacki, S. H. Chen, R. H. Hemmers, and K. Madsen, “Electromagnetic optimization exploiting aggressive space mapping,” IEEE Trans. Microw. Theory Tech., vol. 43, no. 12, pp. 2874–2882, Dec. 1995. [16] R. Garg, P. Bhartia, I. Bahl, and A. Ittipaboon, Microstrip Antenna Design Handbook. Norwood, MA: Artech House, 2001, pp. 786–789. [17] W. J. R. Hoefer and M. N. Burton, “Closedform expressions for the parameters of finned and ridged waveguides,” IEEE Trans. Microw. Theory Tech., vol. MTT30, no. 12, pp. 2190–2194, Dec. 1982. Xiaobo Huang was born in Jiangsu, China, in 1983. He received the B.Eng. and M.Eng. degrees in electronic and optical engineering from the Nanjing University of Science and Technology, Nanjing, China, in 2005 and 2007, respectively, and the Ph.D. degree in electronic engineering from The Chinese University of Hong Kong, Shatin, Hong Kong, in 2011. Since 2011, he has been a Research Engineer with the China Research and Development Center, Comba Telecommunication Systems, Guangzhou, China, where he is involved with LTE smart antennas. His current research interests include passive microwave and millimeterwave circuits, antennas and filters for communication systems, and LTCCbased modules for wireless communications. KeLi Wu (M’90–SM’96–F’11) received the B.S. and M.Eng. degrees from the Nanjing University of Science and Technology, Nanjing, China, in 1982 and 1985, respectively, and the Ph.D. degree from Laval University, Quebec, QC, Canada, in 1989. From 1989 to 1993, he was with the Communications Research Laboratory, McMaster University, as a Research Engineer and a Group Manager. In March 1993, he joined the Corporate Research and Development Division, COM DEV International, where he was a Principal Member of Technical Staff. Since October 1999, he has been with The Chinese University of Hong Kong, Shatin, Hong Kong, where he is a Professor and the Director of the Radiofrequency Radiation Research Laboratory (R3L). He has authored or coauthored numerous publications in the areas of EM modeling and microwave and antenna engineering. His current research interests include partial element equivalent circuit (PEEC) and derived physically expressive circuit (DPEC) EM modeling of highspeed circuits, RF and microwave passive circuits and systems, synthesis theory and practices of microwave filters, antennas for wireless terminals, LTCCbased multichip modules (MCMs), and RF identification (RFID) technologies. Dr. Wu is a member of the IEEE MTT8 Subcommittee (Filters and Passive Components) and is a Technical Program Committee (TPC) member for many international conferences including the IEEE Microwave Theory and Techniques Society (IEEE MTTS) InternationalMicrowave Symposium (IMS). He was an associate editor for the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES (2006–2009). He was the recipient of the 1998 COM DEV Achievement Award for the development of exact EM design software of microwave filters and multiplexers and the 2008 Asia–Pacific Microwave Conference Prize.
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Approach to the Design of Asymmetric CoupledLine Directional Couplers With the Maximum Achievable ImpedanceTransformation Ratio Krzysztof Wincza, Member, IEEE, Slawomir Gruszczynski, Member, IEEE, and Stanislaw Kuta, Member, IEEE
Abstract—A novel approach to the design of asymmetric coupledline impedancetransforming directional couplers with the maximum achievable impedancetransformation ratio is proposed. It is shown that the couplers in which one conductor is completely shielded from the other can be represented by two uncoupled transmission lines, which significantly simplifies the design procedure. Furthermore, the proposed approach of the directional couplers’ analysis has been utilized for the derivation of a general condition describing the maximum impedance transformation ratio that can be achieved for directional couplers designed in inhomogeneous media. It has been also shown that impedancetransforming directional couplers, in which the capacitive coupling coefficient differs from the inductive coupling coefficient feature limited isolation, and that such couplers can be represented by two uncoupled lines having different electrical lengths. Subsequently, it has been shown that this isolation can be improved when the electrical lengths of the two uncoupled lines are equal, which corresponds to the equalization of capacitive and inductive coupling coefficients. The theoretical analyses have been confirmed by the measurements of two different 3dB impedancetransforming directional couplers designed with the use of the proposed simplified approach. Index Terms—Asymmetric coupled lines, capacitive and inductive coupling coefficients, directional couplers, impedance transformers, inhomogeneous dielectric media.
I. INTRODUCTION
A
SYMMETRIC coupled lines have been intensively studied over the years and the theoretical methods for the analysis of such lines have been developed [1]–[4]. It is known that two coupled lines in an inhomogeneous media can have the properties of an ideal directional coupler once the inductive and capacitive coupling coefficients are equalized. Such asymmetric coupled lines can find broad range of applications in different microwave circuits and networks such as: 1) single and multisection directional couplers; 2) power dividers; 3) coupledline baluns; 4) balanced circuits; and 5) way power dividers [5]–[8]. References [9] and [10] describe the Manuscript received July 12, 2011; revised January 09, 2012 and January 13, 2012; accepted January 23, 2012. Date of publication February 20, 2012; date of current version April 27, 2012. This work was supported in part by the Polish National Research Centre under Grant 4999/B/T02/2011/40 and by the Polish Ministry of Science and Higher Education under Grant 0464/TO2/2010/70. The authors are with the Electronics Department, AGH University of Science and Technology, 30059 Cracow, Poland (email: krzysztof.wincza@agh. edu.pl; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2187065
usage of coupledline sections for impedance transformation. It is also known that each line of an asymmetric coupledline section can be terminated with the different impedances defined as follows: (1) , , i.e., the characteristic impedances of terwhere minating lines [3]. Recently, we have shown that such a coupledline section can be used for simultaneous power division and impedance transformation, in a sense that the terminating impedance of the transmission and coupled ports is different than the terminating impedance of the input and isolated ports [11]. Such an impedance transformation, however, results in limiting the operational bandwidth of the section [11]. We have also shown that such couplers can be utilized in balanced and way power amplifiers with reduced size and losses [11]. This is due to the fact that output impedance of the powersplitting/combining network can be brought close to the input/output impedance level of the semiconductors, and therefore, simpler matching networks can be applied. It is also known that in such couplers the limitation on the maximum achievable impedancetransformation ratio exists, which for the case of homogenous dielectric media is equal the inverse of squared coupling coefficient [11], [12]. In this paper, following the idea described in [11], we present a novel approach to the design of asymmetric 3dB coupledline impedancetransforming directional couplers, in which the maximum impedancetransformation ratio is ensured. It has to be underlined that such couplers are the most attractive in balanced and way power amplifiers since, in practical applications, the required impedancetransformation ratio is higher then the ratio that can be achieved from a single 3dB coupler [11]. The maximum impedancetransformation ratio is achieved when the self capacitance of one of the coupled lines is equal zero, which means that one line is completely shielded by the other. With this assumption, we propose the design procedure in which a coupledline section is represented by two uncoupled lines. Subsequently, the proposed approach is utilized for the derivation of a more general condition for the achievable transformation ratio in directional couplers designed in inhomogeneous media. In such structures, the capacitive coupling coefficient can differ from the inductive one, resulting in performance deterioration, especially featuring limited isolation.
00189480/$31.00 © 2012 IEEE
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agating waves equals . The self and mutual capacitances can be defined by the line impedances as follows:
(3) Fig. 1. Two coupled lines having the inner conductor shielded by the outer : conductor, where most outer conductor is a common ground for both lines, : self capacitance of the lines 1 mutual capacitance between lines 1 and 2, ). and 2, respectively (
(4) (5) (6) The inductance matrix can be calculated from (7)
Fig. 2. Schematic diagram of a directional coupler realized as a connection of two uncoupled transmission lines.
is the capacitance matrix of the coupled lines, for where which the phase velocities of propagating waves equal , i.e., the conductors are placed in an homogeneous airfilled dielectric medium. In such a case, the components of are calculated as follows:
In the proposed approach, the capacitive and inductive coefficients’ inequality is reflected in different electrical lengths of two uncoupled lines. Therefore, as it has been shown, the coupler’s performance can be improved by changing the physical length of one of the two uncoupled lines, which corresponds to the equalization of capacitive and inductive coupling coefficients. The theoretical analysis has been verified by the measurements of two 3dB impedancetransforming directional couplers designed in different dielectric structures.
(8) (9) (10) (11) and the components of the
matrix as (12)
II. THEORETICAL ANALYSIS The maximum impedancetransformation ratio is achieved when the selfcapacitance of one of the coupled lines equals zero [11]. Fig. 1 shows an exemplary cross section of coupledtransmission lines in which this condition is fulfilled ( ), therefore the inner conductor is completely enclosed by the outer conductor. Such a coupledline section can be regarded as a connection of two transmission lines, as shown schematically in Fig. 2, where the inner and outer surfaces of the shielding conductor are regarded as two separate conductors shown in Fig. 2. To calculate the impedances and of the transmission lines, which appropriately connected have the properties corresponding to the properties of a 3dB coupledline section having the impedancetransformation ratio , let us consider perunitlength capacitance and inductance matrices of the coupled lines shown in Fig. 1. It is evident from Fig. 1 that the capacitance matrix of the coupled transmission lines has the following form:
(2)
(13) Having found the components of and matrices of the coupled lines described by the impedances of the equivalent circuit composed of two uncoupled lines (Fig. 2), the two sets of impedances, i.e., , and , can be related using (2) and the wellknown formulas defining the capacitive and inductive coupling coefficients (14) (15) By applying (2), (14), and (15), we get (16) (17) From (14) and (15),
and
can be found as follows: (18)
Let us assume that the medium of propagation is homoge, and the phase velocity of the propneous, i.e.,
(19)
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Fig. 3. Impedances and of the transmission lines shown in Fig. 2 assuming inhomogeneous dielectric media versus the dielectric constant ratio; calculated using (22) and (23).
From (18) and (19), the impedances and of two uncoupled transmission lines are found to be equal , when and is assumed. The presented considerations assumed the homogeneous dielectric medium. Note that in such a case the impedances and are not affected by the change of the medium, i.e., by the change of its dielectric constant. In case of inhomogeneous dielectric media when , relations (16) and (17) modify as follows:
(20)
(21)
In this case, the impedance
can be expressed as
(22) and
can be found from the following equation:
(23) The dependence of the characteristic impedances and versus the ratio of the dielectric constants is shown in Fig. 3. It is seen that for a homogenous structure, these impedances are equal. The limitation on the maximum impedancetransformation ratio that can also be achieved for inhomogeneous coupled lines can be derived with the use of the uncoupledline approach. The derivation is similar to the previously shown in [11], in which the final conclusion is that the maximum impedancetransformation ratio is equal the inverse of squared coupling coefficient . In case of inhomogeneous media, the maximum achievable transformation ratio is equal (24)
Fig. 4. (a) Schematic diagram of an impedancetransforming directional coupler with the symmetry plane indicated. (b) and (c) Even and oddmode excitation equivalent subcircuits, respectively. (d)–(g) Their reconfigured versions.
The detailed derivation of (24) is shown in the Appendix. The derived limitation (24) states that in case of inhomogeneous coupled lines, in which one of the lines is completely decoupled from the ground plane; the maximum impedancetransformation ratio equals the inverse product of the inductive and capacitive coupling coefficients. The analysis of the circuit presented in Fig. 2 can be performed with the use of the method of analysis of symmetrical port networks with the use of inphase and outofphase excitations [13]. The conversion of the circuit into two even and oddmode excited subcircuits is presented in Fig. 4. In order to apply this method of analysis, it is required to assume that all terminating impedances are equal so that the symmetry plane can be constituted. The fourport network simplifies into two twoport networks with openended and shortended transmissionline stubs. The impedances of the stubs and are defined as (25) (26) for the network with oddmode excitation, and (27) (28)
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for the network with evenmode excitation. The resulting scattering matrices for even and oddmode excitations are
(29) The scattering matrix of the fourport network can be found from [13]
(30) and the remaining parameters are found from the symmetry conditions as
(31) The scattering matrix of the network shown in Fig. 4(a) described by (23)–(29) has been derived assuming equal terminating impedances of the fourport network. In order to examine the properties of the impedancetransforming network, the scattering matrix needs to be renormalized so that each port is terminated with the proper impedance, as shown in [11, Fig. 1(b)]. The renormalization of matrix terminating impedances has been shown in [14], [15] (32) where and are the diagonal matrices with their th diagonal components being and , respectively. The indicates the complex conjugate transposed matrix and are reflection coefficients of the new terminating impedances with respect to the assumed impedance . The calculated frequency responses of the network for different dielectric constants and are shown in Fig. 5, whereas Fig. 6 shows the values of transmission, coupling, and isolation of the considered network versus dielectric constant ratio , calculated at the center frequency. From the results presented in Figs. 5 and 6, it is seen that the inhomogeneity
Fig. 5. Frequency characteristics of the impedancetransforming network shown in Figs. 1 and 2 versus electrical length in free space for three different , , , (b) , dielectric properties, i.e.: (a) . and (c)
degrades the isolation and the transmission and coupling imbalance of the resulting impedancetransforming coupler at the center frequency. It is important to note, however, that since the lines are modeled not as coupled electromagnetically, but as connected directly, the compensation of dielectric constant
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Fig. 8. Layout of the manufactured 3dB directional coupler realized in the structure shown in Fig. 7(a) with 50/25 impedance transformation.
Fig. 6. Transmission, coupling, and isolation of the impedancetransforming network shown in Figs. 1 and 2 versus dielectric constant ratio, calculated for of both lines when .
Fig. 9. Schematic diagram of the 3dB directional coupledline 50/25impedancetransforming directional coupler with additional singlesection impedance transformers connected to direct and coupled ports for measurement purposes.
Fig. 7. Crosssectional view of a shielded stripline on a dielectric sheet with ground layer (a) and a coaxial line placed on a dielectric sheet with ground layer (b).
inequality may be achieved by adjusting the lines’ physical length so that both lines have equal electrical length at the center frequency. In practical realization, one can either meander the inner line in case of or artificially load the outer transmission line with capacitors to shorten its physical length to adjust it to the inner line for the opposite case, i.e., . It is worth commenting that the coupling nature of the proposed network is electromagnetic (EM). The EM field of the first line (inner conductor–common ground) and the second line (outer conductor common ground) are coupled in their common propagation region, i.e., between the outer conductor and common ground. III. EXPERIMENTAL RESULTS The major advantage of the modified network having two uncoupled lines is its design simplicity. Fig. 7 shows two possible ways of physical realization of the impedancetransforming network with two uncoupled lines, which are: 1) a shielded stripline on a dielectric sheet with ground layer [see Fig. 7(a)] and 2) a coaxial line placed on a dielectric sheet with ground layer [see Fig. 7(b)]. The design procedure for such structures reduces to the calculation of the characteristic impedance and effective dielectric permittivity of the wire microstrip line, symmetric stripline, and finitethickness microstrip line, respectively. For all cases, either formulas can be found [16] or they can be calculated numerically using standard commercially available numerical software [17].
The proposed approach to the design of impedancetransforming directional couplers with the use of two uncoupled lines has been experimentally verified by the measurements of two different directional couplers. The first coupler has been designed with the use of a dielectric structure shown in Fig. 7(a) in which mm, , mm, and . The impedances of both lines have to be equal as found from (16) and (17). The strip widths have been found with the use of Linpar software [17] and are equal: mm, mm. Layout of the designed impedancetransforming directional coupler is shown in Fig. 8. As is seen, the inner conductor (the strip ) has been appropriately meandered to compensate the inequality of the effective dielectric constants of the two lines ( for a shielded stripline and for a microstrip line). The designed 3dB coupler has been manufactured and measured with the use of quarterwave impedance transformers applied to the coupled and transmission ports, as shown schematically in Fig. 9. The measured results of the manufactured 3dB directional coupler are shown in Fig. 10. It is seen that good agreement has been achieved between the measured and ideal characteristics. The difference between the calculated and measured characteristics, in particular the isolation characteristic, is most likely caused by the parasitic reactances occurring between coupled and signal lines that have not been taken into account. The mismatch at the isolated port terminated with a 12.5 resistor contributes significantly to the isolation deterioration. Fig. 10(b) presents the measured differential phase characteristic ( – ), which is equal to 90 , therefore such a 3dB coupler can be used in balanced circuits. A photograph of the manufactured directional coupler is presented in Fig. 11. Similarly, a directional coupler having a cross section shown in Fig. 7(b) has been experimentally verified. As in the previous example, the impedances of both lines equal .
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Fig. 12. Crosssectional view of a coaxialmicrostrip line with an additional strip used for the design of the impedancetransforming directional coupler.
Fig. 13. Photograph of the manufactured 3dB coaxialmicrostrip 50/25impedancetransforming directional coupler.
Fig. 10. Measured (solid lines) and theoretical (dashed lines) frequency characteristics of the manufactured 3dB directional coupler realized in the structure shown in Fig. 7(a) with 50/25 impedance transformation. (a) Amplitude characteristics and (b) differential phase characteristics.
Fig. 11. Photograph the manufactured 3dB directional coupler realized in the structure shown in Fig. 7(a) with 50/25 impedance transformation.
As a coaxial transmissionline section, a commercially available semirigid cable having characteristic impedance equal to 25 can be utilized. In our design, a 25 coaxial cable with and outer diameter mm has been chosen. The second transmission line has been designed on an ARLON 25 laminate with the dielectric constant and thickness mm. In order to obtain the impedance of the
second line equal to 25 , the cross section has been modified by introducing additional strip, as shown in Fig. 12, to decrease the impedance of the wire microstrip line. The width of a standard microstrip line having impedance on the chosen dielectric substrate equals mm, which is by far wider than the outer diameter of the coaxial line. In this case, the former can be neglected while designing the geometry; hence, the standard formulas for microstrip line calculation can be applied. The assembled model of the coaxialmicrostrip 3dB impedancetransforming directional coupler is shown in Fig. 13. The coupler has also been realized together with singlesection impedance transformers for measurement purposes. As in the previous case, the coaxial line has been meandered to compensate the effective dielectric constant inequality ( for the coaxial line, for the microstrip line). The measured frequency characteristics are shown in Fig. 14. Similar results to the ones obtained in the case of the 3dB shieldedstripline coupler (shown in Fig. 10) have been obtained. IV. CONCLUSIONS A novel approach to the design of coupledline impedancetransforming directional couplers with the maximum achievable impedance transformation has been proposed. It has been shown that such couplers can be represented by two appropriately connected uncoupled transmission lines. The major advantage of the proposed approach is the simplicity of the design procedure since the coupler is represented by two uncoupled transmissionline sections. Each of the characteristic impedances of the transmissionline sections can be calculated independently. The proposed approach has been used for the derivation of a
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trices of the coupled lines shown in Fig. 1 can be written as follows:
(33)
(34)
(35) Therefore, the line impedances can be expressed as (36) (37) On the other hand, the capacitive and inductive coupling coefficients given by (14) and (15) equal (38)
Fig. 14. Measured (solid lines) and theoretical (dashed lines) frequency characteristics of the 3dB coaxialmicrostrip 50/25 impedancetransforming directional coupler. (a) Amplitude characteristics and (b) differential phase characteristics.
general condition for the maximum impedancetransformation ratio that can be achieved for the couplers realized in inhomogeneous dielectric structures. Moreover, it has been shown that in such couplers the inequality of the capacitive and inductive coupling coefficients corresponds to the different electrical lengths of the uncoupled transmission lines, which, in turn, deteriorates the performance of the coupler. Due to the fact that the coupler is represented by two uncoupled lines, it is possible to compensate this inequality by simply adjusting the length of one of the two uncoupled lines, as it has been shown. The theoretical analysis has been confirmed by the measurements of two 3dB couplers having the impedancetransformation ratio . In both cases, the capacitive and inductive coupling coefficients’ inequality have been compensated by varying the physical length of one of the lines. Both manufactured couplers feature good frequency characteristics proving the usefulness of the presented simplified design approach.
APPENDIX To derive the relation (24), let us first notice that, for the case of inhomogeneous media, the capacitance and inductance ma
(39) and the limitation on the maximum impedance transformation can be found comparing (36) and (37) with (38) and (39)
(40) REFERENCES [1] V. K. Tripathi, “Asymmetric coupled transmission lines in an inhomogeneous medium,” IEEE Trans. Microw. Theory Tech., vol. MTT23, no. 9, pp. 734–739, Sep. 1975. [2] V. K. Tripathi, “Equivalent circuits and characteristics on inhomogeneous nonsymmetrical coupledline twoport circuits,” IEEE Trans. Microw. Theory Tech., vol. MTT25, no. 2, pp. 140–142, Feb. 1977. [3] K. Sachse, “The scattering parameters and directional coupler analysis of characteristically terminated asymmetric coupled transmission lines in an inhomogeneous medium,” IEEE Trans. Microw. Theory Tech., vol. 38, no. 4, pp. 417–425, Apr. 1990. [4] K. Sachse and A. Sawicki, “Quasiideal multilayer two and threestrip directional couplers for monolithic and hybrid MICs,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 9, pp. 1873–1882, Sep. 1999. [5] K. Sachse, A. Sawicki, and G. Jaworski, “Novel, multilayer coupledline structures and their circuit applications,” in Proc. 13th Int. Microw., Radar, Wireless Commun. Conf., Wroclaw, Poland, May 2000, pp. 131–155. [6] K. Wincza and S. Gruszczynski, “Threesection symmetrical 3dB directional coupler in microstrip multilayer technology designed with the use of multitechnique compensation,” Microw. Opt. Technol. Lett., vol. 51, no. 4, pp. 902–906, Apr. 2009.
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[7] S. Gruszczynski, K. Wincza, and K. Sachse, “Design of highperformance threestrip 3dB directional coupler in multilayer technology with compensated parasitic reactances,” Microw. Opt. Technol. Lett., vol. 49, no. 7, pp. 1656–1659, Jul. 2007. [8] S. Gruszczynski, K. Wincza, and J. Borgosz, “Multilayer surfacemount 3dB directional coupler for application in balanced modulators,” in Proc. China–Japan Joint Microw. Conf., Shanghai, China, 2008, vol. 2, pp. 547–550. [9] H. Oraizi and G. G. Gahdim, “Optimum design of broadband multisection coupledline couplers with arbitrary coupling and impedance matching,” IEICE Trans. Commun., vol. E86B, no. 9, pp. 2709–2719, Sep. 2003. [10] H. Oraizi, M. Moradian, and K. Hirasawa, “Design and optimization of microstrip parallelcoupledline bandpass filters incorporating impedance matching,” IEICE Trans. Commun., vol. E89B, no. 11, pp. 2982–2989, Nov. 2006. [11] K. Wincza and S. Gruszczynski, “Asymmetric coupledline directional couplers as impedance transformers in balanced and way power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 7, pp. 1803–1810, Jul. 2011. [12] E. G. Cristal, “Coupledtransmissionline directional couplers with coupled lines of unequal characteristic impedances,” IEEE Trans. Microw. Theory Tech., vol. MTT14, no. 7, pp. 337–346, Jul. 1966. [13] J. Reed and G. J. Wheeler, “A method of analysis of symmetrical four port networks,” IRE Trans. Microw. Theory Tech., vol. MTT4, no. 10, pp. 246–252, Oct. 1956. [14] H. Carlin, “The scattering matrix in network theory,” IRE Trans. Circuit Theory, vol. 3, no. 2, pp. 88–97, Jun. 1956. [15] K. Kurokawa, “Power waves and the scattering matrix,” IEEE Trans. Microw. Theory Tech., vol. MTT13, no. 2, pp. 194–202, Mar. 1965. [16] R. E. Collin, Foundations for Microwave Engineering. New York: Wiley, 2001, ch. 6. [17] A. Djordievic et al., Matrix Parameters for Multiconductor Transmission Lines, Software and User’s Manual. Norwood, MA: Artech House, 1990.
Krzysztof Wincza (S’06–M’07) was born in Walbrzych, Poland, on May 27, 1979. He received the M.Sc. degree and Ph.D. degree in electronics and electrical engineering from the Wroclaw University of Technology, Wroclaw, Poland, in 2003 and 2007, respectively. In 2007, he joined the Institute of Telecommunications, Teleinformatics and Acoustics, Wroclaw University of Technology. In 2009, he joined the Faculty of Electronics, AGH University of Science and Technology, Cracow, Poland, becoming an Assistant Professor. He has coauthored 41 scientific papers.
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Dr. Wincza was the recipient of The Youth Award presented at the 10th National Symposium of Radio Sciences (URSI) in 2001 and the Young Scientist Grant presented by the Foundation for Polish Science in 2008.
Slawomir Gruszczynski (M’06) was born in Wroclaw, Poland, on December 14, 1976. He received the M.Sc. degree and Ph.D. degree in electronics and electrical engineering from the Wroclaw University of Technology, Wroclaw, Poland, in 2001 and 2006, respectively. From 2001 to 2006, he was with the Wroclaw Division, Telecommunications Research Institute. From 2005 to 2009, he was with the Institute of Telecommunications, Teleinformatics and Acoustics, Wroclaw University of Technology. In 2009, he joined the Faculty of Electronics, AGH University of Science and Technology, Cracow, Poland. He has coauthored 45 scientific papers. Dr. Gruszczynski is a member of the Young Scientists’ Academy, Polish Academy of Sciences (PAN) and the Committee of Electronics and Telecommunications, Polish Academy of Sciences (PAN).
Stanislaw Kuta (M’96) received the M.S. and Ph.D. (with honors) degrees in electronic and electrical engineering from the AGH University of Science and Technology, Cracow, Poland, in 1965 and 1973, respectively, and the D.Sc. degree in electronic from the Technical University of Gliwice, Gliwice, Poland. Since 1965, he has been with the Electrical Engineering Faculty, AGH University of Science and Technology, Crakcow, Poland, where, since 1997, he has been a Full Professor with the Electronics Department. From 2000 to 2008, he has been the Deputy Head, and since 2008, he has been the Head of the Electronics Department, AGH University of Science and Technology. He has been a consultant to industrial and government institutions. He has been a member of the Supervisory Board, Krakow Technology Park. He has authored or coauthored approximately 150 research publications, including four books and two book chapters. He holds eight patents. He has contributed numerous conference presentations and advanced engineering courses. His research is focused in the areas of classD audio amplifiers, RF power amplifiers, modeling, simulation and design of lowvoltage and lowpower CMOS integrated circuits (ICs), and RF CMOS circuits. Dr. Kuta has served as an expert for the Ministry of Science and Higher Education Poland. He is a member of the Committee of Electronics and Telecommunications, Polish Academy of Sciences (PAN).
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Compact Broadband Gysel Power Divider With Arbitrary PowerDividing Ratio Using Microstrip/Slotline Phase Inverter Feng Lin, QingXin Chu, Senior Member, IEEE, Zhi Gong, and Zhe Lin
Abstract—A compact broadband Gysel power divider with arbitrary powerdividing ratio is proposed. This divider is derived from the conventional Gysel power divider by substituting an ideal phase inverter for the 180 phase shifter, which significantly improves the bandwidth and reduces the circumference to 1 evaluated at the center frequency. A wide range of powerdividing ratio (1–6.25) is supported by changing the impedance ratio of the transmission lines, while the dualband impedance matching characteristic with frequency ratio (1–2.9) is obtained only by varying the impedances of the transmission lines 20–135 . Closedform equations are derived for design parameters. The ideal phase inverter is realized by two transitions: microstriptoslotline and slotlinetomicrostrip transitions. By utilizing this phase inverter, two microstrip Gysel dividers with powerdividing ratios of 1:1 and 2:1 and operating at 1.5/2.5 and 1/2 GHz, respectively, are designed, fabricated, and measured. The measured results are in good agreement with the simulated ones. The first measured results show a bandwidth of 80% with better than 15dB return loss and 29dB isolation from 1.19 to 2.76 GHz. The second measured results show a bandwidth of 95.8% with better than 12dB return loss and 24dB isolation from 0.8 to 2.27 GHz. To the authors’ knowledge, the most wideband Gysel power divider using microstrip technology is proposed for the first time. Index Terms—Arbitrary powerdividing ratio, broadband, dual band, Gysel power divider, phase inverter.
I. INTRODUCTION
A
DVANCEMENTS in wireless communication demand microwave power dividers with more compact size, wider bandwidth, and dualband operation. The Wilkinson power divider [1], which features low insertion loss, perfect isolation, and all matched ports, has been developed for dualband [2]–[4] and ultrawideband (UWB) [5] applications. A common feature is that they all have internal isolation resistors that are not connected to ground. To realize perfect isolation between output ports, these resistors should provide zero phase delay. Moreover, there is no way to effectively dissipate the heat generated by these resistors, which limits the highpower application of these power dividers [1]–[5]. Manuscript received September 21, 2011; accepted December 15, 2011. Date of publication February 24, 2012; date of current version April 27, 2012. This work was supported by the Science Fund of China (60801033), the State Key Laboratory of Millimeter Waves Southeast University (K201112), and the National Key Laboratory Foundation of China (9140C5306021008). The authors are with the School of Electronic and Information Engineering, South China University of Technology, Guangzhou 510641, China (email: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2187067
Fig. 1. Conventional Gysel power divider.
The conventional Gysel power divider [6], shown in Fig. 1, which features advanced heatsinking capacity, is widely used in microwave and millimeterwave circuits, such as beamforming networks [7] and highpower amplifier [8], but it suffers from limited bandwidth and large size, which is caused by the 180 phase shifter, formed by a line section. In [9], the 15dB returnloss bandwidth of 44.3% was achieved by adding matching networks to the conventional Gysel power divider. The multisection cascaded Gysel power divider structure [10] was proved to realize the 15dB isolation bandwidth of 62%. The power divider in [10] was extended to support arbitrary power division and impedance matching by applying an optimum design algorithm [11]. These Gysel power dividers achieved bandwidth enhancement at the cost of large size. The swap structure was applied in the ring power divider [12] for isolation enhancement, while the dualband application was not considered. In addition, this power divider was implemented on the doublesided parallelstrip line (DSPSL), so the problem of heat sinking remained unsolved. Recently, a dualband Gysel power divider with additional shunt stubs was realized in [13] with the drawback of a limited bandwidth. The measured results showed that the 15dB return loss and isolation bandwidth of each passband was only 65 MHz. The extended work of [13] that derives the synthesizing equations for the unequal power divider with arbitrary termination resistance was published in [14]. However, the bandwidth is also limited. In term of size, electromagneticbandgap (EBG) cell [15] was proposed to reduce the size of the conventional Gysel power divider. In order to realize power dividers with advanced performances including dualband operation, broadband arbitrary output powerdividing ratio, compact and highpower application, a novel Gysel power divider is proposed in this paper. The dualband impedance matching characteristic is achieved by varying the impedances of the transmission lines. The bandwidth enhancement is obtained by using an ideal phase
00189480/$31.00 © 2012 IEEE
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Fig. 2. Proposed broadband Gysel power divider with arbitrary powerdividing ratio.
inverter; in addition to bandwidth enhancement, the circumference is reduced to 1 evaluated at the center frequency. The output powerdividing ratio is determined by the impedance ratio of the transmission lines. Overall, the proposed Gysel power divider offers several advantages including: 1) significantly enhanced bandwidth; 2) planar layout and compact size; 3) dualband impedance matching operation with a wide range of frequency ratio (from 1 to 2.9); 4) a wide range of powerdividing ratio (1–6.25); and 5) suitability for highpower application. In Section II, closedform design equations of the proposed divider are derived using the modified even and oddmode analysis. For comparative purposes, the theoretic frequency ratios, powerdividing ratios, and line impedances of different kinds of dualband Gysel power dividers are shown. In Section III, a phase inverter, which consists of two transitions: microstriptoslotline and slotlinetomicrostrip transitions, is proposed. By utilizing this phase inverter, two microstrip Gysel dividers with powerdividing ratios of 1:1 and 2:1 and operating at 1.5/2.5 and 1/2 GHz, respectively, are designed, fabricated, and measured. The simulated and measured results show good agreement. A conclusion is presented in Section IV.
Fig. 3. Proposed Gysel power divider. (a) Evenmode circuit. (b) Oddmode circuit.
A. EvenMode Analysis Due to the fact that when port 1 is excited, all the input power is transmitted solely to the terminations at ports 2 and 3, and the isolation resistors are short circuited. Fig. 3(a) shows the simplified evenmode circuit. Since the output powerdividing ratio can be calculated from evenmode voltages , as
(2)
Simplifying (2) to get (3) matrix analysis to both the upper and By employing lower branch lines of Fig. 3(a), the following relations are obtained:
II. GYSEL POWER DIVIDER CIRCUIT AND ANALYSIS Fig. 2 shows the structure of the proposed broadband Gysel power divider with arbitrary powerdividing ratio. It basically consists of transmission lines , two isolation resistors , and an ideal phase inverter. All the transmissionline sections have the same electrical length . The dualband impedance matching operation of the proposed structure is completed by varying the impedances of the transmission lines. The output powerdividing ratio of is dependent only on the impedance ratio . Specifically, an ideal phase inverter is used to replace the line section, which achieves bandwidth enhancement of the dualband impedancematching operation and size reduction. Since the structure is asymmetric, the conventional even–oddmode analysis is not applicable. Instead the modified even–oddmode analysis [16] is employed to derive the impedance values ( , , , and ), which are enforced to meet the following electrical properties at the two designated frequencies (i.e., and ) simultaneously: (1)
(4) (5) , . where Subsequently, combining (4) and (5) with (3) to obtain (6) The requirement of
results in the following equation: (7)
and are the input admittances of the upper and lower branches, respectively, and are expressed as [17] (8) (9)
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With the assumption that the transmission lines are lossless, the output powerdividing ratio can also be determined by the real part of and as follows: (10) Solving (7) and (10), (11) By substituting (6) into (8), and combining (8) and (11), the values of and can be obtained and simplified to show that (12)
B. OddMode Analysis When ports 2 and 3 are excited by voltage sources having magnitudes of and , respectively, based on the principle of superposition and the conditions of output matching and isolation, the resultant node voltages and are equal to and , respectively. Moreover, the port 1 is short circuited due to the fact that the node voltage at port 1 can be determined as follows:
Fig. 4. Circuit parameters
and
versus frequency ratio
By substituting (12) into (19), the value of and simplified to show that
can be obtained (21)
(13) Fig. 3(b) shows the simplified oddmode circuit. The relationship between the node voltages and the terminal currents can be expressed in terms of transmission matric of the network shown in Fig. 3(b) (14) (15)
.
In consideration of practical fabrication, the values of are chosen as
and
(22) C. Theoretic Frequency Ratio The impedance values of , , , and remain the same for and . The dualband impedance matching operation of the proposed power divider can be obtained by assigning and to the desired frequencies and . For compact size, is selected. Thus, . Consequently, and can be evaluated by the following formula:
(16) (17) (18) By inserting (18) into (14), and doing some algebraic manipulations, (19) can be obtained as follows:
(19) (20)
(23) For given values of frequency ratio and powerdividing ratio , the impedances of all transmission lines are calculated by using (23), while the values of the isolation resistors and are fixed as . Fig. 4 shows the variations of circuit parameters and versus frequency ratio for and . It is shown that the line impedances and both decreases with the increasing frequency ratio , when the powerdividing ratio is determined. In a certain range, fixing the frequency ratio , the line impedance decreases while increases with the increase
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TABLE I COMPARISONS OF DIFFERENT DUALBAND GYSEL POWER DIVIDERS I: TRANSMISSION LINES; II: ISOLATION RESISTORS
of powerdividing ratio . The proposed power divider can operate over wide ranges of frequency ratio from 1 to 2.9 and powerdividing ratio from 1 to 6.25 with line impedance from 20 to 135 . There is an interesting case that when , all the transmission lines have an electrical length 90 and corresponding characteristic impedances determined by (23), which is simplified as (24) The design (24) is the same as that of power divider proposed in [12]. Therefore, the singleband unequal power divider in [12] can be considered as a special case of this proposed power divider. For comparative purposes, the theoretic frequency ratios, powerdividing ratios, and line impedances of different kinds of dualband Gysel power dividers are shown in Table I. It can be found that the frequency ratio range of this work is wider than the structure in [14]. III. MICROSTRIP GYSEL POWER DIVIDER REALIZATION Fig. 5(a) shows the configuration of the proposed Gysel power divider, which is implemented on a single substrate with slots formed in the ground plane. All its three ports are of microstrip type and are in the same layer. Two chip resistors are grounded by two metal vias, respectively, as shown in Fig. 5(b). Therefore, the proposed power divider can handle high power with a proper heat sink to the ground plane. A. Phase Inverter Design The most critical part in the realization of the proposed Gysel power divider is the phase inverter. The microstriptoslotline transitions were widely utilized to design dividers with frequencyindependent output outofphase performance, which play a key role in the realizations of a broadband magicT [18] and 180 hybrid [19]. In this paper, two transitions: microstriptoslotline and slotlinetomicrostrip transitions are used to design the phase inverter. Fig. 5(b) shows the proposed phase inverter, which consists of microstrip lines, metal vias, a slotline, an opencircuited slot stub, and a circular shortcircuited slot stub. Fig. 5(c) shows the electricfield distributions at the A–A’ and B–B’ plane shown in Fig. 5(b). By using a metal via, the electric field in the vertical direction of microstrip line 1 is converted to electric field in the horizontal direction of the slotline. After going through a section of slotline, the horizontal electric field is reconverted to vertical electric field of microstrip line 2 by another metal via. Thus, the phase reversal is achieved by means of reversing electricfield orientations
Fig. 5. (a) Configuration of the microstrip Gysel power divider . (b) Phase inverter. (c) Electric field distribution at the A–A’ and B–B’ plane.
of microstrip lines. The opencircuited slot stub and circular shortcircuited slot stub provide an appropriate open circuit to the ends of the slotline over broadband. It should be noted that if the phase inverter is realized in a continued ground, two circular slot stubs are required to locate at both ends of the slotline. Fig. 6(a) shows the corresponding equivalent circuit, including the parasitic capacitance related to edge coupling between the microstrip line and slotline, the parasitic inductance of via , a cascade of slotlines that accounts for the circular slot stub [20], [21], and a transformer of turn ratio that considers the impedance change at the transition [22]. Here, is assumed, and depends on the substrate thickness, the transmissionline characteristic impedance, along with the microstripslotline physical alignment [22]. The required ratio can be achieved by adjusting the circular slot stub diameter and inclination angle between the microstrip line and slotline. The substrate with dielectric constant , loss tangent , and thickness mm and commercial electromagnetic (EM) software HFSS are used in the following design. The characteristic impedances of microstrip lines 1 and 2 and corresponding widths are determined by that of the transmission lines connected to the phase inverter. Due to the fabrication limitation and the radiation loss of the slotline, the slotline width is chosen as mm, corresponding to . To minimize the extra phase delay from the slotline, the gap between microstrips 1 and 2 should be as small as possible. This issue becomes more serious at higher frequency. On the other hand, the gap is not allowed to be too small due to the fabrication limitation. Herein, the gap is chosen as mm. The bandwidth variation of the microstripslotline transition versus
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Fig. 6. (a) Equivalent circuit of the phase inverter. (b) Simulated parameters of the phase inverter using circuit model and fullwave EM simulation.
Fig. 7. EM simulated eter.
20 frequency limits against circular slot stub diam
circular slot stub diameter has been studied in [20]. Here, the initial design values of the circular slot stub are selected using the guidelines described in [20]. The circuit parameters for the equivalent circuit are listed in Table II, along with the corresponding optimization dimensions for the phase inverter shown in Fig. 5(b). Fig. 6(b) shows the simulated parameters of the phase inverter shown in Fig. 5(b) using a circuit model and fullwave EM simulation. The circuit simulated results are performed by Agilent Technologies’ Advanced Design System (ADS). The phase inverter has 64 terminations in circuit and EM simulation. The phase response in the EM simulation denotes the phase difference between the phase inverter and a section of microstrip line with the same physical length. Excellent agreement between the circuit and EM simulated results is achieved for both magnitude and phase responses within the frequency range of 0.5–5 GHz. The simulated EM data show that the insertion loss is smaller than 1 dB, while the phase difference is within 180 20 . The simulated 20 frequency limits against circular slot stub diameter are given in Fig. 7 using a fullwave
Fig. 8. Simulated and measured results of the designed broadband Gysel power . (a) and . (b) and . (c) and . divider (d) Output amplitude and phase imbalance.
EM simulator. It can be shown that due to the fact that the maximum value of the characteristic impedance of the circular slot stub increases with increasing diameter, the achievable phase difference bandwidth within 180 20 also increases, whereas the frequency range is shifted towards lower frequencies. In summary, the design procedure of the proposed broadband Gysel power divider including the calculation of design parameters and the design of phase inverter is listed as follows. 1) Given the powerdividing ratio and the two impedance matching frequencies and , calculate the values of isolation resistors and and line impedances and by using the closedform design (22) and (23). The electrical length is chosen as 90 at the frequency .
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Fig. 9. (a) Top and (b) bottom views of the proposed Gysel power divider . TABLE II CIRCUIT PARAMETERS AT 2 GHz AND THE CORRESPONDING OPTIMIZATION DIMENSIONS FOR PHASE INVERTER
Fig. 10. Configuration of the microstrip Gysel power divider
.
2) The widths of microstrip lines 1 and 2 in the phase inverter are designed to be the same as that of the transmission lines connected to the phase inverter. The gapwidth is chosen as 0.3 mm and the slotline width is 0.3 mm for the fabrication limits. 3) Choosing circular slot stub diameter with the help of Fig. 7 for required two impedancematching frequencies and . 4) With the initial parameters from the above steps, using a fullwave simulator (for example, the commercial EM software HFSS) to take all parasitic effects into account and optimize the design. B. Gysel Power Divider Design For verification, two broadband Gysel power dividers with different powerdividing ratios and different operating frequencies are designed, simulated, and measured. The designed di
Fig. 11. Simulated and measured results of the designed broadband Gysel . (a) and . (b) and . (c) power divider and . (d) Output amplitude and phase imbalance.
vider is fabricated on a substrate with dielectric constant , loss tangent , and thickness mm. The simulated performances are accomplished by EM simulator HFSS and the measured results are performed by using an Agilent N5230A vector network analyzer over the frequency range from 10 MHz to 5 GHz and from 10 MHz to 4 GHz, respectively. • A power divider with powerdividing ratio 1:1 and operating at 1.5/2.5 GHz is designed. According to the design procedures in Section IIIA, the values of , , , , and are found to be 64 , 64 , 100 ,100 , and 90 , respectively. Fig. 5(a) shows the configuration of the divider whose dimensions are given as
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TABLE III COMPARISONS OF MEASURED RESULTS FOR REPORTED POWER DIVIDER STRUCTURES
follows: mm,
mm, mm, mm, mm, mm, mm, mm, and mm. The phase inverter dimensions in Fig. 5(a) is the same as that in Fig. 5(b). Fig. 8 shows the measured scattering parameters of the fabricated divider and the simulated performance. The measured results indicate that the impedance matching with dualband operation has been achieved with a slight deviation in center frequencies (1451 and 2493 MHz). The small discrepancies between the simulated and measured results may be attributed to the limited accuracy of the fabrication. If the 20dB return loss is referenced, the measured data indicate that within 1.298–1.712 and 2.219–2.641 GHz, the isolation is better than 30 dB, while the passband ripple is below 0.1 dB. The maximal insertion losses measured for the two passbands are 3.4 and 3.5 dB (including connector loss), respectively. The output amplitude and phase imbalance performance can be observed from Fig. 8(d). The measured maximum amplitude imbalance of 0.2 dB and maximum phase imbalance of 3 are achieved over these two operating bands. Extra amplitude and phase imbalances are mainly caused by the slight difference between the lengths from output ports to both ends of phase inverter, as shown in Fig. 5(a), which can be further eliminated by proper circuit layout and simulation optimization. The measured results also show that the proposed Gysel power divider provides a bandwidth of 80% with better than 15dB return loss and 29dB isolation from 1.19 to 2.76 GHz. A photograph of the fabricated broadband Gysel power divider is illustrated in Fig. 9. The occupied area (without considering the feeding lines) of the structure is only 0.40 ( is the guided wavelength at the center frequency). • A power divider with powerdividing ratio 2:1 and operating at 1/2 GHz is designed. According to the design procedures in Section IIIA, the values of , , , , and are found to be 50.7 , 71.7 , 100 ,100 , and 90 , respectively. Fig. 10 shows the configuration of the divider whose dimensions are given as follows: mm, mm, mm, mm, mm, mm, mm, mm, mm, mm, mm, mm, mm, mm, and mm. Fig. 11 shows the measured scattering parameters of the fabricated divider and the simulated performance. The measured results indicate that the impedance matching with dualband operation has been
Fig. 12. (a) Top and (b) the bottom views of the proposed Gysel power divider .
achieved with a slight deviation in center frequencies (971 and 2106 MHz). The small discrepancies between the simulated and measured results may be attributed to the limited accuracy of the fabrication. If the 20dB return loss is referenced, the measured data indicate that within 0.903–1.063 and 2.003–2.150 GHz, the isolation is better than 25 dB, while the passband ripple is below 0.1 dB. The maximal insertion losses measured for the two passbands are 2.08/4.94 and 2.09/5.41 dB (including connector loss and the theoretical values are 1.76/4.77 dB), respectively. The output amplitude and phase imbalance performance can be observed from Fig. 11(d). The measured maximum amplitude imbalance of 3.4 dB and maximum phase imbalance of 4.9 are achieved over these two operating bands. The measured results also show that the proposed Gysel power divider provides a bandwidth of 95.8% with better than 12dB return loss and 24dB isolation from 0.8 to 2.27 GHz. A photograph of the fabricated broadband Gysel power divider is illustrated in Fig. 12. The occupied area (without considering the feeding lines) of the structure is only ( is the guided wavelength at the center frequency). In addition, comparisons of measured results for some previously reported power divider structures are illustrated in Table III. The overall performance of the proposed Gysel power divider exceeds the performances of the previous ones in terms of bandwidth, isolation, and size reduction. The size of
LIN et al.: COMPACT BROADBAND GYSEL POWER DIVIDER
power divider in [10] and [11] is obtained from the fabricated photograph. IV. CONCLUSION This paper has presented a Gysel power divider with an ideal phase inverter used to enhance bandwidth and reduce the size. By only tuning the impedances of the transmission lines 20–135 , a wide range of powerdividing ratio (1–6.25), while keeps a wide range of frequency ratio (1–2.9), was achieved. The modified even–oddmode analysis was employed to analyze its performance and the closedform design equations of the proposed divider were derived. For verification, a phase inverter, which was realized by microstriptoslotline and slotlinetomicrostrip transitions, was proposed. By utilizing this phase inverter, two microstrip Gysel dividers with powerdividing ratios of 1:1 and 2:1 and operating at 1.5/2.5 and 1/2 GHz, respectively, were designed, fabricated, and measured. Good agreement between the simulated and measured results was observed. The superior performance including bandwidth and circuit size compared to that of conventional dualband/broadband Gysel power divider was demonstrated. The proposed divider is suitable for broadband highpower application, due to its isolation resistors being able to dissipate power to the ground, where other cooling systems can be easily located, and compared to the use of a highimpedance line, the powerhandling capability is enhanced because a moderateimpedance line is employed in most of this design. ACKNOWLEDGMENT The authors would like to thank Dr. S. W. Wong, School of Electronic and Information Engineering, South China University of Technology, Guangzhou, China, for his helpful discussions. The authors would also like to thank the editors and reviewers of this paper for their valuable comments and suggestions, which highly improved its overall quality. REFERENCES [1] E. Wilkinson, “An way hybrid power divider,” IRE Trans. Microw. Theory Tech., vol. MTT8, no. 1, pp. 116–118, Jan. 1960. [2] K.K. M. Cheng and C. Law, “A novel approach to the design and implementation of dualband power divider,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 2, pp. 487–492, Feb. 2008. [3] M.J. Park, “Dualband Wilkinson divider with coupled output port extensions,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 9, pp. 2232–2237, Sep. 2009. [4] Y. Wu, Y. Liu, and Q. Xue, “An analytical approach for a novel coupledline dualband Wilkinson power divider,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 2, pp. 286–294, Feb. 2011. [5] A. M. Abbosh, “Ultra wideband inphase power divider for multilayer technology,” IET Microw., Antennas, Propag., vol. 3, no. 1, pp. 148–153, Feb. 2009. [6] U. H. Gysel, “A new way power divider/combiner suitable for highpower applications,” in IEEE MTTS Int. Microw. Symp. Dig., May 1975, vol. 75, pp. 116–118. [7] D. Betancourt and C. del Rio Bocio, “A novel methodology to feed phased array antennas,” IEEE Trans. Antennas Propag., vol. 55, no. 9, pp. 2489–2494, Sep. 2007. [8] S. S. Bharj, “A 1 kW pulsed amplifier using MESFET, LDMOS and bipolar transistors at 2856 MHz,” in IEEE Proc. 11th Annu. Wireless Microw. Technol. Conf., Apr. 2010, pp. 1–3.
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[9] B. L. Ooi, W. Palei, and M. S. Leong, “Broadbanding technique for inphase hybrid ring equal power divider,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 7, pp. 1790–1794, Jul. 2002. [10] H. Oraizi and A.R. Sharifi, “Optimum design of a wideband twoway Gysel power divider with source to load impedance matching,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 9, pp. 2238–2248, Sep. 2009. [11] H. Oraizi and A.R. sharifi, “Optimum design of asymmetrical multisection twoway power dividers with arbitrary power division and impedance matching,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 6, pp. 1478–1490, Jun. 2011. [12] L. Chiu and Q. Xue, “A parallelstrip ring power divider with high isolation and arbitrary powerdividing ratio,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 11, pp. 2419–2426, Nov. 2007. [13] Z. Sun, L. Zhang, Y. Liu, and X. Tong, “Modified Gysel power divider for dualband applications,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 1, pp. 16–18, Jan. 2011. [14] Z. Sun, L. Zhang, Y. Yan, and H. Yang, “Design of unequal dualband Gysel power divider with arbitrary termination resistance,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 8, pp. 1955–1962, Aug. 2011. [15] B. L. Ooi, “Compact EBG inphase hybridring equal power divider,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 7, pp. 2329–2334, Jul. 2005. [16] K.K. M. Cheng and P.W. Li, “A novel powerdivider design with unequal powerdividing ratio and simple layout,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 6, pp. 1589–1594, Jun. 2009. [17] D. M. Pozar, Microwave Engineering, 2nd ed. New York: Wiley, 1998. [18] K. Uyen, E. J. Wollack, J. Papapolymerou, and J. Laskar, “A broadband planar magicT using microstripslotline transitions,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 1, pp. 172–177, Jan. 2008. [19] M. E. Bialkowski and Y. Wang, “Wideband microstrip 180 hybrid utilizing ground slots,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 9, pp. 495–497, Sep. 2010. [20] B. Schüppert, “Microstrip/slotline transitions: Modeling and experimental investigation,” IEEE Trans. Microw. Theory Tech., vol. 36, no. 8, pp. 1272–1282, Aug. 1988. [21] B. Schüppert, “Analysis and design of microwave balanced mixers,” IEEE Trans. Microw. Theory Tech., vol. MTT34, no. 1, pp. 120–128, Jan. 1986. [22] W. Feng, Q. Xue, and W. Che, “Compact planar magicT based on the doublesided parallelstrip line and the slotline coupling,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 11, pp. 2915–2923, Nov. 2010. Feng Lin was born in Shaoyang, Hunan Province, China, in April 1986. He received the B.Eng. degree in information engineering from the South China University of Technology, Guangzhou, Guangdong, China, in 2008, and is currently working toward the Ph.D. degree in EM fields and microwave technology at the South China University of Technology. His research interests include microwave passive component design.
QingXin Chu (M’99–SM’11) received the B.S, M.E., and Ph.D. degrees in electronic engineering from Xidian University, Xi’an, Shaanxi, China, in 1982, 1987, and 1994, respectively. He is currently a Full Professor with the School of Electronic and Information Engineering, South China University of Technology, Guangzhou, Guangdong, China. He is also the Director of the Research Institute of Antennas and RF Techniques, South China University of Technology. From January 1982 to January 2004, he was with the School of Electronic Engineering, Xidian University. From 1997 to 2004, he was a Professor and later the ViceDean with the School of Electronic Engineering, Xidian University. From July 1995 to September 1998 and July to October 2002, he was a Research Associate and Visiting Professor with the Department of Electronic Engineering, Chinese University of Hong Kong, respectively. From February to May 2001 and December 2002 to March 2003, he was a Research Fellow and Visiting Professor with the Department of Electronic Engineering, City University of Hong Kong, respectively. From July to October 2004, he visited the School of Electrical and Electronic Engineering, Nanyang
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Technological University, Singapore. From January to March 2005, he visited the Department of Electrical and Electronic Engineering, Okayama University. From June to July 2008, he was also a Visiting Professor with the Ecole Polytechnique de I’Universite de Nantes, Nantes, France. He has authored or coauthored over 300 papers in journals and conferences. His current research interests include antennas in mobile communication, microwave filters, spatial powercombining array, and numerical techniques in electromagnetics. Prof. Chu is a Senior Member of the China Electronic Institute (CEI). He was the recipient of the Tan Chin Tuan Exchange Fellowship Award, a Japan Society for Promotion of Science (JSPS) Fellowship, the 2002 and 2008 TopClass Science Award of the Education Ministry of China, and the 2003 FirstClass Educational Award of Shaanxi Province.
Zhi Gong was born in Yiyang, Hunan Province, China. He received the B.Eng. degree in electronic information engineering from Beihang University, Beijing, China, in 2008, and the M. Eng degree in EM fields and microwave technology from the South China University of Technology, Guangzhou, China, in 2011. He is currently with the School of Electronic and Information Engineering, South China University of Technology.
Zhe Lin was born in Zhangzhou, Fujian Province, China. He received the B.Eng. degree in information engineering and M. Eng degree in communication and information systems from the South China University of Technology, Guangzhou, China, in 2008 and 2011, respectively. He is currently with the School of Electronic and Information Engineering, South China University of Technology.
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Crosstalk Reduction for Superconducting Microwave Resonator Arrays Omid Noroozian, Student Member, IEEE, Peter K. Day, Byeong Ho Eom, Henry G. LeDuc, and Jonas Zmuidzinas, Member, IEEE
Abstract—Largescale arrays of microwave kinetic inductance detectors (MKIDs) are attractive candidates for use in imaging instruments for next generation submillimeterwave telescopes such as CCAT. We have designed and fabricated tightly packed 250pixel MKID arrays using lumpedelement resonators etched from a thin layer of superconducting TiN deposited on a silicon substrate. The high pixel packing density in our initial design resulted in large microwave crosstalk due to electromagnetic coupling between the resonators. Our second design eliminates this problem by adding a grounding shield and using a doublewound geometry for the meander inductor to allow conductors with opposite polarity to be in close proximity. In addition, the resonator frequencies are distributed in a checkerboard pattern across the array. We present details for the two resonator and array designs and describe a circuit model for the full array that predicts the distribution of resonator frequencies and the crosstalk level. We also show results from a new experimental technique that conveniently measures crosstalk without the need for an optical setup. Our results reveal an improvement in crosstalk from 57% in the initial design down to 2% in the second design. The general procedure and design guidelines in this work are applicable to future large arrays employing microwave resonators. Index Terms—Crosstalk, submillimeter wave astronomy, superconducting microwave resonator, superconducting photon detector.
I. INTRODUCTION AND BACKGROUND
S
UPERCONDUCTING detectors are of strong interest for a number of astrophysics applications in the millimeter, submillimeter, and farinfrared wavelength bands [1]. Nextgeneration groundbased submillimeterwave telescopes, such as the Cornell Caltech Atacama Telescope (CCAT) [2] or future space Manuscript received October 16, 2011; revised January 13, 2012; accepted January 23, 2012. Date of publication March 08, 2012; date of current version April 27, 2012. This work was supported in part by the Jet Propulsion Laboratory (JPL) under National Aeronautics and Space Administration (NASA) Grant NNG06GC71G and Grant NNX10AC83G, the Gordon and Betty Moore Foundation, and the Keck Institute for Space Studies. O. Noroozian is with the Department of Electrical Engineering and with the Submillimeter Astronomy Research Group, California Institute of Technology, Pasadena, CA 91125 USA (email: [email protected]). P. K. Day and H. G. LeDuc are with the Jet Propulsion Laboratory, Pasadena, CA 91109 USA (email: [email protected]; [email protected]). B. H. Eom is with the Submillimeter Astronomy Research Group, California Institute of Technology, Pasadena, CA 91125 USA (email: [email protected]). J. Zmuidzinas is with the Department of Physics, Mathematics and Astronomy, California Institute of Technology, Pasadena, CA 91125 USA, and also with the Jet Propulsion Laboratory, Pasadena, CA 91109 USA (email: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2187538
Fig. 1. (a) Schematic illustration of a 2 8 section of the geometry of a closepacked resonator array, with dark regions representing TiN metallization. (b) Crosssectional view along A–A in (a) of a resonator showing the illumination mechanism and the metal back short.
telescopes, require focal planes with largescale detector arrays of 10 –10 pixels. Submillimeter and farinfrared bolometric arrays have been growing exponentially in a “Moore’s law” fashion, doubling in size every 20 months [2], and they have reached pixel counts as high as 10 in the SCUBA2 instrument [3]. However, further progress has been hampered by complicated and costly fabrication and readout electronics, especially the need for complex cryogenic SQUIDbased multiplexing circuits. This has driven the need for simplified alternative detector designs suitable for high packing densities and with lower cost. Arrays using microwave kinetic inductance detectors (MKIDs) [4], [5] offer a potential solution. Fig. 1(a) shows a schematic illustration of a section of an MKID array described in this work. These arrays can be easily made with a single layer of superconducting metal film deposited on a silicon substrate and pattered using conventional optical lithography. Furthermore, MKIDs are inherently multiplexable in the frequency domain, allowing 10 detectors to be read out using a single coaxial transmission line and cryogenic amplifier, drastically reducing cost and complexity. An MKID uses the change in the microwave surface impedance of a superconducting thinfilm microresonator to detect photons. Absorption of photons in the superconductor breaks Cooper pairs into quasiparticles, producing a change in the complex conductivity and therefore the surface impedance, which results in a perturbation of resonator frequency and quality factor. For excitation and readout, the resonator is weakly coupled to a transmissionline called a feedline. The complex amplitude of a microwave probe signal tuned onresonance and transmitted on the feedline past the resonator is perturbed as photons are absorbed in the superconductor. The perturbation can be detected using a cryogenic SiGe transistor or InP high electronmobility transistor (HEMT) amplifier at the detector output and subsequent homodyne mixing at room
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temperature [4]. In an array of MKIDs, all the resonators are coupled to a shared feedline and are tuned to slightly different frequencies. They can be read out simultaneously using a comb of frequencies generated and measured using digital techniques [6], [7]. MKID arrays are being developed for astronomy at a wide range of wavelengths from millimeter waves to Xrays [7]–[10]. Other applications of superconducting resonators are in quantum computation experiments [11]–[13], multiplexed readout of transition edge sensor bolometers [14], and parametric amplifiers [15]. Our previous work on mm/submillimeterwave detection using MKIDs resulted in the construction and demonstration of a nearly complete imaging instrument known as MUSIC (Multiwavelength Submillimeter Kinetic Inductance Camera) [7]. The focal plane has 576 spatial pixels. For each pixel, radiation is coupled onto the chip using a planar multislot antenna and a lowloss superconducting Nb microstrip feed network. Superconducting lithographic bandpass filters split the mm/submillimeter signal from every antenna into four bands (850, 1100, 1300, and 2000 m), and the radiation is then detected using one MKID resonator per band. Each resonator is a hybrid of an interdigitated capacitor and a coplanar waveguide (CPW) inductor mainly made from Nb, except for a short Al section at the end of the CPW. The coupled radiation is absorbed in the Al section of the resonators which has a lower superconducting energy gap than the incident millimeter/submillimeter radiation energy. Fabrication of the array requires approximately six levels of lithography. In June 2010 a demonstration run of a prototype instrument resulted in encouraging results with sensitivities reaching close to the background noise limit [8]. The arrays described in the present work are very different from the MUSIC arrays. Since the new arrays are intended for operation at a freespace wavelength of 350 m (860 GHz), Nb multislot antennas and microstriplines cannot be used as a radiation coupling mechanism due to the resistive loss above the Nb superconducting energy gap ( 700 GHz). To demonstrate the feasibility of large arrays of submillimeterwave MKIDs at 350 m, we fabricated arrays with 250 resonators using variations of Cardiffstyle lumpedelement resonators [16], [17]. The resonator structures were designed to act as direct absorbers of radiation, taking advantage of highly resistive TiN films [18] to achieve a good impedance match to the incoming radiation. The TiN film is deposited on a highresistivity crystalline silicon substrate. The array is backilluminated; the photons travel through the substrate and are absorbed in the TiN resonators on the back side [see Fig. 1(b)]. Fresnel reflection of radiation entering the silicon substrate can be eliminated by using an antireflection layer. We demonstrated the basic operation of the firstgeneration arrays by measuring the response to a 215 m bandpassfiltered blackbody source, with the results indicating 70% absorption efficiency (single polarization), comparable to the front/back power division ratio expected for silicon. It should be possible to reach 100% by using a metal backshort [19]. Although the optical response measurements for our initial design (A; see Fig. 2) were encouraging, the electromagnetic coupling between resonators combined with the high packing
Fig. 2. Schematic of resonator designs A and B. Dimensions are not to scale and the number of meanders in design A and turns in the spiral in design B have been reduced for better visibility. The inductors are colored in red (in online version), the capacitors in blue (in online version), the feedlines in gray, and the ground shield in green (in online version).
density (in real space and frequency space) resulted in large microwave crosstalk. We initially detected this problem through observation of nonuniform resonance frequency spacings and very large variations in resonance quality factors across our arrays. Similar effects had also been reported for arrays developed at Cardiff University [19], but no detailed analysis or effective solution was available. Here we present a detailed circuit model, identify the source of the crosstalk, present a measurement technique for quantifying crosstalk, and finally present an improved resonator and array design which shows negligible crosstalk. In Section II we explain details of our initial resonator and array design (A), and our new design (B). We identify the cause for the high interpixel coupling as being due to the large dipole moment of each resonator interacting with nearby resonators. To reduce the dipole moments, we modified the resonator geometry in design B so that sections with opposite charge densities and currents are close together. As another precaution, we added a grounding shield around each resonator. In Section III we briefly review the fabrication procedure. In Section IV we describe a simple model for coupling between two resonators and confirm it using electromagnetic simulations. In Section V we construct circuit models for full size arrays of type A and B. We then compare the model predictions for the mode frequencies to network analyzer measurements. In Section VI we describe a method for measuring crosstalk in the lab using a simple “pumpprobe” technique and present measurement results for both arrays. These results show that crosstalk is high ( 57%) for design A and is dramatically reduced due to modifications in design B to 2%. II. RESONATOR AND ARRAY DESIGNS Our arrays use lumped element resonators that are designed to efficiently absorb submillimeterwave radiation. The resonators are made from a thin layer of superconducting titanium nitride (TiN [18]) which has recently been shown to have several advantages over more conventional materials such as aluminum: 1) the high surface resistance of TiN films makes it easy to design good farIR absorbers; 2) TiN films also have a large surface inductance that greatly increases the responsivity to photo
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generated quasiparticles; 3) the high kinetic inductance also reduces the resonance frequency, thereby increasing the multiplexing density; 4) the ultralow microwave loss in the material enables extremely high quality factors as high as 3 10 [18]; and 5) the transition temperature is tunable over a wide range ( ) by changing the nitrogen content, which allows for optimization of the detector response over a wide range of loading conditions. For these reasons TiN is an excellent choice for our detectors. Our initial resonator and array design (A) showed good optical absorption properties but suffered from large crosstalk between adjacent resonators. To solve this problem we created a new design (B). The two designs are explained below. A. Design “A” This design closely follows the original Cardiff proposal [16]: we use a lumped element resonator with a meandered singleline inductor and an interdigitated capacitor (IDC). A schematic of the resonator is shown in Fig. 2(a) and a photograph in Fig. 3(c). The whole resonator array is made from a single layer of 40nmthick TiN film with transition temperature K, sheet (kinetic) inductance pH, and sheet resistance 20 . The inductor is the photosensitive portion of the resonator since the microwave current is large, whereas the capacitor electrodes have much lower current and therefore this portion of the structure is essentially “blind”. The inductor consists of 32 1mmlong strips with a width of m and a spacing of m. The total inductance is nH at 1.5 GHz, and kinetic inductance fraction . The kinetic inductance fraction is defined as the ratio of kinetic inductance to total inductance of the line. The total size of the pixel is 1 mm 1 mm. We used an initial estimate for to select the fill factor needed to achieve efficient submillimeter absorption. The relevant impedancematching condition is given by (1) where is the dielectric constant of silicon in the farinfrared at 1.5 K [20]. The capacitor has four 0.9 mm 10 m fingers with relatively large 10 m gaps to reduce twolevel system noise and dissipation [21]. The capacitor area is kept to 10% of the total area in order to minimize dead space. The length of the capacitor fingers can be varied to tune the resonance frequencies in the array. At maximum finger length, the capacitance is pF. The coupling to the feedline was designed for a coupling quality factor . We fabricated a 16 14 array of these resonators. Readout is accomplished using a single coplanar strip (CPS) feedline with characteristic impedance . The physical gap between pixels is 65 m in both directions. The resonator frequencies were designed to be separated by 1.3 MHz. The lowest frequency resonator is at the top left of the array and the 224 frequencies increase linearly across the columns from top to bottom. The feedline runs across the resonators vertically
Fig. 3. (a) Device mounting box (goldplated copper) showing microstripCPW circuit board transitions, SMA coaxial connectors, four retaining clips, and the detector array. (b) Photograph of an earlier version of a 16 16 array of design B pixels but with no resonator ground shield and a CPS feedline instead of a CPW feedline. (c) Photograph of design A resonator. (d) Photograph of design B resonator.
and connects to the input and output side SMA connectors using circuit board transitions and wirebonds. B. Design “B” A diagram of the lumpedelement resonator used for design B is shown in Fig. 2(b) and a photograph is shown Fig. 3(d). The TiN film is 20 nm thick with K, pH,
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and
using BCl /Cl to pattern the resonator structures and the CPS feedline, all in one layer, for design A. For design B the feedline is a CPW line with periodic TiN ground straps spaced 500 m apart. To avoid shorts caused by the straps, the centerline is initially not patterned and a 200nmthick insulating layer of SiO is deposited on top using RF magnetron sputtering from a high purity fused silica target. A thin layer of niobium is then deposited using dc magnetron sputtering, and is patterned using an inductively coupled plasma etcher and a mixture of CCl F , CF , and O , to create the centerline of the CPW feedline. The SiO layer is then patterned using a buffered oxide etch (BOE) to remove SiO from over the resonators.
. The inductor is a coplanar strip (CPS) with m strips and m gap. The spacing between each CPS pair is m. The inductor has a total inductance of pH at 1.5 GHz, and . The total size of the pixel is 0.65 mm 0.5 mm. The ratio has been tuned using (1), where we have used an effective width instead of . The spiral shape was chosen to allow absorption in both polarizations [22]. The efficiency of the absorber has been simulated and measured and will be presented in a separate report. The capacitor has fourteen 0.5 mm 5 m fingers with 5 m gaps. The increased number of fingers allows for wider frequency tunability and better current uniformity in the inductor. At maximum finger length, the capacitance is pF. The coupling to the feedline was designed for . We fabricated a 16 16 array of these resonators [see Fig. 3(b)] and used a finiteground coplanar waveguide (CPW) feedline ( ) as opposed to a CPS feedline. We added periodic grounding straps connecting CPW ground strips to eliminate the unwanted coupled slotline mode [23]. We used Nb instead of TiN for the CPW centerline in order to reduce the impedance mismatch to the 50 connections, helping to reduce the observed variability across the array. The physical gap spacing between pixels is 35 m in both directions. To further reduce crosstalk, the resonator frequencies are split into two groups of 128: a high frequency band ( ) and a low frequency band ( ) that are separated by 100 MHz, and are distributed in a checkerboard pattern in the array. The frequency spacing between resonances was designed to be 1.25 and 2.2 MHz in the  and bands, respectively. Starting from the top left and going down in the first column, we have resonator (the lowest frequency in the band), (lowest in the band), . In the second column we have , etc. This pattern distributes the resonators in a way that keeps resonators that are close in frequency farther apart physically, reducing the pixel–pixel crosstalk. As will be shown in Sections V and VI, design B has considerably lower crosstalk than design A. In design B the use of a doublewound (CPS) inductor places conductors with opposite polarities in close physical proximity, resulting in a good degree of cancellation of the resonator’s electromagnetic fields. This confines the fields closer to the structure, reducing stray interactions between nearby resonators in a closepacked array. The grounding shield around each resonator further helps in confining the fields. As a positive side effect of the proximity of opposite polarity conductors, the geometrical inductance in design B is reduced resulting in a larger . A theoretical circuit model and experimental crosstalk results for design A and B are discussed in Sections IV–VI. III. FABRICATION PROCEDURE First, a layer of TiN film is sputtered onto an ambienttemperature, highresistivity ( k cm) silicon substrate. The substrate is cleaned with hydrofluoric acid (HF) prior to deposition. The critical temperature of the film is sensitive to the stoichiometry of the film and is controlled by the flow rate of the sputtering gases Ar and N [18]. UV projection lithography is used followed by inductively coupled plasma etching
IV. COUPLEDRESONATORS MODEL A simple circuit can be used to model electromagnetic coupling between two adjacent resonators in our arrays. The coupling can be capacitive, inductive, or a combination of the two. For purposes of discussion we assume a net capacitive coupling. Fig. 4(a) shows two resonators coupled with a crosscoupling capacitor , with and being the capacitances of the interdigitated capacitors (IDC) and . (If the coupling were inductive, would be replaced by an inductor where and a similar analysis as explained below would follow). The inductor represents inductance of the meandered lines in design A and the spiral in design B resonators. It is easy to see that if the two resonators are uncoupled ( ), the two natural resonance modes are , ,2. However, if , the frequencies of the two modes are (2) where the capacitance eigenvalues are (3) and where and . The values for , , and can be extracted by simulating each component in an electromagnetic (EM) simulation software like Sonnet [24]. The value of the coupling element ( or ) is difficult to extract from direct simulation. However, by examining the details of the above circuit, one can see that in a case where , the eigenvectors are either (“symmetric mode”) or (“antisymmetric mode”). We define the splitting frequency and where and refer to the symmetric and antisymmetric mode frequencies. Depending on the type of crosscoupling, for capacitive coupling (as in Fig. 4) and for inductive coupling. From this, it is easy to show that for capacitive coupling for inductive coupling
(4) (5)
These equations allow us to determine the value of the coupling . The quantity is element assuming that we know
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TABLE I COUPLING SPLITTING FREQUENCIES
Fig. 4. (a) Circuit representation of two coupled resonators with crosscou. (b) Schematic example of two coupled resonators where pling capacitor the length difference of the capacitors is indicated. Dimensions are not to scale. (c) Resonance frequencies of two coupled resonators in (b) when the finger length of one capacitor is changed show an avoided level crossing indicating MHz. The circles are simulation a crosscoupling strength of results from Sonnet and the lines are a fit to (2).
a measure of the coupling strength and increases as the coupling gets stronger. We used Sonnet software [24] to directly simulate our coupled resonators to extract . Fig. 4(b) shows the schematic of two such coupled resonators. We run multiple simulations, each time slightly changing the capacitance value of one resonator (using its IDC finger length) and keeping the other capacitance constant. The resulting frequencies are shown in in Fig. 4(c) (circles) where the horizontal axis is proportional to capacitance difference. As the difference in capacitance approaches zero, an avoided crossing appears. Our circuit model agrees well with this behavior as is evident from the solid lines in Fig. 4(c), which are from a fit to (2). The minimum separation in the two curves is equal to and can be used in (4) or (5) to estimate the value of the coupling element. It should be mentioned that identifying whether the crosscoupling mechanism is capacitive or inductive can be achieved through simulations by noting that the symmetric mode will generally have a stronger coupling to the feedline (lower ) compared to the antisymmetric mode, since the currents injected in the feedline will be inphase as opposed to 180 outofphase. This observation yields the sign of .
V. FULL ARRAY CIRCUIT MODEL AND SIMULATION In order to predict the behavior of a complete array of size , we calculated the eigenfrequencies for an equivalent circuit. The circuit consists of identical inductors attached to the ports of a capacitance network that takes into account all of the nearest neighbor resonator couplings using the actual positions of the
resonators with respect to each other and with respect to the feedline
.. .
.. . .. .
.. .
..
.
(6)
( ) are the cross coupling capacitances, are where capacitances of the IDCs, and is the meander or spiral inductance. The values for the were calculated by first simulating all the nearestneighbor tworesonator configurations in each array in Sonnet and extracting their corresponding splitting frequencies . These are listed in Table I. One can already see that the splitting frequencies for design B are considerably smaller than design A and also smaller than the frequency spacing between resonances. We then used (4) together with Table I to convert values into corresponding ’s. The resulting array eigenfrequencies from the simulations are shown in Fig. 5 for both designs, and are compared to network analyzer measurements. The measurement setup was the same as described later in Fig. 9, except with the pump tone turned off. Assumptions that were used in the simulation are explained in Section II. As can be seen, the simulations are in excellent
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Fig. 5. Measurements of array resonance frequencies for both designs A and B and comparison to simulation. The two “simulation (no coupling)” curves are . for when
Fig. 7. Normalized energy (20 ) in voltages to across the array for a specific mode number (#68) in both arrays is shown in color (in online version). In an uncoupled array, this mode number would purely correspond to the resonator in position # 68 in array A, and in position # 135 in array B (indicated by arrows). However, due to strong coupling in array A, energy is distributed over many resonators, while in array B the energy is well localized.
resonator to the resonance mode. The energy in each of the four diagonal nearest neighbor pixels in design B is more than 40 dB lower than the main pixel. These results strongly indicate that crosstalk is dramatically reduced in design B. This conclusion is confirmed by direct measurements and simulations of the crosstalk, which we present in Section VI. VI. CROSSTALK
Fig. 6. Series of simulations showing how the frequency curve shape evolves as the coupling strength is varied by tuning the scaling factor .
One method to measure crosstalk is to illuminate a single physical resonator on the array with submillimeter photons and to look for a response in other resonances. This approach is difficult because confining the farIR light to one pixel requires a complicated optical setup. Instead, we developed a very simple “pumpprobe” technique where we apply a microwave “pump” tone to a resonance and observe the response from the other resonances. This technique exploits the fact that the kinetic inductance of a superconductor generally is nonlinear [5], [25] and can change as a function of the microwave current (7)
agreement with measurements for both arrays, confirming our circuit model for coupled resonator arrays. The specific inverted shape of the curve for design A is a characteristic feature of highly coupled arrays. This has been further explored in Fig. 6 where we have plotted the eigenfrequencies for design A for a range of coupling strengths by scaling the values in Table I by the same factor. As can be seen, the shape gradually disappears as we reduce the strength of the coupling, and becomes negligible by the time it is down by a factor of 16. The same shape eventually also appears in both bands of array B when we artificially scale up the coupling strength, but for the actual array the effect is negligible thanks to the much smaller splitting frequencies and the checkerboard frequency scheme. Equation (6) also yields the normalized eigenvectors for the resonance modes. An example is shown visually in Fig. 7 where it can be seen that the mode is highly delocalized for design A whereas it is highly localized for design B. The colors show the amount of normalized energy contributed by each physical
where is the microwave current in the inductor, and sets the scale of the nonlinearity and is often comparable to the DC critical current. By applying a strong microwave pump tone to one of the resonance modes with frequency , the microwave currents in the inductors that participate in that mode cause the inductance values to increase slightly according to (7), so the mode frequency decreases to a new value that may be characterized by the frequency shift . In an array where the pixels are coupled, this will also result in shifts in other modes, and by comparing these shifts to we can experimentally measure crosstalk for each mode. If and are the frequency of a certain “probed” mode when the pump is applied onresonance and offresonance respectively, then a quantitative measure of the crosstalk may be defined as . The effect of the nonlinearityinduced shifts in the inductances may be analyzed by generalizing (6) to include nonequal inductors, and by noting that in our measurements so the use of linear perturbation theory is very
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Fig. 8. Crosstalk simulations for fullsize arrays A and B. In both simulations mode number 68 (indicated in red, in online version) is pumped. By definition, crosstalk for the pumped mode is 100%. Note that the scales are very different in the two plots.
well justified. The result of this calculation yields an expression for the crosstalk values
Fig. 9. Illustration of the setup for measuring the resonances and the crosstalk. The resonators are cooled down to below 100 mK in a cryogenic refrigerator, and are read out using a network analyzer. An SiGe transistor amplifier [26] at 4 K is used to amplify the signal. The synthesizer pump power is combined with readout power using a 3dB power combiner. The pump signal frequency is tuned on a resonance (blue curve in online version) which causes the resonance to shift (red curve in online version). A nearby coupled resonance also shifts as a result.
(8)
and are the voltage eigenvector components for Here modes and in our circuit model (Fig. 7). This result demonstrates that modes whose “energy overlap” is large will have significant crosstalk. Fig. 8 shows crosstalk simulated for both arrays A and B using (8). In both simulations an arbitrary mode number (#68) was pumped. The simulations show that crosstalk is very high in design A (up to 75%) where many other modes are affected by the pump, while in design B there is almost no crosstalk down to a level of 0.04%. The measurement setup is illustrated in Fig. 9 where a synthesizer provides microwave power (pump) at the frequency of one of the resonance modes ( ). All the resonances were probed using a network analyzer in a relatively low power mode ( 100 dBm on the feedline), so that the pump power was dominant ( 80 dBm). are shown in Crosstalk measurement results Fig. 10(a) and (b). Both plots are for a group of resonances that have frequencies not too far from the pumped resonance. Fig. 10(a) clearly shows that design A is dominated by crosstalk as large as 57%. Fig. 10(b) shows that by going to design B, crosstalk dramatically reduces down to a maximum of 2%. The error bars are a result of the fits to the resonances by a fitting code [27] used to fit the data from the network analyzer. Because the network analyzer scans were taken at relatively low power, higher measurement times were required which made the data susceptible to various noise sources including network analyzer frequency drift and magnetic fields affecting the resonance positions [28]. The simulations shown in Fig. 8 support the measurements and suggest that the actual crosstalk in design B could be much lower than the experimental upper limit of 2%.
Fig. 10. Crosstalk measurement results for designs A and B. The (frequency) position of the pumped resonance is shown by the dashed line. The red bars (in online version) indicate the measurement error.
VII. SUMMARY We successfully fabricated 250pixel arrays of submillimeterwave MKIDS using TiN on silicon. We demonstrated the basic operation of these arrays by measuring their response to a blackbody source. However, the arrays suffered from
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crosstalk between individual pixels due to large resonator dipole moments interacting with nearby resonators. We developed a simple and general circuit model that accounts for the crosstalk and agrees well with measurements of the array frequency curve patterns and crosstalk. We created a new design that eliminates crosstalk in two ways: 1) by reducing the dipole moment of each resonator and 2) by distributing the resonators across the array in a checkerboard pattern. We developed a simple “pumpprobe” technique to directly measure crosstalk, and showed that crosstalk in design B is indeed smaller and is dramatically reduced to 2%. The general procedure and design guidelines in this work are applicable to future largescale arrays of microwave resonators for telescopes like CCAT. ACKNOWLEDGMENT The authors would like to thank S. Golwala, D. Moore, L. Swenson, and R. Duan with the California Institute of Technology, Pasadena, for helpful discussions. The devices used in this work were fabricated at the JPL Microdevices Laboratory, Pasadena, CA. REFERENCES [1] J. Zmuidzinas and P. L. Richards, “Superconducting detectors and mixers for millimeter and submillimeter astrophysics,” Proc. IEEE, vol. 92, no. 10, pp. 1597–1616, Oct. 2004. [2] “Panel reports—New worlds, new horizons in astronomy and astrophysics,” National Research Council, Washington, DC, 2011. [Online]. Available: http://www.nap.edu/catalog.php?record_id=12982 [3] W. S. Holland, W. D. Duncan, B. D. Kelly, K. D. Irwin, A. J. Walton, P. A. R. Ade, and E. I. Robson, “SCUBA2: A large format submillimetre camera on the James Clerk Maxwell Telescope,” in Proc. SPIE Millimeter Submillimeter Detectors Astron. Conf., 2003, vol. 4855, pp. 1–18. [4] P. K. Day, H. G. LeDuc, B. A. Mazin, A. Vayonakis, and J. Zmuidzinas, “A broadband superconducting detector suitable for use in large arrays,” Nature, vol. 425, no. 6960, pp. 817–821, Oct. 2003. [5] J. Zmuidzinas, “Superconducting microresonators: Physics and applications,” Annu. Rev. Cond. Mat. Phys., vol. 3, pp. 169–214, 2012. [6] B. A. Mazin, P. K. Day, K. D. Irwin, and C. D. Reintsema, “Digital readouts for large microwave lowtemperature detector arrays,” Nuclear Instrum. Methods Phys. Res.—Sec. A, vol. 599, no. 2, pp. 799–801, Apr. 2006. [7] P. R. Maloney, N. G. Czakon, P. K. Day, T. P. Downes, R. Duan, J. Gao, J. Glenn, S. R. Golwala, M. I. Hollister, H. G. Leduc, B. A. Mazin, O. Noroozian, H. T. Nguyen, J. Sayers, J. A. Schlaerth, S. Siegel, J. E. Vaillancourt, A. Vayonakis, P. R. Wilson, and J. Zmuidzinas, “MUSIC for sub/millimeter astrophysics,” in Proc. SPIE Millimeter, Submillimeter, FarInfrared Detectors Instrum. Astron. V Conf., 2010, vol. 7741, Art. ID 77410F. [8] J. A. Schlaerth, J. Glenn, P. R. Maloney, N. G. Czakon, T. P. Downes, R. Duan, S. R. Golwala, M. I. Hollister, O. Noroozian, S. Siegel, A. Vayonakis, J. P. Zmuidzinas, K. Day, H. G. LeDuc, H. T. Nguyen, J. Sayers, P. R. Wilson, J. Gao, B. A. Mazin, and J. E. Vaillancourt, “MKID multicolor array status and results from DemoCam,” in Proc. SPIE Millimeter, Submillimeter, FarInfrared Detectors Instrum. Astron. V Conf., 2010, vol. 7741, Art. ID 774109. [9] B. A. Mazin, K. O’Brien, S. McHugh, B. Bumble, D. Moore, S. Golwala, and J. Zmuidzinas, “ARCONS: A highly multiplexed superconducting optical to nearIR camera,” in Proc. SPIE GroundBased Airborne Instrum. Astron. III Conf., 2010, vol. 7735, Art. ID 773518. [10] A. Monfardini, A. Benoit, A. Bideaud, L. J. Swenson, M. Roesch, F. X. Desert, S. Doyle, A. Endo, A. Cruciani, P. Ade, A. M. Baryshev, J. J. A. Baselmans, O. Bourrion, M. Calvo, P. Camus, L. Ferrari, C. Giordano, C. Hoffmann, S. Leclercq, J. F. MaciasPerez, P. Mauskopf, K. F. Schuster, C. Tucker, C. Vescovi, and S. J. C. Yates, “A dualband millimeterwave kinetic inductance camera for the IRAM 30 m telescope,” Astrophys. J. Suppl. Ser., vol. 194, Jun. 2011, Art. ID 24. [11] J. B. Hertzberg, T. Rocheleau, T. Ndukum, M. Savva, A. A. Clerk, and K. C. Schwab, “Backactionevading measurements of nanomechanical motion,” Nature Phys., vol. 6, no. 3, pp. 213–217, Mar. 2010.
[12] J. Koch, A. A. Houck, K. Le Hur, and S. M. Girvin, “Timereversalsymmetry breaking in circuitQEDbased photon lattices,” Phys. Rev. A, Gen. Phys., vol. 82, no. 4, Oct. 2010, Art. ID 043811. [13] C. M. Wilson, T. Duty, M. Sandberg, F. Persson, V. Shumeiko, and P. Delsing, “Photon generation in an electromagnetic cavity with a timedependent boundary,” Phys. Rev. Lett., vol. 105, no. 23, Dec. 2010, Art. ID 233907. [14] J. A. B. Mates, G. C. Hilton, K. D. Irwin, L. R. Vale, and K. W. Lehnert, “Demonstration of a multiplexer of dissipationless superconducting quantum interference devices,” Appl. Phys. Lett., vol. 92, no. 2, Jan. 2008, Art. ID 023514. [15] E. A. Tholen, A. Ergul, E. M. Doherty, F. M. Weber, F. Gregis, and D. B. Haviland, “Nonlinearities and parametric amplification in superconducting coplanar waveguide resonators,” Appl. Phys. Lett., vol. 90, no. 25, Jun. 2007, Art. ID 253509. [16] S. Doyle, P. Mauskopf, J. Naylon, A. Porch, and C. Duncombe, “Lumped element kinetic inductance detectors,” J. Low Temp. Phys., vol. 151, pp. 530–536, Apr. 2008. [17] O. Noroozian, P. K. Day, B. H. Eom, H. G. Leduc, and J. Zmuidzinas, “Microwave crosstalk in lumped element farIR MKIDs,” presented at the Proc. 35th Int. Conf. Infrared Millimeter Terahertz Waves (IRMMWTHz), Rome, Italy, 2010. [18] H. G. Leduc, B. Bumble, P. K. Day, A. D. Turner, B. H. Eom, S. Golwala, D. C. Moore, O. Noroozian, J. Zmuidzinas, J. Gao, B. A. Mazin, S. McHugh, and A. Merrill, “Titanium nitride films for ultrasensitive microresonator detectors,” Appl. Phys. Lett., vol. 97, no. 10, Sep. 2010, Art. ID 102509. [19] S. Doyle, P. Mauskopf, J. Zhang, S. Withington, D. Goldie, D. Glowacka, A. Monfardini, L. Swenson, and M. Roesch, “Optimisation of lumped element kinetic inductance detectors for use in ground based mm and submm arrays,” in Proc. AIP Conf., 2009, vol. 1185, pp. 156–159. [20] J. W. Lamb, “Miscellaneous data on materials for millimetre and submillimetre optics,” Int. J. Infrared Millimeter Waves, vol. 17, no. 12, pp. 1997–2034, Dec. 1996. [21] O. Noroozian, J. S. Gao, J. Zmuidzinas, H. G. Leduc, and B. A. Mazin, “Twolevel system noise reduction for Microwave Kinetic Inductance Detectors,” in Proc. AIP 13th Int. Workshop Low Temp. Detectors, 2009, vol. 1185, pp. 148–151. [22] A. Brown, W. Hsieh, S. H. Moseley, T. R. Stevenson, K. Uyen, and E. J. Wollack, “Fabrication of an absorbercoupled MKID detector and readout for submillimeter and farinfrared astronomy,” in Proc. SPIE Millimeter, Submillimeter, FarInfrared Detectors Instrum. Astron. V Conf., 2010, vol. 7741, Art. ID 77410P. [23] G. E. Ponchak, J. Papapolymerou, and M. M. Tentzeris, “Excitation of coupled slotline mode in finiteground CPW with unequal groundplane widths,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 2, pp. 713–717, Feb. 2005. [24] Sonnet Softw. Inc. North Syracuse, NY, 2011. [Online]. Available: http://www.sonnetusa.com/ [25] T. Dahm and D. J. Scalapino, “Theory of intermodulation in a superconducting microstrip resonator,” J. Appl. Phys., vol. 81, no. 4, pp. 2002–2209, Feb. 1997. [26] S. Weinreb, J. Bardin, H. Mani, and G. Jones, “Matched wideband lownoise amplifiers for radio astronomy,” Rev. Sci. Instrum., vol. 80, no. 4, Apr. 2009, Art. ID 044702. [27] J. Gao, “The physics of superconducting microwave resonators,” Ph.D. dissertation, Dept. Phys., California Inst. Tech., Pasadena, CA, 2008. [28] J. E. Healey, T. Lindstrom, M. S. Colclough, C. M. Muirhead, and A. Y. Tzalenchuk, “Magnetic field tuning of coplanar waveguide resonators,” Appl. Phys. Lett., vol. 93, no. 4, Jul. 2008, Art. ID 043513. Omid Noroozian (S’07) received the B.S. degree in electronics engineering from the Sharif University of Technology, Tehran, Iran, in 2004, the M.Sc. degree in microelectronics from the Delft University of Technology (TUDelft), Delft, The Netherlands, in 2006, the M.S. degree in applied physics from the California Institute of Technology, Pasadena, in 2009, and is currently working toward the Ph.D. degree in electrical engineering at the California Institute of Technology. He was a Research Assistant with the Physics of NanoElectronics Group, Kavli Institute of Nanoscience, TUDelft, from 2005 to 2006, where he worked on design and fabrication of superconducting tunnel junction heterodyne mixer chips for the atacama large millimeter array (ALMA) telescope. Since 2006, he has been a Research Assistant with the
NOROOZIAN et al.: CROSSTALK REDUCTION FOR SUPERCONDUCTING MICROWAVE RESONATOR ARRAYS
Submillimeter Wave Astrophysics Group, California Institute of Technology, where he is working on development of kinetic inductance detector technology for largescale submillimeter/far infrared arrays for the Caltech Submillimeter Observatory (CSO) and the Cornell Caltech Atacama Telescope (CCAT).
Peter K. Day, photograph and biography not available at time of publication.
Byeong Ho Eom, photograph and biography not available at time of publication.
Henry G. LeDuc, photograph and biography not available at time of publication.
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Jonas Zmuidzinas (M’91) received the B.S. degree in physics from the California Institute of Technology, Pasadena, in 1981, and the Ph.D. degree in physics from the University of California at Berkeley, in 1987. He was a Postdoctoral Fellow in 1988–1989 at the University of Illinois at UrbanaChampaign. He joined the physics faculty at the California Institute of Technology in 1989, and currently serves as the Merle Kingsley Professor of Physics. He also has an appointment at the Jet Propulsion Laboratory (JPL), California Institute of Technology, where he serves as JPL’s Chief Technologist.
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Synthesis of Microwave Filters by Inverse Scattering Using a ClosedForm Expression Valid for Rational Frequency Responses Israel Arnedo, Member, IEEE, Ivan Arregui, Member, IEEE, Aintzane Lujambio, Student Member, IEEE, Magdalena Chudzik, Student Member, IEEE, Miguel A. G. Laso, Member, IEEE, and Txema Lopetegi, Member, IEEE
Abstract—In this paper, a novel technique to synthesize microwave filters by inverse scattering is proposed. It provides an exact solution for the synthesis problem, by means of a closedform expression, with very low computational cost. The technique is valid when the target frequency response can be expressed as a rational function. The coupledmode theory is used to model microwave propagation along the filter, and therefore, the synthesis technique is applicable to filters implemented in a wide range of technologies, such as planar and nonplanar transmission lines, and many waveguides. The synthesis method is exact for all the frequency range of interest, preventing the degradation of the frequency response that can be troublesome for wideband applications or to satisfy the outofband requirements of the filter. The resulting synthesized filter is, in general, a nonuniform transmission line or waveguide that features a continuously varying smooth profile, avoiding the presence of sharp discontinuities and their detrimental effects. To demonstrate the potential of the proposed synthesis technique, a multiband microwave filter, fulfilling stringent specifications, will be designed in rectangular waveguide technology. The prototype will be fabricated by electroforming and carefully measured with a vector network analyzer, confirming the accuracy of the novel synthesis method reported. Index Terms—Coupledmode theory, filter synthesis, inverse scattering, microwave filter, planar technology, rectangular waveguide.
I. INTRODUCTION
M
ICROWAVE filters are defined in classical textbooks as twoport networks used to control the frequency response at a certain point in a microwave system by providing transmission at frequencies within the passband of the filter and attenuation in the stopband of the filter [1]. Following that classical definition, the typical frequency responses include lowpass, highpass, bandpass, and bandreject characteristics. Filters are used in virtually any type of microwave communication, radar, or test and measurement system [1]. Manuscript received November 03, 2011; accepted January 06, 2012. Date of publication March 19, 2012; date of current version April 27, 2012. This work was supported by the Spanish Government under Project TEC201128664C0201. The work of M. Chudzik was supported by the Spanish Ministerio de Educación under a Formación de Profesorado Universitario (FPU) Grant. The authors are with the Electrical and Electronic Engineering Department, Public University of Navarre, 31006 Pamplona, Spain (email: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2187921
A wide variety of microwave filter design techniques are available in different technologies, using different basic microwave structures and topologies. A survey of the major classical techniques used in the design of microwave filters is presented in these wellknown review papers [2]–[4]. Additionally, many highquality books about this topic have been published during the last decades [5]–[11]. However, the large majority of the design techniques used today are based on the insertionloss method. This method relies on the use of the classical network synthesis theory [12], developed for lower frequencies, that allows us to systematically calculate the lumpedelement network that satisfies a desired rational filtering function such as Butterworth, Chebyshev, or Cauer. The microwave filter is then realized by implementing the lumped elements with suitable microwave structures that have similar frequency behavior over the frequency range of interest. However, the equivalence between the microwave structures used and their lumpedelement models will hold for a certain bandwidth, but will quickly degrade as the frequency moves away from it. Consequently, microwave filters designed using this technique will provide the required behaviour around the design frequency, but their outofband behavior will not be under control. Specifically, degradation in the frequency response is expected, often resulting in a loss of steepness in the transition bands and giving rise to new spurious passband/reject band that can violate the outofband requirements of the filter [1]. These problems could be of little importance for narrowband applications, but they are undoubtedly becoming more troublesome during the last years with the emergence of demanding wideband applications. A classical solution for the design of microwave filters with specifications defined over a wide frequency band is the use of the Richards transformation [13] (or other similar transformations) and the socalled exact synthesis techniques [14]. Richards showed that microwave distributed networks, composed of commensurate (equal electrical length) transmission lines and lumped resistors, could be treated in analysis or synthesis as lumpedelement networks, where together with elements the socalled unit element could the classical also be employed. To do it, he proposed the use of a frequency transformation, known as the Richards transformation, which maps the frequency response of the microwave distributed into the frequency response of network between the equivalent lumpedelement network in the whole frequency . The frequency is the frequency range
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ARNEDO et al.: SYNTHESIS OF MICROWAVE FILTERS BY INVERSE SCATTERING
at which all the transmission lines of the distributed network feature an electrical length of 90 (i.e., ). For higher frequencies, the frequency response of the distributed network will repeat periodically. Thus, the exact synthesis procedure will start by synthesizing the required frequency response using a lumpedelement network that can include also unit elements. By applying the Richards transformation, the lumpedelements will then be implemented using commensurate transmission lines, and the resulting distributed network will feature the frequency response of the lumpedelement network mapped between , and repeated periodically for higher frequencies [14]–[18]. The commensurate transmission lines employed in the implementation could be quite complex, including coupled lines, combline, and interdigital structures [19]. The technique can be also applied to the synthesis of waveguide filters [20], [6]–[8], or by the introduction of approximations, even to mixed lumped/distributed networks [21], [22]. As it can be seen, the use of classical exact synthesis methods allows the designer to have a very good control over the frequency response of the microwave filter up to (frequency at which all the transmission lines feature a length of ), but the response will always repeat periodically beyond that frequency. In any case, conventional microwave filters (obtained by exact synthesis or directly by the insertion loss method), will be implemented by cascading suitable microwave structures as explained above, and will include sharp discontinuities at the connection junctions. These discontinuities can strongly influence the frequency response of the filter due to the fringing field effect [23], making necessary the use of complex models and/or a final electromagnetic optimization step in the design procedure to compensate for them. Therefore, sharp discontinuities can be troublesome because they can give rise to the excitation of higher order modes, or even radiation in open structures [24], and their sharp corners can limit the powerhandling capability in closed waveguides [5], [25]. To overcome all of these difficulties and limitations of the conventional microwave filters, an alternative design strategy will be used in this paper. The microwave filter design problem will be formulated as a direct synthesis problem, where starting from the desired frequency response for the filter, the required filtering device is obtained by using a direct solution of the electromagnetic equations involved. This problem belongs to a much more general class of mathematical problems known as inverse scattering, where the unknown structure or geometry of an object is obtained from its scattered field. Actually, the inversescattering techniques have been applied to many subjects such as quantum mechanics, acoustics, geophysics, optics, and microwaves, among others [26]. The topic took off when it aroused the interest of researchers in quantum mechanics during the 1950s [27], [28]. Later, it became of interest for the microwave community, where several mainly theoretical studies were developed in the context of nonuniform transmission lines. Necessary and sufficient conditions for realizability in nonuniform transmission lines were stated, and the unique relationship between reflection coefficient and the shape of the line was established [29], [30]. Approximated synthesis methods were also studied during those early years, but with very dif
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ficult or no clear practical application [31]. The first demonstration of a microwave filter designed using inverse scattering was done in the 1990s, and several different approaches have been proposed during the last years. Some authors have formulated the inversescattering problem in terms of timedomain reflectometry, using a discrete approach to build the synthesized circuit recursively layer by layer [32]–[34]. Other authors have managed to rewrite the synthesis problem as a system of Gel’fand–Levitan–Marchenko coupled integral equations [35], [36], or as an inverse classical Sturm–Liouville problem [37] using, afterwards, several complex numerical methods to obtain the solutions. Optimization methods have been also carefully designed and reported in the literature to solve the microwave synthesis problem [38]–[40]. However, it is important to note that all of these inversescattering methods developed to synthesize microwave filters assume that the filter will be implemented using nonuniform transmission lines. Actually, microwave propagation along the device is modeled with the telegrapher equations, using distributed series inductance and shunt capacitance parameters, and a voltage and current model [1]. Therefore, the reported inversescattering synthesis methods are valid to design filters in microwave planar technologies, such as microstrip, stripline, or coplanar waveguide, and in coaxial technology, but they cannot be used to design filters in nonTEM waveguide technologies that cannot be modeled as transmission lines. To extend the scope of application of the inversescattering synthesis techniques to also include filters in waveguide technologies, in this paper, microwave propagation along the device will be modeled using the coupledmode theory, as we recently proposed in [41]. In that paper, we obtained an exact analytical series solution for the synthesis problem valid for all the planar and nonplanar transmission lines, and for many waveguide technologies. In contrast with all the previously proposed techniques, the solution obtained was analytical, and therefore, the resulting synthesis method was simple and straightforward to implement. However, when the target frequency response for the filter includes very high rejection levels, then the number of terms necessary in the series solution to achieve an accurate synthesis can be very large, and consequently, the computational cost can be too high, making unfeasible the design of filters with very high rejections [42]. To avoid this limitation, in this paper, an alternative mathematical method will be used to solve the inversescattering problem. The method is valid when the target frequency response can be expressed as a rational function, and it will allow us to obtain an exact solution for the synthesis problem by means of an analytical closedform expression. The inversescattering problem when the frequency response is a rational function was initially studied in the mathematical seminal paper [43], and later refined in [44], where it was applied to the plasma inverse problem (i.e., the density distribution in plasma has to be determined by the reflection of transverse electromagnetic plane waves). The method was further developed some years later, and applied to the design of optical corrugated waveguide filters and fiber Bragg gratings [45], [46], attracting the interest of the optical research community. In this paper, this mathematical method will be used to solve the
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microwave filter synthesis problem. To do it, the method will be applied to a coupledmode theory formulation fully valid for the microwave region, and not restricted to weak coupling and to a limited bandwidth around the Bragg frequency of the quasiperiodic structure, as it happens in the optical case [45], [46]. The novel microwave filter synthesis technique has very low computational cost, even for the case of filters with very high rejection levels, completely overcoming the limitation of the design technique that we recently reported in [41] and [42]. It is easy and straightforward to implement due to the analytical closedform expression that is obtained for the solution. Moreover, since the coupledmode theory is used to model microwave propagation along the filter, as in [41], the scope of application of the technique is very wide, including the transmissionline technologies and also many waveguides. Additionally, the novel microwave filter synthesis technique proposed in this paper will have some remarkable features, shared by all the inversescattering techniques, that will surpass the limitations discussed previously for the classical microwave filter design methods. Specifically, the synthesis technique is direct and it does not require the use of intermediate lumpedelement networks and lumpedelement models to design the filter. The synthesis method is exact for all the frequency range of interest, and consequently there is no loss of steepness in the transition bands and no spurious passband/reject band that can violate the outofband requirements of the filter. The synthesis technique produces filters with continuously varying smooth profiles, avoiding the presence of sharp discontinuities and their detrimental effects. Finally, the synthesis technique is very flexible, and is valid for causal, passive, and stable frequency responses that in our method must be expressed as rational functions. The requirement of having rational frequency responses is, strictly speaking, a limitation of the method. However, it does not significantly limit its validity in practical applications since the wellknown functions used for electronic or classical microwave filters (Butterworth, Chebyshev, Cauer, ) are always rational, and in any case, an arbitrary frequency specification can be always approximated by a rational function using several wellestablished procedures [47], [48], [5], [49]. Additionally, digital filter design techniques can also be used to obtain an optimum approximation by rational functions, as we recently proposed in [50], enhancing the flexibility of our synthesis method. The outstanding flexibility in the frequency responses that can be implemented using inversescattering techniques allows us to extend the classical definition of a microwave filter to also include very important devices like pulse shapers [51], [52], matched filters [53], [41], thorder differentiators [54], multiband filters [48], and quadratic phase filters [55] that were difficult to design using classical filter techniques. II. COUPLEDMODE THEORY IN MICROWAVES A. General Theory The crosssection method will be employed in order to formulate an accurate coupledmode theory suitable for microwave devices. The basic idea of this method is that the electromagnetic fields at any cross section of a nonuniform waveguide can
be represented as a superposition of the different orthogonal modes (including their forward and backward traveling waves) corresponding to a uniform auxiliary waveguide that has the same cross section with identical distribution of and [56], [57]. Steadystate sinusoidal time dependence of the fields will be assumed and their phasor representation in the frequency domain will be used. If the structure under analysis is a closed waveguide, then only the classical discrete spectrum modes are necessary to have a complete orthogonal system, and the expansion of the fields can be written as (1a) (1b)
being the total electric and magnetic field present in with the structure, being the direction of propagation, and being the vector mode patterns (i.e., the dependent part of the electric and magnetic fields) of the mode of the auxiliary uniform waveguide associated to the cross section of interest. It is important to stress that these vector mode patterns finally also depend on , due to the variation that the cross section (and hence, the auxiliary uniform waveguide) suffers with . Finally, is the complex amplitude of the mode along the nonuniform waveguide. It is worth noting that if the structure under analysis is an open waveguide then the continuous spectrum modes are also necessary to have a complete orthogonal system [58], [59], and therefore they must be also included in the field expansion of (1a) and (1b), as it was done in [41]. By substituting the expansion of the fields in terms of modes [see (1a) and (1b)] into the Maxwell equations, and performing some mathematical manipulations, the socalled coupledmode equations can be obtained [56], [57] (2) where is the phase constant of the mode in the auxiliary uniform waveguide associated to the cross section of interest (it varies with ) and is the coupling coefficient between the and modes. Equation (2) is valid for any , i.e., for any mode, including its forward and backward traveling waves. As it can be seen, the complex amplitudes of the modes, , satisfy a set of firstorder linear ordinary differential equations, that will turn into integrodifferential equations for the case of open waveguides and continuous spectrum modes [41], [58]. There is one of these equations for each mode. The modes propagate along the nonuniform waveguide transferring power to each other, as indicated by the coupledmode equations. The contribution of each mode amplitude to the variation of another mode amplitude increases as the corresponding coefficient increases. For this reason, the parameter is known as the coupling coefficient between the and the modes. The exact expression to calculate the coupling coefficients depends on the kind of perturbation present in the nonuniform waveguide [56], [57]. For the case of nonuniform waveguides that include metals with
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variable cross section, which is of wide interest in microwave technologies, the coupling coefficient can be calculated as [56]
(3) where the integration is carried out over the metallic contour of the cross section (the intersection between the metal–dielectric interface and the crosssection, represented with a red solid line (in online version) in Fig. 1), using a local coordinate system defined on the contour, with axes [see Fig. 1(b)]. As can be seen, is normal and is tangential to the metallic contour of the cross section, with both axes contained in the cross section, while follows the propagation direction, orthogonal to the cross section. The unit vectors associated to these axes satisfy with directed toward the metal. and are the vector mode patterns of the and modes expressed over the metallic contour using the local coordinate system with axes , corresponding to the auxiliary uniform waveguide associated to the cross section of interest. is the operation frequency in hertz, is the permeability of vacuum, and is the dielectric constant of the medium that fills the waveguide. is the normalization factor of the mode (4) where is the surface of the cross section, , with being the unit vector in the propagation direction (see Fig. 1). Finally, is the tangent of the angle defined between the axis and the line tangential to the metal–dielectric interface (represented with blue solid line (in online version) in Fig. 1) contained in the plane. A sketch showing the angle is given in Fig. 1(c). It is interesting to note that the parameter is the only one in the expression for the coupling coefficient (3) that corresponds strictly to the nonuniform waveguide. The rest of the values correspond to the auxiliary uniform waveguide associated to the cross section of interest. It is assumed that the forward and backward traveling waves associated to the same mode satisfy (5a) (5b) (5c) (5d) For our case of interest of nonabsorbing waveguides (i.e., waveguides without dissipative losses) and propagating modes, it is always possible to choose the vector mode patterns and in such a way that the components in the transverse directions , and are real, and the components in the longitudinal direction and are imaginary. This choice is very convenient because it will allow us to calculate the power carried by the propagating mode simply as [56], and it will be used throughout this study. Moreover, it is straightforward to demonstrate that, by
Fig. 1. (a) Sketch of a nonuniform waveguide. The coordinate system with is given. A cross section has been selected and it is indicated with axes a red dotted line (in online version). The metallic contour of the cross section is highlighted with a red solid line (in online version). (b) Auxiliary uniform waveguide associated to the cross section selected. The cross section surface is shaded in red (in online version). The metallic contour of the cross section is highlighted with a red solid line (in online version). The local coordinate system is given. (c) Sketch of the angle defined between the axis with axes and the line tangential to the metaldielectric interface [represented with blue solid line (in online version)] contained in the – plane [indicated with blue is dotted line (in online version)]. The local coordinate system with axes given.
using this convention, the coupling coefficient between propagating modes will be always real. B. SingleMode Operation The coupledmode theory presented in Section IIA allows us to study electromagnetic wave propagation along a nonuniform waveguide in a rigorous manner and with no approximations involved. However, it is important to note that in most of the cases in microwave design, the problem can be greatly simplified by introducing several reasonable approximations that will lead to singlemode operation. In the first place, we are going to neglect the coupling of energy to modes of the continuous spectrum. This can be usually done because the energy of these modes is primarily radiated, and since the devices we are interested in have very little radiation losses in the frequency band of interest (we exclude the antennas from this study), the error involved in the approximation will be small. Actually, in the case of closed waveguides, there will be no radiation losses and no continuous spectrum modes. Regarding discrete spectrum modes, we will assume that for the frequency band of interest, either there is only one mode in propagation, while the rest are
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cutoff, or the geometry of the perturbation prevents the coupling between the working mode and the rest of the modes. These approximations lead us to assume singlemode operation in our study. Also taking advantage of the general property of the coupling coefficient (valid for ) [56], and using (5a) and (5b), the coupledmode equations can be thoroughly simplified to obtain (6a)
in our formulation, (6) can be rewritten as a Zakharov–Shabat system of quantum mechanics obtaining [41]
(10) where stands for complex conjugate. A solution for the Zakharov–Shabat system (one of the socalled Jost functions) can be written as [41]
(6b) where
(11) (7a) (7b)
and
(8a) (8b) with and being the total electric and magnetic field present in the structure, and being the vector mode patterns of the forward and backward traveling waves corresponding to the mode of operation in the auxiliary uniform waveguide associated to the cross section of interest, and being the normalizations taken for the fields of the mode, being the phase constant of the mode, being the direction of propagation, and being the complex amplitudes of the forward and backward traveling waves along the nonuniform waveguide, and being the coupling coefficient between the forward and backward traveling waves, which from (3), and taking into account (5c) and (5d), can be calculated as
It is important to note that is the independent variable in the Zakharov–Shabat system, while frequency is the independent variable in the coupledmode equations. Therefore, it is necessary to assume that variables and frequency are univocally related in our device, and specifically that does not vary with for a given frequency. Actually, although the target device specifications are usually given as a function of frequency, the variable will be used in our development in order to make the resulting synthesis equations independent of the technology selected for the device implementation. An important consequence of the work with the variable is that the presence of dispersion (phase velocity variable with frequency) in the implementation technology will not affect the synthesis method that will remain fully valid for those cases. A. Laplace Transform Formulation Since the exact solution for the synthesis problem will be obtained as a function of the poles and zeros of the target frequency response, it is convenient to extend analytically the solution (Jost function) in (11) to the complex Laplace plane by applying the wellknown relationship , obtaining (12)
(9) where the twosided Laplace transform is defined as and are defined as in (3), and the where is employed, also delocal coordinate system with axes fined as in (3), and sketched in Fig. 1. III. ANALYTICAL CLOSEDFORM EXPRESSION SYNTHESIS OF MICROWAVE FILTERS
FOR THE
In this section, an exact solution for the synthesis problem will be obtained by means of an analytical closedform expression that will allow us to calculate the coupling coefficient required for a microwave filter featuring a given target frequency response. To obtain the sought closedform expression for the coupling coefficient, we start from the simplified system of coupledmode equations, assuming singlemode operation, as given in (6). Taking into account that is a real function
(13) It is worth noting that since plays the role of frequency in our derivation, variable has, strictly speaking, units of length and it is related with time through the phase velocity . Actually, if remains constant with frequency, then . A linear combination of Jost functions of the kind shown below is also a solution for the Zakharov–Shabat system [41] (14) being (15)
ARNEDO et al.: SYNTHESIS OF MICROWAVE FILTERS BY INVERSE SCATTERING
where the solution , as well as the variables , correspond to the situation when the output port is matched and is the wellknown scattering matrix parameter expressed as a function of the complex frequency . Let us define the following auxiliary functions: (16)
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case of interest of reciprocal and lossless twoport networks [29]. Specifically, the magnitude can be calculated for each frequency (or equivalently, ) as [60]
(21) Taking into account that in (20), it follows from (21):
is a rational function, as given
using (14) and (12), they can be rewritten as (22) (17) As is demonstrated in [41], the coupling coefficient can be calculated using these auxiliary functions as
The phase of can be retrieved using the Hilbert transform, as explained in [41] and [61], or it can be also obtained by directly deducing from (22) taking only the zeros and poles with negative real part [43]
(18) where is the inverse Laplace transform of . It is important to note that to obtain (18), it was assumed that the coupling region (i.e., the designed device) begins at , and therefore, for . From this condition, causality restrictions have been derived and applied. Additionally it was also assumed that does not depend on , or equivalently, on the frequency. Obtaining the analytical solution for from (17), and introducing it in (18), it can be seen that the coupling coefficient can be calculated as [46] (19)
B. ClosedForm Expression for the Case of Rational Functions In this study, we will assume that is a rational function that can be expressed as a quotient of polynomials as
(20)
(23)
are the zeros and are the poles of , where (all the zeros are in the lefthalf plane because is a minimumphase function) and (all the poles must be in the lefthalf  plane to be a stable system). It is interesting to note that has the same poles as , but different zeros [43]. It is also worth noting that, strictly speaking, the parameter is a minimumphase function of the form of (23) that additionally includes a linear phase term of the form that accounts for the delay associated to the pure propagation along the device that features a total length [62], [63]. Inspecting (19), it can be seen that the coupling coefficient , necessary to implement a given frequency response can be calculated analytically by first obtaining an analytical solution for . To do it, we go back to (17), and taking into account that can be expressed as a quotient of polynomials (20), it can be deduced that and are bounded entire functions of that can be expressed as [46] where
(24) where are the zeros and are the poles of is the number of zeros, and is the number of poles, where it is satisfied that ,( is a bandlimited function that tends to zero when frequency goes to infinity) and (all the poles must be in the lefthalf plane to be a stable system). Finally, is a constant that must be adjusted to satisfy to have a passive system. It is important to highlight that although the frequency response has been expressed in terms of the parameter, the parameter of the device arises univocally from it for our
and are polynomials in of degree at most, whose coefficients are functions of . By introducing (20) in (17) and equating the result with (24), it is possible to get the required analytical solution for as a function of the previously defined polynomials. Additionally, assuming that the poles of and are distinct, that the zeros of are distinct, and that the zeros of are different from the conjugated poles with opposite sign , then and where
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can be expressed as a linear combination of entire functions of the form [46]
(25) where
the
coefficients
of
the linear combination depend only on and satisfy the following relationship [46]: (26) can be eliminated from (25) by The coefficients using (26). The remaining coefficients, will be calculated introducing (25) and (20) into (17), and comparing the result with (24). By proceeding in that way, it can be seen that only the terms containing the factor must exist, while the rest of the terms containing the factor must vanish identically. To verify this condition, the following pair of equations must be satisfied for each of the poles [46]:
(27) equations, the By solving the resulting linear system of unknowns can be obtained and the analytical expression for in (25) is fully determined with the aid of (26). Finally, introducing (25) in (19) and performing the limit, the sought analytical closedform expression for the coupling coefficient of the microwave filter that satisfies the target frequency response is obtained [46]
(28) are the zeros of where solutions of (27).
and
are the
C. Discussion on the Assumptions of the Method and Physical Insight As it has been explained in the previous sections, to obtain the analytical closedform expression for the coupling coefficient (28) necessary to implement a given causal, passive, and stable frequency response, it is assumed that it can be expressed as a rational function of the form of (20) and (23), where to have a passive system. This assumption does not significantly limit the validity of the synthesis technique in practical cases since the wellknown functions used for electronic or classical microwave filters (Butterworth, Chebyshev, Cauer, ) are always rational, and in any case, an arbitrary frequency specification can be always approximated
by a rational function using several wellestablished procedures [47], [48], [5], [49]. Additionally it has been assumed that the poles and zeros verify the following conditions. 1) are the poles of and . They have to be distinct and with a negative real part to guarantee the stability of the frequency response. 2) are the zeros of . They have to be distinct and with a negative real part to satisfy the minimumphase condition of the parameter. It is worth noting that the requirement of having distinct poles or zeros is not an actual limitation because the multiple roots can be always modified slightly so that they split up into simple roots. 3) are the zeros of . They have to be different from the conjugated poles with opposite sign . As a result, strictly speaking, it is not possible to implement poleszeros groups constituting allpass sections. However, this is not a real limitation because the poleszeros groups can be always modified slightly and the allpass original case can be considered as a limiting form of the actual implemented function. 4) , and therefore the number of poles is larger than the number of zeros of , which physically implies that is a bandlimited function that tends to zero when frequency goes to infinity. Again, this is not a real limitation for practical applications because the synthesized microwave device will cover all the frequency range of interest that, in practice, will be limited by the technology used, and in any case, will never extend to infinity. Finally, it is worth noting that once a suitable rational frequency response is chosen, the only approximations introduced to obtain the synthesis solution of (28) are to consider singlemode operation, as well as to assume that the phase constant does not vary with for a given frequency along the device, and that does not vary with frequency. These conditions are fully satisfied by transmission lines, like stripline and coaxial, that support a pure TEM mode, and by waveguides, like the rectangular waveguide operating with its fundamental mode and featuring plane perturbations, for example. These conditions can also be approximately satisfied by planar transmission lines, like microstrip and coplanar waveguide, that support a quasiTEM mode, and by waveguides, like the ridge waveguide operating with its fundamental quasimode and featuring plane perturbations, for instance. IV. APPLICATION: SYNTHESIS OF A MULTIBAND CAUER FILTER IN RECTANGULAR WAVEGUIDE TECHNOLOGY The analytical closedform expression obtained for the synthesis problem in Section III allows us to calculate the necessary coupling coefficient for a device featuring an arbitrary target frequency response, expressed as a rational function, with very low computational cost. In order to verify this novel synthesis method, in this section, a multiband filter featuring a Cauer (elliptic) frequency response will be designed in rectangular waveguide technology. To do it, the coupledmode theory presented
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in Section II has to be particularized for the selected technology, allowing us to relate the electromagnetic parameters (coupling coefficient and phase constant ) with the physical dimensions of the device and frequency. A. Particularization for the Selected Technology: Rectangular Waveguide The expression that relates the physical dimensions of the device and the coupling coefficient calculated as explained in Section II depends on the technology used [56]. The same holds for the phase constant, which also depends on frequency. When the mode of operation is TEM or quasiTEM (as it happens in coaxial or microstrip technology and in most of the microwave planar circuit technologies), the expression for the coupling coefficient given in (9) can be reformulated introducing the characteristic impedance of the mode , as was explained in [41], and the phase constant can be easily calculated using wellknown classical expressions [60]. For our case of interest of rectangular waveguide technology, the expression for the coupling coefficient given in (9) can be evaluated analytically for the fundamental mode, taking advantage of the analytical expressions available for the vector mode patterns of the forward traveling wave of the mode
Fig. 2. (a) Sketch of a rectangular waveguide. The coordinate system with is included. The local coordinate system with axes is also axes at each of the four walls given. (b) Definition for the perturbation angle of the rectangular waveguide.
(29a) The phase constant can be easily calculated for the fundamental mode in rectangular waveguide technology using the wellknown expression [60] (29b)
where is the width and is the height of the rectangular waveguide, is the normalization factor of the mode, as defined in (8a), is the frequency in hertz, is the permeability of vacuum, is the phase constant of the mode, and is the coordinate system [see Fig. 2(a)]. Taking into account the geometrical relationship between coordinate systems shown in Fig. 2(a), and the definition for the perturbation angle that allows for the proper calculation of the parameter at each wall of the rectangular waveguide [see Fig. 2(b)], the coupling coefficient for the fundamental mode can be finally calculated from (9) as [56] (30) The expression obtained for also depends on , and therefore, on frequency. To make it independent of frequency, as required by our synthesis method, only the height of the rectangular waveguide, , will be varied along the device, while the width, , will be kept constant giving rise to the following final expression for the coupling coefficient: (31)
(32) where is the relative dielectric constant of the homogeneous medium that fills the waveguide and is the speed of light in vacuum. As can be seen, the obtained does not depend on , as it was assumed in our synthesis method. Finally, in order to guarantee singlemode operation, as required in the synthesis method, the coupling to higher order modes must be avoided. It is important to notice that since it is assumed that the filter is excited by the fundamental mode, then the synthesized structure does not need to reject the higher order modes. It suffices to guarantee that no coupling to those modes occurs within the structure. Using the general expression for the coupling coefficient between modes (3) given in Section II, and assuming that our waveguide device featuring variations just in the parameter is excited by the fundamental mode, it can be deduced that only the and modes with can be excited within the device. This set of modes can be significantly reduced if the variation of the height of the rectangular waveguide is symmetrical with respect to a fixed axis in the propagation direction . In that case, only the and modes with can be excited within the structure [56]. It is important to highlight that the use of symmetrical variations for the height of the waveguide prevents the coupling to the higher order modes with lowest cutoff frequency , , making it easier to
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ensure singlemode operation in the synthesized device. Actually, the cutoff frequency for a or a mode in rectangular waveguide technology can be easily calculated by using the wellknown expression [60]
(33) and the physical dimensions of the synthesized waveguide device should be chosen in such a way that the set of higher order modes that can be excited remains cutoff throughout the device for the frequency range of interest, to make the coupling of energy to them negligible. B. Multiband Cauer Filter Implementation In order to verify the synthesis method proposed in Section III, we are going to implement a filter in rectangular waveguide technology with two passbands and two rejected bands for the fundamental mode. The first rejected band will extend up to the cutoff frequency of the operation mode . Standard WR90 ports will be used with dimensions mm and mm. As was explained in Section IVA, the width of the rectangular waveguide will be kept constant along the device , and a symmetric perturbation for the height will be applied. No dielectric material will fill the waveguide, and hence, . Thus, the cutoff frequency of the mode will be GHz [see (33)]. This value fixes the end of the first stopband. The rest of the frequency requirements are: a passband from 8 to 11.4 GHz with return losses better than 20 dB, a rejected band from 13 to 16.3 GHz with attenuation better than 60 dB, and a second passband from 18.9 up to 22.5 GHz with return losses better than 20 dB. The specification mask for the frequency response is sketched in Fig. 3. As was explained in Section III, once the frequency specifications are established, they must be approximated by a rational function. To do it, a bandpass frequency response following a Cauer (elliptic) approximation [47], [48] will be used for the parameter (a bandstop frequency response will result for the parameter). The order necessary for the approximation will be 14, and the passband will go from 13.1 up to 16.2 GHz with a passband ripple of 10 dB and a rejected band ripple of 25 dB. From the magnitude of the parameter, the magnitude of can be immediately obtained by using (21), and a bandstop frequency response results for the parameter, with rejected band attenuation of 67 dB. The selected frequency response for the  and parameters, based on a rational function of the Cauer type, as stated above, is depicted in Fig. 3. As can be seen, it satisfies the required specification mask with an added security margin. The poles and zeros of the selected transfer function are given in Table I. There are poles and zeros in our case. The constant [see (20)] is fixed to to provide a maximum value for the parameter of , satisfying the requirement for our passive microwave devices . It is important to note that in the actual transfer functions used in the synthesis method, the phase constant plays the role of the frequency. Regarding the
Fig. 3. Magnitude of the: (a)  and (b) parameters for the selected frequency response based on a 14order rational function of the Cauer type. The specification mask for the frequency response is also given.
TABLE I POLES
AND AND
ZEROS
FOR THE SELECTED TRANSFER FUNCTIONS
transfer function, it has the same poles and order as [see (23)], and its zeros can be easily calculated by using (22) and (23). Their values are also given in Table I. Finally, all the poles and zeros of and are depicted in Fig. 4 in a polezero diagram. By inspecting the diagram, it is easy to verify that all the assumptions for the poles and zeros in the synthesis method, summarized in Section IIIC, are indeed satisfied. The last step necessary to calculate the coupling coefficient required to implement the target frequency response is to get the value for with . To do it, a linear system of equations is built by applying (27) for each of the poles, . The solution for the linear system (with equations and unknowns in our example) can be easily obtained with very low computational cost by using wellknown numerical methods like Gaussian elimination with partial pivoting [64]. The solutions
ARNEDO et al.: SYNTHESIS OF MICROWAVE FILTERS BY INVERSE SCATTERING
Fig. 4. Polezero diagram. The poles of and , are depicted are depicted as “o” with a thin line, and the zeros as “x”, the zeros of are depicted as “o” with a thick line. of
Fig. 5. Coupling coefficient calculated by the synthesis method (thin solid line) and actual value obtained after the tapering process (thick solid line). is shifted 35 mm to the right due to the To ease the comparison, the first uniform waveguide section that will be added at the beginning of the device during the tapering process.
obtained for the unknowns allow us to finally calculate the coupling coefficient by using the analytical closedform expression deduced in Section III, (28). The result is depicted in Fig. 5 via a thin solid line. In order to implement the synthesized coupling coefficient in rectangular waveguide technology, the procedure explained in Section IVA will be followed. Specifically, the width of the rectangular waveguide will be kept constant along the device and a symmetric perturbation for the height will be applied, giving rise to the convenient expression for the coupling coefficient previously obtained (31). From that expression, an analytical solution can be readily obtained for the evolution of the waveguide height , necessary to implement the synthesized coupling coefficient (34) . where it is assumed that the device begins at Standard WR90 ports will be used, fixing the ports dimensions to mm and mm. The profile for the resulting synthesized waveguide device is given in Fig. 6 via a thin solid line. As it has been discussed in Section IVA, the synthesis method assumes singlemode operation along the device, and
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Fig. 6. Initial rectangular waveguide profile (thin solid line), intermediate profile obtained by multiplying the height by 0.3 (dotted line), and final profile obtained after the tapering process (thick solid line). To ease the comparison between the different profiles, the uniform section with length 35 mm is added at the beginning of the initial and intermediate profiles.
for our case of excitation with the fundamental mode and symmetrical variations of the waveguide height, just the and higher order modes with can be excited. Therefore, to guarantee singlemode operation, all those modes must remain cut off along the waveguide for our frequency range of interest. By inspecting the expression for the cutoff frequency in rectangular waveguide technology (33) given in Section IVA, it can be concluded that the cutoff frequency of those modes is reduced if the height of the waveguide increases. Checking the synthesized waveguide profile in Fig. 6, it can be seen that the maximum height for the device is mm, and applying (33), it can be obtained that the cutoff frequency for the higher order modes with lowest cutoff frequency that can be excited, , , is GHz, clearly within the frequency range of interest. Therefore, the initial waveguide device proposed will not satisfy the singlemode operation condition. This problem can be solved by applying a useful property of the relationship between the height of the rectangular waveguide and the coupling coefficient . Specifically, as can be easily demonstrated using (31) and (34), if is multiplied by a constant, remains identical. In our example, the height of the synthesized waveguide is multiplied by a factor equal to 0.3, keeping the coupling coefficient unaltered, but shifting the cutoff frequency of the potentially troublesome modes well beyond the frequency range of interest, and therefore guaranteeing singlemode operation. The resulting waveguide profile is depicted in Fig. 6 via a dotted line. If nonstandard ports can be used in the designed waveguide filter, then the synthesis process is successfully finished with the last waveguide profile. However, on several occasions, a specific standard port is required for the waveguide filter (in our design example, WR90). In those cases, a last step is necessary to complete the design. In order to employ the required standard ports, other useful property for the relationship between the height of the rectangular waveguide and the coupling coefficient will be exploited. In particular, if is multiplied by a tapering function , then is altered just by adding the term . This property can be readily demonstrated using (31) and (34), and allows us
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Fig. 7. (a) Magnitude and (b) phase of the parameter for the final synthesized filter. The target (thin solid line), simulated (dotted line), and measured (thick solid line) frequency responses are given.
to taper the beginning and end of the profile to achieve the standard port dimensions. If the tapering function is smooth enough, i.e., , then its effect on is negligible and the frequency response of the synthesized waveguide filter remains almost unaltered. To ease the tapering process and to keep the desired singlemode operation obtained for the dotted line structure of Fig. 6 (i.e., to maintain the maximum height of the structure small enough so as to keep the potentially troublesome modes cutoff in the frequency range of interest), in our design example, a uniform section of rectangular waveguide with a length of 35 mm has been added at the beginning of the synthesized filter, prior to multiplying by the tapering function. Using the property of “space shifting” for the relationship between and reported in [41], it can be seen that the only effect of this modification is to include a linear phase term of the form in the parameter, where mm in our example. For other designs, different extra lengths (usually small) could be required. As can be seen, a compromise between the total length of the device and the effect of the tapering over the coupling coefficient , the singlemode operation of the device, and finally over the frequency response, appears. A Hanning window has been employed in our design to generate the smooth tapering function (35)
Fig. 8. (a) Magnitude and (b) phase of the parameter for the final synthesized filter. The target (thin solid line), simulated (dotted line), and measured (thick solid line) frequency responses are given.
and it has been applied over the first 70 mm (with mm) and the last 100 mm ( ) with mm) of the filter profile. The waveguide filter obtained after the tapering process is depicted in Fig. 6 via a thick solid line, and it features the required standard ports (in our example, WR90). In spite of the important difference between the tapered and nontapered filter profiles, the coupling coefficient suffers very small variations due the tapering process, provided that the tapering function is chosen smooth enough. This fact can be clearly seen in Fig. 5, where the coupling coefficient for the final device with tapered profile is depicted via a thick solid line. The final waveguide filter has been simulated using the fullwave electromagnetic simulator CST Microwave Studio, and its frequency response is shown in Figs. 7 and 8. The target frequency response (based on a 14order rational function of the Cauer type, as explained above) is also given. The phase shown for the target response does include the linear phase terms previously discussed ( with mm for , and with mm for ). A very good agreement is achieved between the simulated and target frequency responses. The small discrepancies found can be attributed to the tapering process, to the truncation of the coupling coefficient in the implemented filter (ideally, extends along the
ARNEDO et al.: SYNTHESIS OF MICROWAVE FILTERS BY INVERSE SCATTERING
Fig. 9. Photograph of the fabricated filter prototype in rectangular waveguide technology. Standard WR90 ports are used.
full axis, although with vanishingly small values), and to the slight excitation of higher order modes. The designed waveguide filter has been fabricated in copper by electroforming. A photograph of the prototype is presented in Fig. 9. The measurements have been carried out by means of an Agilent 8722 vector network analyzer, employing proper coaxialtowaveguide transitions and calibration kits. Nonlinear tapers have been used to avoid the mismatch between the higher frequency coaxialtowaveguide transitions (WR62 and WR42) and the filter ports (WR90) in order to ensure excitation with the fundamental mode, as intended. The measurement results are shown in Figs. 7 and 8. Again, a very good agreement is achieved between the measured and simulated results. The small differences found can be attributed to the fabrication tolerances, losses, and slight excitation of higher order modes, which can be slightly excited, although in evanescent form, for the highest frequencies in the regions of the waveguide filter with larger heights. As can be seen the target, simulated and measured frequency responses are in very good agreement, satisfying the frequency requirements set at the beginning of this section, and confirming the accuracy and flexibility of the synthesis method proposed. V. CONCLUSION A novel technique to synthesize microwave filters by inverse scattering has been proposed and successfully tested. It allows us to calculate the coupling coefficient needed for the filter by means of a closedform expression that requires just to solve a linear system of equations. The technique is easy to implement and its computational cost is extremely low, even for frequency responses with high rejections. The method is valid when the target frequency response can be expressed as a rational function. The restrictions in the positions allowed for the poles and zeros are due to fundamental physical considerations (like the requirement of stability for the frequency response) or can be easily avoided in practical applications. There is great flexibility in the frequency responses that can be implemented since the wellknown functions used for electronic or classical microwave filters (Butterworth, Chebyshev, Cauer, ) are always rational, and in any case, an arbitrary frequency specification can be always approximated by a rational function using several wellestablished procedures. Additionally, digital filter design techniques could also be used to obtain an optimum approximation. The synthesis method is exact for all the frequency range of interest, preventing the degradation of the frequency response that can be troublesome for wideband applications or to satisfy the outofband requirements of the filter. Coupledmode theory is used to model microwave propagation along the filter. The only approximations introduced are to consider singlemode operation, as well as to assume that the
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phase constant does not vary for a given frequency along the device, and that the coupling coefficient does not vary with frequency. These conditions can be fully or approximately satisfied by all the planar and nonplanar transmission lines and by many waveguides, making the synthesis technique applicable to the design of filters in a wide range of technologies. The resulting microwave filter features a continuously varying smooth profile, avoiding the presence of sharp discontinuities and their detrimental effects. To test the synthesis method, a multiband filter, with high rejection levels, has been designed, fabricated, and measured in rectangular waveguide technology. The results obtained confirm the accuracy, flexibility, and excellent performance of the method. ACKNOWLEDGMENT The authors wish to thank TAFCO Metawireless, Noain, Navarre, Spain, for its support. REFERENCES [1] D. M. Pozar, Microwave Engineering, 3rd ed. New York: Wiley, 2005. [2] R. Levy and S. B. Cohn, “A history of microwave filter research, design, and development,” IEEE Trans. Microw. Theory Tech., vol. MTT32, no. 9, pp. 1055–1067, Sep. 1984. [3] R. Levy, R. V. Snyder, and G. Matthaei, “Design of microwave filters,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 3, pp. 783–793, Mar. 2002. [4] I. C. Hunter, L. Billonet, B. Jarry, and P. Guillon, “Microwave filters—Applications and technology,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 3, pp. 794–805, Mar. 2002. [5] G. Matthaei, L. Young, and E. M. T. Jones, Microwave Filters, ImpedanceMatching Networks, and Coupling Structures. Norwood, MA: Artech House, 1980. [6] I. C. Hunter, Theory and Design of Microwave Filters, ser. Electromagn. Wave 48. London, U.K.: IEE Press, 2001. [7] J. Uher, J. Bornemann, and U. Rosenberg, Waveguide Components for Antenna Feed Systems: Theory and CAD. Norwood, MA: Artech House, 1993. [8] R. J. Cameron, C. M. Kudsia, and R. R. Mansour, Microwave Filters for Communication Systems: Fundamentals, Design and Applications. Hoboken, NJ: Wiley, 2007. [9] J. S. Hong and M. J. Lancaster, Microstrip Filters for RF/Microwave Applications. New York: Wiley, 2001. [10] J. A. G. Malherbe, Microwave Transmission Line Filters. Dedham, MA: Artech House, 1979. [11] R. W. Rhea, HF Filter Design and Computer Simulation. Tucker, GA: Noble, 1994. [12] E. A. Guillemin, Synthesis of Passive Networks. New York: Wiley, 1957. [13] P. I. Richards, “Resistortransmissionline circuits,” Proc. IRE, vol. 36, no. 2, pp. 217–220, Feb. 1948. [14] B. J. Minnis, Designing Microwave Circuits by Exact Synthesis. Norwood, MA: Artech House, 1996. [15] H. Ozaki and J. Ishii, “Synthesis of a class of stripline filters,” IRE Trans. Circuit Theory, vol. CT5, no. 2, pp. 104–109, Jun. 1958. [16] R. J. Wenzel, “Exact design of TEM microwave networks using quarterwave lines,” IEEE Trans. Microw. Theory Tech., vol. MTT12, no. 1, pp. 94–111, Jan. 1964. [17] M. C. Horton and R. J. Wenzel, “General theory and design of optimum quarterwave TEM filters,” IEEE Trans. Microw. Theory Tech., vol. MTT13, no. 5, pp. 316–327, May 1965. [18] R. Levy and I. Whiteley, “Synthesis of distributed ellipticfunction filters from lumpedconstant prototypes,” IEEE Trans. Microw. Theory Tech., vol. MTT14, no. 11, pp. 506–517, Nov. 1966. [19] R. J. Wenzel, “Synthesis of combline and capacitively loaded interdigital bandpass filters of arbitrary bandwidth,” IEEE Trans. Microw. Theory Tech., vol. MTT19, no. 8, pp. 678–686, Aug. 1971. [20] R. Levy, “Tapered corrugated waveguide lowpass filters,” IEEE Trans. Microw. Theory Tech., vol. MTT21, no. 8, pp. 526–532, Aug. 1973.
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[21] R. Levy, “A new class of distributed prototype filters with application to mixed lumped/distributed component design,” IEEE Trans. Microw. Theory Tech., vol. MTT18, no. 12, pp. 1064–1071, Dec. 1970. [22] R. Levy, “A generalized design technique for practical distributed reciprocal ladder networks,” IEEE Trans. Microw. Theory Tech., vol. MTT21, no. 8, pp. 519–526, Aug. 1973. [23] W. K. Gwarek, “Analysis of an arbitrarilyshaped planar circuitA time domain approach,” IEEE Trans. Microw. Theory Tech., vol. MTT33, no. 10, pp. 1067–1072, Oct. 1985. [24] M. D. Abouzahra and L. Lewin, “Radiation from microstrip discontinuities,” IEEE Trans. Microw. Theory Tech., vol. MTT27, no. 8, pp. 722–723, Aug. 1979. [25] M. Yu, “Powerhandling capability for RF filters,” IEEE Microw. Mag., vol. 8, pp. 88–97, Oct. 2007. [26] R. Pike and P. Sabatier, Scattering—Scattering and Inverse Scattering in Pure and Applied Science. San Diego, CA: Academic, 2002. [27] I. M. Gel’fand and B. M. Levitan, “On the determination of a differential equation by its spectral function,” Amer. Math. SOC. Transl., vol. 1, pp. 253–304, 1955. [28] V. A. Marchenko, “Reconstruction of the potential energy from the phase of scattered waves,” Dokl. Akad. Nauk. SSSR, vol. 104, pp. 635–698, 1955. [29] D. S. Heim and C. B. Sharpe, “The synthesis of nonuniform lines of finite length—Part I,” IEEE Trans. Circuit Theory, vol. CT14, no. 4, pp. 393–403, Dec. 1967. [30] M. R. Wohlers, “A realizability theory for smooth lossless transmission lines,” IEEE Trans. Circuit Theory, vol. CT13, no. 4, pp. 356–363, Dec. 1966. [31] C. B. Sharpe, An Alternative Derivation of Orlov’s Synthesis Formula for NonUniform Lines. London, U.K.: IEE Press, 1961, pp. 226–229, Monograph 483 E. [32] F. Huang, “Quasitransversal synthesis of microwave chirped filters,” Electron. Lett., vol. 28, no. 11, pp. 1062–1064, May 1992. [33] T. W. Pan, C. W. Hsue, and J. F. Huang, “Arbitrary filter design by using nonuniform transmission lines,” IEEE Microw. Guided Wave Lett., vol. 9, no. 2, pp. 60–62, Feb. 1999. [34] R. P. Moreira and L. R. A. X. Menezes, “Direct synthesis of microwave filters using inverse scattering transmissionline matrix method,” IEEE Trans. Microw. Theory Tech., vol. 48, no. 12, pp. 2271–2276, Dec. 2000. [35] P. P. Roberts and G. E. Town, “Design of microwave filters by inverse scattering,” IEEE Trans. Microw. Theory Tech., vol. 43, no. 4, pp. 739–743, Apr. 1995. [36] G. Xiao and K. Yashiro, “An efficient algorithm for solving Zakharov–Shabat inverse scattering problem,” IEEE Trans. Antennas Propag., vol. 50, no. 6, pp. 807–811, Jun. 2002. [37] G. Xiao, K. Yashiro, N. Guan, and S. Ohkawa, “A new numerical method for synthesis of arbitrarily terminated lossless nonuniform transmission lines,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 2, pp. 369–376, Feb. 2001. [38] M. Le Roy, A. Pérennec, S. Toutain, and L. C. Calvez, “The continuously varying transmissionline technique—Application to filter design,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 9, pp. 1680–1687, Sep. 1999. [39] M. Norgren, “Chebyshev collocation and Newtontype optimization methods for the inverse problem on nonuniform transmission lines,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 5, pp. 1561–1568, May 2005. [40] P. Miazga, “A new method of computer aided design of nonuniform transmission line filters and impedance matching circuits,” in Proc. Asia–Pacific Microw. Conf., Yokohama, Japan, Dec. 1998, pp. 181–183. [41] I. Arnedo, M. A. G. Laso, F. Falcone, D. Benito, and T. Lopetegi, “A series solution for the singlemode synthesis problem based on the coupled mode theory,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 2, pp. 457–466, Feb. 2008. [42] M. Chudzik, I. Arnedo, I. Arregui, A. Lujambio, M. A. G. Laso, D. Benito, and T. Lopetegi, “Novel synthesis technique for microwave circuits based on inverse scattering: Efficient algorithm implementation and application,” Int. J. RF Microw. Comput.Aided Eng., vol. 21, no. 2, pp. 164–173, Mar. 2011. [43] I. Kay, “The inverse scattering problem when the refection coefficient is a rational function,” Commun. Pure Appl. Math., vol. 13, no. 3, pp. 371–393, 1960. [44] H. H. Szu, C. E. Carroll, C. C. Yang, and S. Ahn, “A new functional equation in the plasma inverse problem and its analytical properties,” J. Math. Phys., vol. 17, no. 7, pp. 1236–1247, Jul. 1976.
[45] G. H. Song and S. Y. Shin, “Inverse scattering problem for the coupledwave equations when the reflection coefficient is a rational function,” Proc. IEEE, vol. 71, no. 2, pp. 266–268, Feb. 1983. [46] G. H. Song and S. Y. Shin, “Design of corrugated waveguide filters by the Gel’fand–Levitan–Marchenko inversescattering method,” J. Opt. Soc. Amer. A, Opt. Image Sci., vol. 2, no. 11, pp. 1905–1915, Nov. 1985. [47] W.K. Chen, The Circuits and Filters Handbook. London, U.K.: CRC, 1995. [48] R. Schaumann and M. E. Van Valkenburg, Design of Analog Filters. New York: Oxford Univ. Press, 2001. [49] C. Charalambous, “A unified review of optimization,” IEEE Trans. Microw. Theory Tech., vol. MTT22, no. 3, pp. 289–300, Mar. 1974. [50] I. Arnedo, A. Lujambio, T. Lopetegi, and M. A. G. Laso, “Design of microwave filters with arbitrary frequency response based on digital methods,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 9, pp. 634–636, Sep. 2007. [51] H. Chi, F. Zeng, and J. Yao, “Photonic generation of microwave signals based on pulse shaping,” IEEE Photon. Technol. Lett., vol. 19, no. 9, pp. 668–670, May 2007. [52] I. Arnedo, J. D. Schwartz, M. A. G. Laso, T. Lopetegi, D. V. Plant, and J. Azaña, “Passive microwave planar circuits for arbitrary UWB pulse shaping,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 7, pp. 452–454, Jul. 2008. [53] G. L. Turin, “An introduction to matched filters,” IRE Trans. Inf. Theory, vol. IT6, no. 3, pp. 311–329, Jun. 1960. [54] Y. Park, J. Azaña, and R. Slav´ık, “Ultrafast alloptical first and higherorder differentiators based on interferometers,” Opt. Lett., vol. 32, no. 6, pp. 710–712, Mar. 2007. [55] M. A. G. Laso, T. Lopetegi, M. J. Erro, D. Benito, M. J. Garde, M. A. Muriel, M. Sorolla, and M. Guglielmi, “Realtime spectrum analysis in microstrip technology,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 3, pp. 705–717, Mar. 2003. [56] B. Z. Katsenelenbaum, L. Mercader, M. Pereyaslavets, M. Sorolla, and M. Thumm, Theory of Nonuniform Waveguides—The Cross Section Method, ser. IEE Electromagn. Waves 44. London, U.K.: IEE Press, 1998. [57] F. Sporleder and H. G. Unger, Waveguide Tapers, Transitions and Couplers. London, U.K.: Peregrinus, 1979. [58] V. V. Shevchenko, Continuous Transitions in Open Waveguides—Introduction to the Theory. Boulder, CO: Golem Press, 1971. [59] T. Rozzi and M. Mongiardo, Open Electromagnetic Waveguides, ser. IEE Electromagn. Waves 43. London, U.K.: IEE Press, 1997. [60] R. E. Collin, Foundations for Microwave Engineering, 2nd ed. New York: McGrawHill, 1992. [61] M. J. Erro, I. Arnedo, M. A. G. Laso, T. Lopetegi, and M. A. Muriel, “Phasereconstruction in photonic crystals from Sparameter magnitude in microstrip technology,” Opt. Quantum Electron., vol. 39, no. 4–6, pp. 321–331, Jun. 2007. [62] E. Brinkmeyer, “Simple algorithm for reconstructing fiber gratings from reflectometric data,” Opt. Lett., vol. 20, no. 8, pp. 810–812, Apr. 1995. [63] L. Poladian, “Groupdelay reconstruction for fiber Bragg gratings in reflection and transmission,” Opt. Lett., vol. 22, no. 20, pp. 1571–1573, Oct. 1997. [64] G. H. Golub and C. F. Van Loan, Matrix Computations, 3rd ed. Baltimore, MD: The Johns Hopkins Univ. Press, 1996.
Israel Arnedo (S’05–M’11) was born in Tudela (Navarre), Spain, in 1980. He received the Telecommunication Engineering, M.Sc., and Ph.D. degrees from the Public University of Navarre, Pamplona, Spain, in 2004, 2007, and 2010, respectively. He is currently an Assistant Professor with the Electrical and Electronic Engineering Department, Public University of Navarre, where he has collaborated in research projects supported by the Spanish Government, the Natural Sciences and Engineering Research Council of Canada (NSERC), and the European Commission. He is cofounder of the spinoff company TAFCO Metawireless. He is a Reviewer for several international scientific journals. His research interests of the microwave, millimeterwave, and terahertz fields include periodic structure devices, coupledmode theory, inversescattering synthesis, and their applications in ultrawideband (UWB) systems, space and satellite technology, and biomedical engineering research.
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Dr. Arnedo was the recipient of a Formación de Profesorado Universitario (FPU) grant of the Spanish Ministry of Education and Science to support his doctoral research.
Ivan Arregui (S’08–M’12) received the Telecommunication Engineering degree and M.Sc. degree from the Public University of Navarre, Pamplona, Spain, in 2005 and 2008, respectively, and is currently working toward the Ph.D. degree at the Public University of Navarre. He is currently an Assistant Professor with the Electrical and Electronic Engineering Department, Public University of Navarre. He is cofounder of the spinoff company TAFCO Metawireless. He is a Reviewer for several international scientific journals. His research interests include periodic structure devices, numerical techniques for inversescattering synthesis, and design of passive components for communications satellites. Mr. Arregui is a member of the IEEE Microwave Theory and Techniques Society (IEEE MTTS). He was the recipient of a grant from the Spanish Ministry of Science and Innovation.
Aintzane Lujambio (S’09) was born in San Sebastián (Guipúzcoa), Spain, in 1982. She received the Telecommunication Engineering and M.Sc. degrees from the Public University of Navarre, Pamplona, Spain, in 2006 and 2010, respectively, and is currently working toward the Ph.D. degree in electrical and electronic engineering at the Public University of Navarre. She has collaborated in research projects supported by the Spanish Government and the European Commission. Her research interests include algorithms for microwave filter design, inversescattering synthesis methods, and UWB systems.
Magdalena Chudzik (S’08) was born in Warsaw, Poland, in 1984. She received the B.Sc. and M.Sc. degrees in electrical and computer engineering from the Warsaw University of Technology, Warsaw, Poland, in 2007 and 2009, respectively, and is currently working toward the Ph.D. degree in electrical and electronic engineering at the Public University of Navarre, Pamplona, Spain. Her research interests include coupledmode theory, periodic structure devices, and passive devices in microwave, millimeterwave, and terahertz technologies. Mrs. Chudzik was the recipient of a Formación de Profesorado Universitario (FPU) Grant of the Spanish Ministry of Education and Science to support her doctoral research.
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Miguel A. G. Laso (S’99–M’03) received the M.Sc. and Ph.D. degrees in telecommunications engineering from the Public University of Navarre, Pamplona, Spain, in 1997 and 2002, respectively. From 1998 to 2001, he was with the Electrical and Electronic Engineering Department, Public University of Navarre, as a Doctoral Fellow. From 2001 to 2006, he was an Assistant Professor, and since 2006, an Associate Professor with the Public University of Navarre, involved with teaching and research duties in optical communications and microwave engineering. From 2002 to 2003, he was also a Research Fellow with the Payload Systems Division, European Space Research and Technology Centre (ESTEC), European Space Agency (ESA), Noordwijk, The Netherlands. He has authored or coauthored numerous papers and contributed to major conferences. He is also cofounder of TAFCO Metawireless, a spinoff company of the Public University of Navarre. He has also led projects with public and private funding. His current research interests comprise periodic structures, photonic/electromagneticbandgap structures, inversescattering problems, and synthesis techniques for filters, especially in the microwave and millimeterwave frequency range, and their applications for telecommunications. Dr. Laso is a member of several professional and scientific international associations including the Optical Society of America (OSA), International Society for Optics and Photonics (SPIE), and American Society for Engineering Education (ASEE). He was the recipient of a grant from the Spanish Ministry of Education and Science to support his doctoral research at the Public University of Navarre (1998–2001), and another to support his postdoctoral research at the ESA (2002–2003). He was the recipient of several awards including the Spanish National Prize to the Best Doctoral Dissertation in Telecommunications (2002), awarded by the Spanish Telecommunications Engineers Association (COIT/AEIT) and the Junior Research Award of the Public University of Navarre (2003). He was also the recipient of the 2005 Spanish National Prize for the Best Project in Innovation in Higher Education, awarded by the Spanish Ministry of Education and Science.
Txema Lopetegi (S’99–M’03) was born in Pamplona, Navarre, Spain, in 1973. He received the M.Sc. and Ph.D. degrees in telecommunication engineering from the Public University of Navarre, Pamplona, Spain, in 1997 and 2002, respectively. Since 1997, he has been with the Electrical and Electronic Engineering Department, Public University of Navarre, initially as an Assistant Professor, and since 2006, as an Associate Professor. During 2002 and 2003, he was with the Payload Systems Division, European Space Research and Technology Center (ESTEC), European Space Agency (ESA), Noordwijk, The Netherlands, as PostDoctoral Researcher. He is also cofounder of the spinoff company TAFCO Metawireless. His current research interests include metamaterials and synthesized structures in microwave and terahertz technologies, as well as coupledmode theory and synthesis techniques using inverse scattering. Dr. Lopetegi was the recipient of a grant from the Spanish Ministry of Education to support the research in his doctoral thesis in 1999 and 2000.
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Switchless Tunable BandstoptoAllPass Reconfigurable Filter Eric J. Naglich, Student Member, IEEE, Juseop Lee, Member, IEEE, Dimitrios Peroulis, Member, IEEE, and William J. Chappell, Senior Member, IEEE
Abstract—The theory of a new type of bandstoptoallpass reconfigurable filter is developed in this work. A bandstop filter structure with both sourcetoload and interresonator coupling is implemented. The synthesis equations are manipulated such that the signals in the filter’s resonators and sourcetoload transmission line can be made to constructively or destructively interfere at the output port through tuning of the resonant frequency of the filter’s resonators. The relationship between resonator quality factor, filter bandwidth, and the allpass response state is shown for the first time. The theory is proven through fabrication of a bandstoptoallpass filter with resonator unloaded quality factors greater than 500. Measured results show that the filter can continuously tune from insertion loss of 2.1 dB in the allpass state to insertion loss of 69 dB in the bandstop state at the center frequency of the filter. Analog tuning of the attenuation level is also shown. The capability to switch from an allpass to a variableattenuation bandstop response enables a spectrally aware system to operate over wide bandwidths when interference levels are low and to dynamically add bandstop responses when interference affects its performance or signal equalization is required. Index Terms—Filters, microwave filters, passive filters, tunable filters, tunable resonators.
I. INTRODUCTION
M
OST past and current microwave front ends are primarily designed with bandpass filters for protection from generating or receiving unwanted interference [1]. One reason for the ubiquity of bandpass filters is that most microwave systems are unaware of the spectrum in which they are operating. This creates a need for a fearbased frontend architecture that attenuates all frequencies except the band of interest. However, a frontend architecture based on bandpass
Manuscript received August 04, 2011; revised February 07, 2012; accepted February 14, 2012. Date of publication April 03, 2012; date of current version April 27, 2012. The work of E. J. Naglich was supported by the Department of Defense (DoD) through the National Defense Science and Engineering Graduate Fellowship (NDSEG) Program. This work was supported by the Defense Advanced Research Projects Agency through the Purdue EvanescentMode Cavity Filter Study Program. E. J. Naglich and W. J. Chappell are with the IDEAS Microwave Laboratory, Department of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907 USA (email: [email protected]; chappell@purdue. edu). J. Lee was with the IDEAS Microwave Laboratory, Department of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907 USA. He is now with the Department of Computer and Communications Engineering, Korea University, Seoul 136701, Korea (email: ifsnow@ieee.) D. Peroulis is with the Adaptive Radio Electronics and Sensors (ARES) Group, Department of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907 USA (email: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2188723
filters can result in significant insertion loss in the frequency band of interest, limiting system performance. For a given resonator quality factor ( ), there is a tradeoff between bandpass filter bandwidth, order, and passband insertion loss [2]. Therefore, the greater the protection from generating or receiving interference in adjacent frequency bands, the higher the insertion loss in the band of interest. A microwave system that is cognizant of the spectrum in which it is operating [3] would not need to operate in the fearbased mode of operation described above. In fact, it could use no filtering if there was not strong interference present. This would have the benefits of lower insertion loss than bandpasscentric front ends and much greater operating frequency flexibility. For example, a bandpasscentric system would need to switch between static filters in a bank [4], [5] or employ a tunable filter [6]–[9] to change operating frequencies. These methods involve a further increase in insertion loss due to the switch or a time delay due to filter tuning and shape adjustment, respectively. A front end without filtering has neither of these issues. In the event that interference became a concern, the spectrally aware system would know its frequency and could place a tunable bandstop filter [10]–[13] in its frontend frequency response to attenuate it. Employing tunable bandstop filters in spectrally aware systems minimizes insertion loss in the band of interest and maximizes the frequency range in which the system can instantaneously operate. Wideband systems [14] and systems with highly linear lownoise amplifiers (LNAs) [15] could benefit most from such an interference mitigation strategy. Allowing a receiver to take advantage of the benefits of a bandstop filtercentric front end while dynamically allowing for a mode of operation which allows signals at all frequencies to be received in lowpower environments is the motivation of this work. One way to have an open frontend frequency response in which bandstop filters can be added to on demand is to use bandstop filters that have a mode of operation that allows all frequencies to pass. This concept is shown in Fig. 1. Bandstop filters with this capability were shown in [16], [17], and [18]. However, the work in [16] uses superconducting structures and switches, which are not practical in some situations due to large volume and power requirements. The work in [17] also used switches in order to selectively add a parallel bandpass filter to the circuit which had a passband over the same frequency range as the stopband of the bandstop filter. The work in [18] achieves the desired effect without using switches for singlebandstop resonators which are twicecoupled to a through transmission line. Multipole filters are demonstrated in [18] by cascading the singleresonator structures. While the method in [18] achieves superior allpass state insertion loss, it requires the use of long
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Fig. 2. Coupling routing diagram. .
Fig. 1. Concept and benefits of a bandstoptoallpass filter.
transmission lines and two tuning elements with each resonator. This paper presents the theory and measurement of switchless secondorder bandstop filters that use seriescoupled resonators to achieve bandstoptoallpass operation and attenuation level tuning, as well as the effect of finite resonator values on the allpass response. In contrast to [18], the filter theory presented in this paper does not require coupling over large phase lengths of distributed resonators and can achieve a bandstoptoallpass response using a single tuning element per resonator. However, as noted above, the method in [18] produces less allpass state insertion loss. This tradeoff between tuning complexity and allpass state insertion loss makes both methods valuable. The measured filter was implemented with tunable highly loaded coaxial cavity resonators. These resonators have been used extensively by the authors and others to implement bandpass [19]–[21] and bandstop [22], [23] filters. However, it is important to note that the filter theory presented in this paper is applicable to filters using any type of tunable bandstop resonator.
In [24], it was shown that a Butterworth bandstop filter response can be obtained from a structure with the coupling relationships in Fig. 2 if the correct relationship between and is maintained and and have the same sign. After substituting a value of positive one for to represent coupling through a sourcetoload inverter, the coupling relationships in (1) produce the transmission response
(2) where is the normalized frequency variable and is equal to , where is the square root of and is radian frequency. In [24], the transmission response in (2) was set equal to zero at a normalized frequency of zero to solve for the required relationship between and to produce a Butterworth bandstop response. If (2) is set equal to one, a solution exists not only at a normalized frequency of zero, but also at all frequencies if the resonators are synchronously tuned. In (1), synchronously tuned resonators are represented by an value of zero. One set of solutions that results from setting (2) equal to one at all frequencies is
II. BANDSTOPTOALLPASS FILTER THEORY
(3)
A. Bandstop and AllPass State Responses For the filters described in this paper, both external coupling values will be equal to each other, the resonator selfcoupling values will have the same magnitude but opposite sign, and symmetries such as the sourcetoload coupling being the same as the loadtosource coupling can be taken advantage of to simplify the generalized secondorder filter coupling matrix to
(1)
where the subscripts 0 and 3 correspond to the source and load, respectively, and the subscripts 1 and 2 correspond to the first and second resonator, respectively. Equation (1) corresponds to the coupling routing diagram shown in Fig. 2.
and With the relationship between transmission response in (2) becomes
in (3) in place, the
(4) if which has a magnitude of one for all values of is zero. In other words, the magnitude of the numerator in (4) equals the magnitude of the denominator in (4) for all frequencies if the resonators are synchronously tuned. This is the allpass state of the bandstoptoallpass filter. However, the magnitude of (4) is not equal to one at all frequencies if is set to a value other than zero. In addition, if (4) is set equal to zero at a normalized frequency of zero, there is a solution for . The solution is (5)
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which yields the bandstop state of the bandstoptoallpass filter. In order for the bandstop state of the bandstoptoallpass filter to have the correct bandwidth in the normalized frequency domain, should be set to a specific value for the desired filter shape. Any desired filter shape can be implemented since can be arbitrary in the allpass state of the filter according to (3). Therefore, setting to correctly implement the bandstop filter state has no effect on the allpass filter state. In summary, if the relationship between and is designed correctly in a tunable secondorder bandstop filter, the filter response can be switched between bandstop and allpass states by merely tuning the resonant frequencies of the resonators so that varies between zero and the value in (5). Frequencyscaled versions of the ideal synthesized bandstop and allpass state responses according to the theory above can be seen in Fig. 1, where a secondorder Butterworth response shape was chosen for the bandstop state of the filter. A secondorder Butterworth bandstop filter requires an of 1.189 [25]. B. Variable Attenuation and Bandwidth If is set to a value other than zero or the value in (5), other states of the filter are possible. If is varied between zero and the value in (5), a bandstop filter response with variable bandwidth and attenuation results. This response could be useful in applications that require signal equalization. Additionally, if several filters of this type with different frequency tuning ranges were cascaded, the cascade could be dynamically reconfigured to provide frequency equalization, selective attenuation, or an allpass response over very wide frequency ranges. If is increased beyond the value in (5), a variable attenuation and bandwidth equiripple shape is achieved. The equiripple shape offers a wider bandwidth for a given level of attenuation than the Butterworth response, and the response can be tuned between these two states dynamically if tunable resonators are used. This greatly increases the flexibility of the filter. Example synthesized transmission responses and the associated values can be seen in Fig. 3. The inset shows that the 10dB bandwidth of the transmission response varies almost linearly with the scaling factor of relative to the value in (5) over the range shown. III. EFFECT OF FILTER BANDWIDTH AND FINITE UNLOADED QUALITY FACTOR ON ALLPASS STATE RESPONSE The bandstoptoallpass capability described in the previous section results from changing the value of the selfcoupling in the coupling matrix. Physically, this adjusts the phase response of the resonators by tuning along the reactance slope of their resonances. These changes in phase tune the interference between the filter’s two sourcetoload signals paths between constructive and destructive interference at the output port. The two signal paths can be seen in Fig. 2. In the ideal synthesis described in Section II, there was no loss in either of the sourcetoload signal paths. Therefore, both perfect constructive and destructive interference were achieved in the synthesis equations. However, loss will exist in both signal paths in a fabricated filter, and the loss of each of the signal paths will not be equal in most real implementations. Different losses in the
Fig. 3. Synthesized bandstop state response shapes as is varied from the value in (5) by a scaling factor. Inset shows fraction of 10dB bandwidth relative equals the value in (5)) versus to the ideal Butterworth case (when scaling factor relative to the value in (5).
two sourcetoload signal paths will have two main effects on a bandstoptoallpass filter’s response. First, in the bandstop state, the filter will not produce infinite attenuation. This is the case for any real bandstop filter. Second, in the allpass state, the signals from the two sourcetoload paths will not perfectly reproduce the input signal at the output port. This lack of perfect signal reconstruction results in an unwanted allpass state difference in passband insertion loss at the resonant frequency of the filter relative to nonresonant frequencies that is proportional to the difference in losses between the two sourcetoload signal paths. The effect of imperfect signal reconstruction at the output port can be analyzed using a modification to (1). If the coupling mechanism that implements in Fig. 2 is assumed to be lossless, a difference in loss between the two sourcetoload signal paths can be completely modeled by assigning a finite resonator unloaded . A finite resonator unloaded can be added to (1) as
(6)
is resonatorunloaded and is the 3dB fractional where and are, the closer the response of bandwidth. The larger (6) will become to the ideal response of (1). Although this analysis uses a lossless coupling mechanism for , it approxiis frequently implemented with mates reality well because a lowloss transmission line in bandstop filters. While (6) shows that and/or can be increased in order to improve the allpass state response of a bandstoptoallpass filter, is usually set by specific application requirements. Similarly, specific application requirements will require a maximum allpass state insertion loss, which dictates the needed. The secondorder Butterworth filter equation of the required for
NAGLICH et al.: SWITCHLESS TUNABLE BANDSTOPTOALLPASS RECONFIGURABLE FILTER
Fig. 4. Synthesized allpass state responses for a 2% fractional bandwidth bandstop filter for various unloaded values. In all responses, the return loss dB). is 0 (
a specified and a desired level of allpass state insertion loss can be derived from (6), and it is (7)
is the insertion loss at in linear scale. For where example, if is required to be 2%, (6) produces the normalized frequencydomain allpass state transmission responses in Fig. 4 as is varied. Note that all of the responses in Fig. 4 have a theoretically perfect impedance match to the ports of the system. Fig. 4 shows that, with very high values, the response approaches the ideal lossless case described in Section II. As is lowered, the allpass state has more and more insertion loss until a special case is reached. This special case is an absorptive bandstop filter [26]–[28], which has theoretically infinite attenuation in its stopband and is perfectly impedance matched at all frequencies. The high examples are shown with solid traces in Fig. 4, while the absorptive case is designated by a dashed trace. The dotted trace in Fig. 4 shows an example of the wide, shallow response that occurs when is below the value that produces the absorptive response. The responses in Fig. 4 demonstrate that in order to implement a bandstoptoallpass filter with the best allpass state for a given , high tunable resonators are required. Finally, while this paper presents theory for a twopole bandstop filter, the analysis for higherorder filters is similar. It is important to note that the allpass state insertion loss due to finiteresonators described above accumulates for higher order filters. IV. FILTER DESIGN AND FABRICATION Evanescentmode cavity resonators have been shown to have wide tuning ranges while retaining high values [19], [20], [29]. These traits make them very well suited for use in realizations of bandstoptoallpass filters. In order to verify the
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Fig. 5. Simulation model of the fabricated bandstoptoallpass filter.
theory in Sections II and III, an evanescentmode cavity based, secondorder filter was designed and fabricated. A model of the filter with dimensional annotations can be seen in Fig. 5. The filter includes three copper layers and two dielectric layers. The top copper layer in Fig. 5 is the sourcetoload transmission line. In this implementation, a 270 transmission line at 3 GHz was chosen in order to match the sign of its coupling to the sign of the interresonator coupling as required by (1). The interresonator coupling and its sign will be explained further below. The sourcetoload transmission line also employs capacitive patches to improve impedance matching in the filter’s upper passband as described in [23]. The top dielectric layer of the filter structure is a 0.762mmthick sheet of Rogers 4350B material ( @ 10 GHz) that has rectangles cut out of it to facilitate grounding of the input and output connectors. The second copper layer of the structure is the ground plane for the sourcetoload transmission line. This copper layer also contains coupling apertures that couple the mode of the sourcetoload transmission line to the mode of the cavity resonators. These coupling apertures were sized and optimized in simulation to produce the correct amount of coupling for a 2.5% fractional bandwidth Butterworth response [30]. The second dielectric layer of the structure is a 3.175mmthick sheet of Rogers TMM3 material ( @ 10 GHz) that contains the evanescentmode cavity resonators. The two dielectric layers of the structure were bonded together using DuPont Pyralux LFO100 adhesive. The cavity walls are formed by 0.8mmdiameter copperplated vias, and the cavity diameter is 13.6 mm from the center of one via to the center of the opposite via. The cavities have copperplated loading posts that are 1.94 mm in diameter and 1.5 mm tall. These loading posts are supported on a copper platform that is connected to the top of the cavity in Fig. 5 by four plated vias. The inset in Fig. 5 shows the geometry of the loading posts inverted with respect to their orientation in the full structure shown in Fig. 5 for clarity.
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Fig. 6. Top and bottom views of the fabricated bandstoptoallpass filter.
Interresonator coupling is implemented through an iris between the two cavities. The iris was designed in simulation to produce the correct value according to (5) [31]. Iris coupling, which is predominantly magnetic field coupling, was chosen because of the field distribution in evanescentmode cavities. Since most of the electric field in the cavity is concentrated in the gap above the loading post, the magnetic field is much more accessible. The interresonator coupling can be modeled as an inductive T network that has an insertion phase that approaches 90 . This requires a 270 electrical length sourcetoload transmission line in order to properly implement (1) and have the same sign coupling for both and . However, evanescentmode cavity compatible interresonator coupling structures that provide the opposite sign coupling compared with the iris implemented in this work exist [32]. The third copper layer of the structure is a thin copper membrane that is laminated to the TMM3 layer everywhere except within the boundaries of the cavity walls. This allows the thin copper membrane to flex above the loading posts. Attached to the side of the flexible copper membranes external to the cavity using silver epoxy are 0.38mmthick, 1/2indiameter piezoelectric actuators from Piezo Systems, Inc. The piezoelectric actuators allow electronic control of the gaps between the loading posts in the resonators and the flexible copper membrane, which changes the resonant frequency of each resonator. Images of the fabricated filter can be seen in Fig. 6. Fig. 6 clearly shows the positioning of the piezoelectric actuators. V. MEASURED RESULTS The response of the fabricated bandstoptoallpass filter was measured using an Agilent Technologies N5230C PNA. Bias voltages were applied to the piezoelectric actuators using Keithley 2400 Sourcemeters. The final structure was simulated using Ansoft HFSS. Measured results of the bandstop and allpass states of the fabricated filter can be seen in Fig. 7. Fig. 7 shows a 2.1dB insertion loss in the allpass state at
Fig. 7. Measured bandstop and allpass states of the fabricated bandstoptoallpass filter.
Fig. 8. Measured 2.1, 10, 20, 30, and 70dB attenuation states of the fabricated bandstoptoallpass filter.
3.05 GHz. When the resonators are tuned away from 3.05 GHz, the response has insertion loss of 0.4 dB. Therefore, the allpass state resonances provide an additional insertion loss of 1.7 dB at 3.05 GHz in the allpass state. A 15dB or greater return loss is maintained from 1 to 4.25 GHz, and the response approximates a through transmission line. In the bandstop state, attenuation of 69 dB is shown, and the 3dB fractional bandwidth is 2.7%. According to the theory in Section III, this fractional bandwidth and allpass level of attenuation corresponds to a resonator of 540, which is in line with ’s of previously reported, similarly sized evanescentmode cavity resonators [29]. The response is also able to be tuned to any attenuation level between 2.1 and 69 dB shown in Fig. 7 by tuning the resonant frequencies of the resonators. For example, tuning to the value in (5) results in the 69dB attenuation response. Fig. 8 shows the 2.1, 10, 20, 30, and 70dB attenuation responses of the fabricated
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Fig. 10. Several measured response states of a single filter tuning from 2.75 to 3.1 GHz. Less than 4, 10, 20, 30, 40, 50, 60, and 70dB attenuation states are shown. Note that the center frequency of the filter is continuously tunable over the entire range.
Fig. 9. Measured versus simulated parameters for the bandstoptoallpass filter. (a) Allpass state. (b) Bandstop state.
filter. This functionality would be useful in applications that require signal equalization. Measured versus simulated and responses can be seen in Fig. 9. In the allpass state, the measured insertion loss at the resonant frequency of the resonators is 2.1 dB versus a simulated value of 1.8 dB. This difference is due to the lower quality factor of the fabricated resonators compared to the simulated resonators which can result from copper surface roughness and oxidation. Connector losses also contribute to the difference in insertion losses. The measured filter’s upper passband starts to degrade at lower frequencies compared with the simulated filter. The degradation is the result of an impedance mismatch caused by the coupling apertures in the ground plane of the sourcetoload transmission line. Imperfections in the size of the coupling apertures or the capacitive matching patches in the feeding microstrip transmission line relative to the simulated geometry produce lower frequency passband degradation like what is shown in Fig. 9(a). However, the measured performance matches the simulated performance well in the band of interest. In the bandstop filter state shown in Fig. 9(b), the measured 3dB
fractional bandwidth is 2.7% versus a simulated value of 2.5%. This difference supports the theory above that the coupling apertures may have been fabricated to be a slightly incorrect size. In addition, the measured reflection zeros are not at the same frequencies at which they appear in the simulated response, further supporting an unmodeled impedance mismatch at either the coupling slots or the connectortomicrostrip transition. While fabrication process limitations resulted in 50 to 200 m of inaccuracy, the shape and attenuation levels of the measured bandstop response still match simulated results well and prove the bandstoptoallpass concept. Standard professional fabrication facilities would be able to reduce these inaccuracies greatly. The lowest measured allpass state insertion loss, 2.1 dB, was achieved at 3.05 GHz. However, the allpass response, as well as the variable attenuation capability shown in Fig. 8, can be continuously tuned over the range of 2.75 to 3.1 GHz with insertion loss less than 4 dB in the allpass state. Fig. 10 shows measurements of many of the possible response shapes in this band. The filter is continuously tunable in both frequency and attenuation from 2.75 to 3.1 GHz and from 2.1 to 70 dB, respectively. In addition to the many shapes shown in Fig. 10, equiripple responses were also measured. In Fig. 11, 10 and 20dB equiripple responses can be seen. These responses were obtained through tuning beyond the value in (5), and a larger resulted in a wider bandwidth response. Such equiripple responses can be achieved by many tunable bandstop filters when the resonances are slightly offset from each other in frequency, and they are not a unique aspect of the bandstoptoallpass filter. The equiripple responses result from interaction of the edges of the stopbands of the resonances. The 3dB fractional bandwidth of the 3.05GHz 10dB equiripple response is 3.8%, and that of the 3.05GHz 20dB equiripple response is 3.1%. Since these responses are wider than the responses shown above, this capability allows a dynamic tradeoff between filter bandwidth and level of attenuation. The measured responses in Figs. 7–11 are comparable to the theoretical responses in Figs. 3
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REFERENCES
Fig. 11. Measured 10 and 20dB equiripple responses. The capability to provide this response shape allows a tradeoff between attenuation level and bandwidth.
and 4, proving the effect of finite resonator and tuning of for the bandstoptoallpass filter theory presented in this work. It is important to note that changing between allpass, Butterworth bandstop, and equiripple bandstop filter shapes requires only very slight frequency tuning of the resonators. Subject to the tuning speed of the resonators used in a particular implementation of a bandstoptoallpass filter, the filter shape could be reoptimized very quickly should the spectrum or signals of interest change. VI. CONCLUSION An electronically reconfigurable bandstoptoallpass filter was shown that can provide numerous response shapes for spectrally aware systems. The theory of such a filter was developed through the use of coupling matrices such that only the resonator center frequencies need to be tuned in order to achieve bandstoptoallpass reconfiguration. In the filter’s bandstop state, 70 dB of attenuation was measured with a 3dB bandwidth of 2.7%. The attenuation level was able to be continuously varied over a very wide range, and equiripple responses were also demonstrated. In the filter’s allpass state, the filter had 0.140.74 dB of passband insertion loss from 1 to 4.25 GHz and an insertion loss of 2.1 dB at the filter’s center frequency. Applications of a bandstoptoallpass reconfigurable filter are envisioned to include wide operating bandwidth, cognitive systems. With bandstoptoallpass filters, a system could configure its front end response to the allpass state when interference was limited, reducing insertion loss compared to bandpass filter front end designs. When interference started to affect performance, the system could place bandstop responses in its front end response at the frequencies of the interference. In addition, a cascade of bandstoptoallpass filters could provide the functionality described in this paper over multioctave frequency ranges. The filtering capability and flexibility provided by bandstoptoallpass filters enables new highfrequency front end strategies featuring very low passband insertion loss.
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[24] J. Lee, E. Naglich, and W. Chappell, “Frequency response control in frequencytunable bandstop filters,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 12, pp. 669–671, Dec. 2010. [25] E. Naglich, J. Lee, D. Peroulis, and W. Chappell, “A tunable bandpasstobandstop reconfigurable filter with independent bandwidths and tunable response shape,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 12, pp. 3770–3779, Dec. 2010. [26] D. Jachowski, “Compact, frequencyagile, absorptive bandstop filters,” in IEEE MTTS Int. Microw. Symp. Dig., Jun. 2005, pp. 513–516. [27] M. Morgan and T. Boyd, “Theoretical and experimental study of a new class of reflectionless filter,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 5, pp. 1214–1221, May 2011. [28] I. Hunter, A. Guyette, and R. Pollard, “Passive microwave receive filter networks using lowQ resonators,” IEEE Microw. MAg., vol. 6, no. 3, pp. 46–53, Sep. 2005. [29] H. Joshi, H. Sigmarsson, D. Peroulis, and W. Chappell, “Highly loaded evanescent cavities for widely tunable highQ filters,” in IEEE MTTS Int. Microw. Symp. Dig., Jun. 2007, pp. 2133–2136. [30] A. Khanna and Y. Garault, “Determination of loaded, unloaded, and external quality factors of a dielectric resonator coupled to a microstrip line,” IEEE Trans. Microw. Theory Tech., vol. MTT31, no. 3, pp. 261–264, Mar. 1983. [31] A. Atia and A. Williams, “Measurements of intercavity couplings (short papers),” IEEE Trans. Microw. Theory Tech., vol. MTT23, no. 6, pp. 519–522, Jun. 1975. [32] J. Lee, E. Naglich, H. Sigmarsson, D. Peroulis, and W. Chappell, “Tunable interresonator coupling structure with positive and negative values and its application to the fieldprogrammable filter array (FPFA),” IEEE Trans. Microw. Theory Tech., vol. 59, no. 12, pp. 3389–3400, Dec. 2011.
Eric J. Naglich (S’09) received the B.S.E.C.E. degree from Purdue University, West Lafayette, IN, in 2007, where he is currently working toward the Ph.D. degree in electrical and computer engineering under the direction of Prof. W. J. Chappell and Prof. D. Peroulis. He was with GE Healthcare from 2007 to 2009, where he was involved with electromagnetic subsystem design in medical imaging and surgical navigation machines during the Edison Engineering Development Program. His current research focuses on tunable filter synthesis and fabrication for widely tunable, adaptive RF front ends in cognitive radio and radar applications. Mr. Naglich is a member of the IEEE Microwave Theory and Techniques Society (IEEE MTTS), the president of the Purdue MTTS student chapter, and a past officer of Purdue University’s Beta chapter of Eta Kappa Nu. His paper received the second place award in the 2010 IEEE MTTS International Microwave Symposium Student Paper Competition.
Juseop Lee (A’02–M’03) received the B.E. and M.E. degrees in radio science and engineering from Korea University, Seoul, Korea, in 1997 and 1999, respectively, and the Ph.D. degree in electrical engineering from The University of Michigan, Ann Arbor, in 2009. In 1999, he joined LG Information and Communications (now LG Electronics), Korea, where his activities included design and reliability analysis of RF components for codedivision multipleaccess (CDMA) cellular systems. In 2001, he joined Electronics and Telecommunications Research Institute (ETRI), Korea, where he  and band was involved in designing passive microwave equipment for communications satellites. In 2005, he joined The University of Michigan at Ann Arbor, where he was a Research Assistant and Graduate Student Instructor with the Radiation Laboratory, and his research activities focused on millimeterwave radars and synthesis techniques for multiplepassband microwave filters. In 2009, he joined Purdue University, West Lafayette, IN, where he was a PostDoctoral Research Associate, and his activities included the design of adaptable RF systems. In 2012, he joined the Department of Computer and Communications Engineering, Korea University, Korea, Seoul, where he is currently an Assistant Professor. His research interests include
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RF and microwave components, satellite transponders, and electromagnetic theories. Dr. Lee was a recipient of the Highest Honor Award presented by Korea University, the Undergraduate Fellowship presented by Korea University, the Graduate Fellowship presented by LG Information and Communications, and the Graduate Fellowship presented by Korea Science and Engineering Foundation. He was a recipient of the Rackham Predoctoral Fellowship presented by Rackham Graduate School, The University of Michigan. He was also the recipient of the IEEE Microwave Theory and Techniques Society (IEEE MTTS) Graduate Fellowship. His coauthored paper received the second place award in the 2010 IEEE MTTS International Microwave Symposium Student Paper Competition. He is listed in Who’s Who in America.
Dimitrios Peroulis (S’99–M’04) received the Ph.D. degree in electrical engineering from The University of Michigan at Ann Arbor in 2003. He has been with Purdue University, West Lafayette, IN, since August 2003, where he is currently leading a group of graduate students on a variety of research projects in the areas of RF MEMS, sensing and powerharvesting applications, as well as RFID sensors for the health monitoring of sensitive equipment. He has been a Principal Investigator (PI) or a coPI in numerous projects funded by government agencies and industry in these areas. He is currently a key contributor in two Defense Advanced Research Projects Agency (DARPA) projects RF tunable filters in at Purdue focusing on very highquality mobile form factors (DARPA Analog Spectral Processors Program, Phases I, II and III) and on developing comprehensive characterization methods and models for understanding the viscoelasticity/creep phenomena in highpower RF MEMS devices (DARPA M/NEMS S&T Fundamentals Program, Phases I and II). Furthermore, he is leading the experimental program on the Center for the Prediction of Reliability, Integrity and Survivability of Microsystems (PRISM) funded by the National Nuclear Security Administration. In addition, he is heading the development of the MEMS technology in a U.S. Navy project (Marines) funded under the Technology Insertion Program for Savings (TIPS) program focused on harshenvironment wireless microsensors for the health monitoring of aircraft engines. He has authored or coauthored over 110 refereed journal and conference publications in the areas of microwave integrated circuits and antennas. Dr. Peroulis received the National Science Foundation CAREER award in 2008. His students have received numerous student paper awards and other student researchbased scholarships. He has also received eight teaching awards including the 2010 HKN C. Holmes MacDonald Outstanding Teaching Award and the 2010 Charles B. Murphy award, which is Purdue University’s highest undergraduate teaching honor.
William J. Chappell (S’98–M’02–SM’10) received the B.S.E.E., M.S.E.E., and Ph.D. degrees from The University of Michigan at Ann Arbor in 1998, 2000, and 2002, respectively. He is currently an Associate Professor with the School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, where he is also a Member of the Birck Nanotechnology Center and the Center for Wireless Systems and Applications. His research focus is on advanced applications of RF and microwave components. He has been involved with numerous Defense Advanced Research Projects Agency (DARPA) projects involved in advanced packaging and material processing for microwave applications. His research sponsors include HSARPA, the Office of Naval Research, the National Science Foundation, the state of Indiana, CERDEC, and ARO, as well as industry sponsors. His research group uses electromagnetic analysis, unique processing of materials, and advanced design to create novel microwave components. His specific research interests are the application of very highquality and tunable components utilizing multilayer packages. In addition, he is involved with highpower RF systems, packages, and applications. Dr. Chappell was the IEEE Microwave Theory and Techniques Society (IEEE MTTS) Administrative Committee (AdCom) secretary for 2009 and was elected to the IEEE MTTS AdCom for 2010–2012.
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Design and Diagnosis of Wideband CoupledResonator Bandpass Filters HongMing Lee, Member, IEEE, Kawthar A. Zaki, Fellow, IEEE, Ali E. Atia, Life Fellow, IEEE, and Andrew J. Piloto
Abstract—A method for circuit elements parameter extraction of wideband filters from their electromagnetic (EM) simulated response is presented. A comblinelike resonator for filter realization is introduced. Several possible electric and magnetic coupling structures are investigated. The equivalent lumped element circuit has electric and magnetic couplings modeled by capacitors and inductors instead of frequencyindependent reactance or impedance inverters. The parameter extraction method of directcoupledresonator filters is developed and is applied to symmetric canonical filters. For filters with nonadjacent spurious couplings, optimization is used to extract the lumped element parameters to reproduce the EM simulated response. Excellent agreement between the EM simulation, lumped elements extracted responses and measurements is obtained. Filter synthesis is carried out by an optimization process. Several filter designs are presented to illustrate the design procedure and validate the circuit modeling. Measured results of an eightpole filter verified the design process. Index Terms—Admittance/impedance matrix, circuit tuning, parameter extraction, wide bandpass filters.
S
I. INTRODUCTION
YNTHESIS of directcoupledresonator filters, such as Butterworth, Chebyshev [1], and multicoupledresonator (general Chebyshev) filters has been well documented [2]–[5]. These filters are described by coupling matrices in which the coupling coefficients are assumed to be frequency invariant. The model of constant coupling matrix is good in describing the physical realizations of narrow and moderatebandwidth filters. However, in a physical filter structure, it is well known that the couplings vary with frequency. Therefore, for wideband applications the model of constant coupling matrix is no longer valid and needs to be modified. The tuning process is essential in filter design and is usually accomplished by tedious manual adjustments. Developing a systematic tuning procedure can reduce design time, especially for highorder filters. Several filter diagnosis and tuning methods have been proposed and shown to be efficient for filter Manuscript received July 07, 2011; revised January 11, 2012; accepted January 12, 2012. Date of publication February 28, 2012; date of current version April 27, 2012. This work was supported in part by the National Science Council, Taiwan, under Grant NSC 992218E150050. H.M. Lee was with the Department of Electrical and Computer Engineering, University of Maryland at College Park, College Park, MD 20742 USA. He is now with the Department of Electronic Engineering, National Formosa University, Yunlin 632, Taiwan (email: [email protected]). K. A. Zaki is with the Department of Electrical and Computer Engineering, University of Maryland at College Park, College Park, MD 20742 USA. A. E. Atia is with the Orbital Sciences Corporation, Dulles, VA 20166 USA. A. J. Piloto is with Kyocera America, San Diego, CA 92123 USA. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2187064
Fig. 1. (a) Side view and (b) top view of the proposed resonator.
tuning for narrowbandwidth applications [6]–[9]. However, these methods use the constant coupling matrix model, and they will fail in element extraction or result in an extracted coupling matrix with nonexistent elements if they are applied to widebandwidth filters. It is important to have onetoone correspondence between the extracted coupling matrix and the filter physical structure for explicit dimension adjustment. In order to appropriately describe the frequencydependent couplings, the coupling structures should be modeled as capacitors and inductors instead of constant impedance inverters. Recently, research on wideband filter synthesis using frequencydependent couplings was presented in [10]–[12]. In this paper, a comblinelike resonator for realization of wideband filters in lowtemperature cofired ceramic (LTCC) technology is introduced. Several electric and magnetic coupling structures are investigated and their circuit models are presented. The parameter extraction method with closedform expressions for filters with inline couplings is introduced. The input admittance of a oneport opencircuited filter is formulated by rational functions, which are determined by the locations of zeros and poles. Recursive formulas yielding resonant frequencies and coupling coefficients are developed. This parameter extraction process is then applied to symmetric canonicalcoupledresonator filters. For filters with nonadjacent and nonnegligible spurious couplings, an optimization process for filter elements extraction is introduced [13]. To carry out filter synthesis, circuit elements are optimized to reproduce satisfactory responses. With the extracted and synthesized parameters, it is straightforward to adjust the filter physical dimensions so that the resonant frequencies and couplings approach the desired values in few iterations. Three eightpole direct and canonicalcoupled filters with 50% and 40% bandwidths are given as examples and simulated and measurements results have successfully verified the proposed wideband filter diagnosis and design method. II. RESONATOR AND COUPLING STRUCTURES The configuration of the comblinelike resonator suitable for LTCC technology is shown in Fig. 1. This resonator consists of a vertical metallic post, which is shorted at the top, and a
00189480/$31.00 © 2012 IEEE
LEE et al.: DESIGN AND DIAGNOSIS OF WIDEBAND COUPLEDRESONATOR BANDPASS FILTERS
Fig. 2. Two electric coupling structures. (a) Coupled by an additional floating conductor. (b) Directly coupled by the patches. Dielectric constant of LTCC , , , , material is 7.7. Dimensions in mil: , , , , and .
conductor patch underneath. It is known that for a combline resonator, the electric field of the fundamental resonant mode is mainly distributed under the patch and the magnetic field is circulating around the post. Two possible types of predominantly electric coupling structures are shown in Fig. 2. In Fig. 2(a), an additional floating planar conductor is placed under the patches of resonators to provide electric coupling. A conducting wall between the two resonator posts is used to prevent magnetic coupling. To achieve stronger coupling, the resonators can be directly coupled by their patches with one resonator upside down, as shown in Fig. 2(b). Two grounded conductor planes are placed in the middle and the resonator patches are in between. These two ground planes are used to enhance the capacitance between the resonator patches and ground, and therefore the size of patches will not need to increase. It should be noted that apertures slightly larger than the cross section of the resonator posts should be made on the planes so that the posts can pass through these apertures without being shorted by the middle ground. For predominantly magnetic coupling, the resonators are simply coupled by their posts. Two types of magnetic coupling structure are shown in Fig. 3. In Fig. 3(a), the resonators are arranged in the same direction, whereas those in Fig. 3(b) are in opposite direction. The amount of coupling is adjusted by the distance between the posts. In these examples and the subsequent filter realizations, the dielectric constant of LTCC tapes is 7.7 and the layer thickness is 3.94 mil. The equivalent circuit of these coupling structures is shown in Fig. 4, in which and represent the dominant and spurious coupling elements respectively for the coupling structures in Fig. 2 and inversely for those in Fig. 3. Fig. 5 shows an example of wideband circuit modeling of the electric coupling structure in Fig. 2(b) with overlapping distance of the patches
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Fig. 3. Two magnetic coupling structures, (a) Resonators are in the same direction. (b) Resonators are in opposite direction.
Fig. 4. Equivalent circuit of the proposed coupling structures.
Fig. 5. Responses of EM simulation and circuit model of the electric coupling mil. structure with the overlapping distance of the patches
mil. The elements values of the equivalent circuit can be easily found from the electromagnetic (EM) simulation results with even and oddmode excitations, and they are pF, pH, pF, and nH. The EM simulation results carried out by Ansoft HFSS and the response reproduced from the equivalent circuit are given in Fig. 5, and they are coincident over a wide frequency band. The
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Fig. 6. Electric and magnetic coupling coefficient curves of the four coupling structures versus the distance
.
coupling inductor is negative for this coupling structure because the posts are arranged in opposite direction. Similar to the design of narrowband filters, the coupling coefficients can be defined by (1) in which and represent the electric and magnetic coupling coefficients, respectively, where is the center angular is the resonant angular frequency of the filter passband and frequency of the resonator. The coupling coefficient variations versus the distance of the coupling structures are shown in Fig. 6. It can be seen that in Fig. 6(a)–(c), the spurious coupling coefficients [ in Fig. 6(a) and (b), and in Fig. 6(c)] are not sensitive to the change of the dimension . For the magnetic coupling structure in Fig. 6(d), the coupling inductor is also negative and both the electric and magnetic coupling coefficients vary with the distance . III. DIAGNOSIS OF DIRECTCOUPLEDRESONATOR FILTERS In [6], closedform formulas are derived for extracting parameters of directcoupledresonator filters. The couplings are assumed to be constant and thus the diagnosis procedure is not feasible for filters with wide bandwidths. It has been shown in Section II that the capacitors and inductors can model the coupling structures over a wide frequency band. In this paper,
Fig. 7. (a) Equivalent circuit of a directcoupledresonator filter with one port open circuited. (b) and (c) Equivalent coupling circuits with capacitors and inductors.
the parameter extraction method for filters with couplings that are functions of frequency is developed. Fig. 7(a) shows the equivalent circuit of a directcoupledresonator filter with one port open circuited, in which are the coupling elements whose equivalent circuits are shown in Fig. 7(b) and (c). These circuits are formed by pinetworks of capacitors and inductors, representing the electric and magnetic coupling structures respectively; they can be considered as admittance inverters with values proportional or inversely proportional to frequency, i.e., or . In this equivalent circuit purely capacitive or inductive couplings that characterize the dominant coupling type are assumed. This assumption is valid if the physical coupling structures are intentionally constructed
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to minimize the spurious coupling. The input admittance at the th stage is given by
It should be noted that for the last resonator, the input admittance is
(2)
(10)
where and are the characteristic admittance and resonant angular frequency of resonator that are defined by and , respectively; is a constant; and are monic polynomials that can be expressed by (3) (4)
and therefore (11) (12) B. Inductor Coupling If the coupling type between the th and th resonator is inductor coupling, it can be found that the polynomials and are (13)
and are zeros of and , which where correspond to the zeros and poles of the input admittance . can be determined directly from The zeros and poles of as the angular frequencies for which simulated or measured its phase is 0 and 180 , respectively, provided that the input transmissionline effect is removed. In order to define the appropriate reference plane, the electrical length of the transmission line can be found by the method of group delay of [7], or direct calculation from its physical dimension. The equations above are similar to those in [6], except that an additional constant exists in (2). The recursive formulas for and , resonant angular frequencies of inbetween dividual resonators, and coupling coefficients resonators with capacitor coupling and inductor coupling are provided as follows. The detailed analysis is discussed in the Appendix. A. Capacitor Coupling For capacitor coupling between the th and the and onator, the polynomials tained by
th rescan be ob
(14) where the resonant angular frequency of (14) are evaluated by
and the denominator (15)
(16) The constant
is (17)
Similarly, the coupling coefficient can also be defined by
(18) Finally, in order to determine the external , the characteristic admittance of the first resonator should be given. The reflection coefficient at the input can be expressed by
(5)
(19)
(6) where the resonant angular frequency determined by
and constant
are
(20) (7)
(8) The coupling coefficient
is the source conductance. Therefore, the characterwhere istic admittance can be found as
can be defined by
where is the angular frequency at which the phase of 90 . The external is then derived by
is (21)
IV. DIAGNOSIS OF CANONICALCOUPLEDRESONATOR FILTERS
(9)
In the previous section, the parameter extraction procedure for directcoupledresonator filters is discussed. This extraction method can be further applied to symmetric canonical filters [14], as shown in Fig. 8(a). It is known that both the electric and
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where
, for even order and for odd order, and in the last resonator of the bisected circuit of oddorder filters with PMW (22e) (22f) The input reflection coefficients can be derived from the known twoport network scattering parameters ( and ) as (23a) (23b) The extraction method addressed in the previous section can now be employed to obtain the filter parameters. In order to recover the canonical filter, each capacitor and inductor in the bisected circuits need to be evaluated. A stepbystep parameter extraction procedure is given as follows. First, the filter parameters are extracted by imposing the PMW. The resonant angular frequencies can be calculated by (7) or (15), and the characteristic admittance of the first resonator is obtained by (20). Since the characteristic admittances of the other resonators can be arbitrarily selected, they are all chosen to be identical for simplicity, i.e., for (or ), which gives the capacitor and inductor of each resonator as Fig. 8. (a) Canonicalcoupledresonator filters and (b) their bisected equivalent circuit as a PEW or PMW is placed at the symmetric plane.
magnetic couplings would contribute to the coupling of a physical coupling structure. In this filter network, the inline coupling elements are assumed to be either capacitive or inductive. Cross couplings consist of both capacitor and inductor coupling elements; one of them is dominant coupling and the other is the parasitic coupling. In Fig. 8(a), each of the cross coupling elements, and , represents a pi section of capacitors or inductors as shown in Fig. 7(b) and (c) respectively. By imposing a perfect electric wall (PEW) or a perfect magnetic wall (PMW) at the symmetric plane, the twoport filter network can be reduced to a oneport circuit as shown in Fig. 8(b), which is the same structure as in Fig. 7(a). The subscripts and denote the conditions that the PEW and PMW are placed. It should be noted that for oddorder filters, the bisected circuits have and resonators as the PEW and PMW are imposed, respectively. The relationship between the twoport network and the bisected circuit is
(24a) (24b) Also, the inline coupling capacitor and inductor can be derived by (9) or (18)
for capacitor coupling
for inductor coupling (25b) The next step is to obtain the circuit elements of the bisected network with the PEW. The resonant angular frequencies and the characteristic admittance of the first resonator are also calculated in the same manner. Since the inline coupling elements have been predetermined by (25), the characteristic admittances of the rest of the resonators can be found as
(22a) (22b) (22c) (22d)
(25a)
(26a) or (26b)
LEE et al.: DESIGN AND DIAGNOSIS OF WIDEBAND COUPLEDRESONATOR BANDPASS FILTERS
depending on the coupling type between the th and th resonator. Then, the capacitor and inductor of each resonator will be
Toolbox. The initial guess of the parameters can be determined by applying isolation walls to the filters and extracting the parameters using the method discussed in the previous sections.
(27a) (27b) Finally, from (22) all the circuit elements of the canonical filter can be obtained as (28a)
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VI. FILTER SYNTHESIS AND TUNING To proceed with circuit tuning, a set of filter parameters whose response satisfies the specifications is necessary. Although the synthesis methods in [10]–[12] can provide the coupling matrices for desired response, it is not easy to have them with specific spurious couplings. To cope with the spurious couplings, optimization is employed for filter synthesis in this paper. The error function is described by
(28b) (28c) (28d) , for even order and for odd order, and those of the center resonator of oddorder filters are
for for
where
(28e) (28f) All the filter parameters, , , , and , can be yielded accordingly. Since the cross couplings contain the mixture of capacitor and inductor couplings, the coupling coefficient will be (29) V. DIAGNOSIS OF FILTERS WITH NONADJACENT SPURIOUS COUPLINGS The closedform expressions of the diagnosis procedure in the previous sections are feasible for directcoupled and symmetric canonicalcoupledresonator filters. However, they cannot be applied to the filters with nonadjacent couplings which are not ignorable. In this case, an optimization process can be employed to extract the filter elements. The error function can be defined by
(30) in which and are the responses of the lumped and are the EM simulation results circuit model, over the frequency band from to , and and are weighting factors. is the set of variable optimization parame, , , , and . The resonator capacters, which are itors to are specified with fixed arbitrary values. Only the scalar responses are considered. To perform the optimization, we used the constrained minimization function in MATLAB
(31)
where
and are weighting factors, and and are the filter specification masks. is the set of , , or , variable parameters, which are and the dominant cross coupling or ( or ). The capacitors to and the spurious coupling elements are given from the extraction results. The spurious coupling elements are fixed in the optimization process because it is found that their variation is not sensitive while the filter structure is adjusted to some extent. By comparing the extracted and optimized parameters, , , , and , it is clear to point out the mistuned parameters and modify them to approach the desired values. The process of parameter extraction is then repeated. Further filter synthesis is necessary in the tuning cycle if the new extracted spurious couplings substantially change and distort the filter response as they are applied to the former synthesized results. Interpolation or extrapolation for the determination of dimension adjustment can make the tuning procedure more efficient. VII. EXAMPLES A. DirectCoupled Filter With Nonadjacent Spurious Couplings Suppressed The first example to illustrate the proposed filter diagnosis and tuning approach is an eightpole inline filter in which the nonadjacent spurious couplings are intentionally suppressed. As shown in Fig. 9, the resonators are alternately coupled with capacitive and inductive couplings. Isolation walls are placed between nonadjacent resonators, so as to prevent the spurious couplings. The central frequency is designed at 2 GHz with a 50% bandwidth. The reflection coefficient should be lower than 20 dB in the passband. Since the filter is symmetrically configured, the parameter extraction method of canonicalcoupled filters can be applied to the filter diagnosis. The responses of the EM simulation and extracted parameters of the initial design are shown in Fig. 10 and they have very
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TABLE I AND SYNTHESIZED PARAMETERS OF THE FIRST FILTER EXAMPLE
EXTRACTED
Fig. 9. (a) Structure of the first filter example: directcoupled filter with nonadjacent couplings suppressed and (b) its side view.
Fig. 11. Response of the synthesized filter parameters of the initial design. Fig. 10. EM simulation and extracted responses of the initial design.
good agreement. The extracted parameters are listed in Table I. The adjacent couplings ( , , ) are assumed to be either capacitive or inductive. However, the minor spurious couplings in the physical structure between the adjacent resonators would result in the accumulation of element extraction error, which will appear as the spurious capacitive element between the fourth and fifth resonator and the corresponding coupling coefficient . This spurious element is not sensitive to the alteration of the dimension and therefore it is reasonable to have its value fixed during the process of filter synthesis. In the optimization process, the starting values of circuit elements are given from the extraction results. The synthesized filter parameters are also given in Table I, and the filter response is shown in Fig. 11. The filter can then be fine tuned by comparing the extracted and synthesized parameters. In this filter, the source and load impedances are about 10 and the transmission lines are directly attached to the conductor patches to have strong input and output couplings. According to (21), the external ’s can be tuned by changing or . However, adjusting also alters the resonant frequency and thus increases the tuning
difficulty. Therefore, the most efficient way to fine tune the external ’s is to change the source and load impedances. Additional impedance transformers at the input and output may be necessary. The EM simulation and extraction results of the final design are shown in Fig. 12. The extracted parameters of the final filter design are given in Table I. B. CanonicalCoupled Filter The second example is an eightpole canonicalcoupled filter with the central frequency at 1 GHz and its passband is from 0.8 to 1.2 GHz (40% bandwidth). The scattering parameter should be lower than 20 dB in the passband, and should be less than 50 dB for the frequencies lower and higher than 0.7 and 1.35 GHz, respectively. The possible coupling type of the canonical filter is shown in Fig. 13(a), in which all the couplings are purely capacitive or inductive. After optimization, the response of the filter fulfilling the specifications is shown in Fig. 13(b), and its parameters are given in Table II. The physical structure of the initial filter design is shown in Fig. 14. To realize tight inline electric couplings, two conductor patches are overlapped, while floating patches are used to couple the resonators for cross couplings. Several isolation walls are
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Fig. 14. Physical structure of the initial eightpole canonical filter design.
Fig. 12. EM simulation and extracted responses of the final design.
Fig. 15. EM simulation response and the response calculated from the extracted results.
Fig. 13. (a) Possible coupling type of the eightpole canonical filter and (b) its response after optimization. TABLE II SYNTHESIZED PARAMETERS OF THE INITIAL FILTER DESIGN
placed around the resonators to restrain the spurious couplings. The simulation response of the initial filter design is given in Fig. 15. The response of the extracted results is also shown for comparison and the filter parameters are listed in Table III. The next step is to synthesize the filter parameters whose response meets the specifications with the presence of spurious couplings. The response of the synthesized filter is shown in Fig. 16, and its parameters are given in Table III. It can be seen that the required dominant crosscoupling coefficients and are zero. Therefore, the floating conductor between resonator 1 and 8 and the iris between resonator 3 and 6 are removed in the tuning process. After a few tuning iterations, the final filter design and its simulation and extracted responses are shown in Fig. 17. The
Fig. 16. Response of the initial synthesized filter with spurious coupling elements.
extracted parameters are also given in Table III. Although resonators 3 and 6 are fully isolated by a conductor wall, spurious couplings between them are still extracted. This is because the spurious couplings are accumulated in the crosscoupling paths due to the assumption of either capacitive or inductive couplings in the inline coupling path of the proposed equivalent circuit. The extracted spurious couplings in this filter design are small and will not affect the tuning process. Finally, the solid models for resonator posts and isolating walls need to be transformed to realizable structures with LTCC technology. They are realized by stacked conductors which are connected by via array, as shown in Fig. 18(a). Few adjustments
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Fig. 17. (a) Structure of the canonical filter after fine tuning and (b) its EM simulation and extracted responses. TABLE III AND SYNTHESIZED PARAMETERS OF THE SECOND FILTER EXAMPLE
EXTRACTED
Fig. 18. (a) Structure of the canonical filter with impedance transformers for LTCC realization and (b) its EM simulated and measured responses.
bandwidth [15]. Good simulation results are obtained as shown in Fig. 18(b), and the measured response is also given. The measured results agree very well with the simulation except that the passband frequency is slightly shifted from 1 to 1.1 GHz and is degraded at lower frequency of the passband. This is determined to be due to the dielectric constant of the LTCC tape material around the conductors being different from the nominal value used in the simulation and design. The broadband measurement of the filter response is shown in Fig. 19. C. DirectCoupled Filter With Nonadjacent Spurious Couplings (From [13])
would be necessary to improve the return loss due to the difference of solid and via models. Two impedance transformers with threesection quarterwavelength transmission lines are also included to transform the impedance from 8.2 to 50 over a 70%
The third example is similar to the first filter design, while the isolation walls are removed, as shown in Fig. 20. In this case, the spurious couplings between the nonadjacent resonators can not be neglected, thus the closedform formulas for filter parameter extraction are not applicable. Optimization process is employed to achieve parameter extraction. The starting values of the optimization parameters are obtained by placing isolation walls between the nonadjacent resonators, as the first example, and extracting them using the closedform formulas. The simulation and extracted results of the initial filter design are shown
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TABLE IV EXTRACTED
AND SYNTHESIZED PARAMETERS OF THE FILTER EXAMPLE (FROM [13])
THIRD
Fig. 19. Broadband measured response of the canonical filter design.
Fig. 20. Structure of the third filter example: directcoupled filter with isolation walls removed (from [13]).
Fig. 22. Response of the synthesized filter parameters of the initial design (from [13]).
Fig. 21. EM simulation and extracted results of the initial filter design (from [13]).
in Fig. 21. The extracted parameters are given in Table IV. It should be noted that there may be other solutions that can produce the same response if more spurious couplings are introduced. In this example the spurious couplings are kept as few as possible to speed up the optimization process. The filter is then optimized with the spurious elements fixed to have satisfactory response, which is shown in Fig. 22. The synthesized parameters are also listed in Table IV. It can be observed that with the presence of spurious couplings, not only the circuit parameters but also the outofband steepness of are different from those of the first filter design. The simulation and extracted results of the final filter design are shown in Fig. 23, in which the filter response is reproduced by the extracted elements in the frequency up to 3.5 GHz. There is spurious resonance of the
Fig. 23. EM simulation and extracted results of the final filter design (from [13]).
filter around 6 GHz. The extracted circuit parameters are given in Table IV. VIII. CONCLUSION The method of parameter extraction for wideband filters is discussed in this paper. Capacitor and inductor coupling elements are used to represent the frequencydependent electric and magnetic coupling structures. A comblinelike resonator
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with LTCC technology is introduced and circuit modeling of several coupling structures is presented. For directcoupled filters without nonadjacent spurious couplings, closedform formulas are given to extract the circuit parameters. This approach can be applied to the parameter extraction of symmetric canonical filters, and the detailed extraction procedure is provided. For filters with nonadjacent spurious couplings, the parameter extraction is achieved by optimization. To obtain the response satisfying the specifications, the filter parameters are synthesized with an optimization process. It is evident how to adjust the dimensions of the mistuned filter by comparing the extracted and synthesized parameters. Three eightpole direct and canonicalcoupled filter examples are given and have successfully demonstrated the validity of the proposed filter diagnosis and design method. The canonical filter was manufactured in LTCC and the measured results agreed closely with the simulation.
is a monic polynomial, i.e., the coefficient of the Since highest order term is one, we can obtain (A4) Substituting (A3) and (A4) into the numerator of (A2) we have (A5) In order to satisfy the polynomial condition of , the coefficients of and terms in the numerator of (A5) must be zero, which yields (A6)
(A7) APPENDIX Capacitor Coupling: The input admittance at the ) is expressed by resonator (
th
(A1) between the With the capacitor coupling th and th resonator, the input admittance at the th resonator is obtained as shown in (A2) at the bottom of this page. By comparing the polynomials of (A2), it is clear that (A3)
Inductor Coupling: For inductor coupling between the th th resonator, it can be found that that input admitand tance at the th resonator is shown in (A8) at the bottom of this page. Since is a monic polynomial, we have (A9) Also, is equal to merators of (A8) yields
as (A3). Equating the nu
(A10)
(A2)
(A8)
LEE et al.: DESIGN AND DIAGNOSIS OF WIDEBAND COUPLEDRESONATOR BANDPASS FILTERS
By comparing the polynomial orders of (A10), it can be found that the coefficients of and terms in the numerator must be zero, and we get
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Park. In 2010, he joined the Department of Electronic Engineering, National Formosa University, Yunlin, Taiwan, where he is currently an Assistant Professor. His research interests include microwave passive components, antennas, and measurements.
(A11) Moreover, equating the coefficients of
term yields
(A12) ACKNOWLEDGMENT The authors wish to thank J. Tallo, Kyocera America, San Diego, CA, for his careful measurement. REFERENCES [1] G. L. Matthaei, L. Young, and E. M. T. Jones, Microwave Filters, ImpedanceMatching Networks, and Coupling Structures. Norwood, MA: Artech House, 1980, ch. 4 and 8. [2] A. E. Atia and A. E. Williams, “Narrowbandpass waveguide filters,” IEEE Trans. Microw. Theory Tech., vol. TMTT–20, no. 4, pp. 258–265, Apr. 1972. [3] A. E. Atia, A. E. Williams, and R. W. Newcomb, “Narrowband multiplecoupled cavity synthesis,” IEEE Trans. Circuits Syst., vol. CT–21, no. 5, pp. 649–655, Sep. 1974. [4] R. J. Cameron, “General coupling matrix synthesis methods for Chebyshev filtering functions,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 4, pp. 433–442, Apr. 1999. [5] R. J. Cameron, “Advanced coupling matrix synthesis techniques for microwave filters,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 1, pp. 1–10, Jan. 2003. [6] H.T. Hsu, H.W. Yao, K. A. Zaki, and A. E. Atia, “Computeraided diagnosis and tuning of cascaded coupled resonators filters,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 4, pp. 1137–1145, Apr. 2002. [7] H.T. Hsu, Z. Zhang, K. A. Zaki, and A. E. Atia, “Parameter extraction for symmetric coupledresonator filters,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 12, pp. 2971–2978, Dec. 2002. [8] W. Meng and K.L. Wu, “Analytical diagnosis and tuning of narrowband multicoupled resonator filters,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 10, pp. 3765–3771, Oct. 2006. [9] F. Li, X. Zhang, C. Li, Q. Zhang, L. Sun, H. Li, A. He, and Y. He, “A new coupling matrix extracting method from the frequency response,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 4, pp. 760–767, Apr. 2007. [10] S. Amari, F. Seyfert, and M. Bekheit, “Theory of coupled resonator microwave bandpass filters of arbitrary bandwidth,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 8, pp. 2188–2203, Aug. 2010. [11] W. Meng, H.M. Lee, K. A. Zaki, and A. E. Atia, “Synthesis of multicoupled resonator filters with frequencydependent couplings,” in IEEE MTTS Int. Microw. Symp. Dig., May 2010, pp. 1716–1719. [12] W. Meng, H.M. Lee, K. A. Zaki, and A. E. Atia, “Synthesis of wideband multicoupled resonators filters,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 3, pp. 593–603, Mar. 2011. [13] H.M. Lee, K. A. Zaki, and A. E. Atia, “Wideband bandpass filters simulation, design and diagnosis,” in IEEE MTTS Int. Microw. Symp. Dig., May 2010, pp. 441–444. [14] H. C. Bell Jr., “Canonical lowpass prototype network for symmetric coupledresonator bandpass filters,” Electron. Lett., vol. 10, no. 13, pp. 265–266, Jun. 1974. [15] G. L. Matthaei, L. Young, and E. M. T. Jones, Microwave Filters, ImpedanceMatching Networks, and Coupling Structures. Norwood, MA: Artech House, 1980, ch. 6. HongMing Lee (S’03–M’06) received the B.S. and Ph.D. degrees in electrical engineering from National Cheng Kung University, Tainan, Taiwan, in 2002 and 2006, respectively. From 2007 to 2009, he was a PostDoctoral Researcher with the Institute of Computer and Communication Engineering, Department of Electrical Engineering, National Cheng Kung University. From 2009 to 2010, he was a PostDoctoral Researcher with the Department of Electrical and Computer Engineering, University of Maryland at College
Kawthar A. Zaki (SM’85–F’91) received the B.S. degree (Hons.) from Ain Shams University, Cairo, Egypt, in 1962, and the M.S. and Ph.D. degrees from the University of California at Berkeley, in 1966 and 1969, respectively, all in electrical engineering . In 1970, she joined the Electrical Engineering Department, University of Maryland at College Park. Currently, she is Professor Emeritus of electrical and computer engineering at the University of Maryland at College Park. She has authored or coauthored over 200 publications. She holds five patents on filters and dielectric resonators. Her research interests are in the areas of electromagnetics, microwave circuits, simulation, optimization, and computer aided design of advanced microwave and millimeterwave systems and devices.
Ali E. Atia (S’67–M’69–SM’78–F’87) received the B.S. degree from Ain Shams University, Cairo, Egypt, in 1962, and the M.S. and Ph.D. degrees from the University of California at Berkeley, in 1966 and 1969, respectively, all in electrical engineering. He joined COMSAT Laboratories in 1969, where he participated in research and development of a broad range of advanced microwave technologies for communication satellite transponders and antennas. He also participated in and managed system development and software activities for several satellite programs and ground station projects. He held several technical and management positions at COMSAT, the last of which was Vice President and Chief Engineer for COMSAT Technology Services and COMSAT Systems Division. In 1994, he joined CTA Incorporated, which was acquired by the Orbital Sciences Corporation in 1997. He served as President of Orbital Communications International, a business unit of the Orbital Sciences Corporation, responsible for communication satellites. In June 2007, he decided to take partial retirement from the Orbital Sciences Corporation, and serve as Senior Vice President for technology development. He has authored or coauthored over 100 refereed technical articles and presentations in various technical journals, national and international conferences and symposia. He holds five patents in the areas of microwave filters and receivers. Dr. Atia is a Fellow of the American Institute of Aeronautics and Astronautics (AIAA) and a member of the Sigma Xi Research Society. He was the recipient of the Pioneer Award of the IEEE Microwave Theory and Techniques Society (IEEE MTTS) in 1997.
Andrew J. Piloto received advanced degrees in both mechanical engineering and solidstate physics from The University of Texas at Austin, in 1985. He is a member of the Technical Staff in the Product Technology Center, Kyocera America, San Diego, CA. He is currently involved in the development of nextgeneration T/R module and radar support electronics packaging for active phased array radar systems. Currently, he is developing highly integrated T/R modules and frequency converters for both space and terrestrial applications as both a contractor to the U.S. Government as well as the original equipment manufacturers (OEMs).
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Highly Miniaturized Multiband Bandpass Filter Design Based on a Stacked Spiral Resonator Structure ChienHsun Chen, Student Member, IEEE, ChienHsiang Huang, Student Member, IEEE, TzyySheng Horng, Senior Member, IEEE, and SungMao Wu, Member, IEEE
Abstract—This paper describes a stacked spiral resonator (SSR) structure for designing very compact multiband bandpass filters. The resonant frequencies of the proposed SSR structure can be determined by designing the spiral geometry and controlling the mutual coupling in a stacked structure. The multiple passband bandwidths can then be determined by the spacing of different layer patterns between two coupled SSRs. An adequately designed geometry of the input/output resonator with a tappedline feed can achieve matching conditions for all passbands simultaneously. Moreover, multiple transmission zeros created on both sides of each passband provide high stopband rolloff rates. Index Terms—Multiband bandpass filter, multilayer bandpass filter, stacked spiral resonator (SSR), transmission zeros.
I. INTRODUCTION
F
OR multistandard wireless communication systems, multiband bandpass filters with a miniaturized size and high selectivity are essential components. Many efforts have been placed on developing multiband filters [1]–[18]. Implementing a dualband bandpass filter design by combining two specific singleband filters [1]–[3] leads to a larger occupied area. An advanced concept for designing a multiband bandpass filter utilizes multimode resonators, such as stub loaded resonators (SLRs) [4]–[6], steppedimpedance resonators (SIRs) [7]–[11], and dualmode resonators using a perturbation method [12]–[14]. A SLR configuration with a few open or short stubs can easily determine the resonant frequencies by properly adjusting the stub lengths for either a dualband design [4], [5] or a tripleband design [6]. The two and trisection SIRs can easily achieve a dualband response [7]–[9] and a tripleband response [10], [11], respectively, by designing the geometric parameters. Several dualmode resonators of various Manuscript received October 21, 2011; revised January 13, 2012; accepted February 02, 2012. Date of publication March 16, 2012; date of current version April 27, 2012. This work was supported in part by the National Science Council, Taiwan, under Grant 972221E110035MY3 and Grant 1002622E110001CC1, and by the Department of Industrial Technology, Taiwan, under Grant 99EC17A01S1104. C.H. Chen and T.S. Horng are with the Department of Electrical Engineering, National Sun YatSen University, Kaohsiung 804, Taiwan (email: [email protected]; [email protected]). C.H. Huang was with the Department of Electrical Engineering, National Sun YatSen University, Kaohsiung 804, Taiwan. He is now with the Realtek Semiconductor Corporation, HsinChu 300, Taiwan (email: [email protected]) S.M. Wu is with the Department of Electrical Engineering, National University of Kaohsiung, Kaohsiung 811, Taiwan. (email: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2187797
shape can result in dual and tripleband bandpass filters with a pair of slits [12] or a number of opencircuited stubs [13], [14]. Although adopting multimode resonators for multiband filter designs can reduce the component size, simultaneously satisfying the design specifications of all passbands, such as the different external quality factors and coupling coefficients for each passband, is rather difficult. Other works have developed novel structures, including two sets of resonators using a combined halfwavelength SLR [15] and defected ground structure (DGS) resonator [16] or SIR [17] for implementing a multiband response. Moreover, the resonators can be assembled as a cascaded quadruplet filter with a cross coupling path to provide two transmission zeros in order to split a dualband response into a tripleband response [18]. Although the assembled two sets of resonators can increase the degrees of freedom in extracting coupling coefficients for all passbands, the two sets of resonators require more area for implementation. The authors’ previous work [19] presented a stacked LC resonator with a singlemode resonant response for implementing singleband bandpass filters. Based on use of a stacked configuration, this work develops multiband bandpass filters by exploiting a stacked spiral resonator (SSR) with multimode resonant responses. The proposed SSR is embedded in a fourmetal layer substrate, capable of significantly minimizing component size and providing degrees of freedom in determining coupling coefficients for each passband. Additionally, using a tappedline feed to the input/output SSR provides a range of external quality factors for all passbands. Moreover, multiple transmission zeros are observed on both sides of individual passbands to improve the selectivity or the stopband rejection for the designed multiband bandpass filters. II. SSRs A. DualResonance Resonator Twosection transmissionline SIRs with half or quarterwavelength are frequently used for designing dualband bandpass filters [7]–[9]. Fig. 1 depicts a twosection  and type resonator structure, respectively, and the frequency ratios of the first two resonant modes are found as [20] (1) (2) . The above results, where denotes the impedance ratio as shown in Fig. 2, indicate that the second resonant frequency
00189480/$31.00 © 2012 IEEE
CHEN et al.: HIGHLY MINIATURIZED MULTIBAND BANDPASS FILTER DESIGN BASED ON SSR STRUCTURE
Fig. 1. Twosection SIR configurations. (a)
open (b)
Fig. 2. Impedance ratio versus frequency ratio open and short SIR. tion
short.
for the twosec
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Fig. 4. Equivalent circuit of the proposed dualresonance SSR.
0.02, which is included in the layer structure for electromagnetic (EM) simulation. It is observed that the simulated filter response shifts to slightly lower frequencies with the bonding films than without them. The microstrip sections of and in Fig. 1(b) can be represented by the spiral inductor of on metal 1 and the spiral inductor on metal 3, respectively, as shown in Fig. 3(a). The two spiral inductors shown in Fig. 3(b) are stacked vertically and connected to each other with two plated through holes (PTHs). Fig. 4 displays the equivalent circuit of the proposed dualresonance SSR without considering the resistive loss. In Fig. 4, denotes the intercoil capacitance and represents the coiltoground capacitance of the spiral inductor , for and . and account for the overlap capacitance and mutual inductance between and , respectively. By assuming that and , the first two resonant angular frequencies of the dualresonance resonator can be derived as
(3) (4) where (5) Fig. 3. Dualresonance SSR embedded in a fourmetal layer substrate. (a) 3D structure. (b) Metallic patterns on metal 1 and metal 3.
(6) The frequency ratio of
can be obtained by designing the impedance ratio with a predetermined . A type resonator saves more space, but requires a larger impedance ratio than a type one does for a specific frequency ratio. However, a highimpedance ratio design typically requires a highimpedance microstrip line that is normally restricted in the printed circuit board (PCB) process and is also considerably lossy due to high conductor loss. To overcome this problem, this work develops a dualresonance SSR that is embedded in a fourmetal layer RT/Duroid 6010 substrate with a dielectric constant of 10.2 and a loss tangent of 0.0025, as shown in Fig. 3(a). In manufacturing, there are two bonding films used to assemble three different substrates. Each bonding film between two substrates is a 0.08mmthick prepreg material with a dielectric constant of 4.4 and a loss tangent of
can be expressed as (7)
The above equation clearly indicates that the parasitic capacitance and mutual inductance significantly impact the ability to determine the frequency ratio. Notably, the spiral inductors and in Fig. 3 are wound clockwise and counterclockwise, respectively, resulting in a negative mutual inductance ( ) to decrease the frequency ratio according to (7). Therefore, in addition to more significantly reducing the component size than the conventional SIR structure, an SSR configuration provides parasitic capacitance and negative mutual inductance to reduce the frequency ratio, thus avoiding the use of a highimpedance microstrip line.
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Fig. 5. Trisection
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short SIR configuration.
Fig. 7. Equivalent circuit of the proposed tripleresonance SSR.
, , , and , the first three resonant frequencies of the proposed tripleresonance SSR can be obtained as (10)
Fig. 6. Tripleresonance SSR embedded in a fourmetal layer substrate. (a) 3D structure. (b) Metallic patterns on metal 1, metal 2, and metal 3.
(11) B. TripleResonance Resonator A twosection SIR configuration can be extended to a trisection one for tripleband bandpass filter designs [10], [11]. A previous work [21] demonstrated that the total electrical length of a type trisection SIR with an equal section length is shorter than a twosection one for a given operating frequency. However, the purpose of size reduction is not as obvious as in the use of a type configuration. Fig. 5 shows a trisection short SIR with three microstrip sections that cause two impedance ratios and . Additionally, the two impedance ratios can be used to determine the frequency ratios between the three resonant mode frequencies given as follows [10], [22]: (8)
(9)
(12) where (13) (14) depends on , , , The first resonant frequency and . After is known from specifying the values of these three elements, the second resonant frequency can be subsequently determined by . The spiral inductance then determines the third resonant frequency with knowledge of and . Finally, the frequency ratios of and for the proposed tripleresonance SSR can be represented as (15)
Similarly, trisection SIR structures with a lower frequency ratio require a highimpedance microstrip line that is difficult to achieve on a PCB. Similar to the concept of a dualresonance SSR structure, a trisection SIR can be represented by a threelayered SSR, as shown in Fig. 6, to avoid using a highimpedance microstrip line. The microstrip sections of , , and in Fig. 5 are represented by the spiral inductors , , and on metal 1, metal 2, and metal 3, respectively. The three spiral inductors are connected as a tripleresonance SSR by using two PTHs. Fig. 7 illustrates the equivalent circuit of the proposed tripleresonance SSR without considering the resistive loss. In Fig. 7, and are the parasitic intercoil capacitance and coiltoground capacitance, respectively. Moreover, and represent the overlap capacitance and the mutual inductance, respectively, between the adjacent spiral inductors and . By assuming that ,
(16) and the mutual inducNotably, the parasitic capacitance tance and of the stacked resonator substantially influence the two frequency ratios. Similar to the above mentioned treatment, the spiral inductors and were wound clockwise, while the spiral inductor was wound counterclockwise. In doing so, the negative mutual inductances ( and ) were obtained to reduce the two frequency ratios without adjusting the geometry of spiral inductors. III. DUALBAND BANDPASS FILTER DESIGN To demonstrate the feasibility of the proposed design concept, this work designs a secondorder 0.2dB equalripple Cheby
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Fig. 9. Coupling coefficients versus the coupling spacing on different metal layers for the coupled dualresonance SSRs. (a) Metal 1 (b) Metal 3. Fig. 8. External quality factors versus the tapped feed position for the dualresonance SSR. (a) Band 1. (b) Band 2.
shev dualband bandpass filter with the passband center frequencies at GHz and GHz. This design is achieved by using the dualresonance SSR shown in Fig. 3 for wireless local area network (WLAN) applications. The adopted filter prototype element values are , , and . The fractional bandwidths of the first and second passbands are set as and , respectively. The external quality factor and coupling coefficient can be found in terms of the filter prototype elements as (17) (18) and The above design parameters are evaluated as for the first passband and and for the second passband. To obtain the physical dimension of the proposed dualband bandpass filter, the external quality factors and coupling coefficients are related to the tapped position and the coupling spacing on different metal layers , for and , respectively [23], with the assistance of EM simulation by AnsysAnsoft HFSS. Fig. 8(a) and (b) illustrates the external quality factors and , respectively, with respect to the tapped position of for different values of the specified width on metal 1. According to these figures, varying obviously changes , yet only a slight change in for the same tapped feed position. Therefore, and can be individually determined by controlling and , respectively. Notably, slightly tuning the width makes the resonant frequencies almost unchanged. If a tuning of significantly
changes the designed resonant frequencies, compensation can be made by simply varying the length or inductance of spiral patterns on different metal layers. It is also noted that for the results shown in Fig. 8. To conversely achieve , increasing the spiral turn spacing on metal 3 provides the most effectiveness for a given spiral inductance . Fig. 9(a) and (b) displays the coupling coefficients with respect to the spacing on metal 1 and the spacing on metal 3, respectively. According to Fig. 9(a), an increase in decreases the coupling coefficient of the second passband without altering the coupling coefficient of the first passband . The reason behind it is as follows. In this design, electric coupling dominates the coupling of the SSRs. It has been further found from HFSS simulation that the electric coupling between two metal1 spiral patterns is weak at the frequencies of band 1, but gets much stronger at the frequencies of band 2, which provides evidence for the dependence of and on the spacing of , as shown in Fig. 9(a). Consequently, and can also be individually determined by controlling and , respectively. A detailed design procedure is summarized in the following steps. Step 1) Choose the tapped feed position that is located at mm with mm, as shown in Fig. 8, to fulfill the design requirements of and ; Step 2) Fig. 9(b) shows the relation of and versus the spacing on metal 3 when is equal to 0.1 mm. Also select mm to obtain the coupling coefficient for the first passband. Step 3) Fig. 9(a) shows the relation of and versus the spacing when equals 0.17 mm since the
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Fig. 10. Proposed dualband bandpass filter design using two coupled dualresonance SSRs. (a) 3D geometrical configuration. (b) Top view layout and photograph.
Fig. 12. Transmissionzero frequencies versus the coupling spacing on different metal layers for the proposed dualband bandpass filter design. (a) Metal 1. (b) Metal 3.
Fig. 11. Comparison of the magnitude of and between EM simulation and measurement for the proposed dualband bandpass filter design.
change of only slightly impacts . Also, select mm to obtain and preserve . Fig. 10 shows the 3D geometrical configuration, top view layout, and photograph of the designed secondorder dualband bandpass filter. The occupied area, excluding the tapped line, is 2.5 mm 1.8 mm, revealing an ultracompact component size compared with conventional microstrip dualband filters. Fig. 11 compares the magnitudes of and between HFSS simulation and measurement, indicating a good agreement over a frequency range up to 8 GHz. The measured return losses in the two passbands exceed 19 dB. The insertion losses are less than 1.2 and 1.7 dB in the first and second passband, respectively. The four transmission zeros located at 1.2, 3.2, 4.4, and 6.2 GHz enhance the rolloff rates on both sides of the two passbands. These transmission zeros come from coexistence of electric and magnetic coupling [24] and depend on the spacing and . For this case, and are given as 0.1 and 0.18 mm, respectively. The four transmissionzero frequencies denoted as , for and , are discussed in detail as follows. A change in the spacing or the spacing causes a frequency shift in the transmissionzero frequency . As , the transmissionzero frequency moves toward a higher frequency. In contrast, as , the
transmissionzero frequency shifts to a lower frequency. Fig. 12(a) and (b) illustrates the frequency shift with respect to the spacing and the spacing , respectively. According to Fig. 12(a), increasing on metal 1 pushes , , and toward higher frequencies and retains at 1.2 GHz. Fig. 12(b) also reveals that an increase in causes and to shift close to the first passband, to move far away the second passband, and to remain at 6.2 GHz. Notably, the spacings and influence both the transmissionzero frequencies and the design conditions of the coupling coefficient for the two passbands. Therefore, passband performance and transmission zeros should be taken into account simultaneously in the design procedure. IV. TRIPLEBAND BANDPASS FILTER DESIGN The SSR structure can also be used to construct a tripleresonance resonator in order to realize a tripleband bandpass filter. As an example, a secondorder 0.2dB equalripple Chebyshev tripleband bandpass filter is designed with the passband center frequencies at GHz, GHz, and GHz for WCDMA/WiMAX/WLAN applications using the tripleresonance SSR in Fig. 6. The fractional bandwidths for the tripleband response are designed as , , and , respectively. The estimated external quality factors and coupling coefficients are also obtained as and for the first passband, and for the second passband, and and for the third passband. The external quality factors and coupling coefficients of each passband can be evaluated as a function of the tapped position and the coupling spacing on different metal layers , for and with the help of HFSS simulation. Fig. 13(a)–(c) displays the design curves of , , and
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Fig. 14. Simulated current distribution on the tripleresonance SSR. (a) At the first resonant frequency. (b) At the second resonant frequency. (c) At the third resonant frequency.
Fig. 13. External quality factors versus the tapped feed position for the tripleresonance SSR. (a) Band 1. (b) Band 2. (c) Band3.
, respectively, with respect to for different combination of the specified widths and on metal 1. According to Fig. 13(a) and (c), an increase in increases the value of , yet hardly changes the value of . Conversely, an increase in enlarges the value of , yet barely affects the value of . Moreover, the change of or negligibly influences , as shown in Fig. 13(b). Therefore, can be made smaller or larger than and by increasing or decreasing both and . To further explain Fig. 13 with an EM point of view, Fig. 14 shows the simulated current distribution on the tripleresonance SSR at the three main resonant frequencies. As shown in Fig. 14(a) and (c), the current distribution concentrates on the different portion of the metal1 spiral pattern with different width of and at the first and third resonant frequency, respectively. It is therefore reasonable to observe that increasing enlarges rather than , whereas increasing has the converse effect. Moreover, it can be seen from Fig. 14(b) that the currents mainly concentrate on metal 2 and 3 and weaken on metal 1 at the second resonant frequency.
This can explain why the change of the width and on the metal1 spiral pattern hardly influences . As a matter of fact, all of the external quality factors for a tripleband response can be individually determined by the following procedure: First, determine the tapped feed position at the input/output resonator based on the calculated value of ; Second, determine the width from the design value of ; Finally, determine the width from the estimated value of . The next step determines the spacing in each layer to obtain the calculated coupling coefficients for each passband. Fig. 15(a)–(c) shows the design curves of the coupling coefficients with respect to the spacing of on metal 1, the spacing on metal 2, and the spacing on metal 3, respectively. As mentioned earlier in the dualband BPF design, the coupling coefficients , , and corresponding to the first, second, and third passband, respectively, can also be individually determined by adequately controlling the spacings , , and . Moreover, an extra metallic stub on the right edge of the SSR on metal 1, as shown in Fig. 13, can be used to enhance these coupling coefficients. The design procedure for the proposed tripleband bandpass filter is summarized as follows. 1) Under the condition of mm and mm in Fig. 13, choose the tapped feed position at mm to correspond to the external quality factors , , and for achieving the design requirement. 2) Fig. 15(c) shows the coupling coefficients versus the spacing on metal 3, while mm and mm. Also, choose mm to obtain the coupling coefficient for the first passband. 3) Fig. 15(a) shows the coupling coefficients versus the spacing on metal 1, while mm and mm since reveals a weak dependence on . Also, choose mm to provide for the third passband and preserve . 4) Fig. 15(b) shows the coupling coefficients versus the spacing on metal 2 since and vary slightly
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Fig. 17. Comparison of the magnitude of and between EM simulation and measurement for the proposed tripleband bandpass filter design.
Fig. 15. Coupling coefficients versus the coupling spacing on different metal layers for the coupled tripleresonance SSRs. (a) Metal 1. (b) Metal 2. (c) Metal 3.
Fig. 18. Transmissionzero frequencies versus the coupling spacing on different metal layers for the proposed tripleband bandpass filter design. (a) Metal 1. (b) Metal 2. (c) Metal 3.
Fig. 16. Proposed tripleband bandpass filter design using two coupled tripleresonance SSRs. (a) 3D geometrical configuration. (b) Top view layout and photograph.
over a range of from 0.3 to 1 mm. Also, choose mm to obtain and retain and simultaneously.
Fig. 16 illustrates the 3D geometrical configuration, top view layout, and photograph of the designed secondorder tripleband bandpass filter. The occupied area, excluding the tapped line, is 2.9 mm 2.4 mm. Fig. 17 compares the magnitudes of and between HFSS simulation and measurement for the proposed tripleband bandpass filter design, indicating a good agreement over a frequency range up to 8 GHz. The measured insertion losses are lower than 1.4, 1.7, and 2 dB in the first, second, and third passband, respectively, while the measured return losses are all exceed 15 dB. According to Fig. 17, each passband has a pair of
CHEN et al.: HIGHLY MINIATURIZED MULTIBAND BANDPASS FILTER DESIGN BASED ON SSR STRUCTURE
transmission zeros on both sides. They are due to coexistence of magnetic and electric coupling and located at 0.9 and 2.4 GHz with respect to the first passband, at 3 and 4.2 GHz with respect to the second passband, and at 5.2 and 7.2 GHz with respect to the third passband. Similarly, varying the spacing , , and causes a frequency shift in the transmissionzero frequency . The transmissionzero frequency also shifts to the higher and lower frequency for and , respectively. Fig. 18 illustrates the frequency shift versus the spacing , , and . According to Fig. 18(a), increasing moves the transmissionzero frequencies and close to the third passband without altering the other transmissionzero frequencies. Fig. 18(b) reveals that an increase in shifts the two transmissionzero frequencies and to lower frequencies, while the other ones only exhibit a slight change. According to Fig. 18(c), an increase in shifts the transmissionzero frequencies and that are on both sides of the first passband to higher frequencies. Meanwhile, the transmissionzero frequencies and near the second passband are nearly unchanged, and the transmissionzero frequencies and near the third passband are shifted toward lower frequencies. Notably, although adjusting , , or can flexibly move the transmissionzero frequencies, special care is necessary to deal with the effects on coupling coefficients. V. CONCLUSION This paper has described very compact dual and tripleband bandpass filters based on SSRs. The resonant frequencies of the proposed SSRs depend on both the geometry of spiral patterns in different metal layers and the spacing between the adjacent spiral patterns in the same layer. The tappedfeed structure applied to the proposed SSR with a spiral pattern of nonuniform width on metal 1 can flexibly provide an appropriate external quality factor to achieve the impedance matching condition. Additionally, controlling the spacing between two spiral patterns in different metal layers offer superior degrees of freedom to individually determine the bandwidth of each passband for a multiband bandpass filter design. Moreover, multiple transmission zeros are created on both sides of each passband to significantly improve the rolloff rate and attenuation in the stopband. REFERENCES [1] X. Y. Zhang and Q. Xue, “Novel dualmode dualband filters using coplanarwaveguidefed ring resonators,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 10, pp. 2183–2190, Oct. 2007. [2] E. E. Djoumessi and K. Wu, “Multilayer dualmode dualbandpass filter,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 1, pp. 21–23, Jan. 2009. [3] X. Luo, H. Qian, J.G. Ma, K. Ma, and K. S. Yeo, “Compact dualband bandpass filters using novel embedded spiral resonator (ESR),” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 8, pp. 435–437, Aug. 2010. [4] P. Mondal and M. K. Mandal, “Design of dualband bandpass filters using stubloaded openloop resonators,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 1, pp. 150–155, Jan. 2008. [5] Z. Zhang, Y.C. Jiao, X.M. Wang, and S.F. Cao, “Design of a compact dualband bandpass filter using opposite hookshaped resonator,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 7, pp. 359–361, Jul. 2011.
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[6] Q.X. Chu, F.C. Chen, Z.H. Tu, and H. Wang, “A novel crossed resonator and its applications to bandpass filters,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 7, pp. 1753–1759, Jul. 2009. [7] P. K. Singh, S. Basu, and Y.H. Wang, “Miniature dualband filter using quarter wavelength stepped impedance resonators,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 2, pp. 88–90, Feb. 2008. [8] Y.C. Chang, C.H. Kao, M.H. Weng, and R.Y. Yang, “Design of the compact dualband bandpass filter with high isolation for GPS/WLAN applications,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 12, pp. 780–782, Dec. 2009. [9] C.H. Tseng and H.Y. Shao, “A new dualband microstrip bandpass filter using nettype resonators,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 4, pp. 196–198, Apr. 2010. [10] C.I. G. Hsu, C.H. Lee, and Y.H. Hsieh, “Triband bandpass filter with sharp passband skirts designed using trisection SIRs,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 1, pp. 19–21, Jan. 2008. [11] Q.X. Chu and X.M. Lin, “Advanced tripleband bandpass filter using trisection SIR,” Electron. Lett., vol. 44, no. 4, pp. 295–296, Feb. 2008. [12] Y. Sung, “Dualmode dualband filter with band notch structures,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 2, pp. 73–75, Feb. 2010. [13] S. Luo, L. Zhu, and S. Sun, “A dualband ringresonator bandpass filter based on two pairs of degenerate modes,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 12, pp. 3427–3432, Dec. 2010. [14] S. Luo, L. Zhu, and S. Sun, “Compact dualmode tripleband bandpass filters using three pairs of degenerate modes in a ring resonator,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 5, pp. 1222–1229, May 2011. [15] X. Y. Zhang, Q. Xue, and B. J. Hu, “Planar triband bandpass filter with compact size,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 5, pp. 262–264, May 2010. [16] X. Lai, C.H. Liang, H. Di, and B. Wu, “Design of triband filter based on stub loaded resonator and DGS resonator,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 5, pp. 265–267, May 2010. [17] M. Zhou, X. Tang, and F. Xiao, “Compact dual band transversal bandpass filter with multiple transmission zeros and controllable bandwidths,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 6, pp. 347–349, Jun. 2009. [18] B.J. Chen, T.M. Shen, and R.B. Wu, “Design of triband filters with improved band allocation,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 7, pp. 1790–1797, Jul. 2009. [19] C.H. Chen, C.H. Huang, T.S. Horng, S.M. Wu, J.Y. Li, C.C. Chen, C.T. Chiu, and C.P. Hung, “Very compact stacked resonatorbased bandpass filters with a novel approach to tune the transmission zeros,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 5, pp. 293–295, May 2009. [20] M. Sagawa, M. Makimoto, and S. Yamashita, “Geometrical structures and fundamental characteristics of microwave steppedimpedance resonators,” IEEE Trans. Microw. Theory Tech., vol. 45, no. 7, pp. 1078–1085, Jul. 1997. [21] D. Packiaraj, M. Ramesh, and A.T. Kalghatgi, “Design of a trisection folded SIR filter,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 5, pp. 317–319, May 2006. [22] C.H. Lee, C.I. G. Hsu, and L.Y. Chen, “Bandnotched ultrawideband bandpass filter design using combined modified quarterwavelength trisection steppedimpedance resonator,” IET Microw. Antennas Propag., vol. 3, no. 8, pp. 1232–1236, Dec. 2009. [23] J.S. Hong and M. J. Lancaster, Microstrip Filters for RF/Microwave Applications. New York: Wiley, 2001, pp. 109–272. [24] Q.X. Chu and H. Wang, “A compact openloop filter with mixed electric and magnetic coupling,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 2, pp. 431–439, Feb. 2008.
ChienHsun Chen (S’08) was born January 30, 1981, in Kaohsiung, Taiwan. He received the B.S.E.E degree from the YuanZe University, Taoyuan, Taiwan, in 2003, the M.S.E.E. degree from IShou University, Kaohsiung, Taiwan, in 2005, and is currently working toward the Ph.D. degree in electrical engineering at National Sun YetSen University, Kaohsiung, Taiwan. His research interests are the design and analysis of embedded and integrated passive components for wireless communications.
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ChienHsiang Huang (S’08) was born August 24, 1978, in Kaohsiung, Taiwan. He received the B.S.E.E., M.S.E.E., and Ph D. degrees from National Sun YatSen University, Kaohsiung, Taiwan, in 2000, 2002, and 2011, respectively. He is currently a Research and Development Engineer with the Realtek Semiconductor Corporation, HsinChu, Taiwan. His main research interests are design and modeling of RF/microwave integrated passive devices.
TzyySheng Horng (S’88–M’92–SM’05) was born in Taichung, Taiwan, on December 7, 1963. He received the B.S.E.E. degree from National Taiwan University, Taipei, Taiwan, in 1985, and the M.S.E.E. and Ph.D. degrees from the University of California at Los Angeles (UCLA), in 1990 and 1992, respectively. Since August 1992, he has been with the Department of Electrical Engineering, National Sun YatSen University, Kaohsiung, Taiwan, where he was the Director of the Telecommunication Research and Development Center (2003–2008) and Director of the Institute of Communications Engineering (2004–2007), and where he is currently a Professor and the Advanced Semiconductor Engineering Inc. (ASE Inc.) Chair Professor. He has authored or coauthored over 100 technical publications published in IEEE journals and conferences proceedings. He holds over ten patents. His research interests include RF and microwave integrated circuits and components, RF signal integrity for wireless systeminpackage, digitally assisted RF technologies, and green radios for cognitive sensors and Doppler radars.
Dr. Horng has served on several Technical Program Committees of international conferences including the International Association of Science and Technology for Development (IASTED), International Conference on Wireless and Optical Communications, the IEEE Region 10 International Technical Conference, the IEEE International Workshop on Electrical Design of Advanced Packaging and Systems, the Asia–Pacific Microwave Conference, the IEEE Radio and Wireless Symposium, and the Electronic Components and Technology Conference. He was the recipient of the 1996 Young Scientist Award presented by the International Union of Radio Science, the 1998 Industry–Education Cooperation Award presented by the Ministry of Education, Taiwan, and the 2010 Distinguished Electrical Engineer Award presented by the Chinese Institute of Electrical Engineering, Taiwan.
SungMao Wu (M’96) was born in Kaohsiung, Taiwan, on January 29, 1971. He received the M.S.E.E. degree from the Yulin University of Science and Technology, Yulin, Taiwan, in 1996, and the Ph.D. degree from National Sun YetSen University, Kaohsiung, Taiwan, in 2001. From July 2000 to March 2006, he was with the Research and Development Electrical Laboratory, Advance Semiconductor Engineering (ASE), in charge of systeminpackage (SiP) circuit design and analysis. Since April 2006, he has been with the Department of Electrical Engineering, National University of Kaohsiung, Kaohsiung, Taiwan, initially as an Assistant Professor, and currently as an associate Professor. His research fields are in the 3D SiP (3DSiP) and RF integrated circuit (RFIC) design and testing technologies.
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A NarrowPassband and FrequencyTunable Microwave Photonic Filter Based on PhaseModulation to IntensityModulation Conversion Using a PhaseShifted Fiber Bragg Grating Wangzhe Li, Student Member, IEEE, Ming Li, Member, IEEE, and Jianping Yao, Fellow, IEEE
Abstract—A novel approach to implementing a narrowpassband and frequencytunable microwave photonic filter (MPF) based on phasemodulation to intensitymodulation conversion in a phaseshifted fiber Bragg grating (PSFBG) is proposed and experimentally demonstrated. In the proposed MPF, a phasemodulated signal is sent to a PSFBG. If one of the sidebands falls in the notch of the PSFBG, the phasemodulated signal is converted to an intensitymodulated signal. Due to the ultranarrow notch of the PSFBG, a microwave filter with an ultranarrow passband is realized. The tunability of the microwave filter is achieved by tuning the wavelength of the optical carrier. A theoretical analysis is performed in which the value of the phase shift and the location of the phase shift in the PSFBG on the frequency response of the MPF are studied. Two PSFBGs with different reflection bandwidths and different phaseshift values introduced at the center of the gratings are fabricated and incorporated into the proposed MPF. For the two PSFBGs, the 3dB bandwidths are 120 and 60 MHz and the tunable ranges are 5.5 and 15 GHz. Index Terms—Fiber Bragg grating (FBG), microwave photonic filter (MPF), microwave photonics, phasemodulation to intensitymodulation (PM–IM) conversion, phase modulator.
I. INTRODUCTION
M
ICROWAVE filters implemented in the optical domain have been intensively studied in the past few years. Compared with microwave filters implemented in the electrical domain, microwave photonic filters (MPFs) exhibit unique properties such as high frequency, large tunability, light weight, and immunity to electromagnetic interference [1]–[3], which can find numerous applications, such as in modern radar and warfare systems. An MPF usually has a delayline structure with a finite impulse response (FIR). The bandpass selectivity of an MPF is mainly determined by the number of taps [4]. To Manuscript received July 02, 2011; revised January 28, 2012; accepted February 02, 2012. Date of publication March 12, 2012; date of current version April 27, 2012. This work was supported by the Natural Sciences and Engineering Research Council of Canada (NSERC). The authors are with the Microwave Photonics Research Laboratory, School of Electrical Engineering and Computer Science, University of Ottawa, Ottawa, ON, Canada K1N 6N5 (email: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2187678
avoid optical interference, the multiple taps are usually realized by using a multiwavelength light source, such as a laser array, a broadband spectrumsliced source, or an optical comb source [5]–[9]. To improve the selectivity, the number of the taps should be large, but at the cost of increased complexity. An MPF can also be implemented with an infinite impulse response (IIR). Compared with an FIR filter, an IIR filter usually has a simpler structure and better selectivity [10]–[13]. However, due to the use of resonators [12] or feedback loops [13] in an IIR filter, the stability is poor and the tunability is limited. To implement an MPF with large tunability, stimulated Brillouin scattering (SBS) can be employed in which the Brillouin gain is used to selectively amplify the sideband of the singlesideband modulated light wave [14]. However, a doublesideband with suppressed carrier modulation and singlesideband modulation are needed, which significantly increase the complexity and cost of the system. In [15], such a complicated modulation technique is replaced by using an optical filter, and an SBSbased tunable true timedelay line has been proposed to implement a dynamically reconfigurable MPF. The time delay can be tuned by changing the SBS pump power. The major limitation of the approach is that multiple modulators are employed, making the system complicated. An MPF can also be achieved based on phasemodulation to intensitymodulation (PM–IM) conversion. By selecting the optical carrier and one sideband of a phasemodulated light wave using two uniform fiber Bragg gratings (FBGs) [16], a phasemodulated signal is converted to an intensitymodulated signal. The major limitation of the approach is that the passband is wide, which is determined by the bandwidth of the uniform FBG used to select the sideband. The use of a ring resonator to filter out one sideband of a phasemodulated light wave can also achieve an MPF with potentially large tunability [17]. Since the bandwidth of the ring resonator is wide, the width of the passband is wide, in the range of several gigahertz. For many applications, an MPF with a narrow passband is needed. In this paper, we propose and experimentally demonstrate a narrowpassband and frequencytunable MPF based on PM–IM conversion employing a phaseshifted fiber Bragg grating (PSFBG) that serves as a reflection filter with an ultranarrow notch in the reflection band. In the proposed MPF, a microwave signal
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Fig. 1. Schematic of the proposed MPF. and are, respectively, the lengths of the left and right subFBGs separated by the phase shift.
is modulated on an optical carrier at a phase modulator. The phasemodulated signal is then sent to the PSFBG. When one of the firstorder sidebands falls in the notch of the PSFBG, the magnitude and phase of the sideband are modified, and the magnitude and phase relationship for the phasemodulated signal is no longer maintained; thus the phasemodulated signal is converted to an intensitymodulated signal, and the detection of the intensitymodulated signal at a photodetector (PD) would lead to the generation of an electrical signal. Due to the ultranarrow notch of the PSFBG, an MPF with an ultranarrow passband is implemented. The tunability of the MPF can be easily achieved by tuning the wavelength of the optical carrier, and the frequency tuning range can be as wide as tens of gigahertz, which is determined by the reflection bandwidth of the PSFBG and the notch location within the reflection band. A theoretical analysis is performed in which the value of the phase shift and the location of the phase shift in the PSFBG on the frequency response of the MPF are studied. Two PSFBGs with different reflection bandwidths and different phaseshift values introduced at the center of the gratings are fabricated and are incorporated into the proposed MPF. For the two PSFBGs, the 3dB bandwidths are 120 and 60 MHz and the tunable ranges are 5.5 and 15 GHz. To the best of our knowledge, the 15GHz frequency tuning range is the widest frequencytunable range ever demonstrated for a single bandpass MPF. II. PRINCIPLE OF OPERATION The configuration of the proposed MPF is shown in Fig. 1. It consists of a tunable laser source (TLS), a polarization controller (PC), a phase modulator, an optical circulator (OC), a PSFBG, an erbiumdoped fiber amplifier (EDFA), and a PD. In the proposed MPF, a continuous wave (CW) light wave with a tunable angular frequency of from the TLS is sent to the phase modulator via the PC. The polarization state of the light wave to the phase modulator is adjusted by the PC to minimize the polarizationdependent loss. The phase modulator is driven by a sinusoidal microwave signal with a tunable angular frequency generated by a vector network analyzer (VNA). If the phasemodulated signal is applied directly to the PD, no signal would be detected, except a dc since the beating between the optical carrier and the upper sideband will cancel completely the beating between the optical carrier and the lower sideband, due to the fact that the two beat signals are out of phase. However, it is well known that a phasemodulated signal can be converted to an intensitymodulated signal if the magnitude or phase relationship among the two sidebands and the
Fig. 2. Illustration of the operation of the MPF. (a) Reflection spectrum (dashed line) and phase response (solid line) of the PSFBG. (b) Frequency response of the MPF.
optical carrier is changed, and such PM–IM conversion has a transfer function corresponding to a bandpass filter [18]. It is also well known for a uniform FBG, if a phase shift is introduced to the FBG, an ultranarrow notch with a phase jump in the notch would be generated in the reflection band [19]. Thus, in our system, the phasemodulated light wave is injected into the PSFBG that is employed to modify the magnitude and the phase of either the upper or the lower sideband falling in the ultranarrow notch of the PSFBG, to achieve PM–IM conversion, leading to the implementation of an ultranarrow passband, as shown in Fig. 2. Note that if is too large such that one sideband of the phasemodulated light wave is located outside the reflection spectrum, as shown in Fig. 2(a), PM–IM conversion would also happen and another passband at much higher frequencies would appear, as shown in Fig. 2(b). Practically, the reflection bandwidth of the PSFBG could be large enough such that the second passband would be beyond the bandwidth of the PD. Thus, the proposed MPF will have a single bandpass. The central frequency of the achieved bandpass filter is equal to the frequency difference between the frequency of the optical carrier and that of the notch. Therefore, by simply tuning the wavelength of the optical carrier, the center frequency of the MPF can be tuned. The tuning range is determined by the total reflection bandwidth of the PSFBG and the location of the notch within the reflection band. Mathematically, the electrical field at the output of the phase modulator can be expressed as [20]
(1) is the electrical amplitude of the incident light wave, where is the thorder Bessel function of the first kind, is the initial phase of the microwave drive signal applied to the phase
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modulator, and is the phase modulation index, where is the amplitude of the signal applied to the phase modulator, and is the halfwave voltage of the phase modulator. The value of the phase modulation index is set small so that the power of the secondorder and higher order sidebands is much smaller than that of the carrier and the firstorder sidebands. Therefore, only the optical carrier and the two firstorder sidebands are considered. Since the amplitude and the phase of the optical carrier and the sidebands will be modified by the PSFBG, in the following, we will give the amplitude response and the phase response of the PSFBG first. The PSFBG can be described by a 2 2 matrix through
Due to the PM–IM conversion, we could have an intensitymodulated signal at the output of the PD. The recovered microwave signal and its power are given by
(2)
(10)
where is a 2 2 diagonal phaseshifted matrix with elements , where is the phase shift; the is a matrix describing each subFBG at each side of the phase shift section, where identifies, respectively, the left and right subFBGs separated by the phase shift. Its elements are given by [21] (3) (4) is the corresponding where denotes complex conjugation, , is the “ac” subgrating length (see Fig. 1), coupling coefficient defined as and is the refractive index change, is the general “dc” selfcoupling coefficient defined as , is the effective refractive index, is the velocity of light in vacuum, is the angular frequency of the incident light wave, and is the angular frequency corresponding to the Bragg wavelength of the subFBGs. Based on the coupledmode theory and the transmissionmatrix approach [21], the amplitude reflection coefficient , the power reflection coefficient , and the phase response of the PSFBG can be expressed, respectively, as (5)
phase
(6) (7)
After reflection at the PSFBG, the modified electrical field of the phasemodulated light wave can then be expressed as
(8)
(9)
where (11) (12) (13) and denotes the ac term of the output electrical signal. If no firstorder sidebands fall in the notch or the phase jump, we have (14) (15) which are obtained assuming the top of the reflection spectrum is flat and the phase response within the reflection spectrum, except the phase jump, is linear. Substituting (14) and (15) into (10), we have . This explains that the detection of a phasemodulated signal at a PD would generate no microwave signals, except a dc. If one sideband falls in the notch of the PSFBG, neither (14), nor (15) is satisfied and we have , which indicates that the phasemodulated signal is converted to an intensitymodulated signal and the detection of the intensitymodulated signal at a PD will generate a microwave signal. Therefore, due to PM–IM conversion at the PSFBG, a narrow passband corresponding to the ultranarrow notch in the reflection spectrum of the PSFBG is resulted, an MPF with a narrow passband is thus realized. The frequency response of the MPF can be calculated using (9) after incorporating and of the PSFBG. Since , which indicates the position where the phase shift is introduced, and the phase shift are two important parameters in and , we calculate the , , and for different values of and . Fig. 3(a) and (b) shows the theoretically calculated and for at three different values, , , and , where . The total length of the PSFBG is 10 mm with an of 1.45 and a of 4 10 . Fig. 3(c) shows the corresponding frequency responses . From Fig. 3, we can see when is , a notch is observed at the center of the reflection spectrum with a phase jump corresponding to a single phase cycle. We assume here that the optical carrier frequency is larger than the notch frequency. The center frequency of the passband of the
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Fig. 3. PSFBG with different phase shifts of , , and . (a) Theoretical reflection spectra of the PSFBG. (b) Theoretical phase responses of the PSFBG (The insets in (a) and (b) show the corresponding reflection spectra and phase responses with a much larger frequency span of 70 GHz.) (c) Theoretical frequency responses of the MPF for different phase shifts.
MPF is equal to the frequency difference between the optical carrier frequency and the center frequency of the notch. If is greater or smaller than , the center frequency of the notch is shifted to a smaller or a greater frequency, and the center frequency of the passband of the MPF is also accordingly increased or decreased. Therefore, we can see that the phase shift only determines the location of the notch and the phase jump within the notch, and would further determine the center frequency of the MPF for a given optical carrier frequency. The length difference between and will have an impact on the notch and the phase jump of the PSFBG, and thus the passband of the MPF. Fig. 4(a) and (b) shows the theoretically calculated and for , , and , given is equal to . As can be seen for , the PSFBG has the deepest notch with a single phase cycle corresponding to the notch, and the 3dB bandwidth of the passband of the corresponding MPF, as shown in Fig. 4(c), is the smallest, which is equal to the 3dB bandwidth of the notch. If , (say, ), both the notch depth and the phase jump become smaller. The small notch depth and phase jump would lead to an inefficient PM–IM conversion, thus a very weak passband in the MPF frequency response would be observed. If is larger than (say, ), despite that the notch depth becomes smaller, a fast phase jump corresponding to the notch is generated. Due to the fast and large phase jump, an efficient PM–IM conversion is obtained, leading to a strong passband in the MPF response. However, since the frequency range corresponding to the phase jump is wider than that for where the phase response has a single phase cycle, the 3dB bandwidth of the passband is also increased, which leads to a smaller factor of the MPF.
Fig. 4. Impact of the length difference between and on the reflection magnitude and phase responses of the PSFBG. (a) Theoretical reflection spectra of the PSFBG. (b) Theoretical phase responses of the PSFBG; (The insets in (a) and (b) show the corresponding reflection spectra and phase responses with a much larger frequency span of 70 GHz.) (c) Theoretical frequency response of the obtained MPF.
Therefore, to obtain a high MPF, it is preferable to employ a symmetric PSFBG where to ensure a narrow notch with a fast phase jump. Since the notch and the phase jump can be controlled as narrow as a few megahertz [19] and the width of the MPF passband is equal to that of the notch, the bandwidth of the MPF can be as narrow as a few megahertz, leading to a high value. For example, if the 3dB bandwidth of the notch of the symmetric PSFBG is 10 MHz, the 3dB bandwidth of the MPF would also be 10 MHz; assuming the center frequency of the MPF is 10 GHz, a factor as large as 1000 is thus obtained. The key significance of the proposed MPF is that a large tunable range can be achieved by simply tuning the wavelength of the optical carrier while maintaining a narrow and fixed passband. In addition, the passband can be potentially designed to have a shape with flat top and sharp transitions by designing the magnitude and phase response of the PSFBG. III. EXPERIMENT AND DISCUSSION An experiment based on the setup shown in Fig. 1 is performed. A VNA is employed to measure the frequency response of the MPF. A microwave sinusoidal signal from the VNA is applied to the phase modulator with a frequency ( ) sweeping from 50 MHz to 10 GHz. The power of the signal is fixed at 5 dBm. The halfwave voltage of the phase modulator is 15 V. The phase modulation index is about 0.12 so that smallsignal modulation is guaranteed. The key device in the proposed MPF is the PSFBG, which is fabricated using a uniform phase mask by scanning an UV beam along the axial direction of an optical fiber. A phase shift is introduced at the center of the grating by shifting the phase mask by half the corrugation width to create
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Fig. 5. Measured reflection magnitude and phase responses of the PSFBG.
an ultranarrow notch at the middle of the reflection spectrum. The phase response in the notch has a phase jump corresponding to a single phase cycle. The reflection magnitude and phase responses of the PSFBG are measured using an optical vector analyzer, and are shown in Fig. 5. There is an ultranarrow notch at about 1550.055 nm in the middle of the reflection spectrum and a single phase cycle in the phase response. The total reflection bandwidth of the PSFBG is about 37.5 GHz, but the bandwidth in which the phase response is linear is about 23.4 GHz. The 3dB bandwidth of the notch is about 120 MHz The PSFBG is then incorporated into the proposed MPF to perform PM–IM conversion. The wavelength of the optical carrier is set at a wavelength that is less than the center wavelength of the notch; the upper sideband will fall in the notch of the PSFBG when the microwave frequency is equal to the frequency difference between the frequency of the optical carrier and the center frequency of the notch. To measure the spectral response of the MPF, a microwave sinusoidal signal generated by the VNA with a sweeping frequency from 50 MHz to 10 GHz is applied to the phase modulator. The output signal from the PSFBG is then applied to the PD. The tuning of the center frequency of the MPF is achieved by changing the wavelength of the optical carrier. Fig. 6(a) shows the superimposed frequency responses of the MPF with the central frequency tuned from about 1 GHz to about 6.5 GHz with a tuning step of about 700 MHz. The frequency tuning range here is about 5.5 GHz, which is limited by the reflection bandwidth of the PSFBG. The tuning range could be further increased to tens of gigahertz by using a PSFBG with a wider reflection bandwidth. The frequency tuning resolution is limited by the smallest wavelength tuning step of the TLS. From Fig. 6(a), we can also see that the insertion loss of the MPF is more than 30 dB. Such a high insertion loss is mainly caused by the poor optical power handling capability of the PD. By using a highpower handling PD [22], [23], the insertion loss can be greatly reduced. The ratio of the transmission peak to the sidelobe can be as large as 25 dB. When tuning the center frequency of the passband, the ratio would be smaller. The degradation in peak to the sidelobe ratio is resulted from the amplitude and phase response ripples of the PSFBG. The PM–IM conversion at the PSFBG would convert the ripples to noise. In addition, given a certain modulation frequency, as the wavelength of the optical carrier is shifting away from the notch, one sideband of the phasemodulated light wave would be falling outside the reflection spectrum, PM–IM conversion would also happen, and another passband starting at such a frequency would appear, as
Fig. 6. (a) Measured frequency responses of the MPF with the central frequency tuned from about 1 GHz to about 6.5 GHz with a tuning step of about 700 MHz. (b) Zoomin view of the frequency response when the center frequency is tuned at about 4.9 GHz.
shown in Fig. 6(a). A solution to avoid the second passband is to use a PSFBG with a wider reflection bandwidth. The average 3dB bandwidth of the MPF is about 135 MHz; the variation of the 3dB bandwidth over the tuning range is about 15 MHz. Such a variation is also caused by the magnitude and phase response ripples of the PSFBG. Fig. 6(b) shows a zoomin view of the measured frequency response of the MPF with a center frequency of 4.9 GHz. The 3dB bandwidth is about 120 MHz, which is equal to the 3dB bandwidth of the notch of the PSFBG. The bandwidth of the MPF can be further reduced by using a PSFBG with a narrower notch and a narrower phase jump within the notch. Theoretically, the central frequency of the MPF can be as close to zero as the optical carrier is close to the notch. Thus, the frequency tunability range of the proposed MPF is from zero to the largest central frequency of the MPF. As the optical carrier is shifting away from the notch, the central frequency of the MPF and the lower cutoff frequency of the second passband are increasing and decreasing, respectively, and would be finally identical when the frequency spacing between the optical carrier and the notch is identical to the frequency spacing between the optical carrier and the closer edge of the reflection spectrum. Therefore, the largest central frequency is equal to the minimum lower cutoff frequency, and the frequency tunability range here is from zero to the largest central frequency. For a given PSFBG, assume that the total reflection bandwidth of the PSFBG is , and the reflection bandwidths of two subgratings are and . The value of would be less than or equal to 0.5. The optical carrier is assumed to locate in the reflection band with a reflection bandwidth of (see
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Fig. 7. Illustration of the parameters of the PSFBG for the calculation of the frequency tunable range of the MPF.
Fig. 7). Thus, the lower cutoff frequency , which is the frequency spacing between the optical carrier and the closer edge of the reflection spectrum, can be expressed as
(16)
where is the frequency difference between the frequency of the optical carrier and that of the notch, and also is the center frequency of the MPF. Considering the condition that the central frequency should be less than the lower cutoff frequency , we have . We can then have the upper limit of for (16), given by . Since the frequency tunable range of the MPF is the minimum lower cutoff frequency, it can be expressed as
(17)
From (17), we can see that the frequency tunable range is a function of both the reflection bandwidth and the location of the notch, namely, the value of . For the PSFBG employed in the experiment, the notch is located at the middle of the reflection spectrum, which means is equal to 1/2. The tuning range should be equal to onefourth of the reflection bandwidth, i.e., 37.5/4 9.4 GHz. However, the reflection bandwidth with a linear phase response is only about 23.4 GHz, in which the notch is not located at the middle, and the value of is equal to about 0.42, as can be seen in Fig. 5. Therefore, a second passband would appear at a frequency smaller than 9.4 GHz, which is about GHz. In Fig. 6(a), we can see that a second passband with a lower cutoff frequency of around 7 GHz exists, which limits the tunable range to be within 7 GHz. Although the tuning range can be increased by using a PSFBG with a wider reflection bandwidth, the maximum tuning range of the MPF for a given reflection bandwidth of would be achieved when is equal to 1/3, which is . Based on (5), the value of can be optimized by choosing a proper value of in the design.
Fig. 8. Measured reflection magnitude and phase response of the second PSFBG.
A second experiment is then performed in which the first PSFBG is replaced by a second PSFBG with a wider reflection bandwidth and a narrower notch. The location of the notch is adjusted by adjusting the phase shift such that the value of is 1/3. Thus, a maximum tuning range is obtained. The measured magnitude and phase responses of the new PSFBG are shown in Fig. 8. As can be seen, the location of the notch is at 1549.275 nm, corresponding to an of 1/3. The reflection bandwidth is about 0.46 nm or 58.5 GHz. Therefore, the tuning range could be as large as 19.5 GHz. The wavelength of the optical carrier is set at 1549.275 nm, which is more than the center wavelength of the notch; therefore the lower sideband will fall in the notch of the PSFBG when the microwave frequency is equal to the difference between the frequency of the optical carrier and the center frequency of the notch. By increasing the wavelength of the optical carrier, the center frequency of the MPF is accordingly increased. Fig. 9(a) shows the superimposed frequency responses of the MPF with a tunable central frequency covering a frequency range of about 15 GHz with a tuning step of 1.45 GHz. From Fig. 9(a), we can also see that the ratio of the transmission peak to the sidelobe can be as large as 40 dB. The frequency tuning range here is less than the theoretical result of 19.5 GHz, which is caused by the limited bandwith of the 10GHz PD. The second passband is not seen since it is eliminated by the PD due to its limited bandwidth. The central frequency dependency of the frequency response of the MPF is resulted from the frequencydependent response of the 10GHz PD. At the high frequency band ( 10 GHz), the electrical frequency response of the PD becomes small, which leads to the power reduction of the recovered microwave signal. In Fig. 9(b), a zoomin view of the measured frequency response of one MPF at about 6.9 GHz is shown. The 3dB bandwidth is about 60 MHz. The bandwidth can be further decreased by using a PSFBG with a narrower notch. The average 3dB bandwidth of the second MPF is about 72 MHz. The variation of the 3dB bandwidth over the tuning range is about 15 MHz, as shown in Fig. 10. Such a variation is also caused by the nonlinearity of the phase response of the PSFBG, which leads to the frequencydependency of PM–IM conversion. Another important performance measure for the MPF is the dynamic range (DR). In the earlier analysis, smallsignal modulation is considered. For smallsignal modulation, only the optical carrier and the firstorder sidebands are considered. However, as the power of the input signal or equivalently the phase
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Fig. 11. Frequency response at the transmission peak versus the power of the V). input signal (
Based on (1), the electrical field can be expressed as
at the input of the PD
Fig. 9. (a) Measured frequency responses of the MPF when a second PSFBG is employed. (b) Zoomin view of the frequency response when the center frequency is tuned at 6.9 GHz.
(18)
Fig. 10. Relationship between the 3dB bandwidth of the MPF and the central frequency.
modulation index increases, the power of the higher order sidebands would increase, thus nonlinear distortions start. The DR here is defined as the range from the minimum discernable signal (lower limit) to the maximum allowable signal (upper limit). The lower limit is directly measured here by the VNA, which is 37 dBm. The upper limit determined by the nonlinearity of the phase modulator is quantified by the 1dB compression point. Namely, in the analysis, the upper limit is found when the transmission peak of the frequency response of the MPF drops by 1 dB from the maximum value. For convenience and simplicity, we assume the reflectivity of the PSFBG is one and the notch of the PSFBG is deep enough to totally suppress the firstorder sideband of the phasemodulated light wave. The optical carrier and the other sidebands are totally reflected by the PSFBG. Therefore, the power of the recovered microwave signal can be expressed as the summation of the power of the beatings between any adjacent sidebands.
From (18), if only consider the fundamental frequency, we can see that: 1) the fundamental frequency generated by beating the optical carrier and the firstorder sideband is in phase with a beat signal between any two adjacent lower sidebands. All these beat signals are grouped in group A; 2) the beat signals between any two adjacent upper sidebands are in phase. All these beat signals are grouped in group B; 3) the two groups of beat signals are out of phase. Therefore, the power of the recovered microwave signal can be expressed as
(19) Based on (19), the level at the transmission peak of the frequency response of the MPF as a function of the power of the input signal is shown in Fig. 11. From Fig. 11, we can see that the input power corresponding to the 1dB compression point is about 20 dBm. Since the minimum measurable output power is 37 dBm, the 1dB compression DR of the proposed MPF is 57 dB. When the power of the input signal increases, more and more power of the incident light wave will be distributed to
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Fig. 13. Powers of the fundamental signal and the thirdorder intermodulation V). terms as a function of the input power of the input signal (
Fig. 12. Frequency response of the MPF using the second PSFBG at different input signal power levels. (a) 5 dBm. (b) 15 dBm. (c) 35 dBm.
highorder sidebands, which leads to the power reduction of the recovered signal and the fast decrease of the frequency response of the MPF at the transmission peak. Due to the fact that the frequency response of the MPF is determined by the PSFBG, the change of the power of the input signal within the DR would not distort the profile of the transmission band of the MPF. Fig. 12 shows the frequency responses of the MPF using the second PSFBG at different input signal power levels. From Fig. 12, we can see that as the power of the input signal decreases, the profile of the transmission band of the MPF barely distorted. Thus, as the power of the input signal decreases, we
can see that the power of the recovered signal decreases and the ratio of the transmission peak to the sidelobe also decreases. The DR can also be characterized by the spuriousfree dynamic range (SFDR). Assume that two closely spaced microwave signals, and , are applied to the input of the MPF, where and are angular frequencies, and are the initial phases of the two microwave signals, and the two signals have identical amplitudes. The electrical field at the output of the phase modulator can be expressed as (20), shown at the bottom of this page, where the highorder sidebands ( ) are ignored due to their relatively low power levels when the phase modulation index is small. Assume that PSFBG is used to suppress the firstorder sideband of the phasemodulated light wave, which is . After heterodyning at the PD, two thirdorder intermodulation terms would occur at and . In the following, we will calculate the power of the thirdorder intermodulation term at . To simplify the calculation, we consider the nature of the phase modulation: a phasemodulated signal will not generate any microwave signal, except a dc if directly detected at a PD. Based on this property, if the sideband at is not removed by the PSFBG, the thirdorder intermodulation term at generated by beating the sidebands at and would have an equal amplitude, but opposite phase with that generated by beating all other sidebands. Thus, the power of the thirdorder intermodulation term at
(20)
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when the PSFBG is used to remove can be obtained by calculating the power of the term generated by only beating the sidebands and . Thus, the power of the thirdorder intermodulation term at can be expressed as
(21) Based on (19) and (21), we can plot the output powers of the fundamental and the thirdorder intermodulation terms as a function of the input power, as shown in Fig. 13. The thirdorder intercept point is about 26 dBm. Considering the minimum detectable signal level in the proposed system, which is decided by the noise floor, is 130 dBm/Hz, the SFDR is about 81 dB Hz . IV. CONCLUSION A simple and novel approach to implementing a narrowpassband and frequencytunable MPF based on PM–IM conversion employing a phase modulator and a PSFBG was proposed and experimentally demonstrated. A theoretical analysis was performed in which the value of the phase shift and the location of the phase shift in the PSFBG on the frequency response of the MPF were studied. Two PSFBGs with different reflection bandwidths and phaseshift values introduced at the center of the gratings were fabricated and incorporated into the proposed MPF. For the two PSFBGs, the 3dB bandwidths of the MPF were 120 and 60 MHz and the tunable ranges were 5.5 and 15 GHz. Both the width of the passband and the tunable range could be further improved by using a PSFBG with a narrower notch and a wider reflection bandwidth. The key advantage of the proposed technique is that the MPF can be tuned with a large tunable range up to tens of gigahertz and high tuning speed, which is difficult for a purely electronic microwave filter. In addition, the notch profile can be controlled, which enables the design and implementation of an MPF with a specific frequency response, such as a passband with a flat top and sharp transitions. However, due to the low power handling capability of the PD, the insertion loss of the MPF is large. A solution is to use a high powerhandling PD. ACKNOWLEDGMENT The authors gratefully acknowledge TeraXion Inc., Quebec City, QC, Canada, for providing the PSFBGs used in the experiment.
[4] J. Capmany, B. Ortega, and D. Pastor, “A tutorial on microwave photonic filters,” J. Lightw. Technol., vol. 24, no. 1, pp. 201–229, Jan. 2006. [5] B. Vidal, T. Mengual, C. IbanezLopez, and J. Marti, “WDM photonic microwave filter with variable cosine windowing based on a DGD module,” IEEE Photon. Technol. Lett., vol. 18, no. 21, pp. 2272–2274, Nov. 2006. [6] D. Pastor, B. Ortega, J. Capmany, S. Sales, A. Martinez, and P. Muñoz, “Optical microwave filter based on spectral slicing by use of arrayed waveguide gratings,” Opt. Lett., vol. 28, no. 19, pp. 1802–1804, Oct. 2003. [7] J. Mora, B. Ortega, A. Díez, J. L. Cruz, M. V. Andrés, J. Capmany, and D. Pastor, “Photonic microwave tunable singlebandpass filter based on a Mach–Zehnder interferometer,” J. Lightw. Technol., vol. 24, no. 7, pp. 2500–2509, Jul. 2006. [8] K. Zhu, H. Ou, H. Fu, E. Remb, and S. He, “A simple and tunable singlebandpass microwave photonic filter of adjustable shape,” IEEE Photon. Technol. Lett., vol. 20, no. 23, pp. 1917–1919, Dec. 2008. [9] E. Hamidi, D. E. Leaird, and A. M. Weiner, “Tunable programmable microwave photonic filters based on an optical frequency comb,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 11, pp. 3269–3278, Nov. 2010. [10] N. You and R. A. Minasian, “A novel high optical microwave processor using hybrid delayline filters,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 7, pp. 1304–1308, Jul. 1999. [11] J. Capmany, “On the cascade of incoherent discretetime microwave photonic filters,” J. Lightw. Technol., vol. 24, no. 7, pp. 2564–2578, Jul. 2006. [12] B. Ortega, J. Mora, J. Capmany, D. Pastor, and R. GarciaOlcina, “Highly selective microwave photonic filters based on active optical recirculating cavity and tuned modulator hybrid structure,” Electron. Lett., vol. 41, no. 20, pp. 1133–1135, Sep. 2005. [13] E. Xu, X. Zhang, L. Zhou, Y. Zhang, Y. Yu, X. Li, and D. Huang, “Ultrahigh microwave photonic filter with Vernier effect and wavelength conversion in a cascaded pair of active loops,” Opt. Lett., vol. 35, no. 8, pp. 1242–1244, Apr. 2010. [14] B. Vidal, M. A. Piqueras, and J. Martí, “Tunable and reconfigurable photonic microwave filter based on stimulated Brillouin scattering,” Opt. Lett., vol. 32, no. 1, pp. 23–24, Jan. 2007. [15] S. Chin, L. Thevenaz, J. Sancho, S. Sales, J. Capmany, P. Berger, J. Bourderionnet, and D. Dolfi, “Broadband true time delay for microwave signal processing, using slow light based on stimulated Brillouin scattering in optical fibers,” Opt. Exp., vol. 18, no. 21, pp. 22599–22613, Oct. 2010. [16] X. Yi and R. A. Minasian, “Microwave photonic filter with single bandpass response,” Electron. Lett., vol. 45, no. 7, pp. 362–363, Mar. 2009. [17] J. Palací, G. E. Villanueva, J. V. Galán, J. Martí, and B. Vidal, “Single bandpass photonic microwave filter based on a notch ring resonator,” IEEE Photon. Technol. Lett., vol. 22, no. 17, pp. 1276–1278, Sep. 2010. [18] F. Zeng and J. P. Yao, “Investigation of phase modulator based alloptical bandpass microwave filter,” J. Lightw. Technol., vol. 23, no. 4, pp. 1721–1728, Apr. 2005. [19] Y. Painchaud, M. Aubé, G. Brochu, and M. Picard, “Ultranarrowband notch filtering with highly resonant fiber Bragg gratings,” in Bragg Gratings, Photosensitivity, and Poling in Glass Waveguides, OSA Tech. Dig., 2010, Art. ID BTuC3, [CD ROM]. [20] G. Qi, J. P. Yao, J. Seregelyi, C. Bélisle, and S. Paquet, “Optical generation and distribution of continuously tunable millimeterwave signals using an optical phase modulator,” J. Lightw. Technol., vol. 23, no. 9, pp. 2687–2695, Sep. 2005. [21] T. Erdogan, “Fiber grating spectra,” J. Lightw. Technol., vol. 15, no. 8, pp. 277–1294, Aug. 1997. [22] A. Ramaswamy, M. Piels, N. Nunoya, T. Yin, and J. E. Bowers, “High power silicongermanium photodiodes for microwave photonic applications,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 11, pp. 3336–3343, Nov. 2010. [23] C. L. Goldsmith, G. A. Magel, B. M. Kanack, and R. J. Baca, “Coherent combining of RF signals in a travelingwave photodetector array,” IEEE Photon. Technol. Lett., vol. 9, no. 7, pp. 988–990, Jul. 1997.
REFERENCES [1] J. Capmany and D. Novak, “Microwave photonics combines two worlds,” Nat. Photon., vol. 1, no. 6, pp. 319–330, Jun. 2007. [2] J. Yao, “Microwave photonics,” J. Lightw. Technol., vol. 27, no. 3, pp. 314–335, Feb. 2009. [3] C. K. Madsen and J. H. Zhao, Optical Filter Design and Analysis, A Signal Processing Approach. New York: Wiley, 1999.
Wangzhe Li (S’08) received the B.Eng degree in electronic science and technology from Xi’an Jiaotong University, Xi’an, China, in 2004, the M.Sc degree in optoelectronics and electronic science from Tsinghua University, Beijing, China, in 2007, and is currently working toward the Ph.D. degree in electrical
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engineering at the School of Electrical Engineering and Computer Science, University of Ottawa, Ottawa, ON, Canada. His current research interests include photonic generation of microwave and terahretz signals.
Ming Li (S’08–M’09) received the Ph.D. degree in electrical and electronics engineering from the University of Shizuoka, Hamamatsu, Japan, in 2009. In April 2009, he joined the Microwave Photonics Research Laboratory, School of Electrical Engineering and Computer Science, University of Ottawa, Ottawa, ON, Canada, as a Postdoctoral Research Fellow. His current research interests include advanced FBGs and their applications to microwave photonics, ultrafast optical signal processing, arbitrary waveform generation, and optical microelectromechanical systems (MEMS) sensing.
Jianping Yao (M’99–SM’01–F’12) received the Ph.D. degree in electrical engineering from the Université de Toulon, Toulon, France, in 1997. In 2001, he joined the School of Electrical Engineering and Computer Science, University of Ottawa, Ottawa, ON, Canada, as an Assistant Professor. In 2003, he became an Associate Professor, a Full Professor in 2006, and in 2007, he became the University Research Chair. From July 2007 to June 2010, he was the Director of the Ottawa–Carleton Institute for Electrical and Computer Engineering. Prior to joining the University of Ottawa, from 1999 to 2011, he was an Assistant Professor with the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore. He has authored or coauthored over 360 papers, including over 200 papers in peerreviewed jour
nals and 160 papers in conference proceedings. He is an Associate Editor for the International Journal of Microwave and Optical Technology. His research has focused on microwave photonics, which includes photonic processing of microwave signals, photonic generation of microwave, millimeter wave and terahertz, radiooverfiber, ultrawideband (UWB) over fiber, and photonic generation of microwave arbitrary waveforms. His research also covers fiber optics and biophotonics, which includes fiber lasers, fiber and waveguide Bragg gratings, fiberoptic sensors, microfliudics, optical coherence tomography, and Fouriertransform spectroscopy. He has been a a Principal Investigator on over 20 projects, including five strategic grant projects funded by the Natural Sciences and Engineering Research Council of Canada (NSERC). Dr. Yao is a Registered Professional Engineer of the Province of Ontario. He is a Fellow of the Optical Society of America (OSA). He is a Fellow of the IEEE Microwave Theory and Techniques Society (IEEE MTTS) and the IEEE Photonics Society. He is on the Editorial Board of the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. He is a chair of numerous international conferences, symposia, and workshops, including vice Technical Program Committee (TPC) chair of the 2007 IEEE Microwave Photonics Conference, TPC cochair of the 2009 and 2010 Asia–Pacific Microwave Photonics Conference, TPC chair of the HighSpeed and Broadband Wireless Technologies Subcommittee of the 2009, 2010, 2011, and 2012 IEEE Radio Wireless Symposium, TPC chair of the Microwave Photonics Subcommittee of the 2009 IEEE Photonics Society Annual Meeting, TPC chair of the 2010 IEEE Microwave Photonics Conference, and general cochair of 2011 IEEE Microwave Photonics Conference. He is also a committee member of numerous international conferences. He was the recipient of the 2005 International Creative Research Award of the University of Ottawa and the 2007 George S. Glinski Award for Excellence in Research. He was a recipient of a 2008 NSERC Discovery Accelerator Supplements Award.
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A 2D Electronically Steered PhasedArray Antenna With 2 2 Elements in LC Display Technology Onur Hamza Karabey, Student Member, IEEE, Alexander Gaebler, Student Member, IEEE, Sebastian Strunck, Student Member, IEEE, and Rolf Jakoby, Member, IEEE
Abstract—For the first time, a 2D electronically steered phasedarray antenna with a liquidcrystal (LC)based variable delay line is presented. The structure, which is designed at 17.5 GHz, consists of a 2 2 microstrip patch antenna array, continuously variable delay lines with a novel geometry, RF feeding, and biasing networks. The expected insertion loss of the variable delay line is less than 4 dB with a maximum differential phase shift of 300 . During the measurements, the antenna is steered by applying an appropriate dc biasing in the range of 0–15 V to the variable delay lines. It is also shown that the return loss is always better than 15 dB at the operating frequency when the antenna is steered. The antenna is implemented by adapting the wellestablished LC display technology. It utilizes automated manufacturing techniques enabling a lowcost fabrication of larger arrays even for a low volume production. The proposed antenna concept is suited for applications, where antennas are aimed to be mounted close or being even integrated into the structure for some esthetic reasons, e.g., in a rooftop or body of a vehicle for terrestrial and satellitebased services. This research advances the stateoftheart for LCbased reconfigurable antennas. Index Terms—Beam steering, liquid crystal (LC), microstrip antenna arrays, passive circuits, phase shifters, planar arrays, variable delay lines.
I. INTRODUCTION
D
URING THE last two decades, there has been remarkable demand to provide terrestrial and satellite communications and broadcasting systems for mobile terminals [1]–[3]. In this context, phasedarray antennas have been studied intensively [4] for military and industry groundstation applications, including mobile terminals such as airborne [5], ship borne [6], or automobiles [7]. Most of the phasedarray antennas are controlled by using a hybrid tracking method, where the antenna is steered electronically in an elevation plane and mechanically in an azimuth plane [8], [9]. These architectures allow wideangle scanning of flat arrays with a negligible gain loss [10]. However, the antennas are heavy and occupy high volume because of the mechanical systems. For mobile terminals, not only the high performance, but also the flatness and low profile of the antenna are required. Manuscript received September 30, 2011; revised January 14, 2012 and January 25, 2012; accepted January 30, 2012. Date of publication March 15, 2012; date of current version April 27, 2012. This work was supported by Merck KGaA. The authors are with the Institute of Microwave Engineering and Photonics (IMP), Technische Universität Darmstadt, 64283 Darmstadt, Germany (email: [email protected]) Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2187919
Similar to a car collision avoidance radar [11], the phased arrays should be integrated into the structure of the mobile terminal, e.g., into the rooftop or body of a vehicle. Planar phasedarray antennas based on RF microelectromechanical system (RF MEMS) [12], [13] and monolithic microwave integrated circuit (MMIC) [14], [15] have been demonstrated for  and bands. RF MEMS systems offer a better performance compared to MMICs because of lower insertion loss (IL) of the phase shifters [16]. Nonetheless, their practical implementation is challenged by the environmental conditions, and therefore, they require hermetic packaging. Hence, different microwave materials, including flexible liquidcrystal (LC) polymer [17] and lowtemperature cofired ceramic (LTCC) [18], have been used to reduce the packaging cost and to improve the system integration of RF MEMSbased antennas. Recently, the RF MEMS switches and a MMICbased lownoise amplifier are combined in one block [19] and integrated into a band active phasedarray antenna [7] for a costeffective antenna production. Planar phasedarray antennas can also be implemented by using tunable dielectrics. For instance, barium–strontium–titanate (BST)based phasedarray antennas have been studied in [20]–[22]. BSTbased components have relatively high band, whereas their performance for frequencies below performances decrease considerably beyond this frequency because of increasing dielectric losses [23]. In contrast, the dielectric loss of LC, which is another tunable material, decreases with an increasing frequency, having high performances generally above 10 GHz [24], [25]. In [26], an electronically steered band is presented. It phasedarray antenna operating at includes a 4 4 tapered slot array and LCfilled LTCC phase shifters. The main beam is steered 30 in one dimension only. This is due to the fact that the proposed phase shifter is relatively long and therefore does not allow to feed each radiating element individually. Reconfigurable reflectarrays are also implemented by using the LC technology [27]–[29]. However, they are not preferred for compact mobile terminals because they require an offset feed antenna, which increases the overall profile of the antenna system. Several other LCbased tunable antennas and components, including optically steered phased arrays [30], [31], microstrip patch antennas [32], filters [33], and phase shifters [34]–[38], have been demonstrated. As shown in these previous studies, the planar devices filled with LC combine the key benefits of lowprofile, lightweight, lowcost, and continuous tuning. In this paper, a novel 2D electronically steered phasedarray antenna is proposed with the LC material for the first time.
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TABLE I ELECTRICAL PROPERTIES OF USED SUBSTRATES
Fig. 1. Schematics of the phasedarray antenna based on LCD technology. (a) Top view. (b) Bottom view. (c) Cross section.
An innovative antenna topology is presented for a flat and low profile phasedarray antenna, which is implemented by using wellestablished LC display (LCD) technology enabling lowcost fabrication. A demonstrator is designed to operate at 17.5 GHz and its main beam can be steered continously. It includes a 2 2 microstrip patch antenna array, LCbased variable delay lines, an RFfeeding network, and a dc biasing network. To the authors’ knowledge, this research advances the stateoftheart for the LCbased electronically steered antennas, which are limited to scan only in 1D. This is achieved by implementing the LC delay lines in a more compact way compared, for example, to [34], by means of a novel geometry and by incorporating them with the biasing network on the same wafer as the antenna element. It is also the first time that the LCD technology [39] is adapted to fabricate a phasedarray antenna. The tunable LC material is encapsulated between the two glass substrates, which are called front and back glass substrates. All components of the antenna are implemented in these three layers. A required cavity for LC is accomplished by using micropearls that are 100 m in diameter. In contrary to LCDs, no polarizer is required since the RF propagation is of interest instead of the light propagation. The fabrication cost of the larger arrays can be reduced considerably since the mature and automated display manufacturing techniques are utilized. The proposed antenna can be customized to meet size and operating frequency needed for a given application. In Section II, the proposed antenna concept and its fabrication are described. Section III discusses the design and measurements of the novel LCbased variable delay line, the microstrip patch antenna, and the dcblocking structure used in the antenna. The measurement results of the phased array are presented in Section IV, and finally, a conclusion is given in Section V. II. PHASEDARRAY CONCEPT AND FABRICATION Schematics of the phased array with 2 2 elements are given in Fig. 1(a) and (b) for the top and bottom views, respectively.
As shown in the cross section in Fig. 1(c), the microstrip patch antenna array is fabricated on the front glass substrate. The ground electrode includes slots overlying the microstrip patches to form an aperture coupling between the patch antennas and the variable delay lines realized on the bottom. The LC delay lines and the RFfeeding network are implemented in inverted microstrip line topology (IMSL) [34]. Their signal electrodes are mounted on the top side of the back glass substrate. Contrary to [34], the delay lines are meandered in spiral geometry [see Fig. 1(b)]. This geometry features several improvements that are discussed in Section III. The tunable LC material is contained between the two glass substrates. Hence, the electrical characteristics of the delay line is mainly determined by the LC material [40]. The electrical properties and the thickness of the substrates used in this study are given in Table I. The LC molecules are uniaxial anisotropic materials [39]. When they are exposed to an RF signal, they feature different polarization depending on how the RF signal is incident on the molecules, resulting in different macroscopic permittivities. Hence, a desired permittivity can be achieved by controlling the molecule orientation with respect to the RF field. In this study, alignment of molecules is controlled by using two methods simultaneously [41]. First, the inner sides of the front and back glasses are coated with an alignment layer that anchors the molecules parallel to the surface. Second, when a biasing voltage is applied across the delay line signal electrode and the ground electrode, the molecules tend to orient parallel to the applied biasing field. The resultant orientation of the LC molecules, and therefore, the permittivity of the LC layer of the delay lines, are determined by equilibrium between the applied electrical force and the anchoring forces because of the alignment layer. Therefore, a continuous tunability of the LC material is possible depending on the applied bias voltage. The variable delay lines are connected to the RFfeeding network through a dcblocking structure to bias the delay lines separately. The operation principle of the dcblocking structure is similar to that of a coplanar waveguide (CPW) to microstrip line transition [42]. A CPW is implemented on the IMSL ground plane. The RF signal, i.e., which is delivered by the feeding network, is first coupled to the CPW line and then coupled from the CPW to the LC delay line. Therefore, a contactless RF interconnection is accomplished between the feeding network and variable delay line. An interdigital capacitor or coupled lines can also be used. However, the proposed structure is chosen after a comparison of different possibilities by doing circuit simulations. It has been found that for a similar RF performance, the required electrode dimensions and the gaps between the electrodes are relatively large for the proposed structure. This leads to an easy fabrication of the antenna.
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Fig. 3. Layout of the spiral delay line. (right) Layout is flipped long the horizontal symmetry axis.
Fig. 2. Schematic overview of the fabrication processes. Fabrication of the phasedarray antenna based on LCD technology. (a) (5 nm) chromium/(60 nm) gold seed layer is evaporated. (b) Photoresist is applied and delevoped. (c) Gold electrode (2 m) is electroplated. (d) Photoresist is removed and the seed layer is etched. (e) Same processes are repeated for the other side of the glass after protecting the processed side with the photoresist. (f) Substrate is diced. (g) Each substrate is coated with an alignment layer ( 50 m). (h) Spacers (100 m) are formed on the top. Finally, the two substrates are aligned and bonded.
A schematic overview of the fabrication processes is given in Fig. 2. Both sides of a large glass substrate are processed one by one by using the same lithography processes. These processes are chromium (Cr)/gold (Au) evaporation, photolithography, Au plating, and the wet etching. When the lithography is completed, the substrate is diced precisely, i.e., m, into two pieces. Bottom sides of the substrates are coated with an alignment layer. After the alignment layer is applied, appropriate spacers, i.e., micro pearls, are developed on the substrates to maintain a constant cavity height between the substrates. The glass layers are then aligned under a microscope by means of complementary markers on different layers. Hence, the transparent glass is preferred for the LC technology. Finally, the LC is filled and the structure is sealed to contain the LC material between the two substrates [see Fig. 1(c)]. III. COMPONENT DESIGN AND VERIFICATION Before the complete antenna array is built, each component of the antenna is individually designed and tested to characterize its performances and to identify potential improvements. In the following, design details, simulations, and measurement results of the variable delay line, microstrip patch antenna, and the dcblocking structure are discussed. A. Variable Delay Line Based on LC A variable delay line, which operates at 17.5 GHz, should have a physical length enabling a maximum differential phase shift when the TUD566 type LC is used [36]. This length is relatively long because an optimum element spacing in an array is limited to 0.5 0.65 preventing grating lobes at widescanning angles [43]. Hence, for the 2D steerable phased array, the 5 long delay line has to be implemented into the limited area of the radiating element, which is less than at the operating frequency.
Fig. 4. (a) Photograph and (b) schematic of the meander IMSL variable delay line. (Linewidth is 0.2 mm.)
One possible solution is to meander the variable line [34]. Such phase shifters have been only considered as single tunable components up to now. However, when their integration into an antenna system is also taken into account, a different geometry can improve the delay line performances. In this study, a novel geometry, which is a spiral geometry, is proposed for the IMSL delay lines, as shown in Fig. 3. The coupling of the RF signal between the delay line and the radiating element is accomplished in the center of the structure. As an advantage, when the line geometry is flipped along a horizontal symmetry axis passing through the center, the input port shifts to the other side, whereas the coupling point still remains in the center. For the antenna, this allows flipping the delay lines to design a more compact RFfeeding network. Simultaneously, the distance between the radiating elements is kept constant. Nevertheless, such a delay line cannot be measured as a single component since its output port, i.e., the coupling point, is located inside the LC sandwich structure [see Fig. 1(c)]. For the measurements, lowloss RF vertical interconnects through the glass substrate are required. However, this is avoided to prevent LC leakage and air bubbles in the structure. Therefore, a conventional meander delay line, which consists of two accessible ports, is fabricated and measured instead of the spiral delay line. Based on these results, the against biasing voltage characteristic of the spiral delay line is estimated. The source of error of the estimated values are discussed in Section IV. The meander line is demonstrated in Fig. 4. It is 75mm long and utilizes an area of without the transitions at an operating frequency of 17.5 GHz. According to the simulation, the minimum gap between the electrodes is specified to be 0.6 mm without having a coupling. The measured
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Fig. 5. Measured transmission coefficients of the meander delay line. The reV) and the fullbiased ( sults are emphasized for the unbiased ( V) cases because the LC dielectric loss is maximized and minimized at the corresponding orientations of the molecules, respectively.
Fig. 7. Measured differential phase shift meander delay line.
COMPARISON
and the calculated FoM of the
TABLE II LCBASED IMSL DELAY LINES OPERATING FREQUENCY
OF
AT
THEIR
Fig. 6. Measured reflection coefficients of the meander delay line.
transmission and the reflection coefficients of the meander delay line are given in Figs. 5 and 6, respectively. During the measurements, a dcbiasing voltage , which is in the range of 0–40 V, is applied in step of 1 V across the delay line signal electrode and the ground. It has been seen that the electrical characteristics of the delay line remain constant for the bias voltages higher than 25 V. This shows that the molecules are aligned completely parallel to the applied bias field when V. The average IL is about 4 dB. Meanwhile, the measured return loss is greater than 15 dB over the whole frequency range of interest and all bias voltages. An important parameter for quantifying the RF performance of a variable delay line is a frequencydependent figure of merit (FoM). This is defined by the ratio of the maximum differential phase shift and the highest IL over all tuning states [44] as given dB
(1)
In Fig. 7, the measured and the calculated FoM results of the meander delay line are plotted. Both the measured and simulated results match well. The delay line features a high FoM of about 62.5 /dB at 17.5 GHz, including the losses from the CPW to microstrip line transitions. Impacts of these transitions cannot be deembedded by using a thrureflectline (TRL) calibration because even the calibration standards have to be filled with the tunable LC material. Actually, the transitions are only being used for the characterization purpose of the delay line with onwafer probes. Simulations confirm that the insertion loss of such a transition is about 0.5 dB. Hence, a FoM of better than 90 /dB at the operating frequency is expected when the meander delay line is implemented in the phasedarray antenna. In Table II, the results of the other published variable delay lines
Fig. 8. Simulated differential phase shift and FoM of the spiral and meander delay lines without the CPW to microstrip line transitions.
based on the LC are listed. There are two main reasons that affect the performances of these delay lines. The first one is the properties of the LC material. These are the material anisotropy and dielectric loss. The second is the thickness and dielectric constant of the glass substrates [40]. The normalized maximum differential phase shift obtained in this study is maximized by selecting the glass substrate with a dielectric constant, which is as close as possible to the LC permittivies. Hence, the fringing fields are minimized and the available material tunability is used efficiently. Nevertheless, the delay line presented in [36] has higher because a novel LC material with a higher material anisotropy is used. In Fig. 8, the simulation results of the spiral and meander delay lines are given. Both delay lines are designed on the same size of area by using the identical design rules, i.e., identical minimum gap between the two electrodes. The overall length of the spiral delay line, which is 80 mm, is longer than the length of the meander line. This is due to the fact that the design area can be used more efficiently as being another advantage of the spiral geometry. Hence, of the spiral delay line is about 5% more. When a transmission line is meandered, the fringing fields increase at a point where the line is bended and this lead to an undesired coupling depending on the geometry. In Fig. 9,
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Fig. 9. Amplitude of the field for two bendings, which model the spiral (left) and meander (right) lines. The maximum field strength is normalized to 0 dB by CST Microwave Studio. The field strengths are: (a)–(c) 20, (b) 28, and (d) 12 dB. Fig. 11. Photographs of: (a) the microstrip patch antenna and (b) dcblocking structure from the bottom view. (The dimensions are given in millimeters, and in (a), the patch size is 3.4 mm 3 mm and the slot size is 1.5 mm 1 mm.)
TABLE III SIMULATED
AND MEASURED REFLECTION COEFFICIENTS OF THE RADIATING ELEMENT
Fig. 10. Measured differential phase shift of the meander delay line and of the spiral delay line over the bias voltage at 17.5 GHz. the estimated
the normalized amplitude distribution of the field around a bended electrode is given according to fullwave simulations by using CST Microwave Studio. The structure includes different bends, which model those in the spiral and meander delay lines. The coupling is less than 28 dB when the electrodes are parallel. When they are bended, the coupling increases up to 12 dB, i.e., for the bends used in the meander line. In contrary, these couplings are suppressed by using the spiral geometry because the distance between two adjacent bends is equal to . Therefore, although the spiral delay line is 5 mm longer than the meander line, its insertion loss is almost kept constant since the slight couplings at the bends are avoided. The resultant FoM of the spiral delay line is increased and is expected to be in the range of 105 /dB at the operating frequency when the delay line is integrated into the antenna. The measured differential phase shift against the biasing voltage of the meander line is given in Fig. 10 for 17.5 GHz. The same characteristic of the spiral line is estimated according to the comparisons of the two lines and formulas given in [36]. B. Single Radiating Element and DCBlocking Structure A microstrip patch antenna [see Fig. 11(a)] is fabricated and filled with LC. It is aimed to measure the performance of the aperture coupling and the resonance frequency of the patch antenna. According to the CST Microwave Studio simulations, the gain and radiation efficiency are determined as 4.4 dB and 0.6 at the resonance frequency. The simulated and measured reflection coefficients are compared in Table III. During the simulations, the electrical properties of the glass substrate, which are given at 1 MHz by the manufacturer, are used. A slight shift in the resonance frequency of the fabricated structure originates from the dielectric uncertainty of the glass substrate at 18 GHz.
Fig. 12. Magnitude of the scattering parameters of the dcblocking structure.
The dcblocking structure is designed and tested as well. A photograph and the layout details of the structure are given in Fig. 11(b). The coupling performance of the transmission lines in the dcblocking structure is significant because a poor coupling increases the antenna back radiation. Fig. 12 shows the simulated and measured scattering parameters of the dcblocking structure. When the structure is matched ( dB), the transmission is maximized. This confirms that the RF signal propagates along the structure and there is no remarkable radiation. Specifically, the insertion losses are determined as 1.23 and 1.5 dB at 17.5 GHz for the simulation and measurements, respectively. The corresponding return losses are 23 and 18.5 dB. The frequency response of the transition can be further optimized by optimizing the dimensions so that it transmits the signal only for a desired narrow band like an RF filter. In the antenna, this can be utilized to suppress the undesired signals without using an additional filter. IV. 2
2 PHASEDARRAY ANTENNA
In the phasedarray antenna, the RF signal is distributed to all delay lines equally in amplitude and in phase through microstrip line power dividers. The impedance matching of the
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Fig. 13. Layout of the 2 2 array antenna. It shows the components mounted on the top side of the back dielectric layer. These components are RF feeding network, variable delay line, biasing network, and four biasing pads.
Fig. 15. different (b) 20 and (e)
Measured reflection coefficients of the phasedarray antenna at main beam directions. The antenna is steered to the: (a) broadside, in the plane, (c) 20 in the plane, (d) 20 in the plane, 20 in the plane. (f) Simulation results for 0 V (broadside).
A. Measurement Results and Discussions
Fig. 14. Photographs of the 2 (c) Back view.
2 array antenna. (a) Top view. (b) Side view.
RF feeding network is accomplished by using standard impedance transformers. Fig. 13 shows a overview of the back substrate. Although the structure is completely filled with LC, the electrical characteristics of the impedance transformers does not change when a bias voltage is applied. This is due to the fact that LC underlying the RF feeding network is not tuned because of the dcblocking structure. The applied bias voltages are delivered to the RF circuitry through high resistive bias lines. The bias lines are implemented on the adhesive Cr layer, which has a sheet resistance of 25.3 /sq. The linewidth is set to be 10 m to increase the bias line resistance. The measured dc resistances between the bias pads and the corresponding delay lines are in the range of 160 to 900 k depending on the line length. A 2D electronically steered phasedarray antenna shown in Fig. 14 is fabricated. As is seen from the figure, the planar antenna has an overall thickness of only 1.5 mm. To perform the measurements, an SMA and a fourpin dc connector are mounted to the array. In a real application, the received RF signal can be downconverted and then it can be delivered by using a compact MCX or SMD RF connector, e.g., an IPEX MHF connector. Another antenna without the biasing lines is fabricated as well to use as a reference antenna for quantizing the effects of the Cr bias lines on the antenna characteristics.
The measured reflection coefficients of the prototype are presented in Fig. 15. For the unbiased case, the main beam points out the broadside direction with a return loss better than 20 dB at 17.5 GHz. When it is steered, the reflections reduce to 15 dB. The small variations are due to the fact that the microstrip patch array is fabricated on the glass layer, and therefore, its resonance frequency is not affected by steering. Nevertheless, a slight change occurs because the efficiency of aperture coupling depends on the LC material. The reference antenna, on the other hand, has 10dB better return loss than that of the steerable antenna. Empirical studies show that the impact of the bias lines on the RF circuitry can be negligible if the line resistance is higher than 3 M . Although the Cr material affects the RF circuitry, the measured return losses are still practical, and therefore, considering the fabrication simplicity, the Cr adhesive layer can be used for implementing the bias lines. The radiation pattern measurements of the phased array are performed in an anechoic chamber. The RF power received by the antenna is recorded by a power meter. The antenna is mounted on top of a turn table and the beam steering in the and plane is measured separately. Since the antenna includes 2 2 elements, the variable delay lines in the same column are biased together. Therefore, the antenna is steered by applying two bias voltages, one for each column, through a bias tee. In fact, one of these voltages is varied while the other one is kept at 0 V to steer the beam direction . To obtain an optimum radiation pattern, each delay line has to be characterized individually because of possible fabrication tolerances. This can be done by performing nearfield measurements, which will be the subject of another paper. The antenna gain is determined for different beam directions by using the gain comparison technique [17]. Later on, these results are compared with estimated values, which are calculated according to Fig. 10. For this purpose, the beam directions and the corresponding antenna gain are determined for a given differential phase shift by using CST Microwave Studio. When the measured and simulated data are compared, it has been recognized that higher bias voltages, which are about 6.3 V, were applied in the measurements. This is because of the voltage drop in the high resistive biasing network used in the measurement setup. The measured and
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Fig. 16. Estimated and measured radiation characteristics of the phasedarray antenna.
Fig. 17. Measured and simulated antenna gains along the plane for . The solid and dashed lines represent the measured and simulated values, respectively. The measured raw data are smoothed by using a MATLAB fifthorder moving average function. The dashed lines are normalized to the maximums of when the bias voltages the corresponding measurements. ( V, when V and V and when V and V.)
estimated gains in the  and plane are plotted in Fig. 16 for different beam directions. The measured gains are 0.5–1.5 dB less than the estimated values because of two expected reasons. First, the Cr bias lines increase the delay line insertion loss, which reduces the transmission, and therefore, the antenna gain. Second, the connections and adaptors used in the measurement setup add additional losses. Due to the fabrication tolerances, the measured gains in the  and plane differ less than 1 dB. Additionally, the measured farfield radiation patterns are given in Figs. 17–20 for beamsteering in the  and plane. The beamsteering measurements in the plane (seeFigs. 17 and 18) are also compared to the simulation results, which shows a good agreement of the simulated and measured data for a given beam direction. As being a small demonstrator with 2 2 elements and having an element spacing of , the antenna gain reduces and the sidelobe level (SLL) increases at widescanning angles. For instance, for , the gain loss is about 2 dB and the SLL is 4 dB, which are also confirmed by the simulations. In particular, as shown in Fig. 20, when the main beam is steered to , a second lobe at occurs that is almost equal to the main lobe. Furthermore, according to simulations, a larger size of the proposed phasedarray antenna, e.g., with 16 16 elements, can be steered to with an SLL of 11 dB. Table IV compares the results obtained in this study and those presented in the literature. Here, electronically steered and
Fig. 18. Measured and simulated antenna gains along the plane for when V and V, ( V and V and when V.) and
. when V
Fig. 19. Measured antenna gains along the V and V, V and when
when V and V.)
plane for when V and
Fig. 20. Measured antenna gains along the plane for when V and V, V and V and when V.)
.(
.( when V and
planar phasedarray antennas, which are designed to operate higher than 10 GHz, are given. These antennas have planar architectures, which enables the body integration. The antenna proposed in this study has 2D beamsteering capability because of the multilayer concept and the usage of the compact delay lines. To the authors’ knowledge, such a electronically steered phasedarray antenna is presented by using the LC technology for the first time. The antenna presented in [7] is also designed for a 2D beam steering application, whereas the main beam is steered by using a hybrid tracking technique. Therefore, the antenna profile is increased considerably. The antennas
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TABLE IV COMPARISON OF ELECTRONICALLY STEERED PLANAR PHASEDARRAY ANTENNAS: PROPOSED AND OTHER PUBLISHED ANTENNA ARRAYS
demonstrated in this study and in [22] are continuously steerable because of the used technologies. The others can point the main beam direction toward predefined beam angles, which are defined by the resolutions of their tunable components. The gain measured in this study can be compared to the one given in [17] since both have 2 2 radiating elements and operate at close frequencies. The LCbased antenna provides 1.8 dB less gain than the one reported in [17]. This is mainly due to the fact that the LC delay line used in this study is designed for wideangle scanning applications. Therefore, it provides a maximum differential phase shift as higher as 300 with an insertion loss of 4 dB. However, when the main beam is steered in the range of 8 to 8 only, similar to [17], an LC delay line with a of 33 is required. The corresponding maximum insertion loss is about 0.5 dB, according to the measured FoM of the delay line, which is 62.5 dB. Hence, for a narrowangle scanning application of a small array, the gain of the proposed antenna can be increased by reducing the delay line insertion loss. V. CONCLUSION AND OUTLOOK For the first time, a 2D electronically steered phasedarray antenna was presented by using anisotropic LC material. The proposed antenna consists of 2 2 radiating elements, variable delay lines, dcblocking structures, RF feeding, and biasing networks. The components were also individually realized and measured in order to characterize their performances and to identify potential improvements. The LCbased variable delay line is implemented in IMSL with a novel geometry. Additionally, they are combined with the bias lines on the same wafer. As a result, each radiating element is fed through the variable delay leading to the 2D steering capability. The measured antenna return losses were about 15 dB at the operating frequency of 17.5 GHz for different beam directions. Several measured farfield radiation patterns were presented for different beam directions and compared with the simulations. It is also the first time that the antenna was fabricated by using LCD technology. Therefore, the manufacturing costs can be reduced considerably for low volume production of larger arrays. The antenna was implemented into three dielectric layers with an overall thickness of 1.5 mm only. Hence, it is planar and has an esthetic appearance, which is a decisive or even essential requirement for the mobile terminals such as automobile industry. A larger size of the proposed antenna can provide various services such as wireless internet, multimedia, communication, and broadcasting services from terrestrial systems and satellites to a mobile terminal.
ACKNOWLEDGMENT The authors wish to acknowledge the CST Company, Darmstadt, Germany, for providing the software and to Merck KGaA, Darmstadt, Germany, for supplying the LC sample. REFERENCES band satellitetracking, [1] A. Densmore and V. Jamnejad, “  and small reflector vehicular antenna system for mobile satellite service,” in Proc. 3rd Eur. Satellite Commun. Conf., 1993, pp. 117–121. [2] A. Miura, S. Yamamoto, N. Obara, H. Saito, T. Takahashi, H. Wakana, and M. Tanaka, “Development of a band active phased array antenna for mobile satcom stations,” in Proc. IEEE 50th Veh. Technol. Conf., Fall, 1999, vol. 2, pp. 814–818. [3] P. Mousavi, M. Fakharzadeh, S. H. Jamali, K. Narimani, M. Hossu, H. Bolandhemmat, G. Rafi, and S. SafaviNaeini, “A lowcost ultra low profile phased array system for mobile satellite reception using zeroknowledge beamforming algorithm,” IEEE Trans. Antennas Propag., vol. 56, no. 12, pp. 3667–3679, Dec. 2008. [4] D. Parker and D. C. Zimmermann, “Phased arrays—Part 1: Theory and architectures,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 3, pp. 678–687, Mar. 2002. [5] S. Taira, M. Tanaka, and S. Ohmori, “High gain airborne antenna for satellite communications,” IEEE Trans. Aerosp. Electron. Syst., vol. 27, no. 2, pp. 354–360, Mar. 1991. [6] M. Geissler, F. Woetzel, M. Bottcher, S. Korthoff, A. Lauer, M. Eube, and M. Wleklinski, “Phased array for maritime SATCOM applications,” in Proc. German Microw. Conf., 2011, pp. 1–4. [7] L. Baggen, S. Vaccaro, D. Llorens del Rio, and G. Langgartner, “Compact phased arrays for mobile terminals,” in Proc. Int. Semiconduct. Conf., 2010, vol. 01, pp. 3–9. [8] S.I. Jeon, Y.W. Kim, and D.G. Oh, “A new active phased array antenna for mobile direct broadcasting satellite reception,” IEEE Trans. Broadcast., vol. 46, no. 1, pp. 34–40, Mar. 2000. [9] M. Fakharzadeh, S. H. Jamali, P. Mousavi, and S. SafaviNaeini, “Fast beamforming for mobile satellite receiver phased arrays: Theory and experiment,” IEEE Trans. Antennas Propag., vol. 57, no. 6, pp. 1645–1654, Jun. 2009. [10] A. G. Toshev, “Multipanel concept for wideangle scanning of phased array antennas,” IEEE Trans. Antennas Propag., vol. 56, no. 10, pp. 3330–3333, Oct. 2008. [11] W. D. Jones, “Keeping cars from crashing,” IEEE Spectr., vol. 38, no. 9, pp. 40–45, 2001. [12] C. won Jung, M. jer Lee, G. P. Li, and F. De Flaviis, “Reconfigurable scanbeam singlearm spiral antenna integrated with RFMEMS switches,” IEEE Trans. Antennas Propag., vol. 54, no. 2, pp. 455–463, Feb. 2006. [13] K. Topalli, O. A. Civi, S. Demir, S. Koc, and T. Akin, “A monolithic phased array using 3bit distributed RF MEMS phase shifters,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 2, pp. 270–277, Feb. 2008. [14] S. Hong, S.G. Kim, M. R. Coutant, C. T. Rodenbeck, and K. Chang, “A multiband, compact, and fullduplex beam scanning antenna transceiver system operating from 10 to 35 GHz,” IEEE Trans. Antennas Propag., vol. 54, no. 2, pp. 359–367, Feb. 2006. [15] N. Khandelwal and R. W. Jackson, “Active antenna module for lowcost electronically scanned phased arrays,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 10, pp. 2286–2292, Oct. 2008.
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[16] N. Kingsley and J. Papapolymerou, “Organic ‘waferscale’ packaged miniature 4bit RF MEMS phase shifter,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 3, pp. 1229–1236, Mar. 2006. [17] N. Kingsley, G. E. Ponchak, and J. Papapolymerou, “Reconfigurable RF MEMS phased array antenna integrated within a liquid crystal polymer (LCP) systemonpackage,” IEEE Trans. Antennas Propag., vol. 56, no. 1, pp. 108–118, Jan. 2008. [18] W. Gautier, V. Ziegler, A. Stehle, B. Schoenlinner, U. Prechtel, and W. Menzel, “RFMEMS phased array antenna on lowloss LTCC substrate for band data link,” in Proc. Eur. Microw. Conf., 2009, pp. 914–917. [19] L. Baggen, R. Malmqvist, P. Frijlink, T. VahaHeikkila, and A. Gustafsson, “MEMS4MMIC: Innovative RFMEMS MMIC components for agile RFfrontends,” in Proc. Int. Electromagn. Adv. Appl. Conf., 2009, pp. 311–314. [20] R. R. Romanofsky, J. T. Bernhard, F. W. van Keuls, F. A. Miranda, G. Washington, and C. Canedy, “ band phased array antennas based on Ba Sr TiO thinfilm phase shifters,” IEEE Trans. Microw. Theory Tech., vol. 48, no. 12, pp. 2504–2510, Dec. 2000. [21] F. De Flaviis and N. G. Alexopoulos, “Thin ceramic ferroelectric phase shifter for steerable microstrip patch antenna array,” in Proc. 28th Eur. Microw. Conf., 1998, vol. 1, pp. 678–683. [22] M. Sazegar, Y. Zheng, H. Maune, C. Damm, X. Zhou, J. Binder, and R. Jakoby, “Lowcost phasedarray antenna using compact tunable phase shifters based on ferroelectric ceramics,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 5, pp. 1265–1273, May 2011. [23] R. Jakoby, P. Scheele, S. Muller, and C. Weil, “Nonlinear dielectrics for tunable microwave components,” in Proc. 15th Int. Microw., Radar, Wireless Commun. Conf., 2004, vol. 2, pp. 369–378. [24] S. Mueller, A. Penirschke, C. Damm, P. Scheele, M. Wittek, C. Weil, and R. Jakoby, “Broadband microwave characterization of liquid crystals using a temperaturecontrolled coaxial transmission line,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 6, pp. 1937–1945, Jun. 2005. [25] S. Bulja, D. MirshekarSyahkal, R. James, S. E. Day, and F. A. Fernandez, “Measurement of dielectric properties of nematic liquid crystals at millimeter wavelength,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 12, pp. 3493–3501, Dec. 2010. [26] B. Sanadgol, S. Holzwarth, and J. Kassner, “30 GHz liquid crystal phased array,” in Proc. Loughborough Antennas Propag. Conf., 2009, pp. 589–592. [27] W. Hu, R. Cahill, J. A. Encinar, R. Dickie, H. Gamble, V. Fusco, and N. Grant, “Design and measurement of reconfigurable millimeter wave reflectarray cells with nematic liquid crystal,” IEEE Trans. Antennas Propag., vol. 56, no. 10, pp. 3112–3117, Oct. 2008. [28] R. Cahill, J. A. Encinar, M. Arrebola, R. Simms, R. Dickie, V. F. Fusco, and N. Mitchell, “Recent progress in electronically tunable reflectarray technology using liquid crystals,” in Proc. 5th Eur. Antennas Propag. Conf. , 2011, pp. 2866–2870. [29] S. Bildik, S. Dieter, C. Fritzsch, M. Frei, C. Fischer, W. Menzel, and R. Jakoby, “Reconfigurable liquid crystal reflectarray with extended tunable phase range,” in Proc. 41st Eur. Microw. Conf., 2011, pp. 1292–1295. [30] N. A. Riza, “Liquid crystalbased optical time delay units for phased array antennas,” J. Lightw. Technol., vol. 12, no. 8, pp. 1440–1447, Dec. 1994. [31] G.A. Chakam, W. Vogel, H. Yilmaz, M. Berroth, and W. Freude, “Microstrip phased array patch antenna based on a liquid crystal phase shifter for optically generated RFsignals,” in Proc. Int. Microw. Photon. Top. Meeting, 2002, pp. 265–268. [32] L. Liu and R. J. Langley, “Liquid crystal tunable microstrip patch antenna,” Electron. Lett., vol. 44, no. 20, pp. 1179–1180, 2008. [33] F. Goelden, A. Gaebler, O. Karabey, M. Goebel, A. Manabe, and R. Jakoby, “Tunable bandpass filter based on liquid crystal,” in Proc. German Microw. Conf., 2010, pp. 98–101. [34] T. Kuki, H. Fujikake, and T. Nomoto, “Microwave variable delay line using dualfrequency switchingmode liquid crystal,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 11, pp. 2604–2609, Nov. 2002. [35] T. Kuki, H. Fujikake, T. Nomoto, and Y. Utsumi, “Design of a microwave variable delay line using liquid crystal, and a study of its insertion loss,” Electron. Commun. Jpn. II, Electron., vol. 85, pp. 36–42, 2002.
[36] S. Muller, P. Scheele, C. Weil, M. Wittek, C. Hock, and R. Jakoby, “Tunable passive phase shifter for microwave applications using highly anisotropic liquid crystals,” in IEEE MTTS Int. Microw. Symp. Dig., 2004, vol. 2, pp. 1153–1156. [37] S. Bulja and D. MirshekarSyahkal, “Meander line millimetrewave liquid crystal based phase shifter,” Electron. Lett., vol. 46, no. 11, pp. 769–771, 2010. [38] F. Goelden, A. Gaebler, M. Goebel, A. Manabe, S. Mueller, and R. Jakoby, “Tunable liquid crystal phase shifter for microwave frequencies,” Electron. Lett., vol. 45, no. 13, pp. 686–687, 2009. [39] Y. D.K. and W. S.T. , Fundamentals of Liquid Crystal Devices. New York: Wiley, 2006. [40] O. H. Karabey, B. G. Saavedra, C. Fritzsch, S. Strunck, A. Gaebler, and R. Jakoby, “Methods for improving the tuning efficiency of liquid crystal based tunable phase shifters,” in Proc. Eur. Microw. Integr. Circuits Conf., 2011, pp. 494–497. [41] F. Goelden, A. Gaebler, S. Mueller, A. Lapanik, W. Haase, and R. Jakoby, “Liquidcrystal varactors with fast switching times for microwave applications,” Electron. Lett., vol. 44, no. 7, pp. 480–481, 2008. [42] J.P. Raskin, G. Gauthier, L. P. Katehi, and G. M. Rebeiz, “Mode conversion at gcpwtomicrostripline transitions,” IEEE Trans. Microw. Theory Tech., vol. 48, no. 1, pp. 158–161, Jan. 2000. [43] C. A. Balanis, Antenna Theory Analysis and Design, 3rd ed. New York: Wiley, 2005. [44] S. Gevorgian, Ferroelectrics in Microwave Devices, Circuits and Systems: Physics, Modeling, Fabrication and Measurements. Berlin, Germany: Springer, 2009. Onur Hamza Karabey (S’08) was born in Istanbul, Turkey, in 1983. He received the B.S. degree in electrical and electronics engineering from the Middle East Technical University, Ankara, Turkey, in 2006, the M.Sc. degree in communication engineering from the Technische Universität Darmstadt, Darmstadt, Germany, in 2008, and is currently working toward the Ph.D. degree in microwave engineering at the Technische Universität Darmstadt. Since September 2008, he has been a Research Assistant with the Institute of Microwave Engineering and Photonics, Technische Universität Darmstadt. His current research is focused on material characterization for microwaves and design of tunable passive microwave components and circuits based on LCs.
Alexander Geabler (S’06) was born in Cottbus, Germany, in 1977. He received the Dipl.Ing.degree in electrical engineering and B.S. degree in information and media technique from the Brandenburgische Technische Universität Cottbus, Cottbus, Germany, in 2005 and 2006, respectively. Since 2006, he has been a Research Assistant with the Institute of Microwave Engineering and Photonics, Technische Universität Darmstadt, Darmstadt, Germany. His research is currently focused on characterization and modeling of LCs for microwave applications and design of waveguidefilled LCbased phase shifters.
Sebastian Strunck (S’09) was born in Bremen, Germany, in 1981. He received the Dipl.Ing. (B.A.) in electrical engineering from the University of Cooperative Education, Mannheim, Germany, in 2007, and the M.Sc. degree from the University of Applied Science Mannheim, Mannheim, Germany, in 2009. Since 2009, he has been a Research Assistant with the Institute of Microwave Engineering and Photonics, Technische Universität Darmstadt, Darmstadt, Germany. His research is currently focused on waveguidefilled LCbased phase shifters and biasing techniques for LCbased devices.
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Rolf Jakoby (M’97) was born in Kinheim, Germany, in 1958. He received the Dipl.Ing. and Dr.Ing. degrees in electrical engineering from the University of Siegen, Siegen, Germany, in 1985 and 1990, respectively. In January 1991, he joined the Research Center, Deutsche Telekom, Darmstadt, Germany. Since April 1997, he has been a Full Professor with the Technische Universität Darmstadt, Darmstadt, Germany. Its interdisciplinary research is focused on RF identification (RFID), microwave and millimeterwave detectors and sensors for various applications, and in particular on reconfigurable RF passive devices by using novel approaches with metama
terial structures, LC, and ferroelectric thick/thinfilm technologies. He is the EditorinChief of FREQUENZ. He has had active participation in nine patents. Dr. Jokoby is a member of the Society for Information Technology (ITG), VDE. He is a member of the IEEE Microwave Theory and Techniques Society (IEEE MTTS) and the IEEE Antennas and Propagation Society (IEEE APS). He has organized various workshops and has been a member of various Technical Program Committees (TPCs). He was the chairman of European Microwave Conference 2007 and German Microwave Conference 2011. He was the recipient of a 1992 award of CCI Siegen and in 1997, the ITG Prize for a publication appearing in the IEEE TRANSACTIONS ON ANTENNAS AND PROPAGATION. He has been involved with 11 awards over the last six years.
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WBand SiliconBased Frequency Synthesizers Using InjectionLocked and Harmonic Triplers ChunCheng Wang, Student Member, IEEE, Zhiming Chen, Student Member, IEEE, and Payam Heydari, Senior Member, IEEE
Abstract—Two monolithically integrated Wband frequency synthesizers are presented. Implemented in a 0.18 m SiGe BiCMOS with of 200/180 GHz, both circuits incorporate the same 30.3–33.8 GHz PLL core. One synthesizer uses an injectionlocked frequency tripler (ILFT) with locking range of 92.8–98.1 GHz and the other employs a harmonicbased frequency tripler (HBFT) with 3dB bandwidth of 10.5 GHz from 90.9–101.4 GHz, respectively. The measured RMS phase noise for ILFT and HBFTbased synthesizers are 5.4 and 5.5 (100 kHz to 100 MHz integration), while phase noise at 1 MHz offset is and dBc/Hz, respectively, at 96 GHz from a reference frequency of 125 MHz. The measured reference spurs are dBc for both prototypes. The combined power consumption from 1.8 and 2.5V is 140 mW for both chips. The frequency synthesizer is suitable for integration in millimeterwave (mmwave) phased array and multipixel systems such as Wband radar/imaging and 120 GHz wireless communication. Index Terms—Colpitts, frequency generation, frequency multipliers, frequency synthesis, frequency synthesizer, injectionlocked oscillators, millimeterwave oscillators, multichannel, phase locked loops, triplers, VCOs.
I. INTRODUCTION
A
CRITICAL building block in a Wband (75–110 GHz) imaging system [1], [2], a pointtopoint communication (i.e., 81–86 and 92–95 GHz bands) [3], a 100Gbps Ethernet, and a 120 GHz wireless transceiver [4] is a high performance low noise PLL. A number of Wband frequency synthesis techniques have recently been realized in SiGe BiCMOS [5]–[7] and CMOS [8]–[11] technologies. In [5], a fundamental 90 GHz dBc/Hz @ 1 MHz PLL with closedloop phase noise of offset was presented. However, the synthesizer has used a 5.6 GHz reference clock. In [8], using a 375 MHz reference fredBc/Hz @ 1 MHz quency, a 96 GHz PLL phase noise of offset was measured. Using an offset mixer for generation of Wband signal, [9] achieves a measured phase noise of dBc/Hz @ 0.25 MHz offset at 83.3 GHz output. increases, the implementaAs the operation frequency tion of low phasenoise fundamental PLL will become increasingly challenging. In an integrated PLLbased frequency synthesizer, assuming VCO phase noise dominates and other blocks Manuscript received September 30, 2011; revised November 18, 2011; accepted November 29, 2011. Date of publication January 11, 2012; date of current version April 27, 2012. This work was supported in part by an NSF Grant under Contract ECCS1002294 and in part by an SRC Grant under Contract 2009VJ1962. This paper is an expanded paper from the IEEE RFIC Symposium, June 5–10, 2011, Baltimore, MD. The authors are with Nanoscale Communication IC (NCIC) Laboratory, University of California, Irvine, CA 92697 USA (email: [email protected]; [email protected]; [email protected]). Digital Object Identifier 10.1109/TMTT.2011.2180399
in the PLL contribute negligible noise, the RMS phase noise is roughly given by [12]
(1) where is the singlesideband phase noise of the freerunfrom the carrier, and is the loop ning VCO at the offset is given by Leeson’s equation and bandwidth. The term , where and are the is proportional to oscillation amplitude and the tank quality factor, respectively. Several factors contribute to difficulty of achieving low phasenoise PLL at mmwave frequencies. From Leeson, the VCO’s phase noise is expected to degrade in proportion with begins to be dominated by capac. Moreover, the tank degrades with itances, and in particular, varactors as their of at 96 GHz). Large increasing frequency (simulated values on the order of GHz/V are commonly attained in Wband VCOs [5], [8]. Design techniques such as segmentation with switched capacitor or varactor, which is commonly are not effective for VCO used in VCO design to reduce . This is because whose resonant frequency is closer to device and interconnect parasitic starts to dominate the overall capacitance, leaving little room for any form of segmentation capacitors. inside a PLL Additionally, for a VCO with a large loop, this results in a large upconversion of noise coming from charge pump and loop filter to PLL’s center frequency. Finally, a fundamentalfrequency VCO must be accompanied by a fundamental divider, which consumes considerable power if a static architecture is used; or may limit the PLL locking range if an injectionlocked [8] divider is used. In comparison, a synthesizer comprising a subharmonic PLL followed by a frequency multiplier ( M) [13] allows a larger tuning range and a lower phase noise. Though the inband (M) due phase noise in this synthesizer is magnified by to frequency multiplication, this degradation would be exactly term in Leeson’s equation, leaving the imoffset by the and tuning range as added provement in , output swing bonuses to overall phase noise improvement. Furthermore, practical mmwave systems will require relatively large phased arrays [14] or multipixels [1]. This solution readily lowers the PLL’s operation frequency, thereby making LO routing and distribution suitable for these systems. In this paper, we present two singlechip 96 GHz frequency synthesizers using a fullyintegrated 32 GHz PLL followed by frequency tripler. Two different types of triplers are designed. The first type leverages the idea of injectionlocking oscillators
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Fig. 1. Block diagram of the Wband frequency synthesis.
(ILOs) and injects a signal into the oscillator at subharmonic frequency using a harmonic generator [15], referred hereafter, as injectionlocked frequency tripler (ILFT). The second type is based on harmonic generation and amplification, which generates the harmonics of the input signal, amplifies the desired harmonic, and filters out all other harmonics [13], referred hereafter as, harmonicbased frequency tripler (HBFT). The design has been implemented in a 0.18 m SiGe BiCMOS process GHz. featuring bipolar transistor with The PLL system is targeted for integration within a 96 GHz multipixel passive imaging system [1]. It can potentially be used in emerging 120 GHz dualconversion phasedarray systems, as described later. The paper is organized as follows. Section II discusses the architectural considerations for the PLL. The circuit design and analysis of key building blocks of the PLL are described in Section III. In Section IV, the harmonic generation using SiGe HBT is described. Section V focuses on the design of ILFT and HBFT. In Section VI, experimental results of the PLL system are presented and discussed. A comparison between the two chips is discussed in Section VII. Finally, Section VIII provides concluding remarks. II. FREQUENCY SYNTHESIS The system architecture of the Wband frequency synthesizer is depicted in Fig. 1. Loworder multipliers (i.e., doublers or triplers) are more amenable to onchip active implementation since they rely upon the nonlinearity of the transistor, where the harmonic energy decreases with frequency. In this work, the Wband signal is synthesized by cascading a frequency tripler after a Kaband (30.3–33.8 GHz) PLL. Chip A incorporates the ILFT, whereas Chip B uses the HBFT after the PLL. The Kaband PLL is comprised of a differential Colpitts VCO, a frequency divider chain with the division ratio of 256, a phase/frequency detector (PFD), a charge pump (CP), and a 3rdorder loop filter (LF). The divider chain utilizes ECL and CMOS CML circuits to realize asynchronous divideby32 and synchronous TSPC circuits to implement divideby8. Programmable PFD delay, CP current, and loop BW compensate for model inaccuracy and PVT variation. To facilitate in situ characterization of the PLL, an additional GSG pad was used to monitor the PLL’s output.
Fig. 2. Possible frequency synthesis with this PLL: (a) 120 GHz heterodyne architecture, (b) 96 GHz directconversion passive imaging, and (c) 96 GHz directconversion active imaging/communication.
Fig. 2 illustrates three possible LO generation and distribution schemes that can be implemented using the PLL system depicted in Fig. 1. Fig. 2(a) proposes a dualconversion zeroIF superheterodyne 120 GHz phasedarray transceiver. The 30 GHz LO signal is routed to both the RX and TX, where it drives a tripler and an I/Q generator to perform frequency conversion. Fig. 2(b) shows an Mpixel 96 GHz directconversion passive imaging receiver. In this case, since phase carries no information, there is no need for I/Q, and the LO is distributed to Mpixel local triplers for zeroIF downcoversion. A directconversion 96 GHz TRX for active imaging/communication is depicted in Fig. 2(c). Here, the LO is distributed to both RX and TX for both down and upconversion.
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Fig. 3. Schematic and equivalent circuit model for 32 GHz Colpitts VCO.
From the above discussion, the Wband frequency synthesis presented in this work is amenable to multichannel systems and can meet stringent phase noise requirements. Hence, this PLL system can potentially serve as the LO generation and distribution of several Wband applications as well as 120 GHz high datarate communication. Next, the circuit design details of key building blocks of the PLL are described. III. PLL BUILDING BLOCKS
Fig. 4. Emitter follower buffer (a) schematic and (b) simulated input impedance.
A. Colpitts KaBand VCO A differential commonbase Colpitts VCO with inductive degeneration is chosen for better phase noise performance [16]. The circuit schematic of the 32 GHz VCO is shown in Fig. 3. Symmetrically centertapped inductors are used for both pH and ) and emitter degenerathe load ( pH and ). The resonance frequency tion ( of the degeneration tank, occurs below the oscillator’s resonance fre, such that the degeneration impedance becomes quency expressed capacitive [17] with an effective capacitance , at . Tail as current sources composed of active devices are replaced by resistive biasing in order to avoid additional noise from bias circuitry. VCO tuning is realized using accumulationmode MOS . To enhance the and reduce the (AMOS) varactors effective , a combination of switched MOS varactors in parallel with a metalinsulatormetal (MIM) capacitor is proposed, as illustrated in Fig. 3. Also shown in Fig. 3 is a simplified halfcircuit equivalent model of the VCO. The is given by admittance looking from the inductor
where models the inductor loss, and are the equivalent shunt resistance and capacitance of the buffer. By inspection, the oscillation frequency is (4)
In bipolar design, is a function of the base resistance and frequency. Therefore, care must be taken to codesign the VCO with the buffer. This is because if the real part of the impedance looking into the buffer becomes smaller than the absolute value of the active negative resistance, then the startup oscillation condition will be compromised. For the Kaband VCO, a broadband emitter follower is used as the buffer (Fig. 4(a)). Assuming , the effective shunt resisthe buffer drives a capacitive load tance and capacitance looking into the base are calculated, as follows: (5) (6)
(2) If
, (2) is simplified to
(3)
Equation (5) shows a negative input resistance at the buffer input when . This condition can be met at lowend of mmwave frequency, as shown in Fig. 4(b). For is made negatively large such that it does not this design, present any loading to the VCO and affect the tank . It is noteworthy that this negative resistance provided by the buffer will not affect the oscillation. Therefore, either a negative or a large positive buffer impedance are both viable options.
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Fig. 7. Comparison with other stateoftheart VCOs.
Fig. 5. Measured tuning curves for 32 GHz VCO.
Fig. 8. Simplified schematic of the charge pump. Fig. 6. Measured phase noise and output power.
In designing a differential Colpitts VCO, it is very important to avoid commonmode oscillation. In commonmode, the shunt negative resistance from the emitter follower buffer is still present. Adding resistors at common nodes such as in the degenresults in higher commonerated centertapped inductor mode loss, suppressing any commonmode oscillations. Measurements of the VCO and buffer breakout have been performed onwafer with an Agilent E4448A spectrum analyzer. The VCO and the buffer consume a total of 35 mW from 2.2 V supply. In Fig. 5, the measured VCO tuning range is 30.2 to 33.9 GHz, corresponding to an 11.5% tuning range. Colpitts topology was chosen since it exhibits low phase noise [17], [18]. The measured phase noise at 1MHz offset is between and dBc/Hz with an average output power of dBm (Fig. 6). The VCO core consumes 17 mW and the output buffer consumes 18 mW, resulting in an overall FoM mW) ( [19]) of 184.7 dB. Fig. 7 compares the performance of the Colpitts VCO against other stateoftheart VCOs around the Kaband frequency. B. Loop Components: Divider, PhaseFrequency Detector (PFD), Charge Pump (CP), and Loop Filter (LF) The VCO output signal is fed back through a cascade of divideby2 circuits. The first two dividers use emittercoupled logic (ECL) topologies, while the biasing current is scaled according to the operating frequency. HBTs are biased at
peak current density [26], i.e., 8 mA/ m . Subsequent divideby2 circuits use CMOS CML latches down to 1 GHz frequency, whereafter TSPC dividers are used. This particular order resulted in optimal tradeoff between wide frequency locking under PVT variation and power consumption. The digital PFD is based on a conventional detector [27], and is designed to eliminate the region of low gain near phase lock. The elimination of the dead zone is accomplished by producing an “up” and a “down” current pulses during each cycle, even when the PLL is in lock. Programmable 2bit delay is added in feedback path for optimal closein phase noise. The simplified charge pump cell, shown in Fig. 8, is driven by digital signals UP, DWN, and their complements derived from PFD circuit. Cascode current sources reduce the effect of the VCO control voltage variation on the charge pump UP/DOWN comes within of the supply rails. currents until Moreover, the use of cascode current sources reduces the UP/DOWN current mismatch. The use of a dummy branch to is not steer the chargepump current for the duration when integrating any charge, significantly reduces the nonidealities of the charge pump including the chargeinjection and clock feedthrough cancellation. The common problem of charge sharing in charge pumps is solved by the use of a unitygain feedback opamp [28] comprised of a complementary folded cascode amplifier. For lowcost, the passive 3rdorder loop filter is implemented produces the first pole and together onchip. From Fig. 1, is used to generate a zero for loop stability. is used with
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to smoothen the control voltage ripples. and are used to further suppress reference spurs and high frequency noise. The PLL loop has been optimized for a target bandwidth of 1 MHz. In practice, the inaccuracy of onchip resistance and capacitance of loop filter and VCO gain affects the PLL bandwidth and phase margin. Therefore, programmable charge pump current and loop filter is designed for PVT variation. IV. HARMONIC GENERATION Before discussing the design of active frequency multipliers, it is instructive to study the main source of nonlinearity that generates the wanted harmonics in a bipolar transistor. We will focus our attention on the third harmonic generation, as this is the desired signal for the multiplyby3 circuit. The HICUM model provided by the foundry is used for the simulation of the HBT device. The two major nonlinearities in the HBT that cause harmonic generation are: (1) the nonlinear exponential  characteristic of the HBT, and; (2) the collector current conduction angle and clipping. The  equation of a bipolar transistor can be expressed as [29]
Fig. 9. Simulated SiGe HBT transistor ) as function of .
and its third derivative (i.e.,
(7) where and are the transistor saturation current, the forward early voltage, and the thermal voltage (i.e., , respectively. and an input tone , the For a given bias thirdorder harmonic is simply the thirdorder Fourier component, that is (8) Following the analysis in [30], (8) can be written as
(9) where . The thirdorder harmonic is simply an average of the 3rdover the input voltage swing with order derivative of . Examining the third a weighting function derivative of the HBT  transfer function, Fig. 9, we see that the main source of nonlinearity of the HBT appears in the reV), and where the gions where the device turns on ( V). Closer inspection of device is near saturation ( Fig. 9 reveals that the third derivative can be either positive or negative. Henceforth, depending on the input biasing and swing, there is an optimal point where the average integral in (9) is maximized. V. INJECTIONLOCKED AND HARMONICBASED FREQUENCY TRIPLER As discussed in Section IV, the design of an active harmonic generator relies on accurate modeling of the transistor itself, proper transistor bias for the specific harmonic required and input fundamental frequency power level. A 0dBm input power is available from the 32 GHz PLL. Based on this
Fig. 10. Simulated efficiency as a function of
.
available drive power and simulation of efficiency, defined as , Fig. 10 shows that the optimal bias voltage leading to maximum efficiency is around 0.82 V, which corresponds to Class AB region. Differential topology was chosen for the multiplier design since it offers seamless integration with the PLL output, higher output power, better linearity, and better evenorder harmonic and commonmode rejection. Next, the circuit implementation of this harmonic generator will be discussed in the context of two types of frequency triplers: (1) ILFT and (2) HBFT. A. InjectionLocked Frequency Tripler (ILFT) The schematic of the ILFT is shown in Fig. 11, which consists of two parts: (1) a pair of harmonic generating transistors , and (2) an injectionlocked oscillator (ILO). To enable compact layout yet avoid mutual and substrate noise coupling, groundshielded CPW (GCPW) lines (  ) instead of spiral inductors are used at the base, collector and emitter. The inductance values for and are 25 pH, 20 pH and 150 pH, respectively. The standalone ILFT has two modes of operation. Mode 0 (FreeRunning Operation): If no signal is applied at the input, the ILFT resembles a conventional commoncollector differential Colpitts oscillator. It is commonly assumed that the RF output taken at the collector is isolated from the resonator. However, as will be shown next, due to the Miller effect,1 the 1Smallsignal
assumption.
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Fig. 11. Schematic and simplified smallsignal equivalent circuit of ILFT.
Fig. 12. Schematic of buffer amplifier after ILFT.
parasitic capacitance reduces the negative resistance and afin Mode 0 fects the oscillation frequency. Transistors and act as capacitive degeneration and can be combined with into an effective capacitor . A simplified equivalent circuit used for the derivation of the equivalent input impedance is shown in Fig. 11. For simplicity, first assume there is no load in the collector, i.e., commoncollector. In this configuration, the real part of the input impedance is
Next, if the tank loss (in the form of parallel , then account,
(10) approaches zero, reaches a maximum value When , which is the ideal Colpitts negative resisof approaches infinity, becomes zero. Moretance. When is larger than and , the negative resistance over, when will be inversely proportional to . In (10), we assume the coleffect on lector is at AC ground. Next, we will examine the at the collector of  . the tank for a load impedance Fig. 11 shows the equivalent circuit seen at the input . (defined as considering is the effective Miller impedance seen at the base, i.e., , where is the basecollector voltage gain and is given by (11) can be inductive, resistive (at the resonant frequency), or , it is shown capacitive. For a purely inductive load, in Appendix that
(12)
(13)
) is taken into
(14) increases the output power, From (12) and (14), a higher but reduces the effective negative resistance, necessitating higher power consumption from the oscillator core. From (14), . higher inductor leads to higher To guarantee oscillation, the resultant resistance must be negative, which implies , where is (15) Therefore, at high frequencies approaching the transistor , and the high basetocollector capacitance, the i.e., lower effect of the collector load on the tank becomes significant, leading to smaller negative resistance. As in the case of 32 GHz VCO, commonmode oscillation must be avoided by quenching all high commonmode nodes. To further guarantee sufficient negative resistance margin for oscillation startup, the buffer that follows the ILFT is an inductively peaked cascode, employing capacitive degeneration to increase the input base impedance and mitigate the loading effects through the Miller effect on the tank. Fig. 12 shows the pH and fF buffer where the degeneration resonates lower than the operation frequency of the tripler, i.e., 96 GHz. The simulated effect of capacitor degeneration on the real part of the smallsignal input impedance looking into the tank (including inductor loss ) is shown in Fig. 13. It clearly displays the improvement in smallsignal negative resistance as a result of capacitor degeneration. ): Injectionlocking opMode 1 (Input @ Subharmonic eration is realized by feeding the 3rd harmonic of the input into the tank of the ILO. Transissignal generated by reuse part of the DC current of the VCO and are tors
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Fig. 15. Measured input sensitivity of ILFT breakout. Fig. 13. Simulated smallsignal input negative resistance of ILFT with the buffer loading with and without capacitive degeneration.
Fig. 16. Measured breakout of ILFT output power of harmonic across frequency. Fig. 14. Simplified layout floorplan of the ILFT (not to scale).
biased in ClassAB regime for maximum efficiency of 3rd harmonic generation, as described in Section IV. From injection locking theories [31], if phase error exists between the oscillator and the injection locking signals, the LC tank of the oscillator would create an additional phase shift to ensure the oscillation phase condition is satisfied. Using Adler’s equation [32], the locking range is given by (16) where represents the quality factor of the tank, and are the thirdharmonic injection and oscillator currents. From (16), the locking range is strongly influenced by the harmonic generator bias, which generates the desired . Although adding varactors to the tank helps improve the locking range by varying the selfoscillation frequency, no varactors are used in this defactor sign since neither AMOS nor HBT varactors has a larger than 3 at 96 GHz in the given technology. However, since HBT transistors exhibit much stronger nonlinearity compared to MOS transistors due to its inherently exponential  relationship, a wide locking range can still be achieved without varactor tuning. The layout floorplan for the proposed ILFT is shown in Fig. 14. To enable compact layout yet avoid mutual and substrate noise coupling, groundshielded CPW (GCPW) [33] are used at base, collector, and emitter to lines (
provide the tank, the load, and part of the degeneration inductances. Additional emitter degeneration inductance is realized to save area. The GCPW structure is by spiral inductor favored because it can realize small inductance with good modfactor. The tank and load ineling accuracy and adequate are the most critical ones, which are placed as ductors close as possible to the core transistors in Fig. 11), but on opposite sides. All inductors are realized by GCPW with M6 as the top metal and M1 as ground shield. In order to match the degeneration inductor with the core layout, part of its inductance is realized using GCPW. Note that ILFT is susceptible to injectionpulling when used in a system. Fortunately, GCPW minimizes coupling among the tank, load, and degeneration inductors and also shields from the substrate. It is well known that an ILO is equivalent to a first order PLL [34], where input phase noise is lowpass filtered and oscillator is the phase noise of phase noise is high pass filtered. If is the phase noise of the harmonic the injected signal, is the oscillator phase noise, then the phase amplifier, and noise of the ILFT can be expressed as [35]
(17)
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Fig. 17. Simplified schematic of harmonic frequency tripler.
It can be seen from (17)2 that the output phase noise near the carrier is dominated by the injected signal plus additional degradation from the harmonic generator. At the offset frequency far from the carrier, the phase noise of the ILFT is that of the oscillator phase noise. The tank can thus be relaxed to improve the ILO locking range at the expense of degradation in the integrated phase noise. In other words, the ILO can be designed for tuning range, as its output phase noise is primarily determined by the phase noise of the injected signal. Note that the tank also affects the oscillator’s smallsignal negative resistance. Therefore, care must be taken to ensure sufficient margin for oscillation. A breakout circuit of the ILFT is separately fabricated and characterized. The freerunning frequency is 95.5 GHz. Fig. 15 shows the measured input sensitivity curve of ILFT. For 0 dBm input power the locking range is 92.8–98.1 GHz, which is sufficient for imaging applications [1]. The measured singleended output power versus frequency is shown in Fig. 16 for a 0 dBm dB below the input power with fundamental suppression of desired third harmonic output. It can be expected that for balanced outputs, the second harmonics will be reduced. The tripler and buffer circuits consume 75 mW from 2.5 V supply.
Fig. 18. Interstage matching procedure in HBFT.
input, a shunt MIM capacitor moves the impedance to . The matching is finalized with a different length GCPW Tjunction, , to 23input impedance of the transistor. Fig. 18 illustrates the matching procedure on the Smith Chart. For the HBFT, the multiplier and amplifier chain can impart dB degradaphase noise in addition to the minimum tion. Using a linear phase model [36], we can express the output phase noise of HBFT as
B. Harmonic Balance Frequency Tripler (HBTF) The architecture of the HBFT is shown in Fig. 17. It consists of three stages: the harmonic generation stage, which converts a 32 GHz input signal to 96 GHz, followed by two LO amplification and filtering stages working at 96 GHz. All three stages adopt the pseudodifferential cascode topology. Again, the first stage transistor is biased at optimum 3rdharmonic efficiency bias voltage. In contrast, the latter two stages are biased in ClassA region. In a symmetric design of a differential amplifier, the even harmonics of the collector currents appear as common mode components and should cancel out in the differential output voltage. The amplifier’s load is tuned to the third harmonic to maximize the gain at 96 GHz and suppress all other harmonics. Interstage matching is achieved using MIM GCPW tlines. The simulated differencapacitors and 50 tial impedance looking into the collector is 17on the Smith Chart (normalized to 100 ) in Fig. 17, and is matched to 100 impedance using a GCPW Tjunction, , and a series MIM capacitor. For the input matching, starting from the 100 2Note that (17) holds true if the injected signal’s frequency is near the ILFT free running frequency and deviates from it when the input frequency is away from the center of the locking range as shown in [31].
(18) Unlike the ILFT, the HBFT does not resemble a PLL, so noise from the harmonic generator stage and twostage amplifier can increase the integrated phase noise. Typically, amplifier’s noise domicontribution is lower than the oscillator. Therefore, of the cascaded amplifier is nates (18). The simulated dB dBm. Amplifiers following the multiplier do not suffer multiplication by . Again, assuming the amplifier operates in the linear region, its phase noise is a function of the input power and noise figure [36]. Therefore, the noise level of amplifier stages after the multiplier is kept low by biasing the first stage at minimum NF current density, whereas the second stage is biased for . maximum A breakout circuit of the HBFT is also fabricated and measured separately. Fig. 19 presents the frequency response of the dBm and circuit. The tripler achieves an output power of a 3dB bandwidth of 20 GHz for an input power of 0 dBm. The measurements show that the first and second harmonics are suppressed more than 20 dB compared to the desired third
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TABLE I PERFORMANCE COMPARISON OF MILLIMETERWAVE ACTIVE MULTIPLIERS
Fig. 19. Measured breakout of HBFT output power of harmonic across frequency.
harmonic. Again, for a differential output, the second harmonic should be suppressed further. The harmonic stage and subsequent twostage driver amplifiers consume 5 mW and 70 mW, respectively, under a 2.5 V supply. Table I provides a performance comparison of mmwave active multipliers. VI. EXPERIMENTAL RESULTS The two chips have been fabricated in a 0.18 m SiGe BiCMOS process with six metal layers. The emitter width of the HBTs in the technology is 0.15 m. Fig. 20(a) and (b) show die micrographs of the PLLILFT (1.8 mm ) and the PLLHBFT (1.9 mm ) frequency synthesizers, respectively. The chip area can be further reduced, as two of the three buffers are included for test purposes only. The 2.8 mthick top metal is used to realize inductors and tlines in mmwave circuits, i.e., VCO, ILFT and HBFT. Signal distribution and routing between building blocks has been accomplished carefully using the 1.6 mthick penultimate metal layer (M5) to minimize coupling to the oscillator tanks in the topmetal layer. Since GCPWs can provide excellent isolation between adjacent circuits, they were adopted in the design of ILFT and HBFT. All passives including MIM capacitors and
Fig. 20. Die photo of (a) PLL with ILFT (Chip A) and (b) PLL with HBFT (Chip B).
interconnects, used in the PLL, have been designed or characterized using planar 3D electromagnetic simulations [41]. The frequency synthesizer chip is attached to a PCB using chiponboard assembly. All DC pads are wirebonded to the PCB. The reference frequency input is provided by an onboard 125 MHz voltage controlled crystal oscillator (VCXO). With the PCB mounted on a probe station, the chip performance is
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Fig. 21. Measured output spectra of (a)
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and (b)
.
characterized by onwafer measurements. The 32 GHz mode is measured using a simple coaxial setup. A WR10 waveguidebased setup is used for the 96 GHz mode including an Agilent 11970 W harmonic mixer. The single ended 96 GHz output spectra measured at the output of the ILFT and the HBFT are shown in Fig. 21(a) and (b), respectively (measurement loss not deembedded). Both chips achieve reference spurs better than 52 dBc. The core PLL achieves a measured tuning range of 30.3–33.8 GHz and delivers an average differential output power of 0 dBm. Chip A achieves a tuning range of 92.8–98.1 GHz, which is limited by the locking range of the ILFT. For Chip B, the measured tuning range is 90.9–101.4 GHz, which is three times the PLL tuning range. PLLbased frequency multipliers’ phase noise are important properties of the transceiver’s LO performance. This is particularly true of transceivers used in phasemodulated communication systems, because the phase noise of the receiver/transmitter LO is transferred degreefordegree to the received/transmitted signal [42]. The closedloop phase noise profiles of both chips are depicted in Fig. 22(a) and (b). The phase noise of the core PLL is also plotted in the same figure. The phase noise at 1 MHz offset measured at the output dBc/Hz, dBc/Hz, of the PLL, ILFT and HBFT are dBc/Hz, respectively. The phase noise at 96 GHz and from the 32 GHz output of the core roughly scales by PLL. Figs. 23(a) and (b) summarizes the phase noise of synthesized frequencies at 1 MHz offset. A plot of the measured 100 kHz to 100 MHz RMS phase noise across the synthesized output is also shown. The average RMS phase noise for chip A is 5.4 for an integration bandwidth from 100 kHz to 100 MHz, whereas for chip B is 5.5 . These phase noise measurements verify that in a synthesizer incorporating a low phase noise subharmonic PLL followed by an ILFT or an HBFT, the residual increase in
Fig. 22. Measured phase noise of (a)
and (b)
Fig. 23. Measured phase noise and RMS jitter of (a) .
.
and (b)
phase noise is less than a typical degradation seen in a Wband fundamental PLL [7].
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VII. COMPARISON BETWEEN CHIP A AND B
Fig. 24. Measured output frequency response of (a) .
and (b)
TABLE II PERFORMANCE SUMMARY
Fig. 24 shows the power of the singleended output signal and power of the major harmonics for output signals after ILFT (Chip A) and HBFT (Chip B). The measured signal output dBm and dBm over the bandwidth power is around for Chip A and B, respectively. The largest spur is due to the feedthrough of the core PLL. Again, it can be expected that for differential output the second harmonic will be reduced at the output. Suppression for the first and second harmonics are observed to be better than 20 dB compared to the triplers’ output for both chips. Finally, Chip A has been verified in a multichannel system [1]. The core PLL consumes 65 mW, and both the ILFT and the HBFT consume 75 mW. The measured performance of the 96 GHz synthesis is summarized in Table II.
Based on the measurement results of the two prototypes, three different methods for Wband frequency synthesis were compared in terms of phase noise, tuning range, and output power. The first two methods are based on the performance of Chip A and Chip B. The third method involves a fundamental 96 GHz PLL. For ease of comparison, both the ILFT and the HBFT are designed with same power consumption. Note that the power consumption of both Chip A and Chip B should be similar to that of a 96 GHz PLL, because the reduced power consumption in the divider is offset by the additional power in the multiplier. For ideal frequency scaling, as frequency triples, the absolute tuning range also increases by a factor of three and phase . However, mmwave noise degrades by 9.54 dB fundamental oscillators generally suffer from narrower tuning range due to the impact of large fixed parasitic capacitance to the overall tank capacitance. Also, the impact of noise sources from both active and passive devices is exacerbated at higher frequencies and generally more than 9.54 dB phase noise degradation is observed. These assertions are corroborated in recent publications in both CMOS [7] and SiGe BiCMOS [5], [43] and [44]. Chip B degrades the phase noise by 11 dB and triples the tuning range, i.e., it maintains the same fractional tuning range. The tuning range of Chip A is limited by the locking range of ILFT which is dependent on the injection power, and the phase noise degradation is 10 dB. Assuming the use of commercial crystal oscillator in the range of 200 MHz and a fixed PLL bandwidth in the range of few MHz, a fundamental PLL will see a higher phase noise compared to either Chip A or B. Moreover, Chip A has better RMS phase noise than Chip B since at an offset frequency above 10 MHz the amplifier noise after the harmonic generation starts to dominate and twostage amplifier is noisier than one stage. Furthermore, the output power of the ILO is higher than the output power of the harmonic amplifier, reducing the phase noise impact of latter stages. Since the ILFT in Chip A is not in the PLL loop there is no guarantee that the tripler is actually locked to the output of the PLL. Hence, this architecture is more suitable for applications that require narrow LO tuning range such as passive imaging [1]. So compared to Chip A, the use of HBFT in Chip B as an open loop harmonic amplifier enables wide LO tuning range limited only by the PLL locking range. versus meaIn terms of output power, Fig. 25 plots sured from the breakouts of ILFT and HBFT. The ILFT output dBm. Even has less dependency on the input power above dBm, the output degrades only by for input power below 2–3 dB. On the other hand, the HBFT output is highly depen. The results indicate that the ILFT is more energy dent on efficient, and is capable of providing good output power even when input power is low. VIII. CONCLUSION Two highly integrated 96 GHz frequency synthesis prototypes (Chip A and B) have been designed and implemented in a 0.18 m SiGe BiCMOS. Both chips exhibit good phase noise and harmonic suppressions and consume same amount of power, while the main tradeoff is between tuning range and output power. Table III compares Chip A and B with other
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TABLE III PERFORMANCE COMPARISON OF WBAND PLLS
For
, assume a purely inductive load
(A2) (A3) then the Miller impedance, , can be transformed into equivaand as follows: lent parallel resistance and capacitance,
(A4)
Fig. 25. Measured output power at 96 GHz against input power at 32 GHz for ILFT and HBFT.
stateoftheart Wband PLLs. Based on the measurement results and analytical studies, the benefits of using a subharmonic PLL followed by a frequency tripler were discussed and highlighted. The work demonstrates further that singlechip Wband synthesizers could be realized with the help of high performance lower frequency PLL. This frequency synthesis is applicable to a broad range of mmwave systems, from phased arrays to multipixels systems.
(A5) If tank loss is taken into account, then
,
(A6) and
APPENDIX The amplifier basecollector voltage gain is given by (A1) is collector load impedance. If is a parallel RLC where network, the effective impedance can be inductive, resistive or capacitive, depending on whether the operating frequency is lower than, equal to or higher than the LC resonant frequency.
(A7)
WANG et al.: WBAND SILICONBASED FREQUENCY SYNTHESIZERS
For
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, assume a purely capacitive load
(A8) (A9) Again the Miller impedance, equivalent and
, can be decomposed into
(A8)
(A9)
ACKNOWLEDGMENT The authors thank TowerJazz Semiconductor for chip fabrication. They also acknowledge helpful suggestions from members in NCIC Lab at University of California, Irvine and L. Wang, Broadcom Corportaion. Technical support from Sonnet Software is highly appreciated. REFERENCES [1] C.C. Wang, Z. Chen, H.C. Yao, and P. Heydari, “A fully integrated 96 GHz 2 2 focalplane array with onchip antenna,” in Proc. IEEE Radio Frequency IC Symp. Dig., Jun. 2011, pp. 1–4. [2] L. Zhou, C.C. Wang, Z. Chen, and P. Heydari, “A Wband CMOS receiver chipset for millimeterwave radiometer systems,” IEEE J. SolidState Circuits, vol. 46, no. 2, pp. 378–391, Feb. 2011. [3] I. Sarkas, S. T. Nicolson, A. Tomkins, E. Laskin, P. Chevalier, B. Sautreuil, and S. P. Voinigescu, “An 18Gb/s, direct QPSK modulation SiGe BiCMOS transceiver for last mile links in the 70–80 GHz band,” IEEE J. SolidState Circuits, vol. 45, no. 10, pp. 1968–1980, Oct. 2010. [4] N. Deferm and P. Reynaert, “A 120 GHz 10 Gb/s phasemodulating transmitter in 65 nm LP CMOS,” in Proc. IEEE Int. SolidState Circuits Conf. Dig. Tech. Papers, Feb. 2011, pp. 290–291. [5] S. Shahramian, A. Hart, A. C. Carusone, P. Garcia, P. Chevalier, and S. P. Voinigescu, “Design of a dual W and Dband PLL,” IEEE J. SolidState Circuits, vol. 46, no. 5, pp. 1011–1022, May 2011. [6] Z. Chen, C.C. Wang, and P. Heydari, “Wband frequency synthesis using a kaband PLL and two different frequency triplers,” in Proc. IEEE Radio Frequency IC Symp. Dig., Jun. 2011, pp. 1–4. [7] B. A. Flyod, “A 16–18.8GHz subintegerN frequency synthesizer for 60GHz transceivers,” IEEE J. SolidState Circuits, vol. 43, no. 5, pp. 1076–1086, May 2008. [8] K.H. Tsai and S.I. Liu, “A 43.7 mW 96 GHz PLL in 65 nm CMOS,” in Proc. IEEE Int. SolidState Circuits Conf. Dig. Tech. Papers, Feb. 2009, pp. 276–277. [9] N. Zhang and K. K. O. , “CMOS frequency generation system for Wband radars,” in Proc. IEEE VLSI Symp., Jun. 2009, pp. 126–127. [10] Z. Xu, Q. Gu, Y.C. Wu, H.Y. Jian, F. Wang, and M.C. Chang, “An integrated frequency synthesizer for 81–86 GHz satellite communications in 65 nm CMOS,” in Proc. IEEE Radio Frequency IC Symp. Dig., May 2010, pp. 57–60.
[11] J. Lee, M. Liu, and H. Wang, “A 75GHz phaselocked loop in 90nm CMOS technology,” IEEE J. SolidState Circuits, vol. 43, no. 6, pp. 1414–1426, Jun. 2008. [12] W. Winkler, J. Borngräber, B. Heinemann, and F. Herzel, “A fully integrated BiCMOS PLL for 60 GHz wireless applications,” in Proc. IEEE Int. SolidState Circuits Conf. Dig. Tech. Papers, Feb. 2005, pp. 406–407. [13] S. Reynolds et al., “A silicon 60GHz receiver and transmitter chipset for broadband communications,” IEEE J. SolidState Circuits, vol. 41, no. 12, pp. 2820–2831, Dec. 2006. [14] A. ValdesGarcia et al., “A fully integrated 16element phasedarray transmitter in SiGe BiCMOS for 60GHz communications,” IEEE J. SolidState Circuits, vol. 45, no. 12, pp. 2757–2773, Dec. 2010. [15] C.Y. Wu, M.C. Chen, and Y.K. Lo, “A phaselocked loop with injectionlocked frequency multiplier in 0.18 m CMOS for Vband applications,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 7, pp. 1629–1636, Jul. 2009. [16] H. Li and H.M. Rein, “Millimeterwave VCOs with wide tuning range and low phase noise, fully integrated in a SiGe bipolar production technology,” IEEE J. SolidState Circuits, vol. 38, no. 2, pp. 184–191, Feb. 2003. [17] V. Jain, B. Jain, and P. Heydari, “A BiCMOS dualband millimeterwave frequency synthesizer for automotive radars,” IEEE J. SolidState Circuits, vol. 44, no. 8, pp. 2100–2113, May 2009. [18] A. Fard and P. Andreani, “An analysis of 1/f phase noise in bipolar Colpitts oscillators (with a digression on bipolar differentialpair LC oscillators),” IEEE J. SolidState Circuits, vol. 42, no. 2, pp. 374–384, Feb. 2007. [19] M. Bao, Y. Li, and H. Jacobsson, “A 21.5/43GHz dualfrequency balanced colpitts VCO in SiGe technology,” IEEE J. SolidState Circuits, vol. 39, no. 8, pp. 1352–1355, Aug. 2004. [20] C. Lee et al., “SiGe BiCMOS 65GHz BPSK transmitter and 30 to 122 GHz LCvaractor VCOs with up to 21% tuning range,” in Proc. IEEE CSICS, 2004, pp. 179–182. [21] H. Li and H.M. Rein, “Millimeterwave VCOs with wide tuning range and low phase noise, fully integrated in a SiGe bipolar production technology,” IEEE J. SolidState Circuits, vol. 38, no. 2, pp. 184–191, Feb. 2003. [22] S. P. Voinigescu, D. Marchesan, and M. A. Copeland, “A family of monolithic inductorvaractor SiGeHBT VCOs for 20 GHz to 30 GHz LMDS and fiberoptic receiver applications,” in Proc. IEEE Radio Frequency IC Symp. Dig., May 2000, pp. 173–177. [23] K. Kwok and J. R. Long, “A 23to29 GHz transconductortuned VCO MMIC in 0.13 m CMOS,” IEEE J. SolidState Circuits, vol. 42, no. 12, pp. 2878–2886, Dec. 2007. [24] H. Wang, “A 50 GHz VCO in 0.25 m CMOS,” in Proc. IEEE Int. SolidState Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2001, pp. 372–373. [25] D. K. Shaeffer and S. Kudszus, “Performanceoptimized microstrip coupled VCO for 40GHz and 43GHz OC768 optical transmission,” IEEE J. SolidState Circuits, vol. 38, no. 7, pp. 1130–1138, Jul. 2003. [26] T. O. Dickson et al., “The invariance of characteristic current densities in nanoscale MOSFETs and its impact on algorithmic design methodologies and design porting of Si(Ge) (Bi)CMOS highspeed building blocks,” IEEE J. SolidState Circuits, vol. 41, no. 8, pp. 1830–1845, May 2006. [27] D. Mijuskovic, M. Bayer, T. Chomicz, N. Garg, F. James, P. McEntarfer, and J. Porter, “Cellbased fully integrated CMOS frequency synthesizers,” IEEE J. SolidState Circuits, vol. 29, no. 3, pp. 271–279, Mar. 1994. [28] W. Rhee, “Design of highperformance CMOS charge pumps in phaselocked loops,” in Proc. Int. Symp. Circuits Syst., May/Jun. 1999, vol. 2, pp. 545–548. [29] P. Wambacq and W. Sansen, Distortion Analysis of Analog Integrated Circuits. Norwell, MA: Kluwer, 1998. [30] C.P. Lee, W. Ma, and N. Wang, “Averaging and cancellation effect of highorder nonlinearity of a power amplifier,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 54, no. 12, pp. 2733–2740, Dec. 2007. [31] B. Razavi, “A study of injection locking and pulling in oscillators,” IEEE J. SolidState Circuits, vol. 39, no. 9, pp. 1415–1424, Sep. 2004. [32] R. Adler, “A study of locking phenomena in oscillators,” in Proc. IRE, Jun. 1946, pp. 351–357. [33] A. Komijani and A. Hajimiri, “A wideband 77GHz, 17.5dBm fully integrated power amplifier in silicon,” IEEE J. SolidState Circuits, vol. 41, no. 8, pp. 1749–1756, Aug. 2006. [34] H. R. Rategh and T. H. Lee, “Superharmonic injectionlocked frequency dividers,” IEEE J. SolidState Circuits, vol. 34, no. 6, pp. 813–821, Jun. 1999.
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[35] X. Zhang, X. Zhou, and A. S. Daryoush, “A theoretical and experimental study of the noise behavior of subharmonically injection locked local oscillators,” IEEE Trans. Microw. Theory Tech., vol. 40, no. 5, pp. 895–902, May 1992. [36] K. V. Puglia, “Phase noise analysis of component cascades,” IEEE Microwave Mag., vol. 3, no. 4, pp. 71–75, Dec. 2002. [37] A. Y.K. Chen, Y. Baeyens, Y.K. Chen, and J. Lin, “A 36–80 GHz high gain millimeterwave doublebalanced active frequency doubler in SiGe BiCMOS,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 9, pp. 572–574, Sep. 2009. [38] Z. Chen and P. Heydari, “An 85–95.2 GHz transformerbased injectionlocked frequency tripler in 65 nm CMOS,” in Proc. IEEE Int. Microw. Symp. (IMS), May 2010, pp. 776–779. [39] N.C. Kuo, J.C. Kao, Z.M. Tsai, K.Y. Lin, and H. Wang, “A 60GHz frequency tripler with gain and dynamicrange enhancement,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 3, pp. 660–671, Mar. 2011. [40] W. L. Chan, J. R. Long, and J. J. Pekarik, “A 56to65 GHz injectionlocked frequency tripler with quadrature outputs in 90 nm CMOS,” in IEEE Int. SolidState Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2008, pp. 480–481. [41] Sonnet Suites Release 12. Sonnet Software. Syracuse, NY, p. 13212. [42] S. A. Maas, Microwave Mixers. Norwood, MA: Artech House, 1993. [43] S. T. Nicolson et al., “Design and scaling of Wband SiGe BiCMOS VCOs,” IEEE J. SolidState Circuits, vol. 42, no. 9, pp. 1821–1833, Sep. 2007. [44] A. Arbabian, S. Callender, S. Kang, B. Afshar, J.C. Chien, and A. M. Niknejad, “A 90 GHz hybrid switching pulsedtransmitter for medical imaging,” IEEE J. SolidState Circuits, vol. 45, no. 12, pp. 2667–2681, Dec. 2010.
ChunCheng Wang (S’07) received the B.S. and M.Eng. degrees in electrical and computer engineering from Cornell University, Ithaca, NY, in 2003 and 2004, respectively. From 2004 to 2007 he was with Realtek Semiconductor Corporation as an Analog/RF Design Engineer, where he was involved in the design of 802.11 a/b/g/n CMOS radio. He is currently working toward the Ph.D. degree in electrical engineering at University of California, Irvine. His research interests are in RF and millimeterwave (mmwave) integrated circuit design for wireless communications, automotive radars, and imaging applications. During his Ph.D., he interned at Fujitsu Laboratories of America, Sunnyvale, CA and Broadcom Corp., Irvine, CA, both involved in the design of 60 GHz CMOS radio. Mr. Wang was the recipient of the Mindspeed Fellowship in 2011, the Center of Pervasive Communications and Computing (CPCC) Fellowship Award in 2010, the School of Engineering Research and Travel Grant Award in 2009 and the EECS Department Fellowship in 2007 at University of California, Irvine. He is a member of Golden Key Honor Society and Eta Kappa Nu.
Zhiming Chen (S’08) received the B.Eng. degree in electronic engineering from Tsinghua University, Beijing, China, in 2007, and the M.S. degree in electrical engineering from the University of California, Irvine, in 2009, where he is currently pursuing the Ph.D. degree in electrical engineering. He has been with the Nanoscale Communication IC Laboratory, University of California, Irvine, since 2007. He was a summer intern at Finisar Corporation, Sunnyvale, CA, in 2008. He has been an intern at Broadcom Corporation since June 2010, where he was engaged in 60 GHz phasedarray radio development. His research interests include RF/MMW integrated circuits design with a focus on Wband imaging systems.
Payam Heydari (S’98–M’00–SM’07) received the B.S. and M.S. degrees (hons.) in electrical engineering from the Sharif University of Technology, Tehran, Iran, in 1992 and 1995, respectively. He received the Ph.D. degree in electrical engineering from the University of Southern California in 2001. In August 2001, he joined the University of California, Irvine, where he is currently a Professor of electrical engineering. His research interests include the design of highspeed analog, radiofrequency (RF), and mixedsignal integrated circuits. He is the (co)author of one book and more than 90 journal and conference papers. Dr. Heydari was named one of 10 outstanding innovators at the university by the The Office of Technology Alliances at UCI. He is the corecipient of the 2009 Business Plan Competition First Place Prize Award and Best Concept Paper Award both from Paul Merage School of Business at UCIrvine. He is the recipient of the 2010 Faculty of the Year Award from UCIrvine’s Engineering Student Council (ECS), the 2009 School of Engineering Fariborz Maseeh Best Faculty Research Award, the 2007 IEEE Circuits and Systems Society Guillemin–Cauer Award, the 2005 NSF CAREER Award, the 2005 IEEE Circuits and Systems Society Darlington Award, the 2005 UCI’s School of Engineering Teaching Excellence Award, the Best Paper Award at the 2000 IEEE International Conference on Computer Design (ICCD), the 2000 Honorable Award from the Department of EESystems at the University of Southern California, and the 2001 Technical Excellence Award in the area of Electrical Engineering from the Association of Professors and Scholars of Iranian Heritage (APSIH). He was recognized as the 2004 Outstanding Faculty at the UCI’s EECS Department. His research on novel lowpower multipurpose multiantenna RF frontends received the LowPower Design Contest Award at the 2008 IEEE Int’l Symposium on LowPower Electronics and Design (ISLPED). He is the cofounder of ZeroWatt Technologies, Inc. Dr. Heydari is a Guest Editor of IEEE JOURNAL OF SOLIDSTATE CIRCUITS. He currently serves on the Technical Program Committees of Compound Semiconductor IC Symposium (CSICS), and. He was an Associate Editor of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS from 2006 to 2008. He was a Technical Program Committee member of the IEEE Custom Integrated Circuits Conference (CICC), International Symposium on LowPower Electronics and Design (ISLPED), IEEE Design and Test in Europe (DATE), and International Symposium on Quality Electronic Design (ISQED).
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A Wideband CMOS/GaAs HBT Envelope Tracking Power Amplifier for 4G LTE Mobile Terminal Applications Muhammad Hassan, Member, IEEE, Lawrence E. Larson, Fellow, IEEE, Vincent W. Leung, Member, IEEE, Donald F. Kimball, Member, IEEE, and Peter M. Asbeck, Fellow, IEEE
Abstract—A highefficiency envelope tracking power amplifier for longterm evolution (LTE) handset mobile terminals is presented. The envelope amplifier consists of a wideband buffered linear amplifier as a voltage source and a hysteretically controlled switching amplifier as a dependent current source. The linear amplifier has a high current drive capability of approximately 500 mA while consuming only 12 mA of quiescent current. The impact of envelope shaping on system efficiency and stability is investigated. The envelope amplifier is implemented in a 0.15 m CMOS process and tested with a GaAs HBT RF power amplifier. For a 20MHz LTE signal with 6.6dB peaktoaverage power ratio, an overall efficiency of 43% is achieved at 29dBm RF output power level with relative constellation error below 1.9% after digital predistortion. Index Terms—Envelope shaping, envelope tracking (ET), longterm evolution (LTE), polar transmitter.
I. INTRODUCTION
F
OURTHGENERATION (4G) cellular networks offer performance similar to cable modems, while allowing wide mobility. The use of orthogonal frequencydivision multiple access (OFDMA) in 4G increases spectral efficiency, allowing peak download rates as high as 75 MB/s in the case of longterm evolution (LTE) with a single antenna. Although the use of OFDMA in LTE offers benefits in terms of capacity and performance, it places very challenging constraints on the design of the RF power amplifier (RFPA). This is due to the increased peaktoaverage power ratio (PAPR) in case of LTE and more challenging linearity requirements in terms of normalized root mean square error (NRMSE) and adjacent channel power (ACP). To meet these linearity requirements, the RFPA has to operate at much lower average power than its satu
Manuscript received October 01, 2011; revised January 07, 2012; accepted January 10, 2012. Date of publication March 09, 2012; date of current version April 27, 2012. This paper is an expanded paper from the IEEE RFIC Symposium, June 5–10, 2011, Baltimore, MD. M. Hassan and P. M. Asbeck are with the Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA 92092 USA. L. E. Larson is with the School of Engineering, Brown University, Providence, RI 02912 USA. V. W. Leung is with Qualcomm Inc., San Diego, CA 92121 USA. D. F. Kimball is with MaXentric Technologies LLC, San Diego, CA 92037 USA. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2187537
Fig. 1. Simplified block diagram of: (a) EER and (b) ETPA system.
rated power level, reducing the efficiency, and hence, the battery life [1]. Many efficiency enhancement techniques to improve the efficiency of the RFPA in the backoff power region have been proposed. Envelope tracking (ET) and envelope elimination and restoration (EER) are two popular techniques [2]. Fig. 1 shows the simplified block diagram of typical EER and envelope tracking power amplifier (ETPA) systems. Although both EER and ET systems require a power supply control scheme, the optimum shaping function of drain bias modulation signal for EER and ET transmitters is different. For EER, the magnitude of the envelope signal increases linearly with output power. For an ET transmitter, the optimum slope changes near the power minimum, as an added offset voltage. The offset voltage in the lowpower region is typically adjusted to be larger than the HBT collector “knee” voltage. By operating above the knee region, the PA can reduce nonlinear behavior like gain compression (AM/AM) and phase distortion (AM/PM) in that region [2]. Although envelope shaping helps to improve the linearity and overall efficiency of the ETPA system, it makes the design of the envelope amplifier very challenging since it results in a nonlinear and timevarying load to the envelope amplifier. This paper is organized as follows. Section II describes the characteristics of the envelope amplifier load as a result of envelope shaping. Section III presents the hybrid architecture of the
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Fig. 2. Normalized shaped envelope as a function of envelope voltage with varying from 0 to 0.3 in steps of 0.1. Fig. 4. Normalized RFPA load impedance as a function of envelope voltage with varying from 0 to 0.3 in steps of 0.1.
Fig. 3. LTE 20MHz signal envelope with and without shaping
.
envelope amplifier with accurate current sensing. Section IV unveils the impact of envelope shaping on efficiency and stability of the envelope amplifier. Measurement results are presented in Section V followed by conclusions in Section VI. II. CHARACTERISTICS OF ENVELOPE AMPLIFIER LOAD AS A RESULT OF ENVELOPE SHAPING As shown in the simplified block diagram of the ETPA system in Fig. 1, the RF input signal to the RFPA has both the envelope and phase information, whereas the input to the envelope amplifier is a shaped envelope signal, to prevent the gain collapse of the RF stage at low [2]. The envelope shaping function used in this work is plotted in Fig. 2 for different values of , and is described by (1) where is the normalized input envelope and determines the amount of shaping. Fig. 3 shows a timedomain simulation of both the original and shaped envelope signals for a 4G LTE waveform.
Although the collector voltage of the RFPA is shaped according to the function specified by (1), the collector current of the classB biased RFPA is not shaped in the same way. Instead, the magnitude of the collector current is approximately proportional to the squareroot of the output power [3], [4]. Therefore, there is a nonlinear relationship between the envelope amplifier output voltage and current, which makes the envelope amplifier output load appear as a variable resistor, which varies with the output voltage. Using the envelope shaping function in (1), the normalized equivalent load resistance representing the RFPA is plotted in Fig. 4 for different values of as a function of the normalized envelope. It shows that the variation in the equivalent load resistance is dramatic for higher values of . Analytical details for computing are provided in Section IVA. Fig. 4 shows that the RFPA impedance at backoff power level varies by a factor of 2 for . The value of at maximum average output power is determined by the required RF output power and the drain/collector efficiency , i.e., (2) is the root mean square (rms) value of the envelope where signal. For example, to achieve 29dBm average output power, the peak RF output power should be approximately 36 dBm, considering the 6.6dB PAPR. If the RFPA is assumed to have 70% efficiency, then the envelope amplifier must be capable of supplying 37dBm peak power. This means that the equivalent load resistance of the RFPA is approximately 6 at peak output power when the envelope amplifier reaches a peak output voltage of 5.5 V from a 6V supply. This value reaches up to 12 near the waveform minimum. For efficiency calculation, a voltagecontrolled current source (VCCS) has been proposed in [4] as a more realistic model of the RFPA when envelope shaping is employed. This poses significant challenges in the design of the envelope amplifier in terms of stability and maintaining higher efficiency, which is discussed in detail in Section IV.
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Fig. 6. Schematic of the linear amplifier [9].
Fig. 5. Envelope amplifier architecture [9].
III. HYBRID ENVELOPE AMPLIFIER ARCHITECTURE The design of a highefficiency and highlinearity envelope amplifier is the main challenge for wideband ETPA system design. Fig. 5 shows the detailed block diagram of the hybrid envelope amplifier architecture. The envelope amplifier consists of a wideband, highgain, and linear amplifier operating in parallel with a highefficiency switching amplifier. This hybrid envelope amplifier architecture is attractive for modern wireless communications envelope signals, which have a major portion of their envelope powers concentrated near dc [5]. The switching amplifier efficiently provides the lowfrequency portion of the envelope power and the linear amplifier supplies the residual power and compensates for any distortion or noise generated by the switching amplifier. The linear amplifier acts as a voltagecontrolled voltage source, and the switching amplifier acts as a currentcontrolled current source. The switching amplifier is controlled by the output current of the linear amplifier, and the feedback loop minimizes the current supplied by the linear amplifier. The linear amplifier is the most critical block in the envelope amplifier and has a major role in determining the overall efficiency and linearity of the ETPA [6]. Apart from commonly cited requirements of low output impedance and large gainbandwidth (GBW) product, the linear amplifier should also have a high slew rate (SR). In most envelope signals, the troughs are the points of highest current SR. At these points, the switching amplifier is challenged to supply the necessary current since the voltage across the inductor is at a minimum, limiting the SR . Note that preemphasizing the input to the switching amplifier cannot significantly improve the SR since this only improves the smallsignal performance [8]. Therefore, the linear amplifier must be capable of sinking maximum current at troughs of the envelope. Even after envelope shaping using (1), the current requirement from the linear amplifier near the envelope waveform minimum is not significantly reduced because it is dictated by the RFPA, which is being fed with the original unshaped RF signal.
Therefore, shaping the envelope does not relax the high SR requirement, and the linear amplifier must be capable of supplying a high SR near the minimum. The difficulty in designing a high SR monolithic linear amplifier arises from the large input capacitance of the final stage due to the wattlevel power requirements. Thus, the challenge is achieving a large SR without a high quiescent current. Fig. 6 shows the simplified schematic of the linear amplifier [9], [10]. If increases beyond the smallsignal linear range, M2 and M7 will be in cutoff, while M3 and M6 will be driven to large values of . The drain current in M3 and M6 can increase to large values resulting in correspondingly large negative drain current flow in M14. For large values of , M3 and M6 turn off, M2 and M7 conduct large currents, and the drain current of M13 supplies large positive current. Therefore, the input stage operates in classAB mode and is capable of supplying large positive and negative currents to a load capacitance with a small quiescent bias current of 12 mA, while it has a current driving capability of over 500 mA. For the global feedback mechanism to track the input envelope, accurate sensing of the current supplied by the linear amplifier is very important [7]. Typical current sensing techniques utilize a small series resistor at the output of the linear amplifier and measure the voltage drop across it. Although this approach can sense the load current accurately, it is not suitable for high current applications since the entire load current flows through that series resistor, resulting in significant power loss. Another scheme for current sensing is shown in Fig. 7 [11], where the input voltage of the push–pull output stage is sensed and converted directly into a control signal for the switching amplifier. This approach has the limitation that the comparator is directly connected to the gate of a very large pMOS device M1 (in our case, of size 30 mm/0.6 m) so the comparator is slowed down significantly. The reduced efficiency due to additional delay in the current sense control loop can be explained using the simplified model of the envelope amplifier in Fig. 8. In Fig. 8(a), is the current loop gain defined as (3)
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Fig. 7. Envelope amplifier architecture using direct current sensing for switching amplifier control [11].
Fig. 9. Power loss in the linear amplifier as a function of added delay in the current sense loop for a 10MHz sinusoidal signal.
Assuming the switching amplifier is acting as a constant current source, which is providing the average power, the additional power loss in the linear amplifier due to the delay is given by 
Fig. 8. (a) Simplified model of the envelope amplifier. (b) Phasor diagram of resultant currents.
If is very large, the linear amplifier delivers only the switching ripple current of the switching amplifier. In reality, due to finite gain and bandwidth of , the switching amplifier current lags behind and is less than the load current, as shown in Fig. 8(b). Therefore, the linear amplifier must provide some amount of signal current in addition to the ripple current to compensate for the distortion that results from the phase lag of the switching amplifier current [12]. For an output current of at a given frequency and a phase delay of switching amplifier , (4) Using (3), (4) can be rewritten as
(5) or, by converting the switching amplifier phase current lag in (5) to its equivalent time delay , we obtain (6) as follows:
(6)
(7)
is the supply voltage and is the peak output where voltage of the envelope. The additional power loss due to this delay is plotted in Fig. 9, when the delay in switching amplifier current is varied from 0 to 10 ns, or equivalently, when is varied from 0 to 36 . The of 0.4 A is used when the envelope amplifier is supplying a 2.5V amplitude output to a 6load. Simulated additional power loss is also shown in Fig. 9. It is clear from the analysis that it is important to maintain minimum possible delay inside the current sensing loop. The choice of delay range above (0–10 ns) is quite realistic because the transimpedance amplifier (TIA) finite bandwidth, comparator regeneration time, and delay of the switching amplifier drivers easily make up a large overall delay. For example, the TIA introduces 4 ns of delay for 250MHz bandwidth, the comparator regeneration time in simulation is observed to reach 3–5 ns depending upon the input differential voltage, and the driver chain of the switching amplifier contributes a delay of 1 ns. In this study, current mirrors consisting of M1 and M2 (Fig. 5) in conjunction with the TIA are used to sense the linear amplifier current and convert it into voltage. A 250:1 current mirror is utilized. Since the output devices, M3 and M4, of the linear amplifier have a high W/L to satisfy the power requirement and the current mirroring ratio is also large, a minimum gate length is the preferred design choice, but this reduces the accuracy of the current mirror, which translates into an offset at the input of the switching amplifier and makes the average value of the current coming from the linear amplifier nonzero. This lowers the efficiency, or otherwise requires manual adjustment of the comparator offset [13], [14]. To minimize this problem, the TIA equalizes the drain–source voltages in the current mirrors, which widens the bandwidth and accuracy of the current mirroring with minimal power penalty (500 A). The TIA employs a feedback resistive divider to reduce the large commonmode output voltage, thus simplifying the design of the comparator. Apart from accuracy, the current
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sensing minimizes the delay between the output load current and the switching amplifier current, which helps in minimizing the power loss in the linear amplifier’s output devices. Simulations show that the proposed current sensing approach is approximately 3 ns faster, which saves 40 mW of additional power loss in the linear amplifier, while the total power loss of the envelope amplifier is 300 mW for the 20MHz LTE signal. IV. IMPACT OF ENVELOPE SHAPING ON HYBRID ENVELOPE AMPLIFIER PERFORMANCE A. Efficiency of the Envelope Amplifier As discussed in Section II, the RFPA does not present itself as a purely resistive load to the envelope amplifier. We will now calculate the efficiency of the envelope amplifier when driving a variable resistive load and compare this to the case of a fixed resistive load. To do that, we need to find the additional power loss in the linear amplifier when the envelope amplifier is driving a variable resistive load. The supply current drawn by a classB RFPA is proportional to the square root of the output power. i.e., (8) is timevarying output power of the RFPA after where averaging over the RF carrier period. The quantity is further proportional to the square of the envelope of the RF signal applied at the input of the RFPA, i.e., (9) in the RFPA, the output curAssuming a quiescent current of rent of the envelope amplifier when it is driving a variable resistive load (the RFPA modeled as VCCS), denoted by , can be written using (8) and (9) as
Fig. 10. Simulated current supplied by the linear stage for a 20MHz LTE envelope signal with fixed resistor and variable resistor models of the RFPA .
where is the timeaveraged difference current and is the effective voltage across the nMOS of the envelope amplifier that is connected to the RFPA. The average output power of the envelope amplifier for a fixed resistor can be written as (13)

is the maximum value and where  is the PAPR of the envelope . The efficiency of the envelope amplifier when it is driving a fixed resistor of is given by (14)
where is a proportionality constant. On the other hand, if the RFPA is assumed to be a purely resistive load, the output current of the envelope amplifier, denoted by , will be proportional to the shaped envelope voltage given in (1), i.e.,
denotes the total losses of the linear and switching where amplifiers, as defined in [5]. On the other hand, when the envelope amplifier is driving a variable resistor (the RFPA modeled as a VCCS), the changes as was shown in Fig. 4, which effectively changes the average output power of the envelope amplifier from to resulting in corresponding change in PAPR from  to  [4]. The efficiency of the envelope amplifier when driving a variable resistor is given by
(11)
(15)
(10)


Fig. 10 compares the current supplied by the linear amplifier for the fixed resistor (6 ) and variable resistor [4] RFPA models. Positive values of the current refer to the current supplied by the linear amplifier, while negative values refer to the current sinked by the linear amplifier. Near the peak of the envelope waveform , the exponential term in (11) becomes negligible, making the currents ( and ) identical there; whereas, near the trough, the difference between the two RFPA models becomes prominent due to the presence of the exponential term in (11). Therefore, the average power loss due to the envelope shaping can be written as 


(12)
is the total power loss in the envelope amplifier where when it is driving a VCCS and can be approximated as (16)
Using (16) and (13), (15) can be rearranged as

(17a) 
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TABLE I EFFICIENCY OF THE ENVELOPE AMPLIFIER 20MHz LTE ENVELOPE
FOR
Fig. 12. Simulated and calculated PM versus output envelope voltage.
Fig. 11. Simulated transconductance of the output devices of the linear amplifier and comparison to model.
Expressing (17a) in terms of the efficiency for fixed resistive load , (17a) can be rewritten as (17b) as follows: Fig. 13. Nondominant pole position versus output envelope voltage.

(17b)
Table I provides a comparison of the simulated and calculated efficiencies for both the cases (RFPA modeled as a fixed resistor versus a variable VCCS resistor) for the 20MHz LTE signal. The difference between the simulated and calculated values of the efficiency is very small for the VCCS model of the PA. The effect is even more pronounced for higher values of . Therefore, to more accurately calculate the efficiency of the standalone envelope amplifier, its load model should be a VCCS variable resistor. B. Stability of the Envelope Amplifier The linear amplifier is susceptible to instability if its feedback loop is not designed properly. There are several mechanisms that complicate the analysis. As discussed before, the output devices of the linear amplifier have to source and sink large amounts of current near both the peak and trough of the envelope waveform, which results in variations in of the output stage from its quiescent value. The variation in the equivalent load resistance due to the envelope shaping further complicates the analysis.
In the following, we calculate the phase margin (PM) of the linear amplifier of Fig. 6 as a function of the envelope voltage when both and change. For a simple twostage amplifier, the loop gain in the unityfeedback configuration is given by (18) and are the transconductances and and where are the output resistances of the first and second stages, respectively. In this design, values of these parameters (obtained from SPICE) at quiescent condition are as mS, mS, k , , kHz, and MHz. Fig. 11 shows the variation as a function of the envelope voltage, which can be approximated as (19) where is the rms value of the input envelope . The value of controls the point of minimum tranconductance because at that point , the switching amplifier provides most of the current to the RFPA. Equation (19) is also plotted in Fig. 11 for , and provides a good approximation to of the output stage of the envelope amplifier. The
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Fig. 15. Measured efficiency versus RF output power.
Fig. 14. Chip microphotograph and the test board. Fig. 16. Measured constellation plot of the ETPA system.
variation in the equivalent load resistance of the RFPA can be modeled using (1) and (10) as follows:
(20) where mA is used based on measurement, is selected for best approximation of the at . As and vary with the envelope, the unity gain frequency (defined as ) also changes, which reduces the PM. Algebraically manipulating (18), is
(21) where . Since the two poles are widely separated under the quiescent condition, the effect of the first pole on PM is negligible as and vary. Therefore, the PM can be approximated by
(22) Equation (22) is plotted in Fig. 12. For comparison, the simulated PM is also plotted on the same graph and agrees well
with the calculated PM. As expected, the PM becomes reduced near both the peak and trough of the envelope signal, as shown in Fig. 12. The peak and trough are the regions where the linear amplifier is either sourcing or sinking considerable current, making its loop gain quite high. It is interesting to note that near the rms value of the envelope voltage, where the switching amplifier is providing a major portion of the power ( 3 V), the PM of the envelope amplifier is very high, which is due to the small of the output stage. It should also be noted that the trough is the worst case for stability because this is the point where the output nondominant pole moves to a lower frequency due to increase in , and thus lowers the PM. The variation in the pole position as a function of envelope voltage is shown in Fig. 13. V. MEASUREMENT RESULTS The envelope amplifier is implemented in a 0.15 m CMOS process using thick gate–oxide devices (5 V). It occupies 1.5 mm of die area including pads and utilizes 1 H offchip inductor for the switching amplifier. For packaging, a QFN16 (4 4) is used to minimize the package parasitic. The test board picture along with a die microphotograph is shown in Fig. 14. To evaluate the performance of the designed envelope amplifier, a commercially available twostage GaAs HBT RFPA
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Fig. 17. (a). Measured AM–AM before DPD. (b). Measured AM–AM after DPD.
is used.1 Care is taken to minimize the interconnect length between the envelope amplifier and the RFPA, which might otherwise increase the risk of instability [4]. The performance of the ETPA is measured using a 20MHz LTE signal at 2.535 GHz. The test setup is shown schematically in Fig. 1, where an envelope signal, as well as inphase (I) and quadrature (Q) baseband signals, are generated in the digital domain. After upconversion, the resulting RF signal is provided as input to the RF amplifier, whose supply voltage is modulated by the amplified envelope signal coming from the envelope amplifier. To minimize the distortion caused by the time delay, the difference between the envelope path and the RF path is minimized using a correlation technique. Memoryless digital predistortion (DPD) is utilized to compensate for the expected gain variation of the amplifier over the ET trajectory [2]. For a 20MHz LTE signal with 6.6dB PAPR, the measured overall poweradded efficiency (PAE), after accounting for both the envelope amplifier and the RFPA losses, reaches 43% at an output power of 29 dBm. The envelope amplifier exhibits an average efficiency of 70.5%. Fig. 15 shows the efficiency of the 1[Online]. Available: ments/201225a.pdf
http://www.skyworksinc.com/uploads/docu
Fig. 17. (Continued.) (c). Measured AM–PM before DPD. (d). Measured AM–PM after DPD.
ETPA as a function of the RF output power. For comparison, the standalone RFPA efficiency is also plotted in the same figure. Under a backedoff power condition, an efficiency improvement of as much as 10% is observed. It should be noted that even at 11dB backoff, the ETPA maintains very good efficiency, which is due to the fact that a linear amplifier with very low dc power consumption has been used. The measured constellation plot of the ETPA system is shown in Fig. 16. Measured AM–AM and AM–PM characteristics are shown in Fig. 17 both before and after DPD. The data points are plotted after aligning the time axes between the recorded input and output waveforms. The relatively low scatter of the plotted data points indicates low memory effect. The AM–PM distortion is also minimal, which implies that the HBT has nearly voltage independent output capacitance, which is a desirable property for achieving highest efficiency in an ET system [2]. Fig. 18 shows the measured output power spectral density after DPD. The ACLR of 49 and 53 dBc is achieved at 12.5 and 17.5MHz offset, with a relative constellation error (RCE) of 1.9%. The performance summary of the ETPA system is provided in Table II, which shows that it maintains a very high efficiency, as well as linearity for 20MHz LTE signals. These results are obtained with higher PAPR of 6.6 dB compared to
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the performance potential of monolithic CMOS envelope amplifiers for wideband LTE RFPA applications. ACKNOWLEDGMENT Helpful discussions with B. Hanafi, University of California at San Diego, La Jolla, and the assistance of Dr. M. Kwak, Samsung Electronics, Seoul, Korea, are gratefully acknowledged by the authors. The support of Skyworks Solutions Inc., San Diego, CA, is also gratefully acknowledged. REFERENCES Fig. 18. Measured output PSD after DPD.
TABLE II MEASURED PERFORMANCE OF THE ETPA
specifications: ACLR1
dBc
TABLE III COMPARISON TO PREVIOUS MONOLITHIC ETPAs
[9], which utilizes 6dB PAPR. Therefore, the average output power and the PAE are lower. The linearity in terms of RCE is also considered in these measurements to maintain RCE as low as 1.9%. Table III presents a comparison of this work to previously published ETPAs. VI. CONCLUSION An ETPA consisting of a CMOS envelope amplifier and a GaAs HBT RF PA was presented, which achieves very high efficiency and very wide bandwidth for handset applications. The impact of delay in the current sensing loop on the envelope amplifier efficiency was presented. The effect of envelope shaping on efficiency and stability of the envelope amplifier was also analyzed. The performance of the overall amplifier was measured with a 2.535GHz and 20MHz bandwidth LTE signal, and the PAE is 43% at 29dBm output power. These results demonstrate
[1] D. Chowdhury, C. D. Hull, O. B. Degani, Y. Wang, and A. M. Niknejad, “A fully integrated dualmode highly linear 2.4 GHz CMOS power amplifier for 4G WiMax applications,” IEEE J. SolidState Circuits, vol. 44, no. 12, pp. 3393–3402, Dec. 2009. [2] J. Jeong, D. F. Kimball, M. Kwak, P. Draxler, C. Hsia, C. Steinbeiser, T. Landon, O. Krutko, L. E. Larson, and P. M. Asbeck, “Highefficiency WCDMA envelope tracking basestation amplifier implemented with GaAs HVHBTs,” IEEE J. SolidState Circuit, vol. 44, no. 10, pp. 2629–2639, Oct. 2009. [3] S. C. Cripps, RF Power Amplifiers for Wireless Communications. Norwood, MA: Artech House, 2006. [4] D. Kim, D. Kang, J. Choi, J. Kim, Y. Cho, and B. Kim, “Optimization for envelope shaped operation of envelope tracking power amplifier,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 7, pp. 1787–1795, Jul. 2011. [5] F. Wang, D. F. Kimball, D. Y. Lie, P. M. Asbeck, and L. E. Larson, “A monolithic highefficiency 2.4GHz 20dBm SiGe BiCMOS envelopetracking OFDM power amplifier,” IEEE J. SolidState Circuits, vol. 42, no. 6, pp. 1271–1281, Jun. 2007. [6] J. N. Kitchen, C. Chu, S. Kiaei, and B. Bakkaloglu, “Combined linear and modulated switchmode PA supply modulator for polar transmitters,” IEEE J. SolidState Circuits, vol. 44, no. 2, pp. 404–413, Feb. 2009. [7] W. Chu, B. Bakkaloglu, and S. Kiaei, “A 10 MHz bandwidth 2 mVripple PAsupply regulator for CDMA transmitters,” in Proc. Int. SolidState Circuits Conf., 2008, pp. 448–449. [8] T. Nakatani, J. Rode, D. F. Kimball, L. E. Larson, and P. M. Asbeck, “Digital polar transmitter using a wattclass currentmode classD CMOS power amplifier,” in RFIC Symp. Dig., 2011, pp. 1–4. [9] M. Hassan, M. Kwak, V. W. Leung, C. Hsia, J. J. Yan, D. F. Kimball, L. E. Larson, and P. M. Asbeck, “High efficiency envelope tracking power amplifier with very low quiescent power for 20 MHz LTE,” in RFIC Symp. Dig., 2011, pp. 131–134. [10] R. Castello and P. Gray, “A highperformance micropower switchedcapacitor filter,” IEEE J. SolidState Circuits, vol. SSC20, no. 6, pp. 1122–1132, Jun. 1985. [11] M. Kwak, “High efficiency wideband envelope tracking power amplifier for nextgeneration wireless communications,” Ph.D. dissertation, Dept. Elect. Eng., Univ. California at San Diego, La Jolla, 2011. [12] T.W. Kwak, M.C. Lee, and G.H. Cho, “A 2 W CMOS hybrid switching amplitude modulator for EDGE polar transmitters,” IEEE J. SolidState Circuits, vol. 42, no. 12, pp. 2666–2676, Dec. 2007. [13] P. Y. Wu and P. K. T. Mok, “A twophase switching hybrid supply modulator for RF power amplifiers with 9% efficiency improvement,” IEEE J. SolidState Circuits, vol. 45, no. 12, pp. 1–14, Dec. 2010. [14] C. Hsia, D. F. Kimball, S. Lanfranco, and P. M. Asbeck, “Wideband high efficiency digitallyassisted envelope amplifier with dual switching stages for radio basestation envelope tracking power amplifiers,” in IEEE MTTS Int. Microw. Symp. Dig., 2010, pp. 672–675. [15] J. Choi, D. Kim, D. Kang, J. Park, B. Jin, and B. Kim, “Envelope tracking power amplifier robust to battery depletion,” in IEEE MTTS Int. Microw. Symp. Dig., 2010, pp. 1074–1077. [16] R. Shrestha, R. A. R. van der Zee, A. J. M. Graauw, and B. Nauta, “A wideband supply modulator for 20 MHz RF bandwidth polar PAs in 65 nm CMOS,” IEEE J. SolidState Circuits, vol. 44, no. 4, pp. 1272–1280, Apr. 2009. [17] V. Pinon, F. Hasbani, A. Giry, D. Pache, and C. Gamier, “A singlechip WCDMA envelope reconstruction LDMOS PA with 130 MHz switchedmode power supply,” in Proc. Int. SolidState Circuits Conf., 2008, pp. 564–636.
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[18] D. Kim, J. Choi, D. Kang, and B. Kim, “High efficiency and wideband envelope tracking power amplifier with sweet spot tracking,” in RFIC Symp. Dig., 2010, pp. 255–258. [19] J. Choi, D. Kim, D. Kang, and B. Kim, “A new power management IC architecture for envelope tracking power amplifier,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 7, pp. 1796–1802, Jul. 2011. Muhammad Hassan (M’11) received the B.Sc. (with Honors) degree in electrical engineering from the University of Engineering and Technology, Lahore, Pakistan, in 2008, the M.S. degree in electrical and computer engineering from the University of California at San Diego (UCSD), La Jolla, in 2011, and is currently working toward the Ph.D. degree at UCSD. He is a member of the RFIC Group, UCSD. His current research interests include highefficiency and highlinearity CMOS RFPAs and power management circuits.
Lawrence E. Larson (S’82–M’86–SM’90–F’00) received the B.S. degree in electrical engineering from Cornell University, Ithaca, NY, and the Ph.D. degree from the University of California at Los Angeles (UCLA). From 1980 to 1996, he was at Hughes Research Laboratories, Malibu, CA, where he directed the development of highfrequency microelectronics in GaAs, InP, Si/SiGe, and microelectromechanical systems (MEMS) technologies. In 1996, he joined the faculty of the University of California at San Diego (UCSD), La Jolla, where he was the inaugural Holder of the Communications Industry Chair. From 2001 to 2006, he was Director of the Center for Wireless Communications, UCSD. From 2007 to 2011, he was Chair of the Department of Electrical and Computer Engineering, UCSD. In 2011, he joined Brown University, New Providence, RI, where he is Founding Dean of the School of Engineering. He has authored or coauthored over 300 papers. He coauthored three books. He holds 40 U.S. patents. He has graduated 23 Ph.D. students.
Vincent W. Leung (M’97) received the B.Eng. and M.Eng. degrees in electrical engineering from McGill University, Montreal, QC, Canada, in 1995 and 1998, and the Ph.D. degree in electrical engineering from the University of California at San Diego, La Jolla, in 2004. He has held various analog/ RF design positions with Analog Devices (1997–2000), the IBM T. J. Watson Research Center (2004), and Silicon Laboratories (2005–2008). From 2005 to 2007, he was an Adjunct Assistant Professor with Columbia University, New York, NY, where he taught a graduate course on advanced analog circuits. Since 2008, he had been engaged in the research and development of of cellular RFICs at Qualcomm, San Diego, CA.
Donald F. Kimball (S’82–M’83) was born in Cleveland, OH, in 1959. He received the B.S.E.E. degree (summa cum laude) and the M.S.E.E. degree from The Ohio State University, Columbus, in 1982 and 1983, respectively. From 1983 to 1986, he was with the Data General Corporation, as a TEMPEST Engineer. From 1986 to 1994, he was with Data Products New England, as an Electromagnetic Compatibility Engineer/Manager. From 1994 to 1999, he was with Qualcomm Inc., as a Regulatory Product Approval Engineer/Manager. From 1999 to 2002, he was with Ericsson Inc., as a Research and Technology Engineer/Manager. Since 2003, he has been with the California Institute of Telecommunications and Information Technology (CalIT), University of California at San Diego, La Jolla, as a Principal Development Engineer. He holds four U.S. patents with two patents pending associated with highpower RF amplifiers (HPAs). His research interests include HPA EER techniques, switching HPAs, adaptive digital predistortion, memory effect inversion, mobile and portable wireless device battery management, and small electricpowered radiocontrolled autonomous aircraft.
Peter M. Asbeck (M’75–SM’97–F’00) received the B.S. and Ph.D. degrees from the Massachusetts Institute of Technology (MIT), Cambridge, in 1969 and 1975, respectively. He was with the Sarnoff Research Center, Princeton, NJ, and with Philips Laboratory, Briarcliff Manor, NY, where he was involved in the areas of quantum electronics and GaAlAs/GaAs laser physics. In 1978, he joined the Rockwell International Science Center, where he was involved in the development of highspeed devices and circuits using III–V compounds and heterojunctions. He pioneered efforts to develop heterojunction bipolar transistors based on GaAlAs/GaAs and InAlAs/InGaAs materials. In 1991, he joined the University of California at San Diego, La Jolla, where he is the Skyworks Chair Professor with the Department of Electrical and Computer Engineering. His research interests are in development of highperformance transistor technologies and their circuit applications. His research has led to over 300 publications. Dr. Asbeck is a member of the National Academy of Engineering (NAE). He has been a Distinguished Lecturer of the IEEE Electron Device Society and the IEEE Microwave Theory and Techniques Society (IEEE MTTS). He was the recipient of the 2003 IEEE David Sarnoff Award for his work on heterojunction bipolar transistors.
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A CMOS Distributed Amplifier With Distributed Active Input Balun Using GBW and Linearity Enhancing Techniques Amin Jahanian, Member, IEEE, and Payam Heydari, Senior Member, IEEE
Abstract—A CMOS distributed amplifier (DA) with distributed active input balun is presented that achieves a gainbandwidth cell product of 818 GHz, while improving linearity. Each within the DA employs dualoutput twostage topology that improves gain and linearity without adversely affecting bandwidth (BW) and power. Comprehensive analysis and simulations are carried out to investigate gain, BW, linearity, noise, and stability cell, and compare them with conventional of the proposed cells. Fabricated in a 65nm lowpower CMOS process, the of 10 dBm, while 0.9mm DA achieves 22 dB of gain and a consuming dc power of 97 mW from a 1.3V supply. A distributed balun, designed and fabricated in the same process, using the same topology achieves a BW larger than 70 GHz and a gain of 4 dB with 19.5mW power consumption from 1.3V supply. Index Terms—Active balun, bandwidth (BW) compensation, BW enhancement, CMOS, coplanar waveguide (CPW) transmission line (tline), distributed amplifier (DA), gain BW, linearity.
I. INTRODUCTION
D
ISTRIBUTED amplifiers (DAs) have been used extensively for broadband wired/wireless applications. Various techniques, examined in different technologies, have been proposed by prior work to improve DA performance parameters such as gain, bandwidth (BW), and power [1]–[15]. In [1], multistage cells are used to improve gain, while interstage inductive peaking is employed to compensate for the BW degradation due to interstage poles of the cell. Reference [2] uses cascaded DAs to improve gain, while sacrificing highfrequency matching by removing the backwardpropagation resistive termination of the drain line. Reference [3] uses feedback to double gain, while increasing the lower corner frequency to 12 GHz. In [4], a series capacitor at the input of the cell is introduced, which trades gain for BW. Reference [5] employs nonuniform Manuscript received September 28, 2011; revised November 22, 2011; accepted November 29, 2011. Date of publication February 06, 2012; date of current version April 27, 2012. This work was supported in part by the National Science Foundation (NSF) CAREER Grant under Contract ECS0449433 and by Mindspeed Technologies. This paper is an expanded paper from the IEEE RFIC Symposium, June 5–10, 2011, Baltimore, MD. A. Jahanian was with the Nanoscale Communication Integrated Circuit (NCIC) Laboratory, Electrical Engineering and Computer Science Department, University of California at Irvine, Irvine, CA 926972625 USA. He is now with Qualcomm Atheros Inc., Irvine, CA 92618 USA (email: [email protected]). P. Heydari is with the Electrical Engineering and Computer Science Department, University of California at Irvine, Irvine, CA 926972625 USA (email: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2184134
transmission lines (tlines) to improve efficiency for power amplifiers. In [6], tline tapering and derived terminations are used in a multistage DA to improve BW. A distributed lownoise amplifier (DLNA) is designed for minimum noise figure (NF) for ultrawideband (UWB) applications in [7]. Reference [13] uses differential stages, incorporating crossconnected capacitive neutralization, distributed along nonuniform downsized artificial lines to improve BW. A DA with gain stages comprising input emitter followers and output cascode stages is implemented in an SiGe bipolar technology in [14]. Besides distributed amplification, many broadband amplifiers using other methods have been proposed, as well [16]–[20]. In [16], a lowfrequency amplifier and a highfrequency tuned amplifier are cascaded to design a broadband amplifier. Impedancetuned cascaded emitter–follower drivers have been utilized in an SiGe bipolar technology in [17] and [18] to increase BW of cascodebased lumped amplifiers, while increasing dc power consumption. A synthesisbased BW enhancement technique is presented in [19] that brings bandwidth enhancement ratio (BWER) of CMOS amplifiers close to its theoretical limit. In [20], asymmetric transformer peaking was applied to cascaded commonsource (CS) CMOS stages to enhance BW. Distributed circuits are also implemented in the context of active singletodifferential conversion (i.e., active baluns). Implemented using either active or passive components, baluns are useful for various applications, such as broadband wired connectivity and highfrequency generalpurpose test and measurement equipment. Active baluns offer the advantage of achieving voltage and power gain of higher than (or around) unity, as well as a higher reverse isolation over their passive counterparts. Several active baluns have been proposed in the literature. One solution is to use a differential pair stage with a singleended signal applied to one input transistor’s gate (or base) terminal, while ac grounding the other one [21]–[24]. Another candidate utilizes the 180 phase shift between the outputs of a commongate–commonsource (CG–CS) pair [25]–[28] to realize differential output. An issue with the CG–CS topology is incompatible input impedances of the two stages (i.e., capaciinput for CG). This issue is tive input for CS and resistive addressed in [29] by adding a CSconnected transistor with its gate terminal connected to the input and its drain terminal connected to the input node of the CSCG pair. The original CG–CS topology has been incorporated into the distributed architecture [30]. In [31], CS gain stages are used and differential outputs are taken from farend gate and drain tline terminations. Two DAs (each with inverting CS gain stages) are cascaded and their
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Fig. 2. of the proposed stage and its relative improvement versus single stage.
Fig. 1. (a) Twostage cell. (b) Twostage dual output cell. (c) Twostage cell with compensation. (d) Twostage fully differential dual output cell with compensation.
of a
, as in Fig. 1(b), to introduce an additional signal path. Transistor acts as a cascode device for the new signal path, while behaving similar to a resistive load (with for the first stage of the twostage path. Assuming that the output signals and are summed constructively (as will be shown below), the overall transconductance of the proposed twostage dualoutput cell, , thus becomes (1)
farend terminations are used as balun outputs [32]. Finally, [33] stacks two DAs (with inverting CS gain stages) on top of each other in a 2D matrixlike topology and uses their drain terminations as balun’s outputs. This study presents a CMOS DA with distributed active input balun that achieves high gain and linearity without sacrificing BW and dc power dissipation. In addition to the discussions covered in [34], this paper presents thorough analysis and simulation, investigating performance metrics of the proposed cell used in the DA including gain, BW, and linearity. It also contains additional measurement results for the fabricated DA and balun, as well as more comprehensive performance comparison tables. Specifically, in Section II, the evolution of the cell leading to the proposed architecture is presented. Section II also includes analysis and simulation results verifying the functionality of the proposed topology. Section III discusses the design of the DA, as well as the distributed active balun. Section IV presents measurement results and comparison tables, and Section V provides concluding remarks. II.
CELL TOPOLOGY
A. Proposed Architecture Fig. 1 demonstrates stepbystep evolution of the proposed multistage cell used in the DA. The conventional twostage cell in Fig. 1(a), similar to the one proposed in [1], increases the overall transconductance from (for a single stage cell) to ; where guarantees gain improvement compared to a singlestage cell. The BWlimiting interstage pole of the cell is compensated using an inductivepeakingbased BWenhancement network, comprising in Fig. 1(a). However, the amplified signal power on the resistive drain load, , of the first stage is totally wasted and is not utilized to improve performance. This issue is mitigated in the proposed dualoutput cell by replacing with a transistor
where the first and second terms on the right side represent the equivalent transconductance of and paths, respectively. The addition of the second term indicates gain improvement over conventional twostage cell of Fig. 1(a). The percentage of relative gain improvement compared to the conventional twostage cell is depicted in Fig. 2 (on the left axis) along with the gain expression in (1) (on the right axis) in terms of the gain of a single stage. For these plots, it is assumed that and , for simplicity. Fig. 2 shows gain improvement of 20%–100% compared to conventional twostage cell for gain values achievable by a single stage in a nanoscale CMOS process. This gain improvement comes at no extra power consumption and BW degradation, as will be shown below. B. BW In Fig. 1(b), the path is similar to a cascode stage with an BWenhancement circuit added to remove the cascode pole. The path, however, is different from the twostage cell of Fig. 1(a) in that resistor is replaced by transistor . To see the effect of on BW, we use the simplified equivalent smallsignal model of Fig. 3, where transistor ’s input impedance seen through its source terminal is modeled with a parallel circuit . Here, is modeled by its transconductance , drain capacitance , and drain–source resistance . is modeled by its transconductance and gate capacitance , and with its circuit (where resistance ). The gate capacitance and drain capacitance are absorbed into the tlines and can be removed from the model. SPICE simulations are run to investigate the effect of variation on frequency response, as depicted in Fig. 4. For these simulations, mA/V, fF, k , , and the output current is terminated through a 50
JAHANIAN AND HEYDARI: CMOS DA WITH DISTRIBUTED ACTIVE INPUT BALUN USING GBW AND LINEARITY ENHANCING TECHNIQUES
Fig. 3. Equivalent model of the dualoutput
Fig. 4. Effect of
cell of Fig. 1(b).
source capacitance on frequency response.
Fig. 6. Effect of: (a) sponse.
Fig. 5. DA
cell
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compensation.
resistive load. The BWenhancement network ( pH and pH) is designed for the case where no exists. Fig. 4 shows that as takes on larger values, the voltagegain’s frequency response experiences increasingly more ripple and BW degradation. To mitigate the effects, a BW compensation network with impedance is added in series with the circuit of , as seen in Fig. 5(a). The input impedance, , then becomes
compensation and (b)
variation on frequency re
The effect of adding the parallel compensation circuit to the circuit of Fig. 3 is simulated (Fig. 6). It is evident from Fig. 6(a) that the circuit compensates for the degrading effect of parasitic capacitance, and restores the frequency response of the twostage cell when there is no parasitic effect of . An important consideration is the sensitivity of the transfer function with respect to and values of this BW compensation network. The sensitivity of in Fig. 5(b) with respect to variation in values in (4) is obtained by accounting for relative resistive and inductive offset errors and , respectively. Assuming and in (3), the relative impedance error, , defined as (5)
(2) If is synthesized such that the effective input impedance seen into the source of is purely resistive, i.e., , the effect will have been fully compensated. Using this notion in rearranging (2), we will have (3) can be realized using a parallel in Fig. 5(b), with
is found, after removing secondorder errors (i.e.,
At very low frequencies where fied to
(6) , (6) is simpli(7)
network, as indicated and at higher frequencies where (4)
)
, (6) becomes (8)
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Equations (7) and (8) show that variation in the absolute value of is roughly proportional, to the first degree, to resistive and inductive offset errors. The effect of varying the inductor on the overall transfer function is depicted in Fig. 6(b), where the inductance is varied by 10% of its nominal value. The frequency response, shown via the solid line for the nominal value, and dashed and dotted lines for minimum and maximum values, respectively, shows negligible sensitivity of the frequency response to variation. Similarly, low sensitivity is observed with respect to the resistance variation in the parallel circuit. The resulting dualoutput cell with compensation, shown in Fig. 1(c), has the same BW as the twostage cell of Fig. 1(a). Additionally, the gain improvement [see (1)] provided by this cell results in an increase in gainbandwidth (GBW) compared to conventional twostage cells.
Fig. 7. Lowfrequency models for linearity analysis of: (a) CS stage and (b) proposed stage.
by expressing in terms of and and considering that , we have
for
;
(9) C. Fully Differential Topology In the dualoutput cell with parallel compensation depicted in Fig. 1(c), the drain of sees two paths provided by CS and CG stages and (similar to [29]), resulting in an ideally 180 phase shift between and nodes. If two identical cells are connected to differential input lines and their output nodes are crosscoupled as in Fig. 1(d), each output of the resulting fully differential cell exhibits the same [specified by (1)]. The resulting fully differential cell of Fig. 1(d) enjoys symmetric design and implementation, and minimal phase and amplitude distortion at its two output terminals. D. Power and Area In the dualoutput cell of Fig. 1(c), can easily be sized such that is equal (or close to) the drain resistance in Fig. 1(a). Moreover, the parallel circuit does not affect the dc bias at all, and the gate of can be biased at a dc voltage high enough to ensure that two stacked gate–source voltages and both stay above , given that the supply voltage is 1.3 V. Consequently, the proposed cell can be designed, sized, and biased similar to the conventional twostage cell. This means that no additional power is needed to achieve the gain improvement described by (1). As for chip area, replacing drain resistance with transistor has a negligible effect on area. This is because the overall area is dominated by passive elements (especially the gate/drain tlines) rather than transistor sizes. The circuit added to the proposed cell does not occupy a large area either, as and values are in the order of 50 and 35–72 pH, respectively. The dualoutput cell of Fig. 1(c), therefore, occupies approximately the same size and consumes almost the same power as the conventional cell of Fig. 1(a).
and nMOS The righthand side of (9) is a function of transistor’s parameters, and is a constant with respect to device operating points. On the other hand, using (1) and considering once again that , the overall transconductance of the proposed dualoutput cell is rewritten as (10) Comparing (9) and (10) reveals that the lefthand side of (9) and the righthand side of (10) will be identical if . Hence, the overall will stay constant even in the presence of variations in and . More precisely, as the drain currents fluctuate away from their bias values due to largesignal input voltage, the ’s will change in such a way that stays intact. This large signal constant characteristic results in improvement in linearity. This phenomenon can be analyzed using the squarelaw I–V relation of MOS transistors (a similar approach has been presented in [35]). The following notations are introduced so as to make it easier to follow the forthcoming analysis. DC biasing signals are represented with uppercase letters and uppercase indices (e.g., ), and smallsignal ac signals are represented with lowercase letters and lowercase indices (e.g., ). The sum of these two components is represented using lowercase letters with uppercase indices (e.g., ). The nMOS I–V characteristic is expressed as , where constant common parameters are grouped together in the form of . To facilitate the linearity analysis, the lowfrequency circuit model for a conventional CS stage and the proposed dualoutput cell are utilized (Fig. 7). For the CS stage of Fig. 7(a), the smallsignal drain current, , is expressed as a function of gate–source voltage [36] (11)
E. Linearity Transistor in the cell of Fig. 1(c) is biased from the dc voltage applied through the gate tline, and is biased at , where . Using this voltage relationship, and
Assuming
, (11) is rewritten as
(12)
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Consequently, the ratio between second and fundamental harmonic amplitudes in a CS stage, , is (13) For the proposed found using (11)
cell of Fig. 7(b), the drain currents are
Fig. 8. Compression curves for the proposed and cascode
cells.
(14) Using the relations and , we rearrange (14) in order to find the overall output current as a function of input voltage
(15) yields
(16) From (16), the ratio of the second to the fundamental harmonics for the proposed cell is (17) Referring to (17), maximum linearity is achieved when the second harmonic (numerator) vanishes. This occurs when , which verifies the conclusion made earlier through intuitive analysis. While equal aspect ratios for and results in maximum linearity, higher gain improvement is achieved for larger [see (1)], i.e., , at the expense of reduced linearity improvement. Therefore, design solutions for maximum gain improvement and maximum linearity improvement differ from each other, indicating that a tradeoff exists between gain and linearity improvements for this topology. To delve deeper into this notion, we compare linearity of the proposed dualoutput cell (for ) and conventional CS stage. For simplicity, in (17), we assume all devices have the same overdrive voltage, . Moreover, we choose (with to achieve voltage gain) and . , and , therefore, become
Fig. 9. Signal loop in the differential and (b) parameter simulation.
cell. (a) Circuitlevel representation
(18) The linearity improvement ratio between the dualoutput cell and the CS stage, defined as , will be (19) For values of close to 1 (which improves the frequency behavior of cells in highfrequency DAs), the condition ensures that is larger than unity. Consequently, the topology does improve linearity even when it is optimized for gain improvement. For instance, for
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Fig. 10. Fourstage DDA with threestage distributed input balun.
Fig. 11. Twostage distributed balun.
( and ), a linearity improvement of 5 can be achieved. For more gain improvement, (e.g., and ), linearity improvement drops to 3, verifying tradeoff between gain and linearity improvements. To simulate linearity of the proposed topology, a conventional cascode cell and the dualoutput cell were designed for the same resistive load, voltage gain, and power consumption. Simulations were conducted to extract outputreferred 1dB compression points for the two structures. Both cells use the same resistive load of 50 with overall dc current of 8.7 mA for cascode and 8.2 mA for the proposed cell from a 1.2V power supply. The cascode cell achieved a dc gain of 8.4 dB and an of 2.0 dBm, whereas the proposed cell achieved a dc gain of 8.8 dB and an of 5.5 dBm. Consequently, for this case study, the proposed cell achieved a 3.5dB improvement in compared with a conventional cascode cell under similar conditions, as seen in Fig. 8. During design and optimization, in addition to gain and linearity requirements, other criteria need to be met, as well. For
Fig. 12. Die microphotograph of the: (a) DA and (b) standalone twostage balun.
instance, making too large to further increase gain will make inductive peaking less effective due to excessive parasitic capacitance. In the meantime, making too small will lead to excessively large , which makes hard to realize at nominal supply voltages around 1–1.3 V. For this design, approximate values of are chosen to address these concerns.
JAHANIAN AND HEYDARI: CMOS DA WITH DISTRIBUTED ACTIVE INPUT BALUN USING GBW AND LINEARITY ENHANCING TECHNIQUES
Fig. 13. Measured and simulated: (a) parameters, (b)
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, (c) NF, (d) GD, (e) phase response, and (f) phase imbalance of the DA.
F. Noise Noise analysis for each of the two inputoutput paths of the twostage cell in Fig. 1(c) results in two different inputreferred noise voltages. For the path, the cascode device does not contribute to the overall noise because of the large resistive degeneration provided by in the equivalent noise circuit model. Neither does the second stage transistor since it is not directly in the signal path. Consequently, the overall inputreferred noise voltage reflects only the thermal noise component contributed by the input transistor, (20) path, the thermal noise comHowever, for the ponents of all three transistors contribute to overall output noise power. Using superposition, the overall inputreferred noise voltage is found to be
(21) From (20) and (21), it is evident that increasing the ratio improves overall noise performance. This is in line with the gain performance of the cell. Therefore, in the gainlinearity tradeoff investigated in Section IIE, improving gain results in noise improvement as well. G. Stability In the fully differential cell of Fig. 1(d), a signal loop is formed due to the crosscoupled connection of two cells in Fig. 1(c). Here, we show this loop entails significant signal attenuation, and therefore does not create instability issue for the amplifier. We first expand the cell as seen in Fig. 9(a), where
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Fig. 14. Measured and simulated: (a)
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, (b) parameters, (c) phase response, (d) phase imbalance, (e) gain imbalance, and (f)
is the characteristic impedance of the drain tline. The lowfrequency loop gain, , is found from point to point and back to in Fig. 9(a) in the forward direction (the reverse direction clearly includes considerable attenuation close to ideal isolation at low frequencies)
of the distributed balun.
DA. The plots show an increasingly large reverse attenuation at dc and minimum reverse attenuation larger than 30 dB. It also shows a dc forward attenuation of 25 dB and minimum forward attenuation of 18 dB across the BW of around 80 GHz. III. PROPOSED DA
(22) It is evident from (22) that for practical CMOS amplifiers, significant attenuation exists along the loop. For instance, for , is approximately ten times larger than , and with , 40dB attenuation in the loop gain will be obtained. This amount of attenuation is far too much to lead to any unstable or closetounstable behavior in the amplifier in any condition. Eventually, the proposed cell follows the same stability rules as other CSbased DAs. Fig. 9(b) depicts the simulated loop gain in the forward and reverse directions for the cell designed for the
The ideally differential outputs of the proposed dualoutput cell in Fig. 1(c) makes it suitable for a: 1) distributed balun and 2) distributed fully differential distributed amplifier (DDA) incorporating symmetric crosscoupled cells of Fig. 1(d). Shown in Fig. 10 is the complete DA (along with device sizes) that is composed of a threestage distributed balun followed by a fourstage DDA. In Fig. 10, V and V. The circuit uses differential coplanar waveguides (CPWs) as tlines with signal lines on top Al metal, ground walls on all metals, and slotted ground shield on lowest metal. The distributed input balun of the DA shown in Fig. 10 is also designed as a standalone twostage distributed balun, shown in Fig. 11. To
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TABLE I DA MEASUREMENT RESULTS AND COMPARISON WITH PRIOR WORK
BW is calculated as the difference of higher and lower 3dB frequencies.
achieve impedance matching, the DDA and the balun should have equal characteristic impedance . Since the DDA is the main provider of gain, and thus contains larger transistors with larger parasitic input/output capacitances, its CPWs are longer to allow for higher inductance. These CPWs are carefully bent using 45 line breaks so that the DDA chip is not overextended in one dimension. DA and balun CPWs have of 93 and 118 GHz and unloaded of 87 and 84 , respectively. The balun output and the DDA input are dc coupled to avoid the degrading effects of an ac coupling capacitor. The spiral inductors and interconnects inside the cells are implemented in a top Cuthick metal layer to minimize loss. The inductors are all octagonal spirals smaller than 70 m in diameter, with an inductance of 40 220 pH and a maximum close to 20. The approximate spiral inductor values are shown in the table in Fig. 10. The inductances lower than 35 pH (approximate value) are realized using tlines. All CPWs, inductors, tlines, and interconnects have been electromagnetic (EM) simulated using a Sonnet planar EM simulator to accurately capture highfrequency effects. Moreover, all inductors and interconnects within any cell have been EM simulated together as a complex multiport structure to capture and minimize any parasitic mutual coupling that could degrade performance at high frequencies. IV. MEASUREMENT RESULTS The DA and standalone balun are fabricated in a 65nm lowpower (LP) CMOS process with GHz and V (Fig. 12). Two 65GHz bias tees are connected at the output and one at the input to isolate the dc biases of these nodes from equipment ports. Both measured and simulated parameters of the DA are shown in Fig. 13(a). The DA has a measured inband voltage gain of 22 dB and an less than 10 dB. The voltage gain stays within 3 dB of its lowfrequency value for frequencies up to 65 GHz. It is found from parameter curves in Fig. 13(a) that the DA is stable across the BW. Fig. 13(b) shows measured and simulated transfer curves of the DA for 2, 10, and 20GHz input tones, where an average measured differential output of 10 dBm is reported.
The NF of the DA, measured using a 40GHz noise source, is depicted in Fig. 13(c), where a measured inband NF of 7 dB is achieved up to 40 GHz. Fig. 13(d) shows measured and simulated group delay (GD) versus frequency. The relatively flat GD of around 40 ps proves high phase linearity across the band. In Fig. 13(d), the GD at low frequencies is adversely affected by the input/output dc coupling capacitors of the bias tees. Fig. 13(e) shows measured and simulated phase responses of the transfer functions for two main outputs of the DA. Both measured and simulated responses show almost linear phase response. The phase imbalance of the two phase responses, shown in Fig. 13(f), demonstrates less than 12 of phase imbalance over the entire frequency range. Measurement results of the standalone balun are shown along with simulation results in Fig. 14, where a measured voltage gain of 4 dB and a measured of less than 10 dB are reported. The measured BW of the balun exceeds (and is thus limited by) the BW of test equipment, which is 70 GHz. Fig. 14(a), however, shows a simulated BW of around 80 GHz. Phase and gain imbalance between the two outputs is an important performance metric of baluns. This becomes more crucial for baluns that are structurally asymmetric such as the one proposed in this paper. The measured phase response of the balun is shown in Fig. 14(c) along with the simulation result. The fabricated balun exhibits phase imbalance of less than 10 across the BW, as seen in Fig. 14(d). In Fig. 14(e), gain imbalance of the balun is shown, which demonstrates a measured imbalance of less than 1 dB across the BW. The 1dB compression point of the balun for 2 and 10GHz input tones is depicted in Fig. 14(f), which shows an outputreferred of 2 dBm. Simulation results for plots of Figs. 13 and 14 are shown to help comparison with measurement results. Tables I and II present and compare performance summary of the DA and the distributed balun with prior work, respectively. Table I shows 818GHz GBW along with high linearity for the proposed DA compared to prior art. Table II shows superior gain and BW performance with lowest power consumption for the presented distributed balun. It also shows that despite its asymmetric structure, the balun achieves low phase and
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TABLE II DISTRIBUTED BALUN MEASUREMENT RESULTS AND COMPARISON WITH PRIOR WORK
gain imbalance compared to prior art. The input balun and the DDA consume 18 and 57mA current from a 1.3V supply, respectively. The overall circuit consumes 97 mW, and occupies 0.94 mm without and 1.58 mm with pad rings. The standalone balun consumes a 15 mA current from 1.3V supply, and occupies a chip area of 0.16 mm without and 0.64 mm with pads. V. CONCLUSION A DA and a distributed balun are designed in a 65nm CMOS process that achieve gain and linearity improvement without degrading BW, power consumption, and area. This is due to the use of a twostage dualoutput cell with parallel R–L circuit for BW compensation. Gain and linearity improvement is verified through comprehensive analysis, modeling, and simulations. Extensive EM simulation, as well as corner and postlayout simulation, have resulted in a good match between simulation and measurement results. ACKNOWLEDGMENT The authors would like to thank MOSIS, Marina Del Rey, CA, Mindspeed Technologies Inc., Newport Beach, CA, and C. Wang, University of California at Irvine, F. Tzeng, Zerowatt Tech., Irvine, CA, and V. Jain, SaberTek Inc., Irvine, CA. REFERENCES [1] J. C. Chien and L. H. Lu, “40Gb/s highgain distributed amplifiers with cascaded gain stages in 0.18 m CMOS,” IEEE J. SolidState Circuits, vol. 42, no. 12, pp. 2715–2725, Dec. 2007. [2] M. D. Tsai et al., “A 70 GHz cascaded multistage distributed amplifier in 90 nm CMOS,” in Int. SolidState Circuits Conf. Tech. Dig., Feb. 2005, pp. 402–403. [3] A. Arbabian and A. M. Niknejad, “A broadband distributed amplifier with internal feedback providing 660 GHz GBW in 90 nm CMOS,” in Int. SolidState Circuits Conf. Tech. Dig., Feb. 2008, pp. 196–197. [4] R. C. Liu et al., “An 80 GHz travellingwave amplifier in a 90 nm CMOS technology,” in Int. SolidState Circuits Conf. Tech. Dig., Feb. 2005, pp. 154–155. [5] J. Chen and A. M. Niknejad, “Design and analysis of a stagescaled distributed power amplifier,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 5, pp. 1274–1283, May 2011. [6] A. Arbabian and A. M. Niknejad, “Design of a CMOS tapered cascaded multistage distributed amplifier,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 4, pp. 938–947, Apr. 2009. [7] P. Heydari, “Design and analysis of a performanceoptimized CMOS UWB distributed LNA,” IEEE J. SolidState Circuits, vol. 42, no. 9, pp. 1892–1905, Sep. 2007. [8] J. Kim and J. F. Buckwalter, “A 92 GHz bandwidth distributed amplifier in a 45 nm SOI CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 6, pp. 329–331, Jun. 2011. [9] J. Kim et al., “A 12 dBm 320 GHz GBW distributed amplifier in a 0.12 m SOI CMOS,” in Int. SolidState Circuits Conf. Tech. Dig., Feb. 2004, pp. 478–540.
[10] J.O. Plouchart et al., “A 4–91GHz travelingwave amplifier in standard 0.12 m SOI CMOS microprocessor technology,” IEEE J. SolidState Circuits, vol. 39, no. 9, pp. 1455–1461, Sep. 2004. [11] C. Pavageau et al., “A 7dB 43GHz CMOS distributed amplifier on highresistivity SOI substrates,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 3, pp. 587–598, Mar. 2008. [12] F. Ellinger, “60GHz SOI CMOS travellingwave amplifier with NF below 3.8 dB from 0.1 to 40 GHz,” IEEE J. SolidState Circuits, vol. 40, no. 2, pp. 553–558, Feb. 2005. [13] A. Yazdi, D. Lin, and P. Heydari, “A 1.8 V threestage 25 GHz 3 dBBW differential nonuniform downsized distributed amplifier,” in Int. SolidState Circuits Conf. Tech. Dig., Feb. 2005, pp. 156–590. [14] O. Wohlgemuth, P. Paschke, and Y. Baeyens, “SiGe broadband amplifiers with up to 80 GHz bandwidth for optical applications at 43 Gbit/s and beyond,” in 33rd Eur. Microw. Conf., Oct. 2003, vol. 3, pp. 1087–1090. [15] L.H. Lu, T.Y. Chen, and Y.J. Lin, “A 32GHz nonuniform distributed amplifier in 0.18mm CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 11, pp. 754–747, Nov. 2005. [16] J. Kim and J. F. Buckwalter, “Staggered gain for 100 GHz broadband amplifiers,” IEEE J. SolidState Circuits, vol. 46, no. 5, pp. 1123–1136, May 2011. [17] S. Trotta et al., “An 84 GHz bandwidth and 20 dB gain broadband amplifier in SiGe Bipolar technology,” IEEE J. SolidState Circuits, vol. 42, no. 10, pp. 2099–2106, Oct. 2007. [18] W. Perndl et al., “A 60 GHz broadband amplifier in SiGe bipolar technology,” in Proc. Bipolar/BiCMOS Circuits Technol. Meeting, Sep. 2004, pp. 293–296. [19] D. Pi, B.K. Chun, and P. Heydari, “A synthesisbased bandwidth enhancement technique for cmos amplifiers: Theory and design,” IEEE J. SolidState Circuits, vol. 46, no. 2, pp. 392–402, Feb. 2011. [20] J.D. Jin and S. Hsu, “A miniaturized 70GHz broadband amplifier in 0.13 m CMOS technology,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 12, pp. 3086–3092, Dec. 2008. [21] C. Viallon et al., “Design of an original band active balun with improved broadband balanced behavior,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 4, pp. 280–282, Apr. 2005. [22] B. J. Huang et al., “A 2–40 GHz active balun using 0.13 m CMOS process,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 3, pp. 164–166, Mar. 2009. [23] S.H. Weng, H.Y. Chang, and C.C. Chiong, “A DC–21 GHz low imbalance active balun using darlington cell technique for high speed data communications,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 11, pp. 728–730, Nov. 2009. [24] B. Welch, K. T. Kornegay, H.M. Park, and J. Laskar, “A 20GHz lownoise amplifier with active balun in a 0.25 m SiGe BICMOS technology,” IEEE J. SolidState Circuits, vol. 40, no. 10, pp. 2092–2097, Oct. 2005. [25] T. Hiraoka et al., “A miniaturized broadband MMIC frequency doubler,” IEEE Trans. Microw. Theory Tech., vol. 38, no. 12, pp. 1932–1937, Dec. 1990. [26] M. C. Tsai et al., “A compact wideband balanced mixer,” in IEEE MTTS Int. Microw. Symp. Dig., 1994, pp. 5–8. [27] M. Kawashima et al., “A novel broadband active balun,” in 33rd Eur. Microw. Conf., Oct. 2003, vol. 2, pp. 495–498. [28] P.Z. Rao, T.Y. Chang, C.P. Liang, and S.J. Chung, “An ultrawideband highlinearity CMOS mixer with new wideband active baluns,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 9, pp. 2184–2192, Sep. 2009. [29] K. Jung et al., “Broadband active balun using combined cascode—Cascade configuration,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 8, pp. 1790–1796, Aug. 2008.
JAHANIAN AND HEYDARI: CMOS DA WITH DISTRIBUTED ACTIVE INPUT BALUN USING GBW AND LINEARITY ENHANCING TECHNIQUES
[30] A. M. Pavio, R. H. Halladay, S. D. Bingham, and C. A. A. Sapashe, “Double balanced mixers using active and passive techniques,” IEEE Trans. Microw. Theory Tech., vol. 36, no. 12, pp. 1948–1957, Dec. 1988. [31] A. H. Baree and I. D. Robertson, “Analysis and design of multioctave MMIC active baluns using a distributed amplifier gate line termination technique,” in IEEE MTTS Int. Microw. Symp. Dig., May 16–20, 1995, vol. 2, pp. 865–868. [32] I. D. Robertson and A. H. Aghvami, “A novel wideband MMIC active balun,” in Proc. 20th Eur. Microw. Conf., 1990, vol. 1, pp. 419–423. [33] M. Ferndahl and H. O. Vickes, “The matrix balun—A transistorbased module for broadband applications,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 1, pp. 53–60, Jan. 2009. [34] A. Jahanian and P. Heydari, “A CMOS distributed amplifier with active input balun using GBW and linearity enhancing techniques,” in IEEE RFIC Symp., Jun. 2011, pp. 1–4. [35] K. Bult and H. Wallinga, “A class of analog CMOS circuits based on the squarelaw characteristic of an MOS transistor in saturation,” IEEE J. SolidState Circuits, vol. SSC22, no. 3, pp. 357–365, Jun. 1987. [36] B. Razavi, Design of Analog CMOS Integrated Circuits. New York: McGrawHill, 2001, ch. 13. Amin Jahanian (S’05–M’11) received the B.S. and M.S. degrees in electrical engineering from the Sharif University of Technology, Tehran, Iran, in 2003 and 2005, respectively, and the Ph.D. degree in electrical engineering from the University of California at Irvine, in 2011. In Summer 2007, he was with Fujitsu Laboratories of America, where he was involved with modeling and design of millimeterwave frequency synthesizers. In Summer 2008 and 2010, he was with Qualcomm Inc., where he designed an ultracompact onchip tone generator for calibration purposes and a realpower detector for Bluetooth and wireless local area network (WLAN) transmitter modules. In 2011, he joined Qualcomm Atheros Inc., Irvine, CA as a Senior Engineer. Mr. Jahanian was the recipient of the Henry Samueli School of Engineering Fellowship Award in 2006, the Center for Pervasive Communications and Computing (CPCC) Fellowship Award in 2007, and Mindspeed Fellowship Award in 2010. He was a corecipient of the Eighth International LowPower Design Contest Award presented at ISLPED 2008.
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Payam Heydari (S’98–M’00–SM’07) received the B.S. and M.S. degrees (with honors) in electrical engineering from the Sharif University of Technology, Tehran, Iran, in 1992 and 1995, respectively, and the Ph.D. degree in electrical engineering from the University of Southern California, Los Angeles, in 2001. In August 2001, he joined the University of California at Irvine (UCI), where he is currently a Professor of electrical engineering. He is the cofounder of ZeroWatt Technologies Inc. He coauthored one book and over 90 journal and conference papers. His research interests include the design of highspeed analog, RF, and mixedsignal integrated circuits. Dr. Heydari has been a guest editor for the IEEE JOURNAL OF SOLIDSTATE CIRCUITS. He currently serves on the Technical Program Committees of the Compound Semiconductor Integrated Circuit Symposium (CSICS). He was an associate editor of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—PART I: REGULAR PAPERS (2006–2008). He was a Technical Program Committee member of the IEEE Custom Integrated Circuits Conference (CICC), the International Symposium on LowPower Electronics and Design (ISLPED), the IEEE Design and Test in Europe (DATE), and the International Symposium on Quality Electronic Design (ISQED). The Office of Technology Alliances, UCI, has named him one of ten outstanding innovators at the university. He was the corecipient of the 2009 Business Plan Competition First Place Prize Award and Best Concept Paper Award, both from the Paul Merage School of Business at UCI, the 2010 Faculty of the Year Award from the Engineering Student Council (ECS), UCI, the 2009 School of Engineering Fariborz Maseeh Best Faculty Research Award, the 2007 IEEE Circuits and Systems Society Guillemin–Cauer Award, the 2005 National Science Foundation (NSF) CAREER Award, the 2005 IEEE Circuits and Systems Society Darlington Award, the 2005 UCI School of Engineering Teaching Excellence Award, the Best Paper Award of the 2000 IEEE International Conference on Computer Design (ICCD), the 2000 Honorable Award of the Department of Electrical Engineering Systems, University of Southern California, and the 2001 Technical Excellence Award in the area of electrical engineering from the Association of Professors and Scholars of Iranian Heritage (APSIH). He was also recognized as the 2004 Outstanding Faculty of the Electrical Engineering and Computer Science Department, UCI. His research on novel LP multipurpose multiantenna RF frontends received the LowPower Design Contest Award presented at the 2008 IEEE International Symposium on LowPower Electronics and Design (ISLPED).
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MillimeterWave SelfHealing Power Amplifier With Adaptive Amplitude and Phase Linearization in 65nm CMOS Jenny YiChun Liu, Student Member, IEEE, Roc Berenguer, Member, IEEE, and MauChung Frank Chang, Fellow, IEEE
Abstract—A selfhealing twostage millimeterwave broadband power amplifier (PA) with onchip amplitude/phase compensation is realized in 65nm CMOS. The amplitude and phase compensations are accomplished by using feedback bias/capacitive schemes to extend the linear operation region and optimize the PA efficiency. Tunable control knobs are inserted in the linearization block to enhance the PA performance yield against process/temperature variations and device ageing effects. This prototype shows a 5.5dB improvement of the output 1dB compression point and a less than 2% chiptochip gain variation. At a 1V supply, the differential PA achieves a saturation output of 14.85 dBm with a peak poweraddedefficiency power (PAE) of 16.2%. With the amplitude compensation, is increased to 13.7 dBm. With the phase compensation, the output phase variation is decreased to less than 0.5°. To the best of our knowledge, this prototype provides the highest and with simultaneously high PAE from a single PA reported to date. The PA delivers a linear gain of 9.7 dB and has a 7GHz 3dB bandwidth from 55.5 to 62.5 GHz with a compact total area of 0.042 mm . Index Terms—CMOS, millimeterwave integrated circuits, power amplifier (PA), transformers, band.
I. INTRODUCTION
O
VER THE past decade, the emerging demands for highdatarate (multiGb/s), shortrange wireless communications have led to dramatic progress in the development of lowcost millimeterwave wireless systems [1], [2]. With its appealing characteristics, such as broad bandwidth and secure channel reusability, the unlicensed spectrum around 60 GHz is ideal to support the multiGb/s wireless link applications,
Manuscript received September 28, 2011; revised February 07, 2012; accepted February 09, 2012. Date of publication April 03, 2012; date of current version April 27, 2012. This work was supported in part by the Defense Advanced Research Projects Agency (DARPA)/U.S. Navy under Grant N660010912030. This paper is an expanded paper from the IEEE RFIC Symposium, June 5–10, 2011, Baltimore, MD. J. Y.C. Liu was with the Department of Electrical Engineering, University of California at Los Angeles (UCLA), Los Angeles, CA 90095 USA. She is now with the Department of Electrical Engineering, National Tsing Hua University, Hsinchu 300, Taiwan (email: [email protected]). R. Berenguer is with the Electronic Engineering Department, Technological Campus of University of Navarra (TECNUN), 20018 San Sebastian, Spain, and also with the Communications Integrated Circuit Design Group (COMMIC), Centro de Estudio e Investigaciones Técnicas (CEIT), 20018 San Sebastian, Spain. M.C. F. Chang is with the Department of Electrical Engineering, University of California at Los Angeles (UCLA), Los Angeles, CA 90095 USA. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2189119
Fig. 1. Output power and PAE of recent reported
band PAs.
such as highdefinition video streaming and highspeed data transfer. In order to achieve high data rate, complex digital modulation schemes are usually used, which require a highly linear transmitter to minimize both error vector magnitude (EVM) and spectral regrowth. The power amplifier (PA) greatly affects the output signal quality and the overall efficiency and remains one of the most challenging blocks in a CMOS transceiver. The recently reported millimeterwave PAs mainly focus on delivering high output power and providing high power gain by techniques such as power combining, neutralization, and lowloss passive design in CMOS [3]–[12], and novel stackedtransistor structure in metamorphic HEMTs [13]. Notwithstanding the advantages of lowcost and highlevel integration capability, the nonlinear transconductance and temperaturedependent mobility of the deepscaled CMOS process often result in early gain compression in PAs. This leads to a soft gain profile that has a large setback of the output 1dB from the saturation output power compression point and that severely limits the linear operating range under a constrained supply voltage. To maintain the required linearity performance, the PA commonly operates at the power backoff from . However, the output power and the efficiency roll off rapidly in the power backoff region. Fig. 1 shows the efficiency for a collection of band PAs at its peak output power and at 1, 3, and 6dB power backoff regions. The efficiency drops below 10% when the PA is at the 3dB backoff. Poor efficiency in the power backoff region results in a short battery life for portable devices. To enhance the available linear output power and the average operating efficiency, a linearization/efficiency enhancement technique is necessary. However, common linearization techniques encounter practical design difficulties at millimeter
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Fig. 3. Circuit schematic of the PA.
Fig. 2. Selfhealing transmitter block diagram.
wave frequencies at wide signal bandwidth and amplitude/phase path mismatches [14]. Moreover, most of the approaches require complicated auxiliary circuitries, such as a highefficiency dctodc converter and digital calibration that consume extra power and silicon area. In addition to the abovementioned issues, there are additional design challenges coming from CMOS technology to a PA design. The challenges arise from the low breakdown voltage, the conductive substrate, and the high sheet resistance of the polysilicon that limit the output power, efficiency, linearity, and gain of the PA. As the device feature size continues to scale down, process variations become significant and deteriorate the designformanufacturability (DFM) of highperformance PAs. In deepscaled CMOS technology, the issues of performance yield and device ageing have become as important as the circuit performance itself. In recent years, selfhealing lownoise amplifiers (LNAs) have been proposed. Novel calibration methods are presented to maintain the input match at 1.9 GHz with the need of an external RF signal source [15] and to improve LNA performance yield at 875 MHz based on oscillation principles [16], [17]. In this paper, the first selfhealing linear CMOS PA in the 60GHz unlicensed band is presented. This is the first CMOS millimeterwave PA integrated with onchip amplitude and phase compensations to effectively enhance the linearity and the backoff efficiency of the PA, which makes it suitable for the high datarate wireless digital communications. By a builtin dynamic feedback bias control scheme, the is extended by 5.5 dB to fully utilize the limited supply voltage to maximize the linear power region, thus increasing the transmitted power while satisfying the spectrum and constellation requirements 0. Compared with the conventional feedback schemes, the proposed feedback presents a simple linearization method that can be easily embedded to the PA. A phasecompensation technique is applied to overcome the phase variation when power varies. In the compensation blocks, lowoverhead tunable knobs are proposed to selfheal the performance in response to process and environmental variations. Fig. 2 shows that the proposed PA can be integrated with a conventional transmitter, detectors, a selfhealing controller (SHC), and a baseband processor to enable a selfhealing transmitter [19]. With the selfhealing loop, the output profile of the PA is tunable and can be used
to compensate the compressive gain profile of the previous stages in a conventional transmitter. It can be further used to overcome any variations that cause gain deviation and results in an overall flat gain over the output power that is desirable in modern wireless communication systems with complex digital modulation schemes. The tunable knobs improve the performance yield to achieve an average of 2% chiptochip gain variation of the PA. This unique aspect of PA design has not been discussed or implemented in prior arts. This prototype occupies an area of 0.47 mm 0.76 mm and is implemented in 65nm CMOS technology. This paper is organized as follows. Section II describes the design details of the baseline PA and the proposed compensation circuits. Section III presents the concept of the selfhealing algorithm. The measurement results of the 65nm PA prototype are presented in Section IV followed by a conclusion in Section V. II. SELFHEALING PA DESIGN This section presents the design of the PA in 65nm 1P6M standard CMOS technology with the emphasis on the proposed amplitude and phase compensation techniques to linearize the PA. A. Baseline PA Design A twostage PA is designed to simultaneously optimize output power, efficiency, and linearity at all power levels while maintaining a compact size. This PA is a differential transformercoupled design. The circuit schematic is shown in Fig. 3. This 65nm CMOS process offers six metal layers with one thick top metal for lowloss passive design and interconnects. The unity current gain frequency and unity power gain frequency of the devices are higher than 180 and 200 GHz, respectively. The gate lengths of all amplifier devices are 60 nm to minimize the channel transit time. Both stages of the PA are designed with the common source topology to maximize voltage headroom under a limited power supply. In order to deliver a large output power, the output stage of the PA must have a sufficiently large device periphery. Size cannot be excessively large because of the large parasitics associated with it that introduce extra loss. Furthermore, it implies a low inductance is needed for the load. This can be achieved by reducing the coil width or the coil diameter. However, both methods have limitations in physical implementation. The amplifier is designed in a way that the first stage saturates later than
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the last stage, and therefore does not limit the overall . The inputreferred of the first stage is approximately 3.5 dB larger than the inputreferred of the output stage. Therefore, the maximum linear power is dominated by the last stage. The transistor sizes of the two stages are 80 m and 120 m with a finger width of 1 and 1.2 m, respectively. A finger width around 1 m in advanced technology presents a good compromise between power gain and output power [20]. A large finger width results in a high gate resistance that decreases . A large number of fingers complicates the routing interconnects in a device layout that introduce extra losses and decrease gain. A finger width of 1.2 m instead of 1 m in the last stage provides a layout with smaller aspect ratio that minimizes interconnect lengths. Differential configuration is chosen to minimize the interferences to other blocks, lower the evenorder harmonics, and reject the commonmode noise. The amplitude/phase mismatches between the differential paths are within 0.5 dB and 1°, respectively, from small to largesignal regions. These numbers are kept small because of the simple design and the careful performed symmetrical layout. The mismatches result in a gain degradation of 0.2 dB. An RC network is added at the gates of both stages to stabilize the amplifier around 40 GHz without significantly degrading the power gain at 60 GHz. The amplifier is biased at classAB region to balance gain, power, and efficiency. This design utilizes transformers to provide a compact impedance matching, improve the stability, and enable a simple biasing scheme applied at the center taps. The highpass characteristic of the transformers ensures stability at low frequencies. At the input and output ports, the transformers achieve impedance matching and also convert singleended signals to differential ones and vice versa to simplify the testing interface with singleended instruments. These transformers are designed with the RF pads to match to a 50 load at 60 GHz. The loss of the input and output pads is around 0.8 dB. The width of the input transformer is relatively narrow (4 m) to minimize the capacitive coupling from coils to substrate to maximize the selfresonant frequency. Both the primary and secondary coils are implemented on the top metal to maximize the quality factors. The width of the interstage and output transformers ( and ) is wider (10 m) to provide low inductances to match with large devices in the last stage and to provide sufficient currenthandling capability ( 100 mA). Due to their large sizes, vertically stacked transformers are adopted for a compact design. Stabilizing resistors are inserted at the center taps of the transformers to improve the commonmode stability. Since the device characteristics are highly layoutdependent, transistors, interconnects, and passive components are modeled in a fullwave electromagnetic (EM) simulator to characterize the distributed effects.
B. Adaptive Biasing Scheme To ensure the linearity performance is maintained in the entire dynamic range, the PA needs to be biased at a high quiescent point to provide linear operation in the high power region. However, it is not power efficient to maintain the high bias condition
Fig. 4. Concept of the adaptive biasing scheme.
when the transmitted power is low. In general, a communication system works at its peak power level in less than 10% of its total operation period. The PA wastes a significant amount of power if the biasing current is high. To simultaneously optimize the poweradded efficiency (PAE) and linearity across the whole dynamic range, Fig. 4 shows a simple adaptive biasing scheme. The dynamic bias control unit tracks the output swing of the PA and adjusts the bias of the PA accordingly. The proposed bias scheme along with the PA schematic is shown in Fig. 3. In order to maximize the linear operating power range and improve the backoff efficiency, a novel feedback bias control loop ( – , , , and ) is applied to the last stage to dynamically adjust its gate bias according to the output power level. This amplitude compensation circuitry presents small area (0.5%) and power (1%) overheads. Lowthreshold pMOS devices ( , ) are connected to the last stage as an envelope detector to sense the differential output voltage. These two transistors have a negligible effect on the PA performance due to their small loading imposed on the PA. Depending on the sensed output voltage swing, the feedback loop adjusts the gate bias of the last stage ( , ) in real time. The optimal curve is first acquired from simulation to minimize dc power consumption in the low power region and adaptively increase the gain while the power increases. The sizes of are selected accordingly so that the feedback bias matches the optimal one from simulation. A 1pF capacitor is inserted to filter the highfrequency components. By properly selecting the parameters of , , and , the bandwidth of the loop can be set higher than that of the signal envelope. The bandwidth of the loop can be estimated by the following equations: Bandwidth
(1) (2) (3)
where and represent the total resistance and capacitance at the node , respectively. Since is much larger than the input capacitance of the output stage , is dominated by . With a sufficient bandwidth, can promptly track the input signal envelope. In this study, the 3dB bandwidth of this feedback loop is 2 GHz, as shown in Fig. 5. Three voltage control knobs, , , and , shape the gain profile in three different aspects, as indicated in Fig. 6. At low input power, the feedback transistors are off, and
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Fig. 5. Simulated voltage at the feedback node. Fig. 7. Feedback gate bias of the last stage of the PA.
. The physical sizes of and set the range and the rate of change in the feedback bias . The feedback transistors are biased near the threshold. The current can be expressed as [14]
(10)
Fig. 6. Three control knobs vary the gain profile in three dimensions.
(11) the gate voltage is set by and the resistor network ( and ) at a low level to optimize efficiency
(4) . In this region, the gain of The linear gain is determined by the PA can be modeled by the following equation: (5)
where and are the empirical fitting coefficients. When the output power level is low, . As the output voltage swing becomes larger than the threshold voltage of the feedback transistors, the feedback loop turns on and controls to extend the linear region (6) (7) where and represent the total current and impedance at the node , respectively, and can be expressed as follows:
(8) (9) The change of the gate bias, from the feedback transistors ( by the transistor aspect ratio
, is proportional to the current , ), , which is determined and effective gate voltage
where is the conduction angle and is the maximum current swing. pMOS transistor ( , ) is chosen over its nMOS counterpart for the envelope detection. It is because pMOS turns off when the output voltage swing is small and it turns on when the voltage swing increases. nMOS turns on regardless of the output voltage swing since the dc level of the gate terminals of and are fixed to 1 V. Thus, using a pMOS transistor saves dc power when the output power is low and simplifies the control of the feedback voltage . Transistor acts as an enabler of the loop. Tuning the gate voltage of adjusts the feedback factor that determines the amount of the gain expansion Gain . controls the triggered power where the feedback action occurs by changing the threshold voltage of the feedback transistors. As shown in Fig. 7, starts at 0.5 V in the smallsignal region and the gain of this feedback loop is small. gradually increases to 0.8 V as the PA is entering saturation region. Since the amplitude compensation circuitry operates in the largesignal region, the gain of the feedback loop changes with the output power level of the PA. When output power increases from 6 to 14 dBm, the average gain of the loop is approximately 26 mV/dBm. In this region, the gain of the PA remains, and therefore, the linear operation region extends. After the PA reaches its saturation region, the gain starts to decrease. Unlike common feedback techniques used in the operational amplifiers, this feedback circuitry senses the RF signal and returns a signal at much lower frequency. This loop does not create any stability issues because the poles of the loop are far below 60 GHz. As part of the PA, the effects of process variation on the feedback loop are overcome with the global selfhealing process, as described in Section III.
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Fig. 8. Simulated NMOS, PMOS, and total gate capacitances as a function of V. gate–source voltage at a fixed
Fig. 9. IQ constellation illustration.
C. Phase Compensation Besides amplitude distortion, phase distortion also affects signal linearity in CMOS PAs. While amplitude distortion is well understood, amplitudetophase conversion (AMtoPM) has remained inscrutable and has not been discussed as much in literature, despite its potentially disruptive effects on phase modulated signals. In general, AMtoPM conversion can be traced to the signaldependent transistor parameters, such as the input capacitance. Therefore, phase distortion is especially substantial during the largesignal operation of PAs. In typical classAB operation, the gate voltage changes according to the input signal level and turns on and off the PA. The gate capacitance changes dramatically with the varying gate voltage. Since the gate–drain capacitance is relatively insensitive to the gate voltage, the nonlinear input capacitance is mainly due to the gate–source capacitance . A PMOSbased capacitance compensation technique is applied by adding a parallel pMOS transistor at the input of the PA to heal the phase distortion [21]. Fig. 8 shows the individual of an nMOS transistor, pMOS transistor, and the combined gate capacitance of the two as a function of the gate voltage at 60 GHz. It is clear that the of the nMOS transistor increases abruptly when changes from 0.2 to 0.6 V, the classAB operation region. To compensate this change, a pMOS transistor is inserted in parallel with the nMOS transistor such that when the nMOS transistor is off, the pMOS transistor turns on to maintain the same capacitance at the input. Therefore, no matter which operation region the PA is in, the input capacitance is approximately constant. By choosing the sizes and bias voltage of the pMOS transistors ( , in Fig. 3), the of the pMOS transistor has a complementary characteristic to the of the nMOS transistor to cancel the nonlinear behavior of the nMOS input capacitor. The variation of the total input capacitance of the output stage is reduced from 140 to 45 fF. The pMOS transistors increase the total input capacitance. As is inverse proportional to the gate capacitance, it decreases from 180 to 135 GHz with the pMOS transistor. is more sensitive to the gate resistance than the gate capacitance, therefore, it decreases from 211 to 186 GHz with the pMOS transistor. The effect of including the pMOS transistors is accounted for in this design by properly selecting the transformer such that there is negligible gain or power degradation.
Fig. 10. Simulated EVM with gain and phase deviations.
D. Linearity Effects of Amplitude and Phase Mismatches The EVM, a common figureofmerit to evaluate the digitally modulated signal quality, is caused by both amplitude and phase distortion of the signal, as shown in Fig. 9. Therefore, it can be estimated from the AMtoAM and AMtoPM characteristics of the PA. The EVM is , where is the magnitude of the error between the ideal symbol and the distorted symbol and A is the magnitude of the ideal symbol. The EVM can be derived from the amplitude and phase deviations. Assuming the ideal and the distorted symbols have an amplitude and phase of ( ) and , respectively. By trigonometric, a generalized EVM equation is shown as follows:
100 (12) where is assumed to be small and in degree in this approximation. In this equation, represents the gain distortion and represents the phase distortion. It can be estimated from Fig. 10 for maintaining an EVM of 20 dB or lower for 16 quadrature amplitude modulation (16QAM), operation, should be approximately within 0.95–1.05 and should be within 2°. In this design, we target the gain and phase variations within
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of the receiver and the linearity of the transmitter without external testing instruments throughout the lifetime of the radio [19]. The selfhealing unit includes a one and twotone amplitudecontrollable testpattern generator on the transmit side and an auxiliary ADC and 128point fast Fourier transform (FFT) processor on the receive side to observe the received spectrum from the detectors. The output is passed to a parameter estimator (PE) for robust estimation. The radio is optimized subject to a cost function [22]
Fig. 11. Simulated EVM with and without the loop.
Fig. 12. Simulated constellation of the PA with a symbol rate of 2 GS/s.
0.5 dB and 1°, respectively, to assure an dB with at least 3dB system margin. With the amplitude and phase linearization, the EVM of the PA improves substantially as indicated in Agilent GoldenGatebased postlayout simulations, while modeling devices and interconnects as multiport components in an EM (Momentum) simulator. The EVM is greatly improved, as shown in Fig. 11, with both amplitude and phase compensation schemes. When is 13 dBm, the EVM is drastically reduced from 11 to 23 dB. Due to the amplitude compensation, the PA’s largesignal gain has also been boosted to match its smallsignal gain and rendered its much closer to . Fig. 12 shows the postlayout simulated EVM to be 23 dB with output power of 13 dBm for 16QAM modulation at a symbol rate of 2 Gigasymbols/s. III. SELFHEALING ALGORITHM In deepscaled CMOS technology, process variation is the predominant cause of chiptochip performance variations that limits the performance yield. The proposed PA in conjunction with an SHC, an envelope detector, and a power detector (not integrated in this study) work to overcome the limitations imposed by process and environmental variations, as shown in Fig. 2. A calibration unit is embedded in the SHC to provide calibration for absolute power and temperature. The selfhealing unit is further integrated with a transceiver to monitor and diagnose the key performances of the transceiver such as the noise figure
where is the weighting of the th radio specification being optimized, is a vector of states in the radio, is a vector of the observed outputs from the radio, and is a function that maps and to actual specifications. A larger weighting factor is applied to the specification that contributes more to the overall radio performance. With the embedded control knobs, the radio becomes highly adjustable. The selfhealing algorithm can optimize multiple performances sequentially to meet a given cost function. In the process of selfhealing, the radio function is temporarily suspended. To heal the gain and power in the PA, the SHC first provides the input test signals to the PA. The SHC then receives the data provided by the calibrated detectors at the PA output and returns three control knob signals, , , and , to the PA. By fine adjusting these knobs, the gain profile of the PA can be effectively shaped to simultaneously overcome process variations and gain compression to meet both the small and largesignal specifications. Fig. 13 shows the selfhealing flow of the PA. An offchip wellcalibrated power sensor is necessary for power measurements in this test chip. The proposed healing algorithm is described as follows. 1) A lowpower reference signal is generated and sent into the PA. By monitoring the calibrated output power from the power detector, the selfhealing engine can resolve the linear gain and optimize it by adjusting . 2) After the linear gain is healed, a powersweep function is conducted to obtain and , as shown in Fig. 6. To avoid signal distortion and extend close to , both values should be kept within a certain range (e.g., 1 dB). can be adjusted to tune the location and the amount of the gain expansion. It should be chosen such that Gain is less than 1 dB. 3) Once Gain is less than 1 dB, Gain is examined. can be adjusted such that Gain is also less than 1 dB. At this point, the PA has selfhealed its gain and power. Since these knobs shape the gain profile in three independent aspects, they can be adjusted one by one sequentially to optimize the performances of the PA. The simulated distributions before and after selfhealing are shown in Fig. 14. Monte Carlo simulations in Cadence Spectre are performed in the typical corner (tt) and two worse corners, slowslow (ss) and fastfast (ff) with device mismatches. One hundred random runs are simulated in each process corner. Before selfhealing is applied, the mean of the ss, ff, and tt corner is around 13.2, 13.85, and
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Fig. 14. Simulated
distribution at different corners.
Fig. 15. Chip micrograph of the proposed PA. Fig. 13. Flowchart of the selfhealing algorithm for enhancing both PA performance and performance yield.
14.4 dBm, respectively. After the selfhealing process is applied, all samples under different process corners center around 14.4 dBm with a variation within 1 dBm. Therefore, the performance yield is largely improved. A similar healing flow is applied to heal the transceiver. IV. MEASUREMENT RESULTS The PA prototype is fabricated in TSMC 65nm CMOS technology. The chip micrograph is shown in Fig. 15. The PA occupies a compact area of 0.76 mm 0.47 mm including the pads with an active core area of 0.26 mm 0.16 mm. The compact area demonstrates the utility of the transformers at the millimeterwave region. The amplitude compensation circuitry consumes an area of 220 m , which is approximately 0.5% of the total core area. Small and largesignal measurements are performed. All measurements are done via onchip probing. A. SmallSignal Performance The parameters are tested from dc to 67 GHz using an Agilent 8731 E network analyzer calibrated by the Cascade
shortopenloadthru (SOLT) calibration substrate. The measured parameters with a 1V supply are shown in Fig. 16 with a peak linear gain of 9.7 dB at 59 GHz. The simulated is shown in the same figure to demonstrate the close correlation between simulation and measurement. The 3dB bandwidth is 7 GHz from 55.5 to 62.5 GHz. The input return loss, , is greater than 20 dB from 52 to 67 GHz. The output return loss, , is greater than 10 dB from 52 to 60 GHz. A stability factor greater than 1 across the entire spectrum demonstrates unconditional stability. B. LargeSignal Performance Singletone sweptsignal performance of the PA is performed by an HP 83557 A band source module and an Agilent V8486 A band power sensor. To show the effectiveness of the feedback control loop, a PA without the loop is fabricated for comparison. Fig. 17 shows the gain profiles of the PAs with and without the loop operated at a 1V supply. The two PAs have the same gate biases in the smallsignal region. Therefore, both PAs have the same linear gain. As the input power increases, the PA without the feedback loop starts to compress because of the limited maximum current, whereas the one with the loop remains relatively constant until it experiences expansion before
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Fig. 16. Measured
parameters of the PA.
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Fig. 19. Measured gain, output power, and PAE of the PA at 59 GHz.
Fig. 20. Measured
,
, and
versus frequency of the PA.
Fig. 17. Measured gain of the PAs with and without the loop at 59 GHz.
Fig. 18. Measured PAE of the PAs with and without the loop at 59 GHz.
its eventual compression. The gain of the PA with the feedback loop compresses by 0.5 dB and then expands by 0.1 dB relative to its smallsignal level before it reaches . The differs by 5.5 dB between two PAs. Fig. 18 compares the PAE with and without the feedback loop. The PA without the feedback loop is biased in class A such that the two PAs have the same . With the same , the PAE in the power backoff region is improved by 1%–2.5%. The output power, gain, and PAE of the proposed PA are shown in Fig. 19. The and of the PA with the feedback loop are 13.7 and 14.85 dBm, respectively. The measured peak PAE is 16.2%. Fig. 20 shows the and as a function of frequency. More than 10 dBm of is achieved from 52 to 63 GHz. measurement above 63 GHz is limited by the
available input signal power from the band source. The is above 9.7 dBm from 52 to 62 GHz. The difference between and is below 2 dB from 50 to 61 GHz. The maximum difference is 2.4 dB at 64 GHz. Fig. 21 shows the measured gain profiles of the PA when the control voltage knobs are adjusted externally. As described in Section III, three independent knobs affect the gain profile in three dimensions. When increases from approximately 0.4 to 0.6 V, the linear gain varies by 1.4 dB, while the saturation output power remains the same. The expansion shifts horizontally as varies. The amount of expansion is reduced when decreases. The linear gain and remains relatively constant. Varying from 0 to 1 V changes the amount of expansion. The effect of the feedback loop is lessened when increases. The measured phase performed by the band network analyzer is shown with the simulated results in Fig. 22. The measurement is limited by the maximum available power from the network analyzer. The phase variation is reduced from 4 to 11 by applying the onchip PMOSbased phase compensation. Two input signals at 59 and 59.1 GHz are applied to the input of the PA to measure its thirdorder intercept point. The measured fundamental tone at 59 GHz and the thirdorder intermodulation tone at 58.9 GHz are shown in Fig. 23. The extrapolated output thirdorder intercept point is 20.4 dBm. C. Performance Yield Measurement To demonstrate the selfhealing concept, four chips are measured by externally controlling the three knobs described in Section III. The power performance is measured by an offchip
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Fig. 21. Measured PA gain profiles when varying the three control knobs.
Fig. 22. Measured and simulated sation.
phase with and without phase compen
Fig. 24. Measured gain with and without healing.
Fig. 23. Measured twotone performance of the PA.
band power sensor. The results are shown in Fig. 24. Before applying the healing algorithm, the three control knobs are biased at fixed voltages and the gain profiles show variations in both small and largesignal regions. After externally controlling the three knobs, as described in Section III, the four chips show a gain variance of 2%, which is significantly reduced as compared to 22% before healing. As shown in the selfhealing transmitter block diagram in Fig. 2, the PA prototype has been integrated in a superheterodyne transmitter, along with ADC, SHC, detectors, and the baseband processor to form a selfhealing transmitter [19]. With the control knobs in the PA and the mixer, and the inphase/ quadrature (IQ) correction unit in the digital baseband, the transmitter becomes highly adjustable to reduce the performance deviations. During the selfhealing cycle, a twotone test signal is applied to the transmitter and the output of the transmitter is detected by the envelope detector. A steepest descent algorithm is used to adjust the transmitter control knobs to minimize
Fig. 25. Measured statistical distribution for ten chips of the transmitter thirdorder intermodulation before and after selfhealing.
the output thirdorder intermodulation (OIM3) terms [22]. The most sensitive knob is adjusted with the highest priority. Statistical OIM3 measurements of ten transmitter chips are shown in Fig. 25. Before selfhealing, the OIM3 levels of the ten transmitter chips are high (around 33 dBc) with a large variation. After selfhealing, the OIM3 levels are reduced to be lower than 40 dBc with a smaller variation. This satisfies the prespecified transmitter OIM3 requirement of 40 dBc and assures a 100% transmitter performance yield.
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COMPARISON
FoM PAE mW Including pads Estimated from figures
TABLE I 60GHz SILICON PAs
OF
mW
Table I summarizes the performance of recently published band CMOS PAs. Without a powercombining technique, most of the PAs deliver lower than 13.8 dBm of output power, which is more than 1dB less than this study. The highest of this study demonstrates the effectiveness of the proposed gain expansion technique. The PAE at and power backoff are greatly improved, as shown in Fig. 1. This study achieves the highest figureofmerit of 69.6 [defined by ] that compares favorably to the prior studies.
V. CONCLUSION A band CMOS PA with both locallevel adaptive feedback bias control and globallevel selfhealing control is designed and demonstrated in 65nm CMOS. With the proposed control/healing algorithm, the PA’s linear operation range has been effectively extended by 5.5 dB. Test results indicate that the CMOS PA can deliver dBm and dBm with 16.2% peak PAE. The performance mapping from multiple chips demonstrates effectiveness of both adaptive feedback and selfhealing control capabilities of the PA for improving its performance and yield through onchip performance detectors and current control knobs. The demonstrated healing and control methodologies can help realize future generation millimeterwave radioonchips to be implemented in deepscaled CMOS technologies for high datarate communications with both high performance and high yield.
ACKNOWLEDGMENT The authors thank the Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, Taiwan, for foundry support and Dr. N.Y. Wang, Broadcom, Irvine, CA, Prof. J. Q. Gu, University of Florida, Gainesville, Dr. Z. Xu, HRL Laboratories, Malibu, CA, Dr. C. Chien, CreoNex, Westlake Village, CA, and Dr. A. Tang, Jet Propulsion Laboratory, Pasadena, CA, for technical discussion. Chip fabrication was provided by TSMC.
REFERENCES [1] A. Tomkins, R. A. Aroca, T. Yamamoto, S. T. Nicolson, Y. Doi, and S. P. Voinigescu, “A zeroIF 60 GHz 65 nm CMOS transceiver with direct BPSK modulation demonstrating up to 6 Gb/s data rates over a 2 m wireless link,” IEEE J. SolidState Circuits, vol. 44, no. 8, pp. 2085–2099, Aug. 2009. [2] S. Pinel, S. Sarkar, P. Sen, B. Perumana, D. Yeh, D. Dawn, and J. Laskar, “A 90 nm CMOS 60 GHz radio,” in IEEE Int. SolidState Circuits Dig., Feb. 2008, pp. 130–131. [3] K. Raczkowski, S. Thijs, W. D. Raedt, B. Nauwelaers, and P. Wambacq, “50to67 GHz ESDprotected power amplifiers in digital 45 nm LP CMOS,” in IEEE Int. SolidState Circuits Dig., Feb. 2009, pp. 382–383. [4] W. L. Chan, J. R. Long, M. Spirito, and J. J. Pekarik, “A 60 GHzband 1 V 11.5 dBm power amplifier with 11% PAE in 65 nm CMOS,” in IEEE Int. SolidState Circuits Dig., Feb. 2009, pp. 380–381. [5] N. Kurita and H. Kondoh, “60 GHz and 80 GHz wide band power amplifier MMICs in 90 nm CMOS technology,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 39–42. [6] M. Bohsali and A. M. Niknejad, “Current combining 60 GHz CMOS power amplifiers,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 31–34. [7] T. Quemerais, L. Moquillon, V. Huard, J.M. Fournier, P. Benech, and N. Corrao, “DC hot carrier stress effect on CMOS 65 nm 60 GHz power amplifiers,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2010, pp. 351–354. [8] S. Aloui, E. Kerherve, R. Plana, and D. Belot, “RFpad, transmission lines and balun optimization for 60 GHz 65 nm CMOS power amplifier,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2010, pp. 211–214. [9] B. Martineau, V. Lnopik, A. Siligaris, F. Gianesello, and D. Belot, “A 53to68 GHz 18 dBm power amplifier with an 8way combiner in standard 65 nm CMOS,” IEEE Int. SolidState Circuits Dig., pp. 428–429, Feb. 2010. [10] M. Boers, “A 60 GHz transformer coupled amplifier in 65 nm digital CMOS,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2010, pp. 343–346. [11] J.W. Lai and A. V. Garcia, “A 1 V 17.9 dBm 60 GHz power amplifier in standard 65 nm CMOS,” in IEEE Int. SolidState Circuits Dig., Feb. 2010, pp. 424–425. [12] J. Chen and A. M. Niknejad, “A compact 1 V 18.6 dBm 60 GHz power amplifier in 65 nm CMOS,” in IEEE Int. SolidState Circuits Dig., Feb. 2011, pp. 432–433. [13] Y. Kim, Y. Koh, J. Kim, S. Lee, J. Jeong, K. Seo, and Y. Kwon, “A 60 GHz broadband stacked FET power amplifier using 130 nm metamorphic HEMTs,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 6, pp. 323–325, Jun. 2011. [14] S. C. Cripps, RF Power Amplifiers for Wireless Communications. Norwood, MA: Artech House, 1999. [15] T. Das, A. Gopalan, C. Washburn, and P. R. Mukund, “Selfcalibration of inputmatch in RF frontend circuitry,” IEEE Trans. Circuits Syst., vol. 52, no. 12, pp. 821–825, Dec. 2005.
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[16] A. Goyal, M. Swaminathan, and A. Chatterjee, “A novel selfhealing methodology for RF amplifier circuits based on oscillation principles,” in IEEE Design, Automat., Test Eur., Apr. 2009, pp. 1656–1661. [17] A. Goyal, M. Swaminathan, A. Chatterjee, D. Howard, and J. D. Cressler, “A new selfhealing methodology for RF amplifier circuits based on oscillation principles,” IEEE Trans. Very Large Scale Integration (VLSI) Syst., to be published. [18] J. Y.C. Liu, A. Tang, N.Y. Wang, Q. J. Gu, R. Berenguer, H.H. Hsieh, P.Y. Wu, C. Jou, and M.C. F. Chang, “A band selfhealing power amplifier with adaptive feedback bias control in 65 nm CMOS,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2010, pp. 423–426. [19] A. Tang, F. Hsiao, D. Murphy, I.N. Ku, J. Y.C. Liu, N.Y. Wang, S. D’Souza, H. Wu, Y.H. Wang, Y.C. Kuan, M. Tang, M. Pham, G. Virbila, D. Yang, Q. Gu, C. Chien, and M.C. F. Chang, “A low overhead selfhealing embedded system for ensuring high performance yield and longterm sustainability of a 60 GHz 4 Gbps radioonachip,” in IEEE Int. SolidState Circuits Dig., 2012, pp. 316–317. [20] T. Yao, M. Q. Gordon, K. K. W. Tang, K. H. K. Yau, M.T. Yang, P. Schvan, and S. P. Voinigescu, “Algorithmic design of CMOS LNAs and PAs for 60GHz radio,” IEEE J. SolidState Circuits, vol. 42, no. 5, pp. 1044–1057, May 2007. [21] C. Wang, M. Vaidyanathan, and L. E. Larson, “A capacitance compensation technique for improved linearity in CMOS classAB power amplifiers,” IEEE J. SolidState Circuits, vol. 39, no. 11, pp. 1927–1937, Nov. 2004. [22] M.C. F. Chang, C. Chien, A. Tang, and Q. J. Gu, “Selfhealing 4 gigabit/sec reconfigurable CMOS radioonachip,” in Government Microcircuit Appl. Critical Technol. Conf., Mar. 2011, pp. 57–60. Jenny YiChun Liu (S’09) received the B.S. degree in electronics engineering from National Chiao Tung University, Hsinchu, Taiwan, in 2005, and the M.S. and Ph.D. degrees in electrical engineering from the University of California at Los Angeles (UCLA), in 2008 and 2011, respectively. In 2009, she was an Intern with the Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, Taiwan, where she designed RF/millimeterwave frontend circuits. From 2011 to 2012, she was a Postdoctoral Scholar with UCLA. In 2012, she joined the Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan, as an Assistant Professor. Her current research interests include millimeterwave and terahertz devices, circuits, and systems. Dr. Liu was the recipient of the Outstanding Contribution Prize of the 2010 Asia–Pacific Microwave Conference. She was also the recipient of the fouryear Elite Fellowship for doctoral study of the National Science Council, Taiwan (2005–2009). Roc Berenguer (M’05) received the M.Sc. and Ph.D. degrees from the Technological Campus of the University of Navarra (TECNUN), San Sebastian, Spain, in 1996 and 2000, respectively. He is currently a Senior RF Researcher with the Communications Integrated Circuits (COMMIC) Design Group, Centro de Estudio e Investigaciones Técnicas (CEIT), San Sebastian, Spain, and an Associate Professor with the Electrical, Electronic, and Control Engineering Department, TECNUN. In 1999, he joined the CEIT, as an Associated Researcher. Through CEIT and INCIDE (spinoff of the COMMIC Group, CEIT), he has been an external consultant for Siemens, Munich, Germany (2000), Hitachi Microsystems Europe, Maidenhead, U.K. (2001), Xignal Technologies, Munich, Germany (2001–2002), and SeikoEpson, Barcelona, Spain (2006–2007), where he collaborated in the design of several RF frontends for wireless standards like GSMEDGE, DAB, Wibree, etc. In 2009, he was
a Visiting Researcher with the Illinois Institute of Technology (IIT), Chicago, where he was involved in the design of a 77GHz receiver frontend in 65nm CMOS for a frequencymodulated continuouswave (FMCW) automotive radar. During the 2010 summer semester, he was a Visiting Scholar with the University of California at Los Angeles (UCLA), where he was involved with the design optimization of a 60GHz PA in 65nm CMOS. He has authored or coauthored two books, 20 international journals papers, and over 30 conference papers. He holds seven patents. His technical expertise and research interests are in the areas of CMOS RF/millimeterwave integrated circuit (IC) design, ultralow power analog circuit design for batteryless sensor nodes, and highspeed signal processing. MauChung Frank Chang (F’96) received the B.S. degree in physics from National Taiwan University, Taipei, Taiwan, in 1972, the M.S. degree in materials science from National Tsing Hua University, Hsinchu, Taiwan, in 1974, and the Ph.D. degree in electronics engineering from National Chiao Tung University, Hsinchu, Taiwan, in 1979. He is currently the Wintek Endowed Chair and Distinguished Professor of Electrical Engineering and the Chairman of the Electrical Engineering Department, University of California at Los Angeles (UCLA). Prior to joining UCLA, he was the Assistant Director and Department Manager of the High Speed Electronics Laboratory, Rockwell Science Center (1983–1997), Thousand Oaks, CA. During this tenure, he developed and transferred the AlGaAs/GaAs heterojunction bipolar transistor (HBT) and BiFET (planar HBT/MESFET) integratedcircuit technologies from the research laboratory to the production line (now Conexant Systems and Skyworks). The HBT/BiFET productions have grown into multibilliondollar businesses and dominated the cellphone PAs and frontend module markets (currently exceeding onebillion units/year). He was the Principal Investigator with Rockwell Science Center in leading the Defense Advanced Research Projects Agency (DARPA)’s ultrahighspeed ADC/DAC development for direct conversion transceiver (DCT) and digital radar receiver (DRR) systems. He was the inventor of the multiband reconfigurable RF interconnects based on FDMA and CDMA multiple access algorithms for chipmultiprocessor (CMP) intercore communications and interchip CPUtomemory communications. He also pioneered the development of the world’s first multigigabit/s ADCs, DACs, and DDSs in both GaAs HBT and Si CMOS technologies, the first 60GHz radio transceiver frontend based on transformerfoldedcascode (Origami) highlinearity circuit topology, and the low phasenoise CMOS dBc/Hz with digitally controlled onchip artificial VCO dielectric (DiCAD). He was also the first to demonstrate CMOS oscillators in the terahertz frequency spectrum (1.3 THz) and the first to demonstrate a CMOS active imager at the submillimeterwave spectra (180 GHz) based on a timeencoded digital regenerative receiver. He was also the founder of the RF design company GPlus (now SST and Microchip), which commercializes WiFi 11 b/g/a/n PAs, frontend modules, and CMOS transceivers. Throughout his career, his research has primarily focused on the development of highspeed semiconductor devices and integrated circuits for RF and mixedsignal communication and imaging system applications. Dr. Chang was elected to the U.S. National Academy of Engineering in 2008 for the development and commercialization of GaAs PAs and integrated circuits. He was the recipient of the 2006 IEEE David Sarnoff Award for the development and commercialization of HBT PAs for modern wireless communication systems, the 2008 Pan Wen Yuan Foundation Award, and the 2009 CESASC Career Achievement Award for his fundamental contributions in developing AlGaAs/GaAs heterojunction bipolar transistors. His recent paper “CMP Networkonchip Overlaid with Multiband RFInterconnect” was selected for the Best Paper Award of the 2008 IEEE International Symposium on HighPerformance Computer Architecture (HPCA). He was also the recipient of the 1992 Rockwell Leonardo Da Vinci Award (Engineer of the Year), the 1997 National Chiao Tung University Distinguished Alumnus Award, and the 2002 National Tsing Hua University Distinguished Engineering Alumnus Award.
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Analysis and Implementation of Doherty Power Amplifier With TwoPoint Envelope Modulation Joon Hyung Kim and Chul Soon Park, Senior Member, IEEE
Abstract—In this paper, the effect of the fundamental current provided by a peaking cell consisting of a Doherty amplifier is analyzed using a new closedcurrent model. The proposed current model can be used as a foundation to accurately explain and optimize previous compensation methods such as uneven, asymmetric, and gate envelope cases. Based on the proposed analysis, and in conjunction with the envelope tracking scheme, twopoint envelope modulation simultaneously supplying the carrier and peaking cells is introduced to improve the overall efficiency. For further verification, the Doherty amplifier, targeting a thirdgeneration longterm evolution base station at 2.6 GHz has been fabricated utilizing a commercially available 120W gallium nitride device, which provides a drain efficiency of 53.1% at an average output power of 45.8 dBm with an 8.5dB peaktoaverage power ratio signal maintaining an adjacent channel leakage power ratio of 48.6 dBc using digital predistortion functionality. Index Terms—Doherty amplifier, envelope tracking, gallium nitride (GaN), power amplifier (PA).
I. INTRODUCTION
I
N thirdgeneration longterm evolution (3G LTE) and mobileworldwide interoperability for microwave access (mWiMAX) systems, which are strong candidates for fourth–generation (4G) systems, a greater demand for highspeed downlink data services is required for the base station than that found in a typical voice service. For this reason, orthogonal frequencydivision multiplexing (OFDM) has been naturally adopted as a modulation scheme, and the number of multicarriers used is growing in limitedallowable channel bandwidths, causing a higher peaktoaverage power ratio (PAPR). In the transmitter block, this aspect is even a more challenging concern regarding an improvement in power amplifier (PA) efficiency. Several solutions and architectures have been investigated and reported for this goal, such as envelope tracking, envelope elimination reconstruction, and a Doherty architecture [1], [2]. Among them, Doherty amplifiers are widely used in the field due to their straightforward and simple implementation [3]. Doherty operation is based on the load modulation, which is related to the carrier and peaking cell Manuscript received September 15, 2011; revised February 02, 2012; accepted February 06, 2012. Date of publication April 03, 2012; date of current version April 27, 2012. This work was supported by the National Research Foundation of Korea funded by the Korean Government under Grant 20110006566. The authors are with the Department of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), 305701 Daejeon, Korea (email: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2188725
currents in accordance with the magnitude of the input voltage. When a low input voltage is involved, forcing the peaking cell to turn off, the carrier cell only delivers output power through the higher impedance multiplied by the wanted backoff level, and, thus, in most probability regions of the signal of interest, the efficiency is maximized. In a highpower region where the combined current is provided by both the carrier and peaking cells, the impedances seen by each cell are properly changed toward the optimum impedance. In this region, despite the peaking cell being responsible for both changes of load impedance, a typical peaking cell without a controller cannot be sufficiently driven by a low quiescent voltage. In order to overcome this problem, several reported works, categorized into three types of uneven, asymmetric, and gate adaptations, have been investigated [1], [4]–[12]. Although the reported methodologies are effective and compensate the efficiency by applying a fabricated amplifier, previous analyses have only focused on the mismatch effect of load impedance. To extract an accurate compensation, the current model for a carrier cell has to be additionally characterized and considered in terms of the peaking cell. In this paper, the closed formulation of the fundamental current is modeled, which plays the role of a peaking cell. The efficiency based on this model is optimized through the proposed gate envelope injection. Moreover, additional drain envelope modulation will be introduced, maximizing the average efficiency with a nonconstant envelope signal. The remainder of this paper is organized as follows. In Section II, the analytical current and load impedance models for a Doherty amplifier when considering the role of a peaking cell will be discussed. We also provide optimized designs for various conditions and compare the results with a conventional design. In Section III, twopoint envelope modulation, supplying the appropriate gate voltage for a peaking cell based on the analysis in Section II, and a bilevel drain voltage for a carrier cell, in order to improve the average efficiency, will be proposed. In Section IV, the detailed methodology of the proposed Doherty amplifier will be discussed. In Section V, the fabricated Doherty amplifier is shown using the measured data. Finally, Section VI provides some concluding remarks. II. BASIC THEORIES OF DOHERTY AMPLIFIER A. Analytic Model of Currents in Voltage Plane As mentioned above, the essence of the Doherty amplifier is based on the dynamic load modulated by the current ratio between the carrier and peaking cells. When in a lowpower region where the peaking cell is off due to the deep ClassC bias level related to the backoff power of interest, the high load condition for the carrier cell is activated, achieving optimal efficiency in
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this region. In a highpower region above the backoff level, both impedances seen by the carrier and peaking cells are reversely changed toward the optimum load impedance. In such a region, the peaking cell plays an important role providing sufficient fundamental current with the proper slope imposed on the input voltage. Otherwise, a severe problem may occur, such as an improper load modulation, reducing the efficiency. As underlined in Section I, a previous investigation was conducted to compensate for this situation. Those are effective, but, in the literature, the impairment has been extracted only with mismatched load impedance. For further accuracy of the analysis, additional definitions are needed, particularly a behavior model of the current used for a carrier cell. Therefore, the previous solution should be effectively explained, inferring that the closed model is formed using a simple relation between the current and load impedance for a limited voltage swing. Considering that an insufficient current of the peaking cell makes the load impedance seen by the carrier cell to maintain a higher value, the voltage railtorail swing is saturated with this load, which constrains the increase in current. For this reason, it is noted that the current for a carrier cell has to be modeled considering the role of the peaking cell, which is not in proportion to the input voltage. Considering the typical current model imposed by an input signal, the output current is modeled and controlled by the input gate voltage up to , where is the saturation current of the device, and the largesignal current output for fieldeffect transistors (FETs) can be approximately fitted as [13], [14] (1) where is a constant transconductance and is the maximum voltage whose level induces the current to be . For simplicity, the current model for the Doherty amplifier can be performed considering the following initial conditions. • The carrier cell is initially biased as ClassB. • The peaking cell is biased as ClassC and turned on with respect to the backoff input power. • The same FET family is adopted for the carrier and peaking cell. • The normalized input voltage With the above assumptions and referring to (1), the normalized bias level for a carrier cell, denoted as , is equal to , making the output current for the carrier cell (2) Applying the Fourier expansion [1], the fundamental and dc component values are obtained as follows: (3) (4)
Fig. 1. Current waveforms of the carrier and peaking amplifier as function of input driven voltage.
where represents the knee voltage. The optimum load impedance is obtained using (3) and (5) as
(6) The above relation from (3) to (6) can be applied differently to an amplifier terminated by the harmonic control matching circuit, particularly the second or thirdharmonic termination such as ClassF or inverse ClassF [15]. The results from (3)–(6) can be different when taking into account the harmonic0tuned PAs. Since an analysis sequence is based in the same way, in this paper, the respective amplifier comprising the Doherty amplifier is assumed to be with a conventional output stage with all harmonics shorted. Unlike the carrier cell, the peaking cell is forced not to be turned on below the input voltage divided by , and the quiescent gate dc voltage is as low as compared with that of a ClassB, inferring that
(7) otherwise where is a dividing term related to the backoff power. In a typical Doherty amplifier, is converted into a backoff power of 6 dB. Comparing and represented in (3) and (7), respectively, when , it is intuitionally expected that is not able to reach the maximum level due to the low gatebias condition in such input power, as indicated in Fig. 1, and is estimated to be approximately half compared with . For the accurate calculation, can be separately defined in terms of threshold input voltage and is given by
The fundamental voltage and optimum load impedance for ClassB with all harmonics shorted are given by (8) (5)
otherwise
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(a)
(b)
Fig. 3. Simplified imperfect load modulation effect for the Doherty amplifier. (a) carrier cell. (b) Peaking cell). Fig. 2. Fundamental current of the carrier and peaking amplifier as a function of input driven voltage.
where is the corresponding angle for given by
and is
(9) Using (8) and (9), the fundamental and dc currents for a peaking cell are given by
power and efficiency delivered from a carrier cell is severely degraded. While the load line for a carrier cell is constrained with a larger value, is expected to be materially unaltered, as is reduced in accordance with the reduced maintaining the current ratio as reported in (13). The output power provided by a peaking cell is likewise degenerated due to low fundamental current as shown Fig. 3(b). Taking into account in (10) and considering that the fundamental railtorail swing is saturated as , the following relation in a saturation can be obtained:
(10)
(14)
(11)
; as In the ideal case, this relation first appeared at previously mentioned, it is fulfilled early by a high . Substituting into the results of (14) and using (3) and (10), and are rearranged as
To compare the results in (3) and (10), plotting as a function of , the current from the input voltage shown in Fig. 2 for (10) is observed at a lower value compared with both its ideal case and , contributing the change of load impedances. Considering the definition of both load impedances under various current conditions, the values are well known and can be expressed as
(15) (16)
(12)
(13) and are the impedances seen by the carrier where and peaking cell toward the load, respectively. These equations indicate that if according to (10) is less driven, in the high input voltage region cannot be sufficiently decreased, but maintains the higher value determined based on the relation depicted in (12). For this reason, it is noted that the maximum voltage of is saturated not by the dynamic impedance, but by the fixed high impedance, as shown Fig. 3. With this respect, is limited as a certain value lower than the maximum value as shown Fig. 3(a). Therefore, the output
An aspect of (15) is expected to be the saturation property in terms of input voltage due to the terms in the root, which is calculated for the different values of , as shown in Fig. 4. With a higher , the corresponding gate bias is also higher, which turns the cell on earlier; therefore, the peaking cell is driven more. With this respect, the difference with an ideal case is deeper; the fundamental current for a carrier cell is further saturated as input voltage increases. In typical backoff , an of 8 A is observed and is 64% of the ideal case (12.5 A). To verify the estimated results, a commercial 120W GaN device is utilized for the simulation environment and is simply configured as shown in Fig. 5 using an Advanced Design Simulator (ADS). The simulation results shown in Fig. 6 clearly show that the estimated and simulation results are quite coherent, which indicates a severe degeneration effect. For the simulation, a drain supply voltage of 27 V, a simulated of 23 A, and a carrier gate
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Fig. 6. Simulated fundamental current of the carrier and peaking amplifier as a function of input driven voltage for different backoff voltages.
Fig. 4. Estimated fundamental current of the carrier and peaking amplifier as a function of input driven voltage for different backoff voltages.
Fig. 5. Simulation setup used to identify (19) (for
).
Fig. 7. Simulated output power and efficiency for different backoff levels as a function of input power backoff.
bias of 3 V with an optimum source and load impedance are extracted by the harmonic loadpull simulation. With the parameters described in the equation above, the total output and dc power can be expressed as
cannot be appropriately modulated, as shown in Fig. 8. To make up for this problem, two solutions of uneven and asymmetric topologies are widely used, which are discussed in next. B. Previous Compensation—Uneven and Asymmetric
(17) (18) with (19) Plotting the output power and efficiency as a function of normalized input voltage for the different backoff points in Fig. 7, it is here noted that, even if the efficiency break point is naturally observed at in the input voltage plane, the output power at this region does not match the backoff power in the output plane, as shown in Fig. 7. Without the compensation method, the corresponding backoff efficiencies in the output plane are (6 severely low, with values of 44%, 40%, and 34% for dB backoff), 2.5 (8.5 dB backoff), and 3 (9 dB backoff), respectively, as shown in Fig. 8. In this situation, the load impedances
An uneven Doherty amplifier [16], in which more input power is applied to the peak cell, is composed of an attenuated carrier cell as shown in Fig. 9(a). In this respect, the different input power is individually applied to the carrier and peak cells, and the allowable input power can be increased further compared with a conventional case in which a more fundamental current for the peak cell is obtained. This is convenient to implement, but causes a degeneration in power gain related to the poweradded efficiency (PAE). To gain surplus input voltage and obtain the maximum fundamental current for both cells, a simple relation accounting for (17) is used as follows: (20) denotes the overdriven voltage factor, which is obwhere tained as (21)
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Fig. 10. Simulated efficiency and output power for an uneven case. Fig. 8. Simulated load modulation for different backoff levels as a function of input power backoff.
probability density function (PDF) of a 8.5dB PAPR 3G LTE signal, the is the optimum value, achieving an average efficiency of 54.8%. This concept has a connection with the results of previous work [17], [18]. It is thought that the concept introduced here contributes more to a detailed solution based on a numerical analysis even considering the knee voltage effect. Another solution is an asymmetrical design adopting a larger device as a peaking cell. Assuming the same quiescent gate bias, the fundamental current for a peaking cell in asymmetrical case is expressed by means of the multiplication factor and is given by Fig. 9. Previous methods to enhance the fundamental current for a peak cell. (a) Uneven case. (b) Asymmetric case.
Referring to the relation between and , the maximum overdriven input power when is , which is converted into a decibel of 2.64 dB. Assuming an ideal power gain of 13 dB (refer to the simulation depicted in Fig. 5), the PAE is degraded by as much as 2.8% in the case of uneven driving. One more careful design approach has to be considered when implementing an uneven Doherty amplifier, which is based on the aspect that cannot reach the value of due to the current slope with a slight lean compared with even case. In other words, the break point determined by an onstate peaking cell is no longer the matched output backoff point seen as the combined output power. Since this effect is inevitable in the uneven case, the controllable method is to change the characteristic impedance of the quarterwave transmission line to optimize the efficiency of the desired backoff level. Although can be obtained in a closed form, it is quite complicated, and thus the sweeping of is a much more convenient way to extract the optimal value. Fig. 10 shows the efficiency and output power curves for a different as a function of the input power. As is higher, the efficiency of the backoff in the output plane is closer to the break point in the input plane. However, as shown Fig. 10, a careful selection of is needed, as the efficiency trajectory in the highpower region is more collapsed. Using an analytic simulation based on the results of Fig. 10 together with the
(22) Substituting
into
is obtained as (23)
This equation illustrates that the asymmetric ratio is not identical to but is slightly higher, which is 2.56 in the case of . This aspect implies that an appropriate size of the peaking cell impacts the performances of both output power and efficiency. If a lower with is provided, the combined output power decreases, and the efficiency in the backoff region in the output power plane is then as low as 55.3%, as shown Fig. 11. In contrast, a higher contributes toward more output power and maintains an exact backoff region. However, since improper load modulation occurs, the combined output power is mainly delivered from the peaking cell as long as the carrier cell has lower load impedance. Thus, a more efficient point similar to the location of an uneven point with a high value of in the highpower region is observed, as shown in Fig. 10. To summarize, the previous two methods require either careful impedance control or an additional tuning process. Since the goal of compensation is that the fundamental current trajectory follow the ideal case shown in Fig. 2, a simple method using gate adaption, as previously addressed, has
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Fig. 12. Simulated gate voltage and corresponding dc current.
Fig. 11. Simulated efficiency and output power for an asymmetric case.
significant merit and is implemented by a simple gate envelope amplifier taking into account both the miniature fabrication and the minimization of the power gain loss. III. PROPOSED TWOPOINT SUPPLY MODULATION Here, an accurate gate adaptation is reported. Moreover, to increase the efficiency in most probability regions, the drain adaptation is regarded as bilevel envelope tracking. A. GateEnvelope Signal Adaptation Here, it is reported how the gate voltage for a peaking cell has to be correctly generated with respect to the envelope signal. Considering that has to be equal to the ideal value as a function of the input voltage, as shown in Fig. 2, the following equation is established:
(24)
When (6dB backoff), using the transfer function of (32), the output dc current, which is inferred as the gateenvelope modulation, is simulated as shown in Fig. 12 and has a good agreement with the estimated results. B. DrainEnvelope Signal Adaptation Recently, investigations on how to improve the efficiency at the highest probability regions for the signal of interest, which adopt the additional devices, have been reported [19]–[21]. Both methods are effective in enhancing the overall efficiency, but a degeneration of power gain has to be endured by dividing the power into several paths, and the fine calibration for each path should be done. Another solution is to use dynamic drain–voltage injection classified according to “soft tracking” [22], [23] and “hard tracking” [24] in accordance with the magnitude of the envelope signal. In particular, envelope tracking has been previously used for the carrier cell in the Doherty amplifier in both methods [25], [26]. Unlike in envelope tracking for a conventional ClassAB amplifier, variableenvelope voltage for the carrier cell is only needed in the lower input level determined by , as the fundamental output voltage starts to be saturated, requiring the maximum dc voltage. In order to obtain the proper envelope shape for the drain supply voltage with the knee voltage, let the output power delivered by the current for a carrier cell with load impedance be identical to the output power expressed as the supply voltage, which leads to (27)
where is an auxiliary gate voltage with offset voltage of . Solving for , we obtain
is the drain supply voltage waveform. Equation (27) where is only valid when a constant transconductance dependent on the drain voltage is considered. In reality, since the transconductance, , is variable according to the drain voltage, the relation in (27) has to be changed considering the given nonlinear behavior of the transconductance, , which is given by
(25) (28)
This leads to
(26)
where is the normalized degradation factor of the transconductance as a function of the supply drain voltage, as represented in Fig. 13, for a 120W GaN with a 240mA quiescent current.
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Fig. 15. Simplified equivalent model for an offstate peaking cell. Fig. 13. Transconductance curve as a function of drain voltage.
For this reason, a simple supply modulation method using a simple bilevel voltage controlled by a certain threshold level is preferable for a carrier cell, comprising a highly efficient (more than 90%) power MOSFET and a Schottky diode. For , a threshold envelope level of 1/3.5 extracted by (35), a corresponding empirical lower dc voltage of 24 V (the simulation voltage is 24.5 V), and an efficiency improvement of 4.8% after calculating (30) is obtained compared with that of a conventional Doherty amand are the instantaneous RF and plifier. where dc powers with respect to the magnitude of the given signal . IV. DOHERTY AMPLIFIER DESIGN AND IMPLEMENTATION Fig. 14. Drainenvelope voltage waveform.
A. Doherty Amplifier With Optimized Offset Line
Referring to the results of (28) and Fig. 13, it is expected that the degradation of the transconductance influences a higher value of , which can be obtained as (29) This is plotted in log scale in Fig. 14, which compares both the ideal drain voltage for a Doherty amplifier and an envelope tracking amplifier. When applying the ideal drainenvelope voltage provided by the conventional supply modulator to the carrier cell [26], the major problem is that, despite the fact that the carrier cell is always saturated, the fundamental current cannot be correspondingly driven with respect to the input voltage due to the degradation of the transconductance by , resulting in a severe loss in power gain and efficiency. For this reason, the overall efficiency might improve, which is rare, or will decrease with the limited efficiency of the supply modulator (65%–70% for an 8.5dB PAPR) [23]. The simulation computed using MATLAB, with an efficiency of 70% for the supply modulator, reveals that only a 0.4% efficiency improvement is observed even when adopting the ideal efficiency condition of the carrier cell. In practice, considering the gain degeneration arising from the envelope tracking, the efficiency, on the contrary, could be reduced by the supply modulator not being properly optimized.
The proposed Doherty amplifier is designed using two commercial cells of a 120W GaN HEMT. Designing a Doherty amplifier, the most important issue is how to minimize the power loss through the offstate peaking cell in the lowpower region [19]. This power loss has a significant influence on the efficiency at the backoff region, which is the probability region most directly related to the overall efficiency. Here, a numerical analysis based on the device model is first introduced. With this respect, let us consider the simplified output circuit featuring a conventional lowpass filter, as shown in Fig. 15. In order to match the load impedance for a peaking cell, the impedance seen by the FET has to be , which defines the coefficients of a lowpass filter and . The relation and values of and are obtained using [1] and are given by
where (31) Note that the above reactance could be modified in accordance with the matching type, such as in a highpass or bandpass filter. Referring to Fig. 15, since the harmonic components should be shorted out within the distance of the lowpass filter as a way to protect the change of harmonic impedance with respect to the lowpass filtering action, the bias line and harmonic tap force the second and thirdharmonic components to be shortcircuited.
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Consequently, the impedance, seen in an offstate peaking cell with a negative sign due to opposite flowing of the current, can be estimated using the predefined parameters and is given by
where (35) is the resistance for the off state. where Assuming of (35) can be calculated as
(36)
Fig. 16. Trajectory of (a) the drain–source capacitances and (b) the variation of capacitance as the center of the matching point as a function of the drain–source voltage.
The other parameters and are the products when considering the removal the intrinsic drain–source capacitance. is a capacitance of peaking device in its offstate condition while is a virtual capacitance embedded within output network and is decided for a minimizing of movement of nonlinear capacitance with respect to a voltage waveform. When the maximum input voltage is engaged with the peaking cell, since the peaking cell provides the optimum performance at such a level, the total capacitance during a period is regarded as [15]
This equation implies that, although the three factors , and seem to comprise , considering the power capability of the selected device for the wanted application, a lower output power device requires a small and high and , which are all associated with the average output power capability of the device. In other words, the intrinsic value of is sufficiently high for a lowpower device and is low for highpower applications. An additional interesting aspect implied in (36) is that the sign of is usually positive, since the following relation for the numerator is observed as (37) Using (36), the output power and efficiency considering the value of can be expressed as
where (38)
(32) where is a nonlinear capacitance within an intrinsic device as a function of . Since the performance is optimized when the minimum loss by is considered, the optimized can be obtained as [15] (33) where and are the maximum and minimum values of the exploited drain–source capacitance with respect to the amplitude swing of , as shown in Fig. 16(a). Capacitances of 16.4 and 11.5 pF are observed for the given device, as shown in Fig. 16(b), and, according to the surplus capacitance in the off state, is approximately 2.4 pF based on the following relation:
of 27 V, of 23 A, and , Based on a an of 23 is obtained, and, consequently, the relative value of is estimated as . In this situation, the efficiency curve before turning on the peaking cell is degraded by . In order to prevent a loss, the offset line achieved by a transmission line with the same characteristic impedance as , which is used to increase the impedance, can be given by
where (39) and . Substituting into (39), the following simple equation can be found to maximize : (40) This leads to
(34)
(41)
KIM AND PARK: ANALYSIS AND IMPLEMENTATION OF DOHERTY POWER AMPLIFIER WITH TWOPOINT ENVELOPE MODULATION
Fig. 17. Degradation of efficiency and off impedance for different lengths of offset lines.
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Fig. 19. Simplified schematic of the proposed Doherty amplifier.
Fig. 20. Photograph of the fabricated Doherty amplifier. Fig. 18. Calculated (red), simulated (blue), and measured (CW) off impedances for the different lengths of offset line.
This equation indicates that the offset transmission line is strongly dependent on the value of as determined by the device size and operating frequency. It is additionally noted that the result of (41) strongly depends on the tangent function, and, thus, an improper length of the offset line causes a severe loss, as shown in Fig. 17. Considering that the length of the transmission line is strongly dependent on a frequency, the performance of a Doherty amplifier is limited by the bandwidth due to the frequencydependent offset line together with the quarterwave line. In our case, according to the previous simulation conditions, the required offset line can be obtained as 8.85 mm with a of 25.5 and of 23.1. The estimated length is further confirmed and compared with that of the simulation and measured data using a continuous wave, as shown in Fig. 18. Although slight differences are shown among these data due to the parasitic resistances, the trend of movement in accordance with the length of the added transmission line is almost the same for all data. The measured data were obtained as 6.3 mm after deembedding a 35 line without a carrier operation.
B. Gate and Drain Supply Modulation For a dualenvelope supply modulation for both the gate and drain node, the respective envelope amplifier is introduced as shown in Fig. 19. The shaped pulse signal is supplied through a controllable device such as a buffer, comparator, or gate driver. A lower supply voltage, which is determined to be 24 V, is simply formed using a diode. The gate voltage, which is generated by the previous analytic model together with the reduced transconductance in a real device, is amplified with a negative offset using an operating amplifier. The fabricated Doherty amplifier is shown in Fig. 20. V. MEASURED RESULTS To verify the effect of gate envelope injection described in the previous section, the measured dc current and corresponding output power and efficiency are compared with those of the simulations shown in Figs. 21 and 22. As analyzed, the measured output power and efficiency with the gate modulation signal shaped by (26) have a superior performance compared with those without such modulation. At an 8.5dB backoff, the efficiency is improved as high as 6% in accordance with the increase of current.
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Fig. 21. Measured dc current of carrier and peaking cells with/without gate envelope modulation as a function of input power.
Fig. 23. Measured efficiency for different envelope modulations as a function of output power.
Fig. 22. Measured efficiency and output power of a Doherty amplifier with/ without gate envelope modulation as a function of input power. Fig. 24. Measured spectra before/after DPD.
Fig. 22 shows the measured output power and efficiency as a function of input power. While a Doherty amplifier without any envelope modulation delivers an output power of 53.8 dBm, an amplifier with gate envelope modulation provides a saturated output power of 54.6 dBm, which is 0.8 dB higher than that of a conventional case. It was observed that the output power of the proposed amplifier in conjunction with a drain envelope modulation at the midinput power region is slightly degenerated as much as 0.6–0.7 dB, which is related with the power gain loss due to the intrinsic characteristic of the ET amplifier. Fig. 23 shows the drain efficiency for different cases. The proposed amplifier delivers a peak efficiency of 66.8% and 8.5dB backoff efficiency of 50.2%, while an efficiency of 45.8% is measured for the same DPA without bias modulation. It was noted that, in the highpower region, even though slightly lower efficiencies in both drain and gate modulations, compared with only gate adaptation, are observed due to the limited efficiency of the bilevel supply modulator, the probability in such a region is so low that the overall efficiency is almost unaffected. To verify the aspect of suitable linearity for basestation applications, the spectral characteristic was measured, as shown in
Fig. 25. Measured gate and drain supply voltages.
Fig. 24. Although the gate and drain envelope bias modulation are engaged resulting in further memory effect, thanks to an application of a digital predistortion (DPD) algorithm utilizing a
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TABLE I PERFORMANCE COMPARISON
memory polynomial (fiveorder and threememory taps), the adjacent channel leakage power ratio (ACLR) is below 45 dBc. The performance of the proposed Doherty amplifier is summarized in Table I and compared with that of a conventional structure. In this operation, the gate and drain voltage provided by 120MHz wideband opamps are measured and plotted in Fig. 25. VI. CONCLUSION The closed form of a current model for a Doherty amplifier considering the current driving capability of the peaking cell has been introduced. Based on the proposed model, the general approaches used to optimize the efficiency have been addressed, and a combined envelope modulation scheme to improve the average efficiency has been analyzed and proposed. To verify the results, the Doherty amplifier was designed and fabricated utilizing a 120W GaN HEMT at 2.6 GHz, providing an output power of 45.8 dBm with a drain efficiency of 53.1% for an 8.5dB PAPR 3G LTE signal. REFERENCES [1] S. C. Crips, RF Power Amplifiers for Wireless Communications, 2nd ed. Norwood, MA: Artech House, 2006. [2] P. B. Kenington, High Linearity RF Amplifier Design. Norwood, MA: Artech House, 2000. [3] W. H. Doherty, “A new high efficiency power amplifier for modulated waves,” Proc. IRE, vol. 24, no. 9, pp. 1163–1182, Sep. 1936. [4] J. Kim, B. Fehri, S. Boumaiza, and J. Wood, “Power efficiency and linear enhancement using optimized asymmetrical Doherty power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 2, pp. 425–434, Feb. 2011. [5] J. Kim, J. Cha, I. Kim, and B. Kim, “Optimum operation of asymmetrical cellsbased linear Doherty power amplifier—Uneven power drive and power matching,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 5, pp. 1802–1809, May 2005. [6] B. Kim, J. Kim, I. Kim, and J. Cha, “The Doherty power amplifier,” IEEE Microw. Mag., vol. 7, no. 5, pp. 42–50, Oct. 2006. [7] B. Kim, I. Kim, and J. Moon, “Advanced Doherty architecture,” IEEE Microw. Mag., vol. 11, no. 5, pp. 72–86, Aug. 2010. [8] A. Z. Markos, K. Bathich, F. Gölden, and G. Boeck, “A 50 W unsymmetrical GaN Doherty for LTE applications,” in Proc. 39th Eur. Microw. Conf., Paris, France, Sep. 2010, pp. 994–997. [9] T. Yamamoto, T. Kitahara, and S. Hiura, “50% drain efficiency Doherty amplifier with optimized power range for WCDMA signal,” in IEEE MTTS Int. Microw. Symp. Dig., Jun. 2000, pp. 525–528. [10] J. Staudinger, G. Bouisse, and J. Kinney, “High efficiency 450 W asymmetric threeDevice Doherty amplifier with digital feedback predistortion,” in Proc. RWS, 2010, pp. 116–119.
[11] I. Kim, J. Moon, S. Jee, and B. Kim, “Optimized design of a highly efficient threestage Doherty PA using gate adaptation,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 10, pp. 2562–2574, Oct. 2010. [12] R. N. Braithwaite and S. Carichner, “An improved Doherty amplifier using cascaded digital predistortion and digital gate voltage enhancement,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 12, pp. 3118–3126, Dec. 2009. [13] L. J. Kushner, “Output performances of idealised microwave power amplifiers,” Microw. J., pp. 103–116, Oct. 1989. [14] P. Colantonio, F. Giannini, R. Giofrè, and L. Piazzon, “Theory and experimental results of a Class F ABC Doherty power amplifier,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 8, pp. 1936–1947, Aug. 2009. [15] J. H. Kim, G. D. Jo, J. H. Oh, Y. H. Kim, G. C. Lee, and J. H. Jung, “Modeling and design methodology of high efficiency ClassF and ClassF1 power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 1, pp. 153–165, Jan. 2011. [16] P. Colantonio, F. Giannini, and E. Limiti, High Efficiency RF and Microwave Solid State Power Amplifiers. Hoboken, NJ: Wiley, 2009. [17] J. Moon, J. Kim, J. Kim, I. Kim, and B. Kim, “Efficiency enhancement of Doherty amplifier through mitigation of the knee voltage effect,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 1, pp. 143–152, Jan. 2011. [18] P. Colantonio, F. Giannini, R. Giofrè, and L. Piazzon, “Increasing Doherty amplifier average efficiency exploiting device knee voltage behavior,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 9, pp. 2295–2305, Sep. 2011. [19] Y. Yang, J. Cha, B. Shin, and B. Kim, “A fully matched Nway Doherty amplifier with optimized linearity,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 3, pp. 986–993, Mar. 2003. [20] M. J. Pelk, W. C. E. Neo, J. R. Gajadharsing, R. S. Pengelly, and L. C. N. de Vreede, “A highefficiency 100W GaN threeway Doherty amplifier for basestation applications,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 7, pp. 1582–1591, Jul. 2008. [21] I. Kim, J. Moon, S. Jee, and B. Kim, “Optimized design of a highly efficient threestage Doherty PA using Gate adaptation,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 10, pp. 2562–2574, Oct. 2010. [22] J. Jeong, D. F. Kimball, M. Kwak, P. Draxler, C. Hsia, C. Steinbeiser, T. Landon, O. Krutko, L. E. Larson, and P. M. Asbeck, “Highefficiency WCDMA envelope tracking basestation amplifier implemented with GaAs HVHBTs,” IEEE J. SolidState Circuits, vol. 44, no. 10, pp. 2629–2639, Oct. 2009. [23] J. H. Kim, G. D. Jo, J. H. Oh, Y. H. Kim, K. C. Lee, J. H. Jung, and C. S. Park, “Highefficiency envelopetracking transmitter with optimized ClassF1 amplifier and envelope amplifier for 3G LTE base station,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 6, pp. 1610–1621, Jun. 2011. [24] A. Khanifar, N. Maslennikov, R. Modina, and M. Gurvich, “Enhancement of power amplifier efficiency through dynamic switching,” in IEEE MTTS Int. Microw. Symp. Dig., Jun. 2004, pp. 2047–2050. [25] J. Van, S. Jung, H. Park, M. Kim, H. Cho, J. Jeong, S. Kwon, K. Lim, and Y. Yang, “Efficiency enhancement for power amplifiers using dynamic bias switching technique,” Electron. Lett., vol. 44, no. 5, pp. 356–357, Feb. 2008. [26] J. Moon, J. Son, J. Kim, I. Kim, S. Jee, Y. Woo, and B. Kim, “Doherty amplifier with envelope tracking for high efficiency,” in IEEE MTTS Int. Microw. Symp. Dig., Jun. 2010, pp. 1086–1089.
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[27] H. Deguchi, N. Ui, K. Ebihara, K. Inoue, N. Yoshimura, and H. Takahashi, “Doherty amplifier with envelope tracking for high efficiency,” in IEEE MTTS Int. Microw. Symp. Dig., Jun. 2009, pp. 1273–1276. [28] M. W. Lee, S. H. Kam, Y. S. Lee, and Y. H. Jeong, “Design of highly efficient threestage inverted Doherty power amplifier,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 7, pp. 383–385, Jul. 2011. [29] J. J. Kim, J. H. Moon, D. H. Kang, S. H. Jee, Y. Y. Woo, and B. M. Kim, “Doherty power amplifier design employing direct input power dividing for base station application,” in Proc. 40th Eur. Microw. Conf., Sep. 2010, pp. 866–869. [30] C. Steinbeiser, P. Page, T. Landon, and G. Burgin, “Doherty power amplifiers using 2nd generation HVHBT technology for high efficiency basestation applications,” in Proc. IEEE Compound Semicond. Integr. Circuit Symp., Oct. 2010, pp. 1–4. [31] J. Staudinger, G. Bouisse, and J. Kinney, “High efficiency 450 W asymmetric threedevice Doherty amplifier with digital feedback predistortion,” in Proc. IEEE Radio and Wireless Symp., Jan. 2010, pp. 116–119. Joon Hyung Kim received the B.S. degree in electronics from Chonbuk National University, Jeonju, Korea, in 2001, and the M.S. degree in electronic engineering from Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2003, where he is currently working toward the Ph.D. degree. From 2003 to 2011, he was with the Electronics and Telecommunication Research Institute (ETRI), Daejeon, Korea, where he contributed to the development of transceivers including the RF power amplifier for both mobile and base stations. In 2012, He joined Skyworks KDC (Korea Design Center), Seoul, Korea, where he is a Staff Design Engineer. His current research interests focus on the analysis of nonlinearities of microwave amplifiers, linearization techniques, and highefficiency improvement techniques of RF power amplifiers.
Chul Soon Park (M’97–SM’07) received the B.S. degree from Seoul National University, Seoul, Korea, in 1980, and the M.S. and Ph.D. degrees in materials science and engineering from the Korea Advanced Institute of Science and Technology, Daejeon, Korea, in 1982 and 1985, respectively. From 1985 to 1999, he was with the Electronics and Telecommunication Research Institute (ETRI), where he contributed to the development of semiconductor devices and circuits. From 1987 to 1989, he studied the very initial growth of group IV semiconductors during a visit to AT&T Bell Laboratories, Murray Hill, NJ. Since 1999, he has been with the Information and Communications University (which merged with Korea Advanced Institute of Science and Technology in 2009), Daejeon, Korea, where he is a Full Professor with the Engineering School and Director of the Intelligent Radio Engineering Center. His research interests include reconfigurable RF integrated circuits, millimeterwave integrated circuits, and their systemonchip/systemonpackage integration.
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TwoWay CurrentCombining Band Power Amplifier in 65nm CMOS Qun Jane Gu, Member, IEEE, Zhiwei Xu, Senior Member, IEEE, and MauChung Frank Chang, Fellow, IEEE
Abstract—This paper presents a twoway currentcomband power amplifier (PA) in 65nm CMOS biningbased technology. An analytical model and design method for band power combiners are presented, which indicates current combining is preferred for millimeterwave frequencies due to a good current handling capability, symmetrical design, and low sensitivity to parasitics. To demonstrate the concept, a twoway currentcombiningbased PA has been fabricated, where each channel utilizes compact and symmetrical transformerbased interstage coupling to realize a preferred fully differential implementation. This PA operates from 101 to 117 GHz with maximum power gain of 14.1 dB, saturated output power ( ) of 14.8 dBm, and peak poweradded efficiency of 9.4%. The core chip area without pads is 0.106 mm . Index Terms—Power amplifier (PA), power combiner,
band.
I. INTRODUCTION
T
HE band of the electromagnetic (EM) spectrum is promising for various applications such as wireless sensing, imaging, and communications. Its unique characteristic of penetration through fog/rain/cloud could enable allweather radar and sensing. The wide bandwidth around this frequency also makes it very attractive to ultrahighspeed wireless and satellite communications [1]–[3]. In these band systems, power amplifiers (PAs) are one of the most challenging components because of the requirements of high output power and energy efficiency. Conventionally, band amplifiers are mainly based upon discrete III–V compound semiconductor devices [4], [5]. However, current III–V semiconductor processes are not suitable to support very large scale integrated (VLSI) digital circuits, which is indispensable for systemonachip (SoC). Therefore, multichip integration becomes necessary, and tends to produce a large form factor system. The associated interchip integration also introduces the complicated interface circuitries among different chips. Manuscript received October 01, 2011; revised January 06, 2012; accepted January 10, 2012. Date of publication March 08, 2012; date of current version April 27, 2012. This paper is an expanded paper from the IEEE RFIC Symposium, June 5–10, 2011, Baltimore, MD. Q. J. Gu is with the Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL 32608 USA (email: [email protected]). Z. Xu is with HRL Laboratories LLC, Malibu, CA 90265 USA. M.C. F. Chang is with the Electrical Engineering Department, University of California at Los Angeles, Los Angeles, CA 90095 USA (email: mfchang@ee. ucla.edu). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2187536
On the other hand, silicon processes, especially CMOS technologies, have the advantages of high level integration, small form factor, and potential low cost. Therefore, CMOS millimeterwave circuits have the potential to materialize wide deployment, and thus attract lots of research interest [6]–[11]. In millimeterwave PA research, band (50–75 GHz) CMOS PAs have been demonstrated to deliver up to 20dBm saturated output power with 20% poweradded efficiency (PAE) [12]–[19]. Recent band CMOS PA studies have also demonstrated higher than 10dBm with power efficiencies less than 6% [20], [21]. To further increases output power and efficiency of band CMOS PAs, the inherent drawbacks of silicon processes must be overcome. First, the existing CMOS device speed is still limited. For instance, and of the devices in 65nm CMOS technology are around 200 GHz. It does not provide sufficient margin to process band frequency signals. Therefore, switchmode PAs, potentially with higher efficiency, are not applicable due to the required highorder harmonic operations. It suggests a linear PA approach at the cost of low efficiency. Second, silicon processes inherent high losses degrade PA efficiency. The losses include silicon substrate coupling losses, interconnect electrical and magnetic coupling losses, and contact ohmic losses. Such a drawback mandates optimization of both active and passive devices for highfrequency PAs. Third, low supply and breakdown voltages in deepsubmicrometer CMOS technologies constrain high power delivery. Reducing output impedance can increase output power, but at the cost of low efficiency due to higher losses from the impedance matching network with a higher impedance transformation ratio. Consequently, such optimization leads to tradeoffs between output power and efficiency. To mitigate this issue, powercombining structures with multiple PA channels are widely adopted [14]–[20]. Three powercombining schemes are normally used in millimeterwave PAs: direct current combining, Wilkinson power combining, and transformerbased power combining. Each scheme has its own pros and cons and will be discussed in Section II. After a detailed comparison among existing power combiners, we conclude that transformerbased current combiners are more suitable for ultrahighfrequency operations. Hence, he demonstrate a twoway currentcombining band PA in a 65nm CMOS technology. Section II describes the design in detail, including the CMOS PA challenges, comparisons of power combiners, advantages of current combiners and the associated designs, and the optimization of each channel PA. Section III presents measurement results, and is then followed by a conclusion in Section IV.
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II. TWOWAY CURRENTCOMBINING PA A. MillimeterWave CMOS PA Challenges The detailed circuit specifications, especially the required PA output delivery power, must be studied based on the system link budget analysis before circuit design. For instance, a wireless link with a 10m distance between a transmitter and receiver has an 84.4dB path loss based on the Friis propagation equation (1), where a 4dBi antenna gain from both a transmitter and a receiver at 100GHz frequency is assumed. Given 70dBm receiver sensitivity, the minimum output power from a transmitter PA must be larger than 14.4 dBm
Fig. 1. Simulated maximum available power gain of a 65nm nMOS device with the size of 20 m/60 nm.
(1) is the required transmitter output power, is the rewhere ceiver sensitivity, and are the transmitter and receiver antenna gain, respectively, is the signal wavelength, and is the propagation distance. Such high output power is challenging for one channel of the CMOS PA due to low breakdown and supply voltages of the technology. To simultaneously achieve high power delivery while meeting device reliability constraints due to low breakdown and supply voltages, a small output impedance is needed. While a low output impedance often demands a highimpedance transformation ratio, , where is the load impedance and is normally equal to 50 in conventional systems. A high tends to result in a low efficiency of the impedance transformation network . The relationship between and the transformation ratio has been presented in [22] (2)
For example, in order to deliver 100mW output power, PA ) under output impedance needs to be lower than 5 (or a 1V supply. With a typical inductor quality factor of 10, the efficiency of such an impedance transformation network is only about 70%, which greatly limits PA efficiency Another issue of low PA output impedance is the associated high sensitivity to parasitic resistance. A low indicates a high output current , and thus induces a high power loss of due to parasitic resistances . Still using the above example, to deliver 100mW output power requires an output current rms value of about 140 mA. A serial 1 parasitic resistance may consume 20mW power, which introduces another extra 20% degradation on top of the overall power efficiency. Moreover, a high operating frequency further constrains power efficiency. Since band frequency is close to device cutoff frequencies, it is very hard to support higher order harmonics. Consequently, it is challenging to realize switchingtype PAs at such frequencies for high efficiency. For example, the devices in the 65nm CMOS technology, used in this PA design, has the unit current gain frequency of about 200 GHz, which will further drop significantly due to external parasitics from device layout. Since a fast device is still
beneficial to the PA output power and efficiency, it is preferred to maximize device operating speed. To achieve so, the PA devices are normally biased at saturation region, which results in the unavoidable constant current flowing through the active devices and leads to large power waste. Another critical factor to degrade power efficiency at high frequency is the reduced device power gain. Fig. 1 shows the simulated available power gain versus frequency for an nMOS device with the size of 20 m/60 nm. At 100 GHz, the maximum available power gain is only about 8.7 dB. To achieve a high power gain, e.g., 20 dB, multiple stages are needed. Compared to a singlestage PA operating at lower gigahertz frequencies, multistage structures degrade the power efficiency. In addition, skin effect at high frequencies further increases interconnect and contact resistance. These extra resistances not only consume more power through ohmic losses, but also further degrade the performances of both active and passive devices. For example, skin effect reduces the passive devices’ quality factor . All these issues challenge highpower and highefficiency PA design. To achieve an optimum tradeoff between output power and efficiency for highfrequency CMOS PAs, multichannel amplifiers with power combining are a viable solution. The following section discusses power combing techniques and compares three different types of power combiners. B. Power Combiner Comparisons To boost transmitter output power, powercombining techniques are utilized in RF integrated circuits (ICs) and monolithic microwave integrated circuits (MMICs) and systems, such as space power combining [23] and onchip power combining [14]–[20]. Space power combining requires multiple antennas and a wide channel spacing (typically around ) for onchip implementations at millimeterwave frequencies, which may induce high design complexities and large chip areas. Therefore, onchip combining methods are more widely adopted. Among them, there are mainly three structures: direct power combining, Wilkinson power combining, and transformerbased power combining, as shown in Fig. 2. Direct power combining has been utilized in [17], which directly combines the currents from multiple channels and applies them on the output load for a large power. To optimize each PA channel output power and efficiency, impedance transformation network is necessary. Typical tuningstubsbased impedancetransformation networks may induce large losses and asymmetrical layouts
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Fig. 2. Three different powercombining structures. (a) Direct powercombining structure. (b) Wilkinson powercombining structure. (c) Transformerbased powercombining structure.
to complicate PA design and degrade circuit performance. Transmissionlinebased Wilkinson power combining achieves good isolation with a matched condition for all ports at a designated frequency. Since a transmission line has a long length for onchip implementations at millimeterwave frequencies, lumpedelementbased Wilkinson combiners are often used to save chip area. However, Wilkinson combiners are mainly suitable for only a narrow frequency range and sensitive to coupling and component parasitics. When the operating frequency deviates away from the designed frequency or there are large parasitics, the port isolation and matching conditions will be deteriorated significantly. The third approach is transformerbased power combining. It integrates powercombining and impedancematching functions to provide a symmetrical and compact method, and therefore is adopted in this PA design. C. TwoWay TransformerBased Combiner There are two types of transformerbased power combiners: voltage combiners and current combiners. In lower gigahertz operations, voltage combiners are widely utilized [24], [25] because they naturally transfer a low PA output impedance to the load, , as shown in Fig. 3(a). This provides the advantage of high output power delivery from each PA of . For 1:1 turns ratio, an way power combiner results in PA output impedance of , and overall power delivery of an way voltage combiner is , where is the voltage swing of each channel’s primary winding. is inversely proportional to the number of combining channels and can drop to a very small value for large , and thus makes the PA sensitive to parasitics. The sensitivity ratio, , is inversely proportional to . Such relation implies that the higher the sensitivity ratio , the worse PA’s reliability is in the presence of process and temperature variations. Due to this concern, voltage combiners are not preferred for combining with a large number of channels [26]. On the other hand, an way current combining with 1:1 turns ratio leads to a higher PA output impedance of . The parasitic sensitivity factor is better than that of voltage combiners. However, the power delivered from each channel is reduced due to a higher output impedance. To alleviate that, a transformer ratio of 1: can be applied with larger than 1, as shown in Fig. 3(b). Therefore, the PA output impedance scales down to . Each channel primary winding current and secondary winding current are and . Therefore, an way current combiner with 1: turns ratio has
Fig. 3. Transformerbased power combiners. (a) Voltage combiner with 1:1 turns ratio. (b) Current combiner with 1: turns ratio.
the overall power delivery of . Interestingly, the total power deliverable to the load in current combiner structures is independent to the number of channels given a fixed voltage swing from each primary channel, but proportional to the square of the coupling transformer turns ratio. However, increasing the number of channels reduces the output power delivery requirement from each PA channel. To establish fair comparison between voltage combiners and current combiners, let us set the same power delivery for both structure, which is satisfied by setting . Given the same power delivery, current power combiners are preferred for two key reasons. First, although each channel primary winding impedances and currents are the same when , the current of the secondary winding is different for the two cases: for current combining versus for voltage combining. Therefore, the high current of secondary winding in voltage combining not only demands high current handling capability, but also makes them sensitive to parasitic resistance in the secondary winding due to the power loss of . This difference can be explained intuitively from current distribution scenario. A current combiner distributes current among different channels. Thus, each channel only carries a smaller current with a lower current handling requirement. However, a voltage combiner needs to propagate the current from all the channels, and therefore requires higher current handling capabilities. A second and even more important reason favoring current combining over voltage combining is due to the physical design constraints, especially in terms of channel symmetry. Any amplitude and phase mismatches degrade powercombining efficiency. Some system calibration method scan be adopted to mitigate mismatch issues. However, the schemes are normally bandlimited and impose design complexities. Therefore, channel symmetry becomes one of the key merits in power combiner physical design, where current combining has advantages over voltage combining. In order to evaluate this characteristic, we designed twoway combiners in both voltage and currentcombining manners, as shown in Fig. 4. To form a fair comparison, both combiners use the same transformer structure for each channel with the same distance between channels. The only difference between these two combiners is the output combining approaches: with parallel current combining shown in Fig. 4(a) and voltage series combining
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Fig. 4. Layout structures for performance comparison between: (a) twoway current combiner and (b) twoway voltage combiner.
Fig. 5. Amplitude and phase mismatch for both voltage and current combiners. Solid lines represent the voltage combiner and dashed lines represent the current combiner with red (in online version) for amplitude mismatches and blue (in online version) for phase mismatches.
shown in Fig. 4(b). Fig. 5 presents the simulated amplitude and phase mismatches from both combiners. The current combiner shows amplitude mismatch of 0.02 dB and phase mismatch of 0.03 at 100 GHz. However, the voltage combiner presents very large mismatches with 5.8 dB in amplitude and 32 in phase, which results in higher than 2dB combining loss. This can be explained through a simplified model, as shown in Fig. 6. For simplicity, each transformer can be represented as a magnetic coupling device and some parasitic to the ground, as shown in the dashed line boxes in Fig. 6. Without losing generality, we use a capacitor to represent the parasitic impedance to the ground. Fig. 6(a) illustrates the voltage combiner. To facilitate description, a source is applied at the secondary winding side, which is the output of the combiner, to observe the coupling signals at the input sides. Passive combiners’ reciprocal feature ensures the validity of this analysis. Due to the leakage current to the ground through the parasitic capacitors, the current flowing through each channel magnetic coupling device is different with . This leads to different coupling current to the primary windings, i.e., , and thus causes mismatches among channels. However, the currentcombining structure is fully symmetrical and has no mismatches among channels, as shown in Fig. 6(b). The simulated minor mismatches may come from the finite accuracy from EM simulation tools. To summarize, the key reason of large mismatches in voltage combiners is due to the cascade configuration in the secondary winding, which has leakage current to the ground in each stage that results in the current
Fig. 6. Both: (a) voltage and (b) current combiners built by a simplified transformer model.
Fig. 7. Physical model for the transformer used in the combiners.
reduction along the path. The larger number of the combining channels, the more mismatches will show up, and the higher the operating frequency, the more mismatches kick in. These are due to a greater portion of the current leaking into the ground. To verify this concept, we have built an equivalent physical model to represent the transformer, as shown in Fig. 7. We then use this model to construct both current and voltage combiners. With the original model shown in Fig. 7, the phase and amplitude mismatches match with EM simulation results: current combining has perfect match conditions and voltage combining shows large mismatches. To validate the above theory, we purposely removed the parasitics to ground (the circled part in Fig. 7). The voltage combining also then shows perfect matched scenarios because there is no current leaking to the ground. Fig. 8 shows the simulated phase and amplitude mismatches of voltage combiners with two different transformer models: the original model from Fig. 7 and the modified model by purposely removing the parasitics to the ground. The mismatches with original model are serious, which are similar to that shown in Fig. 5. However, once the parasitics to the ground are removed, voltage combining also demonstrates perfect matching performance. Based on above analysis, we then conclude that current combining is more suitable in ultrahighfrequency operations due to better current handling capability and better amplitude and phase matches among channels, therefore leading to a low combining loss. In this twoway combining PA structure, there are two combiners or splitters: the one at the input as a power splitter and the one at the output as a combiner. Since combiners and splitters are reciprocal, they can be designed from an identical powercombining point of view. At the input side, to match
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Fig. 10. MOS device connection. (a) RF device provided by Foundry. (b) Device layout design in this band PA. Fig. 8. Voltage combiner amplitude and phase mismatches with both the transformer physical model and a modified transformer model by removing the parasitics to ground. Solid lines represent mismatches with the physical model and dashed lines represent mismatches with the modified transformer model.
Fig. 9. (a) Input power splitter and (b) output power combiner designed in the band PA.
higher input impedance at the device gate, the 1:1 turns ratio is chosen as shown in Fig. 9(a). It deploys a lateral coupling structure to maximize the usage of top ultrathick metal 3.4 m for minimum losses. The larger winding turn is utilized at the internal PA input and the smaller winding turn connects the chip input. This provides extra voltage gain at the PA input, and the output power combiner uses a 1:2 turns ratio for lower output impedance and larger output delivery power, as discussed earlier in this section. As shown in Fig. 9(b), the primary winding has one turn, implemented with the combined second and third top metals (0.9 and 0.22 m). The secondary winding is two turns and is majorly implemented by the top ultrathick metal. The primary and secondary coils are stacked with an offset instead of directly vertical to maximize mutual magnetic coupling and boost its selfresonant frequency by minimizing the capacitive coupling. D. PA Design One of the biggest challenges in band PA design is the device optimization and modeling. At such high frequencies, the active device model becomes highly layout dependent, which makes it difficult to offer a universal model. In particular, the extrinsic parasitic, such as gate, source, and drain resistance, substrate resistance and coupling capacitors among them, ultimately determines the maximum achievable gain. The MOS and can be approximated as (3)
where is the gate total capacitance, is the gate resistance, and is the gate–drain capacitance. All these must be minimized to provide optimum performance. However, these optimizations do not follow the same trend and reinforce tradeoffs. For example, a multifinger structure reduces the gate resistance for wide gatewidth. It not only boosts device , but also significantly improves noise figure. However, the gate to substrate and gate to drain/source capacitances increase with the number of fingers, which in turn degrades . Double gate connection could be used to further reduce the serial gate resistance. However, it inevitably increases the gate coupling capacitance and even routing inductance, which becomes more severe at high frequencies. In our design tradeoffs, 0.6 m finger width is chosen in this amplifier with a single side gate connection. It not only provides relatively small gate serial resistance and capacitance, but also allows area efficient connection that offers low resistance source/drain ties. Same as gate resistance, the device metal connections also significantly affect performance. The wiring style of RF device provided by the foundry, shown in Fig. 10(a), may not be optimized for such high frequency due to its large gate connection resistance, excessive parasitic capacitance, and especially the coupling capacitance between gate and drain that contributes to parasitic miller capacitance. Given wide signal wiring inside millimeterwave amplifiers, a new device access scheme using single gate connection illustrated by Fig. 10(b) may render better performance by offering smaller gate resistance through paralleling and minimizing gate drain capacitance. The existing BSIM3V4 models, supported by foundries, are dedicated to lowfrequency operations and cannot be directly applied to millimeterwave amplifier design. An improved model equipped with extrinsic parasitics, including serial resistors, coupling capacitors, substrate capacitors, and access line effects is used to facilitate the design as shown Fig. 11(a). , , and stand for the serial resistance of gate, drain, and source introduced by connections; , , are coupling capacitors, and the transmission lines embody the access line effects, which incorporate both resistive/capacitive and magnetic effects. Practically, it is hard to model these parasitics into lumped fashion so the corresponding EDA tools are necessary to assist the procedure. The proximity parasitic resistance and capacitance are extracted through Caliber RCX. The metal wirings are then simulated with EM tools to cover the access line effects. The ultimate millimeterwave device
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Fig. 11. (a) Adopted millimeterwave MOS device model in the PA design. (b) Caliber RCX extracts rcc of device proximity area and EM simulation models access lines.
Fig. 12. Schematic of the twoway currentcombining PA.
Fig. 13. (a) PA interstage Tmatching network. (b) Smith chart representation.
model is built by adding these two parts on top of the foundry provided core model, as depicted in Fig. 11(b). Fig. 12 presents the proposed twoway current combined PA schematic. A power splitter separates the input signal into two paths and a power combiner merges the output for higher delivery power. Both the power splitter and combiner also serve input and output matching purposes. To increase gain and boost stability, a cascode structure has been adopted in the first two stages. However, such a structure creates lowimpedance paths from cascode nodes to ground through stray capacitance of the devices and interconnects. At millimeterwave frequencies, this path significantly wastes power and degrades PAE. A network is then inserted at the cascode node to achieve wideband matching between common source (CS) and common gate (CG) devices, as shown in Fig. 13. A transmission line stub is used first to transform the impedance from capacitive node A of the CS device drain to node B. A shunt inductor and another transmission line stub are used afterwards to transform the impedance to inductive node C and then fulfill the conjugate match. This network mitigates the lossy path and consequently improves the amplifier gain and PAE. However, it slightly degrades the amplifier linearity by 0.7 dB due to the increased cascode node impedance. According to our simulations, the proposed network improves the cascode amplifier’s gain by 4 dB and reduces amplifier’s dc power consumption by 50% for the same amplification gain. Compared with simple inductor shunting and inductor/transmission line series matching, this T matching network could fulfill conjugate matching with minimum loss. The PA interstage coupling is achieved by transformers [27]. This structure has several prominent characteristics. First, it provides innate dc blocking so that each stage can optimize its own
bias independently. Second, flexible voltage/current gain can be achieved by adjusting the turns ratio. The coil turns ratio is chosen to provide a larger voltage swing to the next stage input while keeping a smaller swing at its own output to ensure PA driver stages away from early saturation for high linearity. Third, the natural interstage T matching network accomplishes interstage tuning and matching. Fourth, the physical separation between input and output signals forms necessary space for isolation and eliminates extra undesired wiring for symmetrical/compact physical design. These features contribute to the highperformance PA design. The PA last stage is designed with CS configuration to deliver maximum output power. To realize compact design, the output current combiner at the drain load serves as frequency tuning, impedance transformation, as well as current combining. Due to the bidirectional feature of transformers and EM couplings, the design optimization must include all the circuit components and peripheral structures. Therefore, we have conducted the EM simulation for the entire PA structure implemented in the layout to ensure all the couplings are included in our design optimizations. To tradeoff the PA gain, linearity, and reliability concerns, there are two power domains. VDD1 is the supply for the first two stages in the cascode configuration. Due to the cascode configuration and the cascode device’s bulk connecting to a higher votlage instead of ground, VDD1 can be set higher than the normal supply voltage. VDD2 is the supply of the last CS stage and is set at typical supply conditions. III. MEASUREMENT RESULTS The proposed twoway current combined PA has been fabricated in a 65nm CMOS technology. To characterize the PA smallsignal performance, an Agilent vector network analyzer
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Fig. 14. Measured parameters at two supply conditions: a low supply conV and V, and a high supply condition dition with V and V. with Fig. 16. Measured band PA saturated output power, PAE, and corresponding power consumption from 100 to 120 GHz with solid lines for low supply condition and dotted lines for high supply condition.
Fig. 15.
band PA measurement setup for largesignal characterization.
(VNA) with frequency extension to 110 GHz is utilized. We measure the PA at two different supply conditions: a low supply condition with V and V; a high supply condition with V and V. Fig. 14 shows the parameter measurement results and associated factor below from 90 to 110 GHz at the two different supply conditions. It shows the PA has peak gain around 109 GHz, which is close to 11 and 13 dB for the two supply conditions. Fig. 15 shows the largesignal measurement setup. A harmonic mixer is used to sweep the PA gain quickly first, then a power sensor is used to characterize the amplifier output power, linearity, and PAE. The power source consists of a band power source provided by Virginia Diode Inc. (VDI), Charlottesville, VA, and a tunable attenuator with 50dB dynamic range. Fig. 16 shows the measured PA saturated output power, PAE, and corresponding power consumption across the frequency from 100 to 120 GHz at the two supply conditions. The maximum gains are 13 and 14.4 dB correspondingly and the 3dB bandwidth is about 9 GHz from 101 to 110 GHz. Peak PAEs occur around 107 GHz. When generating saturated output power in this frequency, the low supply condition consumes 165
Fig. 17. Measured V, (a)
band PA gain from four different dies under: V and (b) V, V.
mW with VDD1 drawing 77 mA at 1.4 V and VDD2 drawing 57 mA at 1 V. The high supply condition consumes 267 mW with VDD1 drawing 90 mA at 2 V and VDD2 drawing 72 mA at 1.2 V. The low saturated output power beyond 111 GHz is mainly due to the low source power and a lower PA gain, which is also the reason that we cannot fully characterize the PAE. Fig. 17 presents the PA gain versus input signal frequency measured from four dies with a harmonic mixer at the same two supply conditions. The PA delivers on average 3dB more gain when biased at higher supply conditions due to larger device
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Fig. 19. Twoway currentcombining CMOS.
band PA die photograph in 65nm
V V, 2 dB higher than the OP1 dB 9.6 dBm when the supplies are lower. Table I summarizes this currentcombined PA performance, and compares its performance with prior arts. Among all, this proposed PA delivers to date the highest output power with 9.4% PAE beyond 100 GHz in CMOS technologies. Fig. 19 shows a PA chip photograph, which occupies 0.70 mm 0.46 mm and 0.48 mm 0.22 mm with and without pads, respectively. The input power divider and output power combiner use a similar architecture, but with different sizes, which can be clearly shown in the figure. The input and output PADs are also modeled and incorporated into the simulation to achieve optimum matching. Fig. 18. Measured band PA gain and PAE versus V, 111, 114, and 117 GHz under: (a) V, V. (b)
at 101, 108, V and
TABLE I PERFORMANCE SUMMARY AND COMPARISONS
IV. CONCLUSION A currentcombined 101–117GHz band CMOS PA has been demonstrated in 65nm CMOS. It achieves 14.8dBm saturated output power with better than 9.4% PAE and larger than 10dB power gain across the frequency band of interest. It further extends the technology frontier and paves the way for future integrated submillimeterwave high datarate wireless communications and active imaging applications in CMOS technology. ACKNOWLEDGMENT The authors wish to acknowledge the chip fabrication and support of the Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, Taiwan, and test setup help from A. Tang, University of California at Los Angeles (UCLA), and K. Yang, University of Florida, Gainesville. REFERENCES
transconductance. Under higher supply setup, the PA delivers 15dB maximum power gain and provides 10dB gain over 20GHz bandwidth (98 118 GHz). Fig. 18 shows the measured PA gain and PAE versus output power under the two supply conditions. The output power at 111 GHz is not high enough to measure the OP1 dB due to the lower output power of the VDI power source at that specific frequency. The PA OP1 dB is about 11.6 dBm when
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[4] S. Masuda, T. Ohki, K. Makiyama, M. Kanamura, N. Kamoto, H. Shigematsu, K. Imanishi, T. Kikkawa, K. Joshin, and H. Hara, “GaN MMIC amplifiers for band transceivers,” in Eur. Microw. Conf., 2009, pp. 1796–1799. [5] V. K. Paidi, Z. Griffith, Y. Wei, M. Dahlstrom, M. Urteaga, N. Parthasarathy, M. Seo, L. Samoska, A. Fung, and M. J. W. Rodwell, “ band (140–200 GHz) and band (75–110 GHz) InP DHBT medium power amplifier,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 2, pp. 598–605, Feb. 2005. [6] E. Laskin et al., “Nanoscale CMOS transceiver designin the. 90–170GHz range,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 12, pp. 3477–3490, Dec. 2009. [7] O. Momeni and E. Afshari, “High power terahertz and millimeterwave oscillator design: A systematic approach,” IEEE J. SolidState Circuits, vol. 46, no. 3, pp. 583–597, Mar. 2011. [8] Q. Gu, Z. Xu, D. Huang, T. LaRocca, N. Wang, and M.C. F. Chang, “A low power band CMOS frequency divider with wide locking range and accurate quadrature output phases,” IEEE J. SolidState Circuits, vol. 43, no. 4, pp. 991–998, Apr. 2008. [9] Q. J. Gu, Z. Xu, H.Y. Jian, X. Xu, F. Chang, W. Liu, and H. Fetterman, “Generating terahertz signals in 65 nm CMOS with negativeresistance resonator boosting and selective harmonic suppression,” in IEEE VLSI Circuits Symp., Jun. 2010, pp. 109–110. [10] Q. J. Gu, H.Y. Jian, Z. Xu, Y.C. Wu, F. Chang, Y. Baeyens, and Y.K. Chen, “CMOS prescaler(s) with maximum 208 GHz dividing speed and 37 GHz timeinterleaved dualinjection locking range,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 58, no. 7, pp. 393–397, Jul. 2011. [11] Z. Xu, Q. J. Gu, and M.C. F. Chang, “A 100–117 GHz band CMOS power amplifier with onchip adaptive biasing,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 10, pp. 547–549, Oct. 2011. [12] T. LaRocca, J. Y.C. Liu, and M.C. F. Chang, “60 GHz CMOS amplifiers using transformercoupling and artificial dielectric differential transmission lines for compact design,” IEEE J. SolidState Circuits, vol. 44, no. 5, pp. 1425–1435, May 2009. [13] D. Chowdhury, P. Reynaert, and A. M. Niknejad, “A 60 GHz 1 V 12.3 dBm transformer coupled wideband PA in 90 nm CMOS,” in Int. SolidState Circuits Conf. Tech. Dig., Feb. 2008, pp. 560–561. [14] C. Y. Law and A.V. Pham, “A high gain 60 GHz power amplifier with 20 dBm output power in 90 nm CMOS,” in Int. SolidState Circuits Conf. Tech. Dig., Feb. 2010, pp. 426–427. [15] J.W. Lai and A. ValdesGarcia, “A 1 V 17.9 dBm 60 GHz power amplifier in standard 65 nm CMOS,” in Int. SolidState Circuits Conf. Tech. Dig., Feb. 2010, pp. 424–425. [16] Y. Zhao, J. R. Long, and M. Spirito, “A 60 GHzband 20 dBm power amplifier with 20% peak PAE,” in IEEE RFIC Symp., Jun. 2011, pp. 1–4. [17] M. Bohsali and A. M. Niknejad, “Current combining 60 GHz CMOS power amplifiers,” in RFIC Symp., May 2009, pp. 31–34. [18] U. R. Pfeiffer and D. Goren, “A 23dBm 60GHz distributed active transformer in a silicon process technology,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 5, pp. 857–865, May 2007. [19] Y.N. Jen, J.H. Tsai, T.W. Huang, and H. Wang, “Design and analysis of a 55–71GHz compact and broadband distributed active transformer power amplifier in 90nm CMOS process,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 7, pp. 1637–1646, Jul. 2009. [20] D. Sandstrom, B. Martineau, M. Varonen, M. Karkkainen, A. Cathelin, and K. A. I. Halonen, “94 GHz powercombining power amplifier with 13 dBm saturated output power in 65 nm CMOS,” in IEEE RFIC Symp., Jun. 2011, pp. 1–4. [21] Y.S. Jiang, J.H. Tsai, and H. Wang, “A band medium power amplifier in 90 nm CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 12, pp. 818–820, Dec. 2008. [22] I. Aoki, S. D. Kee, D. B. Rutledge, and A. Hajimiri, “Distributed active transformer—A new powercombining and impedancetransformation technique,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 316–331, Jan. 2002. [23] Y. A. Atesal, B. Cetinoneri, M. Chang, R. Alhalabi, and G. M. Rebeiz, “Millimeterwave waferscale silicon BiCMOS power amplifiers using freespace power combining,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 5, pp. 954–965, May 2011. [24] S.M. Yoo, J. S. Walling, E.C. Woo, and D. J. Allstot, “A powercombined switchedcapacitor power amplifier in 90 nm CMOS,” in IEEE RFIC Symp., Jun. 2011, pp. 1–4.
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[25] P. Haldi, D. Chowdhury, P. Reynaert, G. Liu, and A. M. Niknejad, “A 5.8 GHz 1 V linear power amplifier using a novel onchip transformer power combiner in standard 90 nm CMOS,” IEEE J. SolidState Circuits, vol. 43, no. 5, pp. 1054–1063, May 2008. [26] A. Afsahi and L. Larson, “An integrated 33.5 dBm linear 2.4 GHz power amplifier in 65 nm CMOS for WLAN applications,” in IEEE Custom Integr. Circuits Conf., 2010, pp. 1–4. [27] D. Huang, R. Wong, Q. Gu, N. Wang, T. Ku, C. Chien, and F. Chang, “A 60 GHz CMOS differential receiver frontend using onchip transformer for 1.2 volt operation with enhanced gain and linearity,” in VLSI Circuits Symp. Tech. Dig., 2006, pp. 144–145. Qun Jane Gu (S’00–M’07) received the B.S. and M.S. degrees from the Huazhong University of Science and Technology, Wuhan, China, in 1997 and 2000, respectively, the M.S. degree from the University of Iowa, Iowa City, in 2002, and the Ph.D. degree from the University of California at Los Angeles (UCLA), in 2007, all in electrical engineering. Following graduation, she was a Senior Design Engineer with the Wionics Realtek Research Group and Staff Design Engineer with AMCC, where she was involved with CMOS millimeterwave and optic I/O circuits. Most recently, she was a Postdoctoral Researcher with UCLA. Since August 2010, she has been with the University of Florida, Gainesville, as an Assistant Professor. Her research interest spans highefficiency lowpower interconnects, millimeterwave, and submillimeterwave ICs, and SoC design techniques, as well as integrated terahertz imaging systems. Dr. Gu was the recipient of a 2003 UCLA Fellowship and a 2007 Dissertation Year Fellowship.
Zhiwei Xu (S’97–M’03–SM’10) received the B.S. and M.S. degrees from Fudan University, Shanghai, China, in 1997 and 2000, respectively, and the Ph.D. degree from the University of California at Los Angeles (UCLA), in 2003, all in electrical engineering. He has held industry positions with GPlus Inc., SST Communications, Conexant Systems, and NXP Inc., where he led the development for wireless local area network (WLANs) and SoC solutions for proprietary wireless multimedia systems, CMOS cellular transceivers, multimedia over cable (MoCA) systems, and TV tuners. He is currently with HRL Laboratories LLC, Malibu, CA, where he is involved with various aspects of millimeterwave and submillimeterwave ICs and systems, softwaredefined radios, highspeed ADCs, and analog VLSI systems. He has authored or coauthored various journal and conference publications. He has made one contribution to the Encyclopedia of Wireless and Mobile Communications. He holds approximately ten patents with several patents pending.
MauChung Frank Chang (F’96) received the Ph.D. degree in electrical engineering from National Chiao Tung University, Hsinchu, Taiwan, in 1979. He is the Wintek Endowed Chair and Distinguished Professor of Electrical Engineering and the Director of the High Speed Electronics Laboratory, University of California, Los Angeles (UCLA). Prior to joining UCLA, he was the Assistant Director and Department Manager of the High Speed Electronics Laboratory, Rockwell Science Center (1983–1997), Thousand Oaks, CA. During this tenure, he successfully developed and transferred the AlGaAs/GaAs HBT and BiFET (planar HBT/MESFET) IC technologies from the research laboratory to the production line (now Conexant Systems and Skyworks). The HBT/BiFET productions have grown into multibillion dollar businesses and dominated the cellphone PAs and frontend module markets (currently exceeding one billion units/year). He was the Principal Investigator with Rockwell, leading the Defense Advanced Research Projects Agency (DARPA)’s ultrahighspeed ADC/DAC development for direct conversion transceiver (DCT) and digital radar receiver (DRR) systems. He was the inventor of multiband reconfigurable
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RF interconnects, based on FDMA and CDMA multiple access algorithms, for chip multiprocessor (CMP) intercore communications and interchip CPUtomemory communications. He also pioneered the development of the world’s first multigigabit/s ADCs, DACs, and DDSs in both GaAs HBTs and Si CMOS technologies, the first 60GHz radio transceiver frontend based on transformerfoldedcascode (Origami) highlinearity circuit topology, and dBc/Hz with a digitally the low phasenoise CMOS VCO controlled onchip artificial dielectric (DiCAD). He was also the first to demonstrate CMOS oscillators in the terahertz frequency range (324 GHz). He was also the founder of the RF design company GPlus (now SST Communications) to commercialize WiFi 11 b/g/a/n PAs, frontend modules, and CMOS
transceivers. He has authored or coauthored over 270 technical papers and ten book chapters. He authored one book and edited one book. He was a Guest Editor for the Journal of HighSpeed Electronics and Systems (1994). He holds 20 U.S. patents. Throughout his career, his research has primarily focused on the development of highspeed semiconductor devices and ICs for RF and mixedsignal communication and sensing system applications. Dr. Chang was coeditor of the IEEE TRANSACTIONS ON ELECTRON DEVICES (1999–2001) and was the guest editor of the IEEE JOURNAL OF SOLIDSTATE CIRCUITS (1991 and 1992).
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A 130nm CMOS 100Hz–6GHz Reconfigurable Vector Signal Analyzer and SoftwareDefined Receiver Ankush Goel, Member, IEEE, Behnam Analui, Member, IEEE, and Hossein Hashemi, Senior Member, IEEE
Abstract—A monolithic 100Hz–6GHz reconfigurable vector signal analyzer (VSA) and softwaredefined receiver (SDR), following a twostep up–down conversion heterodyne scheme with robustness to various wideband interference scenarios and local oscillator (LO) harmonic mixing, is presented. The 130nm CMOS chip does not require external filters or baseband processing to reduce the effect of interferences or LO harmonics. The receiver has tunable gain from 67 to 68 dB in steps of 0.5 dB, and tunable bandwidth from 0.4 to 11 MHz in steps of 0.5 MHz. The receiver sensitivity at the maximum gain is 82 dBm. A monolithic VSA/SDR enables various commercial and military wireless solutions. Index Terms—CMOS, receiver, RF, wideband.
I. INTRODUCTION
R
F sensing and spectral analysis over multigigahertz frequency band benefits a vast range of applications, including public safety, electronic warfare, instrumentation, and cognitive radio. Today’s solutions require significant reduction in size, weight, and power consumption. For instance, the Departments of Defense, Homeland Security, and Public Safety Organizations are interested in dismounted RF sensors from a few kilohertz to multigigahertz that can be handcarried by their personnel over long distances. Similarly, test and measurement industry is seeing a growing trend towards USB donglebased instrumentation. In the commercial wireless world, two trends are evident, namely, rapid introduction of new wireless standards and applications, and large nonrecurring engineering cost associated with developing a new dedicated wireless chip. As such, developing application/standard specific chips catering to one or more application(s)/standard(s) is becoming a prohibitively costly proposition. It is likely that reconfigurable and programmable wireless transceivers will play a role in a large subset of future wireless products. For instance, softwaredefined radios (SDRs) may play a role Manuscript received October 01, 2011; revised February 23, 2012; accepted February 23, 2012. Date of publication April 03, 2012; date of current version April 27, 2012. This work was supported in part by the Office of Naval Research (ONR) and the Defense Advanced Research Projects Agency (DARPA). This paper is an expanded paper from the IEEE RFIC Symposium, June 5–10, 2011, Baltimore, MD. A. Goel is with MediaTek USA, San Jose, CA 95134 USA. B. Analui and H. Hashemi are with the Department of Electrical Engineering Electrophysics, University of Southern California, Los Angeles, CA 900890271 USA (email: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2190091
towards the new Federal Communications Commission (FCC) regulation for unlicensed usage of television band devices (TVBDs), also known as white spaces, at 54–60, 76–88, 174–216, 470–608, and 614–698 MHz. In this paper, a monolithic 0–6GHz1 reconfigurable vector signal analyzer (VSA) and SDR, with robustness to various wideband interference scenarios, is presented [1]. The CMOS chip, when combined with external inphase/quadrature (I/Q) ADCs and appropriate software paves the road toward a monolithic programmable wireless transceiver for the above applications. In Section II, the prior work done in development of wide tuning range reconfigurable receivers is discussed motivating the choice of the architecture used in this study. Section III discusses the proposed architecture, and the circuit details are presented in Section IV. The measured results and performance comparison are presented in Section V. Section VI briefly describes future work to be done toward improvement of the current study. II. PRIOR WORK Achieving a large dynamic range over a 0–6GHz frequency range is one of the significant challenges in the VSA/SDR. Conventional radio receivers mitigate this challenge by utilizing a highly selective SAW filter or duplexer at the frontend [2]. Previously proposed SDR solutions require a frontend module [3] or extra baseband processing [4] to reduce the effect of interferences. For example, in [3], multiple selective surface acoustic wave (SAW) filters and a multithrow switch are used before the lownoise amplifier (LNA) [see Fig. 1(a)]. The SAW filter corresponding to the desired signal will be connected to the RF front end. Though this solution gives very high blocker rejection, it suffers from low level of integration and higher cost. Moreover, the number of desired bands is limited to the number of the SAW filters that are used in front. Another option is to use a tunable RF filter after the antenna, but implementing a highly selective lowloss RF filter is still an emerging technology, such as lowloss tunable microelectromechanical systems (MEMS) filter [see Fig. 1(b)]. If frontend filtering is absent, the direct downconversion scheme, often proposed for wideband reconfigurable receivers [3]–[5], is highly susceptible to outofband blockers and interferers due to harmonic mixing. In wireless systems, switching mixers are often used to reduce the sensitivity of amplitude 1The 100Hz lower limit, as mentioned in the title, is due to the lower cutoff frequency of the baseband due to the dc offset calibration, as explained later. If dc offset calibration is not required, the chip can support 0–6GHz frequency range.
00189480/$31.00 © 2012 IEEE
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Fig. 1. Interference filtering techniques for wideband reconfigurable receivers.
noise of the LO signal. Therefore, the RF signal gets multiplied with a squarewave LO. The interferers around the harmonics of the LO frequency are also downconverted to baseband on top of the desired signal. Since 0–6 GHz covers many decades of frequency range, even very highorder LO harmonics can cause severe performance degradation [6]. For a perfect square wave mixing, the 100th harmonic is just 40 dB below the fundamental. Any interferer at that harmonic that is 40 dB larger than the desired signal will cause severe degradation in the signaltonoise and interference ratio (SNIR). One way to alleviate this issue is to use harmonicreject mixer architectures [7], [8]. However, just to reject third and fifth harmonics, three phases have to be generated. Even with that, the seventh and ninth harmonics are still just around 20 dB below the fundamental tone. More so, producing highquality LO phases at gigahertz frequencies comes with its own overhead. One way to obtain different phases is to use a highfrequency (HF) LO followed by frequency dividers. For instance, divideby4 generates four phases assuming it has a 50% duty cycle LO. To cover dc–6 GHz, an LO that covers dc to 24 GHz and wideband frequency dividers are needed. Another way to obtain multiple phases is to use a wideband I/Q LO and the Cartesian combining scheme [9]. Wideband I/Q LO can be generated in different ways. For example, one can use a dc–12GHz oscillator followed by a wideband frequency divider to obtain an I/Q 0–6GHz LO. Another way is to use two 0–6GHz oscillators coupled to each other so as to produce quadrature phase between them [10]. One can also use quadrature generation circuitry, such as a multistage polyphase filter to produce I/Q LO. HF multiphase generation using an I/Q LO seems to be a more feasible option than the divideby4 method. However, the phase error and the gain error in I/Q generation and the error in combining will cause only limited harmonic rejection in harmonicreject mixers, especially at high frequencies. For example, phase accuracy of better than 1 is required to have at least 60dB harmonic rejection [11]. In certain scenarios, even this level of rejection might not suffice. Hence, complicated calibration schemes have to be used in order to ensure high performance [4]. The problem gets worse due to mismatch. Harmonicreject mixers only reject odd harmonics. Even harmonics become problematic due to the mismatches in the mixers [6]. To relax the requirement for harmonic reject mixing, RF tracking filters are often used before the direct downconversion mixer to filter
Fig. 2. Various scheme to improve the interference susceptibility of a wideband frontend of the reconfigurable receiver.
out outband interferers [7], [12]. However, RF tracking filters reported in these studies can only operate under a 1GHz range because they are implemented as activeor bandpass tunable filters. Moreover, they suffer from limited linearity and poor noise figure (NF). One would have to use an based topology to increase the operating frequency range and noise performance, which comes at a cost of large area. Apart from the harmonic mixing issue, the wideband directconversion architecture suffers from other various effects. For example, the blockers at near dc can directly leak to output. Closeby interferers cause degradation at baseband due to secondorder mixing that arise from secondorder nonlinearity in the mixers. Amplitude modulated signal can also cause interference at baseband due to secondorder nonlinearity in the mixer. Hence, large blockers away from the desired signal should be eliminated at least before the mixer. Furthermore, a wide tuning range direct downconversion receiver will require a frequency synthesizer, which should cover multiple decades of frequency range. A twostep dual up/down conversion heterodyne scheme, commonly used in wideband cable and digital broadcast TV tuners [13]–[15], is a better choice for interference mitigation in multidecade wireless receivers. Without any interference filtering after the antenna, the frontend wideband LNA’s linearity becomes a critical bottleneck for performance of a reconfigurable wideband gigahertz receiver. One solution to improve the linearity of LNA is to use nonlinearity cancelation by using an auxiliary path [see Fig. 2(a)] [16], [17]. However this solution requires gain and phase matching between two paths over a wide range of frequency. Moreover, the cancellation is achieved only for low input power and the high thirdorder intermodulation intercept point (IIP3) cannot be obtained for strong interferes. Another way to avoid interference is to extract all the interferers using a secondary path and then subtract it from the output of the frontend LNA [see Fig. 2(b)] [18]. Again, this solution requires phase and gain matching between two paths at all the frequencies where the interferers are present. Another solution that filters the blockers is to use the impedance transfer characteristic of the passive mixer [see Fig. 2(c)]. A passive mixer transfers the highly selective filter transfer function at
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Fig. 3. Simplified block diagram of the implemented 0–6GHz reconfigurable VSA and SDR.
its baseband output to its RF input [4]. However, a passive mixer requires current input, which is obtained by to conversion, which eventually limits the linearity. Moreover, frequencytranslationbased filtering is still susceptible to interference close to LO harmonics. Compared with offchip SAW filtering, this scheme also requires lower LO phasenoise floor. Another method to relax the linearity of the frontend is to split the LNA in different bands each optimized for the blockers present in that band [see Fig. 2(d)] [3]. A high linearity switch connects antenna to either of the LNA. Since none of these solutions are optimal, an effective frontend linearity solution could be combination of all the above schemes. As shown in Section III, for the prototype design, we chose the bandsplitting solution.
Fig. 4. Block diagram of RF LNA.
III. PROPOSED ARCHITECTURE In this study, a twostep updown conversion heterodyne scheme, benefiting from an extremely wideband integrated frequency synthesizer, is used to achieve a 0–6GHz band of operation with wideband interference robustness, while eliminating the need for an offchip frontend filter. A simplified block diagram is shown in Fig. 3. A wideband 6–12GHz frequency synthesizer upconverts the desired frequency channel to a fixed 6GHz IF. Image signals corresponding to the 0–6GHz frequency band fall within 12–18 GHz and are easily filtered by the frontend LNA or an optional external 6GHz lowpass filter (LPF). A 6GHz I/Q directconversion receiver is then used to bring the desired band to baseband or low IF. In order to meet the coexistence dynamic range requirement, the frontend LNA (RF LNA) is split into two, a lowfrequency (LF) LNA covering approximately dc–1.4 GHz, and an HF LNA covering approximately 1.3–6 GHz, as shown in Fig. 4. The HF LNA includes a thirdorder elliptical filter at its input to reject the typically strong LF signals (e.g., broadcast radio and TV). The frontend also includes a 0–6GHz programmable attenuator to accommodate extremely large signals at the expense of reduced sensitivity. A highly linear lowloss ( 0.5 dB) RF switch following onchip electrostatic discharge (ESD) protection circuitry at the frontend selects either of the LNAs or the attenuator. Custom ESD protection circuitry utilizing isolated well diodes enable over 3V input RF swing.
Fig. 5. Circuit schematic of the LF LNA and its corresponding high linearity bandselect switch.
IV. CIRCUIT LEVEL IMPLEMENTATION OF THE SOFTWARE PROGRAMMABLE RECEIVER A. RF LNA The RF LNA is the frontmost block of the receiver chip in Fig. 3. The LNA should be able to support any RF input from dc to 6 GHz. Given this broadband requirement, it becomes essential that this block can provide acceptable performance in the presence of blockers and interferers. In general, the signals at low frequencies (megahertz range) are stronger, especially the broadcast radio and TV signals. Hence, the LNA is split into two bands, the LF (0–1.4 GHz) and HF (1.3–6 GHz). The HF LNA has a thirdorder input elliptical filter to reject large signals (e.g., broadcast radio and TV). The RF LNA can potentially receive very large signals that can easily compress the amplifier. Hence, it includes an additional mode where it provides attenuation rather than amplification. Using this mode, the overall linearity of the system can be improved at the cost of reduced
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Fig. 6. Circuit schematic of the HF LNA and its corresponding highlinearity bandselect switch.
sensitivity. In fact, most commercial HF spectrum analyzers obtain high linearity by using this method of attenuation in the beginning [19]. The overall block diagram of RF LNA is shown in Fig. 4. Either of the LF LNA, HF LNA, or programmable attenuator paths are chosen using highlinearity lowloss RF switches in the beginning. The RF ESD circuitry at the input uses isolated well diode along with regular ESD diodes to allow large swing (3 V) at the input without compression. The RF ESD are designed to protect the chip in the event of 500V human body model (HBM) ESD. The circuit schematic of the LF LNA and its corresponding switch are shown in Fig. 5. The high linearity switch is obtained by using two bulkconnected triplewell transistors. The bulk node is connected to ground using a large resistance. This prevents forward biasing of drain–bulk or source–bulk diodes and enhances the compression point [20]. Further improvement in linearity is obtained by biasing the RF inputs, RFIN and RFIN , to 0.5 V. The switch has less than 0.5dB loss in the band of interest and has input compression point of about 15 dBm. The LF LNA is a common source differential pair with cascode transistors and resistive load. Input matching is obtained by using resistive feedback. The tail current is three bits controllable with current varying from 0 to 19.5 mA with 11 mA of nominal current. The simulated nominal gain for the LF LNA is about 18 dB and NF is less than 4 dB within a 0–1.4GHz range. The simulated output referred is about 5 dBm. The simulated is less than 5.5 dB. The circuit schematic of the HF LNA and its corresponding switch are shown in Fig. 6. The linear bandselect switch is similar to that of the LF LNA with an exception of an additional inductor . The inductor is used to enhance the bandwidth of operation [20]. At the input of the HF LNA, there is a thirdorder elliptical filter composed of inductors , , and and a 1.2pF capacitor. The filter has a bandpass response from 1.3 to 6.5 GHz. The values of the filter component are chosen to provide differential input impedance of 100 for output impedance of 100 . Similar to the LF LNA, the gain stage is
a cascoded common source differential pair. However, the load includes an inductor for bandwidth enhancement through shunt peaking. The resistive feedback from output to input of common source differential pair provides approximately 100 of differential impedance seen at the input. The accoupling capacitor of 13 pF allows for biasing the gate of M1 through resistor dividers. The current bleeding resistor between M1 and M2 ensures that M1 is in the proper operating region for different process corners of resistors and transistors. The capacitors used in implementation of the HF LNA are dual metal–insulator–metal (MIM) capacitors. The nominal current consumption is 11 mA from 1.5 V. The simulated nominal gain for the HF LNA is about 17 dB and NF is less than 6.3 dB within the 1.3–6.5GHz range. The rejection due to the input bandpass elliptical filter is about 30 dB at 100 MHz. The simulated output referred is about 5.2 dBm. The simulated is less than 9.5 dB. The circuit schematic for the frontend wideband programmable attenuator is shown in Fig. 7. The attenuator is an R–2R network to implement variable attenuation in steps of 6 dB. The attenuator can be switched on by controlling switches to . By switching on either of switch to , different values of attenuation from 2 to 26 dB in steps of 6 dB can be achieved. For example, when B1 is high, while B2–B5 are low, the input to output loss in the first attenuation path will be 2 dB. The majority of this 2dB loss is due to the less than unity gain of the pMOS source follower. Similarly, if B2 is ON while other control bits are OFF, the total attenuation from input to output will be 8 dB. The inductors in the RF attenuator are used for enhancing the bandwidth to 6 GHz. The pMOS source follower is biased through the dc voltages on inputs RFIN and RFIN , which, as mentioned earlier, are kept at 0.5 V. With this biasing, the source follower nominally draws 8 mA from 1.5 V. The switches at the input side are all designed using triplewell transistors to achieve floating bulk for high linearity, as explained earlier. Since, the first path switch sees the largest signal, the switch is designed using a triplewell
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Fig. 7. Circuit schematic of the frontend wideband programmable attenuator.
thickoxide transistor to further boost the linearity. The 3dB bandwidth of the attenuator is 6.5 GHz. The NF varies from 10 to 33 dB depending on the amount of attenuation. The simulated input referred dB is greater than 10 dBm for all attenuation setting. The simulated is less than 8.5 dB. B. RF Mixer The RF mixer is implemented using a current commuting architecture (Fig. 8). The RF mixer takes the RF outputs of the three parts of the RF LNA (HF LNA, LF LNA, and the frontend wideband programmable attenuator) and optional external LNA outputs (EXTIN and EXTIN ), and chooses one of the them using a current mode logic (CML) multiplexer formed by nMOS differential cells. The linearity of the cells is improved by resistive degeneration. The external LNA outputs are envisioned to enable bypassing the onchip RF LNA and using an external LNA if desired. The nMOS differential pairs for the HF CML, ATTN CML, and EXT CML have a tail current formed using nMOS with 5.2mA nominal current. The tail current can be varied from 0 to 9.1 mA using three bits. The nMOS differential pair of the LF CML is biased by the output dc voltage of the output of LF LNA. Due to the resistive degeneration used in the nMOS differential pair, the current and large signal transconductance is well controlled. Nominally, the total current for nMOS differential pair for LF CML is 8 mA. The output of the RF mixer is tuned at 6 GHz using an tank. The switched capacitors provide tuning for the output center frequency in case of process variations. The switched resistors provide variable gain for the RF mixer. With the LF CML activated, the RF mixer has simulated gain from 8 to 2 dB in four steps and 3dB bandwidth of about 2 GHz at the maximum gain setting. The
NF is about 5.7 dB and the simulated input referred 1dB compression point is greater than 1 dBV. When the HF CML is activated, the RF mixer achieves gain from 9.5 to 0.5 dB in four steps and 3dB bandwidth of about 5 GHz at the maximum gain setting. The simulated NF is 7.7 dB and input referred 1dB compression point is greater than 1 dBV. The current consumption in either mode is about 15 mA from a 1.5V supply. C. IF LNA and IQ IF Mixer The circuitlevel schematic for the IF LNA and IF mixer is shown in Fig. 9. The IF LNA has two differential pair sections corresponding to two different gain settings. The low gain section, formed by an M2/M2c differential pair, is designed for high linearity by using inductive degeneration. The tail currents for both paths are controlled using three bits. The “Gain Cntrl” bit selects either the high gain or the low gain path by switching the corresponding tail current ON/OFF. The output load of the IF LNA consists of a tuned load nominally tuned at 6 GHz. The center frequency of this tuned load section can be changed by approximately 350–600 MHz to accommodate for the process variations. The IF LNA’s load also includes a 1bit controllable resistive part that is switched ON at the low gain setting. The output of the IF LNA is ac coupled to I/Q IF mixer. Fig. 9 shows the circuitry for the IF mixer (I section). The circuitry for the IF mixer section is similar. The IF mixer is chosen to be a passive mixer to minimize the effect of the flicker noise at the output. In passive mixers, the RF and LO port devices of the mixer do not carry any dc current due to the accoupling capacitors. Hence, the mixer will have a low flicker noise component at its output [21], [22]. The RF port acts as a transconductor cell that takes the IF LNA output and converts it into an RF current
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Fig. 9. Transistor level schematic for the IF LNA and IF mixer.
is greater than 1 dBV. The simulated output thirdorder compression point is 10 dBV. The total current consumption of the IF LNA and mixer combination is 50 mA from 1.5 V. D. Baseband Variable Gain Amplifier (VGA) and Filter
Fig. 8. Circuit schematic of RF mixer.
at 6 GHz. To improve the linearity of the cell, inductive degeneration using inductor L3 is used. An inductor L4 is used to improve the common mode rejection for the IF mixer. The RF current produced by the cell is then mixed with the LO2 at 6 GHz using a current commutating switching pair. The LC filter tuned at 6 GHz in between the switching devices and the cell helps to absorb nonfundamental components of the RF current, and further improving the linearity of the IF mixer. The baseband transimpedance amplifier (TIA) at the output converts the downconverted current into a proper baseband voltage. The smaller the input impedance of the TIA, the better linearity will be of the IF mixer. Thus, the gain of the TIA operational amplifier (opamp) should be large. After the IF current is mixed with LO2, the resulting current will not only have a baseband component, but also, many other components at higher frequencies due to the LO2 harmonics. In order to absorb these HF components and prevent them to go to TIA’s output, a capacitor is placed across the TIA’s input. This capacitor helps to further reduce the input impedance at high frequencies. The overall simulated gain of the IF LNA and mixer combination is 2 dB in the lowgain mode and 18.7 dB in the highgain mode. The simulated NF is 14 dB. The simulated output
The circuit diagram for the VGA and the tunable baseband filter is shown in Fig. 10. A leapfrog topology is adopted. Bandwidth of all the blocks are controlled together so as to achieve an overall bandwidth tuning from 0.5 to 11 MHz, which is equal to 1–22MHz doublesideband bandwidth for baseband channel bandwidth. The gain of each section can be controlled independently. The opamps use a onestage folded cascode amplifier with a commonmode feedback that sets the output commonmode voltage to be at half of the VDD. In general, stronger opamps are used in the front of the chain for smaller noise. The first three highgain sections of the VGA and tunable filter have dc offset cancellation feedback loops. DC offset cancellation is required to avoid saturating the VGA at its highest gain setting. The three feedback dc offset cancellation blocks can be independently turned ON or OFF. It is desirable to have the low cutoff frequency, due to the dc offset cancellation loops, to be as small as possible (less than 1 kHz). However, the smaller this cutoff, the larger the settling time for the VGA is, which becomes critical when fast reconfiguration of the system is required. Hence, in the VGA and the tunable baseband filter of Fig. 10, there is an option to change value of the low cutoff frequency in two settings to either 0.5 or 50 kHz. There is also an option of using an external dc offset cancellation. The simulated performance summary for the VGA and tunable filter is given in Table I. E. First Local Oscillator and Synthesizer (LO1) The low phasenoise requirement often mandates an LCtype oscillator as opposed to inductorless oscillators (e.g., RCbased
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Fig. 10. Opamp level block diagram for the VGA and tunable baseband filter.
TABLE I SUMMARY OF SIMULATED PERFORMANCE OF BASEBAND VGA AND TUNABLE FILTER
THE
Fig. 11. Simplified block diagram for LO1.
ring oscillators). In order to reduce the chip size, ideally a single inductor in combination with either switched capacitors or switched varactors should be used to cover the desired frequency range. For a moderate of 20 at 10 GHz, either the switched capacitors or switched varactors has a to ratio of about 3. However, including the parasitics of all the interconnections and the loading of the negative cell, the ratio becomes less than 2. At higher frequencies, the parasitics become more dominant and the ratio reduces further. Hence, a combination of four tanks have to be used to cover this range. Common centric inductors can be laid out to reduce the required chip area [23], [24]. However, as mentioned in these papers, the coupling between the inductors have to be minimized to avoid parasitic modes of oscillations and increase
the effective . In the present design, the coupling of four concentric inductors has to be minimized. Electromagnetic simulations indicate that a very large area has to be used to minimize the coupling of concentric inductors. From electromagnetic simulations, it is found that placing the four inductors side by side with a separation of about a diameter between them keeps the coupling between the nearest inductors to be less than 3%. In fact, from simulation, it is seen the sidebyside layout occupies less area for given inductor values compared with concentric layout. Additionally, the resonator formed using sidebyside placed inductors has a larger peak magnitude than the resonator formed using coupled inductors. It is well known that having large resonance peak gives large amplitude of oscillations and often better phase noise [25]. The simplified block diagram for LO1 is shown in Fig. 11. The LO1 is designed to produce output from 6.144 to 12.287 GHz in steps of 1 MHz (with a phaselocked loop (PLL) reference of 0.5 MHz). The voltagecontrolled oscillator (VCO) of the LO1 can operate from 5.7 to 12.8 GHz. VCO can be coarse tuned using digital bits and fine tuned using an analog control voltage. The calibration scheme based on a frequency comparator is used to coarse tune the VCO and to determine the digital bits such that the VCO frequency will be within 125 ppm of the desired frequency. Once the bits for a particular desired frequency are determined, the bits will be
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stored in the onchip RAM for future use. The bits are stored for VCO frequency from 6.144 to 12.287 GHz in steps of 16 MHz (assuming calibration reference of 0.5 MHz). There is also a provision to set the coarse bits externally if desired. For frequencies in between the 16MHz steps, fine tuning is used. For fine tuning and controlling the analog control for the VCO, a PLL is used to lock the VCO to external reference. The main VCO is composed of four oscillators covering measured frequency range from 5.54 to 7.42, 7.28 to 9.34, 9.39 to 11.36, and 11.28 to 13.15 GHz, respectively. The inductors of the different oscillators are laid out as octagonal inductors on the top two metal layers stacked together. The oscillators are placed far enough to limit the coupling between the inductors to less than 1%. The VCO is coarse tuned by 14 bits. The 14 bits are split into two, six, and six bits. The two MSBs are 2–4 decoded and to select the output of one (desired) oscillator. The next six bits are used to control the binary decoded switched varactors in each of the four oscillators. Finally, the six LSBs are thermometrically decoded to obtain 64 bits, which are then used to control 64 equally sized switched varactors in each of the four oscillators. For fine tuning, the control comes from the PLL’s loop filter output. The inductance of Oscillator 1–4 of LO1 is 0.2, 0.2, 0.15, and 0.15 nH, respectively, with of about 20 in their desired frequency range of operation. A pMOS crosscoupled pair is used for better flickernoise performance compared to an nMOS crosscoupled pair. The effective for crosscoupled pMOS for oscillator 1 is 132 mS, for oscillator 2 is 91 mS, for oscillator 3 is 107 mS, and for oscillator 4 is 90 mS. The 4to1 CML multiplexer is for combining the outputs of the four oscillators. The simulated phase noise of the four oscillators within their respective frequency range of operation varies from 105 to 115 dBc/Hz at 1MHz offset. The simulated VCO gain of the four oscillators within their respective frequency range of operation varies from 50 to 200 MHz/V. The PLL is a standard TypeII loop. The capacitances in the loop filter are 4bit controllable. In the default state, the maximum capacitance and charge pump current are chosen resulting in loop bandwidth of about 100 kHz for of 100 MHz/V. One important feature that the current architecture of LO1 allows for is the spectrum measurement in frequency hopping mode. Unlike in conventional spectrum analyzers, it is possible to sweep two or more disjoint frequency sets lying anywhere in the 0–6GHz range without the need to measure the spectrum for undesired frequencies. This saves the spectrum measurement sweep time considerably. F. Second Local Oscillator and Synthesizer (LO2) A simplified block diagram is shown in Fig. 12. The LC oscillator’s capacitor is five bits controllable and is kept nominally at the mid value. The inductance of LO2 is 0.15 nH. The oscillator consumes 40 mA and achieves phase noise of 110 dBc/Hz at 1MHz offset when running at 12.24 GHz. The divideby768 is created by eight CMOS divideby2 in series followed by a CMOS divideby3. Other PLL blocks, like phasefrequency detector, charge pump, and loop filter, are the same as that used in LO1. The divider after the CML multiplexer generates I and Q output at 6 GHz.
Fig. 12. LO2 block diagram.
Fig. 13. Detailed block diagram of the implemented 0–6GHz reconfigurable VSA and SDR.
Fig. 14. Chip microphotograph.
G. Detailed Block Diagram of Proposed System Fig. 13 shows the detailed block diagram of the proposed system including the chip control and ESD protection. V. MEASUREMENT RESULTS A. Chip Fabrication The chip is implemented in an IBM 0.13 m CMOS process. The inductors are laid out in the top two metal layers. The top metal layer is an aluminium layer with 4 m thickness. The
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Fig. 17. Measured coarse tuning curve for LO1.
Fig. 15. Chip packaged in 44pin QFN package.
Fig. 16. RF and the DAQ board connected together to measure the 0–6GHz wideband reconfigurable receiver.
layer below is a copper layer with 3 m thickness. The separation between the two layers is 4 m. The chip microphotograph of the 0–6GHz wideband reconfigurable receiver is shown in Fig. 14. The measurement are performed on the RF chip, which is either directly wirebondeded on the board or packaged on a 44pin RF quad flat no (QFN) leads package (Fig. 15). The package is connected to the board using an HF elastomer socket [26]. B. Receiver Measurement Setup The baseband analog output of the 0–6GHz reconfigurable receiver is collected by a custom data acquisition (DAQ) board, which digitizes the analog output. The digitization is done by a dualchannel 12bit ADC running at 8 MS/s. The DAQ board also programs the RF board to select different gains, bandwidths, frequencies of operation, bias settings, and more. The DAQ board, on the other hand, is controlled by an inhouse
Fig. 18. Measured and simulated phase noise of freerunning LO1 for the lowest band of Tank 1 and highest band of Tank 4.
software2 running on a personal computer (PC). The digitized baseband output of the receiver is stored on a PC for further processing. The connection between the DAQ board and PC is through a USB 2.0 interface. Due to the limitation of the data delivery at USB 2.0 speed (ideally 480 MB/s), ADC speed is kept at 8 MS/s, though it can be higher if the interface limit is not there. The PC also controls the measurement instruments through a general purpose interface bus (GPIB). Fig. 16 shows the RF board connected to the DAQ board. C. Synthesizer Measurement Fig. 17 shows the measured coarse tuning curve of the LO1.3 The measured phasenoise plot for the lowest band of Tank 1 of freerunning LO1 and the highest band of Tank 4 of freerunning LO1 are shown in Fig. 18. The simulated phase noises are also 2A
Graphical User Interface (GUI) is implemented using MATLAB.
3For LO1 characterization, the LO1 signal was picked up with a loop antenna.
The measurements for LO1 have been performed onchip, which is wirebonded on the board.
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Fig. 19. Locked spectrum of LO1 when it is locked at 6.144 GHz for two different settings of coarse capacitance. For the righthand setting, the reference spur is reduced at the cost of increase in closein phase noise.
plotted in the same graph. The phase noise is measured using an Agilent E4448A spectrum analyzer with an external amplifier. Usually the phasenoise measurement at low offsets is not accurate because of the instability in oscillation frequency due to the environmental changes around the measurement setup (e.g., temperature). The phasenoise measurement at high offsets is limited by the noise floor of the phasenoise measurement setup. Since the division ratio of the feedback divider varies from 12288 to 24574, when LO1 is locked to the PLL reference, the phase noise of LO1 within the PLL loop bandwidth will be about 80 dB higher than the phase noise of PLL reference. Therefore, it becomes very important to use a very low noise reference so that the locked LO1 has a clean and expected locked profile. The reason for using such a high division ratio is due to the requirement of 1MHz steps for LO1 and choice of using an integer PLL. In future revisions of this study, it is expected that the division ratio will be reduced by changing the topology of the PLL for LO1. For example, multiloop or fractional PLLs can be used to optimize the division ratio and LO1 step size. For the current work, a very low noise 4MHz crystal reference is used. A 4MHz external crystal reference gets divided by eight internally providing 500kHz reference to the PLL. Fig. 19(a) shows the spectrum of the locked LO1 when it is oscillating at 6.144 GHz. Large spurs at offset of integer multiples of 500 kHz are clearly visible. The main probable reasons for the spurs are as follows: 1) Large VCO gain (KVCO) of about 100 MHz/V;
2) poor isolation between the digital operating at 500 kHz and the analog control line, as discussed previously; 3) mismatches in the PLL charge pump, which could be reduced by better design of the charge pump (and loop filter) and allowing for calibration of the mismatches. In general, the KVCO is highest when the analog control voltage of LO1 is biased around half of the VDD. The varactor has maximum sensitivity around this point. When the PLL is working, the bias point for the analog control voltage is determined by the desired frequency and the coarse capacitance value. For a given frequency, it is possible to change the bias point by changing the coarse capacitance value as long as the PLL does not come out of lock. As can be seen from Fig. 19(b), by using different settings for the coarse capacitance bank, the spurs around LO1 at 6.144 GHz are reduced by about 10 dB compared to the spectrum in Fig. 19(a). However, a zoomed look at both spectrums show that within the loop bandwidth, the phase noise of the spectrum in Fig. 19(a) is better than that in Fig. 19(b). Thus, there is a tradeoff between spurs rejection and closein phase noise. The spurs reduce when the KVCO decreases, which, in turn, reduce the PLL loop bandwidth, and hence, the closein phase noise degrades. Also seen in the spectrum is the presence of tones around 55kHz offset, the source for which is unknown currently. The coarse capacitance tuning for LO2 is shown in Fig. 20 for three different chips. The tuning curve measurements for LO2 are performed on the packaged chips. Due to overestimation of
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Fig. 20. Measured coarse tuning curve for LO2 for three different chips which were wirebondeded on an HF QFN package.
the layout parasitics, the simulated results are at a lower frequency than the measured results. Moreover, since the division ratio for LO2 is fixed to 24 574, the originally envisioned PLL reference frequency of 500 kHz cannot be used, which would correspond to LO2 center frequency of 12.288 GHz. Since LO2 cannot oscillate at 12.288 GHz for any coarse capacitance setting, as seen from Fig. 20, a higher reference frequency must be used. One such crystal reference frequency is 4.416 MHz, which gets divided by 8 to provide the reference for the PLL. The LO2 center frequency corresponding to this reference is 13.566 GHz. LO2 have similar issues of high division ratio and large reference spur as that are faced in LO1. D. Signal Path Measurement To measure the RF chain performance, the RF input is generated from a signal generator (Agilent E8257C or Agilent E4433B). DC blocks are connected to the RF inputs of the chip to avoid dc current going to the chip. LO1 and LO2 of the chip are tuned in such a way that the baseband output is at 100 kHz, which is then measured using the DAQ and PC. The measured and simulated receiver gains versus frequency for the cases when the frontend LF LNA, HF LNA, and programmable attenuator ( 2dB attenuation setting) are enabled are shown in Fig. 21(a). The RF gain is lower than the simulated value, which predicts the RF chain gain (differential) to be 86 dB. One reason for this 18dB difference is that LO1 and LO2 have to be operated at higher frequency than the frequency used in simulations for the reasons mentioned earlier. Therefore, the RF chain blocks have to operate at frequencies for which their gain is not maximum. From simulations, the operation at higher frequency accounted for 12dB gain reduction. The reasons for the remaining 6dB difference is yet to be understood. Moreover the gain rolloff is faster for measured gains, which most probably is due to the effect of the package and board not considered in simulations. Fig. 21(b) shows the transfer function of the receiver gain when the attenuation path is enabled for different attenuation settings. The measured and simulated baseband transfer functions for different bandwidth settings are shown in Fig. 22. The transfer function was measured indirectly by tuning the RF input frequency while keeping the LO1 and LO2 frequency the same. Only the lower few bandwidth settings could be measured due to
Fig. 21. (a) Measured (solid) and simulated (dotted) receiver gain versus frequency for different RF paths. (b) Measured receiver gain versus frequency when the frontend programmable attenuator path is enabled plotted for different attenuation settings.
Fig. 22. Measured and simulated baseband VGA FILTER transfer function for some of the bandwidth settings.
the sampling rate limitation of the DAQ board (8 MS/s). Fig. 23 shows the measured transfer function for some of the gain settings of the baseband VGA. Fig. 24 shows the measured output signaltonoise ratio (SNR) in the presence of interferers at different frequencies when the receiver is tuned at 2 GHz at maximum gain setting. Even with interferers as large as 6 dBm, the output SNR does not degrade significantly. The figure also shows the inband and cochannel linearity measurements of the receiver.
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Fig. 23. Measured baseband VGA FILTER transfer function for some of the gain settings at the lowest bandwidth setting. Fig. 25. Measured spectrum using the CMOS chip and a commercial spectrum MHz for both systems. No gain or phase calibration analyzer with is performed for the CMOS chip for this measurement.
Fig. 26. Current consumption of chip blocks.
F. Performance Comparison Table II presents the detailed measured specifications of the chip in comparison with recently reported wideband SDRs. One major advantage of this scheme is that it does not require any offchip filters or complicated baseband circuitry to reject the LO harmonics or interferences. G. System Performance and Power Consumption Discussion
Fig. 24. (a) Measured output SNR in presence of singletone blocker when MHz. (b) RFchain largesignal measurements. The receiver is tuned at 2 GHz and at maximum gain setting.
E. Spectrum Measurement In order to demonstrate the spectrum measurement capability in the presence of various realistic interferers, a 12.5Ms/s quadrature phaseshift keying (QPSK) signal at 822 MHz is added to the received signals from a wideband antenna. Fig. 25 shows the measured spectrum using the CMOS chip in comparison with a commercial benchtop spectrum analyzer and setup used for measurement.
The measured sensitivity of this chip is worse than the simulated results by 12 dB. This is mostly traced back to the reduced gain of the receiver chain. This is not fundamental to the chip architecture and can be easily corrected in future implementations. The power consumption of the chip is rather high and mostly dominated by the LO circuitries (Fig. 26). Simple calculations indicate that an optimized design of the LOs would reduce the required power to about onethird. A modified chip with optimized LOs is expected to consume about 200 mA from a 1.8V supply. Implementation in better technology nodes (e.g., 45 nm) is likely to further reduce the power consumption as well. VI. SYSTEM INTEGRATION AND FUTURE WORK The wireless chip has been integrated together with the microcontroller and DAQ chips in a USB dongle form (Fig. 27).
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TABLE II PERFORMANCE COMPARISON
OF
SDR
presented in Section V. The version of the wireless chip presented in this paper is a mere proofofconcept version and does not represent the true performance capability of this study, specifically in satisfying existing wireless standards for an SDR application. In [27], a hardware implementation of an RF sensor using the CMOS chip presented in this paper is covered. The next generation of the CMOS chip, which is currently in development, relies on a new synthesizer architecture, which significantly reduces power consumption. In addition, a complete wideband transmitter path is added to enable a wide range of existing and emerging wireless applications with a singlechip 0–6GHz softwaredefined transceiver. VII. CONCLUSION
Fig. 27. SDR chip, DAQ, and microcontroller integrated in a USB dongleform factor.
The measurements performed on the USB dongle system as a spectrum analyzer are close to the multiboard measurements
A dual up/downconversion heterodyne architecture has been used to implement a wideband 0–6GHz monolithic softwareprogrammable wireless receiver in 130nm CMOS without requiring offchip filters. Measurements of a first silicon implementation indicate the advantages of this scheme compared with direct downconversion receivers for multidecade SDR solutions. Signalpath linearity and noisefigure, LO phasenoise and spurious tones, and onchip coupling
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between several blocks are key considerations in determining the performance of a complete SDR solution. ACKNOWLEDGMENT T. Mercer, University of Southern Californa (USC), Los Angeles, assisted with layout and verification of baseband blocks. C. Du, T. Rajabioun, and M. Varza, all with the University of Southern California, Los Angeles, helped with test and measurement setup and chip programming. REFERENCES [1] A. Goel, B. Analui, and H. Hashemi, “A 130 nm CMOS 100 Hz 6 GHz reconfigurable vector signal analyzer and softwaredefined receiver,” in IEEE RFIC Symp. Dig., Jun. 2011, pp. 391–394. [2] R. Pullela, “An integrated closedloop polar transmitter with saturation prevention and lowIF receiver for quadband GPRS/EDGE,” in Int. SolidState Circuits Conf. Dig., Feb. 2009, pp. 408–409. [3] V. Giannini et al., “A 2mm 0.1–5 GHz softwaredefined radio receiver in 45nm digital CMOS,” IEEE J. SolidState Circuits, vol. 44, no. 12, pp. 3486–3498, Dec. 2009. [4] Z. Ru et al., “Digitally enhanced softwaredefined radio receiver robust to outofband interference,” IEEE J. SolidState Circuits, vol. 44, no. 12, pp. 3359–3375, Dec. 2009. [5] G. Cafaro et al., “A 10 MHz–4 GHz direct conversion CMOS transceiver for SDR applications,” in Proc. SDR09 Tech. Conf. and Product Expo., Dec. 2010, Session 2.1. [6] B. Razavi, “Cognitive radio design challenges and techniques,” IEEE J. SolidState Circuits, vol. 45, no. 8, pp. 1542–1553, Aug. 2010. [7] S. Lerstaveesin et al., “A 48–860 MHz CMOS lowIF directconversion DTV tuner,” IEEE J. SolidState Circuits, vol. 43, no. 9, pp. 2013–2024, Sep. 2008. [8] J. A. Weldon et al., “A 1.75GHz highlyintegrated narrowband CMOS transmitter with harmonicrejection mixers,” in Int. SolidState Circuits Conf. Dig., Feb. 2001, pp. 160–161. [9] H. Wang and A. Hajimiri, “A wideband CMOS linear digital phase rotator,” in IEEE Proc. CICC, Sep. 2007, pp. 671–674. [10] A. Rofougaran et al., “A 900MHz CMOS LC oscillator with quadrature outputs,” in Int. SolidState Circuits Conf. Dig., Feb. 1996, pp. 392–393. [11] A. Goel, “Integrated multiband and wideband reconfigurable wireless receivers,” Ph.D. dissertation, Dept. Elect. Eng.–Electrophys., Univ. Southern California, Los Angeles, CA, 2010. [12] F. Gatta et al., “An embedded 65 nm CMOS baseband IQ 48 MHz–1 GHz dual tuner for DOCSIS 3.0,” IEEE J. SolidState Circuits, vol. 44, no. 12, pp. 3511–3525, Dec. 2009. [13] M. Dawkins et al., “A singlechip tuner for DVBT,” IEEE J. SolidState Circuits, vol. 38, no. 8, pp. 1307–1317, Aug. 2003. [14] C. Ling et al., “A lowpower integrated tuner for cable telephony applications,” in Int. SolidState Circuits Conf. Dig., Feb. 2002, pp. 330–331. [15] C. Heng et al., “A CMOS TV tuner/demodulator IC with digital image rejection,” IEEE J. SolidState Circuits, vol. 40, no. 12, pp. 2525–2535, Dec. 2005. [16] V. Aparin and L. E. Larson, “Modified derivative superposition method for linearizing FET lownoise amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 2, pp. 571–581, Feb. 2005. [17] W. H. Chen et al., “A highly linear broadband CMOS LNA employing noise and distortion cancellation,” IEEE J. SolidState Circuits, vol. 43, no. 5, pp. 1164–1176, May 2008. [18] H. Darabi, “A blocker filtering technique for SAWless wireless receivers,” IEEE J. SolidState Circuits, vol. 42, no. 12, pp. 2766–2773, Dec. 2007. [19] Agilent Technol., “Agilent spectrum analysis basics,” Agilent, no. 150, pp. 10–43, Aug. 2006. [20] Y. Jin and C. Nguyen, “Ultracompact highlinearity highpower fully integrated DC–20 GHz 0.18 m CMOS T/R switch,” IEEE Trans. Mircow. Theory Tech., vol. 55, no. 1, pp. 30–36, Jan. 2007.
[21] W. RedmanWhite and D. M. W. Leenaerts, “ noise in passive CMOS mixers for low and zero IF integrated receivers,” in 2001 Proc. Eur. SolidState Circuits Conf., Sep. 2001, pp. 41–44. [22] S. Zhou and M. C. F. Chang, “A CMOS passive mixer with low flicker noise for lowpower directconversion receiver,” IEEE J. SolidState Circuits, vol. 40, no. 5, pp. 1084–1093, May 2005. [23] Z. Safarian and H. Hashemi, “Wideband multimode VCO design using coupled inductors,” IEEE Trans. Circuits Syst., vol. 56, no. 8, pp. 1830–1843, Aug. 2009. [24] A. Goel et al., “A compact 6 GHz to 12 GHz digital PLL with coupled dualLC tank DCO,” in IEEE Symp. VLSl Circuits Tech. Dig., Jun. 2010, pp. 141–142. [25] A. Hajimiri and T. Lee, “A general theory of phase noise in electrical oscillators,” IEEE J. SolidState Circuits, vol. 33, no. 2, pp. 179–194, Feb. 1998. [26] “GHz QFN Socket User Manual” Ironwood Electron., May 2005 [Online]. Available: http://www.ironwoodelectronics.com/catalog/Content/Drawings/SGM.pdf [27] B. Analui, A. Goel, and H. Hashemi, “Wideband software programmable RF sensor using a monolithic softwaredefined receiver CMOS chip,” in Proc. Govern. Microsyst. Appl. Critical Technol. Conf., Mar. 2012, Session 3.2.
Ankush Goel (S’05–M’09) received the B.Tech. degree in electrical engineering from the Indian Institute of Technology Madras, Chennai, India, in 2003, and the M.S. and Ph.D. degrees in electrical engineering from the University of Southern California (USC), Los Angeles, in 2006 and 2010, respectively. From 2003 to 2004, he was an Analog Design Engineer with Texas Instruments Incorporated, Bangalore, India. In the summer of 2008, he was an Intern with the IBM T. J. Watson Research Center. He is currently a Member of Technical Staff with MediaTek, San Jose, CA. His research interests include highspeed analog and RF integrated circuits. Dr. Goel was the recipient of the USC Annenberg Fellowship (2007–2008) and the IEEE SolidState Circuits Society Predoctoral Fellowship (2008–2009).
Behnam Analui (S’97–A’05–M’06) received the B.S. and M.S. degrees from the Sharif University of Technology, Tehran, Iran, in 1998 and 2000, respectively, and the Ph.D. degree from the California Institute of Technology, in 2005. He was with IBM Research as a Student Intern, Luxtera Inc., where he was involved with CMOS photonics product development, and the California Institute of Technology, where he taught analog integrated circuits (ICs). He is currently with the University of Southern California (USC), Los Angeles, as a Researcher. Thus far, his focus has been on analog, highspeed, and RF electronics and optoelectronics.
Hossein Hashemi (S’99–M’03–SM’08) received the B.S. and M.S. degrees in electronics engineering from the Sharif University of Technology, Tehran, Iran, in 1997 and 1999, respectively, and the M.S. and Ph.D. degrees in electrical engineering from the California Institute of Technology, Pasadena, in 2001 and 2003, respectively. In 2003, he joined the Ming Hsieh Department of Electrical Engineering Electrophysics, University of Southern California (USC), Los Angeles, where he is currently an Associate Professor, Ming Hsieh Faculty Fellow, and CoDirector of the Ming Hsieh Institute. His research interest spans mathematics, physics, and realization of integrated electrical and optical systems. Dr. Hashemi currently serves on the Technical Program Committees of the IEEE International SolidState Circuits Conference (ISSCC) and IEEE Radio
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Frequency Integrated Circuits (RFIC) Symposium. He was the associate editor for the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS PART I: REGULAR PAPERS (2006–2007) and the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS PART II: EXPRESS BRIEFS (2004–2005). He was the recipient of the 2008 Defense Advanced Research Projects Agency (DARPA) Young Faculty Award, the National Science Foundation (NSF) CAREER Award, and the USC Viterbi School of Engineering Junior Faculty Research Award (2008). He was recog
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nized as a Distinguished Scholar for the Outstanding Achievement in Advancement of Engineering by the Association of Professors and Scholars of Iranian Heritage (2011). He was a corecipient of the 2004 IEEE JOURNAL OF SOLIDSTATE CIRCUITS Best Paper Award and the 2007 IEEE International SolidState Circuits Conference (ISSCC) Lewis Winner Award for Outstanding Paper.
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SingleChip Multiband EGPRS and SAWLess LTE WCDMA CMOS Receiver With Diversity Haolu Xie, Member, IEEE, Omid Oliaei, Senior Member, IEEE, Patrick Rakers, Member, IEEE, Rick Fernandez, Joan Xiang, John Parkes, Jim Riches, Member, IEEE, Richard Verellen, Mahib Rahman, Vivek Bhan, and Daniel B. Schwartz
Abstract—A singlechip multimode multiband receiver is designed and implemented in a 90nm CMOS process for fourthgeneration mobile platforms. The receiver includes nine primary lownoise amplifier (LNA) and five secondary LNA input ports, and supports longterm evolution (LTE)/WCDMA/ehanced general packet radio serve (EGPRS) standards for four gobal system for mobile communications bands, ten WCDMA bands, 14 frequency division duplex LTE band, and two time division duplex LTE bands. From antenna to RX digital signal processing output, the receiver achieves a typical 3dB noise figure for all standards and bands. The RF frontend includes a matching network with 12dB transducer gain, an inductively degenerated commonsource LNA, passive mixers driven by a 25% dutycycle local oscillate, and a current conveyor followed by a baseband filter. This receiver RF/analog frontend meets surfaceacousticwaveless linearity requirements for all LTE/WCDMA bands and employs digital calibration to adjust the baseband lowpass filter cutoff frequency, mixer image rejection, secondorder intermodulation intercept point performance and to perform inphase/quadrature equalization. Index Terms—Ehanced general packet radio serve (EGPRS), diversity, longterm evolution (LTE), multiband, multimode, reconfigurable radio, receiver, WCDMA.
I. INTRODUCTION
U
NIT SALES of smartphones have been growing faster than the overall market for cell phones, and the smartphone market is expected to grow over 20% annually over the next five years [1]. A low cost surface acoustic wave (SAW)less singlechip multiband longterm evolution (LTE)/WCDMA/ehanced general packet radio serve (EGPRS) reconfigurable receiver solution offers several market advantages. First, eliminating the interstage SAW filter and the external lownoise amplifier (LNA) between duplexer and receiver can greatly reduce the RF frontend board size, cost, and complexity. Second, supporting all radio bands can maximize the sales in the world. However, design of such lowcost SAWless singlechip multiband receivers poses significant challenges. In particular, the noise figure (NF), secondorder Manuscript received October 09, 2011; revised January 11, 2012; accepted January 12, 2012. Date of publication March 12, 2012; date of current version April 27, 2012. This paper is an expanded paper from the IEEE RFIC Symposium, June 5–10, 2011, Baltimore, MD. The authors are with Fujitsu Semiconductor Wireless Products Inc., Tempe, AZ, 85284 USA (email: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2187796
intermodulation intercept point (IIP2), thirdorder intermodulation intercept point (IIP3), local oscillate (LO) phase noise, voltagecontrol oscillate (VCO) frequency tuning range, and analogtodigital converter (ADC) signaltonoise ratio (SNR) and dynamicrange requirements need to be met for all standards and bands. Several papers in recent years have reported SAWless multiband multimode receivers based on different architectures. Reference [2] still uses a SAW filter to implement a multiband receiver. References [3] and [4] describe a receiver that eliminated the need for a SAW filter at the cost of a high NF and power consumption. In [5], the authors used an active TX selfinterference cancellation method to relax the receiver linearity requirement. This active cancellation technique increases the power consumption. The receiver discussed in [6] and [7] uses a lowpower reconfigurable baseband filter; however, the clockbased receiver architecture can exhibit spurious components that make it less attractive for wireless applications. Reference [8] describes a receiver using active mixers, and the reported IIP2 indicates it is more difficult to calibrate the IIP2 of active mixers. The proofconcept receiver discussed in [9] is the only reported multimode receiver targeting LTE applications thus far; however, the reported 6dB NF is significantly larger than the 3dB requirement. This paper reports a SAWless singlechip multimode multiband receiver with diversity. The receiver meets all LTE/WCDMA/EGPRS requirements and supports four global system for mobile communications (GSM) bands, 10 WCDMA bands, 14 LTE frequency division duplex (FDD) bands, and two LTE time division duplex (TDD) bands. Measurements show a typical NF of 3 dB for all standards and bands, better than 60dBm IIP2, and 3dBm halfduplex IIP3 in WCDMA and all LTE modes. II. RECONFIGURABLE RECEIVER SYSTEM LINEUP ANALYSIS The reconfigurable receiver block diagram is shown in Fig. 1. The RF duplex filter provides attenuation for outofband interferers, and thus, relaxes the linearity requirements for the LNA and mixer. The inductively sourcedegenerated LNA with digital gain control operates in current mode providing low noise, high dynamic range, and high linearity. The current commutating passive mixer with 25% duty cycle LO downconverts the RF signal to very low IF (VLIF) in the EGPRS mode or zero IF in WCDMA/LTE. Performance of the passive mixers is known to be a strong function of their load impedance [8], [9]. The mixer load is the baseband filter that generally exhibits frequencydependent input impedance. As a result, driving the baseband filters directly by the passive mixers may lead to an
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Fig. 1. Block diagram of the receiver for main and diversity receive paths.
asymmetric inband frequency response that degrades the error vector magnitude (EVM) performance. This problem can be circumvented by interposing a wideband currentconveyor (CC), with a nearly flat inband frequency response, between the passive mixers and the baseband filters. In addition, the low input impedance of the current conveyor helps minimize crosstalk between inphase (I) and quadrature (Q) channels and also improve the IIP2 and IIP3 performance [10]. After the CC, a biquad filter is used to sufficiently attenuate the outofband interferers in order to avoid any clipping at the ADC input. The filtered signal is fed into a variable gain amplifier (VGA), which also allows for coarse dc offset correction (DCOC) and provides further lowpass filtering using an additional pole. This stage provides sufficient gain for weak signals to meet the sensitivity requirements and enough attenuation for strong signals to prevent overdriving the ADC. The A/D output signal is digitally filtered and decimated to a lower sampling rate. The decimators are followed by a closedloop fine DCOC to reduce the dc offset to less than 1 mV within the allotted time. This is achieved using the appropriate bandwidth for the fine DCOC block for each mode. After fine DCOC, a digital downconversion mixer is used in EGPRS very low IF (VLIF) mode to bring the carrier frequency to dc. The VLIF architecture alleviates the baseband and VGA flicker noise problems. In WCDMA and LTE modes, a matched selectivity filter is used after fine DCOC to provide further attenuation of interferers to maximize the SNR. In secondgeneration (2G) mode, this filter compensates for inband signal amplitude droop and group delay and it also provides image rejection. In WCDMA and LTE modes, an I/Q signal equalizer is used to perform frequencydependent or frequencyindependent quadrature I/Q imbalance correction to improve the receiver EVM. After the equalizer, the next stages
are digital automatic gain control block, resampling block, and interfaces. The fractional resampling block resamples the digital signal to a multiple of the chip rate or symbol rate required by the modem. This makes it possible to use a single phaselocked loop (PLL) for the system clock in a multimode radio using several different ADC clock rates. The final output stage is the DigRF interface (Dig4G). Dig4G is designed for LTE high bandwidth mode or diversity mode and Dig3G is used for the other modes. Another important block, although not part of the receive path, is the onchannel received signal strength indicator (RSSI). The RSSI is used to measure the onchannel power (in dBm) and report it to the baseband integrated circuit (IC), which is used for closedloop power control with base station and also for onchip IC calibrations. In order to meet all LTE/WCDMA/EGPRS requirements, several onchip calibrations need to be carried out to compensate for supply voltage, process, and temperature variations. These calibrations include analog filter bandwidth tracking, coarse DCOC, digital fine DCOC, IIP2 and IIP3 control, I/Q channel mismatch correction, and I/Q channel equalizer. The goal of these calibrations is to minimize bandwidth variation, maximize the receiver dynamic range, minimize impacts on digital demodulator performance, minimize TX output signal cross modulation impacts on the receiver SNR, reduce the receiver power consumption, improve image rejection in the VLIF mode, and minimize the EVM, respectively. III. RECONFIGURABLE RECEIVER CIRCUIT DESIGN Fig. 2 illustrates a simplified view of the receiver RF frontend. A differential LNA using inductive source degeneration has been employed to minimize the LO leakage, substrate
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Fig. 2. Simplified receiver frontend diagram.
noise coupling, differentialmode spurious coupling, and linearity degradation effects [8]. Devices M2 and M3 are used in the TX–RX calibration loop for IIP2, image rejection, and bandwidth calibration. To achieve 30dB gain control range, the LNA cascode stage devices M4–M7 were divided into five binaryweighted digitally controlled segments. M5 and M6 in the cascode stage are used to steer current away from the signal path. Maintaining a constant current through the LNA input devices M0, M1 results in a constant transconductance. This technique allows the LNA to have constant input impedance over the 30dB gain range and thereby to minimize the LNA return loss variation. In addition, it reduces the gain control DNL of the LNA to less than 0.5 dB over the full 30dB gain control range. The LNA transconductance is about 45 ms for different bands and different modes, which was determined to be a good tradeoff between NF and linearity. The offchip matching network provides 12dB gain, which would ideally allow the LNA to achieve an NF of less than 0.9 dB over a 500MHz–3GHz frequency range while using small dc current in the LNA. It is noted that nine LNAs are used in the primary receiver, and five LNAs are used in the secondary receiver to cover from a 500MHz to 3GHz frequency range. Fig. 3(a) depicts a model for the LNA including a singleended “L” matching network. represents the antenna impedance, and and represent the LNA parallel equivalent impedance, respectively. and represent the “L” matching network. The LNA is implemented as a transconductance amplifier. The LNA gain is . The overall gain of the receiver consists of the voltage gain between the antenna and the LNA input combined with the transconductance of the LNA. Thus, the highest gain is achieved when the voltage gain between the antenna and the LNA input is maximized, not the LNA itself. It is convenient to model the LNA input with its equivalent parallel input impedance, as shown in Fig. 3(a). This allows the input signal voltage of the LNA to be treated as the voltage across the equivalent parallel input resistance . The equivalent parallel input capacitance of the LNA can be
Fig. 3. Singleended “L” matching network.
considered as part of the matching network, resulting in the circuit model shown in Fig. 3(b). For a perfectly matched circuit, the impedance looking into the matching network is equal to . This results in a signal voltage of at the input of the matching network. Let us assume that the matching network is lossless. Under these conditions, maximum power is transferred from the source to the load when the power dissipated by the load equals the power dissipated by the source resistance . The amplitude of the source voltage signal is given by , and the voltage amplitude across the source impedance is given by . The root mean square (rms) power dissipated by the source impedance is
(1)
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The rms power dissipated by the load impedance is
(2) Equating these two powers and solving for
(3) The
(transducer gain) of the matching network is given by
(4) For a given source impedance (typically 50 ), a large passive network gain is achieved by designing the LNA to have a large equivalent parallel input resistance. However, increasing transducer gain results in a large , which would make the NF and circuit gain sensitive to the variations of both active and passive components. The tradeoff between maximizing the passive voltage gain and using reasonably lowcost matching components led us to opt for a transducer gain of 12 dB. In Fig. 2 after the LNA, there are two currentdriven doublebalanced passive mixers driven by 25% dutycycle LO with IIP2 calibration DACs [12]. The output voltage of the LNA is the product of the LNA output current and the impedance looking into the mixer and CC. The mixer performance is of great importance in this receiver as it provides translational filtering of the RF signal at TX duplex offset [10], and it impacts the receiver NF, gain, and linearity for different modes and different bands [10], [8], [9]. The mixer conversion gain depends on the mixer transistor sizes and their dc bias, the LNA output impedance, the CC input impedance, and its parasitic capacitance. The local oscillator (LO) signal also affects the conversion gain. 25% dutycycle quadrature LO signals are used, which ideally have no timing overlap. Therefore, the LNA output current fully passes through each doublebalanced mixer during each phase. It is noted that a 50% dutycycle would split the signal between the I and Q mixers and would result in 3dB lower conversion gain [13]. A firstorder description of the conversion gain for the currentdriven doublebalanced passive mixers can be obtained as
(5) is the duty cycle of the LO signal. Based on (5), the where mixer conversion gain for 25% duty cycle and 50% duty cycle are and , respectively, which indicates 3dB less gain for the latter. Equation (5) does not consider the mixer nonideal effects, such as the mixer on resistance, and the LO signal rise and fall times. In a practical implementation, all these nonideal effects
Fig. 4. 25% duty cycle LO generator.
Fig. 5. LTE Band1 RX IIP2 contour at TX spacing versus IIP2 DAC calibration bits.
need to be carefully examined and sufficient programmability of various settings, such as the LO voltage swing, mixer output capacitor, and the mixer gate bias need be included. The 25% duty cycle LO also helps improve the receiver noise performance by increasing the mixer output impedance. Higher mixer output impedance lowers the noise contribution of the CC to the overall NF. Fig. 4 shows a widelyused 25% duty cycle LO generator block diagram [12], which was adopted in this design. Similar to [12], an IIP2 calibration algorithm was used in this reconfigurable receiver to achieve 90 dBm IIP2 for legacy bands and standards, as well as the new LTE channels and a larger number of bands. A dcbias voltage provided by a dedicated DAC is coupled to the gates of the mixer transistors through a large resistor for IIP2 calibration purposes. Each IIP2 DAC independently generates a dc bias for the mixer transistors. As an improvement to the circuit in [12], this IIP2 calibration circuit can cover a wider I/Q baseband bandwidth of up to 20 MHz using a wider tuning range and larger resolution for the IIP2 DAC. Fig. 5 shows Band1 RX IIP2 contours versus IIP2 DAC calibration bits when two tones are injected at the RX and TX frequencies. Fig. 5 shows that the receiver can achieve 90 dBm IIP2 and remain above 60 dBm for a wide IIP2 DAC control bit range (20 LSB). This is critical to maintaining
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Fig. 8. Measured EVM in WCDMA mode for seven bands.
Fig. 6. Transceiver die photograph showing only the RX section.
Fig. 9. Measured EVM in LTE20 and LTE10 modes for four different bands.
Fig. 7. Measured image rejection ratio for all four 2G bands.
a good IIP2 performance over temperature and process, and also to preserving the sensitivity level of the SAWless receiver in the presence of modulated TX signal in WCDMA and FDDLTE modes [6], [10]. Please note all other thirdgeneration (3G) or fourthgeneration (4G) bands IIP2 were measured using a same setup with similar performance. Devices M8 and M10 in the CC are made large enough to minimize their flicker noise and reduce the input impedance of the CC. This also reduces the LNA output voltage swing and improves the combined LNA–mixer–current conveyor linearity performance. In addition, it improves the overall conversion gain by providing a virtual ground node to the mixer. In order to support LTE channel bandwidths up to 20 MHz, the baseband impedance presented to the mixer needs to be low and flat up to 9 MHz in order to avoid significant crosstalk between I and Q signals. Furthermore, baseband input impedance is also critical to the IIP2 performance in LTE/WCDMA modes, I/Q downconversion gain, and image rejection in EGPRS mode [10]. An alternative to the CC would be to use the inputs of an opamp, as part of the first stage of the baseband filter, to terminate the mixer outputs [9], [10]. Although this technique is suitable for 2G and 3G signals, it may require excessive power consumption to maintain flat input impedance over the 9MHz
LTE bandwidth. The CC solution demands less total dc current than the bruteforce increase of the opamp bias current to the point of achieving the same inband impedance flatness. The reason is that the CC is an openloop circuit, while the opamp would operate in a closedloop configuration. In order to design a high , low phasenoise, and wide tuningrange VCO, the RX PLL uses three LC resonant tanks to cover the 2.5–6GHz frequency range. This PLL is shared by the primary and secondary receivers to save silicon area and current drain. The PLL design is beyond the scope for this paper and its design details will not be discussed here. IV. MEASUREMENTS The die photograph in Fig. 6 shows the receiver section of the transceiver, which was fabricated in a 90nm CMOS technology and assembled in an 18 13 land–grid–array (LGA) package. Fig. 7 shows the measured image rejection results in all four four GSM bands (GSM850, EGSM900, DCS1800, PCS1900) over temperature and frequency. Onchip image reject calibration and also the 25% duty cycle LO allow us to achieve better than 43dB image rejection ratio, which is crucial for a VLIF receiver. The receiver is reconfigured for zeroIF operation for 3G WCDMA FDD mode. The measured EVM in this mode for various bands without using a SAW filter is shown in Fig. 8. An EVM of less than 3% indicates that this reconfigurable SAWless receiver meets all linearity, selectivity, and phasenoise requirements. Fig. 9 also shows an EVM less than 3% in 4G mode. Fig. 10 shows the measured I/Q frequency response in LTE20 mode, indicating an I/Q gain mismatch across the entire bandwidth of less than 0.2 dB. Fig. 11 shows a flat % achieved in Band1 over different baseband bandwidths.
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TABLE I RECEIVER PERFORMANCE
receiver is able to meet the production requirements for all bands and all modes. V. CONCLUSION
Fig. 10. Measured I/Q gain for 4G LTE20 20MHz mode Band 1.
This paper has reported on a singlechip multiband multimode SAWless 90 nmCMOS reconfigurable receiver. It has nine primary LNA input ports and five secondary LNA input ports, and supports all LTE/WCDMA/EGPRS standards and supports. This receiver achieves a typical 3dB and maximum 3.7dB NF over process corner, voltage, and temperature in all standards and bands. It has 43dB image rejection ratio in 2G mode. It has 60dBm IIP2, 1dBm full duplex IIP3, and 3dBm half duplex IIP3 in WCDMA and LTE all bandwidth mode. The baseband lowpass filter cutoff frequency, mixer image rejection, and IIP2 calibration are performed automatically to meet the corresponding stringent requirements. ACKNOWLEDGMENT The authors wish to acknowledge the support of S. Janssen and J. Dai, both with Fujitsu Semiconductor Wireless Products Inc., Tempe, AZ, for their laboratory measurement work. REFERENCES
Fig. 11. Receiver EVM in Band 1 main and diversity paths in LTE 1.4, 3, 5, 10, 15, and 20MHz modes. Measurements are performed in the presence of the TX signal at maximum output power.
Table I summarizes both main and diversity receiver performance in LTE/WCDMA/EGPRS modes for some typical bands. Comprehensive measurements were carried out for all four GSM bands (GSM850, EGSM900, DCS1800, PCS1900), WCDMA (bands I, II, III, IV, V, VI, VIII, IX, X, and XI) and LTE (FDD bands 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 17, and TDD bands 38 or 40) confirming that this reconfigurable
[1] “Worldwide smartphones,” InStat, Port Washington, NY, Nov. 2009. [Online]. Available: http://www.instat.com/catalog/ [2] H. Moon, J. Han, S.I. Choi, D. Keum, and B.H. Park, “An areaefficient 0.13 m CMOS multiband WCDMA/HSDPA receiver,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 5, pp. 1447–1455, May 2010. [3] X. He; and H. Kundur, “A compact SAWless multiband WCDMA/GPS receiver frontend with translational loop for input matching,” in Int. SolidState Circuits Conf. Tech. Dig., 2011, pp. 372–374. [4] H. Darabi, “A blocker filtering technique for SAWless wireless receivers,” IEEE J. SolidState Circuits, vol. 42, no. 12, pp. 2766–2773, Dec. 2007. [5] N. Kim, L. E. Larson, and V. Aparin, “A highly linear SAWless CMOS receiver using a mixer with embedded Tx filtering for CDMA,” IEEE J. SolidState Circuits, vol. 44, no. 8, pp. 2126–2137, Aug. 2009. [6] M. Kitsunezuka, S. Hori, and T. Maeda, “A widelytunable, reconfigurable CMOS analog baseband IC for softwaredefined radio,” IEEE J. SolidState Circuits, vol. 44, no. 9, pp. 2496–2502, Sep. 2009. [7] R. Bagheri, “An 800MHz–6GHz softwaredefined wireless receiver in 90nm CMOS,” IEEE J. SolidState Circuits, vol. 41, no. 12, pp. 2860–2876, Dec. 2006.
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[8] T. Sowlati et al., “Singlechip multiband WCDMA/HSDPA/HSUPA/ EGPRS transceiver with diversity receiver and 3G DigRF interface without SAW filters in transmitter/3G receiver paths,” in Int. SolidState Circuits Conf. Tech. Dig., 2009, pp. 116–117. [9] K. Koli, S. Kallioinen, J. Jussila, P. Sivonen, and A. Parssinen, “A 900MHz direct deltasigma receiver in 65nm CMOS,” IEEE J. SolidState Circuits, vol. 45, no. 12, pp. 2807–2818, Dec. 2010. [10] A. Mirzaei, H. Darabi, J. C. Leete, and Y. Chang, “Analysis and optimization of directconversion receivers with 25% dutycycle currentdriven passive mixers,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 57, no. 9, pp. 2353–2366, Sep. 2010. [11] A. Mirzaei, H. Darabi, J. C. Leete, X. Chen, K. Juan, and A. Yazdi, “Analysis and optimization of currentdriven passive mixers in narrowband directconversion receivers,” IEEE J. SolidState Circuits, vol. 44, no. 10, pp. 2678–2688, Oct. 2009. [12] K. Daniel et al., “A singlechip 10band WCDMA/HSDPA 4band GSM/EDGE SAWless CMOS receiver with DigRF3G interface and 90 dBm IIP2,” IEEE J. SolidState Circuits, vol. 44, no. 3, pp. 718–739, Mar. 2009. [13] B. W. Cook, “Low energy RF transceiver design,” Ph.D. dissertation, Dept. Elect. Eng. Comput. Sci., Univ. California at Berkeley, Berkeley, CA, 2007.
Haolu Xie (M’07) received the B.S. degree in electrical engineering from Zhejiang University, Hangzhou, China, in 2001, and the M.S. and Ph.D. degrees in electrical engineering from the Illinois Institute of Technology, Chicago, in 2004 and 2007, respectively. He is currently with Fujitsu Semiconductor Wireless Products Inc., Tempe, AZ. His current research interests include reconfigurable cellular radio and ultrawideband transceiver design and electrostatic discharge (ESD) protection circuit design. He has authored or coauthored over 30 IC design technical papers. He holds four U.S. patents. Dr. Xie is an IEEE RF Integrated Circuit (RFIC) and IEEE Electron Device Society (EDS) Very Large Scale Integration (VLSI) Technology and Circuits Technical Program Committee (TPC) member. Omid Oliaei (A’01–M’01–SM’02) received the Ph.D. degree in electrical engineering from the École Nationale Supérieure des Télécommunications (ENST), Paris, France, in 1997. He has held research and development positions with Motorola Inc. and Freescale Semiconductor, and a faculty position with the University of Massachusetts–Amherst. He is currently with Fujitsu Semiconductor Wireless Products Inc., Tempe, AZ, where he is involved with RF, mixedsignal circuits, and signalprocessing techniques for cellular transceivers. Patrick Rakers (M’86) received the B.S. degree in electrical engineering from the University of Illinois at Urbana–Champaign, in 1984, and the M.S. degree in electrical engineering from the Illinois Institute of Technology, Chicago, in 1989. In 1984, he joined Motorola Corporate Research (now Motorola Laboratories), Schaumburg, IL, where he was involved in the research and design of mixedsignal ICs with emphasis on data conversion. In 2004, he joined Freescale Semiconductor, Lake Zurich, IL, as Manager of Research in RFCMOS Technologies, with a focus on cellular transceivers, and as Global RF Design Manager for the Cellular Products Group. In 2009, he joined Fujitsu Semiconductor Wireless Products Inc., Tempe, AZ, as Director of RF
and analog design. He has authored 16 IEEE papers and four invited industry presentations. He holds 30 patents with four pending. Rick Fernandez received the B.S. degree in electrical engineering from the University of Miami, Miami, FL, in 1981, and the M.S. degree in electrical engineering from the Georgia Institute of Technology, in 1983. He is currently an Analog and RF Design Manager with Fujitsu Semiconductor Wireless Products Inc., Tempe, AZ, where he is involved with multimode transceivers integrating 2G/3G/4G modes into a single IC for the wireless market. Joan Xiang, photograph and biography not available at time of publication. John Parkes received the B.Sc. degree in electrical engineering from Florida Atlantic University (FAU), Boca Raton, FL, in 1985. From 1986 to 2004, he was with Motorola, where he was involved with applicationspecific integrated circuit (ASIC) receivers for paging and cellular usage. From 2004 to 2009, he was with Freescale Semiconductor, where he was involved with cellular transceivers with a strong focus on amplifiers, current conveyors, filters, and sigma–deltas. Since 2009, he has been with Fujitsu Semiconductor Wireless Products Inc., Tempe, AZ, as a Senior Analog/Mixed Mode Design Engineer. He holds 14 patents. He continues to contribute to CMOS analog circuit design in multimode cellular transceivers. Jim Riches (S’93–M’95) received the B.Sc. and M.Sc. degrees in electrical engineering from Florida Atlantic University, Boca Raton, FL in 1993 and 2000, respectively. From 1993 to 2003, he was with Motorola Paging Products, Freescale Semiconductor. Since 2009, he has been with Fujitsu Semiconductor Wireless Products (FSWP) Inc. Tempe, AZ, where he is an Analog Integrated Circuit (IC) Designer. His research interests are in mixedsignal IC design, specifically in the area of delta–sigma data converters. He has authored or coauthored papers appearing in IEEE publications. He holds several patents. Mr. Riches is a member of Tau Beta Pi. Richard Verellen received the B.S. degree in electrical engineering from Michigan Technological University, Houghton, in 1991, and the M.S.E.E. degree from the Georgia Institute of Technology, Atlanta, in 1993. In 1994, he joined Motorola, and subsequently joined Freescale Semiconductor since its creation. In 2009, he joined Fujitsu Microelectronics of America. He is currently with Fujitsu Semiconductor Wireless Products Inc, Tempe, AZ. He holds patents for receiver improvements. Mahibur Rahman received the Ph.D. degree in electrical engineering from Purdue University, West Lafayette, IN, in 1992. From 1989 to 2009, he was with several companies including Freescale Semiconductor, Motorola, and VLSI Technology. Since 2009, he has been with Fusijtsu Semiconductor Wireless Products Inc., Tempe, AZ, where he is a Wireless Systems Engineering Manager. He has authored or coauthored several journal, conference, and text book chapter publications. He currently holds 31 U.S. issued patents with several pending. His research interests include wireless transceiver and baseband modem architectures and signalprocessing algorithms. Vivek Bhan, photograph and biography not available at time of publication. Daniel B. Schwartz, photograph and biography not available at time of publication.
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Subharmonic 220 and 320GHz SiGe HBT Receiver FrontEnds Erik Öjefors, Member, IEEE, Bernd Heinemann, and Ullrich R. Pfeiffer, Senior Member, IEEE
Abstract—Monolithically integrated 220 and 320GHz receiver frontends manufactured in an engineering version of an GHz SiGe technology are presented. Subharmonic mixing is provided by a Gilbert cell with stacked switching quads fed by quadrature 110/160GHz local oscillator (LO) signals. The 220GHz version of the frontend is equipped with an integrated LNA with a measured 15dB gain and 28GHz bandwidth. This frontend yields a conversion gain of 16 dB, an 18dB singlesideband (SSB) noise figure (NF), and a 30GHz bandwidth when pumped with a 0dBm 110GHz LO signal. The 320GHz version of the frontend omits the lownoise amplifier and features an integrated 9 LO multiplier chain to facilitate operation and characterization. A conversion gain of 14 dB and a 36dB SSB NF is obtained over the 313to328GHz frequency range. The presented circuits demonstrate that a fully integrated receiver frontend can be implemented up to submillimeterwave frequencies in an SiGe HBT technology. Index Terms—Heterojunction bipolar transistors (HBTs), millimeterwave receivers, monolithic microwave integrated circuit (MMIC) frequency converters, silicon.
I. INTRODUCTION
M
ILLIMETERWAVE systems are used in an increasing number of commercial, defense, and securityrelated applications, such as highspeed wireless communication and millimeterwave imaging. Although most of the present systems operate below 100 GHz, the use of the 220–320GHz WR03 waveguide band would offer increased communication bandwidth and improved imaging resolution in such systems. This band has recently become more accessible with the availability of lowcost monolithically integrated sources in CMOS [1] and SiGe heterojunction bipolar transistor (HBT) [2] technologies. Receiver frontends with excellent performance can be implemented in this frequency range using Schottkydiode mixers in waveguide technology, with below 10 dB of conversion loss and noise figure (NF) at 330 GHz reported in [3]. However, array implementations of receivers based on discrete Manuscript received October 03, 2011; revised February 15, 2012; accepted February 21, 2012. Date of publication April 05, 2012; date of current version April 27, 2012. This work was supported in part by the European Commission under Project DOTFIVE 216110. This paper is an expanded paper from the IEEE RFIC Symposium, June 5–7, 2011, Baltimore, MD. E. Öjefors was with the Institute for HighFrequency and Communication Technology, University of Wuppertal, D42119 Wuppertal, Germany. He is now with Sivers IMA AB, S164 29 Kista, Sweden (email: [email protected]). B. Heinemann is with the IHP GmbH, D15236 Frankfurt (Oder), Germany. U. R. Pfeiffer is with the Institute for HighFrequency and Communication Technology, University of Wuppertal, D42119 Wuppertal, Germany (email: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2190092
diodes and waveguide technology remain space consuming and costly. Hence, monolithically integrated receiver frontends are typically needed in millimeterwave system designs driven by lowcost requirements or a need for a large number of parallel channels [4]. In III–V technologies, integrated receivers incorporating lownoise amplifiers (LNAs), mixers, and optional localoscillator (LO) multipliers have been demonstrated at 220 GHz [5], [6]. Improved SiGeHBT process technologies with a present of 500 GHz [7] do, however, allow similar circuits to be implemented in silicon BiCMOS technology, thus benefiting from the higher degree of integration, smaller die size, and lower cost in large quantities. Conventional superheterodyne and zeroIF receivers and receiver frontends based on SiGe HBTs have been demonstrated at 160 GHz in [8] and [9], as well as at 170 GHz in [10]. The fundamental downconversion mixers used in these receivers do, however, require higher LOdrive power with increased frequency due to the input RCtime constants of the switching transistors. Since the onchip generation of a highpower LO signal is difficult and power consuming at high millimeterwave frequencies, it becomes increasingly difficult to obtain the saturated switching of the mixing devices needed for efficient lownoise downconversion. Harmonicmixerbased receiver frontends allow the LO to be generated at a lower frequency than the input RF signal and have been successfully demonstrated up to a frequency of 825 GHz [11] in SiGeHBT technology. However, such mixers tend to suffer from a relatively low conversion gain and high NF due to an inefficient mixing process, which relies on generation of the required LO harmonics by the nonlinearities of the transistor itself. As an alternative, a subharmonic downconversion architecture, where the LO is provided at half the RF frequency, can be implemented with a twostage mixing process. A modified Gilbert cell with two stacked mixer cores [12] driven with quadrature LO signals is commonly used as a subharmonic downconverter in bipolar technologies [13]. This combination of two cascaded fundamentalfrequency mixers for a twostage downconversion process does not suffer from the same conversiongain and noise limitations as harmonic mixers based on higher order nonlinearities. Millimeterwave implementations of such downconversion mixers include a 94GHz receiver frontend [14], a 122GHz mixer [15] and receiver [16], as well as a 220GHz receiver frontend [17]. In this paper, we elaborate on the design and results of a 220GHz LNA/mixer receiver frontend, originally presented in [17], which has been manufactured in an GHz SiGeHBT technology. Additionally, a 320GHz implementation of this mixer with an integrated LO frequency multiplier chain is presented. These
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Fig. 1. Block diagram of the monolithically integrated subharmonic receiver frontend. The threestage 220GHz LNA is followed by two cascaded mixer cores pumped by quadrature LO signals in order to obtain subharmonic mixing. The LO signal is either provided from an external source, or in the case of the 320GHz receiver, an onchip frequency multiplier chain. Fig. 2. Schematic diagram of the subharmonic Gilbertcell mixer. Two stacked mixer quads driven with quadrature LO signals provide subharmonic mixing.
circuits demonstrate that receivers based on a conventional lowfrequency subharmonic downconversion architecture can be successfully implemented up to submillimeterwave frequencies. Section II describes the circuit design of the subharmonic 220 and 320GHz mixer, as well as the threestage differential 220GHz LNA. In Section III, details about the manufacturing and layout of the circuits are provided. The characterization setup and results are presented in Sections IV and V, respectively, whereas conclusions are given in Section VI. II. CIRCUIT DESIGN A modular architecture has been implemented for the monolithically integrated 220/320GHz subharmonic receiver frontend, as shown in Fig. 1. The input of the front end is differential and can be directly interfaced with balanced onchip antennas such as foldeddipole radiators. For singleended characterization in a waferprobing environment, a version of the circuit with an onchip Marchand balun is used at the RF port. A threestage differential LNA is integrated in the 220GHz version of the circuit to boost the conversion gain and reduce the cascaded system NF of the front end. This LNA is absent in the 320GHz version of the circuit due to the low available gain of the HBT devices at this frequency. The subharmonic differential 110/160GHz LO signal is provided externally through an integrated Marchand balun. In the case of the 320GHz version, the LO is provided by an integrated 9 160GHz frequency multiplier chain, similar to the driver circuit used for the 320GHz frequency doubler in [2]. A. Subharmonic 220/320GHz Mixer The subharmonic mixer is based on a threelevel multiplier, implemented by a modified Gilbertcell equipped with stacked switching quads [12]. As suggested in [13], subharmonic mixing can be obtained by feeding the RF input signal to the first port and driving the two remaining ports with the inphase and quadrature components of the LO signal according to the trigonometric identity (1) (2)
In Fig. 2, a schematic diagram of the subharmonic mixer is presented. The core of the mixer consists of the two mixing quads (Q3–Q10), equipped with minimum size transistors m each biased at half current mA. This selection of device size and bias point was made to obtain saturated switching of the quads with a 5dBm LO signal. Inductive shunt compensation of the capacitive LOinput impedance of each quad is performed by the 65pH differential inductors L1/L2. These inductors provide a broadband reduction of the simulated LO return loss of each quad to 10 dB in a 100 system. They also provide a dcbias path from the bases of the quads to the bias nodes V and V. The 30fF metal–insulator–metal (MIM) coupling capacitors C1–C4 provide dc isolation of the quad bias from the LO input. The input and output coupling to the mixer core is implemented using a conventional transconductance input stage Q1/Q2 and resistive collector loads RC1/RC2, respectively. Devices with an emitter size m are used for Q1/Q2, biased at 2.4 mA through reuse of the quad quiescent current. This selection yields 8dB input return loss of the mixer at 220 GHz in an 100 system without further matching components present. The collector loads RC1/RC2 have been selected to 200 through optimization in order to maximize the conversion gain at low 10GHz IF frequencies and to allow a 3.6V supply voltage with sufficient voltage headroom for the collectors of the Q7–Q10 devices. The differential IF signal available at the collectors of Q7–Q10 is provided to the m large emitter–followers Q11/Q12. This yields a wideband IF output capable of dc to 10GHz operation. In contrast to the implementations described in [13], [14], and [16], the quadrature LO components are generated by a differential 90° 3dB transmissionline coupler instead of a lumped RC polyphase network. A lowloss quadrature coupler can provide close to 3dB insertion loss for each of the quadrature LO outputs, whereas the insertion loss of an RCpolyphase network is usually significantly higher. The implementation of an RC polyphase network at frequencies above 100 GHz is also challenging due to the high and often poorly modeled parasitics of
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Fig. 4. Simulated conversion gain and DSB NF of the 220GHz (solid line) and 320GHz (dashed line) mixers.
Fig. 3. (a) Layout and (b) cross section of the 3dB 90° differential transmission line coupler used for LO quadrature generation.
the passives and interconnects. Compared to the branchline hybrid used in a similar design in [15], the 90° coupler offers larger bandwidth and requires less area. The coupler is implemented as two coupled quarterwave long coplanar striplines (CPSs) in adjacent metal layers of the backend metallization, as shown in Fig. 3. To obtain sufficient coupling between the transmission lines for 3dB coupling, the broadside hybrid coupler uses a combination of the closely spaced thin M3 and thick TM1 metal layers, separated by a m oxide layer, instead of the thicker, but further spaced TM1/TM2 layers. The coupled lines are implemented as two parallel strips with m width and m spacing. In order to reduce the required silicon area, the coupler has been folded into a Cshape with mitered corners. The total length corresponds to a quarter of a guided wavelength and is 260 m for the 110GHz version in the 220GHz mixer and 180 m in the 160GHz coupler used in the 320GHz case. With the selected dimensions, a 75 impedance is obtained for the coupler ports, which provides an acceptable matching to the 100 system impedance used in the rest of the circuit. The isolated port is terminated to ground with two 37.5 resistors to absorb any power reflected by the LO inputs of the two mixer quads. A shield wall with via connections from the top metal layer (TM2) to substrate contacts surrounds the coupler and minimizes coupling to adjacent passives and transmission lines. Within these shield walls, filling of metal dummies is suppressed, in order to prevent parasitic loading of the coupler. A fullwave 3D electromagnetic (EM) (HFSS) simulation of the 110GHz 90° coupler has been performed over the 80–140GHz frequency range. The simulation results show a maximum 5dB insertion loss (2dB excess loss), a 1dB
amplitude imbalance, and a maximum of 7° of phase error. Similarly, the 160GHz coupler provides 4.2dB insertion loss, an amplitude error less than 1 dB, and a maximum 3° phase error over the simulated 140–220GHz frequency range. The simulated conversion gain and doublesideband (DSB) NFs of the 220 and 320GHz mixers are plotted in Fig. 4 for a power sweep of the 110/160GHz LO signals. The 220GHz version of the mixer provide 0 dB of conversion gain with a 3dBm LO signal. At this LOpower level, a DSB NF of 20 dB is obtained. The 320GHz version of the mixer shares the same component values as the 220GHz version, except for the differently designed coupler, with no further reoptimization. Hence, the low transconductance of the input devices Q1/Q2 when operated above the 280GHz transit frequency, as well as the larger loss of the switching quads at this frequency, mainly explain the drop of the conversion gain to 5 dB. Furthermore, the simulated DSB NF increases to 24 dB with this reduced conversion gain. The mixer is powered from a 3.6V supply in order to provide sufficient voltage headroom for three stacked transistors. At this bias level, the current consumption of the mixer is 18 mA, which is dominated by the IFoutput emitter followers. B. 220GHz LNA Fig. 5 presents the schematic diagram of the threestage differential LNA, which consists of three cascaded differential cascode stages. Since only preliminary device models of the HBTs extracted from 40GHz measurements were available at the time of the design, a single LNA stage with 100 nominal input and output impedance was designed. This stage is optimized to produce positive gain at 220 GHz in the presence of device parameter variations inherent to an engineering version of the device technology. To obtain sufficient gain in the receiver application, this stage was then replicated to form a threestage differential amplifier. Each stage is equipped with four m large devices Q1–Q4 arranged in a differential cascode configuration. This device size was chosen to obtain an optimum noise
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Fig. 5. LNA schematic showing the first stage of the 220GHz differential threestage LNA. The second and third stages are of identical design and tuning as the first stage. The circuit elements inside the dashed boxes were modeled by 3D EM simulation and included as parameter blocks in the simulation.
match to a 2 50 differential source impedance without additional matching components. It simultaneously yields an acceptable input return loss of 10 dB with the postlayout parasitics included. The HBTs are biased at an mA collector current, which is close to the current of this device. This current was optimized to minimize the cascaded NF of the threestage amplifier, which requires sufficient gain of each stage in addition to lownoise operation. The output matching network of each amplifier stage consists of a conventional LC tank equipped with a singleturn differential inductor and the 14fF series MIM capacitors C1/C2. A 24 21 m large rectangular loop with a 2 mwide conductor in the top TM2 metallization is used to implement the inductor. However, the 20 mlong interconnects between the edge of the inductor and the collector nodes provide a significant part of the total inductance. Hence, fullwave EMsimulation (HFSS) results of the complete inductor and interconnect layout were included as an parameter block in the simulation during the design phase. Similarly, the transmission lines and interconnects at the input of the stage were modeled with an parameter block obtained by EM simulation of the layout. Additional parasitics in the form of the wiring inductances pH at the critical base connection between the cascode transistors Q3/Q4 and emitter inductances pH were also added to the postlayout simulation. The supply voltage VCC is provided to each amplifier stage through the filter network R4/C3. These lowpass filters minimize the risk of spurious commonmode oscillations caused by coupling between the stages through the shared power supply connection. Due to the voltage drop in these filters, the VCC is selected to 3.6 V, which yields a total current consumption of 42 mA for the threestage amplifier. The full threestage LNA was simulated using the available preliminary device models of the optimized HBTs. A simulated gain and NF of 14 and 13 dB were obtained in an 100 system, respectively, together with an input return loss of 9.5 dB. C. Test Benches and Circuit BreakOuts In the targeted imaging application, the receiver frontend is intended to be used together with an onchip differential antenna, such as a folded dipole radiator. However, since the im
Fig. 6. Layout of the 220GHz Marchand balun implemented in the TM2 top metal layer of the backend. The 110 and 320GHz baluns share the same delong transmission line at the sign, but are stretched to accommodate a respective frequency.
plemented circuits were to be characterized by wafer probing, onchip Marchand baluns were integrated at the RF and LO inputs. The Marchand baluns are implemented with a twowire balanced transmission line in the top (TM2) thick aluminum metallization with 2 m conductor width and conductor spacing , as shown in Fig. 6. The transmission line is arranged in a rectangular loop and its length corresponds a half guided wavelength at the design frequency, with 360 and 260 m length used at 220 and 320 GHz, respectively. The capacitance of the ground–signal–ground (GSG) pad is compensated with a shunt inductance obtained by a short grounded transmissionline stub, as described in [18]. The simulated insertion loss of the pad and balun combination is 2 dB at 220 GHz, whereas the insertion loss of the 320GHz balun/pad combination was extracted from backtoback characterization and found to be 4 dB. An overview of the manufactured circuit breakouts is presented in Fig. 7. In addition to the 220GHz downconversion frontend, a breakout of the standalone threestage LNA has been implemented. The 320GHz frontend does not include an LNA since the low available gain of the current technology at this frequency make an LNA implementation impractical. Since commonly available laboratory equipment cannot provide the required 0dBm 160GHz LO drive required by the 320GHz version of the mixer, the 160GHz frequency multiplier chain described in [2] has been integrated with this breakout. III. TECHNOLOGY AND MANUFACTURING The downconversion frontend has been manufactured in an HBTonly engineering version of a 0.25 m BiCMOS technology. For circuit fabrication, the process offers polysilicon and silicide resistors. The backend manufacturing corresponds to the process flow and design rules of the SG25H1 [19] technology with five aluminum metal layers, including a 1fF m MIM capacitor. The basic flow of the SiGe HBT module was presented first in [20] and was later implemented in IHP’s 0.13 m BiCMOS technology [21]. Starting from the HBT performance level of this technology, the peak values of were improved from 240 GHz/330 GHz to 250 GHz/380 GHz in the course of a first development cycle. The corresponding
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Fig. 8.
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and
versus
of HBTs with eight emitters in parallel m measured on three dies. OPEN and SHORT deembedded smallsignal current gain and unilateral gain versus and at 40 GHz with 20 dB frequency were used for extrapolation of per frequency decade. Measurements were performed on an E8364A (50 GHz). Fig. 7. (a) Breakout of the differential 220GHz LNA with Marchand input and output baluns for wafer probing. (b) Integrated 220GHz downconverter with baluns for the 220GHz RF and 110GHz LO inputs. (c) 320GHz with input balun and integrated 9 LO frequency multiplier chain.
highspeed capabilities of the upgraded technology were tested in runs for circuit fabrication [2], [9]. Additional progress of the highspeed performance was achieved in a second development cycle. A further reduced thermal budget, lateral device scaling (minimum emitter width was scaled from 160 to 120 nm), as well as a modified collector and emitter formation resulted values of in a performance enhancement to peak 280 GHz/435 GHz. An optimized version of this HBT technology with even higher values of 300 GHz/500 GHz was presented elsewhere [7]. The transistors of the second development cycle achieve a V and demoncurrent gain of approximately 700 at strate an openbase collector–emitter breakdownvoltage of 1.7 V. Open and short deembedded smallsignal were used for the excurrentgain and unilateral gain and from 40 GHz with 20 dB per trapolation of values of approximately frequency decade. Peak 280 GHz/435 GHz are demonstrated in Fig. 8. The micrograph of the manufactured 1.1 0.6mm large frontend chip is shown in Fig. 9. The largest part of the die is occupied by the pad frame and the RF/LO input baluns, while the downconverter core only requires an area of 0.5 0.2 mm . The transmission lines, baluns, and inductors are all implemented in the 3 mthick top metal TM2 aluminum layer. IV. CHARACTERIZATION SETUP Fig. 10 presents the measurement setup used for the characterization of the conversion gain and noise of the integrated 220and 320GHz receiver frontends. The RF input power from a submillimeterwave multiplier was calibrated at the waferprobe waveguide interface using an Erickson calorimeter. This calibration was performed in 1GHz frequency steps over the 190–240 and 315–330GHz frequency ranges, and yielded a measured average input power of 28 dBm. Due to the low power levels involved, simultaneous monitoring of the input power during deviceundertest (DUT) characterization using a
Fig. 9. Micrographs of the: (a) breakout of the 220GHz threestage LNA, (b) 220GHz downconverter, and (c) 320GHz downconverter with integrated 9 LO multiplier chain.
directional coupler and the power meter was not practical with the available coupler. The insertion loss of the WR03 wafer probe was obtained by measuring the return loss at the waveguide interface while probing an open, short, and load impedance provided by a calibration substrate. From the corresponding returnloss values measured at the waveguide interface, an insertion loss of 3 dB was calculated for the wafer probe.
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Fig. 10. Integrated downconverter conversiongain measurement setup.
Fig. 12. Measured and simulated conversion gain and output noise floor including the 2dB losses of the onchip auxiliary balun in front of the LNA.
The 220GHz LNA parameters were measured with a network analyzer equipped with WR03 frequencyextender modules and waveguide wafer probes. Shortopenloadthru (SOLT) calibration was performed using a millimeterwave calibration substrate. V. RESULTS A. ThreeStage 220GHz LNA Breakout
Fig. 11. Measured (solid line) and simulated (dashed line) gain of the threestage differential LNA including pads and input and output baluns.
The 110GHz LO drive to the mixer is provided by a synthesizerdriven 6 frequency multiplier feeding the integrated mixer through a coaxial band probe. An LO drive power of 0 dBm is obtained at the pads of the DUT. For the 320GHz version of the receiver, a 17.7GHz 3dBm signal is provided to the integrated 9 LO frequency multiplier chain through a wafer probe. An external balun was used to combine the 100MHz differential IF outputs to a singleended signal. The 100MHz IF frequency and surrounding noise floor was monitored with a spectrum analyzer. Since no WR03 noise source was available, the singlesideband (SSB) NFs of the characterized receiver frontends has been calculated from the measured conversion gain and output noise floor with the input port terminated with a matched load. Hence, an input dBm/Hz thermal noise floor can be assumed, and the noise factor calculated from the IF noise floor and conversion gain using the direct method as
(3)
Fig. 11 presents the measured and simulated gain of the threestage LNA breakout, with the calibration planes at the input and output pads. Hence, the results include a total of 2 2 dB nondeembedded losses from the baluns and pads at the input and output. The simulated results include extracted postlayout parasitics not included in the initial design. These parasitics, as well as the influence of the pad compensation, move the gain peak closer to 210 GHz than the intended 220GHz center frequency. Relatively good agreement between measured and simulated gain is obtained over the complete 195–250GHz frequency range. The 2dB higher gain in the measurement compared to the simulation at the 210GHz peak gain frequency can be partly explained by the fact that the preliminary device models used in the simulations do not fully capture the improved device performance of the measured silicon. B. LNAIntegrated 220GHz FrontEnd In Fig. 12, the measured conversion gain and noise floor of the integrated receiver frontend is presented. At the targeted 220GHz operating frequency, a 16dB conversion gain and a 140dBm/Hz output noise floor is obtained. It can be noted that the level of the noise floor follows the conversion gain and the gain of the LNA. This shows that the output noise of the full downconverter is dominated by the downconverted noise from the LNA and that the LNA has sufficient gain to overcome the simulated 20dB NF of the subharmonic mixer. According to (3), the measured conversion gain and output IF noise floor corresponds to a 18dB SSB NF or a 15dB DSB NF
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TABLE I COMPARISON OF MONOLITHICALLY INTEGRATED RECEIVERS ABOVE 150 GHz
Fig. 13. Measured and simulated conversion gain and output noise floor including the 4dB losses of the onchip auxiliary balun in front of the mixer.
at 220 GHz since the 100MHz IF frequency means that both of the sidebands are present within the LNA bandwidth. The measured NF is in good agreement with the simulated 13dB NF of the LNA and the estimated 2dB losses of the auxiliary onchip RF balun and impedancecompensated pad. The measured current consumption is 20 mA for the mixer and 40 mA for the LNA from a 3.6V supply. C. 320GHz FrontEnd With Integrated
9 LO Chain
Fig. 13 presents the measured conversion gain and the output IF noise floor of the 320GHz frontend with an integrated LO chain. As in the case of the 220GHz downconverter, the 4dB losses of the 320GHz input pad and balun have not been deembedded from the results. Due to a stability issue with the integrated frequency multiplier chain, the measurement was performed with supply voltage and current to the multiplier increased to 5 V/600 mA onchip instead of the nominal 4 V/300 mA. Hence, the 160GHz LOdrive power is expected to be lower than than the 10dBm output level previously reported in [2] for optimum biasing of this chain. The supply to the subharmonic mixer remained at 3.6 V with a nominal current consumption of 20 mA. The measured 14dB conversion gain at the 320GHz operating frequency correspond to 10dB conversion gain at the mixer input terminals
and shows reasonable agreement with the simulated gain of 10 –6 dB (with/without balun). The lower conversion gain in the measurement can be explained by a nonoptimized LOdrive level from the debiased integrated multiplier chain, as well as layout parasitics not captured by the simulation. Outside of the 317–328GHz frequency range, the output power of the LO multiplier sharply drops, thereby leading to a corresponding drop in the conversion gain. The measured noise floor of 152 dBm/Hz is 3 dB higher than the simulated noise level of 154 dBm/Hz. However, it should be noted that the measured noise floor is close to the 157dBm/Hz floor of the spectrum analyzer, thus causing an overestimation of the output noise. The relatively high conversion loss causes the output noise to be dominated by noise generated at the 100MHz IF frequency rather than downconverted highfrequency noise. Hence, the noise floor remains relatively constant over the bandwidth. The measured conversion gain and noise floor provide an estimated SSB NF [see (3)] of 36/32 dB (with/without input pad and balun) at 320 GHz. VI. CONCLUSION Subharmonic 220 and 320GHz receiver frontends have been demonstrated in an engineering version of an SiGeHBT technology. The use of a subharmonic mixer facilitates the generation of the LOdrive signal and can also to help simplify the LO distribution in a multichannel array configuration. The 220GHz receiver frontend consists of an LNA and subharmonic mixer. As shown in Table I, the demonstrated 16dB conversion gain demonstrated with this circuit is higher than the gain obtained with a similar circuit in a III–V technology. The comparatively high NF of 15 dB (DSB) is partly caused by the use of an integrated RF balun at the receiver input. An 18dB conversion gain and 13dB NF should be obtainable in the intended configuration with a differential input signal from an onchip antenna. The 320GHz version of the frontend demonstrates that the operational frequency range of this mixer can extend into the submillimeterwave frequency range although the absence of a suitable LNA leads to a significantly increased NF. The use of a further optimized device technology and circuit design is also expected to yield a reduced NF and improved conversion gain.
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REFERENCES [1] O. Momeni and E. Afshar, “High power terahertz and millimeterwave oscillator design: A systematic approach,” IEEE J. SolidState Circuits, vol. 46, no. 3, pp. 583–597, Mar. 2011. [2] E. Öjefors, B. Heinemann, and U. R. Pfeiffer, “Active 220 and 325GHz frequency multiplier chains in an SiGe HBT technology,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 5, pp. 1311–1318, May 2011. [3] J. V. Siles, J. Grajal, and A. Di Carlo, “Design of submillimeter Schottky mixers under flatband conditions using an improved driftdiffusion model,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 3, pp. 167–169, Mar. 2009. [4] S. S. Ahmed, A. Schiessl, and L. P. Schmidt, “Novel fully electronic active realtime millimeterwave imaging system based on a planar multistatic sparse array,” in IEEE MTTS Int. Microw. Symp. Dig., Baltimore, MD, Jun. 2011, DOI:10.1109/MWSYM.2011.5973266. [5] S. E. Gunnarsson, N. Wadefalk, J. Svedin, S. Cherednichenko, I. Angelov, H. Zirath, I. Kallfass, and A. Leuther, “A 220 GHz singlechip receiver MMIC with integrated antenna,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 4, pp. 284–286, Apr. 2008. [6] M. Abbasi, S. E. Gunnarsson, N. Wadefalk, R. Kozhuharov, J. Svedin, S. Cherednichenko, I. Angelov, I. Kallfass, A. Leuther, and H. Zirath, “Singlechip 220GHz active heterodyne receiver and transmitter MMICs with onchip integrated antenna,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 2, pp. 466–478, Feb. 2011. of 300 [7] B. Heinemann et al., “SiGe HBT technology with GHz/500 GHz and 2.0 ps CML gate delay,” in IEEE Int. Electron Devices Meeting, San Francisco, CA, Dec. 2010, pp. 688–691. [8] E. Öjefors, F. Pourchon, P. Chevalier, and U. R. Pfeiffer, “A 160GHz lownoise downconverter in a SiGe HBT technology,” in Eur. Microw. Conf., Paris, France, Oct. 2010, pp. 521–524. [9] U. R. Pfeiffer, E. Öjefors, and Y. Zhao, “A SiGe quadrature transmitter and receiver chipset for emerging highfrequency applications at 160 GHz,” in IEEE Int. SolidState Circuits Conf., San Francisco, CA, Feb. 2010, pp. 416–417. [10] E. Laskin, K. Tang, K. Yau, P. Chevalier, A. Chantre, B. Sautreuil, and S. P. Voinigescu, “170GHz transceiver with onchip antennas in SiGe technology,” in IEEE Radio Freq. Integr. Circuits Symp., Atlanta, GA, Jun. 2008, pp. 637–640. [11] E. Öjefors, J. Grzyb, Y. Zhao, B. Heinemann, B. Tillack, and U. R. Pfeiffer, “A 820 GHz SiGe chipset for terahertz active imaging applications,” in IEEE Int. SolidState Circuits Conf., San Francisco, CA, Feb. 2011, pp. 224–225. [12] J. Choma, “A threelevel broadbanded monolithic analog multiplier,” IEEE J. SolidState Circuits, vol. SSC16, no. 4, pp. 392–399, Aug. 1981. [13] L. Sheng, J. C. Jensen, and L. Larson, “A widebandwidth Si/SiGe HBT direct conversion subharmonic mixer/downconverter,” IEEE J. SolidState Circuits, vol. 35, no. 9, pp. 1329–1337, Sep. 2000. [14] E. Öjefors and U. R. Pfeiffer, “A 94GHz monolithic frontend for imaging arrays in SiGe:C technology,” in Eur. Microw. Integr. Circuits Conf., Amsterdam, The Netherlands, Oct. 2008, pp. 422–425. [15] A. Müller, M. Thiel, H. Irion, and H.O. Ruob, “A 122 GHz SiGe active subharmonic mixer,” in Proc. 13th GAAS Symp., Paris, France, Oct. 2005, pp. 57–60. [16] K. Schmalz, W. Winkler, J. Borngräber, W. Debski, B. Heinemann, and J. C. Scheytt, “A subharmonic receiver in SiGe technology for 122 GHz sensor applications,” IEEE J. SolidState Circuits, vol. 45, no. 9, pp. 1644–1656, Sep. 2010. [17] E. Öjefors, B. Heinemann, and U. R. Pfeiffer, “A 220 GHz subharmonic receiver front end in a SiGe HBT technology,” in IEEE Radio Freq. Integr. Circuits Symp., Baltimore, MD, Jun. 2011, pp. 69–72. [18] U. R. Pfeiffer, “Lowloss contact pad with tuned impedance for operation at millimeterwave frequencies,” in Proc. 9th IEEE Signal Propag. Interconnects Workshop, GarmischPartenkirchen, Germany, May 2005, pp. 61–64. [19] B. Heinemann, R. Barth, D. Knoll, H. Rücker, B. Tillack, and W. Winkler, “Highperformance BiCMOS technologies without epitaxiallyburied subcollectors and deep trenches,” Semiconduct. Sci. Technol., vol. 22, pp. 153–157, 2007.
[20] H. Rücker, B. Heinemann, R. Barth, D. Bolze, J. Drews, U. Haak, W. Höppner, D. Knoll, K. Köpke, S. Marschmeyer, H. H. Richter, P. Schley, D. Schmidt, R. Scholz, B. Tillack, W. Winkler, H.E. Wulf, and Y. Yamamoto, “SiGe:C BiCMOS technology with 3.6 ps gate delay,” in IEEE Int. Electron Device Meeting Tech. Dig., 2003, pp. 531–534. [21] H. Rücker, B. Heinemann, W. Winkler, R. Barth, J. Borngräber, J. Drews, G. Fischer, A. Fox, T. Grabolla, U. Haak, D. Knoll, F. Korndörfer, A. Mai, S. Marschmeyer, P. Schley, D. Schmidt, J. Schmidt, K. Schulz, B. Tillack, D. Wolansky, and Y. Yamamoto, “A 0.13 m of 240/330 GHz and SiGe BiCMOS technology featuring gate delays below 3 ps,” in Proc. BCTM Conf., 2009, pp. 166–169. Erik Öjefors (S’01–M’06) received the M.Sc. degree in engineering physics and Ph.D. degree in microwave technology from Uppsala University, Uppsala, Sweden, in 2000 and 2006, respectively. In 2007, he joined the Institute of HighFrequency and Quantum Electronics, University of Siegen, Siegen, Germany. From 2008 to 2011, he was with the Institute for HighFrequency and Communication Technology, University of Wuppertal, Wuppertal, Germany. Since 2011, he has been a Senior RF Engineer with Sivers IMA AB, Kista, Sweden. Dr. Öjefors was the corecipient of the 2007 IEEE APS R. W. P. King Award, the 2008 European Microwave Integrated Circuits (EuMIC) Best Paper Award, and the 2010 European Microwave Conference (EuMC) Microwave Prize.
Bernd Heinemann received the M.S. degree in physics from the Humboldt Universität zu Berlin, Berlin, Germany, in 1984, and the Dr.Ing. degree in electrical engineering from the Technische Universität Berlin, Berlin, Germany, in 1997. In 1984, he joined the IHP GmbH (now the Innovations for High Performance Microelectronics), Frankfurt (Oder), Germany. From 1984 to 1992, he contributed to the development of epifree 0.8 m BiCMOS technology. Since 1993, he has been a member of a team involved with the exploration and technological implementation of SiGe HBTs. His research activities include the development and characterization of MOS and bipolar devices.
Ullrich R. Pfeiffer (M’02–SM’06) received the Diploma degree in physics and Ph.D. degree in physics from the University of Heidelberg, Heidelberg, Germany, in 1996 and 1999 respectively. In 1997, he was a Research Fellow with the Rutherford Appleton Laboratory, Oxfordshire, U.K. In 2000, his research was based on realtime electronics for a particle physics experiment with the European Organization for Nuclear Research (CERN), Geneva, Switzerland. From 2001 to 2006, he was with the IBM T. J. Watson Research Center, where his research involved RF circuit design, power amplifier design at 60 and 77 GHz, and highfrequency modeling and packaging for millimeterwave communication systems. In 2007, he led the Terahertz (THz) Electronics Group, Institute of HighFrequency and Quantum Electronics, University of Siegen, Siegen, Germany. Since 2008, he holds the HighFrequency and Communication Technology Chair with the University of Wuppertal, Wuppertal, Germany. Dr. Pfeiffer is a member of the German Physical Society (DPG). He was the recipient of a 2007 European Young Investigator Award. He was the corecipient of the 2004 and 2006 Lewis Winner Award for Outstanding Paper presented at the IEEE International SolidState Circuit Conference, the 2006 IBM Pat Goldberg Memorial Best Paper Award, the 2008 European Microwave Integrated Circuits (EuMIC) Best Paper Award, and the 2010 European Microwave Conference (EuMC) Microwave Prize.
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Band CMOS UWB Radar Transmitter With a BiPhase Modulating Pulsed Oscillator Sungeun Lee, Student Member, IEEE, ChoulYoung Kim, Associate Member, IEEE, and Songcheol Hong, Member, IEEE
Abstract—This paper presents a band CMOS UWB radar transmitter with highly accurate variable delay circuits and a biphase modulating pulsed oscillator. The UWB radar transmitter is composed of three blocks: variable delay circuits that consist of a digital synchronized counter and a Vernier delay line (VDL), a baseband control signal generator, and a pulsed oscillator. The VDL allows a high range accuracy level of several millimeters. Asymmetric signals generated by the baseband control signal generator can control the phase of each output pulse. Because the pulsed oscillator operates only for the duration of a pulse, it has an extremely low level of DC power consumption and no LO leakage. It is fabricated with 0.13 m CMOS technology and a chip with dimensions of 0.98 mm 0.69 mm. The output spectrum is centered at 26.0 GHz, and the pulse width is controllable from 280 to 680 ps. The peak output power is about 2 dBm. Index Terms—Automotive radar, CMOS ultrawideband (UWB) pulse generator, pulsed oscillator, shortrange radar (SRR), variable delay circuit, UWB radar transmitter.
I. INTRODUCTION
M
ANY research results have been reported since the frequency spectrum of 22 to 29 GHz was approved for use as an ultrawideband (UWB) signal by the Federal Communication Commission [1]. Although these UWB signals have a very low average power of not more than 41.3 dBm/MHz, they have a wide bandwidth of about 7 GHz; thus, they can provide enough transmission power to detect a target without interfering with other systems. Therefore, they are suitable for highresolution radar systems such as the shortrange radar (SRR) of automotive equipment. An automotive SRR can be utilized in precrash alarm system, stopandgo control, blind spot detection, and parking aids [2]. Generally, UWB radar systems can detect a target in the range of 30 m and they require a range resolution of less than 10 cm. In the early days, UWB radar circuits consisted of a transmitter, a receiver, and other system parts; they used a SiGe process or compound process such as GaAs [3]–[9]. However, Manuscript received November 10, 2011; revised February 13, 2012; accepted February 16, 2012. Date of publication April 03, 2012; date of current version April 27, 2012. This work was supported by the National Research Foundation of Korea (NRF), funded by the Korea Government (MEST), under Grant 20110000389). S. Lee and S. Hong are with the School of Electrical Engineering and Computer Science, Department of Electrical Engineering and Computer Science, Korea Advanced Institute of Science and Technology, Daejeon 305701, Korea (email: [email protected]; [email protected]). C. Y. Kim is with the Electronics Engineering Department, Chungnam National University, Daejeon, Korea (email: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2188814
Fig. 1. Block diagrams of (a) a common carrierbased UWB transmitter scheme and (b) the proposed pulsed oscillator scheme with a switching buffer.
due to the high cost and limited integration of these devices, a CMOS process has becomemore attractive. Moreover, as a result of considerable efforts to overcome the limitations of the low and the high loss substrate, the CMOS process has become a perfect substitute for other processes. In particular, in the UWB radar system, a baseband control signal generator and variable delay circuits can be designed with digital logic. A power amplifier (PA), which is the most difficult block to design in the CMOS process, can be obviated by using a power oscillator in a UWB radar system, since it does not require as much power. Consequently, the CMOS process is widely used and has the potential to be used in a CMOS UWB radar circuit [10]–[17]. There are two conventional methods of generating a short pulse for a UWB radar transmitter. The first method involves a timegating scheme of a continuous wave (CW) from a local oscillator (LO) using a switch as shown in Fig. 1(a), which is called a carrierbased UWB transmitter [3]–[7], [10]–[13]. In
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Fig. 2. Block diagram of the proposed UWB radar transmitter, including variable delay circuits, a BCSG, and a pulsed oscillator. A serialtoparallel interface (SPI) and a pseudonoise (PN) code generator are also integrated.
this way, the CW source, such as a voltagecontrolled oscillator (VCO), is locked in a phaselocked loop (PLL), and its locking time may be longer than a few microseconds. Thus, all the parts of the transmitter, including the VCO, must always be running to generate the short pulses. This structure consequently suffers from a relatively high level of power consumption. Another drawback of the first method is the LO leakage problem. Because the isolation between two ports of the SPDT switch used in a pulse former cannot be infinity, there must be some LO leakage and the leakage may degrade the receiver’s sensitivity. This problem can be solved by positioning the center frequency of the LO signal at 24.0 to 24.25 GHz of an ISM band [3], [5]; alternatively, an additional SPST switch can be used [11]. The second method is a pulsed oscillator scheme. As shown in Fig. 1(b), the oscillator scheme is turned on only for the duration of the pulse [8], [9], [14]–[16]. More power may be needed to reach a steady state in a very short time. However, the maximum detection range of the UWB radar is assumed to be about 30 m, and the pulse width of the output signal is assumed to be about 500 ps, which corresponds to a flight time of 200 ns and a range resolution of 7.5 cm, respectively. Under these conditions, the duty cycle of the system is about 1/400. In other words, even though the method consumes more power momentarily than the timegating scheme, the pulsed oscillator scheme drastically reduces the average power consumption. Moreover, because the oscillator is not required to operate continuously, the LO leakage signal can be removed completely. This paper presents the proposed band CMOS UWB radar transmitter with a pulsed oscillator scheme. It is composed of variable delay circuits, a baseband control signal generator (BCSG), and a pulsed oscillator with a TX/LO switches. The pulsed oscillator is capable of the biphase modulation using an asymmetric control of a differential oscillator as introduced in [14]. II. DESIGN OF THE CMOS UWB RADAR TRANSMITTER Fig. 2 presents a block diagram of the proposed UWB radar transmitter. It consists mainly of variable delay circuits for
highrange accuracy with a pulse position modulation (PPM), BCSG including biphase modulator, and a pulsed oscillator with TX/LO switches. An external clock signal whose period corresponds to pulse width is entered for the delay control circuit, which is to control the time delay in the step of a pulse width. The delay control circuit generates timing signals that determine the moments of transmission and delayed LO signals. In the BCSG, asymmetric control signals to activate the pulsed oscillator are generated at the timing moment. Finally, the pulsed oscillator transmits the UWB signals to the TX antenna and delivers the delayed LO signals to the LO port of the mixer in the receiver. Furthermore, the PPM and biphase modulation are adapted to efficiently spread the spectral lines in the spectrum of the output signal; this process enables the FCC’s spectral mask to be fully utilized [13], [18]. Since the output signal is encoded, it allows to have encoding gain and to identify its own signal. A. Variable Delay Circuits Fig. 3(a) shows a block diagram of variable delay circuits. A 9b digital synchronized counter controls the delay step in relation to the pulse width, and a Vernier delay line (VDL) is used for fine delay control. If the pulse width is assumed to be about 500 ps, and if the maximum detection range is assumed to be about 30 m, at least 400 steps (9 b) are needed. For example, when the delay control bit DELAY [0:13] is 00000111001010 , its timing chart is present in Fig. 3(b). Counter TX and Counter LO are rising only when the value of the counter becomes 1 and equals the control bit DELAY [5:13] , respectively. Because the period of the external CLK equals the pulse width, the time delay between Counter TX and Counter LO can be controlled in the step of a pulse width by an adjustment of the value of DELAY [5:13]. The delay cells t1 and t2 are inverter chains. They have the same structure but a little different size of transistor. Therefore, as signals pass through the VDLs, if two signals from the counter pass the delay cells as defined by the multiplexers, the time delays between VDL TX and VDL LO is increased
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Fig. 3. (a) Block diagram of the proposed variable delay circuits. It consists mainly of a 9b synchronized counter, a VDL for fine delay control, and a binarytothermometer decoder. (b) Simplified timing chart as an example of the proposed variable delay circuits.
slightly. In contrast, if two signals pass only multiplexers, the time delays must be the same. A binarytothermometer decoder determines the number of passed delay cells; thus the total timedelay difference caused by the VDLs is proportional to this number. This structure can be used to control the time delay in the 7ps step, which corresponds to a range accuracy of 1 mm. Consequently, the gap between the two baseband pulse signals VDL TX and VDL LO can match the desired difference in timedelay ( ps). Moreover, PPM can be easily achieved by just adding any number to the compared counter value. B. Baseband Control Signal Generator Fig. 4(a) shows a block diagram of the BCSG. It can generate two different short pulses that have different durations and rising edges by using a longer inverting delay cell , a shorter noninverting delay cell , and NANDgate. Making a difference in pulse duration is biphase modulation, as proposed in [14]. The multiplexer can alternate the pulses as the given modulation code. Fig. 4(b) shows a timing chart. The CLK1 and CLK2 signals are both used to switch the current sources of the differential pulsed oscillator; CLK TX and CLK LO are used for the output buffers as the TX/LO mode. Additionally, is the time difference between CLK1 and CLK2 whereas determines the length of the ontime of the pulsed oscillator. In other words, the value of determines the bandwidth and resolution of the system; and, as shown in Fig. 4(c), it can be tuned by connecting the varactors inside the inverter chain. C. Pulsed Oscillator With TX/LO Switches Fig. 5 shows the proposed pulsed oscillator. It is basically composed of an LC crosscoupled oscillator (M3, M4) and
Fig. 4. (a) Structure of the proposed BCSG that controls the current sources and output buffers of the pulsed oscillator. (b) Input and output signals of the baseband control signal generator. According to a biphase modulation code, the rising moment and pulse width of CLK1 and CLK2 are exchanged. (c) Inverter . The value determines chain; varactors are inserted for tuning the value of the pulse width and the resolution of the system.
active buffers (M5, M6). In addition, the respective current sources (M1–M2, M7–M10) are connected in series with them. The control signals from the BCSG switch the current source off and on; CLK1 and CLK2 handle the transistors M1 and M2 for the oscillation, and CLK TX and CLK LO handle the transistors M7–M10 for output buffering. The varactors are inserted for center frequency tuning, and the metal–insulator–metal (MIM) capacitors are used as dc block capacitors. As discussed above, an ultrashort pulse with a subnanosecond pulse width is needed for highrange resolution. For a pulsed oscillator scheme, the desired short pulses can be obtained by minimizing the turnon time between the startup moment and
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Fig. 5. Proposed pulsed oscillator with TX/LO switches and its baseband control signals. CLK1 and CLK2 are exchanged as a biphase modulation code.
Fig. 6. Equivalent circuit of the proposed pulsed oscillator core, including switches for the current source.
a steady state. In some previous works [15], [16], [19], the initial startup transient time of an LC oscillation was characterized and analyzed using the wellknown “vander Pol” nonlinear differential equation. Fig. 6 shows an equivalent circuit of the proposed pulsed oscillator, where L is the inductance of the centertap inductor; C is the total capacitance, including the varactors and parasitic capacitances; and is the equivalent resistance of an LC tank. Two switches, SW1 and SW2, are the transistors M1 and M2, respectively. And the crosscoupled pair is modeled in terms of the nonlinear negative conductance . The output voltage of the oscillator and its initial startup transient time are calculated as follows [19]: (1) Fig. 7. Operating principle and simulation results of the proposed biphase modulation with asymmetric control of the current source.
(2) is the oscillation frequency, is the where damping ratio, is the initial condition, and is the value that is related to the output amplitude. In (2), is the openloop gain and is the quality factor of the LC tank. As described in (2), a low capacitance of the LC tank and a high openloop gain are required for a fast turnon response,.
Thus, no additional capacitors are needed except the varactors for the center frequency tuning and the parasitic components of the LC tank. Furthermore, the transistors M3 and M4 must be sufficiently large to achieve a high . The generation of an ultrashort pulse requires a minimal turnoff time. However, the turnoff time of an oscillator is usually much longer than the turnon time. In this work, the turnoff time is determined by the switch characteristics, not by
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Fig. 10. (a) Measured digital output values of the BCSG (CLK1, CLK2, CLK_TX, and CLK_LO). CLK1 and CLK2 are asymmetric. (b) Time delay with respect to the delay control bits. Fig. 8. As two pairs of output buffer switches alternate their role in the TX/LO mode, the transmission signal and delayed LO signal can be delivered to the TX antenna and the LO port of the mixer, respectively.
becomes shorter than the turnon time; it is as fast as the case of the time gating scheme. Additionally, the principle of biphase modulation can be explained by using the same equation. In (1), the oscillation phase depends on the initial condition of the oscillator. A loop of the LC tank and the crosscoupled transistors specify the oscillation conditions (which are known as Barkhausen’s criteria). At that moment, the direction or phase of each current in equivalent circuit (Fig. 6) determines the value of . In this work, the two switches SW1 and SW2 control this condition. The oscillation condition is valid only when both switches are turned on. A change in the turnon sequence of SW1 and SW2 can consequently vary the direction of the instant current and alter the value of . Determining the exact values of is difficult. Nevertheless, the difference between two cases is 180 according to which one turn on firstly because the opposite direction can be changed by 180 . Thus
Fig. 9. Chip photograph of the fabricated CMOS UWB radar transmitter (chip area with pads: 0.98 mm 0.68 mm).
(3)
the response of the LC oscillation. When the control signals become 0, the generated signal in the pulsed oscillator diminishes in proportion to the RC time constant of the LC tank [16]. On the other hand, the switches that are connected in series with the output buffers can fundamentally block the propagation of the signal. Therefore, the turnoff time of the generated pulse
Fig. 7 presents the operating principle and simulation results of the proposed biphase modulation. The simulation results confirm that the output signals at the same nodes are phase modulated as the turnon sequence of the switches is changed. Furthermore, the UWB radar transmitter must generate the transmission signal as well as the delayed LO signal in order to measure the distance to the target. Two isolated signal paths
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Fig. 11. Measured output waveforms and spectra for pulse widths of (a) 280 ps, (b) 500 ps, and (c) 680 ps and an FCC spectral mask. (d) Spectral lines caused by periodic signals can be spread out by using biphase and pulse position modulations.
are needed because the transmission signal goes to the TX antenna and the delayed LO signal goes to the LO port of a down converting mixer. A conventional system requires an additional SPDT switch [3] or a power divider that separates the output of the VCO and two pulse formers [7], [12]. In this study, as shown in Fig. 6, the output buffers that deliver signals from two differential output nodes operate as TX/LO switches. Specifically, when the pulsed oscillator generates a transmission signal, only two transistors (M7 and M10) are on and they operate as output buffers; the other transistors (M8 and M9) are off as shown in TX mode of Fig. 8. The transmission signals are consequently delivered to the antenna node, but there are no signals at the LO port of the mixer. On the other hand, when a delayed LO signal is generated, the transistors M7–M10 change their states to each other (LO mode of Fig. 8). Whenever the pulsed oscillator generates the pulses, one of the two transistors composing the TX/LO switches is always on. Thus, the LC tank of the oscillator is unaffected by a mode change, which is the main function of the output buffer. Especially, the sequence of CLK1 and CLK2 should be changed at every mode change, as shown in the timing chart of Fig. 4(b), in order to ensure coherence between the transmitted signal and the received signal. All of the parts, including the pulsed oscillator and the output buffers with the TX/LO switches, consume power only for the duration of the pulse. Thus, the proposed pulsed oscillator has a low level of complexity and a high level of energy efficiency. III. MEASUREMENT RESULTS Fig. 9 shows a photograph of the designed CMOS UWB transmitter. It is fabricated with a 0.13 m CMOS mixed signal process. The digital parts including the variable delay circuits and the baseband control signal generator are under a metal fill pattern on the right side of the chip. The chip area (which includes the pads) is 0.98 mm 0.68 mm. Fig. 10(a) shows the output values of the digital blocks that act as control signals for the pulsed oscillator. These values are
the same as those in the timing chart of Fig. 4(b). The operating states are changed by adjustments to the timedelay, modulation codes and pulse repetition frequency (PRF). When the states change, the blocks generate periodic signals. The right side of Fig. 10(a) shows the asymmetric formation of CLK1 and CLK2. The timing difference of the two clocks for the biphase modulation is also confirmed. Fig. 10(b) plots the timedelay between CLK TX and CLK LO; the time delay is controlled by the variable delay circuits. As described above, the counterinduced delay is synchronized with an external clock signal, which means that the steps of the timedelay are fixed exactly to the period of the clock signal. In the case of the VDL, the steps have an error margin of less than 2 ps, which corresponds to a distance of about 0.3 mm. The measured waveforms of the output pulse are shown in Fig. 11. Changes in the bias of the varactors in the BCSG cause the pulse width to vary from 280 to 680 ps; this variation corresponds to a theoretical range resolution of 4.2 to 10.2 cm. Between the offstate and the steadystate, the turnon time is about 100 ps and the turnoff time is about 70 ps. As expected, although the timegating method can generate an ultrashort pulse, a startup time of about 100 ps is sufficiently fast to achieve a highresolution system. Fig. 11 shows the measured spectra of the output signal for when the system PRF is 5 MHz. The oscillation frequency, which is 26.0 GHz, can be positioned at the center of the FCC’s spectral mask. The peak output power (about 2 dBm) can fully specify the spectral mask provided the transmit antenna gain is about 15 dBi. This level of power can also maximize the performance of the downconverting mixer. Furthermore, the absence of any LO leakage signal means the system is free of any leakage problems. Additionally, Fig. 11(d) shows how the modulations spread the spectral lines. Without modulations, the spectral lines appear at PRF intervals, though the number of lines can be reduced by the BPSK and the PPM. The modulation technique ensures radar systems have encoding gain and high peak output power.
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TABLE I SUMMARY OF CMOS UWB RADAR TRANSMITTER SPECTRA
scheme is used because of its suitability for low power consumption and avoidance of LO leakage. The proposed output buffer structure operates as a set of TX/LO switches. The proposed biphase modulation technique, which uses asymmetric control of an LC oscillator, has low complexity and a high level of efficiency. The generated signal consequently has a minimum pulse width of about 280 ps and a peak power level of about 2 dBm. This simple energyefficient CMOS UWB radar transmitter is therefore suitable for highly accurate highresolution radar sensor systems. REFERENCES Fig. 12. Measured phase noise of the output pulses at 26 GHz.
The measured phase noise of the generated output pulses is shown in Fig. 12. As mentioned in [15], it can be verified that the pulsed oscillator is phase locked to the internal PRF signal that is generated in the variable delay circuits. It can achieve a relatively low phase noise of 99.2 dBc/Hz at 1 MHz offset, which results in a high pulsetopulse phase coherence. Table I summarizes the characteristics of recent works on UWB transmitters. The proposed CMOS UWB radar transmitter includes variable delay circuits, a BCSG, and a pulsed oscillator. These components are essential blocks in a UWB radar system. The output peak power is higher than that of most other designs, and it can generate a very short pulse despite the use of the pulsed oscillator. It can achieve longrange detection and a high level of range resolution. It also uses biphase and pulse position modulations. The biphase modulator, which relies on asymmetric control, is realized in the baseband domain; most of the BPSK requires additional RF blocks [3]. IV. CONCLUSION This paper proposes a CMOS UWB radar transmitter. A VDL is used for a high degree of accuracy, and a pulsed oscillator
[1] “First report and order, revision of part 15 of the Commission’s rules regarding ultra wideband transmission systems FCC, Washington, DC, ET Docket 98153, 2002. [2] M. Klotz, “An automotive shortrange high resolution pulse radar network,” Ph.D. dissertation, Dept. Telecommun., Technical Univ. Hamburg, Harburg, Germany, Jan. 2002. [3] I. Gresham, A. Jenkins, R. Egri, C. Eswarappa, N. Kinayman, N. Jain, R. Anderson, F. Kolak, R. Wohlert, S. Bawell, J. Bennett, and J.P. Lanteri, “Ultrawideband radar sensors for shortrange vehicular applications,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 9, pp. 2105–2122, Sep. 2004. [4] I. Gesham, A. Jenkin, R. Egri, C. Eswarappa, F. Kolak, R. Wohlert, J. Bennett, and J.P. Lanteri, “Ultra wide band 24 GHz automotive radar frontend,” in IEEE MTTS Int. Microw. Symp., June 2003, pp. 369–372. [5] E. Ragonese, A. Scuderi, V. Giammello, E. Messina, and G. Palmisano, “A fully integrated 24 GHz UWB radar sensor for automotive applications,” in Proc. IEEE Int. SolidState Circuits Conf., Feb. 2009, pp. 306–307. [6] A. Scuderi, E. Ragonese, and G. Palmisano, “24GHz ultrawideband transmitter for vehicular shortrange radar applications,” IET Circuits, Devices, Syst., vol. 3, no. 6, pp. 313–321, Dec. 2009. [7] V. Jain, F. Tzeng, L. Zhou, and P. Heydari, “A singlechip dualband 22–29GHz/77–81GHz BiCNOS transceiver for automotive radars,” IEEE J. SolidState Circuits, vol. 44, no. 12, pp. 3469–3485, Dec. 2009. [8] D. Kim, D. Kim, and S. Hong, “A 24GHz powerefficient MMIC pulse oscillator for UWB radar applications,” Microw. Opt. Technol. Lett., vol. 49, no. 6, pp. 1412–1415, 2007. [9] N. Deparis, C. Loyez, N. Rolland, and P.A. Rolland, “UWB in millimeter wave band with pulsed ILO,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 55, no. 4, pp. 339–343, Apr. 2008.
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[10] V. Jain, S. Sundararaman, and P. Heydari, “A 22–29 GHz UWB pulse radar receiver frontend in 0.18 m CMOS,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 8, pp. 1903–1914, Aug. 2009. [11] R. Xu, Y. Jin, and C. Nguyen, “Powerefficient switchingbased CMOS UWB transmitters for UWB communications and radar systems,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 8, pp. 3271–3277, Aug. 2006. [12] J. Yang, G. Pyo, C. Y. Kim, and S. Hong, “A 24GHz CMOS UWB radar transmitter with compressed pulses,” IEEE Trans. Microw. Theory Tech., accepted for publication. [13] J.C. Li, S. Jung, M. Lu, and K. Min, “A CMOS ultrawideband transmitter with biphase modulation for 22–29 GHz vehicular radar application,” in Proc. IEEE Int. Midwest Circuits Syst. Symp., June 2006, pp. 1331–1334. [14] S. Lee, S. Sim, and S. Hong, “A CMOS ultrawideband radar transmitter with pulsed oscillator,” in IEEE Radio Freq. Integr. Circuits Symp., May 2010, pp. 509–512. [15] A. M. ElGabaly and C. E. Saavedra, “A quadrature pulse generator for shortrange UWB vehicular radar applications using a pulsed oscillator and a variable attenuator,” IEEE Trans. Circuits Syst. I, Reg. Papers, submitted for publication. [16] A. T. Phan, J. Lee, V. Krizhanovskii, Q. Le, S.K. Han, and S.G. Lee, “Energyefficient lowcomplexity CMOS pulse generator for multiband UWB impulse radio,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 55, no. 11, pp. 3552–3563, Dec. 2008. [17] A. Oncu, B. B. M. W. Badalawa, and M. Fujishima, “22–29 GHz ultrawideband CMOS pulse generator for shortrange radar applications,” IEEE J. SolidState Circuits, vol. 42, no. 7, pp. 1464–1471, Jul. 2007. [18] Y. Nakache and A. Molisch, “Spectral shape of UWB signalsInfluence of modulation format, multiple access scheme and pulse shape,” in Proc. 57th IEEE Semiannu. Veh. Technol. Conf., Apr. 2003, vol. 4, pp. 2510–2514. [19] D. Barras, F. Ellinger, H. Jackel, and W. Hirt, “Lowpower ultrawideband wavelets generator with fast startup circuit,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 5, pp. 2138–2145, May 2006. Sungeun Lee (M’07) received the B.S. and M.S. degrees in electronics engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2007 and 2009, respectively, and is currently working toward the Ph.D. degree at KAIST. His research interests include CMOS RF integrated circuits (RFICs) and systems for shortrange radar.
ChoulYoung Kim (S’04) received the B.S. degree from Chungnam National University (CNU), Daejeon, Korea, in 2002, and the M.S. and Ph.D. degrees from Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2004 and 2008, respectively, all in electrical engineering. From March 2009 to February 2011, he was a Postdoctoral Research Fellow with the Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla. He is currently an Assistant Professor of electronics engineering with Chungnam National University, Daejeon, Korea. His research interests include millimeterwave integrated circuits and systems for shortrange radar and phasedarray antenna applications.
Songcheol Hong (S’87–M’88) received the B.S. and M.S. degrees in electronics from Seoul National University, Seoul, Korea, in 1982 and 1984, respectively, and the Ph.D. degree in electrical engineering from The University of Michigan at Ann Arbor, in 1989. In May 1989, he joined the faculty of the School of Electrical Engineering and Computer Science, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea. In 1997, he held short visiting professorships with Stanford University, Stanford, CA, and Samsung Microwave Semiconductor, Suwon, Korea. His research interests are microwave integrated circuits and systems including power amplifiers for mobile communications, miniaturized radar, millimeterwave frequency synthesizers, as well as novel semiconductor devices.
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A Sub10 nJ/b 1.9dBm Output Power FSK Transmitter for Body Area Network Applications Jens Masuch, Student Member, IEEE, and Manuel DelgadoRestituto, Member, IEEE
Abstract—This paper presents a lowpower frequency shift keying (FSK) transmitter using a direct voltagecontrolled oscillator (VCO) modulation scheme integrated in a 0.13 m CMOS technology. The carrier frequency is set with a finitemodulo fractional phaselocked loop (PLL) in order to achieve a low startup time of 5.5 s. The based VCO is directly modulated using simple pMOS transistors to change the tank capacitance. Measurements verify that the carrier frequency and the frequency deviation meet the requirements of the Bluetooth low energy standard up to 85 C even considering supply voltage variations of 1.0 V 10%. The FSK synthesizer only consumes 600 W and drives a power amplifier (PA) with a differential classE output stage. An integrated stepup transformer is used to upconvert the antenna impedance to a load impedance of 840 seen by the PA. The overall transmitter consumes 8.9 mA and delivers 1.9 dBm to the antenna, which means a total power efficiency of 17.4%. Index Terms—Bluetooth low energy (BLE), classE power amplifier (PA), frequency synthesizer, frequency shift keying (FSK) modulator, lowpower radiofrequency integrated circuit (RFIC) design, transformer.
I. INTRODUCTION
I
N body area network (BAN) applications, wireless sensor nodes are highly constrained in terms of power consumption. Energy sources usually consist of small batteries [1], [2], ultracapacitors supplied with energyscavenging techniques [3] or wireless power links based on inductive coupling [4], [5]. Hence, the power consumption of the sensor node limits either the lifetime, the possible dutycycle, or the communication range of the system, respectively. In order to meet these ultralowpower requirements, BAN transceivers use simple modulation schemes, such as on–offkeying (OOK) [6]–[8] or binary frequency shift keying (FSK) [2], [3], [7], [9]–[12]. The simplicity of only having to turn on and off the power amplifier speaks in favor of OOK, but it suffers from frequency pulling [13] and requires a large output peak power to deliver a given average power. FSK, on the other hand, requires a more sophisticated modulator, but it is less susceptible to frequency pulling due to its constant envelope nature. Manuscript received August 05, 2011; revised February 07, 2012; accepted February 09, 2012. Date of publication April 03, 2012; date of current version April 27, 2012. This work was supported in part by the Spanish Ministry of Science & Innovation under Grant TEC200908447, the Junta de Andalucía under Grant TIC02818, and the 2007–2013 FEDER Program. The authors are with the Institute of Microelectronics of Seville (IMSECNMCSIC), 41092 Seville, Spain (email: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2012.2188724
The recently introduced Bluetooth low energy (BLE) standard [14] employs FSK and defines relaxed accuracy requirements to allow for powerefficient modulators. Therefore, this standard is expected to extend the lifetime of small batterypowered wireless sensors, for example in health care or fitness applications, to months or even years. In this paper, a lowpower CMOS transmitter for the BLE standard using direct modulation of the voltagecontrolled oscillator (VCO) is presented. In the proposed implementation, the phaselocked loop (PLL) is opened during the transmission of the short BLE packets while the tank capacitance is digitally modulated. In a lowpower VCO with a large tank inductance, this requires capacitance steps below 100 aF to obtain the required frequency deviation of BLE. To this end, the proposed FSK modulator employs the digital – characteristic of simple pMOS transistors as the modulating elements. Measurements versus temperature and supply voltage variations confirm that this FSK modulator meets the requirements of BLE while calibration is only needed to compensate for process variations. This renders more elaborate and powerhungry modulation techniques, such as the mixerbased upconversion or inloop FSK modulation, unnecessary. The presented 1Mb/s FSK synthesizer achieves a power consumption of only 600 W, which is far below other comparable synthesizers that operate in the same frequency band and consume several milliwatts [10], [11], [15]. The FSK modulated signal is amplified by a differential classE power amplifier (PA) that delivers 1.9 dBm to the antenna. A stepup transformer is used at the interface between the PA and the antenna to increase the ohmic load to the PA. This allows to operate the complete transmitter from a single 1.0V supply while achieving an overall efficiency of 17.4%. This paper is organized as follows. In Section II, the architectural considerations of the transmitter are presented, while Section III shows the details of the VCO with direct FSK modulation. Section IV describes the design of the PLL as well as the techniques employed to reduce carrier frequency drifts during data modulation. In Section V, the PA with the transformer is described, and, afterwards, Section VI summarizes the measurement results. Finally, Section VII concludes the paper. II. FSK MODULATION AND TRANSMITTER ARCHITECTURES Different approaches can be used for FSK modulation as required by the BLE standard. High accuracy can be achieved by using the mixerbased approach shown in Fig. 1(a) [2], [11], [15]. In this topology, a digital modulator processes the transmit data to generate a set of quadrature baseband signals. These and signals are then converted to the analog domain by means
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Fig. 1. FSK modulation architectures: (a) mixerbased, (b) closedloop moduPLL, and (c) openloop using direct VCO modulation. lation using a
of digitaltoanalog converters (DACs) and finally frequencyshifted in one or more steps to the transmission carrier frequency by means of mixers (in Fig. 1(a), a singlestep direct upconversion approach is represented). As modulation is realized in the digital domain, narrowband channel filtering can be easily accomplished allowing for low transmission bandwidth occupation. Moreover, the architecture is highly flexible and can be used not only for FSK modulation but for any arbitrary modulation type. However, the power consumption of the mixerbased topology is high, typically above 10 mW [11], [15], which renders the approach poorly suitable for BAN applications. A second approach simply adds the FSK modulation to the carrier frequency setting of the PLL, as shown in Fig. 1(b). Higher PLL resolutions are achieved by using fractionalPLLs with modulators [16], [17]. In principle, this technique is both simple and accurate because the FSK modulation is added in the digital domain. However, the loop bandwidth of the PLL acts as a lowpass filter on both the FSK modulation and the quantization noise of the modulator, leading to a fundamental tradeoff between transmission rate and phase noise. On the one hand, a low loop bandwidth is needed to filter out the quantization noise and, on the other, the loop bandwidth must be sufficiently large to preserve the FSK modulation. In order to relax this tradeoff, a possible solution consists on preemphasizing the FSK modulation signal to make its bandwidth much larger than that of the PLL [16]. Unfortunately, preemphasis can only be as accurate as the prediction of the PLL transfer function and, therefore, it is hardly feasible in a fully integrated solution where the VCO gain is essentially nonlinear [18]. Alternatively, if a high PLL bandwidth is used, complex compensation techniques must be employed to adaptively cancel the quantization noise of the modulator. Such compensation schemes usually employ
powerhungry DACs and raise the power consumption of the FSK modulation stage by several milliwatts [17], [19], [20]. Finally, the FSK modulated signal can also be generated by means of direct openloop VCO modulation [3], [10], [21]. A PLL is used to set the carrier frequency and then disconnected so that modulation can be directly fed into the VCO, as shown in Fig. 1(c). The main advantage of this technique is that very little additional hardware is needed, thus leading to very low power consumption. Moreover, the transmission rate is not constrained by the PLL bandwidth, which allows to increase the data rate easily up to several Mb/s [12]. However, as the PLL remains open during transmission, the unlocked VCO becomes susceptible to frequency drift due to leakage currents. Therefore, unlike the previous approaches, the technique is unsuitable for continuous modulation, but it can be exploited in communication schemes that employ short transmission bursts.1 Therefore, the proposed BLE transmitter, shown in Fig. 2, is based on the openloop direct VCO modulation technique. This is possible because BLE data packages have a maximum length of 376 s, which is sufficiently short to keep frequency drifts during data transmission within the specifications of the standard. Also, the permitted spread of the FSK modulation index of is sufficiently wide so that direct VCO modulation, implemented in analog domain, is able to underlie process, supply voltage, and temperature (PVT) variations [14]. In the architecture of Fig. 2, a quadrature VCO (QVCO) has been represented although, in practice, only one of the two cores is used for transmission. This is because the transmitter is to be part of a complete transceiver in which the frequency synthesizer is reused by a quadrature receiver. The carrier frequency of the transmitter is set by a finitemodulo fractional PLL and uses a nondithered modulator to generate the fractional part of the divide ratio [23]. In our design, a firstorder modulator consisting of an accumulator that overflows at a value of 10 has been used. The overall divide ratio is given by (1) Using a 20MHz reference clock , the PLL provides the 2MHz channel spacing specified by the BLE standard. Further details on the implementation of the PLL, as well as on the strategies followed to minimize charge leakages during data transmission and, thereafter, drifts of the carrier frequency, are presented in Section IV. Due to the short targeted communication range and the limited energy resources, BAN transmitters usually deliver output powers of the order of 1 mW [9], [10], [13], [15], [24]. Due to the constantenvelope modulation scheme defined by the BLE standard, linearity is not a major concern, however, the design of an efficient PA at such low radiated power levels is certainly challenging. Among possible solutions, the use of injectionlocked power oscillators has been demonstrated to be a powerefficient 1It should be noted that direct VCO modulation may also be applied on a lowbandwidth closed PLL if the data signal has no dc content [22]. In this case the PLL is active all the time avoiding drift issues and only acts as a highpass filter on the data signal without corrupting it. However, this technique is not applicable for the BLE standard with its dccarrying line code.
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Fig. 2. Block diagram of the lowpower transmitter with inactive portions grayed out.
Fig. 3. Currentreuse thin gate oxide
QVCO with the inphase core nm .
activated only. The quadrature core
alternative [13]. The power oscillator is essentially an oscillating PA with its distinct freerunning frequency and, hence, it requires an additional calibration stage outside the PLL to align its locking range with the carrier frequency. It is also possible to use very low supply voltages to achieve good efficiency at low output power levels [9], [13], but this makes the design of the remaining blocks of the transceiver and, eventually, the complete wireless sensor even more challenging. In the proposed transmitter, which operates at a single 1.0V supply voltage, a frontend transformer boosts the antenna impedance to improve the efficiency of a classE PA [15], [24]. III. QVCO WITH DIRECT MODULATION Fig. 3 shows the schematics of the QVCO. The cores use complementary crosscoupled nMOS and pMOS pairs that reuse the bias current and provide the negative resistances needed to cancel the losses of the tanks. Assuming that the tank losses are dominated by the integrated spiral inductor, the loss conductance of the tank may be approximated as (2)
is displayed in gray. All transistors have a
is the quality factor of the inductor at the carrier where frequency . According to (2), the loss conductance and, hence, the required bias current is minimized by choosing the largest tank inductance that still allows resonance of the tank at the desired frequency, taking into account all dedicated and parasitic tank capacitance as well as process variations. To minimize the tank capacitance, small transistors are used in the crosscoupled transconductor with gate widths of 12 m. For the 2.4GHz QVCO, this allows to use a sixturn, 10.2nH inductor. Note that this large inductance minimizes at the expense of a reduced quality factor of 13.3. This leads to a slightly degraded phasenoise performance, which is still acceptable to fulfill the BLE requirements. During the transmit mode, the Qcore is disabled by simply steering all of its bias current to the Icore, which effectively doubles its current as compared to the receive mode, in order to increase the oscillation amplitude to almost railtorail swing. This allows to relax the power demand of the LO buffers that connect the Icore to the PA (see Fig. 2), resulting in an overall current consumption lower than if no current steering between the cores were applied.
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Frequency tuning has been implemented by using a conventional twostep approach. Coarse tuning to compensate for process variations is accomplished with a switched metal–oxide–metal (MOM) capacitor bank controlled by the digital 4b tune word. Accumulationmode MOS varactors allow for fine control of the carrier frequency within the PLL through the analog control voltage . These Ptype varactors decrease the oscillation frequency for increasing and obtain a negative VCO gain of about 65 MHz/V. Direct VCO modulation is realized by modulating the capacitance of the tank [3], [10], [21]. The BLE data rate of 1 Mb/s and the FSK modulation index of nominally impose a frequency deviation of 250 kHz [14]. Assuming , this frequency deviation implies a differential tank capacitance step given by,
Fig. 4. Simulated gate capacitance 0.15 m, 0.13 m, sistor (
of a minimumsized pMOS trannm, 0.3 V).
(3) are, respectively, the inductance and total cawhere and pacitance of the tank, and represents the carrier frequency. It is worth observing the tiny values that can take. For instance, for the tank inductance of 10.2 nH used in our design, is only 85 aF, assuming 2.44 GHz. Such small capacitance changes for direct VCO modulation can be implemented by using an additional tank varactor. This, effectively, translates the required capacitance change into a voltage step that can be generated by means of a DAC [10]. The approach also allows to shape the driving voltage in order to reduce the occupied bandwidth, but it incurs in increased power and area consumptions due to the required DAC and the following reconstruction filter. Alternatively, the two control voltages that correspond to the two modulation frequencies can be stored on large memorization capacitors [21]. This solution allows for arbitrary and, in principle, accurate FSK modulation indexes as they are set by the PLL. However, this approach leads not only to a large area overhead due to the capacitors and associated buffers but also to a longer startup time because of the need for a calibration phase before modulation. Our design employs a digital approach inspired by the tuning strategy used in digitally controlled oscillators (DCO) [25]. The idea is not to adjust the analog control voltage of a varactor but to digitally select that incremental tank capacitor, among a finite set of instances, which better meets (3). The basic building block in this “spare box” approach is a simple pMOS transistor with the gate connected to the oscillating tank and the remaining terminals tied to a common control voltage . By switching this voltage from rail to rail, the pMOS transistor alternates between two states with a gate capacitance difference in the order of tens of aFs as requested in (3). This is illustrated in Fig. 4 for a minimumsized pMOS transistor in the selected technology. Our approach for direct QVCO modulation consists in exploiting the capacitance gap between these states to implement the requested frequency deviations. In order to allow for a positive and a negative frequency deviation, two differential pMOS transistor pairs are required. This leads to the modulator cell shown in Fig. 5. Setting both modulation inputs to leads to a capacitance
Fig. 5. Modulator cell for direct VCO modulation using four thinoxide pMOS 2 nm . transistors
increment and hence to a negative frequency deviation. On the other hand, setting both inputs to ground results in a positive frequency shift. The intermediate state with one input to ground and the other one to is needed to set the QVCO to the carrier frequency when the PLL is closed. To take care of the impact of process variations on the gate capacitance of pMOS transistors, five modulator cells with slightly different dimensions have been attached to each QVCO core. Due to the serial connection of two transistors, approximately twice the minimum gate area is needed for the required differential capacitance step of 85 aF. Hence, the gate width of the pMOS transistors ranges from 0.18 to 0.28 m with 250nm increments while the gate length is 0.15 m for all cells. By means of calibration (which could be automatized with builtin self programming techniques), the modulator cell that better approximates the capacitance jump in (3) is selected for direct modulation, whereas the remaining cells have their voltages tied to ground. Due to the small size of the pMOS transistors, the additional tank capacitance of this array is negligible with respect to the total tank capacitance. The generation of the modulation signals as well as their demultiplexing to the selected modulator cell is performed by the modulation control block in the digital domain (see Fig. 3). Concerning supply voltage variations, the digital switching characteristic of the pMOS – curve (Fig. 4) is intrinsically robust due to the almost constant gate capacitance around 0.0–0.4 V and 1.0–1.2 V. With respect to temperature variations, simulations show that within the industrial temperature range of 40 C to 85 C the capacitance step stays within 4% of its absolute value. Hence, the resulting variation of the FSK frequency deviation is only approximately 2% due
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Fig. 6. Pulse swallow divider allowing integer divide ratios from 120 to 128. Fig. 7. Baseband section of the PLL.
to the squareroot relation between tank capacitance and oscillation frequency. Therefore, in contrast to process variations, no further calibration versus temperature or supply voltage fluctuations is needed for the proposed FSK modulator cell. Switching the same capacitance step of for all channels in the 2.4GHz ISM band adds a deterministic error. The actual modulation index will be different at the two outermost channels of the band due to the different total tank capacitance. According to (3) and with the data rate , the actual modulation index can be calculated as (4) showing a cubic proportionality with the carrier frequency . However, considering the two extreme carrier frequencies of 2.402 and 2.48 GHz, the resulting error of the modulation index is only about 5% and, thus, well below the 10% limit of the BLE standard. Moreover, as this error is deterministic, it can also be taken into account by the calibration. IV. PLL DESIGN As mentioned in Section II, a finitemodulo fractional PLL architecture has been chosen to support the required 2MHz channel spacing using a reference frequency of 20 MHz. This allows for a high loop bandwidth of 1 MHz and, hence, a short startup time of a few microseconds considering the stability limit of [26]. This is essential in applications that sporadically transmit small amounts of data, as it is the case of wireless sensor networks. The programmable divider of the PLL uses the pulseswallow architecture shown in Fig. 6 to provide integer divide ratios from 120 to 128. The fractional functionality is obtained by modulating this divideratio with a firstorder modulator, as explained in Section II. The prescaler utilizes the phaseswitching architecture [27] and is based on a previous work [28]. To minimize its power consumption, the divider employs dynamic logic cells, namely, true singlephase clocked (TSPC) flipflops [29] as well as dynamic singletransistor clocked latches (DSTC) [30] at the input stage of prescaler. Note that the divider may be powered down during data transmission since the PLL is opened during that period of time. However, due to its low power consumption, the divider is permanently activated in the presented implementation in order to allow for timedomain measurements of the actual FSK frequency deviation, as explained in Section VI. The baseband section of the PLL is shown in Fig. 7 together with the most important design parameters. It is a conventional typeII thirdorder charge pump PLL with a loop bandwidth of
1 MHz and a phase margin of 55 [26]. Two elements are added to the basic design to allow for openloop modulation. First, a lowleakage transmission gate is used to disconnect the loop filter (LF) from the charge pump. Second, a buffer is added to prevent leakage to the QVCO. The transmission gate for opening the PLL needs a low onresistance to not affect the PLL in closedloop mode and a sufficiently high offresistance to prevent leakage and hence frequency drift. On the one hand, the tolerable leakage current can be calculated from (5) where is the frequency drift rate, is the total loop filter capacitance, and is the gain of the QVCO. For the BLE drift rate specification of 400 Hz s, the leakage current may be up to 26 pA. On the other hand, the onresistance of the transmission gate and the associated voltage drop effectively reduces the dynamic range of the charge pump. Assuming a peak voltage drop of 80 mV, the required onresistance should be 1 k . To meet both requirements, a transmission gate with thick oxide transistors has been implemented. An additional design parameter is the total charge injected to the loop filter when switching off the transmission gate, since this charge affects the control voltage and hence the center frequency during transmission. Therefore, a complementary switch is used which tends to cancel the injected charge due to the opposite sense of the edges at the gates of the pMOS and nMOS transistor, respectively. To equalize the parasitic gate–drain capacitance transistors with equal widths are employed. The LF buffer employs a simple PMOSinput differential amplifier with transistors in week inversion. Operating the transistors in their subthreshold region allows to maintain a large voltage swing at the input and output of the buffer and, hence, to use almost the complete railtorail tuning range of the QVCO. Both the transmission gate and the LF buffer have little impact on the PLL dynamics. First, the parasitic capacitance of the transmission gate is negligible compared to the total loop filter capacitance. Second, the additional pole due to the LF in the PLL transfer function is at approximately ten times the loop bandwidth. V. POWER AMPLIFIER Switching type classE PAs are known for their good drain efficiency but high nonlinearity. As linearity is not an issue for constantenvelope output signals, they are frequently used for the amplification of frequency or phasemodulated signals [15],
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TABLE I TRANSFORMER PARAMETERS
Fig. 8. Illustration of the 2–6 stepup transformer used for upconversion of antenna impedance. The gray coil (two parallel windings with two turns each) connects to the antenna and the black coil (six turns) to the internal PA.
[31], [32]. While efficiencies as high as 65% have been achieved for classE amplifiers with an output power of the order of 1 W [32], [33], much lower values of around 10% are usually reported for PAs with milliwatt output power levels [11], [15], [24]. To design an efficient PA, we have considered a differential structure and made a careful choice of its load impedance for the desired output power level and supply voltage. A fully differential structure has the advantage that it presents not only symmetric loading to the LO but also shifts the supply lines switching noise generated by the PA to twice the carrier frequency, where it can be filtered more efficiently [34]. Assuming ideal conditions, the maximum output power of a differential classE amplifier can be calculated from [34] (6) where and are the supply voltage and differential load resistance, respectively. Therefore, optimization of a classE PA for low output power levels requires to either lower the supply voltage [9], [13], or increase the load resistance. In order to use a common supply for the complete transmitter, the former option is dismissed in the presented solution and the supply voltage is set to 1.0 V. Using this constraint, and considering an output power of 0 dBm, the required differential load resistance is 2.3 k . If losses in a practical implementation are taken into account, the required differential load resistance seen by the differential classE stage decreases to values on the order of 1 k . In the proposed PA, a transformer is used to convert a differential antenna impedance of 100 to the required differential PA load impedance. The transformer arrangement also allows to connect a singleended antenna by simply tying one of the antenna terminals of the transformer to ground [15]. Fig. 8 shows the square symmetric stepup transformer with a turn ratio of 2:6. In order to reduce ohmic losses, the antenna coil consists of two parallel windings with two turns each. This also helps to
Fig. 9. Schematic of the PA with annotated transistor sizes . oxide thickness
and gate
improve the coupling factor between the two coils and, hence, reduce the insertion loss of the transformer [35]. The electrical behavior of the transformer has been characterized using a 2.5D electromagnetic solver. The resulting parameter set was then fitted into a direct form model of the transformer [35]. The most significant parameters of the model are presented in Table I. According to this model, the transformer exhibits an insertion loss of 1.8 dB in simulation and converts the antenna impedance into a 840 load for the differential PA. The complete classE PA is shown in Fig. 9. It uses thinoxide transistor switching pairs (M1,M2) and a single thickoxide transistor cascode stage to take advantage of the high speed capabilities of the former and the higher breakdown voltage of the latter. Note that the drain voltages of M3 and M4 can rise up to two to three times in a practical classE amplifier [34]. There are four parallel branches of switching pairs for programming purposes. A set of inverterbased LO buffers are associated with each switching pair. They are disabled, along with the switching pair, when the corresponding branch enters in a power backoff mode. This way the power consumption of all of the LO buffers scales with the output power configuration. Because of the classE operation, the best efficiency is achieved when all parallel branches are activated. The impedance transformation also allows for a simple protection scheme against electrostatic discharge (ESD) events. In Fig. 9, the devices that need ESD protection are the transistors M3/4, which have a breakdown voltage of approximately 6 V. The protection is implemented with small ESD diodes that steer the ESD current from the antenna pads to the existing clamps of the supply rails. This effectively limits the voltage at the antenna
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Fig. 10. Micro photograph of the lowpower transmitter with a die area of 1.4 mm 1.1 mm (1.54 mm ). The QVCO can be seen on the lefthand side and the transformer on the right.
to a diode voltage above . Therefore, the internal voltage at the drains of M3/4 is limited to three times this value due to the impedance transformation. Hence, the ESD diodes at the antenna pads provide indirect ESD protection for the internal transistors M3/4. Under normal operation of the transmitter, these diodes are reversely biased adding only a small parasitic capacitance to the antenna port. VI. MEASURED RESULTS The proposed lowpower transmitter has been implemented in a 130nm CMOS process with six metal layers including a thick top metal layer (Fig. 10). Note that the VCO used by this transmitter is one core of a QVCO that has been integrated to allow for adding an I/Qreceiver path to this architecture. All measurements have been carried out with the assembled chip (QFN36 package) soldered onto a test board. For test purposes, the differential 100 outputs have been converted into the singleended 50 standard impedance using a surfacemount balun (WEBAL 748421245). The startup timing of the fractional PLL is shown in Fig. 11(a). A fast settling within 5.5 s is observed, due to the 1MHz loop bandwidth of the PLL. This is well below the minimum interframe spacing of 150 s defined by the BLE standard, which allows to switch off the synthesizer between two data packets in order to save power. The power spectral density of the locked PLL in Fig. 11(b) has been measured with an Agilent E4440A spectrum analyzer showing that, within the PLL bandwidth, the phase noise is attenuated below 95 dBc/Hz. Note that the fractional PLL generates fractional spurs at multiples of due to the finite modulo of 10. However, during data transmission the PLL is not locked and, hence, only the freerunning QVCO phase noise affects the output spectrum. Fig. 12 shows the unlocked phasenoise level of the QVCO with one active core of 118.5 dBc/Hz at an offset of 2.5 MHz. Note that with the opened PLL a reference spur at
Fig. 11. Measured startup behavior of the PLL. (a) Startup timing showing (bottom). the 20MHz reference clock (top) and the QVCO control voltage (b) Power spectral density of the locked PLL after startup.
Fig. 12. Measured freerunning singlesideband phase noise of the QVCO with one active core using two different resolutions bandwidths (RBWs).
20 MHz is present which is caused by parasitic substrate coupling. However, its power level of 71.2 dBc is sufficiently low to easily comply with the BLE spurious emission requirements. The control signals of the transmitter for opening the PLL and starting the modulation, as well as the actual data stream to be transmitted, have been synthesized using an FPGA to allow for a flexible test setup. The FSK modulation can be evaluated in time domain by observing the delay between edges
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Fig. 13. Measured evolution of the delay time between rising edges of and divider output when the PLL is opened ( the reference clock 2.44 GHz, ).
Fig. 14. Measured FSK modulation index for all calibration values ( 1.0 V, 25 C) and the calculated trendline calculated with (4).
of the PLL reference clock, , and the output of the fractional divider, . With the PLL closed, these two signals are phaselocked whereas during openloop modulation the divider acts as a sensor for the VCO output. Considering a VCO output frequency of with the carrier frequency being set to and being the FSK modulation portion, the delay between the reference clock and the divider output clock can be expressed as (7) where denotes the initial delay at the beginning of the integration. Fig. 13 shows three different cases of the evolution of this delay when the PLL is opened for 400 s and then closed again for 100 s. In the first case no data is sent, meaning that the FSK modulator remains in its intermediate state and . Consequently, the delay stays almost constant throughout the opening time of the PLL. The other two cases show the linear evolution of the delay for an allzeros 250 kHz and an allones 250 kHz data packet, as expected from (7). This property of integrating the actual frequency deviation into a delay time could also be utilized in a selfcalibrating scheme, which is currently not included in the presented transmitter. Once the PLL is closed the delay returns to an integer multiple of a reference clock period of 50 ns, with an offset caused by the delay of the I/O buffers. Fig. 14 shows the modulation index for the five possible calibration words, measured in frequency domain using the Agilent E4440A PSA spectrum analyzer. It can be seen that for the calibration word , the modulation index stays within the 0.5 10% limit along the 2.4–2.48GHz ISM band. For all calibration words, the typical frequency dependency in (4) can be observed. The accuracy of the modulation index with respect to temperature variations is shown in Fig. 15. It reveals a positive temperature coefficient of approximately 6%/100 C, from 15 C to 85 C, which allows to keep the modulation well within the BLE limits. Regarding the impact of supply variations, it has been observed that the modulation index remains within 1% from 0.9 to 1.25 V. The effect of leakage is illustrated in Fig. 16, which shows the frequency drift rate with temperature using the timedomain
Fig. 15. Measured FSK modulation index ( 2.44 GHz, 1.0 V).
Fig. 16. Frequency drift rate 1.0 V).
versus temperature for
versus temperature (
2.44 GHz,
measurement method described before. Beyond 50 C an exponentially rising drift rate is observed. This is caused by the leakage current that discharges the loop filter capacitance. However, the drift rate stays below 400 Hz s and meets the BLE requirements. The power spectral density (PSD) of the transmitter while sending random data packets at 1 Mb/s is shown in Fig. 17. Packets with the maximum BLE length of 376 b and a repetition period of 396 s have been used. The modulation starts 10 s after opening the PLL. As soon as the packet transmission has completed, the PLL is closed again for another 10 s for resettling. The time between two packets is kept intentionally
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TABLE II PERFORMANCE SUMMARY
Fig. 17. Transmitter output PSD with FSK modulation index of 0.5 and a data rate of 1 Mb/s. The red dashed line represents the BLE limit of the inband spurious emissions converted to a 10kHz resolution bandwidth.
Fig. 19. Energyperbit ratios of recent BAN FSK transmitters with corre. sponding power efficiency
Fig. 18. Measured output power of the PA for different power setting.
small in order to obtain a high overall duty cycle for data transmission of 376 s 396 s . Therefore, the measured PSD at the spectrum analyzer is only 0.2 dB below the actual instantaneous PSD during transmission. However, the short time between packets causes a small peak in the measured PSD at the carrier frequency. The spurious power level at the adjacent channels at 2 and 3 MHz offset is below 40 and 46 dBc, respectively, leaving plenty of margin to the limit defined by the BLE standard. Finally, the PA of the transmitter has been characterized using an Agilent EPM4418A power meter. Fig. 18 shows the measure output power of the transmitter after deembedding the losses on the test board which are mainly caused by the external balun. The maximum output power and efficiency is achieved close to 2.4 GHz, which could be traced back to an underestimated parasitic capacitance of the transformer. The transmitter draws a total of 8.9 mA from a 1.0V supply where the PA (incl. LO buffers), the VCO and the PLL consume 8.3 mA, 350 A, and 250 A, respectively. At the maximum output power an overall power efficiency is achieved, with the power efficiency being defined as (8) and are the RF power delivered to the antenna where and the dc power dissipated by the transmitter, respectively.
For the lowest output power setting ( 5.7 dBm), the current drawn by the PA and LO buffers is reduced to 3.1 mA, leading to a power efficiency of 7.3%. The measured performance of the transmitter is summarized in Table II. Fig. 19 compares the proposed transmitter with recently published lowpower FSK transmitters based on the required energy per transmitted bit and the power efficiency. An energyperbit of 8.9 and 3.7 nJ/b is achieved for the high and low output power levels, respectively, while maintaining competitive power efficiencies. VII. CONCLUSION The proposed transmitter shows that accuracy requirements of the BLE standard can be met using the simple and very powerefficient direct VCO modulation technique, rendering more powerhungry FSK modulation techniques unnecessary. To take advantage of large VCO tank inductances concerning power consumption, a capacitance step as small as 85 aF is needed. To this end, a modulator cell that employs the gate capacitance of a pMOS transistor is introduced to switch the VCO tank capacitance. Because of its digital – characteristic, the PMOSbased modulator is intrinsically robust against supply voltage variations. The prototype has been successfully tested from 15 C to 85 C and a supply voltage 1.0 V 10%, showing that the FSK frequency deviation stays well within the BLE limits of 250 kHz 10%. To efficiently deliver an output power of 1.9 dBm, the antenna impedance is upconverted internally using a stepup transformer. This allows to use the single 1.0V supply voltage also for the differential classE PA. The complete transmitter achieves a power consumption of 8.9 mW while sending BLE packets at a data rate of 1 Mb/s with an overall power efficiency of 17.4%.
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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 60, NO. 5, MAY 2012
REFERENCES
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Jens Masuch (S’09) was born in Rostock, Germany, in 1978. He received the B.S. degree (with high honors) in electrical engineering from the Milwaukee School of Engineering, Milwaukee, WI, in 2002, and the M.S. degree in information technology from the Mannheim University of Applied Sciences, Mannheim, Germany, in 2004. He is currently working toward the Ph.D. degree at the Institute of Microelectronics of Seville, Centro Nacional de Microelectrónica, Consejo Superior de Investigaciones Científicas, Seville, Spain. From 2004 to 2008, he was with Atmel Germany GmbH, Heilbronn, Germany, where he worked on several analog building blocks for UHF and HF RFID transponder ICs. His research interests are lowpower wireless transceivers for body area networks and RF energy harvesting.
MASUCH AND DELGADORESTITUTO: SUB10 nJ/b
1.9dBm OUTPUT POWER FSK TRANSMITTER FOR BAN APPLICATIONS
Manuel DelgadoRestituto (M’96) received the M.S. and Ph.D. degrees (with honors) in physicselectronics from the University of Seville, Seville, Spain, in 1990 and 1996, respectively. He is currently a Senior Researcher with the Institute of Microelectronics of Seville, Centro Nacional de Microelectrónica, Consejo Superior de Investigaciones Científicas, Seville, where he heads a research group on lowpower medical microelectronics. He has authored/edited three books, around 20 chapters in contributed books, and some 150 articles in peerreviewed specialized publications. His research interests are in the design of silicon microsystems to understand biological neural systems,
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the development of neural prostheses and brainmachine interfa