The Introduction to Analog and Digital Circuits book is written for students who are interested in learning the fundamen
157 21 5MB
English Pages [140] Year 2018
Introduction to
Analog & Digital Circuits Lab Manual
Brian K. Dean Oakland University
Software used to create the figures was Microsoft Visio 2016, Aldec Active-HDL 9.3, and PSPICE Student 9.1.
Cover image © Shutterstock.com
www.kendallhunt.com Send all inquiries to: 4050 Westmark Drive Dubuque, IA 52004-1840 Copyright © 2018 by Kendall Hunt Publishing Company ISBN: 978-1-5249-8982-8 All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any means, electronic, mechanical, photocopying, recording, or otherwise, without the prior written permission of the copyright owner. Published in the United States of America
Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v Lab 0 Laboratory Equipment and Prototyping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Lab 1 Introduction to Transistor-to-Transistor Logic (TTL) . . . . . . . . . . . . . . . . . . . 13 Lab 2 Digital Design and Light Emitting Diodes (LEDs) . . . . . . . . . . . . . . . . . . . . . 23 Lab 3 Introduction to Field-Programable Gate Arrays (FPGAs) and Hardware Description Language (HDL)—Adder Circuit . . . . . . . . . . . . . . . . . . . . . . . . . 35 Lab 4 Digital-to-Analog Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Lab 5 Direct Current (DC) Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Lab 6 Alternating Current (AC) Circuits and Filtering . . . . . . . . . . . . . . . . . . . . . . . 91 Lab 7 Operational Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 Lab 8 Introduction to Instrumentation and Measurement— The Strain Gauge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 Appendix A Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
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Introduction to Analog and Digital Circuits—Laboratory Manual Introduction The Introduction to Analog and Digital Circuits laboratory manual is written for students who are interested in learning the fundamental element of electrical circuits from an engineering perspective. The manual provides detailed instructions for nine laboratory assignments divided into an introduction, four digital labs, and four analog labs. The digital labs begin by reinforcing fundamental digital design using classical Transistor-To-Transistor Logic (TTL) implementations and end with modern Hardware Description Language (HDL) design for implementation on a Field-programmable Gate Array (FPGA). The analog labs cover the foundational topics of Direct and Alternating Current (DC and AC), Filters, Operational Amplifiers, and Instrumentation.
Layout of the Laboratory Exercises To guide the learning process, each lab begins with a list of learning objectives, an introduction, and a pre-laboratory exercise. Following these items is the laboratory procedure that provides a step-by-step set of instructions designed to guide the hands-on portion of each experiment. The learning objectives represent the minimum knowledge to be gleaned from each exercise. Some of the objectives represent knowledge required to complete future lab experiments. Students will likely gain more from each experiment than what is listed in the objectives list. The introduction section of each lab provides key background information required to complete the exercise. The information is communicated at a high-level and is only intended to introduce the topics. Interested readers can gain deeper knowledge from the companion textbook. The pre-laboratory exercise is a series of preliminary tasks that are to be completed prior to commencing the hands-on portion of the lab. A prelab is designed to accomplish one or more of the following tasks: guide the design of the experiment, establish a theoretical foundation through circuit analysis or simulation, v
vi Analog & Digital Circuits
form a quantitative or qualitative baseline against which all laboratory results will be compared. For example, a wiring diagram, complete with pin numbers, is designed as part of the Lab 2 pre-laboratory. If completed correctly, the wiring diagram will greatly increase the speed and accuracy of wiring the circuit. The pages of the manual are perforated, so each prelab can be removed and used as a reference while completing the lab procedure. The lab procedure provides the list of steps and instructions required to complete the lab. The procedures provide tables and blanks for recording data directly into the manual. The post laboratory section is a list of suggestions for evaluating the data gathered during the lab. The post lab may suggest a qualitative assessment of the data or suggest a procedure to appropriately processes the data quantitatively.
Hardware, Software, and Other Requirements Multiple components are required before attempting the labs in this manual. The components can be split into three categories: test equipment, software, and various parts. The required test equipment is listed below. The items in parenthesis are the minimum features required of the equipment. Required Test Equipment • Power supply (adjustable dual channel) • Multimeter (volt meter, ammeter, ohm meter) • Function generator (sinusoidal waveform, frequency, and magnitude adjustable) • Oscilloscope (dual channel) • Xilinx FPGA development board (Basys 2 from Digilent) The required software is listed below. The items in parenthesis are the versions used at the date of publication. Therefore, any tutorials or procedural steps concerning the software assumes the same type and version as listed below. Required Software • Analog circuit simulation software (PSPICE Student 9.1) • Digital circuit simulation software and FPGA design tool (Aldec Active-HDL 9.3) • Engineering computation software (MATLAB R2017a) • FPGA communication software (Digilent Adept 2)
Introduction to Analog and Digital Circuits—Laboratory Manual vii
The final category of required hardware is the various parts that will be used to construct the circuits that will be built and tested. These parts include resistors, capacitors, inductors, cables, digital gates, and more. A full parts list is provided in Appendix A. A few labs require items not printed in the text such as data files, program scripts, and/ or tutorials. These special items can be downloaded from the course website. Lab 0, the next in the manual, is an introductory lab. It is designed to teach the fundamentals of the test equipment as well as the basics of wiring a circuit based on a circuit diagram.
Lab 0 Laboratory Equipment and Prototyping Learning Objectives Lab 0 provides an introduction to the equipment in the laboratory and an introduction to wiring circuits on a breadboard. After completing Lab 0, you will be able to:
➤➤ Identify and name common laboratory equipment ➤➤ Use a power supply to provide direct current (DC) voltage to a circuit ➤➤ Explain the connections inside a breadboard ➤➤ Wire a simple circuit on a breadboard ➤➤ Use a multimeter to measure node voltages Please use the above checklist as you complete the lab, checking items off as you gain the indicated knowledge or experience. If you finish the lab without checking off an item, it would be a good idea to discuss the topic with your laboratory instructor.
Testing Circuits To successfully test a circuit and confirm that its operation matches the theoretical analysis, three pieces of equipment are required: input equipment, prototyping s urface, and measurement equipment. Input equipment provides the stimulus to the circuit. The m inimum required input equipment for the labs in this manual are a DC power supply and a function generator. Both these pieces of equipment allow the user to fully customize the input signal to test a circuit’s response to various stimuli. The second equipment category is the prototyping surface which provides a convenient place to construct the circuit. The primary prototyping surface discussed in this manual is the breadboard, but the Digilent Basys FPGA boards will also be used. The final equipment category is the measurement equipment that is necessary to measure and record 1
2 Analog & Digital Circuits
ircuit parameters and the signals generated by the circuit. A multimeter and an oscilc loscope are the most common measurement tools, and therefore, they will be the tools discussed in this manual. The power supply, function generator, breadboard, multimeter, and oscilloscope or logic analyzer are standard equipment for a general digital or analog laboratory.
DC Power Supply DC Power supplies provide a tunable DC voltage for a circuit under test. The power supply will maintain the set voltage no matter what circuit is attached as long as the power supply limits are not exceeded. The manufacturer limits of a power supply are usually stamped on the face of the device, and they define the limits of the internal circuits and hardware of the power supply. Exceeding these limits will, at best, blow an internal fuse and, at worse, cause permanent damage to the power supply, the user, and/or nearby equipment. Many power supplies will allow the user to set additional limits on the supply. The voltage limit must be set to tell the power supply how much voltage to generate, and the voltage limit is adjustable in all non-fixed power supplies. The current can also be limited by the user on most power supplies. A power supply will generate whatever current is necessary (up to the manufacturer limit) to maintain the set voltage limit. In most cases the amount of current a power supply is capable of producing is greater than the circuit under test can handle without being damaged. The power supply is capable of damaging most circuit to which it is attached. Thus, a user must place a limit on the amount of current acceptable for a particular circuit. When the current limit is set, the power supply is permitted to supply output currents up to the limit. If the circuit under test requires less current than the current limit, the supply only provides what is required by the circuit. Setting the current limit to 1 A will suffice for most circuits discussed in this manual. The user defined current limit is used to prevent damage to the circuit under test due to accidental shorts, wiring errors, or circuit design mistakes. Please consult your equipment manual to determine how to set the voltage and current limits for the power supply in your laboratory. Single and multiple channel power supplies are available. Each channel provides access to a positive and negative terminal. The negative terminal is typically considered the signal ground for a circuit. It is also common for a power supply to provide access to earth ground. The signal ground is considered ground for those circuits and items attached to that particular channel. Earth ground is considered ground for all items and circuits in the building. For the circuits discussed in this manual, a dual channel power supply is required to provide 6Vcc voltage to operational amplifiers. A typical dual channel arrangement is shown in Figure 1.
Lab 0: Laboratory Equipment and Prototyping 3
Channel 1
+
Channel 2
+
–
–
Figure 1: Example layout of the terminals for a dual channel DC power supply. The center terminal is earth ground. Source: Brian Dean
Multimeter A multimeter is so named due to its ability to measure multiple quantities. A typical multimeter can measure: alternating current (AC) voltage and current, DC voltage and current, and resistance. More advanced multimeters can measure frequency, capacitance, gain, and more. At a minimum, a multimeter will have three ports: a common, a voltage, and a current port. The common port is used in nearly every measurement. The voltage port is used when measuring voltage, resistance, or testing for continuity. The current port is used when measuring current. Depending on the measurement, the ports will be connected to the component under test in either series or parallel. A parallel connection is required when measuring voltage or resistance. A series connection is required when measuring current. Confusing these two arrangements is the primary cause for blown fuses in a multimeter. The proper arrangements for measuring voltage and current are shown in Figure 2. V +
V
+
R Vin
A
R
A
Vin
– COM
(a)
(b)
(c)
Figure 2: Voltage is measured in parallel with the component (a). Current is measured in series with the component (b). A positive reading for voltage is an indication that the higher voltage is attached to the V terminal. A positive reading for current is an indication that the current is flowing into the A terminal (c). Source: Brian Dean
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Once properly connected, the meter must be set to the proper measurement. Setting the proper settings is typically achieved by pressing the correct button on a lab bench model or switching the dial to the proper setting for a hand-held model. If the meter does not have the ability to automatically adjust the measurement range, the user will have to set it manually. For highest precision, the measurement range should be set as low as possible. The expected range should be known prior to performing the measurement. At the least, the maximum possible quantity should be known prior to taking a measurement. Similar to power supplies, multimeters have absolute maximum measurement ranges that should not be exceeded.
Signal Generator A signal generator is used to send time varying signals to circuits under test. The standard signal types include: sine, triangle, square, ramp, and pulse. The type of waveforms available will depend on the model of the generator, with the simplest producing only a sine or square wave, and the more advanced allowing for user defined waveforms to be uploaded. Magnitude, frequency, and DC offset are some of the parameters that can be adjusted to generate the appropriate signal for a particular circuit. A signal generator, like the DC power supply, generates a set voltage level at each moment in time. The current output from the generator will depend on the circuit to which it is attached. There are limits to how much voltage and current a signal generator can output, and these limits are typically lower than a DC power supply. In addition, a signal generator will be limited in frequency range. Interfacing with a signal generator is typically achieved through a single port, but many generators will have two ports; one labeled Output and the other labeled Trigger. The output port provides the signal. The trigger output sends a square wave that is used to trigger measurement equipment which can help stabilize a signal measured with an oscilloscope.
Oscilloscope An oscilloscope is a powerful signal capture and analysis tool. The simplest oscilloscopes are able to plot a time varying waveform such that the period and magnitude can be measured. More advanced oscilloscopes are capable of automatically measuring multiple aspects of the waveform simultaneously. Digital oscilloscopes can perform signal analysis computations and display the results on the screen in real time. Oscilloscopes typically have two to four channels. Each channel can measure a separate point in a circuit which is very helpful when debugging circuits. At the most basic level, use of an oscilloscope requires the proper setup of the: measurement probes, time division scale, and magnitude scale. There are many other aspects that are important when measuring or capturing signals with an oscilloscope. Both the oscilloscope and the signal generator will be discussed in more detail in Lab 4 and Lab 6, respectively.
Lab 0: Laboratory Equipment and Prototyping 5
Cables There are two types of cabling discussed in this manual. Both types are used to transfer signals to and from the equipment and the circuit. Slowly varying or DC signals are transferred using the banana cables shown in Figure 3(a). Banana cables will slide into the ports on DC power supplies and multimeters. They typically have two male ends or a male end and an alligator clip end. The alligator clips, whether permanently attached or removable, are used to interface with a circuit. The teeth of the clip are made to bite on a wire, and the wire is inserted into a breadboard. The second cable type is the coaxial cable shown in Figure 3(b). These cables are used to transmit time varying signals. The coaxial cable is a shielded cable that prevents electromagnetic radiation from exiting or entering the cable. The coaxial cable is usually terminated with alligator clips or BNC connectors. The alligator clips are used to interface with the breadboard circuit as discussed for banana cables. The BNC connector will interface with the function generator and oscilloscope. A BNC to BNC cable is used to transmit signals directly from the signal generator to the oscilloscope.
(a)
(b)
Figure 3: Banana plug cables (a), BNC connector coaxial cables (b). Sources: (a) © Peter Majkut/Shutterstock.com (b) © Alan Ottley/Shutterstock.com
Prototyping Using a Breadboard and Lab 0 Procedure Steps A breadboard is used to make easy connection between circuit components. The surface of the breadboard is covered in holes. Most breadboards will have a set of two rows of holes located on either side of a central block. All holes along a single row are connected together inside the breadboard. Since these rows extend the entire length of the board, they are used to provide power to the circuits. The row labeled with a red line is typically tied to the positive voltage terminal of the power supply. The row labeled with a blue line
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+10V GND
Figure 4: Breadboard: circles represent holes, black lines represent internal connections. Source: Brian Dean is commonly tied to the negative terminal of the power supply, and it is considered ground. A breadboard with powered rows is shown in Figure 4. The solid black lines in Figure 4 show the connections found inside the breadboard, so even though the 110 V power signal is only supplied to the top right most hole in Figure 4, a wire or component will be attached to 110 V if it is plugged into any of the holes in the top most row. The holes connected together in columns are where most of the circuit connections will be made. Notice that a single column of holes is connected together only up to the center trough. Columns on either side of the trough are not electrically connected. The center trough is used for connecting to integrated circuits (ICs) in dual in-line packaging. In the following procedural steps, the power rails will be established on the breadboard similar to those shown in Figure 4.
Procedure Part A: Establishing power rails on the breadboard Step 1: Connect a red banana cable from the positive terminal of channel 1 on the DC power supply to the voltage measurement terminal on the multimeter. Connect a black banana cable from the negative terminal of channel 1 on the DC power supply to the common terminal on the multimeter. Step 2: Turn on the DC power supply and set the voltage to 10 V with a current limit of 1 A. Recall that these setting will result in an output voltage of 10 V and a current maximum of 1 A. Step 3: Set the multimeter to measure DC voltage. If you have set your power supply correct, but you do not see any voltage measurement on the multimeter, then either your power supply isn’t outputting a signal or your multimeter is set to the wrong measurement. Check that the output of channel 1 of the DC power supply is turned on. If it is, check the user
Lab 0: Laboratory Equipment and Prototyping 7
anual for your power supply and multimeter. Do not proceed until you m are able to measure, with the multimeter, the voltage produced by the power supply. Adjust the power supply until the multimeter reads 10 V. Step 4: Disconnect the red banana cable from the multimeter and attach an alligator clip. Clamp the clip onto a wire and push the other end of the wire into the red row of the breadboard as shown in Figure 4. Note: Both ends of the wire must be stripped of insulation. Step 5: Disconnect the black banana cable from the multimeter and attach an alligator clip. Clamp the clip onto a wire and push the other end of the wire into the blue row of the breadboard as shown in Figure 4. The power rails of the breadboard are now established. To check the internal connections of the breadboard, follow Steps 6 to 9. Step 6: Using an additional black banana cable, establish a connection between the negative terminal of the power supply and the common terminal of the multimeter. You should now have two black banana cables connected to the negative terminal on the power supply; one that connects to the breadboard and one that connects to the multimeter. Step 7: Connect another red banana cable to the voltage terminal on the multimeter. Attach an alligator clip to the other end of the cable. Clamp the clip onto a wire. The alligator clamped onto the wire is your measurement probe. Step 8: Use your measurement probe to test the voltage at various holes along the red row of the breadboard. You should see 10 V along the entire row. Step 9: Use your measurement probe to test the voltage at various holes along the blue row of the breadboard. You should see 0 V along the entire row.
Noting where power will be supplied to the breadboard is a necessary first step of wiring circuits into a breadboard. Without knowledge of where power will be connected, it is difficult to properly plan the circuit layout. In the above procedure, the power rail placement was noted and established. Establishing power to the breadboard is the last step of prototyping. It is important that no power is applied to the breadboard while circuits are being built or altered. With power supplied, simple mistakes in wiring can cause damage to the measurement equipment, the circuit components, or to the engineer. Therefore, before a circuit is built in Lab 0, power will need to be disconnected from the breadboard. Please follow the procedure below.
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Procedure Part B: Disconnecting power The ability to quickly disconnect power from the breadboard is an important skill that should be used whenever a circuit is being wired or altered. It is especially important to be able to immediately and quickly remove power when a circuit is not behaving as expected or smoke is emanating from a component. Below is a list of options that may work with your power supply. Option 1: Turn off the power supply. Turning off the power supply will successfully remove power from the circuit and is the best method to use when it is obvious that a circuit is catastrophically failing (smoking, smelling bad, or deforming). While this method will work for every model of power supply, it is not always the best option for removing power when a circuit needs to be wired or rewired. Option 2: Press the “channel on/off” button. Many power supplies provide a button that will turn a channel on or off. The name of the button will be different depending on the model of the power supply. If your power supply has a channel on/off button, you will be able turn on the supply, set the voltage and current parameters, then choose when to turn the channel on. Thus, the power supply can remain on, with proper settings until the circuit is ready. Option 2 is the best method for disconnecting power in all situations except for catastrophic circuit failure. Option 3: If your power supply does not provide a channel on/off button, then pulling the red banana cable out of the positive terminal of the DC power supply will disconnect power. This option should only be used when wiring or altering a circuit. It is not a good option to use when a circuit is failing or when applying high voltages or currents. It is important to pull the red cable from the positive terminal. All other disconnections are not good options. Error 1: One may think it is just as effective to unclamp the wire attached to the end of the red cable or to pull the wire from the breadboard. While this method will disconnect power from the breadboard, the alligator clip is still powered. If the clip touches another part of the circuit, a closed loop will form and current will flow. Error 2: Pulling the black cable from the power supply will also disconnect power, but the circuit will still be energized. Any conductive path to ground will allow current to flow. Step 1: Familiarize yourself with the above options. Move your measurement probe (built in Step A.7) to the 10 V power rail. The multimeter should be reading 10 V.
Lab 0: Laboratory Equipment and Prototyping 9
Step 2: Implement Option 1. Confirm the power is disconnected by reading the voltage measurement on the multimeter. Step 3: Reapply power by turning the power supply on. You may need to reset the output to 10 V. Step 4: If Option 2 is not possible on your power supply, skip to Step 6. Otherwise, implement Option 2. Confirm the power is disconnect by reading the voltage measured by the multimeter. Step 5: Reapply power by pressing the channel on/off button. The multimeter should read 10 V with no need to further adjust the power supply. Step 6: Implement Option 3. Confirm the power is disconnect by reading the voltage measured by the multimeter. Step 7: Reapply power by reconnecting the red banana cable to the positive terminal of the power supply. The multimeter should again read 10 V with no need to further adjust the power supply. Step 8: To prepare for wiring circuits on the breadboard, disconnect power using Option 2, if possible. Otherwise, disconnect power using Option 3.
Wiring circuits on a breadboard can be difficult at first due to how the circuit is printed in a circuit diagram versus how the circuit appears in the breadboard. If the circuit is laid out on the breadboard such that it looks identical to the layout in the circuit diagram, the circuit will not function correctly. To wire a circuit to match a circuit diagram, the connection points are the important aspect, not the appearance of the circuit. A connection point is anywhere two or more circuit components connect, and these points are called nodes. Wiring a circuit in a breadboard requires the nodes in the circuit diagram to be mapped to particular columns on the breadboard. The process is best learned through practice. Follow the steps in the procedure below to wire a circuit.
Procedure Part C: Wiring a circuit Step 1: Study the circuit diagram in Figure 5. The left most component is a voltage supply. The other components are 10,000 Ohm (10 kV) resistors. The nodes have been labeled N0 through N4. Note that Node N4 connects just as many components as Node N2 despite the fact that N4 looks different. We could have just as easily drawn the right most 10 kV resistor diagonally from Node N3 directly to Node N4, but the circuit would not have been as easy to read.
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N1
N3
N2 10 kΩ
10 kΩ 10 kΩ
10 V
N0
10 kΩ
10 kΩ
N4
Figure 5: Schematic of the circuit to be wired in Lab 0. Nodes are labeled to aide in the wiring of the circuit. Source: Brian Dean
Step 2: Nodes N0 and N1 have already been established in Part A. These nodes are the blue row and red row of the breadboard, respectively. Ensure the power to the breadboard has been disconnected by measuring the voltage along the red row of the breadboard. Select two 10 kV resistors and straighten the leads on both. Insert one end of a resistor into a hole along the red row (this is Node N1). Insert one end of the other resistor into a hole along the blue row (this is Node N0). You should now have a breadboard with two resistors sticking straight up from Nodes N0 and N1. Step 3: Bend the resistor connected to the red row of the breadboard and insert it into a column of the breadboard. The column you chose is now Node N2. Any other components that need to connect to Node N2 will be inserted into this column. Check the circuit in Figure 5 to understand the link between the circuit diagram and breadboard wiring. The resistor just connected is the top left resistor in the diagram. It is connected between nodes N1 and N2. Step 4: Bend the remaining resistor to a different column. This new column will be Node N4. Notice that the circuit diagram shows that another resistor will be connecting directly between Nodes N2 and N4, so the two columns selected in Steps 3 and 4 should be close enough that a resistor can extend between them. Your breadboard should look something like the one shown in Figure 6. You may have selected different columns, but you should have two resistors connected from the power rails and the column section of the bread board. Step 5: Connect a resistor between the two columns you selected in Steps 3 and 4. This is the center resistor in the diagram. Step 6: Connect a resistor from the Node N2 column (selected in Step 3) to a new column. The new column is Node N3.
Lab 0: Laboratory Equipment and Prototyping 11
N1
N3
N2 10 kΩ
10 kΩ 10 kΩ
10 V
N0
10 kΩ
10 kΩ
N4
Figure 6: Example of wiring two resistors and four nodes based on the circuit schematic. Source: Brian Dean Step 7: Connect the final resistor from the Node N4 column (selected in Step 4) to the Node N3 column (selected in Step 6). Step 8: Have your lab instructor check your wiring.
Procedure Part D: Measuring node voltage A node voltage is the voltage measured from a node to ground. Node voltages are easy to measure because only one probe is moved to different measurement points. You have already constructed a node voltage measurement probe in Part A. The probe requires a constant connection with ground and a moveable voltage tester. The black cable that is directly connect between the common on the multimeter and the negative terminal of the power supply established the ground connection. The moveable voltage tester is the probe you have been using to measure the 10 V power rail. Step 1: If the lab instructor has checked your circuit and approved of your wiring, apply power to the breadboard. Wait a few seconds to ensure no catastrophic failures occur. Some power supplies will show an approximation of how much current and voltage is being applied to the circuit. If you
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notice the voltage drop or the current spike when you turn on the power supply, you may have an error in your wiring. Many power supplies will have an over current indicator that will turn on when the current limit has been reached. If any of these indicators are noticed, it is a good idea to immediately cut power to the circuit and check for wiring errors. Step 2: If everything seems to be working correctly, move your voltage probe to each node. The approximate voltage of each node is provided in Table 1. If you measure a voltage vastly different than those listed in the table, double check your circuit for errors. If all the voltages are close, you have completed Lab 0.
Table 1:
Expected nodes voltage values for Lab 0 circuit N0
0V
N1
10 V
N2
6.25 V
N3
5.00 V
N4
3.75 V
Lab 1 Introduction to Transistor-to-Transistor Logic (TTL) Learning Objectives Lab 1 provides an introduction to the wiring and behavior of transistor-to-transistor logic (TTL) gates. After completing Lab 1, you will be able to:
➤➤ Understand standard naming conventions for the TTL gates AND, OR, and NOT ➤➤ Properly power TTL gates using 5 V (logic 1) and 0 V (logic 0) ➤➤ Use pinouts to wire TTL gates into simple circuits ➤➤ Predict the effects of a floating (disconnected) input on a TTL gate ➤➤ Measure TTL logic levels with a multimeter ➤➤ Locate pin 1 for most ICs ➤➤ Seat, power, and wire ICs using a breadboard Please use the above checklist as you complete the lab, checking items off as you gain the indicated knowledge or experience. If you finish the lab without checking off an item, it would be a good idea to discuss the topic with your laboratory instructor.
Logic Gate Construction Logic gates are built using switches. The inputs to the logic gate control the switches, either opening or closing them. The switches provide an electrical path to a logic high voltage or a logic low voltage. A simplified example of an inverter built from switches with both a logic low input (a) and a logic high input (b) are shown in Figure 1.1. The inverter has a single input which controls both of the internal switches. When a logic low is input, 13
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5V
5V
SW 1
In = 0
Out = 1 SW 2
(a)
SW 1
In = 1
Out = 0 SW 2
(b)
Figure 1.1: Switch arrangement for an inverter with a logic low input (a) and a logic high input (b). Source: Brian Dean
switch 1 (SW 1) is closed and an electrical path is established between the logic high voltage, 5 V in this case, and the output. When a logic high is input, SW 1 opens, SW 2 closes, and a signal path is established between the output and ground or logic low. The switches shown in Figure 1.1 are built using transistors which are solid-state- devices that you will learn more about in future courses. For now, it is enough to know that there are many different approaches to building a switch using a transistor. For TTL gates, the switches are constructed from Bipolar Junction Transistors (BJTs) in one of four configurations: Original, Low-power Schottky (LS), Advanced Lowpower Schottky (ALS), and FAST (Fairchild Advanced Schottky TTL) (F). The bolded letters are unique identifiers printed on an IC chip to communicate the type of technology used to construct the gates. The original design is identified by the absence of an identifier. As would be expected, each of these different technologies have different strengths and weaknesses that are considered before implementing a digital design in hardware. Another, more commonly used, transistor that can function as a switch, is called a MetalOxide-Semiconductor Field-Effect Transistor (MOSFET). A MOSFET transistor is used as a switch in Complementary Metal Oxide Semiconductor (CMOS) devices. Many digital logic systems, including Very-Large-Scale Integration (VLSI) microcontrollers, are constructed using CMOS technologies. As with TTL gates, CMOS gates come in a few varieties such as: High-speed CMOS (HC) and Advanced High-Speed CMOS (AHC). Due to different logic levels, standard CMOS chips cannot communicate with TTL chips unless the CMOS chips are designed to do so. The CMOS chips that are designed to interface with TTL chips are identified by the addition of a T to their name; (HCT) and (AHCT) respectively.
Lab 1: Introduction to Transistor-to-Transistor Logic (TTL) 15
Identifying Integrated Circuits Each integrated circuit is labeled either 54xnn or 74xnn. The first two numbers indicate the grade of the chip, either military grade (54) or consumer grade (74). Following the grade numbers, letters are used to identify the technology used to construct the gate(s) as discussed above. If letters are not present, then the chip is constructed using original TTL technology. Finally, a set of numbers will identify exactly what type of gate(s) are in the device. The list below provides a few examples: • 7400—Consumer grade, original TTL technology, 2-input NAND gates • 54LS02—Military grade, low-power Schottky, 2-input NOR gates • 74HC04—Consumer grade, high-speed CMOS, inverters • 74F08—Consumer grade, FAST, 2-input AND gates • 54HCT32—Military grade, high-speed CMOS with TTL interface, 2-input OR gates
Datasheets
1
14
2
13
2
13
2
13
3
12
3
12
3
12
4
11
4
11
4
11
5
10
5
10
5
10
6
9
6
9
6
9
7
8
7
8
7
8
(a)
(b)
GND
14
GND
1
Vcc
14
Vcc
1
Vcc
GND
Datasheets detail how a particular device will function under a number of different conditions. Every TTL IC has a datasheet that provides information about how to safely power and operate the chip, so it is important to find the datasheet for the device you plan to use. For Lab 1, the pinout is the most important detail. The pinout illustrates how the internal components are connected to the chip’s pins. The pinout is typically found on the first or second page of a datasheet. The datasheet can be found by searching the chip label online. If the manufacturer of the device is known, it is best to start the search on the manufacturer’s website. The pinouts of the devices to be used in Lab 1 are shown in Figure 1.2.
(c)
Figure 1.2: Pinouts for (a) 74LS04, (b) 74LS08, and (c) 74LS32. Source: Brian Dean
16 Analog & Digital Circuits
To use the pinouts in the datasheet, a relationship is required to match the pins numbered in the datasheet to the pins on the physical IC. For many ICs, pin 1 is clearly labeled either with a dot or arrow etched into the surface of the chip. For other ICs, a notch is found on one side of the IC. With the pins of the IC pointing away from you and the notch positioned at the top, pin 1 is the top most pin on the left side of the chip as shown in Figure 1.2. With pin 1 located, the rest of the pins are consecutively numbered in counter-clockwise order around the device. Each pin is connected to the internal circuitry as shown in the pinout, but two pins don’t appear to connect to anything, VCC and GND. These two pins are used to provide power to the internal circuits. For TTL gates, VCC is typically 5 V which is considered a logic high. The GND pin is wired to the ground or negative terminal of the power supply, and GND is considered a logic low.
Providing Input to Digital Circuits Switches are the standard method for providing controllable input to a digital circuit. A slide switch will be used in Lab 1. The switch is wired to 5 V on one side and ground (0 V) on the other. A resistor is used to limit the current when the switch is closed. Wired as shown in Figure 1.3, the input to the circuit will be a logic low when the switch is open, and a logic high when the switch is closed. When the switch is open, the input is tied through a resistor to ground. When the switch is closed the input is tied directly to the 5 V input.
5V
Input X
Figure 1.3: Switch circuit for Input X. Source: Brian Dean
Additional knowledge will be gained about TTL gates during the completion of the laboratory exercise presented on the following pages. To begin, study and answer the following pre-laboratory questions.
Lab 1: Introduction to Transistor-to-Transistor Logic (TTL) 17
Lab 1 Pre-lab Name:
EXPERIMENT: Introduction to Transistor-to-Transistor Logic (TTL) You will be using transistor-to-transistor logic (TTL) chips in this lab and in Lab 2. To become familiar with the chips, you will be wiring and testing the simple digital circuits discussed in the following problems. 1. Truth Tables and Boolean Equations. a. Using NOT (|) and OR (|), write the Boolean equation and complete the truth table for the NAND function.
Table 1.1:
NAND Truth Table NAND Boolean Equation:
X
Y
0 0 1 1
0 1 0 1
A
b. Using NOT (|), AND (&), and OR (|), write the Boolean equation and complete the truth table for the XNOR function.
Table 1.2:
XNOR Truth Table
XNOR Boolean Equation:
X
Y
0 0 1 1
0 1 0 1
B
c. Using minterms, write the sum-of-products Boolean equation for the truth table given in Table 1.3. Your equation should be in terms of NOT, AND, and OR.
Table 1.3:
FOO Truth Table FOO Boolean Equation:
X
Y
C
0 0 1 1
0 1 0 1
1 1 0 1
18 Analog & Digital Circuits
2. Simplification: The chips you will use are the 74LS04 (invertor), 74LS08 (2-input AND), and the 74LS32 (2-input OR). While it is possible to construct a multiple input AND or OR gate using multiple 2-input gates, you will not do so for this lab. Simplify the solution to problem 1.c using the Venn diagram below. Your final answer should only require 2-input gates.
X
FOO Simplified Boolean Equation: _________________
Y
3. Implementation: The pinout for each of the chips is provided below. Using straight line segments and being as legible as possible, show how you plan to wire the circuits from input X and Y to Output A, B, and Output C (Simplified FOO). Use a dot to indicate connection points. X
Y
Output A Output B Output C
Source: Brian Dean
Turn in this completed prelab assignment at the beginning of your lab.
Lab 1: Introduction to Transistor-to-Transistor Logic (TTL) 19
Lab 1 Procedure Names (separated by comma(s)):
EXPERIMENT: Introduction to Transistor-to-Transistor Logic (TTL) A. Preparing the Breadboard 1. Begin by preparing the breadboard for wiring your circuits by: placing and powering the TTL IC chips and wiring the input switches as shown in Figure 1.4. Please follow steps 1.a through 1.e below. a. Seat the TTL IC chips and dual-inline-package (DIP) switch into the breadboard. Be sure not to bend the pins as you push the DIP packages into the board. If the chip won’t stay in the board move it to another position. If you are unable to get all chips to stay in the board, you will need a new breadboard. b. Connect wires (preferably red) from the 15 V rail to the DIP switch and the TTL IC chips. c. Connect wires (preferably black) from the GND (0 V) rail to the TTL IC chips. d. Finally, place 390 V resistors (color code: orange—white—brown—gold) from the GND rail to the DIP switch. +5V GND
ON
74LS04
74LS08
74LS32
X
Y
Figure 1.4: Breadboard Schematic, Component Placement, and Power Connections. Source: Brian Dean B. Testing Chip Functionality: See Figure 1.2 for pinouts of each chip. 1. Wire input X to: a. The input of one of the inverters within the 74LS04 chip (chose pin 1, 3, 5, 9, 11, or 13).
20 Analog & Digital Circuits
b. An input of one of the AND gates within the 74LS08 chip (chose pin 1, 4, 9, or 12). c. An input of one of the OR gates within the 74LS32 chip (chose pin 1, 4, 9, or 12). 2. Wire input Y to the second input of the AND and OR gates chosen in step B1.b and B1.c. For example, if you chose pin 1 of the 74LS08 and pin 1 of the 74LS32 in step B1, then the Y input should be connected to pin 2 of both chips. 3. You will need two red and two black banana cables and three alligator clips to connect the power supply to the circuit, and to measure voltages using the multimeter. 4. To connect the power supply, start by ensuring the power supply output is off, and then make the following connections. a. Connect a red banana cable from the fixed 15 V channel of the power supply to an alligator clip connected to a wire attached to the 15 V power rail of your breadboard. If your power supply doesn’t have a fixed 15 V channel, adjust Channel 1 of your power supply to 15 V. b. Connect a black banana cable from the ground side of the 5 V channel on the power supply to an alligator clip connected to a wire attached to the GND power rail of your breadboard. 5. To measure voltages from your circuit(s), you need to establish a connection to the multimeter in the same fashion as you did in Lab 0. The steps are: a. Connect a black banana cable from the ground side of the 5 V channel on the power supply to the COM/GND terminal of the multimeter. b. Connect a red banana cable from the voltage measurement terminal on the multimeter to an alligator clip connected to a wire attached to the output of your chosen inverter.
Before applying power, have your lab instructor check your wiring. Initials ____________
6. Turn on the DC power supply. Use the DIP switch to control the X input and measure the output voltage of your chosen inverter. Record your voltage measurements and indicate the logic level in Table 1.4. For the TTL chips used in Lab 1, an output voltage above 3.4 V is consider a logic high, and an output voltage less than 400 mV is considered a logic low.
Lab 1: Introduction to Transistor-to-Transistor Logic (TTL) 21
Table 1.4: Measured Inverter Operation X 0 1
Output voltage
Logic level
7. If the inverter functioned as expected, test the functionality of your chosen AND gate and OR gate. Complete Table 1.5 on the following page.
Table 1.5: Measured AND and OR Gate Operation X
Y
0 0 1 1
0 1 0 1
AND GATE Output voltage
AND GATE Logic level
OR GATE Output voltage
OR GATE Logic level
8. Next you will determine how the gates function with a disconnected input. a. With power off, disconnect the X input from each chip including the 74LS04. b. Turn on the DC power supply and measure the output voltage of each gate. For the AND and OR gates, measure the output voltage for Y 5 0 and Y 5 1. Place your results in Table 1.6.
Table 1.6: Measured Operation with Disconnected (d/c) Input GATE Inverter AND OR
X d/c d/c d/c d/c d/c
Y
Output voltage
Logic level
0 1 0 1
C. NAND, XNOR, and Designed Circuit 1. With power to the breadboard off, wire circuit A (NAND), circuit B (XNOR), and circuit C (FOO simplified). 2. Turn on the DC power supply and test circuit A, B, and C using the m ultimeter and DIP switches. Use the tables below to record your result. For each test,
22 Analog & Digital Circuits
if the multimeter reads above 3.4 V, place a “1” in the output column for that test. If the multimeter reads less than 400 mV, place a “0” in the output column.
Table 1.7: Functionality of Circuit A, B, and C
X
Y
0 0 1 1
0 1 0 1
A
B
C
Demonstrate the proper functionality of your circuits to your lab instructor. Initials ____________
Turn off the DC power supply. Remove all wires from the breadboard, straighten the wires, and return them to the proper location. Do not remove the DIP switch or the TTL chips from the breadboard.
Post-Lab Questions 1. What was the purpose of the Venn Diagram? 2. How is power supplied to circuits in a breadboard? 3. What was the purpose of the switch? 4. How do you differentiate between a logic high and a logic low in a digital circuit? 5. Why do the gates need 5 V and GND applied to make them function?
Lab 2 Digital Design and Light Emitting Diodes (LEDs) Learning Objectives Lab 2 provides an introduction to digital design. After completing Lab 2, you will be able to:
➤➤ Produce a truth table with multiple outputs based on a design description ➤➤ Derive a simplified Boolean equation from a truth table using Karnaugh maps ➤➤ Describe the difference between an Active High design and an Active Low design
➤➤ Use DeMorgan’s Theorem to produce a design that is implemented using only Universal gates.
➤➤ Connect LEDs to a digital circuit for the purpose of displaying the circuit’s output
➤➤ Design and wire a digital circuit to accomplish an engineering goal Please use the above checklist as you complete the lab, checking items off as you gain the indicated knowledge or experience. If you finish the lab without checking off an item, it would be a good idea to discuss the topic with your laboratory instructor.
Digital Design Digital design follows a few standard steps that will be followed to complete Lab 2. The first step of any engineering design process is to fully define and understand the problem to be solved. For Lab 2, the problem comes from a company that has an issue with truck 23
24 Analog & Digital Circuits
traffic around their loading bays. The client describes the problem and suggests a solution as follows: “The A-Z Products Company has three loading bays at the rear of their warehouse with limited space to maneuver. When trucks arrive, the drivers can’t see whether or not the loading bays are occupied. The warehouse manager wants a light system to alert drivers as to the availability of the loading bays, a red light indicating all bays are full, yellow indicating there is only one bay available and a driver should wait on the street if he sees another truck heading down the drive to the rear of the building, and a green light indicating two or more bays are empty.” In this example, the client has fully described the problem and also provided a workable solution. In many cases defining the problem and agreeing upon an appropriate plan of attack is a time-consuming part of the design process. It is important that this process not be rushed. Once the problem is fully defined and a plan for fixing it has been determined, the rest of the design steps can begin. The standard steps to digital design are: 1. Determine the minimum number of inputs and outputs required for the design. 2. Derive a complete truth table to describe how the digital inputs will map to the digital outputs. If a particular input can result in an output of either a logic high or logic low and still meet the requirements of the problem statement, then a “Don’t Care” condition is marked with an X. 3. Derive a reduced Boolean equation that will produce the truth table found in step 2. 4. Determine the best method for implementation. Step 1 is usually determined during the problem definition stage. More inputs provide additional information, but also require the additional cost of sensors or other hardware to acquire the information. Assuming the designer must consider every possible combination of the inputs, every additional input will require the designer to consider twice as many combinations than was required before the new input was added. For example, one input has two possible combinations, two inputs have four combinations, and three inputs require the consideration of eight combinations. The designer must weigh the added complexity of additional input with the loss of information from excluding inputs. Determining the proper number of outputs is similar. Each additional output will provide more information to the user or to the next circuit down the line, but each output requires an additional circuit that must be designed and implemented in hardware.
Lab 2: Digital Design and Light Emitting Diodes (LEDs) 25
For the warehouse problem of Lab 2, three inputs will be used to indicate if a truck is in each of the three loading bays. Three outputs will be used to turn on a red, green, or yellow light. Step 2 of the design process requires the designer to consider every combination of the inputs, to decide how the circuit should react. For cases, where a particular combination of inputs is impossible, a “Don’t Care” condition is indicated in the table using an X. Don’t cares are also used for cases where it does not matter how the circuit responds. When attempting to design a simplified circuit, these don’t care conditions can be treated as either a logic high or a logic low, whichever produces the simplest Boolean equation. Step 2 is complete when it has been determined how every output will respond to every input combination. You will complete step two of the design process in the Lab 2 prelab exercise. An example row of the truth table is shown in Table 2.1 where Bay 1 and Bay 2 are unavailable, but Bay 3 is open. According to the design description, when only one bay is open, the Yellow light should on while the Red and Green are off.
Table 2.1: Example of One Row of the Loading Bay Problem Truth Table
Bay 3 0
Bay 2 1
Bay 1 1
Red 0
Yellow 1
Green 0
Step 3 requires both the derivation and simplification of a Boolean equation that will produce the truth table from step two. Both of these goals can be achieved using either Karnaugh mapping or the Quine-McClusky algorithm. Karnaugh mapping can be used on designs with up to five inputs. For larger designs, a computer software implementation of the Quine-McCluskey algorithm is used. Since there are only three loading bays (inputs), a Karnaugh mapping approach is best for this lab. Karnaugh mapping can be achieved in three steps which are summarized below. An example is shown in Figure 2.1. For a complete discussion of Karnaugh mapping, see the companion textbook.
1 1B 00
0 1
1 1
01 1
11
10 1 1
& ~B) | ~C
A & ~B
Figure 2.1: Karnaugh map example.
26 Analog & Digital Circuits
1. Map all logic high outputs to the appropriate square in the Karnaugh map. 2. Circle all the logic high values with the fewest number of circles possible and with circles that contain the greatest number of logic high values. For a three-input system, the circles can only contain, one, two, four, or eight logic high values. Diagonal circles are not possible, but circles can wrap around the map. 3. For each circle, write a Boolean equation by examining the labels of the row and column over which the circle extends. If the labels show that the variable changes state over the extent of the circle, that variable is excluded. If the variable remains a logic low, the variable is inverted. If the variable remains a logic high, the variable is not inverted. If multiple variables remain constant over the extent of the circle, then these variables are ANDed together. Finally, OR all the Boolean equations from a single Karnaugh map together. The final step of digital design is to choose how to implement the reduced Boolean equation. There are a number of options such as: discrete integrated circuits (SSI or MSI), programmable logic (CPLD), memory-based architectures (FPGA), or a custom designed chip (ASIC). Discrete integrated circuits built from small scale integrated circuits (SSIC) or medium scale integrated circuits (MSIC) are used for small designs that have a fixed purpose. Both the complex programmable logic device (CPLD) and field-programmable gate array (FPGA) are reprogrammable. Reprogrammable implementation approaches allow for more flexible hardware designs. The most attractive feature of reprogrammable approaches is the ability to use hardware description language (HDL) to design the digital system. The final implementation method is an application-specific Integrated circuit (ASIC). Entire digital systems can be laid out onto a single solid-state die, then millions of those chips can be produced quickly and relatively cheaply. However, the ASIC implementation has the highest development cost. When all design steps have been completed, the device must be tested. A testbed for digital systems typically involves a stimulus source as input and a logic analyzer recording the outputs. For Lab 2, switches will be used to generate input for the circuit under test. Light-emitting diodes (LEDs) will indicate the output of the circuit design.
Light-Emitting Diodes A light-emitting diode (LED) produces light when current flows through the diode in the proper direction. Two LED circuits are shown in Figure 2.2. The arrow part of the LED symbol indicates the direction the current must flow to illuminate the diode.
Lab 2: Digital Design and Light Emitting Diodes (LEDs) 27
5V Anode
Input (1: on)
R
+
Cathode
–
Anode
R
(a)
+
Cathode
– Input (0: on)
(b)
Figure 2.2: Light-emitting diode connections in Active High (a) and Active Low (b) configurations. Source: Brian Dean Current will flow in the proper direction when the diode is forward biased. A diode is forward biased when the positive terminal (anode) of the diode is connected to the high voltage side of the power supply or battery, and the negative terminal (cathode) of the diode is connect to the low voltage side of the power supply. A resistor is used, as shown in Figure 2.2, to limit the current that flows through the LED. Higher currents produce a brighter response, but the LED will be destroyed if too much current is supplied. If the LED is reverse biased (the power supply has opposite polarity of the LED) or if the LED has equal voltage on both terminals, no current will flow and the LED will not light. For Lab 2, three LEDs will be used to indicate the state of the circuit. The LED can be wired to a digital circuit in an Active HIGH arrangement, Figure 2.2(a), or an Active LOW arrangement, Figure 2.2(b).
Active HIGH vs Active LOW As the name implies, Active HIGH loads turn on when a logic high control signal is received, while Active LOW loads turn on when a logic low is received. The control signals are not the only difference between Active HIGH and LOW. The direction of current flow is also important. Examining Figure 2.2 shows that current will flow from left to right for both arrangements, but the Active HIGH load draws current from the control circuit while the Active LOW setup sends current to the control circuit. The control circuit is required to “source” current for Active HIGH load, and it is required to “sink” current for Active LOW. Since TTL gates can sink more current than they can source, it is very common to use Active LOW loads when interfacing with a TTL control circuit. In this lab, you will start by designing for an Active HIGH load then modify the design to interface with LEDs in the Active LOW arrangement.
Modifying Digital Circuits via DeMorgan’s Theorem It is possible to modify a circuit design into a new design that utilizes different gates through the use of DeMorgan’s Theorem. For Lab 2, the only gates that can be used are inverters and Universal Gates (NAND and NOR). Thus, the initial circuit design will need
28 Analog & Digital Circuits
to be modified to only require these gates. DeMorgan’s involves distributing and factoring inverters through a Boolean equation. When inverters are moved into or out of an expression, the gates change from AND to OR, or from OR to AND. When using DeMorgan’s Theorem to modify circuits, it can be easier to perform DeMorgan’s visually as shown in Figure 2.3.
Figure 2.3: Visual DeMorgan’s. Inverter at the output can be moved to the input if the gate changes. Source: Brian Dean
Lab 2: Digital Design and Light Emitting Diodes (LEDs) 29
Lab 2 Pre-lab Name:
EXPERIMENT: Digital Design and Light-Emitting Diodes (LEDs) The A-Z Products Company has three loading bays at the rear of their warehouse with limited space to maneuver. When trucks arrive, the drivers can’t see whether or not the loading bays are occupied. The warehouse manager wants a light system to alert drivers as to the availability of the loading bays, a red light indicating all bays are full, yellow indicating there is only one bay available and a driver should wait on the street if he sees another truck heading down the drive to the rear of the building, and a green light indicating two or more bays are empty. A contractor has already installed sensors at the docks to indicate the presence of trucks in each bay. The sensors, labeled A, B, and C, provide a logic one when a truck is present, a logic zero otherwise. Your task is to design a controller for the light system. The output of the controller should be three outputs, each output a logic one to turn a light on, a logic zero to inhibit the light. 1. Complete the following truth table to describe your design. Using a total of three Karnaugh maps (one for each output), attempt to simplify the Red, Yellow, and Green signals. One Karnaugh map is provided for you.
Yellow
BC
Green
A
B
C
Red
0
0
0
0
0
1
0
0
1
0
1
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
A
00
01
11
10
30 Analog & Digital Circuits
2. Write equations for the output signals. Be sure to use Demorgan’s where helpful, e.g. (,A & ,B) 5 ,(A | B). Red 5 Yellow 5 Green 5 3. We can simplify the Yellow output signal by using the Red and Green output signals rather than the A, B, and C input signals. Write the equation that defines the Yellow output signal in terms of the Red and Green signals. Again, be sure to use Demorgan’s where helpful. Yellow 5 4. Draw the final circuit based on the results from steps 2 and 3.
Turn in this completed handout at the beginning of your lab.
Lab 2: Digital Design and Light Emitting Diodes (LEDs) 31
Lab 2 Procedure Name:
EXPERIMENT: Digital Design and Light-Emitting Diodes (LEDs) 1. Adjust the digital circuit found in the pre-lab to produce “Active LOW” outputs and modify the circuit using DeMorgan’s Theorem to produce a circuit using only the gates shown below. Using the pin-outs provided below, label each gate in your digital circuit with chip type and pin numbers. At any point, if you are unsure of your results, ask the lab instructor.
32 Analog & Digital Circuits
2. You will now prep the breadboard for wiring your circuit by: placing and powering the TTL IC chips, connecting the LEDs in an “active low” configuration, and wiring the input switches as shown in Figure 2.4. Please follow Steps 2.a to 2.e. a. Seat the TTL IC chips, LEDs, and dual-inline-package (DIP) switch into the breadboard. Be sure not to bend the pins in or out as you push the DIP packages into the board. b. Power the switches and TTL IC chips as shown. c. Place 390 V resistors (color code: orange – white – brown – gold) from the anode of the LEDs (rounded side) to the 15 V rail. d. Finally, place 390 V resistors from the GND rail to the DIP switch. +5V GND
ON
74LS27
74LS02
A B
74LS10
Green Red Yellow
C
Figure 2.4: Breadboard schematic, component placement, and power connections. Source: Brian Dean
Lab 2: Digital Design and Light Emitting Diodes (LEDs) 33
3. Wire your circuit. Connect your outputs to the cathodes (flat side) of the corresponding LEDs. Before applying power, have your lab instructor check your wiring. Initials ____________
4. Turn on the DC power supply. Use the DIP switch to control the A, B, and C inputs and confirm the operation of your circuit by completing the following truth table, placing a ‘1’ in the output column when the associated LED turns on. Compare your results with the truth table in the pre-lab. 5. To ensure everything worked properly, you may want to demonstrate the function of your circuit to your lab instructor.
A
B
C
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Red
Yellow
Green
Lab Report Suggestions For this lab you will want to include the following in your lab report: • A discussion on the process of digital design and how the process was applied to this lab • Any K-maps used • The final Boolean equations • The final circuit diagrams
34 Analog & Digital Circuits
Post-Lab Questions 1. What is the purpose of K-maps. 2. Why are NAND and NOR gates called Universal Gates (see companion textbook)? 3. When implementing in TTL is it better to use NAND and NOR or AND, OR, and NOT gates? Why or why not? Would the same apply to an FPGA implementation? 4. Describe the difference between Active High and Active Low. Why was it important to use Active Low to active the LEDs?
Lab 3 Introduction to Field-Programmable Gate Arrays (FPGAs) and Hardware Description Language (HDL)—Adder Circuit Learning Objectives Lab 3 provides an introduction to designing a binary addition circuit for an FPGA. After completing Lab 3, you will be able to:
➤➤ Design digital circuits using Aldec Active-HDL ➤➤ Simulate digital circuits and analyze the resulting timing diagrams ➤➤ Synthesis and Implement a design for target FPGA hardware ➤➤ Test digital circuits that have been programmed on an FPGA using a Digilent Basys board
Please use the above checklist as you complete the lab, checking items off as you gain the indicated knowledge or experience. If you finish the lab without checking off an item, it would be a good idea to discuss the topic with your laboratory instructor.
Field-Programmable Gate Arrays (FPGAs) Up to this point you have been implementing your digital designs using TTL logic which requires wiring of multiple gates together to achieve a particular goal. Imagine how difficult the wiring and debugging process would be for a circuit containing hundreds of gates. It would also be very difficult to adjust the design after it was wired. If it was determined that the circuit needed a single new input, the circuit would need to be completely rewired. As was discussed in Lab 2, it is possible to implement a design with different gates. 35
36 Analog & Digital Circuits
Which gates are used will affect the speed, power requirement, and cost of a digital circuit. All of these considerations must be taken into account when implementing a design in discrete components. In Lab 3, you will be tasked with implementing a design on a field-programmable gate array (FPGA). An FPGA is a programmable logic device that uses look-up tables (LUTs), flip-flops, and memory to implement a circuit. The FPGA stores a truth table in its LUTs, and when a new set of inputs is received, it looks-up what should be output. Other forms of programmable logic contain a lattice of gates that can be connected or disconnected through programming. Replacing the physical gates with LUTs allows an FPGA to implement much larger designs. FPGAs and other forms of programmable logic are programmed using hardware description language (HDL).
Hardware Description Language Hardware description language (HDL) is a programming language that is used to define how a circuit should function in response to various inputs. A designer can choose to define the design structurally by programming simplified Boolean Algebra equations in HDL code. The structural approach is similar to the approach used in Lab 2. A problem statement is converted into a set of Boolean algebra statements that can then be implemented by wiring gates together or by programming a reprogrammable logic device. The benefit of structural coding lies in optimization. Structural coding allows the designer to define how a system should be implemented. However, structural design can become unwieldy when numerous inputs must be considered, and it is the least flexible form of design. A structural design that has been designed to receive 3-bits of input, must be entirely redesigned to handle 4-bit. One of the benefits of HDL is the ability to design a circuit based on its behavior rather than defining its structure. Behavioral coding is more flexible than structural coding and prototyping tends to be quicker. However, behavioral design relies on the compiler to properly implement the circuit, so there is less control available for the designer to fine tune the system. Since behavioral code is designed around how a circuit should function, the number of bits input or output are not as big of a factor as they were for structural coding. For example, a binary adder will exhibit the same core behavior no matter if it is a 3-bit or 4-bit device. Defining that core behavior is all that is required when coding the adder using a behavioral approach. Designing circuits for reprogrammable logic systems can be achieved using either a structural or behavioral approach to HDL coding or the code can be automatically generated by a block diagram editor (BDE). The BDE approach can be a good first step to sketching out and testing parts of a larger design or tying multiple design components together into a cohesive whole. The BDE approach is also helpful for transition from a
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 37
discrete component implementation approach to a reprogrammable device. In BDE implementation, the designer draws the circuit in a schematic, and the program automatically generates the code to implement the circuit on an FPGA. The BDE approach is the technique most reliant on the software to complete the design. An additional benefit to HDL design is the ability to simulate the design before installing it onto an FPGA. The design is built using one or more of the coding methods: behavioral, structural, or BDE, then the designer tells the software what signals should be input to the design. The software will simulate the circuit’s response and a timing diagram will be produced. The timing diagram shows both the value of each input and output and the time when those values change. The designer must carefully consider how the circuit should be simulated. A small design with few inputs can be fully simulated, i.e., every combination of input can be tested. Larger designs may require selective simulation. Very large designs are often divided into different layers, with the lowest layer being the simplest and each consecutive layer increasing in complexity. The layers are simulated individually, so errors are easier to locate and correct. The final layer, called a top-layer design, is the layer where connections are made from the digital circuit internal to the FPGA and the pins on the outside of the chip. For Lab 3, you will be instructed in how to use the Aldec Active-HDL software to generate designs to be implemented on the FPGA. Parts of the design have already been programmed. The files can be found on the website. With these pre-coded files and the block diagram editor, you will be building a 3-bit Adder.
Binary Adders Binary addition is fairly simple mathematically. The largest single bit addition operation is shown in Equation (3.1). 1 1 11 11
(3.1)
The result from a single bit addition is two bits, the most significant bit of the result is called the carry bit, and the least significant bit is called the sum bit. An example of 3-bit addition is provided in Equation (3.2). 11 101 1111 1100
(3.2)
38 Analog & Digital Circuits
The right most column addition produces a carry bit that must be carried over to the next column. The center column receives this carry in bit, then the three numbers are added and another carry is generated. The final column receives the carry from the previous and generates a final carry out bit. Thus, the 3-bit operation was a repetition of calculations similar to the one shown in Equation (3.1). You will use this repetition to aid in your design of the 3-bit adder. The design begins with a Full Adder circuit that is capable of computing Equation (3.1). The full adder circuit is shown in Figure 3.1.
Figure 3.1: Full Adder circuit. Source: Brian Dean A full adder is constructed from two half adder circuits. In a half adder, the sum bit is produced by an XOR gate and the carry bit is produced by an AND gate. The additional OR gate in Figure 3.1 will produce a final carry out (Cout) bit if either of the half adders produced a logic HIGH carry bit. To design a 3-bit adder, the simple circuit in Figure 3.1 is chained to two additional full adders as shown in Figure 3.2. The thicker lines in Figure 3.2 are buses. A bus is a cable containing multiple wires. In Figure 3.2, each bus contains three wires. For example, the a(2:0) bus contains an a(2), an a(1), and an a(0) wire. Each of these wires carries a single bit. Put altogether, the three wires from a 3-bit binary number arranged in the order a(2)a(1)a(0). If a(2:0) 5 101, then a(2) 5 1, a(1) 5 0, and a(0) 5 1; in that order. With this knowledge, you can begin to interpret the circuit in Figure 3.2. The input a(2:0) and b(2:0) are both divided into three single bit signals that are sent to three separate Full Adder circuits. The bottom Full Adder (U3) computes the sum of the least significant bits, produces a carry that is received by the next adder, and so on. The system functions exactly as described for Equation (3.2). However, all these additions occur simultaneously, so the U3 adder has not produced the correct carry bit before the U2 adder computes its output. Eventually, the system will stabilize to the correct output, but not instantaneously. Other adder circuits exist, but Figure 3.2 is one of the simplest implementations and it is the one that will be built for Lab 3.
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 39
Figure 3.2: 3-bit Adder circuit. Source: Brian Dean
7-Segment Displays The output of the 3-bit adder will be a 4-bit binary number that could easily be displayed using four individual LEDs, but users tend to prefer a readable display that contains numbers and letters, rather than look at a series of lights. A seven-segment display will be used in Lab 3 to display the result of the addition to the user. A seven-segment display is seven LEDs arranged such that selective lighting of the LEDs will produce letters and numbers. The LEDs are arranged as shown in Figure 3.3. Lighting segment a, b, c, d, and g will show the number 3 on the display. A single display can be programmed to show all the letters and numbers of the hexadecimal a alphabet, so the 4-bit output of the 3-bit adder can be displayed in b f g hexadecimal using only a single display. The digital circuit that converts 4-bit binary values into the correct a-to-g signals for the display c e is provided on the webpage. d
If a base 10 number was desired as output, rather than a hexadecimal character, then more than one display will be needed. The d isplay will need to show numbers up to 15. When multiple displays are
Figure 3.3: Seven-segment display.
40 Analog & Digital Circuits
required, there are two options for wiring them. Each display can be individually controlled which will require a minimum of 14 wires, or the displays can be illuminated using time-division-multiplexing. Time-division-multiplexing is the practice of only turning on one display at a time. One display turns on while all other displays are off. When that display turns off, then the next display turns on. The process continues until all displays have been on once, then the cycle repeats. Since only one display is on, only seven control signals are required to produce the correct letter or number. Each additional display only adds a single control line that is used to turn on or off that display. The only reason this method works is due to how human’s see. Your visual system will see anything flashing above approximately 30 Hz as always on. For example, incandescent bulbs flash around 60 Hz and fluorescents flash around 120 Hz, but you see these as constant unwavering light sources. Thus, if the seven-segment displays are turned on and off at a high enough frequency, the human visual system will not see any displays turn off. To calculate the minimum transition speed, multiply 30 by the number of displays. For example, four displays need a minimum transition frequency of 120 Hz. Due to the clock speed on the Basys boards, you will use 190 Hz in Lab 3.
Binary Coded Decimal (BCD) Binary Coded Decimal (BCD) will be used in this lab to produce base 10 number on the seven-segment display. BCD is a coding scheme that is similar to hexadecimal, except only the binary numbers 0 to 9 are allowed. Equation (3.3) shows the conversion from a BCD sequence into a base 10 result. 1001_0101_0111 5 (957)10
(3.3)
The BCD code is divided in to groups of four bits (nibbles), and each nibble is converted to a base 10 number. The binary numbers, 1010, 1011, 1100, 1101, 1110, and 1111 are invalid in BCD coding.
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 41
Lab 3 Pre-lab Name:
EXPERIMENT: Introduction to FPGAs and HDL—Adder Circuit Part A: 3-bit Adder 1. For the 3-bit Adder circuit shown below, 3-bit inputs a5111 and b5011 are provided with no carry-in. a. Perform the binary addition and fill in the value for each of the input, sum and carry bits in the boxes in the logic diagram below. The inputs a and b are already filled out for you in the diagram. 111
011
cin0 a 111 b + 0 1 1 s ___ cout = _
Source: Brian Dean
b. Assuming unsigned notation, what math operation was carried out in 1.a. Please show all values in base 10.
42 Analog & Digital Circuits
2. The circuit below is designed to convert a 4-bit binary input called sw(3:0) into BCD. Four bits can result in number ranging from 0 to 15, so the maximum BCD code will be tens(3:0)50001 and ones(3:0)50101. Together, the full BCD sequence for 15 is 0001_0101. Complete the timing diagram below to determine if the circuit can be used to convert 4-bit binary numbers into a BCD equivalent. U2 sw(3:0)
sw(3:0)
a(3:0)
s(3:0)
ones(3:0)
q(3:0)
b(3:0)
s
2x1 Mux U1
(0110)2
g(2:0),cout
a(3:0)
cout
b(3:0)
s(3:0)
cout
tens(3:0)
g(2:0)
cin
4-bit Adder sw(3:0)
0
1
s(3:0) c out ones(3:0) tens(3:0)
Source: Brian Dean
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 43
Lab 3–Aldec Active-HDL Tutorial A. Create New Workspace Create a folder on the desktop (NOTE: The Aldec program doesn’t work well with spaces in the path name. Make certain there are no spaces in all folders you create and all files you save. For example, you will want to make sure to name the folder “IntroToHDL” not “Intro To HDL”)
Start the program by double-clicking the Active-HDL 9.3 icon on the desktop. Click Next.
Close all dialog boxes and pop-up windows until you see the Getting Started dialog box shown below. Select Create New Workspace and click OK.
44 Analog & Digital Circuits
Type Lab3 for the workspace name, click Browse and navigate to C:\Users\username\Desktop\NameOfFolder.
Ensure the Add New Design to Workspace box is checked
Click OK.
B. Create New Design Select Create an Empty Design with Design Flow and click Next.
Click VERILOG Click Next
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 45
Type your BinaryAdder for the design name and click Next.
Click Finish on the next dialog box that opens.
C. Create New Source Maximize the window and click on BDE. BDE stands for Block Diagram Editor. You will designing your circuits using the BDE, then the Aldec program will automatically generate the code necessary to implement the design on the FPGA. Ensure the Add the generated file to the design is checked. Click Next
Ensure Verilog is checked, then click Next.
46 Analog & Digital Circuits
Type FullAdder (remember Aldec doesn’t work with spaces in names) and click Next. Please note, the names for the various ports of the FullAdder module must exactly match what is printed in the next few pages. Any deviation, such as a change in which letters are capitalized, will result in an error in a later portion of the lab procedure.
Click New Type Cin Follow the last two steps to add inputs a and b. Click New. Type Cout. Change the port to output by clicking out.
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 47
Click New, then add another output called sum. When you have all ports defined as shown below, click Finish.
This will generate a block diagram (schematic) template with the input and output ports displayed.
48 Analog & Digital Circuits
Click the Show Symbols Toolbox icon
Click the 1 on the Built-in symbols
Click the and2 name with the mouse and drag it to the schematic. Repeat until you have two AND gates in the schematic.
Scroll down in the symbols toolbox until you find xor2 and or2. Add two XOR gates and an OR gate to the schematic.
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 49
Select Wire (W), then draw a Full Adder circuit. Click Compile
D. Simulate Click design flow Click options for functional simulation
Click here to select design files
50 Analog & Digital Circuits
Move FullAdder.bde, to the right by first clicking on the FullAdder, then clicking the single right arrow. The double right arrow will move all files. When FullAdder.bde is in the right-hand text box, click OK
Click Choose, select FullAdder for the top-level design, and click Add.
Click OK
Check the box Use Default Waveform If FullAdder appears here, then you are ready to Click OK. Click functional simulation
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 51
The simulation window will open. Select all NETXX signal names, then click delete. Reorder the signal names by clicking and dragging until the signals appear as below:
Right click on Cin, select Stimulators
Move the dialog box until you can see the signals names in the background. Click on the signal a, then signal b. They should move into the Stimulators dialog box as shown to the right
52 Analog & Digital Circuits
In the Stimulators dialog box, click on the Cin signal. When it is selected, click on Clock Set the Frequency to 12.5 MHz. Click Apply. If the check box beside Cin is checked with type Clock, then you are ready to move onto signal a. Set the stimulator for a to a Clock at a frequency of 25 MHz. Click Apply. Set the stimulator for b to a Clock at a frequency of 50 MHz. Click Apply. When Cin, a, and b have check boxes checked, click Close. You have setup the inputs to cycle through the entire truth table. By setting the fastest clock to 50 MHz, it will take (1/50 MHz)34 5 80 ns to cycle through all possible input combinations. At the top of the window, type 80 ns into the text box.
Click Run For (F5) Run For will force the simulation to run for whatever time limit you set in the text box. For this simulation, 80 ns is long enough to fully test the circuit. The timing diagram should look like the one shown below. Carefully check the signals to ensure your circuit is wired correctly. If errors are found, make sure to click End Simulation before correcting problems in the circuit wiring. Once errors are corrected, repeat from Section D. Simulate.
If everything looks correct, click End Simulation. You can use the Snipping Tool built-in to the Window’s operating system to capture a picture of the waveform or you can click the disk and save the *.awc file. You can also print the simulation by selecting File > Print File from the menu bar. Click on the design flow tab.
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 53
E. Create Top-Level Design
Click on BDE.
Ensure the Add the generated file to the design check box is checked. Click Next. Make sure the Verilog box is selected. Click Next. Type FullAdder_top. Click Next Click New.
Type sw Set array indices to 1:0.
54 Analog & Digital Circuits
Continue adding ports until your block appears as shown below
Click Finish Click Show Symbols Toolbox If necessary, expand BinaryAdder and Units without symbols until you see the Name FullAdder in the Symbols Toolbox Click FullAdder and drag it into the schematic Click on Bus (B) and draw a bus to each input and output.
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 55
Select Wire (W) and draw wires from the buses to the correct inputs as shown below.
Double click on the wire connecting to Cin. Name the Segment btn(0). Click OK
Following the same procedure, name the remaining wires as shown to the right. Press function key F11 to compile
56 Analog & Digital Circuits
F. Synthesize Click design flow Click synthesis options.
Pull down menu and select FullAdder_top for the Top-level Unit. Select Device from pull down list: • 3s100etq144 for the Basys board, • 3s100ecp132 for the Basys2 board Click OK
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 57
Click synthesis
If the Synthesis finishes successfully, Click Close.
G. Implement Download to the desktop the file basys.ucf for the Basys board or the file basys2.ucf for the Basys2 board. Click implementation options.
Select Custom constrain file from the pull down menu. Browse and select the correct *.ucf file
58 Analog & Digital Circuits
Select Translate and check Allow Unmatched LOC Constraints.
Shift right until you can click on BitStream Uncheck Do Not Run Bitgen
Click Startup Options Select JTAG Clock for FPGA Start-Up Clock Click OK Click implementation
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 59
When Implementation is finished, click Close.
H. Download For a Basys board, plug in the USB connector and check that the power switch is in the down position. For a Basys2 board, the USB connector should be already connected, so turn the power switch to the up position. On the desktop, double-click the Adept icon and browse for: C:\Users\bkdean\Desktop\IntroToHDL\Lab3\BinaryAdder\implement\ ver1\rev1\fulladder_top.bit Click Program. Use Switches 0 and 1 and Button 0 to test the function of the Full Adder.
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 61
Lab 3 Names (separated with comma):
EXPERIMENT: Introduction to FPGAs and HDL—Adder Circuit Part A: Simulation and Synthesis of a Full Adder—An Aldec Active-HDL Tutorial 1. Follow the Aldec Active-HDL Tutorial on the previous pages. 2. Once FullAdder_top has been programmed onto the Basys board, use the right two switches and right button to complete the following truth table (btn(0) 5 Cin, sw(0) 5 b, sw(1) 5 a) Cin 0 0 0 0 1 1 1 1
a 0 0 1 1 0 0 1 1
b 0 1 0 1 0 1 0 1
sum
Cout
Part B: 3 bit Adder (Adder3bit.bde Module). 1. Download Lab3Files.zip from the webpage to your desktop. 2. Right click on the Lab3Files.zip folder and select Extract All. 3. From the top menu, select Design . Add Files to Design…. Browse to the Lab3Files folder and select basys.ucf or basys2.ucf, Adder4Bit.bde, mux21.bde, mux24.bde, clkdivider.v, and x7seg.v. Select Make a local copy, then click Open. From the top menu, select Design . Compile All. 4. Click the design flow tab, select BDE and create the file Adder3bit and wire it as shown in Figure 3.4. The FullAdder module is the block design in Part A. When complete, compile Adder3Bit.bde.
62 Analog & Digital Circuits
Figure 3.4: Adder3Bit.bde module. Source: Brian Dean 5. Click design flow. For simulation options, when you select design files, remove FullAdder.bde from the right window and move Adder3Bit.bde to the right window. When choosing the Top-Level Unit, start by deleting the FullAdder, then choose Adder3Bit for the top-level unit. Simulate Adder3Bit.bde. Rearrange the signal order to Cin, a, b, s, and Cout. Delete the other signals named NetXX (where XX is a number). • Use a binary up-counter stimulator for b that starts at 0 (decimal) and increments by 1 every 20 ns. • Use a binary up-counter stimulator for a that starts at 0 (decimal) and increments by 1 every 160 ns. • Use a formula stimulator for Cin and enter: o value: 0 time offset: 0 ns o value: 1 time offset: 800 ns o value: 0 time offset: 1.28 us Simulate for a run time to 1.28 us. Expand the window and click Zoom To Fit. Ensure the data is correct. End the simulation and save an image of the waveform.
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 63
Part C: Testing the Adder3Bit Module on the Basys boards (Adder3Bit_top.bde Module) Figure 3.6 shows the top-level design for the Adder3Bit module called Adder3Bit_top that is comprised of three lower-level modules. The module adder3bit is the 3-bit adder you made from Figure 3.4. The module clkdivider is a clock divider Verilog file clkdivider.v. The module x7seg displays a 4-bit hex digit on the 7-segment display module of the Basys board. This module is described in companion text, and is defined in the Verilog file x7seg.v. 1. Click the design flow tab, click BDE, and create the file Adder3Bit_top using the block diagram shown in Figure 3.5. Each of the blocks are found in the symbols toolbox under “Units without symbols.” Right-click on the clkdivider symbol, select Properties, click on the Parameters tab, and set the actual parameter value to 18. The GND symbol can be found by clicking a drop menu towards the top right of the screen. The menu is shown in Figure 3.5.
Figure 3.5: Adder3Bit.bde module with x(15:0) disconnected. Source: Brian Dean 2. Once all the wires and buses have been appropriately named as shown in Figure 3.5, extend the wires and buses to complete the connection to the x(15:0) input as shown in Figure 3.6. This two-step process of first naming all the buses and wires, and then connecting them must be followed for all buses that are comprised of wires and buses from multiple locations. You will repeat this two-step process in Step D.1.
64 Analog & Digital Circuits
Figure 3.6: Top-level module, Adder3Bit_top.bde. Source: Brian Dean 3. Compile Adder3Bit_top.bde but do not simulate. Synthesize and implement your design. In Synthesis Options change Top-level Unit to Adder3Bit_top. Click Implementation and wait for it to complete. 4. On a Basys2 board, turn the power on. On a Basys board, connect its USB cable. Use the Digilent Adept program to download your program to the Xilinx chip. The Basys (or Basys2) board should now function as a three-bit adder with the result printed in hexadecimal on the seven-segment display. 5. Test the circuit using the inputs provided in Table 3.1 and shade in the sevensegment display blocks in the table.
Table 3.1: Three-bit Adder results Cin
a(2:0)
b(2:0)
0
001
011
0
101
110
0
010
101
1
011
110
1
101
111
1
111
111
Display
Lab 3: Introduction to FPGAs and HDL—Adder Circuit 65
Part D: 4-Bit Binary to BCD Encoder (BinaryToBCD.bde Module) 1. Click the design flow tab, click BDE, and create the file BinaryToBCD using the block diagram shown in Figure 3.7. Remember to name all the wires and buses before connecting them to the tens(3:0) output just like you did in Step C.1.
Figure 3.7: BinaryToBCD.bde. Source: Brian Dean 2. Compile and Simulate the BinaryToBCD module. When simulating, remember to switch both the file and the top-level design to BinaryToBCD. To simulate, right click on the Inp signal, select stimulator, and set it to count ever 20 ns. Simulate for 320 ns. 3. Examine the timing diagram. Does it appear similar to what you expected based on your prelab results? 4. If everything looks like it is working correctly, click on the Adder3Bit_top tab at the bottom of the screen. You should now see your 3-bit adder circuit. Adjust the circuit to include the BinaryToBCD module as shown in Figure 3.8. Again, remember to name everything before making connection to the Inp input and the x(15:0) input.
Figure 3.8: Top-level module, Adder3Bit_top.bde after adding the BinaryToBCD module. Source: Brian Dean
66 Analog & Digital Circuits
5. Select Compile All. Synthesize and implement your design. You shouldn’t need to change any synthesis or implementation options. 6. On a Basys2 board, turn the power on. On a Basys board, connect its USB cable. Use the Digilent Adept program to download your program to the Xilinx chip. The Basys (or Basys2) board should now function as a three-bit adder with outputs printing on the seven-segment display in base 10. 7. Test the circuit using the inputs provided in Table 3.2 and shade in the sevensegment display blocks in the table.
Table 3.2: Three-bit Adder results with BCD Cin
a(2:0)
b(2:0)
0
001
011
0
101
110
0
010
101
1
011
110
1
101
111
1
111
111
Display
Post-Lab Questions 1. Describe the process for implementing a circuit on an FPGA. 2. Why is simulation important? 3. Why should you simulate each piece of the circuit? 4. Can the BinaryToBCD design be expanded to handle 8-bits? 5. Compare and Contrast implementing circuits with discrete components (Lab 2) to implementing on an FPGA (Lab 3).
Lab 4 Digital-to-Analog Conversion Learning Objectives Lab 4 provides an introduction to Digital-to-Analog conversion and oscilloscopes. After completing Lab 4, you will be able to:
➤➤ Simulate a circuit in PSPICE ➤➤ Simulate a clock divider ➤➤ Measure the frequency of a clock divider’s output in both simulation and in hardware
➤➤ Wire a resistive ladder network for converting 4-bit binary into an analog voltage
➤➤ Measure signals using cursors on an oscilloscope ➤➤ Measure signals using built-in automatic measurement tools on an oscilloscope
Please use the above checklist as you complete the lab, checking items off as you gain the indicated knowledge or experience. If you finish the lab without checking off an item, it would be a good idea to discuss the topic with your laboratory instructor.
Digital-to-Analog Conversion Digital-to-Analog conversion is achieved by a device that is, unsurprisingly, called a Digital-to-Analog Converter (DAC). The sound card in your computer and the audio module in your cell phone are DACs paired with an amplifier. The digitized speech or music is sent to the DAC which produces a time varying voltage that is then amplified based on the volume setting. The digital signal is encoded using a set number of N bits. A N-bit binary number can encode a total of 2N items. For a DAC, those items are different 67
68 Analog & Digital Circuits
voltage levels between a minimum and maximum value. For example, if the minimum voltage level is 0 V and the maximum voltage level is 5 V, then an 8-bit binary number will represent one of 256 different voltage levels between zero and five volts. Equation (4.1) provides the conversion between the base 10 value, Y, of an N-bit binary value and the voltage within the reference volt range, X. v out = xN Y 2
(4.1)
Continuing the example of an 8-bit number and a voltage range of 5V, a binary code of 0000_0000 is equal to 0V, and a code of 1011_0010 is equal to
5 (178) = 3.477V .A 256
DAC is used to e lectronically convert a binary input to a voltage output. There are a number of methods to achieve the conversion. The version that will be used in this lab is the R-2R resistor ladder shown in Figure 4.1. The B3 to B0 labels represent the most significant to the least significant bits of a 4-bit binary number. Each of the 4-bits will either be 0 V (representing a logic LOW) or 3.3 V (representing a logic HIGH). The resistors in the ladder network divide the voltage from each bit by a different value depending on the bit position. The governing equation for this circuit is provided in Equation (4.2).
V=
B3 B B B + 2+ 1+ 0 2 4 8 16
(4.2)
Note that each bit is divided by a multiple of 2 with the most significant bit being divided by the least amount and the least significant bit being divided by the largest amount. The pattern of the ladder network can be repeated to handle additional bits. To better understand how the circuit will respond to various inputs, it will be simulated using two different methods as part of the prelab. An analog circuit can be simulated in a similar manner as the digital circuits of Lab 3. The circuit is constructed in a schematic
V B3 B2 B1 B0
2 kΩ 2 kΩ
1 kΩ
2 kΩ
1 kΩ
2 kΩ
1 kΩ 2 kΩ
Figure 4.1: R-2R Ladder network DAC. Source: Brian Dean
Lab 4: Digital-to-Analog Conversion 69
window of simulation software. There are a number of circuit simulation software packages to choose from. The commonly used free versions are OrCAD Lite, PSPICE Student 9.1, LTSPICE, and TINA-TI. Simulation software used in industry, tends to come with a high price tag but provides numerous features beyond simple simulation. Whichever simulation software is used, the circuit is first drawn, then the type of simulation is set, and the simulation is run. The software calculates the response at every node in the circuit. These results can be graphed or downloaded for processing using another software package. The second method for predicting how a circuit will function, is through analysis and computation. The circuit is analyzed and a governing set of equations are derived. These equations are entered into a mathematics program such as MATLAB, and the response at the output are determined for particular inputs. Both of these techniques will be used to determine how the circuit in Figure 4.1 will respond to 4-bit binary inputs ranging in value from 0 to 15.
Clock Division To test a prototype of the circuit in Figure 4.1, the circuit will need to be built in a breadboard, then a set of inputs will need to be generated. The output of a counter will be used as inputs to the DAC, but there is a problem. The Basys boards have a master clock speed of 50 MHz. At this rate, the counter will change the input to the circuit every 20 ns, so the circuit will produce a different voltage at the same rate. Whatever device is used to measure this voltage will need to capture this quickly changing signal. A voltage meter will be much too slow. An oscilloscope might have a large enough bandwidth to successfully display the 20 ns changes, but it would be easier if the voltage changed slower. A clock divider can be use to slow down the transition speed of a counter. A clock divider receives the master clock input and outputs a different frequency clock depending on which of its outputs is used. If the first output is used, the clock speed is halved. If the second output is used, the clock speed is divided by four. Equation (4.2) relates the new clock speed, fout, to the master clock, mclk, and the chosen output, y. You have already used a clock divider in Lab 3 to generate the 191 Hz signal. In that case, the master clock was 50 MHz, and the chosen output number was y 5 18.
fout = 1y mclk 2
(4.2)
In this lab, you will simulate a clock divider in Aldec Active-HDL and use the frequency measurement tool to measure the frequency of the different outputs. The clock divider will be downloaded onto an FPGA board, and the frequency of various outputs will be measured using an oscilloscope. Finally, outputs two through five will be used as input to the prototype DAC.
70 Analog & Digital Circuits
Oscilloscope You will use an oscilloscope to plot the time changing voltage output of the DAC. An oscilloscope is a powerful measurement tool for time varying signals. The oscilloscope measures the voltage then plots it on the screen, then measure the voltage slightly later in time and plots that voltage on the screen. It does this continually.
Oscilloscope Probe The first step to using an oscilloscope is connecting the test leads. Oscilloscope probes are special cables design to interface with an oscilloscope. An example of oscilloscope probes is shown in Figure 4.2. A single probe has a measurement port and a black wire terminated with an alligator clip. The alligator clip should always be attached to the signal ground.
Figure 4.2: Oscilloscope probes. © Andrew Buckin/Shutterstock.com
Oscilloscope probes come in three varieties: non-attenuating, attenuating, or selectable attenuating. A non-attenuating probe provides a direct connection between the probe tip and the oscilloscope input. There is no extra hardware in the cable to compensate for impedance mismatches between the probe and the oscilloscope input terminal. A BNC-to-BNC cable would be considered a non-attenuating connection. A non- attenuating connection is often labeled as a 1X connection, since the connection is a one-to-one transfer from circuit to oscilloscope. If the probe is sensing 1 V, then the oscilloscope input will receive 1 V. The primary drawback for a non-attenuating probe is it reduces the maximum frequency that the oscilloscope can successfully measure. To successfully measure the full frequency range of the oscilloscope, an attenuating probe should be used. An attenuating probe has additional circuitry within the probe that increases the impedance of the probe and oscilloscope interface. The increased impedance reduces the load on the measured circuit and increases the frequency the system can successfully measure. The final probe type is a selectable attenuating probe. This type of probe has a switch that can be used to select between no attenuation and
Lab 4: Digital-to-Analog Conversion 71
attenuation. The amount of attenuation depends on the probe, but they typically come in 5X, 10X, and 100X varieties. Before measuring a signal with an oscilloscope, the scope must be told what type of probe is connected. The probe setting menu is usually accessed by clicking the button just above where the probe is connected to the oscilloscope. The channel number is usually printed on this button. One press of the button opens the probe menu. In the probe menu, you can set the attenuation level, i.e., 1X, 5X, 10X, or 100X. You can also invert the signal measured by the probe, adjust the bandwidth (frequency) limit of the probe, or set the probe to be AC coupled. An AC coupled probe will ignore any DC signals, so if you are only trying to measure the fluctuations of a signal, AC coupling is a good idea. If you are interested in measure both the DC offset as well as the fluctuations, then DC coupling is best.
Scale (Time and Magnitude) and Positioning After setting the probe parameters and connecting the probe to an energized circuit, the next step is to center the signal in the screen. There are four dials that are used to center the signal on the screen. Two of the dials control the scale of the divisions on the screen. A single knob located towards the top of the control panel is used to adjust the time scale. The screen will be divided, horizontally, into a number of blocks. How much time is represented within each block is controlled by the time scale knob. Setting the time scale too short will result in only a small portion of the signal appearing on the screen. Setting the timescale too long will result in multiple periods of a periodic signal appearing on the screen. Initially, you will want to adjust the time scale such that only a few periods appear on the screen. If you know the frequency of the input signal, the time scale can be set before the circuit is energized. In addition to the single time scale dial, each channel will have a magnitude scale dial. The magnitude per division can be set independently for each channel. If the magnitude dial is set too large, then the signal will appear very small on the screen. If the dial is set too low, then the signal may not appear on the screen at all. With the magnitude and time division scales set correctly, the signal can be repositioned on the screen using the positioning dials. There will be a position dial for each channel and one near the time scale dial. The position dials for the channels will move the signal vertically. The position dial located near the time scale dial will move the signal to the left and to the right. Many digital oscilloscopes will provide an automatic scaling button. Pressing this button will automatically adjust the scale and position until the waveform appears on the screen. This button may also adjust the probe settings to a default arrangement, so you will want to double check that your probe settings are still correct after using this button for the first time.
72 Analog & Digital Circuits
Triggering The triggering options for an oscilloscope are used to setup how the scope refreshes the screen. If the triggering is set correctly, the signal will appear stationary on the screen. If the triggering is not set correctly, the signal may appear blurry, glitchy, or look like its moving across the screen. The trigger menu allows the user to set which channel is the trigger source and the signal characteristic that is triggering the oscilloscope. If the trigger source is correct and the signal characteristic is correct, but the signal is still not appearing stationary on the screen, then the trigger level is incorrect. A dial is used to adjust the trigger level. If the trigger level is outside the vertical bounds of the signal, then the oscilloscope will never trigger. The trigger source can be any one of the channels or an external trigger. The external trigger can only be used if a signal is being sent to the external trigger port usually located in the back or along the side of the oscilloscope. For the labs in this manual, Channel 1 is the trigger source and a rising or falling edge is the signal characteristic.
Measurement and Cursors Measuring signals on a digital oscilloscope can be achieved either using automatic measurement tools or using cursors. Measurement with cursors requires the user to adjust the positions of the cursors to measure differences in time or magnitude. A cursor is a measurement point that can be moved vertically and horizontally on the screen. A readout will display the cursor’s location based on the current setting of the scale and time division dials. Cursors can either be floating or pinned to a particular signal. When a cursor is pinned to a signal, it will automatically track the vertical movements of the signal. The user only has to adjust the left to right position of the cursor. To pin a cursor to a signal, select the signal source then select Track. To take measurements with cursors, two cursors are positioned at different points along a signal or at different points between two signals and the time and voltage differences convey information about the signal(s). Standard measurement such as: peak-to-peak voltage, frequency, pulse width, and phase can be computed automatically by the digital signal processing hardware internal to the oscilloscope. To turn on these measurement, a measurement button is pressed, then a type of measurement and a channel is selected. Once everything has been selected, the measurement will stream to the screen. As the signal changes, the measurement will automatically update. There are limitations to these measurements. For example, if less than one period of a periodic signal is displayed, the measurement hardware won’t be able to measure frequency.
Lab 4: Digital-to-Analog Conversion 73
Lab 4 Pre-lab Name:
EXPERIMENT: D/A Converter Part A: D/A Converter PSpice / Matlab 1. Simulate the R-2R resistor network shown in Figure 4.3 by following the PSpice Tutorial – Part 1 that you can download from the website. Print out your simulated waveform. Click and drag your cursor to draw a box around your circuit and text box on your PSpice circuit diagram (you may need to zoom out) and print out your circuit diagram. V B3 B2 B1 B0
2 kΩ 2 kΩ
1 kΩ
2 kΩ
1 kΩ
2 kΩ
1 kΩ 2 kΩ
Figure 4.3: R-2R Network. 2. What base 10 (decimal) values are formed and in what order by the digital stimulators on the signals B[3:0]? Answer: 3. Write Matlab statements that will plot the output V as a function of the 4-bit binary number B[3:0]. First, type clc, Enter, type % and your name, then Enter to identify your work. Then, you will need to create four test vectors, B3 to B0, each of which contain 17 test values such that they collectively will test all of the binary values from 0 to 15 and then return to zero. Enter the formula, V 5 B3/2 1 B2/4 1 B1/8 1 B0/16. You will need to create a vector t which also contains 17 test values, 0 to 16 so you can use the function stairs(t,V) to plot the formula. Use a semicolon to close every statement except the formula (V 5 …). 4. When you get a plot, click the Insert icon at the top of the plot window, click Title, and type your name to identify your plot. Print out your Matlab program and plotted graph.
74 Analog & Digital Circuits
5. Does this plot resemble the simulated waveform from PSpice? (Y/N) _____________ 6. What is the maximum value produced by the formula used (4 significant figures)? _____________ Staple your PSpice circuit diagram, PSpice simulation waveform, Matlab program, and Matlab plot to this completed prelab handout before turning it in.
Lab 4: Digital-to-Analog Conversion 75
Lab 4 Name:
EXPERIMENT: D/A Converter References Part A: 8-Bit Counter 1. Download the counter.v and the basys.ucf or basys2.ucf files from the website to the desktop. 2. Open Active-HDL and create a new workspace named Lab4 in a folder on the desktop. Use DACinput for the design name. From the top menu click Design -. Add Files to Design…. Browse for the counter.v and basys.ucf or basys2. ucf files, select Make a local copy, then Add these file to your design. From the top menu, click Design -. Compile All. 3. Click BDE, and create the file count8 that implements an 8-bit counter using the block diagram shown in Figure 4.4. Set the parameter value of the counter to 8. Compile count8.bde.
Figure 4.4: count8.bde module. Source: Brian Dean
4. For simulation, use a 50 MHz clock as a stimulator for the clk input, and a formula that sets the value to 1 at 0 ns and 0 at 5 ns for the btn input. Run the simulation for 8 ms (type 8 us) and select Zoom to Fit. Make sure the system is functioning correctly. Post-Lab Question 1: What is the minimum simulation length required to fully simulate the counter? Is 8 ms enough? 5. Use the Measurement Mode on the simulation in Active-HDL (Figure 4.5) to measure the periods of the signals shown in Table 4.1 and complete the table. Measure between two consecutive rising (or falling) edges which are not at the left edge of the screen. Round calculations to 3 significant figures.
76 Analog & Digital Circuits
Figure 4.5: Measurement Mode button (circled). Table 4.1: Measured Values from Simulation Signal clk q[0] q[1] q[2] q[3] q[4] q[5] q[6] q[7]
Measured period (ns)
Calculated frequency (MHz)
Post-Lab Question 2: Which equation could have been used to predict the output frequencies before simulation? Hint: Think clock divider. Use the equation to calculate q[0], q[3], and q[7]. Does the frequencies of Table 1 match the frequencies calculated using the equation? Part B: Oscilloscope 1. Synthesize and implement the count8.bde program. Connect the USB cable to a Basys board. For a Basys2 board, turn on its power. Use the Adept program to download your count8.bit file to the Basys board. 2. Using oscilloscope probes, connect the outputs q(7) and q(6) from pins 1 and 2 of header ja on the Basys board to Channel 1 and Channel 2, respectively, of the oscilloscope. For scope probe grounds, you will need to create a breadboard ground bus. Slide a wire into the GND slot of the ja header then to the breadboard. Finally, connect wires to the breadboard ground bus and clip the scope probe grounds to these wires. 3. In the probe menu for each channel select DC Coupling, BW Limit OFF, Invert OFF, and Probe 10X from the menu. Setup the Oscilloscope to trigger on the falling edge of the channel 1 signal.
Lab 4: Digital-to-Analog Conversion 77
4. Locate the waveforms by adjusting the time scale and amplitude scale for both channels. Make sure that the final amplitude settings are set to the same value and both channels fill as much of the screen as possible. Make sure the final time scale setting allows for at least two periods of the signals to appear on the screen. 5. Use the Measurement function to measure the frequency and period of channel 1. Record the Frequency and Period of q(7). Frequency ______________ kHz Period ______________ ms
Post-Lab Question 3: Does the measured Frequency and Period compare with the values measured and calculated in Table 1 for q(7)? (Y/N) ___________
6. Use the Measurement function to measure the frequency and period of channel 2. Record the Frequency and Period of q(6). Frequency ______________ kHz Period ______________ ms
Post-Lab Question 4: Does the measured Frequency and Period compare with the values measured and calculated in Table 1 for q(6)? (Y/N) ___________ 7. You can also make measurements using the Cursors button. Measure the frequency and period of the q(7) and q(6) signals by manually adjusting the cursors (you can use the track function to make your job easier). Compare the results with those found using the automatic measurement system. 8. Choose a measurement technique, and measure the frequency and period of q(5) and q(4). This will require you to move the Oscilloscope probes to the correct pins of the ja header. You do not need to move the probe grounds. Post-Lab Question 5: Compare and contrast the various methods for preforming measurements with an Oscilloscope. Discuss any pros or cons associated with each method.
Part C: D/A Converter Breadboard / Oscilloscope 1. What is the resistor color code for each of the following resistor values and tolerances? 1.0 kV 5% __________ , __________ , __________ , __________ 2.0 kV 5% __________ , __________ , __________ , __________
78 Analog & Digital Circuits
2. Using 1.0 kV and 2.0 kV resistors, wire up the R-2R resistor network shown in Figure 4.6 on the breadboard. Measure the resistance of the resistors before completing your circuit. Connect q[7:4], respectively, on header ja[1:4] to the inputs B3 to B0 of your circuit. Note the ground of the circuit in Figure 4.6 is the same ground bus created in Part B. Connect the Channel 1 probe of the oscilloscope to the output V of your circuit. Connect the probe ground to the breadboard ground bus. Shut off Channel 2 on the Oscilloscope and disconnect the CH 2 probe. V B3 B2 B1 B0
2 kΩ 2 kΩ
1 kΩ
2 kΩ
1 kΩ
2 kΩ
1 kΩ 2 kΩ
Figure 4.6: R-2R D/A Network. Source: Brian Dean
3. Show your lab instructor your results Initials ____________ Post-Lab Question 6: Are there any differences between your PSpice simulation printout from the pre-lab and the oscilloscope waveforms? Explain. 4. Remove power from the Basys board. Turn off the oscilloscope and return all probes and cables to their proper location. Disconnect your circuit and straighten the resistor leads and wires. Delete the folder that you created at the beginning of this lab, remove any files or folders you put on the system and empty the Recycle Bin.
Lab 5 Direct Current (DC) Circuits Learning Objectives Lab 5 provides an introduction to direct current (DC) circuits. After completing Lab 5, you will be able to:
➤➤ Use PSPICE to simulate DC circuits ➤➤ Wire and power simple DC circuits. ➤➤ Describe how resistors, capacitors, and inductors function in DC circuits. ➤➤ Measure resistance, voltage, and current. ➤➤ Calculate the equivalent resistance of resistors in series or parallel. Please use the above checklist as you complete the lab, checking items off as you gain the indicated knowledge or experience. If you finish the lab without checking off an item, it would be a good idea to discuss the topic with your laboratory instructor.
Direct Current Voltage, Current, and Power Nearly every device you use operates on DC. The most common sources of DC power are batteries and AC-to-DC converters. Batteries generate electrons through a chemical reaction. Converters use rectifiers and filters to generate a constant voltage from the alternating current (AC) at a wall plug. The AC-to-DC converter can be either inside the device, e.g., desktop PC, or outside the device, e.g., laptop. The brick located along your laptop’s power cord is the AC-to-DC converter. The power supply in the lab generates DC voltages. While DC has ‘current’ as part of its name, DC sources are voltage sources. The amount of current produced varies depending on the resistance of the circuit attached to the source, but the voltage remains constant. Voltage can be an electrical potential or an electromotive force and is defined as the derivative of energy (v) in 79
80 Analog & Digital Circuits
terms of charge (q) or V 5 dv/dq. Voltage can be thought of as the pump that forces the charge to flow through the circuit. Current is a measure of how much charge is flowing through the circuit per unit time, i.e, I 5 dq/dt. Voltage is measured in volts [V], and current is measured in amperes [A]. If the voltage and current values are multiplied, the resulting value is called power, P 5 VI. Power is measured in Watts [W], and it defines how much energy is produced or consumed per unit time, P 5 dv / dt. A battery will have a set amount of energy available when fully charged. The rate at which this charge is consumed will depend on the power requirement of the circuit. High power will result in the energy being expended quickly, and low power will result in longer battery life. In Lab 5, you will: measure voltage and current; compute power; and experiment with resistors, capacitors, and inductors in DC circuits.
Resistors A resistor is a device that restricts the flow of charge through a circuit. Resistors are the most common components found in circuits. In Lab 1, resistors were used to limit the amount of current flowing through the switch and to prevent a short circuit when the switch was turned on. In Lab 2, resistors were used to limit the current through the LEDs. The resistance, in ohms [Ω], of a material is determined by the material’s resistivity (), the length (l), and cross-sectional area (A) of the material: R 5 (l) /A. The more conductive a material, the lower is its resistivity and thus the lower its resistance. Despite being highly conductive, the wires in a circuit also have some resistance. Therefore, it is advisable to keep the wires and measurement leads as short as possible when testing circuits. In general, a component’s effect in a circuit is defined by the component’s voltage– current relationship. Ohm’s Law defines the voltage–current relationship for resistors. The well-known relationship is expressed in Equation (5.1). V 5 IR(5.1) Assuming the voltage remains constant across a resistor, an increase in resistance results in a decrease in current. Said another way, if the same force (voltage) is applied to push charge through the resistor, an increase in the resistance to the flow of charge will result in less charge passing through the device.
Capacitors Capacitors are energy storage devices that store potential energy (voltage). Parallel plate capacitors are constructed by placing two conductive plates within close proximity and separating them with an insulating material called a dielectric. The capacitance of a parallel plate is dependent on: the quality of the insulating material defined by the materials relative permittivity («r), the permittivity of free space («0 ), the area of overlap of the plates (A), and the distance between the plates (x). The capacitance of a parallel plate capacitor,
Lab 5: Direct Current (DC) Circuits 81
in Farads [F], is C 5 («r«0 A)/x. When a DC voltage is applied to an uncharged capacitor, electrons flow from the supply and accumulate on one plate of the capacitor. The negative charge drives electrons away from the opposite plate resulting in positive charge on one plate and negative charge on the other. This charge separation produces an electric potential across the capacitor that continues to build until it matches the voltage of the input. When the voltage across the capacitor equals the voltage of the input, the circuit is in equilibrium and no more current flows. A capacitor in a DC circuit acts like an open (a break in the circuit). Assuming a constant capacitance, the voltage–current relationship for a capacitor is defined by Equation (5.2). (5.2) I = C dV dt
Inductors Inductors are energy storage devices that store energy in a magnetic field. The simplest form of an inductor is a solenoid, a coil of wire wrapped around a core. The inductance of an inductor depends upon the relative permeability of the core (mr), the permeability of free space (m0), the number of wire windings (N), the length of the winding overlapping the core (l), and the cross-sectional area of the core (A). The inductance, in Henrys [H], of an inductor is given by: L 5 (mr m0N2A)/l. The voltage–current relationship for an inductor is provided in Equation (5.3). (5.3) V = L dI dt For a DC circuit, the current is constant so the voltage across an inductor in a DC circuit will be zero. An inductor in a DC circuit acts like a short (a wire).
Designing Analog Circuits and Resistor Combinations Designing analog circuits is more complicated than digital design. It requires handling variables that can take on a near infinite number of values rather than the simple ones and zeros of digital design. The first step in learning to design analog circuits is to learn to analyze a wide variety of circuits. The analysis of numerous circuits will produce an intuition about circuits and how they will respond to various stimuli. It can take years of practice, analysis, and simulation to become proficient at analog design. To simplify the design process, a number of circuit topologies and design approaches can be used as a starting point. These topologies and design approaches are defined using variables for the components. It is up to the designer to determine the value of the various resistors, capacitors, and inductors to achieve a desired goal. Often the exact component values are not available or don’t exist. When the nearest available component value does not produce “good-enough” circuit functionality, it is sometimes possible to use a series or
82 Analog & Digital Circuits
parallel combination of components to achieve more desirable results. In Lab 5, you will experiment with series and parallel combinations of resistors. The equation for the equivalent resistance of N resistor in series is provided in Equation (5.4), and the equation for the same resistors in parallel is provided in Equation (5.5). Req,series 5 R1 1 R2 1 ... 1 RN21 1 RN(5.4) −1
1 + ... + 1 + 1 Req, parallel = 1 +(5.5) R1 R2 RN−1 RN
Measuring Voltage and Current Measuring voltage is relatively straight forward, and if you are completing the labs in order, measuring voltage is something you have been doing since Lab 0. Voltage measurement requires placing test probes across the component of interest. To the circuit under test, the meter appears as an infinite resistance and very little current is removed from the circuit. It is very difficult to damage a volt meter, due to the low current levels. Measuring current requires more care. When measuring current, the meter must become part of the circuit. The current must flow through the meter in order for the current to be measured. To the circuit under test, the meter appears as a very low resistance. It is the low resistance that can become a problem when attempting to measure current. It is very common for a student to mistakenly attempt to measure current in the same way that voltage is measured. When an ammeter is placed in parallel with a circuit component, the ammeter’s low internal resistance effectively shorts the component. When this occurs, a very large current is passed through the ammeter which can cause permanent damage to the meter. Ammeters have one or more internal, replaceable fuses that will blow prior to permanent damage occurring. Thus, it is important to follow the instruction carefully when attempting to measure current in this lab.
Lab 5: Direct Current (DC) Circuits 83
Lab 5 Pre-lab Name:
EXPERIMENT: Direct Current (DC) Circuits Part A: PSPICE Simulations 1. DC Voltage and Current Simulate the circuit to in Figure 5.1 to determine io. a. To place the DC voltage supply, Draw --. Get New Parts (Ctrl1G) then type VDC in the search box, press Place and Close (Return/Enter). Once one is placed, right click. Double click on the 0V label and change to 6V. b. Place the resistor and set its value in the same manner used in prelab 4 (recall that Ctrl1R will rotate parts). c. Zoom in on your circuit by pressing Ctrl1A then dragging a box around your circuit. Add your name to the circuit Draw --. Text Box. Draw the box, then type your name. d. To wire the circuit, press Ctrl1W. e. Don’t forget to include an AGND from the Get New Parts (Ctrl1G) list.
iO
+ –
VS = 6.0v
R1
4.7 kΩ
Figure 5.1: Resistive Circuit. Source: Brian Dean
f. Press the simulate button (F11), then click the I icon in the top menu that looks like this,
. Press Ctrl1L to redraw the circuit. Move the blue cur-
rent boxes if they are covering up portions of your circuit. Click on the current nearest the resistor and notice a red arrow appears. This arrow indicates the direction of current flow. With the current nearest the resistor clicked, capture a screen shot or snip of the results. These results along with those that follow are iO to be printed and turned in with this prelab. R1 = 4.7 kΩ 2. Capacitors in DC Circuits Simulate the circuit in Figure 5.2 to determine VR, VC, and io. a. Place the DC voltage source and resistor as in part A.1. b. To place the capacitor, select Get new Parts (Ctrl1G), then type c in the search field and hit Enter/Return.
+ VR – + –
VS = 2.5V
+ VC –
Figure 5.2: RC circuit in DC. Source: Brian Dean
C = 10 nF
84 Analog & Digital Circuits
c. Simulate (F11), then press both the V and I icon.
d. Move the voltages and currents that are overlapping the circuit. With the current nearest the resistor clicked, capture the results. Don’t forget your name and to hit Ctrl1L before capturing the results. Value of io _________, Value of VR _____________, Value of VC ___________ 3. Inductors in DC Circuits Simulate the circuit in Figure 5.3 to determine VR, VL, and io. a. Use L as the search parameter in Get New Parts to place the inductor. b. Simulate and capture results. Make sure your results show the direction of the current.
iO
R1 = 1.0 kΩ + VR –
+ –
VS = 2.5V
+ VL L = 1 mH –
Figure 5.3:
RL circuit in DC. Source: Brian Dean
Value of io _________, Value of VR _____________, Value of VL ___________ Part B: Ohm’s Law Show your work. Except as noted, round all answers to three significant figures. 1. Resistance Calculation a. Determine the resistances (2 significant figures) and tolerances of the following: R1 Color Bands: Yellow, Violet, Red, Gold:
_____________ 6 ______ %
R2 Color Bands: Brown, Black, Red, Gold:
_____________ 6 ______ %
b. If R1 and R2 are connected in series, calculate the series resistance RS. RS 5 _______________ c. If R1 and R2 are connected in parallel, calculate the parallel resistance RP. RP 5 _______________
Lab 5: Direct Current (DC) Circuits 85
2. DC Voltage and Current
iO
a. Calculate the current io in Figure 5.4. + –
io 5
VS = 6.0v
R1 4.7 kΩ
Figure 5.4: Resistive Circuit. Part C: Capacitors and Inductors in DC circuits
Source: Brian Dean
Starting from the voltage–current relationship of capacitors and inductors, answer the following questions: 1. What is the current io in Figure 5.5? io 5
iO
R1 = 4.7 kΩ + VR –
+ –
VS = 2.5V
C = 10 nF
+ VC –
2. Calculate the voltage VR.
VR 5
Figure 5.5: RC circuit in DC. Source: Brian Dean
3. Calculate the voltage VC.
VC 5
4. What is the voltage VL in Figure 5.6?
iO
R1 = 1.0 kΩ + VR –
VL 5
+ –
VS = 2.5V
+ VL L = 1 mH –
5. Calculate the voltage VR.
VR 5
6. Calculate the current io.
io 5
Figure 5.6: RL circuit in DC. Source: Brian Dean
Lab 5: Direct Current (DC) Circuits 87
Lab 5 Name:
EXPERIMENT: Direct Current (DC) Circuits Part A: Power Supply and Multimeter—Ohm’s Law Voltages, currents, and resistances, can be measured using a multimeter. Always use the lowest possible range setting. Record all readings to three significant figures. 1. Resistance Measurement a. Measure the resistances of resistors R15 4.7 kV and R25 1.0 kV with the multimeter and determine the deviation from the expected value. Measured Resistance R1 5 _____________ ,
Percent deviation _________ %
Measured Resistance R2 5 _____________ ,
Percent deviation _________ %
b. Using the breadboard, connect the two resistors in series, measure the series resistance with the multimeter, and determine the deviation from the value calculated in the pre-lab. Measured Series Resistance RS 5 _____________ , Percent deviation _________ % c. Connect the two resistors in parallel, measure the parallel resistance with the multimeter, and determine the deviation from the value calculated in the pre-lab. Measured Parallel Resistance RP 5 _____________ , Percent deviation _________ %
Multimeter
iO
VΩHz
2. DC Voltage and Current Measurement a. Remove all wires and resistors from your breadboard. Plug your resistor R1 into a breadboard. Connect a variable DC power supply and multimeter to the resistor to form the circuit shown in Figure 5.7. Adjust the power supply to output 6.0 V.
V R1 + –
VS = 6.0v
4.7 kΩ mA A iO COM
Figure 5.7: Multimeter Setup. Source: Brian Dean
88 Analog & Digital Circuits
Have your lab instructor check your circuit before applying power to the circuit. Initials _____________ b. Apply power to the circuit, and measure the voltage using the multimeter. If need, carefully adjust the voltage output until you measure 6.00 volts on the multimeter. Record the voltage VS in Table 5.1. Measure the current by switching the multimeter to its DC current setting and record the current iO in Table 5.1. Disconnect power from the circuit.
Table 5.1: Measured Voltage and Current from Resistive Circuit Measured Values Voltage VS Current iO
Calculated Current
Comparison % Deviation
Part B: Capacitors in DC Circuits 1. Build the circuit shown in Figure 5.8 on a breadboard using the DC power supply for the 2.5 V voltage source. Before connecting the power supply to the circuit, connect it (the power supply) directly to the multimeter, and adjust the voltage to 2.50 V. Record your measured voltage as Vs in Table 5.2. 2. Apply the 2.50 V to the circuit. Measure the voltage VC across the capacitor. Calculate the voltage VR across the resistor and the current iO in the circuit. Record your results in Table 5.2. Disconnect the power from the circuit.
iO
R1 = 4.7 kΩ + VR –
+ –
VS = 2.5V
+ VC –
C = 10 nF
Figure 5.8: RC circuit in DC. Source: Brian Dean
Table 5.2: Measured Voltages of RC Circuit Resistance R1
Measured Values VS
VC
Calculated Values VR iO
Lab 5: Direct Current (DC) Circuits 89
Part C. Inductors in DC Circuits
iO
1. Leaving the resistor and capacitor circuit built on the breadboard, build the circuit shown in Figure 5.9. If you haven’t bumped the power supply or touched the voltage knob. The supply should still produce 2.5 V. 2. Using the multimeter, measure Vs, if necessary adjust the voltage to 2.50 V. Measure the voltage VL across the inductor. Calculate the voltage VR across the resistor and the current iO in the circuit. Record your results in Table 5.3.
R2 = 1.0 kΩ + VR –
+ –
VS = 2.5V
+ VL L = 1 mH –
Figure 5.9: RL Circuit in DC. Source: Brian Dean
Table 5.3: Measured voltages of RL circuit Resistance R2
Measured Values VS
Calculated Values VL
VR
I
Have your lab instructor check all your results before disassembling the circuits. Initials _____________
Post-Lab Questions 1. Did the resistor in the DC circuit function as predicted by Ohm’s Law? 2. How did the capacitor respond to DC voltage? 3. Can you name any applications for using capacitors in DC circuits? 4. How did the inductor respond to DC voltage? 5. Compare and contrast how voltage is measured with how current is measured.
Lab 6 Alternating Current (AC) Circuits and Filtering Learning Objectives Lab 6 provides an introduction to alternating current (AC) circuits and filtering. Upon completing Lab 6, you will be able to:
➤➤ Analyze simple AC circuits using phasors ➤➤ Simulate AC circuits with PSPICE ➤➤ Explain the difference between lowpass, highpass, bandstop, and bandpass filters
➤➤ Use a function generator to generate sinusoidal inputs for testing AC circuits ➤➤ Measure the output of AC circuits with an oscilloscope ➤➤ Perform a frequency sweep experiment to measure the magnitude response of a filter.
Please use the above checklist as you complete the lab, checking items off as you gain the indicated knowledge or experience. If you finish the lab without checking off an item, it would be a good idea to discuss the topic with your laboratory instructor.
Alternating Current (AC) Circuits An AC circuit is a circuit designed to receive sinusoidal input signals. An AC circuit will output a sinusoidal signal at the same frequency as the input signal, but the magnitude and phase will be different. An AC circuit can be designed to allow some input frequency to pass through the circuit with no attenuation while effectively blocking other f requencies. A circuit designed in such a way is called a filter. There are four basic filter types: lowpass, 91
92 Analog & Digital Circuits
highpass, bandpass, and bandstop. The ability to analyze AC circuits is foundational to analyzing circuits that are responding to any arbitrary periodic signal.
Sinusoids A sinusoidal function can either be expressed as cosine or sine and is defined by: magnitude Xm, frequency v, and phase f. The standard form for a cosine is expressed in E quation (6.1). Xmcos (vt 1 f)(6.1) The magnitude of the waveform describes the maximum and minimum value of the signal. The frequency describes how quickly the signal changes in time, and it is inversely proportional to the period of the signal. Frequency can be expressed as cycles/second (f ) with the units of Hertz or as angular frequency (v) with units of radians per second. The two expressions for frequency are related by a factor of 2p, specifically v 5 2p f. The final defining quantity for a sinusoid is called phase. Phase describes the amount of time shift present in the measured signal. In the phasor domain, phase is expressed as an angle in either degrees or radians. A cosine waveform and sine waveform with Xm 5 1, v 5 1, and f 5 0 are plotted in Figure 6.1.
π 2ω
Cosine π ω
3π 4ω
Sine π ω
2π ω t
π 2ω
3π 4ω
2π ω t
Figure 6.1: A single period of Cosine (Xmcos (vt)) and Sine (Xmsin (vt)) waves with magnitude, Xm 5 1, and frequency, v 5 1 rad/s. Source: Brian Dean
For AC circuit analysis, all phase angles are measured using a zero-phase cosine wave as a reference. Thus, a sine wave is expressed as a cosine wave with a phase shift of 90° or p/2 radians. Figure 6.2 shows the relationship between phase shift in the phasor domain and a delay or shift in the time domain. Equation (6.2) will be used in Lab 6 to convert from a phasor representation of phase to a time delay. Negative phase corresponds to a delay in time. Positive phase corresponds to an advance in time. ∆t =
φ° π φ° (6.2) = f ⋅ 360° ω ⋅ 180°
Lab 6: Alternating Current (AC) Circuits and Filtering 93
–30° Xm
0.52
Figure 6.2: A time delayed cosine wave with a phase of 230˚ shown both in the time and phasor domains. The cosine wave would be expressed as: cos(t 2 0.52). Source: Brian Dean
AC Circuit Analysis Using Phasors To analyze an AC circuit using phasors, the first step is to calculate the impedance of each energy storage device in the circuit. Once the impedance of all energy storage devices have been calculated, the circuit is solved as if all components in the circuit were resistors. Both inductors and capacitors are treated as resistors with imaginary valued resistance. All the basic circuit analysis techniques can be applied. For Lab 6, voltage divider will be the most helpful. If the circuit contains a capacitor or inductor, the result of AC circuit analysis will always be a complex valued equation. If solving for current or voltage, the most informative complex format is polar or exponential format, because these formats directly reveal the magnitude and phase of the signal. The equations for calculating the impedance of a capacitor and inductor are shown in Figure 6.3.
Figure 6.3: Impedance equations for capacitor
and inductor where j 5 Î21. Source: Brian Dean
Filters and the Frequency Sweep Approach A filter is a device or function that only allows certain frequencies to pass while other frequencies are blocked. The standard filter types are named based on what frequencies they pass or stop. Ideal lowpass, highpass, bandpass, and bandstop filters are shown in Figure 6.4. These signals are plotted as normalized magnitude verse frequency.
94 Analog & Digital Circuits
requencies where the magnitude has a value of 1, are passed. Frequencies where the F magnitude has a value of 0, are blocked. For example, the lowpass filter passes low frequencies up to a point labeled then blocks all higher frequencies. The cutoff frequency, fc, is the point where the filter stops passing frequencies. 1
1
1
fc
fc
Low-pass
High-pass
1
f1
f2
Band-pass
f1
f2
Band-stop
Figure 6.4: Common ideal filters. Source: Brian Dean Realworld filters can’t immediately stop or immediately start passing frequencies. Realworld filters will exhibit smoother, slowly decreasing or increasing transitions. There are a number of analysis techniques that can be used to determine if the circuit functions more like a highpass, lowpass, or another type of filter. In Lab 6, the frequency sweep technique will be used, both in simulation and experimentally. In analysis, the filter is determined by finding the limits as the frequency approaches zero (DC) and as the frequency approaches infinity. The full analysis is performed, and the magnitude and phase are expressed as equations in terms of frequency. Once computed, these equations can be graphed or the limits computed to determine the filter type. When graphed, the phase and magnitude are plotted in two separate plots, one of magnitude versus frequency and the other as phase versus frequency. Since the frequency range of filters can be quite large, the equations are typically plotted on a semi-log scale. The magnitude plot can either be plotted in linear or decibel (dB) scale. Equation (6.3) is used to convert from the linear scale to decibel scale. Notice that the argument of the logarithm is a ratio between output and input, thus the dB scale is related to the gain of the circuit at a particular frequency. V 20 log10 out dB (6.3) Vin
Function Generator A function generator is capable of generating a few standard waveforms such as: sinusoidal, square, ramp, and pulse. Depending on the model of the function generator, it may also be able to generate standard types of noise, frequency modulated (FM), amplitude modulated (AM), and/or biological (EKG) signals. The purpose of all these various signals is to test circuits to determine how they will respond to various stimuli. If a modern model of function generator does not come preprogrammed for a desired signal, it is possible to upload new waveforms to the memory of the device.
Lab 6: Alternating Current (AC) Circuits and Filtering 95
At a minimum, a function generator will allow a user to adjust the magnitude (sometimes referred to as amplitude) and the frequency of a waveform. For many function generators the peak-to-peak voltage is controlled which is twice the magnitude. Thus, for a magnitude of 5V, the function generator should be set to 10 Vpp, where the pp subscript stands for peak-to-peak. For specific instructions on how to use the model of function generator that you will use to complete Lab 6, check the datasheet, user’s manual, or talk with your lab instructor.
Function Generator Tutorial Procedure Step 1: Connect a BNC-BNC cable from the output port of the function generator to Channel 1 of the oscilloscope. Step 2: Set the function generator to output the signal 5cos(22500t). Start by setting the magnitude. If your generator provides setting in peak-to-peak voltage, then set the magnitude to 10 Vpp. Otherwise, set the generator to a 5 V output. Now set the frequency to 2,500 Hz. Step 3: Configure Channel 1 of the oscilloscope for a 1x probe, then press Auto Scale. Step 4: Use the oscilloscope to measure the magnitude and frequency of the signal to ensure it is near the settings programmed into the function generator. If they match, then you have successfully determined how to control the generator. Setting the output impedance of the generator: If the oscilloscope measurement of the signal’s amplitude appears to be off by a factor of two, then the function generator’s output impedance must be set. For the Agilent 33210A function generator, set the generator’s output to High Z by pressing Utility → Output Setup → change Load to High Z → Done.
Lab 6: Alternating Current (AC) Circuits and Filtering 97
Lab 6 Pre-lab Name:
EXPERIMENT: Alternating Current (AC) Circuits and Filtering AC Circuits (Filters) A filter is used to manipulate frequencies; attenuating some while boosting others. When you turn the bass to maximum on your car stereo, you are using a filter that boosts the bass frequencies. R2
R1 +
+ Vin –
+ VO1 –
C
Figure 6.5: RC circuit in AC. Source: Brian Dean
Vin –
+ VO2 –
L
Figure 6.6: RL circuit in AC. Source: Brian Dean
Your goal is to determine the type of filter represented by Figures 6.5 and 6.6. Part A: Determining the filter type for Figure 6.5: 1. Show that the gain,
Vo1 , in rectangular coordinates is: Vin
ωCR Vo1 1 1 j = − 1 + ωCR 2 Vin 1 + (ωCR )2 ( 1) 1
98 Analog & Digital Circuits
2. Show that converting to polar coordinates produces: Vo1 1 −1 = 2 ∠ tan (−ωCR1) Vin 1 + (ωCR1)
3. Find the magnitude of the filter’s gain as the input frequency approaches zero (DC) 1 lim 2 ω→ 0 1 + ωCR ( 1)
4. Find the magnitude of the filter’s gain as the input frequency approaches infinity (`) 1 lim ω→∞ 1 + (ωCR1)2
5. Based on the results from Steps 3 and 4, Figure 6.5 is what type of filter? (Circle one) Low Pass Filter High Pass Filter Band Pass Filter Bandstop Filter
Lab 6: Alternating Current (AC) Circuits and Filtering 99
Part B: Determining the filter type for Figure 6.6:
R2
V 1. Show that the gain, o 2 , in rectangular Vin coordinates is: (ω L) Vo 2 ω LR2 = + j 2 2 R + (ω L)2 Vin (R2 ) + (ω L)2 ( ) 2
+ Vin –
2
+ VO2 –
L
Figure 6.6: RL circuit in AC. Source: Brian Dean
2. Converting to polar produces: 2
R (ω L) Vo 2 = ∠ tan−1 2 2 2 Vin ω L (R2 ) + (ω L)
3. Find the magnitude of the filter’s gain as the input frequency approaches zero (DC) 2
lim
ω→ 0
(ω L) 2 (R2 ) + (ω L)2
100 Analog & Digital Circuits
4. Find the magnitude of the filter’s gain as the input frequency approaches infinity () 2
(ω L) lim 2 ω→∞ (R2 ) + (ω L)2
5. Based on the results from Steps 3 and 4, Figure 6.6 is what type of filter? (Circle one) Low Pass Filter High Pass Filter Band Pass Filter Bandstop Filter Part C: To confirm your results from Part A, construct the filter in PSPICE, and place a voltage probe, , as shown in Figure 6.7. Click Analysis → Setup, and in the dialog box that opens, click AC Sweep. Set the parameters as shown in Figure 6.8. Click OK, then Simulate.
Figure 6.7: PSPICE Schematic of RC circuit. Source: Brian Dean
Figure 6.8: AC Sweep parameters. Source: Brian Dean
Does the simulation confirm your results? Yes or No Print the results of your simulation. Part D: Following the same steps as outlined in Part C, simulate the circuit in Figure 6.6. Does the simulation confirm your results? Yes or No Print the results of your simulation.
Lab 6: Alternating Current (AC) Circuits and Filtering 101
Part E: AC circuit (single frequency measurments) 1. Capacitors in AC Circuits (Single frequency) a. Simtulate the circuit in Figure 6.9 to determine VR , VC , and io.
iO
R1 = 4.7 kΩ + VR –
a. To place the AC source, search 5 cos(2π1500t) V + C = 10 nF + VC for VAC in the parts list. Dou– – ble click on 0 V and type 5 V. b. To measure the current, you will need to add an IPRINT to the circuit. Begin by deleting Figure 6.9: RC Circuit. the wire between the source and the resistor. Search for IPRINT in the parts list. Connect the left terminal of IPRINT to the positive terminal of the source. Connect the right terminal of IPRINT to the left terminal of the resistor. Double click on the IPRINT. In the dialog box select AC then type ok in the Value box and hit enter. Do the same for MAG and PHASE. This sets up the printer to perform an AC analysis and output the current in polar coordinates. c. Double click the wire connecting the resistor to the capacitor and call it Vc. d. To measure VC, use a VPRITNT2. Position the printer near the capacitor and connect the terminal opposite the negative sign to the top of the capacitor (note that no wires are removed so the capacitor is still connected through a wire to the resistor). Connect the negative terminal of the VPRINT2 to the bottom terminal of the capacitor. Double click the VPRINT2 and set it up like you did the IPRINT. e. Setup another VPRINT2 to measure VR. f. Go to Analysis → Setup, click on AC Sweep. Set Total Pts to 1, and Start Freq and End Freq to 1500. This sets PSPICE to analyze the circuit at the frequency of 1.5 kHz. Click OK, then click Close on the Analysis Setup dialog box. g. Press F11 to simulate the circuit. You can minimize or close the new window that appears. Then go to Analysis → Examine Output. h. Scroll down and towards the bottom of the page and you should find the results for io. The IM quantity is the magnitude of the signal and the IP quantity is the phase of the signal. (Fill in the blanks in Engineering notation and 3 significant figures) FREQ 1.500E103
IM(V_PRINT#)
IP(V_PRINT#)
102 Analog & Digital Circuits
Scroll further and you should see the results for VR. FREQ 1.500E103
VM($N_####, Vc)
VP($N_####, Vc)
Scroll further and you should see the results for Vc. FREQ 1.500E103
VM(Vc,0)
VP(Vc,0)
i. Based on these results does the current, io, lead or lag VR and by how much?___________________________ VC and by how much?___________________________ 2. Inductors in AC circuits (Single frequency)
iO
a. Following a similar procedure as part 1, simulate the circuit in Figure 6.10 to determine VR, VL, and io. b. Find the results for io. (Fill in the blanks in Engineering notation and 3 significant figures) FREQ 1.500E103
5 cos(2π1500t) V +
R1 = 1.0 kΩ + VR –
–
+ VL –
Figure 6.10: RL circuit.
IM(V_PRINT#)
IP(V_PRINT#)
Scroll further and you should see the results for VR. FREQ 1.500E103
VM($N_####, Vc)
VP($N_####, Vc)
Scroll further and you should see the results for VL. FREQ 1.500E103
VM(Vc,0)
VP(Vc,0)
c. Based on these results does the current, io, lead or lag VR and by how much?___________________________ VL and by how much?___________________________
L = 1 mH
Lab 6: Alternating Current (AC) Circuits and Filtering 103
EGR 240 lab 6 Name:
EXPERIMENT: Alternating Current (AC) Circuits and Filtering Part A: Waveform Generator and Oscilloscope 1. Connect the BNC T-connecter to the output of the function generator then connect one end of the BNC T-connector to the channel 1 input of the oscilloscope using a BNC-BNC cable. Apply power to the oscilloscope and the function generator. 2. Set the function generator to a High Z load if you found it necessary in the function generator tutorial. Set the function generator to generate a 1 kHz sine wave with a peak-peak voltage of 4.00V. 3. On the oscilloscope, set Channel 1 for a 1X Probe. Locate, scale, and center the waveform on the oscilloscope screen. 4. Use the Trigger menu to set rising edge triggering with Source 1. If the waveform is moving, set the trigger level to 50%. The waveform should stop. Set the oscilloscope to measure the frequency, peak-to-peak voltage (Vpp), and the RMS voltage (Vrms). 5. Adjust the function generator until 1.00 kHz and a peak-to-peak voltage of 4.00V is measured by the oscilloscope. You may need to adjust the scaling of the oscilloscope as you make adjustments to the function generator. Read the Vrms on the oscilloscope. Record your measured RMS voltage in Table 6.1 and calculate the period of the waveform.
Table 6.1: RMS measurement at various frequencies Measured Values (Oscilloscope) Freq.
Vpp
1.00 kHz
4.00 V
10.0 kHz
6.00 V
100 kHz
8.00 V
Vrms
Calculated Period
6. Repeat step 5 for a 6.00 Vpk-pk, 10 kHz sine wave and an 8.00 Vpk-pk, 100 kHz sine wave, and complete Table 6.1.
104 Analog & Digital Circuits
Part B: Capacitors in AC Circuits
iO
R1 = 4.7 kΩ
+ VR – 1. Adjust the function generator until the 5 cos(2π1500t) V + C = 10 nF + oscilloscope measures a 5cos(2p1500t) VC V signal. Make sure you understand the – – relationship between the magnitude of the input in Figure 6.11 to the peak-topeak voltage on the oscilloscope, otherFigure 6.11: RC circuit. wise you will not generate the correct signal. Connect a BNC-Banana cable to the other end of the BNC T-connector, ensuring that the metal portions of the banana connectors never touch. Connect the banana connectors to the circuit. (Red is positive)
2. Connect an oscilloscope probe to channel 2 of the oscilloscope and configure Channel 2 for a 10X Probe. Use the probe to measure Vc. Locate, scale, and center the Vc waveform. Use the same vertical scaling for both channels. The Vc signal should be delayed in time by a small amount when compared to the input, i.e. the two signals do not perfectly overlap. If there is no delay, please have your lab instructor review your circuit. 3. Use the oscilloscope measure button to measure the frequency and peak-to-peak voltage of the Vc signal and record the value in Table 6.2.
Table 6.2: Voltages measurements of RC circuit Frequency Vs
Measured Values Amplitude Vs Frequency Vc
Amplitude Vc
4. To determine the phase (angle) component of the voltage Vc, we need to measure the time delay between the zero crossings of the two signals. To get a more accurate reading, adjust the oscilloscope scaling to zoom in on the small area between the two signals. You may have to adjust the horizontal position while making adjustments. You are ready to measure when your screen looks similar to Figure 6.12. (Note: Figure 6.12 shows rising edges. If you zoom in on falling edges, your screen will look slightly different.) 5. Once adjusted, use cursors to measure the time between zero crossings. The easiest way to make this measurement is to set the cursors to Track, then set one cursor to Channel 1 and the other cursor to Channel 2. After moving both cursors to the zero crossing of their respective signals, record the ΔX reading from the oscilloscope in Table 6.3. Alternatively, you could use the built-in measurement tools of the oscilloscope. You will measure the Delay between Channels 1 and 2 as seeing in Figure 6.13.
Lab 6: Alternating Current (AC) Circuits and Filtering 105
Figure 6.12: Time delay measurement. Table 6.3: Phase values Measured Values
Calculated Values
DX
Phase Vc
Figure 6.13: Automatic phase measurement. Use the following equation to calculate the phase of the Vc voltage.
f12 5 (delta / period ) * 360° 5 |DX| * f * 360°
106 Analog & Digital Circuits
6. The theoretical phase of VC can be calculated using: tan21(vCR) 5 f Using this equation and the measured phase from the previous step, calculate the actual value of your capacitor. We are using 20% tolerance capacitors, so any deviation beyond 20% should be discussed with your lab instructor before moving on. Calculated Capacitance C 5 _____________ ,
Percent deviation _________ %
Part C: Measuring the Magnitude Response of an RC Filter 1. You should still have the circuit of Figure 6.14 built on the breadboard. For this portion of the lab you will input different frequencies and measure the response. 2. If it was required in the tutorial, double check that the function generator’s output is in High Z. 3. Use an oscilloscope probe to measure the output voltage on Channel 2. 4. Use the measure function on the oscilloscope to measure:
R1 = 4.7 kΩ
+ +
VO
5 cos(ωt) V
–
–
Figure 6.14: RC Filter.
• Channel 1: Peak to Peak voltage • Channel 1: Frequency • Channel 2: Peak to peak voltage 5. Adjust the input voltage until Channel 1 measures 10 Vpk-pk signal, and complete Table 6.4.
Table 6.4: Magnitude response of Figure 6.14 Input frequency (Hz) Output peak-peak voltage (V) 100 300 1000 3000 10E3 30E3 100E3 300E3 1E6
C = 10 nF
Lab 6: Alternating Current (AC) Circuits and Filtering 107
Part D: Inductors in AC Circuits 1. Build the circuit shown in Figure 6.15. Carefully set the function generator to produce the correct input signal. (Note the frequency is now 150 kHz) 2. Following similar steps as those used in Part B, measure the amplitude and phase of VL.
iO
R1 = 1.0 kΩ
5 cos(2π150000t) V +
+ VR – + VL –
–
L = 1 mH
Figure 6.15: RL Filter.
Table 6.5: Voltage and Phase measurements of RL circuit/filter Frequency Vs
Measured values Amplitude Frequency Amplitude VS VL VL
Calculated values ΔX
Phase VL
( )
3. The theoretical phase of VL can be calculated using: tan−1 R = φ ωL Using this equation and the measured phase from the previous step, calculate the actual value of your inductor. Calculated Inductance L 5 _____________ , Percent deviation _________ % If your percent deviation is very large, please have your lab instructor check your circuit before proceeding. Part E: Measuring the Magnitude Response of an RL and RLC Circuit 1. Repeat Part C for the circuit in Figure 6.15. Complete Table 6.6.
Table 6.6: Magnitude response of RL Filter Input frequency (Hz) 100 300 1000 3000 10E3 30E3 100E3 300E3 1E6
Output peak-peak voltage (V)
108 Analog & Digital Circuits
2. Repeat Part C for the circuit in Figure 6.16. Complete Table 6.7
Table 6.7: Magnitude response of RLC Filter
L = 1 mH
C = 10 nF
+ 5 cos(ωt) V
–
+ VO –
Figure 6.16: RLC Filter.
R1 = 4.7 kΩ
Input frequency (Hz) 100 300 1000 3000 10E3 30E3 100E3 300E3
Output peak-peak voltage (V)
1E6
Post-Lab Questions 1. Based on results from Part A, what is the relationship between the period and the frequency? 2. Using the results from Part A, calculate the ratio of Vpk-pk/2 and Vrms for each of the three waveforms. What is the average ratio for the three waveforms and where does this ratio come from? 3. What does the phase angle in the frequency domain correlate to in the time domain? 4. Using the data from Tables 6.4, use MATLAB to create a vector for the Frequency column and a vector for the Output Peak-Peak Voltage column, then use the command: semilogx(FrequencyVector, OuputVoltageVector) where FrequencyVector and OutputVoltageVector are whatever names you gave to the vectors. 5. Repeat question 4 using the data from Table 6.6. 6. Repeat question 4 using the data from Table 6.7. 7. Based on the plots generated from question 4-6, what type of filters are shown in Figures 6.14 through 6.16? 8. Compare and contrast the results of the lab with the ideal filter shapes provided in the lab introduction.
Lab 7 Operational Amplifiers Learning Objectives Lab 7 provides an introduction to operational amplifiers. Upon completing Lab 7, you will be able to:
➤➤ Design basic amplifier circuits to achieve a desired gain ➤➤ Use PSPICE to simulate operational amplifier circuits ➤➤ Measure the input and output of amplifiers using an oscilloscope ➤➤ Wire and measure the gain of amplifier circuits ➤➤ Describe the conditions that will force an amplifier to saturate or rail Please use the above checklist as you complete the lab, checking items off as you gain the indicated knowledge or experience. If you finish the lab without checking off an item, it would be a good idea to discuss the topic with your laboratory instructor.
Operational Amplifiers Operational amplifiers (op-amps) are very useful tools in analog circuit design. Due to their high input impedance and low output impedance, they can be inserted into nearly any circuit without affecting the original circuit’s operation. Op-amps can be used to: • connect a circuit with high impedance to a load or circuit with low impedance; thereby preventing loading effects • amplify or attenuate a signal • generate a voltage output from an input current or generate a current output from an input voltage • implement filters to remove unwanted frequencies from signals while preserving desired frequencies
109
110 Analog & Digital Circuits
Op-amp circuits can be analyzed by following Nodal Analysis techniques. When using nodal analysis to analyze op-amp circuits, it is important to remember the ideal amplifier rules; no current enters the inverting and non-inverting terminals of the amplifier and with negative feedback, the voltage at the non-inverting and inverting terminals are equal. Also, there is no need to write a nodal analysis equation at the output of the amplifier unless the output current of the amplifier is to be calculated. Following these techniques, the gain of the inverting and non- inverting amplifier topologies, shown in Figure 7.1, can be calculated.
R2 R1
VO=(1+R2/R1)Vin
+
Vin (a) R2
Vin
R1
VO=(–R2/R1)Vin
+
(b)
Figure 7.1: (a) Non-inverting amp and (b) inverting amp. Source: Brian Dean
Limitations of Operational Amplifiers There are a number of limitations to real-world, non-ideal op-amps. Non-ideal amplifiers will approximate ideal amplifiers as long as the gain isn’t set too high and the input frequency is kept lower than around 20 kHz. If high gains or high frequencies are needed, then the non-ideal characteristics of the amplifier must be considered. In Lab 7, the limitation on input magnitude and frequency are examined. The input magnitude is limited by the power rails of the amplifier and the amplifier gain. If the amplifier is powered by 15 V, then the amplifier cannot output voltages greater than 15 V. In fact, the output limit can be as low as 12 V with a 15 V power rail. Higher gains will result in a smaller input voltage range. For example, a gain of 10 with power rail of 15 V only allows input voltages up to 1.2 to 1.5 V, but a gain of three allows input voltage up to 4 to 5 V. When an input magnitude is too high, the amplifier will generate an output magnitude up to a limiting value, and the amplifier is said to be saturating or railing. This phenomenon will be measured in Lab 7. The frequency limits of amplifiers are set by the open loop cutoff and the gain. Higher gains will result in lower frequency ranges. The relationship between gain and the frequency limit (BWlimit) is defined by the amplifier’s gain-bandwidth product (GBWP) as expressed in Equation (7.1). BWlimit = GBWP Gain
(7.1)
Lab 7: Operational Amplifiers 111
Lab 7 Pre-lab Name:
EXPERIMENT: Operational Amplifiers Components available in the lab Resistors 1 kV, 2 kV, 4.7 kV, 10 kV
Capacitor 10 nF
Inductor 1 mH
Part A: Inverting Amplifier 1. Draw the circuit for a standard inverting amplifier:
2. Choose the resistor values from the components available in the lab to give a gain of 10. Record the resistor values: R1 5
R2 5
3. Something that you may have missed in your circuit drawing is the 1/2 voltage rails. These are very important and provide the power for the op-amp, these are commonly left off circuit drawings. Build your inverting amplifier in PSpice using the part, uA741 for the op-amp. Hint: To create the 1/2 voltages required for the op-amp, you can use the configuration shown to the right. The 1 node of V1 provides 112 V and the – node of V2 provides 212 V. The node between V1 and V2 is grounded. This same approach will be used in the lab. 4. Use VSIN as your signal input voltage source.
Source: Brian Dean
112 Analog & Digital Circuits
Set the parameters of the VSIN component as: Note: Double click on the VSIN component to see the parameters • VOFF 5 0 • VAMPL 5 1 • FREQ 5 1000 The VOFF parameter sets the DC offset voltage. The VAMPL parameter sets the amplitude of the sine wave. The FREQ parameter sets the frequency of the sine wave in Hz. 5. Next, you will run a Transient Analysis on your circuit to generate the output. a. First, we have to select the voltages we want to plot. Place a voltage probe, , at the positive terminal of your VSIN component and at the output of the amplifier. b. Now you need to setup the transient analysis. Click Analysis Setup, then click Transient. You need to decide: • h ow many data points to print. We want all the data points, so set the parameter Print Step: 0ns. • how long to run the simulation. We want at least 5 periods of our sine wave.
1 f
One period is found using the equation T = , thus
T=
1 = 1ms . If we want 5 periods, we need to set the parameter 1000
Final Time: 5m.
• t he sampling period. Assuming you want to sample at least 1000 times per period and one period of the signal is 1 ms, then 1000 points per period would require a sample period of
1ms = 1µs . PSPICE 1000
must calculate a new value every microsecond. Set Step Ceiling: 1u. PSPICE might choose to give you more data, but we know we will get at least 1000 points per period.
6. Click F11 (or Analysis
Simulate).
You should get something that looks like:. Print your circuit and your graph. Source: Brian Dean
Lab 7: Operational Amplifiers 113
7. To see the effect of the Step Ceiling parameter. Go back into your simulation setup and leave Step Ceiling parameter blank. Re-simulation, and comment on the quality of the graph.
Source: Brian Dean
8. Set your Step Ceiling parameter back to 1u, then change the VAMPL parameter of your VSIN component to 1.5. Simulate.
You should get something that looks like:
. Print your graph.
9. In step 8, your amplifier saturated. An operational amplifier can only output as much voltage as is provided to its power rails. In this case we are providing 612 V. Given the gain of your circuit and input voltage of 1.5 V amplitude, what minimum power rail voltage would have been required to prevent saturation? 6
114 Analog & Digital Circuits
Part B: Non-Inverting Amplifier 1. Draw the circuit for a standard non-inverting amplifier (keep R1 and R2 the same values as were used in part A):
2. What is the value of the gain of your non-inverting amplifier? Gain 5 3. Given the gain of the non-inverting amplifier, what is the (theoretical) maximum input voltage (VAMPL) that will not cause saturation? 4. Next wire your non-inverting amplifier in PSPICE and run Transient Analysis on your circuit. Make sure to choose, VOFF 5 0, FREQ 5 1000, and a VAMPL value that does not cause the amplifier to saturate. Print your circuit and your graph. 5. Examine your graphs from the inverting and non-inverting amplifier. How do they compare?
Lab 7: Operational Amplifiers 115
Lab 7 Name:
EXPERIEMENT: Operational Amplifiers Part A: Datasheets When using a new component or designing a circuit, it is very important to find the manufacturer’s datasheet for that component. Since the manufacturers want you to use their products, datasheets are typically very easy to find. 1. Type uA741 into your favorite search browser. One of the first few hits should be:
2. Selecting this item will take you the Texas Instrument website for the 741 operational amplifiers. The datasheet can be downloaded from this site or you can view the online version by clicking the appropriate tab. For this lab, you need the “Pin Configuration” from the datasheet. You should see 4 different configurations; one for each different package. Inspect the uA741 component you were given to determine which of the 4 configurations to use. If you are unsure of which configuration to use, please call your lab instructor over for help. Part B: Setting up the Power Rails 1. Adjust the cables in the power supply to match the picture below:
116 Analog & Digital Circuits
2. Ensure that the power supply output is OFF. Attached your Vcc1, GND, and Vcc2 cables to alligator clips then to wires. Insert the wires into the breadboard as shown below
3. If it isn’t already done, insert your uA741 amplifier into the breadboard across the trough. Make sure the notch in the IC is pointing to your left. 4. Attach a wire from the Vcc2 row of the breadboard to the correct pin of the IC 5. Attach a wire from the Vcc1 row of the breadboard to the correct pin of the IC 6. Set channel 1 and channel 2 of the power supply to 12 V at 1 A. Part C: Setting up the input voltage and the oscilloscope 1. Set the function generator’s output to High Z, if necessary. For the Agilent 33210A this is accomplished by pressing Utility Output Setup change Load to High Z Done 2. Using a T-connector, connect a BNC-BNC cable from the T-connector on the signal generator to channel 1 of the oscilloscope. Set Channel 1 to a 1X Probe. Set Channel 1 to display 1 volt per division. 3. Attach an oscilloscope probe to Channel 2. Set Channel 2 to a 10X Probe. Attach the other end of the probe to a wire connected to the OUTPUT pin of the op-amp. Set Channel 2 to display 5 volts per division. ms . 4. Set the oscilloscope to show 500 div 5. Ensure the oscilloscope is set to trigger on Channel 1.
Lab 7: Operational Amplifiers 117
Part D: Inverting amplifier 1. Build your inverting amplifier circuit from Part A of the prelab. Have your lab instructor check your circuit before applying power. Initials 2. Apply power to the breadboard. 3. Connect the function generator to the input of your amplifier circuit using a BNC-to-banana cable. The BNC side of the cable should be connected to the T-connector. The banana side should be used to connect to your circuit. Set the function generator’s frequency to 1 kHz and amplitude to 2 Vpp. 4. Make sure that your circuit is not saturating and measure the input and output of your inverting amplifier and record the following parameters: Vpp,in 5
Vpp,out 5
gain 5
5. Adjust the peak-to-peak input voltage until you just start to see clipping. What was the magnitude (not peak-to-peak voltage) of your input when the circuit first started clipping?
6. Adjust the peak-to-peak input to 3 Vpp. Do the results match the prelab? 7. Turn off the output of the signal generator. Turn off the output of all channels of your power supply. Part E: Non-Inverting Amplifier 1. Build your non-inverting amplifier circuit from Part B of the prelab. Record the parameters you chose for the input below: Have your lab instructor check your circuit before applying power. Initials 2. Apply power to the breadboard. 3. Connect the function generator to the input of your amplifier circuit using the BNC-to-banana cable. Set the amplitude of the signal generator to 2 Vpp. 4. Make sure that your circuit is not saturating and measure the input and output of your non-inverting amplifier and record the following parameters: Vpp,in 5
Vpp,o 5
gain 5
118 Analog & Digital Circuits
5. Adjust the peak-to-peak input voltage until you just start to see clipping. What was the magnitude (not peak-to-peak voltage) of your input when the circuit first started clipping?
6. Adjust the peak-to-peak input to 2.2 Vpp. Do the results appear similar to your prelab results? 7. Adjust the peak-to-peak input to 2 Vpp. Feel free to experiment by increasing the input frequency and/or sending ramp or square waves. Have your lab instructors look over your work and ask any questions you may have.
Post-Lab Questions 1. What is the difference between an inverting and non-inverting amplifier? 2. How can you tell if your amplifier is saturating? 3. Describe how the dual channel power supply was setup to achieve both 112 V and 212 V simultaneously. 4. If an output voltage of 5 V is required from an input of 10 V, what type of amplifier should be used? Why?
Lab 8 Introduction to Instrumentation and Measurement—The Strain Gauge Learning Objectives Lab 8 provides an introduction instrumentation and measurement. After completing Lab 8, you will be able to:
➤➤ Describe what a transducer is and how a resistive, capacitive, and inductive transducer functions
➤➤ Explain the function of a metal foil strain gauge ➤➤ Analyze a Wheatstone Bridge and explain its purpose in a measurement device ➤➤ Analyze a Difference Amplifier ➤➤ Wire a potentiometer into a circuit and use it to adjust the function of the circuit
➤➤ Build a sensor using a transducer, bridge circuit, and amplifier Please use the above checklist as you complete the lab, checking items off as you gain the indicated knowledge or experience. If you finish the lab without checking off an item, it would be a good idea to discuss the topic with your laboratory instructor.
Instrumentation and Measurement Capacitors, inductors, and resistors can serve as transducers for mechanical measurement. A transducer is a device that converts one form of energy into another. For example, a condenser microphone uses a capacitor to transduce sound waves into an electrical signal.
119
120 Analog & Digital Circuits
The simplest transducers are based on the defining equations for resistors, capacitors, and inductors provided in Equations (8.1) to (8.3). R=
ρ l (8.1) A
C=
ε0εr A (8.2) x
L=
µ0µr NA (8.3) l
A resistor will function as a transducer if a mechanical input is allowed to change the resistor’s length (l), cross-sectional area (A), and/or the resistor’s resistivity (r). A parallel-plate capacitor becomes a transducer when a mechanical input is allowed to alter the area of overlap of the capacitor plates (A) and/or the distance between the plates (x). A solenoid type inductor can be used as a transducer if a mechanical input changes the length of overlap between the core and the windings (l). Also, the electromagnetic relationship central to the function of the inductor can be used to produce a transducer that does not need to come in contact with the mechanical system.
Strain Gauge In Lab 8 a strain gauge will be used to measure the strain applied to a flexible gripper device. Strain is a measure of how much a substance deforms in the presence of a force acting upon it. Strain is expressed as the ratio between the change in the substance’s shape to the normal shape of the substance, e.g., « 5 DL/L where DL is the change in length and L is the original length. A strain gauge is a resistive transducer that can be constructed from metal foil or from a thin waver of semiconductor material. A sketch of the metal foil gauge that will be used in Lab 8 is shown in Figure 8.1.
Figure 8.1: Sketch of a metal foil strain gauge. When force is applied, multiple foil lines are strained resulting in a cumulative resistance change. Source: Brian Dean When a force is applied to the metal foil, the material will experience a strain and the length and cross-sectional area of the foil will change. The length will increase and the cross-sectional area will decrease which will result in an overall increase in the foils resistance. The resistivity of the foil will also change, but only by a negligible amount. The amount of resistance change depends on the amount of strain and the sensitivity
Lab 8: Introduction to Instrumentation and Measurement—The Strain Gauge 121
(gauge factor) of the strain gauge, but the resistance change is typically small. To use the transducer, the small resistance change must be converted into an electrical signal. A Wheatstone Bridge is a common circuit used to sense changes in a transducer.
Wheatstone Bridge For a transducer to be considered a sensor, the transducer’s change in resistance, capacitance, and/or inductance must be sensed in some way and a measurable electrical signal must be produced. The most common circuit used to sense the transducer’s change is called a Wheatstone Bridge. The bridge is shown in Figure 8.2 and the circuit equation is provided in Equation (8.4). R2 R4 (8.4) V0 = − V R1 + R2 R3 − R4 in R1 R3 (8.5) = R2 R4 A bridge is said to be balanced when its output is zero. Equation (8.5) must be true for the bridge in Figure 8.2 to be balanced. In measurement systems, the bridge is typically balanced at some starting point for the measurement. For Lab 8, the bridge will be bala nced using a potentiometer while no strain is applied to the transducer. A “trim potentiometer” is a common circuit component used to compensate for resistor mismatches or other manufacturing tolerances in circuit components. To balance the bridge in Lab 8, the circuit will be constructed, the strain gauge attached, and the potentiometer adjusted until a zero-output voltage is measured while there is no strain applied to the gauge. Once balanced, any strain applied to the gauge will correspond to an output voltage. To finish building the strain sensor for Lab 8, the output of the bridge will be further conditioned through the use of a difference amplifier. In general, the additional signal conditioning in a measurement system can be a boost to the signal, a filter, and/or the signal can be converted to a digital signal. For Lab 8, a difference amplifier will be built, and used to amplify the output from the Wheatstone bridge.
DC
+ VO –
Figure 8.2: Wheatstone Bridge. Source: Brian Dean
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Potentiometers A potentiometer is a variable resistor. The change in resistance is achieved by changing the length of the resistive material “seen” by the circuit. Stated another way, a potentiometer changes the amount of resistive material through which a current must flow. The more resistive material, the higher the resistance. Potentiometers come in many forms, but they are usually classified into one of two categories, continuous and wire wound. A continuous potentiometer has a wiper in contact with an unbroken strip of the resistive material. Changing the placement of the wiper along the strip changes the resistance seen by the circuit. A continuous potentiometer can be used to generate a continuous resistance change between 0 V and the full resistance of the device. On the other hand, a wire wound device has the resistive material wrapped around a core. A wiper comes in contact with the wrapped resistive material to generate the changeable resistance. A wire wound potentiometer tends to provide much larger resistance ranges than the continuous type. A potentiometer will have at least three connection points or pins. Two pins are connected to either end of the resistive material. These two ends are connected to the circuit where the variable resistor should be located in the circuit. The last pin, is internally connected to the wiper. This pin should be connected to either of the other two pins which will result in a connection similar to the one shown in Figure 8.3. The wire connecting the wiper to one of the other pins shorts out part of the resistance. The amount of resistance shorted depends the placement of the wiper. R1 DC
RP
Figure 8.3: Potentiometer wiring. Source: Brian Dean
Difference Amplifier A difference amplifier is shown in Figure 8.4. Proper matching of resistive components will result in Equation (8.6). If these external resistors are not perfectly matched, Equation (8.6) is no longer true. Thus, it is usually best to buy a precision difference amplifier rather than building one. A precision difference amplifier is a single IC that includes the a mplifier
Lab 8: Introduction to Instrumentation and Measurement—The Strain Gauge 123
R2 R1
V1
R1
V2
+
VO=(R2/R1)(V2 –V1)
R2
Figure 8.4: Difference amplifier. Source: Brian Dean and laser trimmed resistors all on the same die. For the purposes of Lab 8, a custom-built difference amplifier with 1% resistors will be considered “good enough” for the strain sensor. R V0 = 2 (V2 − V1) (8.6) R1
Lab 8: Introduction to Instrumentation and Measurement—The Strain Gauge 125
Lab 8 Pre-lab Name:
EXPERIMENT: Introduction to Instrumentation and Measurement— The Strain Gauge Figure 8.5 shows how you will connect a Wheatstone bridge in the lab to an LM6132 operational amplifier. In this pre-lab, you will simulate this circuit with PSpice.
Strain Gauge +
+5v
i1 V1 +5v
Vo+
R5
Vo– V2 P
–
i1
R6
v3 2 – v4 3
+
8 1
vout
4
R7 R8
LM6132
R5, R7 = 140 Ω R6, R8 = 200 kΩ
Figure 8.5: Strain measurement circuit. Source: Brian Dean
1. Calculate the theoretical gain of the amplifier circuit (Only consider the circuit outside the dotted box). Calculated gain ____________ 2. Create the circuit shown in Figure 8.6 using PSpice. Get part VDC for the 15v source, LM324 for the op-amp, and a BUBBLE for voltages V1, V2, and Vout. (PSpice doesn’t have an LM6132 in its library, so we use an LM324.) You will also have to get part PARAM, place it below the schematic, double-click the part, and choose P for NAME1 and 0 for VALUE1. For the value of R3, type {1201P}. This will allow you to vary R3 while you perform a DC sweep during simulation. Place a voltage marker at Vout.
126 Analog & Digital Circuits
Figure 8.6: Strain measurement circuit simulation setup. Source: Brian Dean
3. For PSpice Analysis Setup, click DC Sweep.... On the DC Sweep menu, select Global Parameter for Swept Var. Type and Linear for Sweep Type. Set Name to P, Start Value to 0, End Value to 0.4, and Increment to 0.01. Click OK and Close to close the DC Sweep menu. Click Analysis ➝ Simulate. This should show the output of the op-amp for a change in resistance of R3 from 120.0 to 120.4 V. 4. To view the differential input voltage of the op-amp on another scale, click Plot on the simulation waveform toolbar and click Add Plot to Window. Click Trace then Add Trace. On the Add Trace menu scroll down until you locate V(V1) and V(V2), Click V(V2), type a minus sign (2), and click V(V1) to form the expression V(V2)2V(V1), then click OK. Print out your simulated waveforms and your circuit diagram. 5. As P varies from 0 V to 400 mV, R3 varies from 120 V to 120.4 V. When P 5 0 (R3 5 120 V), what output voltage from the Wheatstone bridge is applied to the input of the differential amplifier? V(V2)2V(V1) 5 _____________ 6. When P 5 400 mV (R3 5 120.4 V), what voltage output from the Wheatstone bridge is applied to the input of the differential amplifier? V(V2)2V(V1) 5 _____________ 7. When P 5 400 mV (R3 5 120.4 V), what is the output voltage of the differential amplifier? V(Vout) 5 _____________
Lab 8: Introduction to Instrumentation and Measurement—The Strain Gauge 127
8. What is the apparent gain of the differential amplifier? AF 5 V(Vout)/[V(V2)2V(V1)] 5 _____________ Turn in your PSpice circuit diagram, PSpice simulation waveforms, and this completed lab handout at the beginning of your lab.
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Lab 8 Procedure Name:
EXPERIMENT: Introduction to Instrumentation and Measurement—The Strain Gauge Figure 8.7 shows a Wheatstone bridge with a strain gauge attached. In this lab you will construct this Wheatstone bridge and make measurements using this circuit.
+
R1
R3
Vdc
a
+
R2 –
V0
b
–
P R4'
R4 = R'4 + P
Figure 8.7: Wheatstone bridge with strain gauge. Source: Brian Dean
1. Using a multimeter measure the resistance of your test leads by connecting them together. Rtl ______________ V 2. Using a multimeter measure the resistance of the strain gauge with no strain (R3 5 R0 1 DR, where DR 5 0 with no strain). R3 Rtl ______________ V 2 Rtl ______________ V 5 R3 ______________ V 3. Select the following values for the 1% resistors. R1 5 R2 5 121 V
Color code: ________ ________ ________ ________ ________
R4 5 110 V
Color code: ________ ________ ________ ________ ________
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4. Using Figure 8.7 as your guide, install the resistors, potentiometer, and strain gauge on your breadboard. With the output from the power supply turned off, create a 15V and GND bus on your breadboard using the fixed 5V channel of the power supply. Ensure to use the correct polarity when connecting the power busses to the VDC point on the circuit. Setup your multimeter to measure the DC voltage, V0, again checking that your polarity is correct. Have your lab instructor check your circuit before applying power. Initials _____________ 5. Apply power to the breadboard and adjust the pot P so that the voltage V0 5 V2—V1 is zero under zero strain. Measure the voltage V0 as you squeeze the strain gauge device. Do not squeeze the hand grip beyond a voltage of 8.00 mV or beyond the point where the tips of the handles just touch. Record the maximum voltage observed. V0 ________________ mV Remove power from the breadboard. LAB: Part B Figure 8.8 shows how you will connect your Wheatstone bridge to an LM6132 operational amplifier configured as a differential amplifier and measure the output of the amplifier in response to squeezing your hand grip.
Strain Gauge +
+5v
i1 V1 +5v
Vo+
R5
Vo– V2 P
–
i1
R6
v3 2 – v4 3
+
8 1 4
R7 R8
LM6132
R5, R7 = 140 Ω R6, R8 = 200 kΩ
Figure 8.8: Strain measurement circuit Source: Brian Dean
vout
Lab 8: Introduction to Instrumentation and Measurement—The Strain Gauge 131
1. Wire the circuit shown in Figure 8.8 and connect your strain gauge and Wheatstone bridge to the circuit. Include test wires for the voltages V1, V2, and Vout. Connect the multimeter to the test wires for V2 and V1.
Have your lab instructor check your circuit before applying power. Initials _____________
2. Apply power to the breadboard. Adjust P so that the voltage V2−V1 is again zero under zero strain. Reconnect the multimeter to the test lead for the operational amplifier output Vout and ground. Measure the voltage Vout for zero strain on the strain gauge. Min. voltage 5 ______________ mV 3. Measure the voltage Vout as you squeeze the strain gauge device. Record the maximum voltage observed. Max. voltage 5 _______________ V
Demonstrate the operation of your system to your lab instructor. Initials _____________ NOTE: Remove power from the breadboard before removing wires from your circuit.
Post-Lab Questions 1. What was the point of measuring the resistance of the measurement leads? 2. Did the functionality of your circuit match the prelab? 3. Would measuring the resistors used to build the circuit increase, decrease, or not affect the accuracy of your results? 4. List at least three additional resistive transducers. Will the circuit used in this lab work for these transducers as well?