Basic Analog and Digital Electronics

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Analog and Digital Electronics

© Copyright 1994 - Silicon Media Press

All rights reserved. No part of this publication, may be reproduced or distributed in any form or by any means, electronic, mechanical, photocopying, recording or otherwise, or stored in a database or retrieval system without the prior permission in writing of the publisher. Every effort has been made to supply complete and accurate information. Silicon Media Press does not guarantee the accuracy or completeness of any information and assumes no responsibility for its use.

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Contents Screw Drivers ................................................................ 2 Pliers ............................................................................. 2 Cutter ........................................................................... 3 Tweezer ......................................................................... 3 Files .............................................................................. 4 Hammers ....................................................................... 4 Vice ............................................................................... 5 Hack Saw ...................................................................... 5 Soldering iron ................................................................ 5 Desoldering Pump .......................................................... 6 Hand Brace or Hand Drill ............................................... 6 Crimping Tools .............................................................. 6 RIVETS ......................................................................... 6 Taps & Dies ................................................................... 6 Spot Welding ................................................................. 7 Electrician Knife ............................................................ 7 Adjustable Spanner ....................................................... 7 Steel Metal Cutter .......................................................... 7 PRECISION MEASURING INSTRUMENTS .............................. 8 Screw Gauge .................................................................. 8 Vernier Calipers ............................................................. 8 STANDARD WIRE GAUGE (SWG) ................................... 9 SAFETY RULES .................................................................... 9 SOLDERING ....................................................................... 10 Definition .................................................................... 10 SOLDER ...................................................................... 12 Flux ............................................................................ 12 Hand soldering ............................................................ 13 Defects in Soldering ..................................................... 14 Precautions in soldering COS/MOS Devices ................. 15 Wave Soldering ............................................................ 15 PRINTED CIRCUIT BOARDS(PCBS) ..................................... 16 ELECTRO DEPOSITION PROCESS ...................................... 17 Ferric Chloride ............................................................. 18 Cupric Acid .................................................................. 19 Art Works .................................................................... 19 MULTIMETER ..................................................................... 19

OPERATION OF INSTRUMENT ..................................... DIGITAL MULTIMETER ....................................................... Functions of Various Controls ...................................... MEASUREMENTS ........................................................

19 22 22 23

MATTER ............................................................................. Elements ..................................................................... Molecules .................................................................... Atoms .......................................................................... Compounds ................................................................. Mixture ....................................................................... ATOMIC STRUCTURE ......................................................... Dalton’s Theory ............................................................ Electron Distribution ................................................... Atomic Weight ............................................................ Molecules weight ......................................................... ELECTRONIC STRUCTURE OF THE ELEMENTS ................. The Exclusion Principle ................................................ Electronic Shells .......................................................... ENERGY BANDS IN SOLIDS ............................................... Spacing Between Energy Levels of a Band .................... Energy Bands in Lithium and their Occupancy ............. Valence and Conduction Bands .................................... ELECTRONIC CURRENTS ................................................... ELECTROMOTIVE FORCE(EMF) ......................................... ELECTRO CHEMICAL CELLS .............................................. Principle of a Cell ......................................................... COMBINATION OF CELLS ................................................... Series Connected Cells ................................................. PARALLEL CONNECTED CELLS ................................... Resistance ................................................................... OHM’S LAW ................................................................. Combination of Resistors ............................................. KIRCHHOFF’S LAWS .......................................................... Current Law ................................................................ Voltage Law ................................................................. Multiples and Sub multiples of Ohm ............................ Resistance of a conductor depends upon ...................... Resistors ..................................................................... Fixed Resistors ............................................................ VARIABLE RESISTOR .................................................. Testing of resistor ........................................................

26 26 26 27 27 27 27 27 28 29 29 29 31 31 33 35 36 36 38 38 39 39 41 41 42 42 42 44 45 45 46 48 48 49 50 52 56

Testing of Resistor ....................................................... ELECTROSTATICS .............................................................. Static Electricity .......................................................... Electrostatic Inductions ............................................... CAPACITORS ............................................................... Types of Capacitor: ...................................................... Variable Capacitors ...................................................... EXERCISE ..........................................................................

56 57 57 58 60 63 66 69

NATURAL MAGNET ............................................................. 72 ARTIFICIAL MAGNETS ........................................................ 72 Properties of Materials ................................................. 72 ELECTROMAGNETIC INDUCTION ....................................... 73 INDUCTANCE .............................................................. 76 COUPLING .................................................................. 78 ALTERNATING CURRENT (AC) ........................................... 81 Classification of Frequencies ........................................ 84 GENERATOR ...................................................................... 84 Basic Principle ............................................................. 84 Working ....................................................................... 85 Types of Generators ..................................................... 88 LOSSES IN A D.C. GENERATOR .................................. 91 Electric Bell ................................................................. 93 MOTOR .............................................................................. 93 BASIC PRINCIPLE ........................................................ 94 Constructions .............................................................. 94 Types of Motor ............................................................. 97 APPLICATION OF MOTORS .......................................... 99 Losses in D.C. Motors ................................................. 100 TRANSFORMERS ............................................................... 100 Windings .................................................................... 101 Types of Transformers ................................................. 103 Transformer Losses ..................................................... 104 TRANSFORMER APPLICATIONS .................................. 105 OSCILLATION .................................................................... 105 Damped Oscillations ................................................... 105 Undamped Oscillations ............................................... 106 Construction of an Oscillator ...................................... 107 Action of a tank Circuit ............................................... 107 Types of Oscillators ..................................................... 109 EXERCISE ......................................................................... 110

Insulators ................................................................... 114 Conductors ................................................................. 115 Semiconductors .......................................................... 115 ATOMIC BINDING IN SEMICONDUCTORS .......................... 116 TYPES OF SEMICONDUCTORS .......................................... 118 Intrinsic Semiconductors ............................................ 118 Hole Formation in Semiconductors .............................. 119 Extrinsic Semiconductors .......................................... 120 MAJORITY AND MINORITY CARRIERS ............................... 124 Mobile Charge Carriers and Immobile Ions .................. 126 Electron Conductivity of a Metal .................................. 127 GERMANIUM CRYSTAL STRUCTURE ................................. 128 P-N JUNCTION DIODES ..................................................... 131 BIASING OF PN JUNCTION ................................................ 133 EXERCISE ......................................................................... 136 Breakdown Voltage ..................................................... 141 Identification of diodes ................................................ 141 Special Purpose Diode ................................................. 142 DIODE AS A RECTIFIER .................................................... 146 Half wave Rectifier ...................................................... 146 FULL WAVE RECTIFIER ............................................. 147 BRIDGE RECTIFIER .......................................................... 148 FILTER CIRCUITS ............................................................. 150 Choke-input Filter ...................................................... 150 Capacitor Input Filter ................................................. 151 VOLTAGE MULTIPLIERS .................................................... 152 Voltage Doubler .......................................................... 152 VOLTAGE REGULATOR ..................................................... 153 EXERCISE ......................................................................... 155 Emitter ....................................................................... 158 Base ........................................................................... 158 Collector ..................................................................... 158 Amplifying Action of a Transistor ................................. 159 TRANSISTOR CIRCUITS ..................................................... 160 Common base configuration ........................................ 160 Common-emitter configuration .................................... 161 Common-collector or grounded collector configuration . 162

CHARACTERISTIC CURVES OF A TRANSISTOR ................. 163 Current Amplification Factors ..................................... 165 Common-Base Configuration ....................................... 166 DYNAMIC IN INPUT RESISTANCE ............................... 167 Common Emitter configuration ................................... 171 COMMON COLLECTOR CONFIGURATION ................... 174 Comparison Chart of CB AND CE ................................ 175 Why Common Emitter is extensively used? .................. 175 DC LOAD LINES ......................................................... 177 Amplifier Analysis Using DC Load Line ........................ 178 Transistor Biasing ...................................................... 181 EXERCISE ......................................................................... 185 SINGLE STAGE TRANSISTOR AMPLIFIER .......................... 188 Amplifier Equivalent Circuit ........................................ 190 MULTISTAGE AMPLIFIER .................................................. 191 Decibel Gain (DB) ....................................................... 192 COUPLING OF TWO STAGES ...................................... 194 Distortion in amplifiers ............................................... 197 POWER AMPLIFIERS ......................................................... 198 PUSH-PULL AMPLIFIER .............................................. 198 Complementary Symmetry PIP circuit .......................... 200 EXERCISE ......................................................................... 201 JUNCTION FIELD EFFECT TRANSISTOR (JFET) ................ 204 Operation of JFET ....................................................... 205 Static Characteristic Curves of FET ............................. 206 METAL OXIDE SEMICONDUCTOR FET (MOSFET) .............. 208 Construction .............................................................. 208 Working ...................................................................... 209 Symbols for MOSFET .................................................. 211 Comparison of P-Channel MOSFETS: .......................... 212 EXERCISE ......................................................................... 213 NUMBER SYSTEM ............................................................. 218 DECIMAL NUMBER SYSTEM ...................................... 218 BINARY NUMBER SYSTEM ......................................... 220 Octal Number System ................................................. 226 HEXADECIMAL NUMBER system ................................ 230 BINARY ARITHMETIC ........................................................ 235 Binary Addition .......................................................... 235

Binary Subtraction ..................................................... 237 Complements .............................................................. 239

The (r-1)’s complement ................................................ 240 BINARY CODED DECIMAL [BCD CODES] .......................... 244 EBCDIC CODE ........................................................... 245 ASCII CODE ............................................................... 247 EXERCISE ......................................................................... 250 NUMERICAL QUESTIONS ........................................... 251 DIGITAL LOGIC ................................................................. 256 BOOLEAN ALGEBRA ......................................................... 257 Boolean Variable ......................................................... 257 Truth Table ............................................................... 259 AND Gate ................................................................... 259 The OR Gate ............................................................... 260 The Invertor ................................................................ 261 Other Logical Gates .................................................... 262 BOOLEAN FUNCTION & DEMORGAN’S THEOREM ............. 264 The Commutative, Associative and Distributive Laws ... 267 Demorgan’s Theorem - The inverse of Boolean functions268 Simplification of Boolean functions .............................. 272 KARNAUGH MAPS ............................................................. 275 Rules of Simplification ................................................ 278 COMBINATIONAL CIRCUITS .............................................. 280 Half Adder .................................................................. 284 Full Adder .................................................................. 286 Full -Subtractor .......................................................... 287 Decoders .................................................................... 288 Encoders .................................................................... 290 Multiplexers ................................................................ 295 Demultiplexers ........................................................... 296 FLIP-FLOPS ....................................................................... 297 Sequential Logic ......................................................... 297 RS FLIP-FLOP ............................................................. 300 D FLIP -FLOP .............................................................. 307 EDGE- TRIGGERED D FLIP -FLOP .............................. 309 JK FLIP -FLOP ............................................................ 310 T Flip-Flop .................................................................. 311 EXERCISE ......................................................................... 313 REGISTERS ....................................................................... 320 TYPES OF REGISTERS ...................................................... 321 SERIAL IN -SERIAL OUT ............................................. 323

SERIAL IN-PARALLEL OUT ......................................... 326 PARALLEL IN-SERIAL OUT ......................................... 327 PARALLEL IN-PARALLEL OUT ..................................... 328 Bidirectional Shift Registers ........................................ 328 Applications ................................................................ 329 COUNTERS ....................................................................... 330 COUNTERS ................................................................ 330 Asynchronous (Ripple) Counters .................................. 331 Asynchronous Decade Counters .................................. 333 Asynchronous Up-Down Counters ............................... 335 Synchronous Counters ............................................... 336 Synchronous Decade Counters .................................... 337 Synchronous Up-Down Counters ................................ 338 Applications of Counters ............................................. 339 MULTIVIBRATORS ............................................................. 340 MONOSTABLE MULTIVIBRATORS .............................. 343 ASTABLE MULTIVIBRATORS ...................................... 345 Associated Terms with Astabel Multivibrator ............... 346 DAC (DIGITAL ANALOG CONVERTER) ................................ 348 OP-AMP ...................................................................... 350 ADC (ANALOG DIGITA L CONVERTER) ............................... 351 Working of ADC .......................................................... 352 MEMORY CONCEPTS ........................................................ 358 RAM (Random Access memory) .................................. 359 ROM Chips ................................................................. 361 INTEGERATED CIRCUIT OF MEMORY ............................... 362 RANDOM-ACCESS MEMORIES (RAM) ......................... 362 READ ONLY MEMORIES (ROM) .................................. 367 EXERCISE ......................................................................... 371

DIGITAL COMPUTERS ....................................................... 378 MICROPROCESSOR .......................................................... 383 Arithmetic /Logic unit ................................................ 384 Register Unit .............................................................. 384 Control Unit ............................................................... 384 INPUT ......................................................................... 385 OUTPUT ..................................................................... 385 MEMORY .................................................................... 385 SYSTEM BUS ............................................................. 386 How Does the Microcomputer Work? ........................... 387

MICROPROCESSOR ARCHITECTURE ................................ 388 ADDRESS BUS ........................................................... 391 DATA BUS .................................................................. 392 CONTROL BUS ........................................................... 394 REGISTERS ................................................................ 396 ACCUMULATOR ......................................................... 397 FLAGS ........................................................................ 397 PROGRAM COUNTER (PC) .......................................... 398 STACK POINTER (SP) .................................................. 398 Peripheral or Externally Initiated Operations ............... 399 MEMORY .................................................................... 400 INPUT/OUTPUT (I/O) .................................................. 404 Instruction Naming Conventions ................................. 407 8255 PROGRAMMABLE PERIPHERAL INTERFACE ............. 411 Theory of Operation .................................................... 412 DMA .................................................................................. 414 Intel’s 8237 DMA controller ......................................... 415 PROGRAMMABLE INTERRUPT CONTROLER ...................... 416 Pinout of 8259 ............................................................ 417 Drawback of PIC ........................................................ 419 Interrupt sequence (single PIC) .................................... 420 APIC ........................................................................... 420 8088 Microprocessor ................................................... 421 80286 Microprocessor ................................................. 421 80386 Microprocessor ................................................. 421 Intel 486 DX Microporcessor ....................................... 422 PENTIUM .................................................................... 423 EXERCISE ......................................................................... 427

Chapter 1


SCREW DRIVERS Screw drivers are classified by their over all length and the width of the working edge in mm. The size and type of screwdriver must be chosen to match the screw that is being driven.

Uses Screw drivers are used to drive the screws and keep them in proper position.

Types i)

Common screw drivers.

Fig 1.1 Common Screw Driver


Philips type Screwdriver

Fig 1.2 Philips Screw Driver


Watch makers Screwdriver

Fig 1.3 Watchmaker Screw Driver

PLIERS They are classified by over all length.


Types i)

Pliers side cutting

Fig 1.4 Pliers SIde Cutting

ii) iii)

Electricians Pliers Long nose pliers


Uses It is used to get into high places to hold wires or small parts. Round nose pliers

Fig 1.5 Long nose Pliers

Fig 1.6 Round nose Pliers


Uses It is used to twist the wires, to cut the wires and to hold the both. Flat nose pliers

CUTTER Cutter or nippers identified by length & type wire cutter micro tip etc. Uses 1. 2.

Wire cutter is used to cut the wire at ordinary and narrow places. It is also used to removes the insulation from insulated wires.

TWEEZER Tweezer is used for holding small job while soldering made of steel. Identified by their total length. 3


Fig 1.7 Tweezer


It is used to grip the wires or components and take or keep them at required places.

FILES Used for reducing the size of metallic job or enlarging holes. They are classified by length, shape and type of cut.

Fig 1.8 File

i) ii) iii) iv)

Flat File Round File Half Round File Triangular File

They can be smooth files and bastard files. Uses Files are special types of saws that are used to remove surface from wood, metal, plastic.

HAMMERS Used for driving mails or fixing and removing of meshed jobs. They are classified by weight. They are ball pane hammers & cross pane hammers.

Ball Pane Hammer

Fig 1.9 Ball Pane Hammer 4


Uses It is used for hammering the nails and beating the elements.

VICE Vices are used to hold the job while cutting or filing. They are classified by weight and length of jaw.

Fig 1.10 Vice

HACK SAW Used for cutting metallic jobs. Classified by length of blade. The blade is classified by number of teeth per inch. The hack saw frames can be fixed type of adjustable type.

Fig 1.11 Hacksaw

Uses Hack saw is a cutting tool and used for cutting metal sods, bars and tubes. The backsaw is used for making the cuts which Server are guides, clipping and filling is to be done.

SOLDERING IRON Classified by the wattage of the iron. 18W, 25W, 65W, 100W etc. used on 230V AC.

Fig 1.12 Soldering Iron 5


It is used to make and break the soldered joints.


Fig 1.13 Desoldering Pump

Desoldering pump is used to suck the extra molten solder from the soldering joints and from the joints which are to be desoldered.

HAND BRACE OR HAND DRILL They are use with stainless steel hits for drilling holes. The different sizes of drill bits are available in mm. and can be fixed to the adjustable jaw of the machine.

CRIMPING TOOLS Uses for cutting of wires, removing of insulation from wires and fixing sleeves over the wires.

RIVETS Rivets are used for permanent fastening. They are made out of mild steel, copper and aluminium etc. Riveting is done by hand or by machine in cold condition or in hot condition. The rivets are the cheapest fasteners. They have either flat head or mushroom heads. They are available in different lengths in mm.

TAPS & DIES Taps and dies are used for cutting the threads. They are available in various sizes and different standard threads. The standard threads are BSW, and BA type etc. 6


Fig 1.14 Tapes & Die

Taps are used for cutting internal threads in a hole. Where as dies are used for cutting external threads on round pieces. They are available for various dia sizes, are selected for use as per the dia of the job.

SPOT WELDING Another method of permanent fastening in spot welding. These are made with electric spot welding machines. This method is used to make firm and strong permanent joints between two metallic jobs.


Fig 1.15 Knife


It is used for cutting wires


Fig 1.16 Spanner


Fig 1.17 Metal Cutter 7


SCREW GAUGE External micrometer is used to take measurements of outer sides of job. Its size depends on the maximum opening between Anvil and Spindle. They are 1", 2" type on 25m to 50 mm or 75mm type. The main parts of the micro meter are shown in the diagram. Minimum reading which can be taken is .01 mm. Zero er ror m ust b e check ed be for e usi ng a micrometer. The zero of thimble must align with zero line of Barrel when fully closed.

Fig 1.18 Screw Gauge

VERNIER CALIPERS It can take both external and internal measurements. The measurements can be made to an accuracy of .01 mm. The main parts of the instruments are shown on the diagram. It has one movable jaw and other fixed jaw. The Nibs are placed on internal side or outer side of the job to be measured.

Fig 1.19 Vernier Caliper 8



Fig 1.20 Wire Gauge

Elect ronics technicians work w ith electricity electronic devices. They use test instruments to measure the electrical characteristics of components, devices and electronic systems they are involved in different risks, may also involve certain hazards if technicians are careless in their work habits. It is therefore essential that the student technicians learn the principles of safety at the very start of their career and that they practice these principles. 1.


3. 4.

They must plan the job, setting out on the work bench in a neat, orderly fashion, tools, equipments and instruments. Extraneous items should be removed, and cables should be securely fastened from ground by means of an isolation transformer. Line (power) voltages should be isolated from ground by means of an isolation transformer. Avoid direct contact with any voltage source measure voltage with hand in your pocket.




6. 7. 8.


10. 11. 12.

13. 14. 15. 16. 17.

Be certain that your hands are dry and that you are not standing on wet floor when making tests & measurements in live circuit. Be certain that line cords of power tools and non-isolated equipment use safety plug. Handle tools properly and with care. Exercise good judgement & common sense and your life in the lab, will be safe, interesting, rewarding. For quick & proper servicing the technician s h o u l d h a v e g oo d s e r v i ci n g l a b o r a t o r y equipped with various tools & equipments i.e. the layout of laboratory should be proper. The tool for particular type of job must be used. Don’t use/handle tools like knife, screwdriver without handle. The conductor should never be energized until & unless it is sure that no one is working on it. Be sure that main is off before replacing Blown fuse. Switch must be used for connecting live wires. While cleaning equipment make sure that it is off. Never take risk to work on live naked wire. In case of electric fire, don’t throw water.

DEFINITION Soldering is the process of joining two metallic surfaces with the help of a low melting point material called solder.



Essential Function A soft soldered joint must fulfil the following functions:1. 2. 3. 4.

Provide an electrically conducting path. Connect components together mechanically Allow heat to flow between components Form a liquid/gas tight seal

Basic Requirements To assure a reliable joint a correct solder alloy, a suitable flux, proper cleaning methods and a correct heat source is required. Important considerations are:1) 2) 3) 4) 5) 6)

Solder composition Flux composition Solderability Heating methods Thermal properties of material/components Joint design

Steps of Soldering a) b) c) d) e) f) g) h)

Clean all components, PCB, tools etc. Perform pre-tinning of components. Apply flux. Place soldering iron touching both lead and pad on PCB. Form initially a heat bridge between iron and lead pad junction with little solder. Feed solder all around the component lead starting from heat bridge. Remove solder and iron simultaneously. The components, table should not be shaken.



SOLDER Solder is an alloy of two or more metals which is used to join base metals together by the application of heat. The metals used to form solder are Tin(Sn) and Lead(Pb). Tin has property to resist corrosion and after mixing with lead lowers it melting point. Lead adds to the overall strength. The most commonly used combination are Sn 60, and Sn 63 (Sn and Pb 60-40, 63-37 respectively). For general hand soldering rosin(flux) cored Sn60 Sn63 solder of 20-24 AWG can be used.

FLUX Purpose 1 2 3 4

It is used to reduce the surface tension Easy flow of molten solder To prevent oxidization during soldering Removing surface oxide layer/films already present

Flux applied in two forms. Solid & liquid. For electronic soldering liquid flux is most extensively used in hand as well as in machine soldering. Choice of flux depend on the type of metal being soldered.

Type of flux There are two types of flux 1) Organic 2) Inorganic Inorganic flux are not recommended for electronic soldering. 12


Organic fluxes, rosin fluxes are widely used.

HAND SOLDERING This is the most popular method of soldering when there are varieties of components on the same substrate. For hand soldering the two very important aspects are : 1) 2)

Control of time and temperature Soldering procedure

Control of time and temperature Longer the solder remain in molten condition it is likely absorb gas, water vapour, and get self oxidised. On cooling it will give grey granule appearance. Joint become weak and unreliable. The flux losses its effectiveness. Components may be damaged. Too low a temperature will take long time to melt and there may not be proper wetting. Soldering time should be 1-2- sec generally. The main steps of soldering are1) 2) 3) 4) 5) 6) 7) 8)

Clean all components PCB etc. Perform pre tinning of components Apply flux Place iron touching both lead and pad Form initially a heat-bridge between iron and lead pad junction with little solder Feed solder all around the component lead starting from heat bridge Remove solder and iron simultaneously The component table should not be shaken

Handling of components 1)

Every part lead shall be tinned bent/forward and trimmed prior to mounting 13


2) 3)

4) 5)

In case of multi strand wire stripping to be done carefully with proper ‘strippers’ Special care to be taken with components having glass to metal inter facial terminals. Relay, diodes etc. All the tools used in assembly must be kept properly cleaned Devices sensitive to static change must be h a n d l ed w i t h u t m o st c a r e. U s e p r o p e r grounding system.

DEFECTS IN SOLDERING So me chara ct er isti c of unsatis fact ory s old er conditions1) 2) 3) 4) 5) 6) 7) 8) 9) 10)

Damaged/crushed/charred insulation Improper insulation clearance Parts not supported properly Parts making not visible Parts damaged Flux residue or other contamination Cold joint Over heated joint Fractured joint Pitted or porous joint

Reason for the above 1) 2) 3) 4) 5) 6) 7)

Temperature control of iron Overall cleanliness Contamination in materials Lead to hole spacing Solder ability of parts material Improper soldering method Quality of soldering iron/tools 14


PRECAUTIONS IN SOLDERING COS/MOS DEVICES The high I/P impedance of CMOS devices causes a special problem with regard to the static electrical charges and most of the failure of CMOS devices has been found to be due to mishandling. The suggested precautions are as follows: 1) 2) 3) 4)

5) 6) 7)

All assembly operators should be performed on a grounded metal plate The chair in the assembly area must be of conductive material and must be grounded All assembly tools must be grounded An operator must ground himself on a metal plate before handling a CMOS device and wear grounded wrist strap The leads of devices are kept shorted and should be maintained until time of assembly The CMOS devices should be handled by tweezers The flux residue after assembly should be cleaned with approved solvent and accumulation of solder flux between adjacent pins should be avoided between adjacent pins should be avoided.

WAVE SOLDERING In mass production a separate soldering method is used called wave soldering. In this process large quantity of solder is heated in a tub. The molten solder waves are used for large soldering. e.g. The PCB with number of soldering points are suspended over the molten wave. Hence large area comes in contact with solder which is immediately removed and given time to dry up. 15


Printed circuit boards are used to route electrical currents and signals through copper tracks which are firmly compressed on an insulating base.

Types of PCBs There are single sided and double sides PCB. Single sided PCBs are used in consumer Electronic such as TV Radio, VCR etc. Double sided PCBs are used in sophisticated electronic instruments like oscilloscope, microprocessors etc.

Advantages of PCB over normal wiring 1) 2) 3) 4) 5) 6) 7)

Large number of electronic components can be interconnected in a small space Small components can easily be mounted on PCB Wiring microphony is avoided Servicing is simplified Small and neat construction Interconnection become more reliable, compact and less costly Mass production is possible with no wiring errors

There are single sided and double sided PCB’s. Single sided PCBs are used in consumer electronics such T.V., Radio etc. Double sided are used in consumer electronics such T.V, Radio etc. Double sided are used in sophisticated electronic instruments like oscilloscopes, microprocessor etc.

Material used for preparing PCB The base material used are 16


1) 2) 3) 4)

Paper Phenolic Glass epoxy Epoxy paper Polyester etc.

Paper phnolic is less costly and used in consumer electronic circuits. It is more resistant to moisture but difficult to machine and drill as compared to glass epoxy. Comparison Material Bulk resistivity Ohm-cm

of Base Material Characteristics Dielectric Max. Max.Comparative constant Flux soldering Price strength time factor N/cm 2 sec at 200ºC Paper Phenolic10 5.3 7000 5 1 Epoxy Paper 10 5.0 9000 15 2.5 Epoxy Glass 10 5.8 3100030 4 Polyester 10 3.4 2000010 1.5 Application of different base materials

1. Glass Fibre Board a) White b) Red c) Black -

General Purpose Flame resistant Temperature resistant

2. Paper Base a) Red b) Other colors

Flame resistant All other categories

Copper foil is manufactured by electro-deposition. A thin film of copper is deposited on to a slow rotating corrosion resistant cylinder. A lower portion is immersed in a copper rich electronic plating bath. 17


The cylinder rotated, a thin copper deposit gradually builds up in the form of metal foil, which is then gently peeled off from the cylinder surface. Foil thickness Purity Resistivity at 20°C

35 m ± 6 M 99.8% 0.1594

Some of the electro mechanical etchants used are:1) 2) 3) 4) 5)

Ferric Chloride Cupric Acid Chromic Acid Alkaline Ammonia

The choice of etchant should be such that it should match with the etch resist used.

FERRIC CHLORIDE It is recommended for etching small number of boards. It is not used in high volumes production because it cannot be regenerated and it attacks metal etch resists.

Advantages 1)

2) 3) 4)

It has high corrosive power thus the etching times are short. It matches well to photo and screen printed resists. Shelf life is long Has less odour Provides better surface wetting, thus gives even etching

Disadvantage 1) Impossible to regenerate economically





Used for etching high volume production Can be regenerated and saturated etchant can be disposed by supplying it to chemical industries for further use Causes rapid etching and causes little under etching

ART WORKS Art work is the drawing, showing conductor pattern on PCB. The steps taken in preparing art work and film negative are given below: 1) 2) 3) 4)

Testing the circuit Preparation of Layout Art work generation and inspection Photographic reduction

Before preparing Art work following points are considered 1) 2) 3)


Resistance of printed conductor Capacitance between conductor’s (different spacing should be used) Width of signal, supply and ground lines should be proper.( width or ground line is supply line signal line) Spacing between conductors of different peak voltage

OPERATION OF INSTRUMENT This meter is intended for use horizontally, should it happen by any chance that the pointer is not at zero, it may be so set by means of screws head on the panel. 19


Fig 1.21 Multimeter

Current Measurement To measure current the instrument should be set to a suitable A.C. or D.C. range and than connected in series with apparatus. D.C. CURRENT


±1% of full scale value over the effective range i.e. above 10% F.S.D. ±2% of full scale value over the effective range i.e. above 25% F.S.D.

Voltage Measurement 1.

2. 3. 4.

When measuring voltage set the range of AC or DC, and connect the leads across the source of voltage to be measured. Connect the leads across the source of voltage to be measured. Connect the leads across the source of voltage to be measured. On DC voltage ranges, the meter consumes only 50 microampere at full scale deflection this sensitivity corresponding to 20.000 /V. 20



On AC ranges from 10V upwards, full scale deflection is obtained with a consumption of 1mA.

Resistance Measurement 1.


3. 4. 5. 6. 7. 8. 9.

Ranges - 0.5 to 20 Mega s. The self contained ranges are 100:1 ratio, which permits very vide coverage with three ranges. Resistance tests should never be carried out on components which are already carrying current. Set left hand switch at resistance. Set the right hand switch to required resistance range i.e. 100, x100. Join leads together. On the range, adjust to zero by means of knob marked. On the 100 range adjust to zero by mens of knob marked zero 100. On the x100 range, adjust to zero, by means of knob marked zero x 100. Set the right hand switch at the range required the leads using connect across the unknown components.

DC Voltage

DC Current AC Voltage

AC Current

2500 V

10 A

2500 V

10 A

1000 V

1 A

1000 V

2.5 A

500 V

100 mA

250 V

1 A

250 V

10 mA

100 V

100 mA

100 V

1 mA

25 V

25 V

250 uA

10 V

10 V

125/50 uA

2.5 V/10mA

2.5 V 21



Fig 1.22 Digital Multimeter

Switch Operation Function switch set the function switch to the desired position. V Position H Position Continuity 200 mA 10 A

0-1000 V DC on 5 Ranges 0.75 V AC on 4, Ranges. 0-20Mnon 6 Ranges diode test (1.5 & to 15 Kg) 0-200 mA DC & AC on 1 range. 0-10 A DC PAC on 1 Range.

Power Switch Power switch enables to switch on power and select AC or DC measurements.



Range Switch If enables this instrument to operate other in auto or manual mode.

Over range indication If an I/p signal greater these Max. Value of range then MSB (1) blinks.

MEASUREMENTS Voltage Measurement (AC/DC) 1. 2. 3. 4.

Insert black test lead into Com terminal and red test lead into V terminal. Set the function switch to V position. Select DC/AC by setting power switch. Connect the test leads to the circuit under test and observe the value on display.

Current Measurement 1.

2. 3. 4.

When making 0 to 200 mA measurements, insert black lead into COM terminal and red lead into cont/mA terminal. 0-10mA black lead into com. terminal red lead into 10 A” Set function switch to 200 mA or 10A position. Select DC or AC by setting power switch. Connect the test leads and observe the value.

Ohm Measurement 1. 2. 3.

Insert the black lead into COM terminal and red lead into d/mA terminal. Set the function switch to a position. Set the power switch to reposition. If the resistance being measured is connected to the circuit, remove power from the circuit being tested and discharge all capacitors.



4. 5.

Connect the test leads, to the resistance being measured. Record the value.

Continuity/Diode Check 1. 2. 3.

Insert black test lead into COM terminal and red test lead to n/mA terminal. Set function switch to reposition. Set power switch to continuity side.

Continuity 1. 2.

Remove power from the circuit being tested and discharge all capacitors. Connect the test leads to the ckl being measured. If the resistance value is lower than 105 to 15kd, buzzer sounds mark appears on LCD.

Diode Check 1. 2.

Connect black test lead to the cathode side and red test lead to the. Connect the test leads in reverse if display reading is same as when heads are open the semiconductor is O.K. otherwise defective.


Chapter 2


Basics of Electronics Students have already learned the various terms used in the general physics at various levels of their studies. However it is necessary to have the review of the same in an elaborate and systematic manner to refresh their memories. Most of these terms in the following paras are the building stones of the electronic theory.

Matter may be defined as a substance that occupies space and has weight. Matter exists in three states. Solids Liquids


They have definite shape and volume. e.g. piece of wood, brick etc. They have definite size but not definite shape. They usually take the shape of the container. Oil, water, milk etc. They neither have size nor shape. But have a volume they can easily spread over wide area.

ELEMENTS Substances which are made of one and only one type material are called elements. There are about 105 known elements on the earth. e.g. copper, hydrogen, oxygen etc.

MOLECULES All matter is made up of small particles called molecules. It is the smallest part of a substances which has all the physical and chemical characteristics of the parent substance. It can remain in free state. Molecules of a substance remain closely knitted with one another with great force. This force is very


great in the solids, and that is the reason why a solid is able to maintain a definite shape. However is lesser in the liquids and least in case of gases. Therefore they cannot maintain a definite shape.

ATOMS It is the smallest particle of an element which cannot exist in free state and has all the properties of the parent substance. All the molecules are made of atoms.

COMPOUNDS Substances made of two or more elements are called compounds. It contains atoms of two or more e l em e nt s com bi ned ch em i call y i n a d e f i ni t e proportion. e.g. water (H 2 0) Sodium Chloride (NaCl).

MIXTURE Are also made of two or more substances but are not combined chemically and can be separated easily. e.g., Salt and sand.

DALTON’S THEORY John Dalton of Manchester in 1804 established a theory on atom. According to him: 

 

An atom is the smallest particle of an element which can not be seen even through a powerful microscope. It can not exist in free state and has all the properties of the parent element. It can not be destroyed or created. An atom consists of a hard central core called Nucleus. the nucleus of an a tom consists of Proto ns and N eutrons. The Protons are 27


electrically positive and Neutrons are neutral. Around the nucleus rotate the electrons. The electrons are negatively charged particles. The mass of an electron is approximately 1/1845 times that of a proton. The positive charge of a proton is numerically equal to the negative charge of an electron. An atom is electrically neutral because the number of protons and electrons are same.

ELECTRON DISTRIBUTION The number of electrons in different orbits of an atom are fixed. The 1st orbit can be max. of 2 electrons 2nd orbit max of 8 electrons and 3rd 18. It follows the formula 2n (n’ is the of the orbit.) 

The simplest atom is that of Hydrogen. It consists of one proton and one orbital electron. The Helium atom has two protons in the nucleus and to orbital electrons.

It has been found that the effective diameter of an atom is of the order of 10 cm and that of Nucleus is 10 cm. Hence the dia of atom is roughly 100000 times greater than the nucleus.

Fig 2.1 The Atom



Mass of proton is 1.66 x 10 gms and that of electron is 9.02 x 10 gms. Practical unit is 1 coulomb 6.24x 10 charge of electron. Hence Charge of Electron = 1/6.242 x 10=1.602x10 coulombs .

ATOMIC WEIGHT Hydrogen has been taken as the lightest substance. Therefore weight of an atom of hydrogen is taken as unit i.e.. one to compare atoms of other elements. Hence atomic weight is the number which shows how many times one atom of an element is heavier than one atom of hydrogen. Atomic Weight of an Element =

Wt. Of one atom of element Wt. of One atom of Hydrogen

MOLECULES WEIGHT Molecular Weight of an Element =

Wt. Of one the molecule Wt. of One atom of Hydrogen

The solution of the Schrodinger equation for hydrogen or any multielectron atom need not have radial symmetry. The wave functions may be a function of the azimuthal and polar angles as well as of the radial distance. It turns out that, in the general case, four quantum numbers are required to define the wave function. The total energy, the orbital angular momentum, the component of this angular momentum along a fixed axis in space, and the electron spin are quantized. The four quantum numbers are identified as follows:



Principal Quantum Number The principal quantum number n is an integer 1, 2, 3, .....and determines the total energy associated with a particular state. This number may be considered to define the size of the classical elliptical orbit, and it corresponds to the quantum number n of the Bohr atom.

Orbital/Angular Momentum Quantum Number The orbital angular momentum quantum number l takes on the values 0, 1,2,........, (n-1) This number indicates the shape of the classical orbit. The magnitude of this angular momentum is l (l+1) (h/2 ).

Magnetic Quantum Number The orbital magnetic number m 1 , may have the values 0, ±1, ±2,..., ±1. This number gives the orientation of the classical orbit with respect to an applied magnetic field. The magnitude of the component of angular momentum along the direction of the magnetic field is m1 (h/2 ).

Spin Quantum Number E l ec t r on spi n . I n o r d er t o ex p l a i n c e r t a i n spectroscopic and magnetic phenomena, Uhlenbeck and Goudsmit, in 1925, found it necessary to assume that, in addition to traversing its orbit around the nucleus, the electron must also rotate about its own axis. This intrinsic electronic angular momentum is called electron spin. When an electron system is subjected to a magnetic field, the spin axis will orient itself either parallel or antiparallel to the direction of the field. The spin is thus quantized to one of two possible values. The electronic angular momentum is given by m s, (h/2 ), where the spin 30


quantum number m, may assume only two values +½ or -½.

THE EXCLUSION PRINCIPLE The periodic table of the chemical elements may be explained by invoking a law enunciated by Pauli in 1925. He stated that no two electrons in an electronic system can have the same set of four quantum numbers, n, l, m 1 , and m s. This statement that no two electrons may occupy the same quantum state is known as the Pauli exclusion principle.

ELECTRONIC SHELLS All the electrons in an atom which have the same value of n are said to belong to the same electron shell. These shells are identified by the letters K, L, M, N,..... corresponding to n=1,2,3,4,..., respectively. A shell is divided into subshells corresponding to different values of l and identified as s, p, d, f,..., corresponding to l= 0,1,2,3,..., respectively. Taking account of the exclusion principle, the distribution of electrons in an atom among the shells and subshells is indicated in the following table. Actually seven shells are required to account for all the chemical elements, but only the first four are indicated in the table. Shell n l Subshell Number of Electrons

K 1 0 s 2 2

L 2 0 s 2 8

M 3 1 0 1 2 p s p d 6 2 6 10 18 32

Electrons shells & subshells


N 4 0 1 s p 2 6

2 3 d f 10 14


There are two states for n=1 corresponding to l=0, m 1 =0, and m s = ±½. These are called the 1s states. There are two states corresponding to n =2, l=0, m l=0, and m s, =±½. These constitute the 2s subshell. There are in addition six energy levels corresponding to n=2, l=1, m l=-1, 0, or +1, and ms= ±½. These are designated as the 2p subshell. Hence, as indicated in above table, the total number of electrons in the L shell is 2+6=8. In a similar manner we may verify that a d subshell contains a maximum of 10 electrons an f subshell a maximum of 14 electrons etc. The atomic number z gives the number of electrons orbiting about the nucleus. Let us use superscripts to designate the number of electrons in a particular subshell. Then sodium, Na, for which Z=11, has an electronic configuration designated by 1s 2 2s 2 2p 6 3s 1 . Note that Na has a single electron in the outermost unfilled subshell, and hence is said to be monovalent. This same property is possessed by all the alkali metals (Li, Na, K, Rb, and Cs), which accounts for the fact that these elements in the same group in the periodic table have similar chemical properties. Elements Atomic Configuration Number C 1s 22s 22p 2 Si 1s 22s 22p 63s 23p 2 Ge 1s 22s 22p 63s 23p 63d 104s 24p 2 Sn 1s 22s 22p 63s 23p 63d 104s 24p 64d 105s 25p 2 Electronic Configuration of Group IVA

The inner shell electrons are very strongly bound to an atom, and cannot be easily removed. That is the electrons closest to the nucleus are the most tightly bound, and so have the lowest energy. Also atoms for which the electrons exist in closed shells form very stable configurations. For example, the inert 32


gases He, Ne, A , Kr, and Xe all have either completely filled shells or , at least, completely filled subshells. Carbon silicon, germanium, and tin have the electronic configurations indicated in Table 2-2. Note that each of these elements has completely filled subshells except for the outermost P shell, which contains only two of the six possible electrons. Despite this similarity, carbon in crystalline form (diamond ) is an insulator silicon and germanium solids are semiconductors, and tin is a metal.

It is fond that each of the energy levels of an atom splits into N levels of energy where N is the number of atoms in the crystal. Each original energy level becomes a band of very closely spaced levels of slightly different energy. The individual energies within the band are so close together that, for many purposes, the energy band may be considered to be continuous. Figure below shows the splitting of K, L and M levels as the distance between different atoms is reduced. At first, only valence level or M level is affected as shown by dotted vertical line marked A, then as separation is reduced, inner shells also become affected as indicated by dotted vertical line B. Consider the case of Na crystal which consists of an ordered array of many closely, packed sodium atoms usually referred to as crystal lattice. Each Na atom has 11 electrons arranged in different shells and subshells as shown in following figure.



Fig 2.2 Energy Bands in Solid

As seen the 1s, 2s and 2p subshells are filled but 3s sub shell is incomplete and could hold one electron more. The electrons in each sub shells occupy specific energy levels as shown in following figure. For a small sodium crystal containing 10 20 atoms, the band formed by splitting of s subshell will have 2 x 10 20 levels of slightly different energy because the s-subshell has 2 electronic levels (one with spin up and the other with spin down). Similarly, in a p band there will be 6 x 10 20 closely packed levels because there are 6 electrons in a filled p subshell. In general, in an assembly of N atoms, the number of possible energy states is N. Since only two electrons of opposite spin can occupy the same state ( as per Pauli’s Exclusion Principle), the 34


maximum number of electrons which these N states can occupy is 2 N.

Fig 2.3 Energy Levels occupied bt electrons

SPACING BETWEEN ENERGY LEVELS OF A BAND It will be quite interesting as well as instructive to calculate the spacing between different energy levels in an energy band. A crystal weighing one milligram contains about 10 19 atoms. If we assume the valency band to bean s-band, it will contain 2x10 19 levels. Suppose the width of the energy band is 2 eV. Then, it is obvious that 2x 10 19 levels per milligram are spread over an energy band width of 2 eV. Hence, spacing between different levels=2/2x10 19=10 -19 eV. It will be appreciated that even though energy levels are discrete, the picture of a band as a c o n t i n u u m o f e ne r g y l e v e l s i s a v e r y g o o d approximation. This splitting of the single energy level of an isolated atom into a band of energy in the case of a solid is responsible for most of the electrical, magnetic and optical properties of that solid. It is worth pointing out here that in gases under normal conditions of temperature and pressure, the atomic spacing is so great that there is no splitting of energy levels and hence no band formation.



ENERGY BANDS IN LITHIUM AND THEIR OCCUPANCY Consider the case of lithium metal- the simplest atom which forms a solid at ordinary temperature. Its atom has three electrons, two of which have the same energy and the third one has higher value of energy. In an isolated single atom, two electrons move round the electron orbit with n=1 whereas the third occupies the orbit with n=2 as shown in following figure. Now, consider a piece of lithium metal containing 100 atoms. It will be found that the lower level (with n=1) forms a band of 200 electrons occupying 100 different energy states. The higher level (with n=2) forms a wider band also of 100 energy states which could, as before, accommodate 200 electrons. But as there are only 100 electrons available (one from each atom), this energy band remains half filled.

Fig 2.4 Energy Bands in Litheum

VALENCE AND CONDUCTION BANDS The outermost electrons of an atom i.e. those in the shell furthermost from the nucleus are called valence electrons and have the highest energy or least binding energy. It is these electrons which are most affected when a number of atoms are brought very close together as during the formation of a solid. The states of lower energy electrons orbiting in 36


shells nearer to the nucleus are little, if at all, affected by this atomic proximity. The band of energy occupied by the valence electrons is called the valence band and is, obviously, the highest occupied band. It may be completely filled or partially filled with electrons but never empty. The next higher permitted energy band is called the conduction band and may either be empty or partially filled with electrons. In fact, it may be defined as the lowest unfilled energy band. In conduction band, electrons can move freely and hence are known as conduction electrons. The gap between these two bands is known as the forbidden energy gap. It may be noted that the covalent forces of the crystal lattice have their source in the valence band. If a valence electron happens to absorb enough energy, it jumps across the for bidden energy gap and enters the conduction band. An electron in the conduction band can jump to an adjacent conduction band more readily than it can jump back to the valence band from where it had come earlier. However, if a conduction electron happens to radiate too much energy it will suddenly reappear in the valence band once again.

Fig 2.5 Electron Jumping to Conduction Bond 37


When an electron is ejected from the valence band, a covalent bond is broken and positively charged hole is left behind. This hole can travel to an adjacent atom by acquiring an electron from that atom which involves breaking an existing covalent bond and then reestablishing a covalent bond by filling up the hole. It is to be noted carefully that holes are filled by electrons which move from adjacent atoms without passing through the forbidden energy gap as shown in above figure. It is simply another way of saying that conditions in the conduction band have nothing to do with the hole flow. It points to a very important distinction between the hole current and electron current although holes flow with case, they experience more opposition than electron flow in the conduction band. To summarize the above: (i) (ii) (iii)

conduction electrons are found in and freely flow in the conduction band holes exist in and flow in the valence band conduction electrons move almost twice as fast as the holes.

The movement of electrons in a particular direction due to an external force is called electronic current. Unit of measurement of current is Ampere.

There are different methods of producing electricity. (i) (ii) (iii)

Electricity by friction, called static electricity. Electricity through chemical reactions. Electro chemicals. Electricity through magnetic Induction. 38


The el ect r i cal ener g y so pr o duc e d i s c a l l e d electromotive force or EMF.

An electro chemical cell is a device which gives electrical energy so produced is called (EMF) electro motive force. The unit of measurement of EMF is Volt. Requirements to build a simple cell are:(i) (ii) (iii)

Two dissimilar plates called electrodes. A chemical called electrolyte. A suitable container.

Fig 2.6 Electro Chemical Cell

PRINCIPLE OF A CELL When the concentration of different solutions are adjusted and the electrons are allowed to flow from Zinc to Copper through metallic wires, electricity is produced.



This discovery was first made by Italian scientist Luigi Galvani. Thus in his honour the electro chemical cell is named as Galvanic cell, common example is Daniell cell.

DANIELL CELL Daniell cell consists of Zn rod dipped in H 2 SO 4 solution is a porous pot. The porous pot is placed in a container having CuSO 4 solution. Zinc rod is negative terminal and copper container is positive. The cell reaction is given as : Zn+H 2 SO 4 =ZnSO 4 +H 2 CuSO 4 +H 2 = H 2 SO 4 +Cu

This type of cell can produce an EMF of 1.1 volt. The current flows in one direction from positive to negative terminal in the outer circuit, hence it is called a Direct Current. (DC)

DRY CELL A zinc container is used as negative plate and a carbon rod surrounded by a mixture of manganese dioxide and carbon granules works as the positive plate. The mixture is kept in a cloth bar, around the carbon rod. A paste made of ammonium chloride NH 4 Cl, water, plaster of paris, flour and a certain a amount of zinc chloride (ZnCl) is used as electrolyte. The cell is sealed to avoid evaporation of electrolyte. Then it is wrapped in a card board cover.

Chemical Action In the solution of ammonium chloride the NH 4 Cl breaks into NH+3, H and Cl ions. The H ions move towards carbon rod, give the charge to carbon rod through MnO 2 .



The H and ammonia gas from ammonium hydro oxide by taking oxygen from MnO 2 . The Cl ions move towards zinc plate, give the charge to zinc and become neutral Cl. The Cl reacts with Zinc to form zinc chloride. The reaction is given by: Zn+2NH 4 Cl=ZnCl 2 +2NH 3 +2H 2 2H 2 +2MnO 2 =MnO 2 + H 2 O

Emf of this cell is 1.5 volts. It is used in portable sets. This cell has following disadvantages: 1. 2.

Can not be charged once discharged. Can not be stored for more than a year.

SERIES CONNECTED CELLS Two or more cells when connected so that positive terminal of one cell is connected to the negative of t h e o t h er , su ch co nne ct i o n i s c a l l e d s e r i e s connection. In this method of connection the Emf of each cell is added up and the total voltage (V) is equal to the sum of the individual cell voltage: Therefore, V=V1+V2+V3....

Symbol for cell is +


This method is used to increase voltage.

Fig 2.7 Cells in Series 41


PARALLEL CONNECTED CELLS Two or more cells when connected positive terminals to positive and negative to negative of each such combination is called parallel connection. In this method the voltage remains same as that of one cell but the current giving capacity is increased by the number of times the cells connected.

Fig 2.8 Cells in Parllel

This method of connection is used to increase the current giving capacity of battery.

Multiples and Sub multiples of Volt 1000 volts 1 Volt

= 1 Kilo volt. = 1000 mili volt

1 1 1 1

= 1 micro volt or 1 uV= 10 -6 volt. = 1000 miliampere = 1000 micro ampere or = 10-6 Amp or 106uA=1A

m V ampere m A uA

RESISTANCE Resistance is the property of a substance to appose the flow of electrons which constitute an electronic current. A good conductor of electricity also offers an opposition however small it may be. This property of a conductor has a significant effect on the voltage/ current relationship, and is given by Ohm’s law.

OHM’S LAW It states that, the current flowing through a conductor at a uniform temperature is proportional 42


to the potential difference across the ends of the conductor. = V/I I

Where V = Voltage I = Current Where R is the constant.

= V/R

If V is in volts, I is in ampere than Resistance is given in Ohms. A conductor is said to have unit resistance of 1 Ohm if it permits a current of 1 ampere to pass through at a potential difference of 1 volt. Symbol of resistance is represented by 1 Ohm = 1 Volt/1 Amp

Fig 2.9 Testing Ohm’s Law

Example (1)

In a circuit If

R=100 V= 2000 Volt

The current in the circuit is given by the relationship, I=



V 2000 = = 20 Amperes R 100

Find the current in a circuit when there is a resistance of 100m Ω across an emf of 2000 uV.

V 2000μ V 2000 * 103 2 = = = 0.02 Amperes = 0.02 * 1000 mA = 20 mA 6 = R 100mΩ 100 * 10 10 2



COMBINATION OF RESISTORS Resistors can be combined in two ways:(i)

Resistors in series, to increase resistance in the circuit. Resistors in parallel, to decrease resistance in the circuit.


Series Resistors When resistors are joined end to end, they are said to be connected in series, In this case the total resistance is equal to the sum of the individual resistances. Since the current remains the same the voltage drop across each resistor is different and the sum of all the voltage drops is equal to the applied voltage. V



V 1+V 2+V 3


IR 1+IR 2+IR 3


IR 1+IR 2+IR 3

= I(R 1+R 2+R 3)

Thus total Resistance (R) in the series combination is: R


R 1 +R 2 +R 3 +.......................

Fig 2.10 Resistance in Series

Parallel Resistors When resistors are connected end to end in such a way that their ends connected to the negative and positive polarity of source voltage they are said to be in parallel. 44


Fig 2.11 Resistance in Parllel

In this case the voltage (V) is the same across all the resistors, the current ‘I’ is divided into I 1, I 2 and I 3. Therefore or


I = I1 + I 2 + I 3

V V V V = + + R R1 R 2 R 3 1 1 1 1 = + + R R1 R 2 R 3

These laws are used for solving electrical networks which may not be solved by Ohm’s Law. The two laws are: (a) (b)

Point Law or Current Law. Mesh Law or Voltage Law.

CURRENT LAW It states that, “ In any electrical network, the algebraic sum of the currents meeting at a point (or junction ) is zero”. This means that the total current leaving a junction is equal to the total current entering that junction. 45


Assuming the incoming currents as positive and out going currents as negative at ‘A’. Then I 1 +(-I 2) + (-I 3 ) + (I 4 ) + (-I 5 ) or I 1 +I 4 -I 2 -I 3 -I 5

=0 =0

Fig 2.12 Current Law

or or

I 1 +I 4 = incoming currents =

I 2 +I 3 +I 5 out going currents.

VOLTAGE LAW It states that, “the algebraic sum of the products of current and resistance in each conductors in a closed mesh or path of a network is equal to the algebraic sum of the emfs in that path.” This means if you start from a particular junction and go around the closed path till you come back to the same junction. Then you must be at the same potential with which started. This means all the sources of emfs met on the way must necessarily be equal to the voltage drops in the resistance.

Voltage Signs (1) (2)

A rise in voltage should be given positive sign. A fall in voltage to be given negative sign. Therefore as we go from negative terminal to positive terminal, it is rise in voltage hence a positive sign to be given. On the other hand from positive to negative terminal negative 46




sign to be given. Sign of battery is independent of the current direction. Through resistors if we go in the direction of current then their is drop in voltage there fore it should be taken as negative. Opposite to the direction of current through resistance as positive. The polarity of any other source of emf is not considered then.

The question of assuming proper direction of current is important. It may be assumed either clock wise or anti clock wise. The important point is that once a particular direction has been assumed the same should be used through out the solution of the question. E.g.

Find current in 132 Ω resistance and voltage across 20 Ω resistance in Fig 2.13. In the path A B E F A, if currents are x and y then starting from ‘F’, then for ABEFA +200-20x -132 (x-y) = 0 200-20x-132x+132y = 0 -152x +132Y = -200 dividing by 4 -38x+35y = -50 - ---------- a

Fig 2.13 47


for CDEBC -60y+100 +132(x-y) -60y+100+132x-132y 132x-192y 33x-48

= = = =

0 0 -100 -25 ------------ b

Find the value of x and y by replacing value of x and y in a and b.

MULTIPLES AND SUB MULTIPLES OF OHM 10 3 Ω = 1K Ω 10 6 Ω =1 mega ohm (M Ω ) Similarly,

=10 3 mili ohms (m Ω ) \

1 ohm

1 mili ohm =10 -3 Ω


= 10 6 micro ohm ( μ Ω )


or 1 micro ohm = 10 -6 Ω


directly to the length of conductor, (L) inversely to the cross section area of the conductor, (S) nature of the material of conductor. temperature of the conductor.

It is given by relation:

Rα or


R =ρ

L ( ρ is a constant and is specific S




RESISTORS The term resistance refers to the opposition that all materials offer to the passage of electric current. When ever an EMF is applied across a conductor a current flows through that conductor. It is observed that the amount of current directly depends upto the EMF which measured in volts applied across the conductors. But since the conductor itself offer opposition to the flow of current. How ever if voltage is increased the current also decrease. The resistance of a conductor plays a vital role in controlling the current through a conductor. There fore we can achieve control over current and voltage in a closed electric path (called circuit) by introducing resistive material at will. To achieve this the component device is called a Resistor. They are made out of resistive materials for different values.

Resistor Wattage Resistors are designed for different current carrying capacity. When current flow through a resistor there is a certain amount of energy dissipation. This dissipation is in the form of heat. Hence for higher current the heat dissipation also increase. As such the size and material also varies accordingly. The less wattage resistors are smaller in size for the same value of resistances. Its size increases as the wattage increases. They are available in 1/8 Watt, ¼ Watt, ½ Watt, 1 Watt, 2 Watt, 5 Watt 10 Watt, Values.

Types of Resistors Resistors are mainly of two types. 1)

Fixed Resistors 49



Variable Resistors.

FIXED RESISTORS In a fixed resistor the value of resistance is fixed. In this we have three different types of resistors. Moulded Carbon Composition Resistors : The resistive material is of carbon clay composition. The leads are made of tinned copper. Their value range from 5 M to 22 M & Tolerance ranges from 5% to 20%.

Fig 2.14 Moulded Carbon Composition Resistors

Metalized Type Carbon Composition Resistors : It is made by depositing homogeneous film of pure carbon over a glass, ceramic or other insulating core. They are also called precision type resistors, can be made to the accuracy of ±1%.

Fig 2.15 Metalized Type Carbon Composition Resistors

Wire Wound Resistor : A wire wound resistor uses a length of resistance wire, such as nichrome. This wire is wound onto a round hollow porcelain core. The ends of the windings are attached to metal pieces inserted in the core. Tinned copper wire leads are attached to these metals pieces. This assembly is coated with an enamel containing



powdered glass. Wire wound resistors are from 1 to 100K and wattage rating upto 200W.

Standard Values Commercially available standard values are given in the following chart. Ohm 1.0 1.2 1.5 1.8 2.2 2.7 3.3 3.9 4.7 5.6 6.8 8.2

10 12 15 18 22 27 33 39 47 56 68 82

Kilo 100 120 150 180 220 270 330 390 470 560 680 820

1.0 1.2 1.5 1.8 2.2 2.2 3.3 3.9 4.7 5.6 6.8 8.2

10 12 15 18 22 22 33 39 47 56 68 82

Mega 100 1.0 120 1.2 150 1.5 180 1.8 280 2.2 270 2.7 330 3.3 390 3.3 470 4.7 560 5.6 680 6.8 820 8.2

10 12 15 18 22 27 33 39 47 56 68 82

Colour Codes Color coding: Color coding is a system used to indicate the value of resistances. For a fixed, moulded composition resistor, four bands are printed on one end of the outer casing. The color bands are always read left to right from the end that has the bands closest to it. The 1st and 2nd band indicates the first and second digits respectively. The third band indicates the number of zeroes that follows the first two digits. The last band represents the tolerance. The standard colour codes used in making the values of resistors and their tolerance is given below:



Fig 2.16 Colou Codes for Resistance

COLOUR TOLERANCE Black Brown Red Orange Yellow Green Blue Violet Grey White Gold Silver No Colour ±20%

DIGIT 0 1 2 3 4 5 6 7 8 9 -

10 0 10 1 10 2 10 3 10 4 10 5 10 6 10 7 10 8 10 9 0.1 = 10 -1 0.01=10 -2 -


±5% ±10%

Memory Aid for color coding

B.B.ROY of Great Britain had a Very Good Wife VARIABLE RESISTOR For adjusting the values of currents and voltages, variable resistors are used. Variable resistors are called RHEOSTATES. The smaller variable resistors commonly used in electronic circuits are called 52


POTENTIOMETERS OR POTS. Potentiometers have a wire wound resistance as their primary element. The resistance wire is wound over a dough shaped core of ceramic. There are three terminals coming out of a potentiometer. The outer two are the endpoints of resistance elements and middle for the rotating contact. The resistance offered to the flow of current is altered by changing the position of this contact. There is another type of variable resistor called a THERMISTOR. The value of resistance changes with change in temperature. With increase in temperature the value of resistance decreases. A photo resistor is also a variable resistor in which with increase in the intensity of light the value of resistance decreases.

Carbon Composition Variable Resistors They are mixture of carbon filler and binder coated on a ring of insulating material. The film is processed to minimize absorption by the sliding contacts are of brass or phosphor bronze. They are used as preset controls and potentiometers in T.V, radio and measuring instruments.

Wire-wound Variable Resistors Nichrome wire is wound over strip of insulating material which is then bent into are sliding contact moves on the edge.

Rheostat, Wire-wound Solenoid. Used in industry and laboratory. Has large power dissipation. Thick resistance wire of oxidised nickel copper is used. Sliding contacts are copper or graphite brushes.



Thermistors Thermistors are basically resistors. Their resistance varies with increase in the working temperature. There are two types of thermistors. Negative Temperature Coefficient Type (NTC type) NTC type resistors are those whose resistance decreases with increase in temperature. Positive Temperature Coefficient Type (PTC type) PTC type are those whose resistance increase in temperature. The characteristics graph shows resistance value for both type at different temperature.

Fig 2.17 Characterstic Graph between Resistance and Tempreture

Applications  They ar e used in tem perature se nsing, temperature compensator and in control circuits.  They are used in series with resistor for time delay and surge suppression circuits.

Light Dependant Resistors (LDR) They are special type of resistors whose ohmic value changes with change in intensity of light. It is made 54


out of highly pure cadmium sulphide. It is formed in disc shapes and heated at high temperature to remove gasses. Electrodes are formed and leads are connected and put in a plastic case with synthetic resin. In dark its resistance is very high and in light it acts as a conductor. After remaining in darkness for three minutes, its resistance may be high as 10 M. At 1000 Lux illumination the resistance may fall to 100 to 300 Ohm. When light is removed the resistance increases at the rate of 200 K/Sec approx. Permissible working voltage upto 100 volts. Use: 1) used in proximity switches, 2) automatic brightness and contrast control in T.V. 3) Light failure alarm.

Voltage Dependant Resistors (VDR) Also called Varistors. They offer high resistance at high voltage and resistance decreases voltage across it decreases. They are of two types. Silicon Carbide Varistors Silicon carbide is milled and mixed with suitable ceramic binder desired shape of disc, rod or washer. It is sintered under controlled temperature to make hard and wire leads are then attached. Metal Oxide Varistors Metal oxide varistors are made of zinc oxide and bismuth with other powdered metal additives. They are used to protect circuits and components from inductive surges. They are also used in bias compensation, and boost Emv stabilizing circuits.



If a varistor is connected across an inductive circuit, it will protect it when the circuit is opened suddenly, resistance with decrease as the value of induced voltage decreases, allowing more current to be drawn through the varistor.

TESTING OF RESISTOR The normal range of resistors encountered in practice is 1 ohm to 10 ohm. The most convenient method of checking resistances in this range is by using ohmmeter or multimeter. The circuit for resistance measurement is so arranged that when the test leads are connected across the unknown resistor, the current through the meter corresponds to the resistance value which is read on a calibrated scale. Before the unknown resistance is tested, the two meter leads are shorted together and the zero control corresponding to the range selected is adjusted to read zero ohms on the scale.


Current meter method Voltage method Ohm meter method Bridge method.

Wheat-Stone Bridge Wheat stone bridge method is used to find the value of an unknown resistance on the basis of Kirchoffs Law. Here P & Q form ratio arms. The ratio may be selected out of 1: 10 : 1 : 100, 10 : 1 or 100 :1 The value of R can be adjusted 1 to 5000 ohm. Resistor ‘S’ is an unknown resistor. Principle for the determination of value of an unknown resistor (S) select a suitable ratio between P & Q and adjust the value of arm R in such a way 56


that the current flowing through the galvanometer becomes zero.

Fig 2.18 Wheat Stone Bridge

It thus state that: V A-B = V A-D and V B-C = Vo Px I 1 = R x I 2 and Q x I 2 = S x I 1 PxI1 RxI 2  QxI1 SxI 2

Therefore P R  Q S

STATIC ELECTRICITY It is the branch of science which deals with the study of charges of electricity at rest.

Law of Electro-Statics Coulomb’s Law: 1)

Like charges of electricity repel each other, where as unlike charges attract each other.




According to this law, force between two charges is; (i) Directly proportional to the product of their strength (ii) Inversely proportional to the Square of distance between them. (iii) It also depends upon the nature of medium surrounding the two charges. F

q 1q 2 d2


q 1q 2 d2

where K is a constant of proportionality charge is measured in ‘Coulomb’. Coulomb Coulomb is defined as that charge or quantity of electricity which, when placed in air (vacuum) from an equal and similar charge repel it with a force of 9x10 9 Nw.

Electric Field The region in which stress or in which electric forces act is called electric field or electrostatic field.

ELECTROSTATIC INDUCTIONS The process by which an uncharged body gets charged merely by the nearness of a charged body is called Electro Static Induction. Consider the following Example. ‘A’ is a charged body ‘B’ is uncharged body, acquired charge due to induction. (1)

A negative charge will induce positive charge and a Positive charge will induce a negative.




The induced charges are equal to the inducing charge.

Fig 2.19 Electrostatic Induction

If a charge ‘Q’ is given to a conductor, its potential is raised. The greater the charge the greater is the rise in potential. Therefore

Q V


Q  Constant V

This constant is denoted by ‘C’ and is known as capacity of a conductor. The capacity of a conductor is defined as the charge required to raise its potential by a unit amount. E


The unit of measurement of capacity is ‘Farad’. 1 Farad

= 10 6


= 10 9 nano Farad. (nf) =10 12 pf 59


Dielectric Insulation used between the two plates of a capacitor is called dielectric.

Dielectric Strength The ability of the dielectric to resist break down or puncture is called dielectric strength. Dielectric breakdown takes places due to high temperature and voltage in excess to the capacitor’s rating.

CAPACITORS The arrangement of two conductors which are held at some distance apart, one conductor carrying current and second being earthed. Such arrangement has the ability to store temporarily a large quantity of electricity. Symbol for the capacitor is

Fig 2.20 Capacitor Symbol

The capacity of a capacitor depends upon: (1) (2) (3)


Distance; it is inversely proportional to the distance between two plates. Area of plate; it is directly proportional to the area of the plates. Nature of medium it also depends on the nature of medium, or capacity is directly proportional to the specific inductive capacity of medium. d = distance A = area of plates C = capacity K = Specific Inductive capacity of medium 60




1 d

C  A and


combining all,C


KA d


Fig 2.21 A Capacitor with Area of plates = A and distance = d

Combination of Capacitor (1)

When capacitors are connected end to end, they are said to be in series. Total capacity in series connection is given by, 1 1 1 1    C C1 C 2 C 3

Fig. 2.22 Capacitors in Series


When capacitors are connected end in parallel to supply, they are said to be in parallel. Total capacity in parallel is given by, C = C 1+C 2+C 3



Fig 2.23 Capacitors in Parllel

Characteristics of Capacitor 1)

2) 3) 4) 5)

A C apa ci to r pr ov ides easy pa t h t o the alternating current, i.e.. it acts as a short. However it blocks the DC voltages. A fully charged capacitor when disconnected from the charging source discharges gradually. A charged capacitor does not discharge fully, but it discharges to 36/8% of the full value. Similarly it charges to 63.2% of the maximum value. The discharge rate of the capacitor can be adjusted with the suitable combination of resistor and capacitor, called CR time constant.

Time Constant of Capacitor The time constant for charging of a capacitor is given by, t = C x R seconds.

Discharge Time The time constant of the capacitor is defined as the time taken for a fully charged capacitor to discharge by 68.2% of the full charge.

Charging Time The charging time constant of the capacitor is defined as the time taken for the charge to build up to 63.2% of the final maximum charge from a DC source. 62


TYPES OF CAPACITOR: Capacitors are divided into two categories. (1) (2)

Fixed Capacitors Variable Capacitors

Fixed Capacitors The capacitors are often named after the dielectric used in their making. The commonly used are: (1) (2) (3) (4) (5) (6)


Paper capacitor Metalized paper capacitor Ceramic capacitor Glass dielectric capacitor Vitreous enamel capacitor Plastic dielectric capacitor(a) Polystyrenes film capacitor (b) Polytetres fluorothelene capacitor (PTFE) (c) P o l y t h e n e Te r e p h t h a l a t e ( M e l i n e x ) capacitor. Electrolytic capacitors (a) Plain foil type (b) Etched type (c) Air di-electric capacitor.

Paper Capacitors They are general purpose capacitors. Paper is low cost dielectric material. It is made by rolling paper between metal electrodes. Kraft or linen paper of 7.5 micron to 25 micron thickness is used. Aluminium foil is 22.5 micron thick. Range 1000 pF to 1µF

Tolerance Voltage +_15% 400, 600 1200, 1800 V



This capacitor is used as RF bypass and coupling capacitors.

Metallized Paper Capacitors One side of impregnated paper is sprayed with metal (aluminium). When such paper is rolled, it gives higher capacitance for a given volume. It has self healing property. Aluminium at high temperature produces aluminium oxide, which is a good insulator. Range Value 1000 pf to 1µF

Tolerance Voltage rating +_15% 1.5 KV.

This capacitor is used for decoupling.

Fig 2.24 Metallized Paper Capacitors

Ceramic capacitors Stealite in the form of tubes is used. The internal and external surface of tube is metallized by brushing in silvering solution, and firing at 700ºC.

Fig 2.25 Ceramic Capacitors

Glass Dielectric These capacitors are light weight, have low losses, high insulation resistance and high breakdown 64


strengthRange Value 150 pf to 10,000 pf

Voltage rating 300 V to 500 V

These are used in medium power transmitters.

Polystyrene film capacitors Film is made from po lystyrenes granules by extruding heated tube of polymer which is then spread out stretched in two directions and then cooled. Aluminium foil electrodes are used. Range Value upto 1 µF

Voltage 100 V

These are used in (1) (2) (3) (4)

Radio frequency tuned circuits Storage capacitors in digital equipments Measuring equipment circuits Long time constant circuits

Polytetra flurocthylene Capacitors These capacitors can withstand higher temperatures than polystyrenes film, but the material is expensive. Range value upto

0.05 µF.

Electrolytic Capacitors A thin film of aluminium oxide is deposited on the surface of aluminium plate. Aluminium electrode is placed in a solution of ammonium borate and a constant voltage is applied.

Fig 2.26 Electrolytic Capacitor 65


Initially current is large. It drops gradually as the film grows. The thickness of the film depends upon the forming voltage. The working voltage is about 9% of forming voltage. A thickest film is formed at about 600 V. Thus the maximum working voltage is about 550V.

Tantalum Electrolytic Capacitors Pellet type tantalum powder is used inside silver cup containing sulphuric acid as electrolyte, They are Foil type and solid electrolyte type. Range upto 200 uF

Voltage 6 to 150 V.

Thes e are used as decoupling ca pacito r s in transistors, IC circuits. Electrolyte capacitors are marked with polarity. Therefore care must be taken in connecting them to circuit. Wrong polarity may result in damage to the capacitor.

VARIABLE CAPACITORS These capacitors are used as tuning capacitors in radio receivers. Various parts of a variable capacitors are:1) 2) 3)

Frame Rotor and stator Spindle and bearing.

There are four methods of frame construction. i) ii) iii) iv)

Built up type Bent frame type Bent frame with tie bars. Die cast type.

Rotor and stator vanes are punched from aluminium strips. To cover large turning range the best shape of vanes in semi circular. 66


Fig 2.27 Variable Capacitors

Spindle is generally made from brass which is grooved to accept vanes. Various types of variable capacitors are : (1) (2) (3) (4) (5)

Precision variable capacitors. Trimmer Capacitors. Differential Trimmer Capacitor Concentric Type Capacitors. UHF Capacitors.

Effect of Capacitor in an electronic circuit The opposition offered by a capacitor to the flow of alter n ating current (AC) is cal led capa c itive reactance and is expressed by Xc. The voltage and current have a phase difference of 90 in a capacitive circuit. The current leads the voltage by 90. The capacitive reactance in an AC circuit can be formed by: Xc 

1 2 fc

(Where f is the frequency of current)

Colour Coding of Capacitors EIA code, (Electronic Industrial Association Code) (1) (2)

3 dot code. 1st dot, 1st digit, 2nd dot second digit and 3rd dot is maximum. 6 dot code 1, 2, 3, digits. 67


4 no. of zero 5 Tolerance 6 Voltage rating Tolerance color if black means 20%



1. 2.

3. 4.

5. 6. 7.





What is Dalton’s theory of atomic structure? What are energy bands? How current flows in solids? Explain using the concept of energy bands? Differentiate between valance and conduction band. Write the unit of Resistance. If a resistor is rated as 1000 and 10W, what is the maximum current it can carry? Explain wire-wound resistor. What could be other type of resistors. What is capacitor? How dielectric effects the capacity of the capacitor? Explain the construction of Metallized paper capacitor. What are the various other types of capacitor? When you control the volume control knob of radio receiver, which component is varied inside the set? Two resistors of 100 and 200 are connected in series across a 4V cell of negligible internal resistance. A voltmeter of 200 resistances is used to measure voltage across each resistance. What will the voltage be in each case? Calculate the resistance of 100m length of a wire having a uniform cross-sectional area of 0.1 mm2, if the wire is made of magnesium having a resistivity of 50x10-8 mm. An aluminum and a copper wire are connected in parallel. Their respective specific resistance is in the ratio 49:24. The former carries 80 percent more current than the later and the later is 47 percent longer than former. 69





Determine the ration of their cross sectional area. Two coils connected in parallel across 100V supply mains, take 10A from the line. The power dissipated in one coil is 600W. What is the resistance of other coil? A parallel plate capacitor is charged to 100V. Its plate separation is 2 mm and the area of each of its plate is 120 cm2. Calculate the charge on plates if permittivity of the free space is 8.85x10-12 F/m. State True of False : a) Brown, red and black band on a resistor indicate that its value is 120. b) A ceramic capacitor can have capacity of 100µF. c) Ann ideal voltage source doesn’t have any internal resistance. d) Radio receivers have electrolytic capacitors. e) The ability of the dielectric to resist break down is called dielectric strength. f) Bridge method is used for resistor testing. g) POTs is used for small variable capacitor.


Chapter 3


Magnetism A black stone called lode stone found in the nature exhibited the property of magnetism through its ability to always turn to a particular direction and to attract pieces of iron, Lodestones are called natural magnets. They are generally week and irregular in shape.

Steel bar can easily be magnetised by rubbing another magnet or lode- stone. Electric current also can be used to make artificial magnets.

PROPERTIES OF MATERIALS Paramagnetic Substances Substances which are feebly attracted by a powerful magnet are called paramagnetic substances. e.g. Magnese, Chromium, Oxygen and aluminium.

Dia Magnetic Substance Substances which are feebly repelled by a power full magnet are called diamagnetic substances. e.g. copper, silver, Gold and water.

Ferro magnetic Substance Substances which are easily attracted even by a moderate magnet and are easily converted into magnet are called ferro magnetic substances. e.g. iron, cobalt and nickel.

Magnetic field The neighbourhood of a magnet is full of magnetic forces. It spreads around itself some special effect


and creates a strain in the space surrounding. The region in which magnetic forces are present is called a magnetic field.

Magnetic Force The force exerted by one magnet on another either to attract or to repel is called magnetic force.

Magnetic Induction The phenomena by which an unmagnetised piece of iron becomes magnetised when placed near a permanent magnet is called magnetic induction.

Susceptibility It is the property of a substance to acquire magnetism easily.

Retentivity It is the property of a substance to retain the magnetism after the magnetizing force is removed from it.

Permeability It is the ability of a substance to allow the magnetic lines of force to pass through it. It is the ratio of flux density (B) to the magnetizing force (H). Thus = B/H for vacuum is taken as unity.

Apart from electro chemical cells, there is yet another method of generating emf. This method is called electro magnetic induction method. The device used for this purpose is called a generator and the current produced through this is an alternating current



(AC). This is in contract to the current produced by a cell, which is a direct current (DC).

Faraday’s Laws of EM Induction It states that, (i) (ii)

When ever there is a change in the flux linking a conductor an emf is induced in the conductor. The induced emf is directly proportional to the rate of change of flux linkage.

This simply means that when a conductor is rotated in a magnetic field, an emf is set up in it and the magnitude of the emf depends upon the speed of rotation of the conductor. This can be explained with the help of a diagram of a single rectangular conductor and magnetic field produced by two magnetic poles placed nearby. It is found that when the conductor cuts the magnetic lines at right angle there is maximum Emf induced in the conductor. Therefore when arm BC in Fig.3.1 is vertical position, EMF induced in arm AB is zero. As it moves downwards clockwise, the induced EMF increases in AB till 90 rotation (b) and as it continues to move further the emf starts falling till it becomes zero (c) again at 180. Further rotation now moves AB upwards, and the EMF starts increasing again, but it is found that the direction of this EMF is now exactly opposite to the EMF induced during its movement from 0 to 180. Further it increases in the opposite direction now till the rotation reaches to 270 and starts falling again and becomes zero when it reaches the point it started from.



Fig 3.1 Electro Magnetic Induction

Therefore, in one full rotation of 360 the induced EMF in conductor AB reaches a maximum value and falls to zero in one direction for half rotation and similar changes occur for next half period in the opposite direction.

Fig 3.2 EMF with different position of Coils

Flaming’s Right Hand Rule This rule is used to certain the direction of induced EMF in the conductor moving in a magnetic field. It states that. When Fore-Finger, middle finger and thumb of right hand are extended in such a way that they make right angle to each other, and if fore finger shows 75


the direction of magnetic field, the thumb shows the direction of movement of conductor then middle finger shows the direction in which the Emf will flow.

Fig 3.3 Fleming Right Hand Rule

INDUCTANCE Inductance is the property of conductor where by it opposes any change in the current flowing through it.

Self Inductances When a varying current passes through a coil, a varying magnetic field is set up around it. This changing magnetic field induces an emf in the coil itself. The direction of this emf is so as to oppose its cause. Therefore also called back emf. It is this back emf due to which an inductor opposes any change in the current through it. This property of the inductor is called self inductance. It is measured in terms of coefficient of self induction ‘l’. Unit of measurement of magnetic lines of force (flux) is ‘weber’. Symbol for flux is Ø. Weber Turns: Weber turns is the product of flux (Ø) and number of turns with which the flux is linked. If N = number of turns of coil. 76


i = current in Amp. through coil Ø = flux produced Then Weber turns are ØN Therefore weber turns per ampere = NØ/i The unit of self inductance is Henry. (H) Henry A coil is said to have a self inductance of one Henry if a current of ‘I’ ampere flowing through it produces flux linkage of I Weber turns in it. L = N/i = H 1 Henry =1000 milliHenry and 1 Henry= 10 6 µH. 1 mil= 1000 µHenry.

Mutual Inductance It is the ability of one coil to produce an emf in a nearby coil by induction when the current in one coil changes. The symbol for mutual inductance is ‘M’. If i ampere current in first coil produces a flux Øwb. In it, then it is supposed that whole of flux links with second coil. Then flux linkage, is weber turns to the second coil for unit current in the first coil are Hence

N 2  Ø/i 1 , M = N 2 Ø/i 1

If weber turns in second coil due to one ampere current in the first coil, i.e. then

N 2 Ø/i 1 = I M= 1H

Therefore two coils are said to have a mutual inductance of one henry if one ampere current flowing in one produces flux linkage of one Weber turn in the other. Uses:77


(1) (2) (3)

As Audio-Frequency chokes for frequencies between 60 Hz to 5 KHz. As Radio Frequency chokes for frequencies above 5 KHz. Inductors are used as filter chokes in the power supply circuit for smoothing purposes. Low frequency chokes are wound over a laminated core. The RF chokes are without core.

COUPLING Whenever two circuits are connected in such a manner that energy is transferred from one circuit to another the two circuits are said to be coupled.

Fig 3.4 A coupling

Tight and Loose coupling The coil driven by the source energy is called primary. And the coil receiving energy through induction is called secondary. The amount of induced voltage and current in secondary depends on how much flux is linked. If the coils are sufficiently close to each other maximum energy will be transferred. In this case the circuit is said to be tightly coupled. Conversely if the two coils are not close enough and maximum energy transfer does not take place for the same primary current, then the circuit is said to be loosely coupled.



Coupled Impedance or Reflected Impedance A impedance developed in the secondary due to current flow through it which acts as through on impedance has been added in series with the primary. This impedance is called reflected impedance. The greater is the value of coupling factor, the greater will be the value of coupled impedance for the same load.

Optimum Coupling When coupling is very loose the secondary current curve is a single hump. As the coupling is increased the value of current response also increases. A highest single hump is achieved. But further increase in coupling results in two humps. The coupling where highest single hump is obtained is called optimum coupling.

Fig 3.5 Coupling Characterstic - Secondary current V/s Frequency

Inductance in Series When the inductors are connected in chain so that the field of neither coil effect the other, they are said to be in series.



In series combination the total inductance is equal to the sum of the individual inductances. L =

L 1 + L 2+ L 3 ...................

The opposition offered by inductance to the varying c u r r e n t i s c a l l ed i ndu ct i ve r e a c t a n c e . I t i s represented by X L and X L is given by:

Fig 3.6 Inductance in Series



= 2 FL = Frequency of current = Total inductance.

Inductance in Parallel When one end is connected to one inductor and second and to another in such a way that the direction of the induced emf is the same in all the inductances, they are said to be in parallel. Field of neither coil effect the other. Total inductance is the circuit 1/L is: 1 1 1   ................ L L1 L 2

Fig 3.7 Inductance in Parllel 80


The reciprocal of the total inductance is equal to the reciprocal of the individual inductances. Due to the property of the inductance to oppose any change in the current through it different kinds of inductors are made for different applications in electronic circuits.

Alternating current is that current which continuously changes in magnitude and direction with respect to time. b c

b c

a Volts

a t f




d e


Fig 3.8 Concept of A.C.

Amplitude It is the maximum value an alternating current reaches in either direction.

Cycle Variations of an alternating current in one complete rotation of 360 is called a cycle.

Frequency Number of cycles passing through a point in one second is called frequency (f). 1000 cycles or Hertz per second is called 1 Kilo hertz ; (KHz) 1000 KHz=1 Mega Hertz (MHz)



Periodic Time Time taken by the emf to go through one complete cycle of changes is called periodic time. (T). T

1 f

Wave Length The distance covered by one complete cycle of changes is called wave length. (Y)

Peak Value It is the maximum value of the emf in either direction by an alternating current during one cycle.

Velocity It is the angular velocity of rotation indicating the angle covered in 1 second. (V).

RMS Value It is the equivalent value of alternating current required to produce the same amount of heat as the DC of value 3 / 2 ampere. This equivalent value of DC is called the effective value or virtual value of AC. The equivalent value of alternating current is of peak value 3 amperes. Therefore. DC value = 3 / 2 = 3 x0.707=2.121 Amp.

3 3x 2 3x 2 3x1414 .     3x0.707 2 2 2 2x 2



This effective value of AC is called Root mean square value because if all the instantaneous values of an AC over one cycle are squared and the square root of the average of these squares is found it will be equal to the effective value.

Average Value The mean value of a sinusoidal alternating voltage or current taken over a complete cycle is zero, because every positive half cycle is cancelled out by the consequent equal negative half. Therefore the average value of alternating current for positive half cycle is taken as 0.637 times the maximum value. Thus I av =I max . x 0.637 and for average voltage. V av = V max . x 0.637

Form Factor Ratio between the RMS value of an alternating quantity and its value is called form factor. Thus,

Form Factor 

RMS Value Average Value

A generator produces currents used as main power source. Hence different frequency currents used in power supply are at the power frequencies. There are other methods of creating higher frequency currents which may or may not be sinusoidal form. They may however be of a very low power rating, Such frequency currents are classified as per their range and uses as follows.




A generator works on the laws of electromagnetic induction. It is an electromechanical device which converts mechanical energy into electrical energy.

BASIC PRINCIPLE This energy conversion is based on the principle that when a conductor or coil relates in a magnetic field, an e.m.f. in induced in the coil or conductor. This e.m.f. is known as induced e.m.f. The magnitude of induced e.m.f. In conductor depends upon rate at which the lines of force out. In Fig 3.9 a single turn rectangular copper coil rotating about its own axis placed in a magnetic field. The two ends of coil are joined to two slip rings. These slip rings are fixed to shaft and insulated from each other and from shaft two collecting brushes of carbon or copper are pressed against slip rings.



Fig 3.9 Basic Principal of Generator

The function of slip ring is to collect e.m.f. induced in armature and function of brushes is to collect the e.m.f. from slip rings and send it to external load resistance R.

WORKING When coil rotates, its sides out the lines of flux and some e.m.f is generated in it. This e.m.f. is not constant but charges its value. 1.



When coil is at right angle to direction of flux no e.m.f. is induced i.e. e.m.f. is zero at 0º, 180º, 360º, because at these positions the coil is moving along the lines of flux and lines of force is maximum i.e., flux linkage is maximum but rate of change of flux linkage is minimum. When the coil is in line with direction of flux or when coil is horizontal, the induced e.m.f. is at maximum the cutting of lines or flux linkage is minimum but rate of charge of flux is maximum. This occurs at 90º and 270º. At intermediate position (i.e. between 0º to 90º and between 90º to 180º) the induced e.m.f has zero value between zero and its positive maximum. Between 180º and 270º and 360º the induced e.m.f has values between zero and negative maximum values. 85


So the wave form has positive and negative half cycles, it is said to be alternating and output is an alternating voltage.

Fig 3.10 Change in Flux at different Angles

Figure above shows how at different positions of coil flux changes. Therefore, we find that the current, which we obtain from such a simple generator reverses its direction after every half revolution. Such a current undergoing periodic reversals is known as alternating current. It is, obviously, different from a direct current, which continuously flows in one and the same direction. It should be noted that alternating current not only reverses its direction, it does not even keep its magnitude constant while flowing in any one direction. The two half-cycles may be called positive and negative halfcycles respectively. For making the flow of current unidirectional in the external circuit, the slip-rings are replaced by splitrings.

Fig 3.11 Split Rings



The split-rings are made out of a conducting cylinder which is cut into two halves or segments insulated from each other by ‘a thin sheet of mica or some other insulating materiel.

Fig 3.12 Coil connected to Split Ring

Fig 3.13 The E.M.F output with Split Rings

As before, the coil ends are joined to these segments on which rest the carbon or copper. It is seen that in the first half revolution current flows along ABCD i.e. the brush No.1 in contact with segment ‘a’ acts as the positive end of the supply and ‘b’ as the negative end. In the next half revolution, the direction of the induced current in the coil has reversed. But at the same time, the positions of segments ‘a’ and ‘b’ have 87


also reversed with the result that brush No. 1 comes in touch with that segment which is positive i.e. segment ‘b’ in this case. Hence, current in the load resistance again flows from L to M. The waveform of the current through the external circuit is as shown in Fig. This current is unidirectional but not continuous like pure direct current.

TYPES OF GENERATORS There are two types of generator.

Separately Excited Generators These generators are those whose field magnets are energized from an independent external source of d.c. current. This type of generator is excited by external battery.

Fig 3.14 Separately Excited Generators

Self Excited Generators: Those generator whose field magnets are energised by the current produced by generators themselves. Due to residual magnetism there is always present some flux in the poles. There are three types of self excited generator. 1. Series excited generators 2. Shunt excited generator 3. Compound generator 88



Short shunt compound generator


Long shunt compound generator

Series Self Excited generators: In this generator the field coils are in series with armature and carry total current of generator. Since the field coils carries full current so it has a few turns of wire of large cross section area and low resistance. In this case: series)

I a =I se = I

(because they are connected in

Fig 3.15 Series Self Excited generators

Shunt Excited Generators In these generators the field winding are connected across or in armature conductors and have full voltage of generator applied across them.

Fig 3.16 Shunt Excited Generators

Compound Generators 89


Short Shunt Compound Generators: Those generators in which the shunt field coils are connected inside the series coil or in which shunt field coils are only in parallel with armature. This type of generator is known as short shunt compound generator.

Fig 3.17 Short Shunt Compound Generators

Long Shunt Compound Generators: When shunt coils are connected outside the series coil, the machine is said to have a long shunt compound generator.

Fig 3.18 Long Shunt Compound Generators

The compound wound generator in which there are both shunt and series field coils on each pole. One is in series and other is in parallel with the armature, thus compound generators are classified. Various types of D.C generators have been shown on the next page.



LOSSES IN A D.C. GENERATOR A generator is a machine which converts mechanical energy into electrical energy. When such conversion takes place, certain losses occurs inside the machine which are dissipated in the form of heat. Following losses takes place in the generator 1) 3)

Copper loss Mechanical loss.


Iron loss

Fig 3.19 Overall Classification

Copper Loss These losses occur due to current flowing in the various windings of D.C. machines. Armature copper loss (where Ra is resistance of armature Field copper loss in shunt winding Series winding

=I a 2R a watts & interpoles =I sh2R sh watts =I se 2R se watts

Iron Loss These are sometimes known as magnetic or core losses which include: 91


(a) Hysteresis loss It is due to reversal of magnetism of armature core. When magnetic material is taken through a cycle of magnetization, some energy is wasted in this process which gives rise to rise in temperature. This loss is named as hysteresis. b) Eddy Current Loss If a loop or block of material is linked by a changing flux 0, then an e.m.f. is induced in loop. If this block is conducting material, then e.m.f. will give rise to current circulating round the loop or block. Such current are known as eddy current and this current will give rise to a power loss known as eddy current loss.

Mechanical Loss

Fig 3.20 The Losses Classification

These losses comprise of: a) b)

Friction loss at bearings and commutator. Air fricti on or windage lo ss of rot ating armature.

These losses are 10 to 20% of total losses. The total losses in a d.c generator are summarized below: 92


ELECTRIC BELL When the switch is pressed energizing voltage is applied across the solenoid. The path is through switch to adjusting screw, spring contact, to one end of solenoid. The other end of solenoid is already connected to the supply. As the current flows the core gets magnetised and pulls the armature attached to spring contact and to which is also attached the striker. As the armature moves down the striker hits the gong. At the same time the spring contact also moves down, breaking the supply path. At this instant the coils are deenergised and the armature due to spring tension moves back. This makes contact with. Screw again. The current flows again repeating the whole process. This energizing de energizing process keeps repeating and the striker rings the bell.

Fig 3.21 The Electric Bell

It is a machine which converts electrical energy into mechanical energy.



BASIC PRINCIPLE It is based on the principle that current carrying conductor is placed in a magnetic field, it experiences a mechanical force whose directions is given by Flaming’s left hand rule. F= iLB Newtons

Fig 3.22 A cross sectional sketch of Motor

CONSTRUCTIONS The figure shows a magnetic field of uniform strength in which a conductor is placed which carries no current. The conductor and direction of field are in the same plane.

Fig 3.23 The Motor Principal

When conductor carries current and its direction of current is perpendicular to the field. In this case the field due to poles has been removed. So magnetic field is due to current in conductor. The resultant field is obtained by combining the main field and due to conductor’s current field. The 94


field due to current in conductor acts in conjunction with main field to left of conductors and opposes the main field to right of conductors. If current in a conductor is reversed than the crowding of lines will occur to right side of conductor.

Working In a D.C. motor, when terminals are connected to external d.c. supply the field magnets on excitation becomes N and S poles and magnetic field is develop. Also the armature conductors of motor carry currents. All conductors under south pole carry currents in one direction while under north pole current direction is some. The direction of motion of motor is determined by flaming’s left hand rule.

Fig 3.24 Fleming Left Hand Rule

Back E.M.F of Motor When d.c. motor’s armature rotate the conductors placed on it cut the magnetic flux. As a result, electromagnetic forces induced in them. The direction of induced e.m.f. is given by Flaming’s right hand rule. The induced e.m.f. acts in opposite direction to applied voltage. So this induced e.m.f. in motor is known as “Back E.M.F.” The back E.M.F. is: E b =V-I a R a Where

V is applied voltage 95


I a R a is voltage across armature E b is back e.m.f of motor.

Speed of Motor When machine is running its back e.m.f. ‘E b ’ is always less than applied voltage. So,

E b =V-I a R a or E b 



Where n is speed of motor Z/A is no. of parallel path P is no. of poles and is flux. Where ,

E b =V-I a R a

Put the value of E b Lin.Eq.(i) So,

Vb  I a R a 


( Vb  I a R a )60A ZP





K( Vb  I a R a )



KE b




where K 

60A ZP

So speed of motor is directly depends on back e.m.f and inversely depends on flux per pole.

Speed Regulation 96


The change in speed from no load to full load expressed as % speed at full load is known as speed regulation of motor. % speed regulation =

No load - Full Load x100 Full load speed 

N0  N x100 N

Where N 0 is speed on no load, and N is full load speed.


Shunt sound motor Series wound motor Compound motor

Motors are classified according to their field and armature connections. Armature can be in series or parallel.

Shunt Wound Motors In Shunt wound motors the field winding is connected in parallel with armature. So Eb depend on In which in turn depends upon load current. I sn 

V R sn

This type of motor is known as constant speed motor.



Fig 3.25 Shunt Wound Motors

Series Wound Motor In this type of motor field winding is connected in series with armature. In this I L=I sc +I a . In this case field winding is in series with voltage applied so it has got high speed that this motor works only on load but not without load.

Fig 3.26 Series Wound Motors

Compound Motors The compound wound motor has two types of windings. Flux in this is due to two windings. I sn 

V R sn

If motor is started without load Ia is low but Isn is high, So it will not attain dangerous at high speed. Na 

Eb 98


Fig 3.27 Compound Motors

Speed Control of Motors The speed of motor is given by a relation: N

V  Ia Ra


KE b

where K = constant of proportionality

The speed of motor can be controlled:a) b)

By varying the flux per pole. This method is known as flux control method. By varying the resistance in armature circuit. This method is known as resistance control method. The control of speed is also done by varying applied voltage.

APPLICATION OF MOTORS Shunt Wound Motors Where there is requirement of constant speed from no load to full load on the motor. Such cases are light machine tools, lathes, weaving machines etc.

Series Wound Motors It is a variable speed motor. The speed is low at high torque and vice-versa. So the motor can’t used where there is no load attached. Such as Traction 99


and for hoist work, cranes, elevators vacuum c l e an e r s, sew i ng m a c h i n es, ha i r d r i e r s , a i r compressors and fans etc. In all these cases the load is subjected to heavy fluctuations and speed automatically reduces at high torques.

LOSSES IN D.C. MOTORS In D.C. motors, losses are of two types:-

Constant Losses The losses which remain constant at all loads in a motor are known as constant losses. These include(i) (ii)

Iron Losses Mechanical Losses.

The iron losses depends upon flux density and speed both but mechanical losses depend upon speed only.

Variable Losses These losses vary with load in a motor. This type of losses are known as variable losses. It includesi) ii)

Copper loss in series winding Copper loss in armature winding

Either load increases or decreases the losses are also increase or decrease with load. So total loss = Constant losses + Variable losses

A transformer works on the principle of mutual induction. That is when a coil is placed in close proximity of another coil carrying alternating current, an emf is induced in it. If suitable medium (core) is provided between the two coils the flux



concentration is improved and maximum emf can be induced. A transformer consists basically of two coils wound over the same former or ‘bobbin’, using same core. One of these windings is called primary and the other is called primary and the other is called secondary. When an AC. is applied to the primary, an induced voltage appears in the secondary winding.

Fig 3.28 A Transformer

WINDINGS The primary and secondary coils are generally referred to as windings. In case of transformers used in the power supplies the thickness of primary and secondary wires differ. The secondary wire usually being thicker than primary. The windings are made of copper wires with enamel coating to provide insulation. Turns Ratio:- If the number if turns in the secondary are more than the primary turns, the induced voltage in secondary will also be more. Such transformer is called step up transformer. Conversely if primary turns are more than secondary the voltage in the secondary will be less than primary voltage. In this case it will be called a step-down transformer. The ratio of secondary turns to primary turns is called Turns Ratio. or T-ratio and is give as: 101


T = S/P = N/N where N = number of turns , S = secondary, P = Primary

Bobbin Former on which the primary and secondary windings are wound is made of insulating material. Strong enough to hold the pressure of winding. The primary is usually wound first and over the primary wire is wound the secondary. The number of turns are counted and two ends of each coil are taken out carefully and are secured for making external connections. Oil paper or butter paper is used to separate each layer of winding.

Core The core is m ade of soft iron alloy of high permeability. The quality of a transformer depends also upon the quality of the core material. A solid Iron piece if used as a core develops problem due to Eddy current effect. This results in heating of the core, to avoid this problem the core is made into thin iron sheets and are cut into ‘E’ and ‘I’ shapes. These sheets are then stacked together to give an appearance of a solid block. This method of making a core is called lamination. And such core is called laminated core.

Fig 3.29 The core sheets

The centra 1 arm of Es are positioned in the bottom of the bobbin before placing the Is on either side of each ‘E’ After assembling the core is applied with the varnish to make lamination vibration -free. 102


Improper assembly of core causes whinning noise when energised.

Fig 3.30 The Assembeled Core

Eddy Current Effect If solid one piece core is used in the transformer, the varying flux due to primary current induces emf not only in the secondary but also in the solid core. This induced current tends to flow through the interior of such core and is always opposite indirection to the main flux. Due to the interaction between the two fields energy is dissipated in the form of heat. As such the core not only gets heated up but also there is loss in the secondary voltage.

TYPES OF TRANSFORMERS Transformers are categorized on the basis of their use and purpose designed for. Following are the various headings under which they are classified: Voltage


Cooling method

Depending upon the voltage are designed to handle. A step up or step down transformer. Large power transformer for handling large currents used in public distribution system of electricity. Heavy duty large transformers use oil for the cooling system. 103



Type of core

Some smaller transformers use air cooling system. Transformers designed to work on currents whose frequency may be specified. Like audio frequency transformers, Radio frequency transformers and IF transformer etc. Shell type or core type

TRANSFORMER LOSSES Iron Loss This loss consists of Eddy current loss and hysteresis loss both in the from core. (a)


Eddy current loss is caused by circulating flux within the conducting core. Though they are m inimized by using lamination and insulating the sheet by applying varnish. Still certain amount of eddy current is induced in the laminations. Hysteresis Loss caused due to the power wasted in the magnetic core every time the field direction changes with the changing direction of the alternating current. This is minimized by use of special silicon steel material to make the core.

Copper Loss This loss is attributed to the resistance of wire used for winding primary and secondary and also the load resistance. The copper loss also varies as the load changes. At any instant the copper loss is the sum of the watts consumed by the resistive components of primary and secondary. It is minimized by keeping the resistance of the winding small. 104



Used in TU as EHT Transformer Used to boost a distribution cable to correct for voltage drop Used as furnace transformer Used as Auto-starter transformer

Advantages of a Transformer 1) 2) 3) 4)

It is a static machinery therefore no wear and tear of it Maintenance cost is very less because little attention is required As there are no rotating parts so high voltage can be transformed evenly The transformer is a matching device

An oscillation is an electronic device which can produce sinusoidal or non sinusoidal alternating current of constant magnitude and frequency from unlimited.

DAMPED OSCILLATIONS The best example of a damped oscillations is a simple pendulum. When given push from its position ‘a’, it may start moving to and from between point b & c. With time the distance covered gradually reduces. as shown in Fig. From d1 it falls to d2 the d3 and lastly after sometimes the pendulum stops at ‘a’. This to and fro movement of a pendulum is called a oscillation. If these oscillations are recorded on a graph the wave form appears like shown in figure 2.32. We can conclude that where external energy is applied the pendulum started moving and after 105


some time due to forces acting on it the oscillations reduced in size and lastly died off. Therefore damped oscillations are there which died off after some time.

Fig 3.31 Damped Oscillations b a





Fig 3.32 A cycle of damped Oscillation

UNDAMPED OSCILLATIONS Undamped oscillations are those which continue to oscillate for indefinite period of time. To achieve undamped oscillations, it is necessary to remove the cause of damped oscillation. Therefore for sustained oscillations, it is necessary to replenish sufficient amount of energy loss out of the energy supplied for the first time. Thus if right amount of energy is constantly supplied at the right time we can produce the oscillations of constant amplitude.



The process by which right amount of energy is supplied at right time is called ‘positive feed back’.

CONSTRUCTION OF AN OSCILLATOR Oscillators with a continuous output take energy from a dc. source and transform it into undamped oscillations or alterations. All electrical oscillators are therefore energy converters Best suited for this purpose is an amplifier. An amplifier with a positive feed back network work as an oscillator. Because of its ability of amplify transistors are used to form an oscillatory circuits. If a resonant circuit is placed in the collector circuit the energy developed across it would be more than energy at the base. Hence apart of energy from collector circuit can be taken through network and undamped oscillations. A transistor can function as an oscillatorary when all the losses in the collector circuit are overcome and circuit resistance is zero through feed back and it has sufficient amplification, fed to the base circuit to sustain undamped oscillations.

Essential Parts of an Oscillator Minimum basic requirements to construct an Oscillator therefore are: (1) (2) (3)

A resonant circuit (L & C combination) or the frequency determining circuit. D.C. energy source to overcome constant energy loss. An amplifier with a proper feed back network.

ACTION OF A TANK CIRCUIT Inductance coil and an capacitor connected in parallel are also called a Tank circuit. A tank circuit produces damped electrical oscillations like a pendulum as discussed earlier. The action of the 107


tank circuit can be well understood with the help of the diagram in Fig. When the tank circuit shown in fig (a) is connected to a dc. source the capacitor charger to the polarity is shown. Plate 2 negative means surplus of electrons and plate 1 positive means deficit of electrons. Therefore when switch S is closed electrons rush up from negative through L to positive of plate. As the current builds up a magnetic field sets up in the ‘L’. Back EMF C

+ -

Current due to C

Back EMF due to collapsing field C



Current due to C


Fig 3.33 A Tank Circuit

This field sets up back emi hence the inductance opposes the current. Therefore current is limited till it is balanced off. As the current stops the magnetic field collapses. The collapsing field again induce emf in coil which is in same direction now as the current due to capacitor. This now charges up the capacitor to slightly more than the plate 2. Therefore, now plate 1 become negative and plate 2 positive. The whole process starts again. However after few cycles of charging and discharging action of the capacitor the action stops completely. This is due to the fact that the wire used for inductance has a ohmic resistance which causes energy losses. The larger is the inductance the more is the time taken to discharges the capacitor. More time means low frequency.



TYPES OF OSCILLATORS Depending upon the frequency requirement and shape of the wave form different types of oscillators are used. Some of them are: 1) 2) 3)

Tuned circuit oscillator (L C.Oscillator) R C. Oscillators X’tal Oscillators

L.C. Oscillator L.C. Oscillator are good for generating high frequency oscillations. For low frequency generation L C. Oscillators are not suitable. For this purpose R C oscillators are used.



1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14.


What are the Faraday’s laws of Electomagnetic Induction? Diffrentiate between Self-inductance and Mutual Inductance. What is coupling? Diffrentiate between RMS and Average value of the current. What is Alternati ng current? How it is generated? Diffrentiate between RMS and Average value of the current. How electricity is produced using generator? Explain in brief. Discuss various types of generators. What are the various losses in the generating current? Explain the basic principle of Motor working. Also discuss the losses in Motors. What is the difference between series wound and shunt wound motors? What is transformer? Explain the various types of transformers. What is Eddy current loss. What are the other loses in the transformer? Explain the principle of an oscillator. The field winding of a D.C. electromagnet is wound with 960 turns and has resistance of 50. When the exciting voltage is 230V, the magnetic flux linking the coil is 0,005 Wb. Calculate the self-inductance of the coil and the energy stored in the magnetic field. Two identical coils X and Y of 100 turns each lie in the parallel planes that 80% of flux produced by one coil link with the other. If a current of 5A flowing in X produces a flux of 110



0.5 Wb in it, find the mutual inductance between X and Y. State True or False: a) The thumb shows the dir ection of movement of conductor in Fleming Right Hand Rule. b) Frequency is number of cycles passing thriugh a point in one second. c) UH frequencies are used for point to point communication. d) Eddy current loss is a part of Copper loss.




Chapter 4


Insulators, Conductors and Semiconductors The electrical conduction properties of different elements and compounds can be explained in terms of the electrons having energies in the valence and conduction bands. The electrons lying in the lower energy bands, which are normally filled, play no part in the conduction process.

INSULATORS Stated simply insulators are those materials in which valence electrons are bound very tightly to their parent atoms, thus requiring very large electric field to remove them from the attraction of their nuclei. In other words, insulators have no free charge carriers available with them under normal conditions. In terms of energy bands, it means that insulators (a) (b) (c) (d)

have a full valence band have an empty conduction band have a large energy gap (of several eV) between them and at ordinary temperatures, the probability of electrons from full valence band gaining sufficient energy so as to surmount energy gap and thus become available for conduction in the conduction band, is slight.

Fig 4.1 Energy Bands in Insulator


This is shown in above figure. For conduction to take place, electrons must be given sufficient energy to jump from the valence band to the conduction band. Increase in tem perature enables some electrons to go to the conduction band which fact accounts for the negative resistance temperature coefficient of insulators.

CONDUCTORS Conducting materials are those in which plenty of free electrons are available for electric conduction. In terms of energy bands, it means that electrical conductors are those which have overlapping valence and conduction bands as shown in following figure. In fact, there is no physical distinction between the two bands. Hence, the availability of a large number of conduction electrons. Another point worth noting is that in the absence of forbidden energy gap in good conductors , there is no structure to establish holes. The total current in such conductors is simply a flow of electrons.

Fig 4.2 Energy Bands in Conductors

SEMICONDUCTORS A semiconductor material is one whose electrical properties lie in between those of insulators and good conductors. Examples are : germanium and silicon. 115


In terms of energy bands, semiconductors can be defined as those materials which have almost an empty conduction band and almost filled valence band with a very narrow energy gap (of the order of 1 eV) separating the two.

Fig 4.3 Energy Bands in Semiconductors

At 0°K, there are no electrons in the conduction band and the valence band is completely filled. However, with increase in temperature, width of the forbidden energy band is decreased so that some of the electrons are liberated into the conduction band. In other words, conductivity of semiconductors i nc re ases wi t h t emper at ur e. M o re o ve r, s uc h departing electrons leave behind positive holes in the valence band. Hence, semiconductor current is the sum of electron and hole currents flowing in opposite direction.

Fig 4.4 Atomic Binding in Semiconductor 116


Semiconductors like germanium and silicon, have crystalline structure. Their atoms are arranged in an ordered array known as crystal lattice. Both these materials are tetravalent i.e, each has four valence electrons in its outermost shell. The neighbouring atoms form covalent bonds by sharing four electrons with each other so as to achieve inert gas structure (i.e., 8 electrons in the outermost orbit). A two dimensional view of the germanium crystal lattice is shown in above figure in which circles represent atom cores consisting of the nuclei and inner 28 electrons. Each pair of lines represents a covalent bond. The dots represent the valence electrons. It is seen that each atom has 8 electrons under its influence. A 3-dimensional view of germanium crystal lattice is shown in following figure where each atom is surrounded symmetrically by four other atoms forming a tetrahedral crystal. Each atom shares a valence electron with each of its four neighbours, thereby forming a stable structure.

Fig 4.5 3D View of germanium lattice

In the case of pure (i.e, intrinsic ) germanium, the covalent bonds have to be broken to provide electrons for conduction. There are many ways of rupturing the covalent bond and thereby setting the electron free. One way is to increase the crystal temperature above 0°K. 117


I t m a y be n o t ed t hat co val e nt c r y s t a l s a r e characterized by their hardness and brittleness. Their brittleness is due to the fact that in such crystals, adjacent atoms must remain in accurate alignment since the bond is strongly directional and formed along a line joining the atoms. The hardness is due to the great strength of the covalent bond itself.

Semiconductors can be classified as shown below:

Fig 4.6 Types of Semiconductors

INTRINSIC SEMICONDUCTORS An intrinsic semiconductors is one which is made of the semiconductor material in its extremely pure form. Common examples of such semiconductors are : pure germanium and silicon which have for bidden energy gaps of 0-72 eV and 1-1 eV respectively.

Fig 4.7 Energy gap in Extrinsic semiconductor

The energy gap is so small that even at ordinary room temperature, there are many electrons which 118


possess sufficient energy to jump across the small energy gap between the valence and the conduction bands. However, it is worth noting that for each electron liberated into the conduction band, a positively charged hole is created in the valence band as shown in above figure. When an electric field is ap pl i e d t o an i nt r i n si c sem i c o n d uc t o r a t a temperature greater than 0°K, conduction electrons move to the anode and the holes in the valence band move to the cathode. Hence, semiconductor current consists of movement of electrons and holes in opposite directions.

HOLE FORMATION IN SEMICONDUCTORS The formation of hole which is a positive charge carrier is explained below: As shown in figure, suppose the covalent bond is broken at A and the electron has moved through the crystal lattice leaving behind a hole is the covalent bond. An electron at B may jump into the vacant hole at A and later, an electron at C may jump into the hole at B and so on. In this way, by a succession of electron movements, a hole will appear at G and a negative charge would have moved from G to A. It would, however be more convenient to regard positive charge to have moved from A to G and this conception gives rise to a hole as a positive charge carrier as if it were an electron with a positive charge. It should be clearly understood that these holes are due to the movement of electrons in the valence band and that each electron movement corresponds to a collision. The drift velocity of holes is obviously, much less than the drift velocity of electrons.



Fig 4.8 Movement of electrons due to hole

Alternatively, an intrinsic semiconductor may be defined as one in which the number of conduction electrons is equal to the number of holes. Schematic energy band diagram of an intrinsic semiconductor at room temperature is shown in previous figure. Only two bands i.e., valence and conduction have been shown since lower filled bands are not of any consequence. Here, Fermi level lies exactly in the middle of the forbidden energy gap.

EXTRINSIC SEMICONDUCTORS Those intrinsic semiconductors to which some suitable impurity or doping agent or dopant has been added in extremely small amounts (about 1 part in 10) ar e cal led ex tr insi c of i mp uri ty semiconductors. The usual doping agents are : (i) (ii)

p e n t a v a l en t a t om s h a vi n g f i v e v a l e n c e electrons (arsenic, antimony, phosphorus) or trivalent atoms having three valence electrons (gallium, indium, aluminium, boron).

Pentavalent doping atom is known as donor atom because it donates or contributes one electron to the conduction band of pure germanium. The trivalent atom, on the other hand, is called acceptor 120


atom because it accepts one electron from the germanium atom. Depending on the type of doping material used, extrinsic semiconductors can be subdivided into two classes: (i) (ii)

N type semiconductors and P-type semiconductors.

(i) N-type Extrinsic Semiconductor. This type of semiconductor is obtained when a pentavalent material like antimony (Sb) is added to pure germanium crystal. As shown in following figure, each antimony atom forms covalent bonds with the surrounding four germanium atoms with the help of four of its five electrons. The fifth electron is superfluous and is loosely bound to the antimony atom. Hence, it can be easily excited from the valence band to the conduction band by the application of electric field or increase in thermal energy.

Fig. 4.9 Excess Electron in N-type Extrinsic Semiconductor

Thus, practically every antimony atom introduced into t he germ ani um lattice, co ntribut es one conduction electron into the germanium lattice without creating a positive hole. Antimony is called 121


donor impurity and makes the pure germanium an N-type (N for negative) extrinsic semiconductor.

Fig. 4.10 Energy band setup in Extrinsic Semiconductor

It may be noted that by giving away its one valence electron. The donor atom becomes a positively charged ion. But it cannot take part in conduction because it is firmly fixed or tied into the crystal lattice. It will be seen that apart from electrons and holes intrinsically available in germanium, the addition of antimony greatly increases the number of conduction electrons. Hence, concentration of electrons in the conduction band is increased and exceeds the concentration of holes in the valence band. Because of this, Fermi level shifts upwards towards the bottom of the conduction band as shown in above figure because number of charge carriers has become more in conduction band than in the valence band. In terms of energy levels, the fifth antimony electron has an energy level called donor level just below the conduction band. Usually the donor level is 0-01eV below conduction band for germanium and 0-054 eV for silicon. It is seen from the above description that in N type semiconductor, electrons are the majority carriers while holes constitute the minority carriers. Hence, N type semiconductor conducts principally by 122


electrons in the nearly empty conduction band and the process is called excess conduction. Another point worth noting is that even though N type semiconductor has excess of electrons still it is electrically neutral. It is so because by the addition of donor impurity, number of electrons available for conduction purposes becomes more than the number of holes available intrinsically. But the total charge of the semiconductor does not change because the donor impurity brings in as much negative charge (by way of electrons) as positive charge ( by way of protons in its nucleus).

(ii) P-type Extrinsic Semiconductor. This type of semiconductor is obtained when traces of a trivalent impurity like boron (B) are added to a pure germanium crystal. In this case, the three valence electrons of boron atom form covalent bonds with four surrounding germanium atoms but one bond is left incomplete and gives rise to a hole as shown in above figure.

Fig. 4.11 Hole in P-type Extrinsic Semiconductor

Thus, boron which is called an acceptor impurity causes as many positive holes in a germanium crystal as there are boron atoms thereby producing a Ptype (P for positive ) extrinsic semiconductor. 123


In this type of semiconductor, conduction is by means of holes in the valence band, Accordingly, holes form the majority carriers whereas electrons const it ute mi norit y ca r riers. The pro ce ss of conduction is called defect or deficit conduction.

Fig. 4.12 Energy band in P-type Extrinsic Semiconductor

Since concentration of holes in the valence band is more than the concentration of electrons in the conduction band. Fermi level shifts nearer to the valence band as shown in the following figure. The acceptor level lies immediately above the Fermi level. Conduction is by means of hole movement at the top of valence band, the acceptor level readily accepting electrons from the valence band. Again it may be noted that even though P type semiconductor has excess of holes for conduction purposes, on the whole it is electrically neutral for the same reasons as given above.

In a piece of pure germanium or silicon no free charge carriers are available at 0°K. However, as its temperature is raised to room temperature some of the covalent bonds are broken by heat energy and as a result, electron hole pairs are produced. These are called thermally generated charge carriers. They 124


are also known as intrinsically available charge carriers. Ordinarily, their number is quite small. An intrinsic or pure germanium can be converted into a P type semiconductor by the addition of an acceptor impurity which adds a large number of holes to it. Hence, a P type material contains following charge carriers:(a)


Large number of positive holes most of them being the added impurity holes with only a very small number of thermally generated ones. a very small number of thermally generated electrons( the companions of the thermally generated holes mentioned above).

Obviously, in a P-type material, the number of holes ( both added and thermally generated) is much more than that of electrons. Hence, in such a material holes constitute majority carriers and electrons form minority carriers as shown in following figure. Similarly, in an N-type material, the number of electrons ( both added and thermally generated) is much larger than the number of thermally generated holes. Hence, in such a material, electrons are majority carriers whereas holes are minority carriers as shown in following figure.

Fig. 4.13 Majority and Minority Carrier



MOBILE CHARGE CARRIERS AND IMMOBILE IONS P-type material is formed by the addition of acceptor impurity atoms like boron to the pure Ge or Si crystals. The number of holes added is equal to the number of boron atoms because each such atom contributes one hole. Now, when a hole moves away from its parent atom, the remaining atom becomes a negative ion. Unlike the mobile and free moving hole, this ion cannot take part in conduction because it is fixed in the crystal lattice. In following fig (A), these immobile ions are shown by circled minus signs whereas free and mobile holes are shown by encircle plus signs. Thermally generated electrons (which form minority carriers) are shown by uncircled minus signs.





Fig. 4.14 (A) and (B) Majority Carrier (C) and (D) with Minority Carrier

Similarly, addition of pentavalent atoms like antimony to pure Ge or Si crystal produces an Ntype material. The number of free and mobile electrons which are added equals the number of donor Sb atoms. Again, when an electron moves away from its parent atom, it leaves behind a positive ion. This ion, being fixed in crystal structure cannot take part in conduction. As shown in Fig (B), these immobile ions are represented by circled plus signs whereas free and mobile electrons are represented by uncircled minus signs. The thermally generated holes (which form minority carriers in this case) are shown by uncircled plus signs. In Fig (C) & (D) 126


minority carriers of both types have been neglected. Hence, the figure does not show the small number of free electrons in the P type material or the small number of holes in the N type material.

ELECTRON CONDUCTIVITY OF A METAL According to free electron model of an atom, the valence electrons are not attached to individual atoms but are free to move about in all directions among the atoms. These electrons are called conduction electrons and are said to form free electron cloud or free electron gas or the Fermi gas. For example, in copper there is one such free electron per atom, the other 28 electrons remaining bound to the copper nuclei to form positive ion cores.

Fig 4.15 Movement of free electron without voltage & with voltage

When no external field is applied to the metal, the free electrons move randomly in all directions as shown in following fig. However, when an external electric field is applied to the metal, the free electron motion becomes directed. This directed flow of electrons results in a net charge displacement in a definite direction. This type of motion is known as drift and the phenomenon is referred to as process of conduction by drift charge. The drift velocity (r) of the electrons is dependent upon the electron mobility (µ e) and the applied electric field E. The actual relation is v= µ eE.



The outermost electron shell of an atom is of interest in electronics, since it contains the loosely held valence electrons, which are easily dislodged to become electric current carriers. Germanium has four valence electrons in its outer shell; for our purposes, the atom may be pictured as containing only these electrons and four protons in the nucleus to keep it electrically neutral. When germanium is in crystalline form its atoms assume the structure illustrated in following fig. In this structure adjacent germanium atoms share their valence electrons in a strong bond so that effectively four orbital electron pairs are associated with each nucleus. These electron pairs are termed covalent bonds and they are bound so strongly to each other and to the nucleus that no free electrons are available to conduct a current through the germanium. A pure germanium crystal, therefore, is practically a non conductor of electricity. It is not completely non conducting, since ordinary heat energy occasionally disrupts some of the covalent bonds, thus liberating free electrons as charge carriers.

Fig 4.16 Germanium in crystalline form



If a small amount of an impurity is introduced into the germanium crystal, its current conducting characteristics change radically. Thus, when atoms that have five electrons in their outer shell, such as antimony or arsenic, are introduced into the germanium atom ( a procedure known as doping) the fifth electron of the impurity atom does not find a place in the symmetrical covalent bond structure and, hence, is free to roam around through the crystal.

Fig 4.17 Movement of free electrons after applying voltage

These free electrons are then available as electric current carriers. By placing an electric field across the doped germanium crystal, as shown in above fig, the excess free electrons donated by the impurity atoms will travel towards the positive terminal of the voltage source. Relatively few impurity or donor atoms within the germanium structure permit fairly substantial electron currents through the crystal when an electric field is applied. Germanium that has been doped by pentavalent donor atoms ( i.e. five electrons in the outer shell ) is known as N type germanium, because current conduction is carried on with negative charge carriers, or electrons. Consider now the situation when an impurity that has only three electrons in its outer shell such as gallium or indium, is introduced into the pure germanium crystal. As shown in following fig, the trivalent indium atoms take their place in the germanium structure but one of the covalent bonds 129


around each indium atom has an electron missing or a hole in its place. Although the hole indicates the absence of an electron, it behaves like a real, positively charged particle when an electric field is applied across the crystal. Under the influence of the electric field, electrons within the crystal will tend to move towards the positive terminal of the voltage source and jump into the available holes of the indium atoms near the positive terminal. Since there are no free electrons available, the deficient indium atoms near the positive terminal steal electrons from their neighbours to the left by disrupting their covalent bonds.

Fig 4.18 Movement of holes after applying voltage

This creates new holes in adjacent atoms to the left of those that have been filled. As electrons move to the right towards the positive terminal, the holes will move to the left towards the negative terminal, thus acting like mobile, positive particles. As the holes reach the negative terminal, electrons enter the crystal near the terminal and combine with the holes, thus cancelling them. At the same time the loosely held electrons that filled the holes near the positive terminal, are attracted away from their atoms into the positive terminal. This, of course, creates new holes near the positive terminal, which again drift towards the negative terminal. Current conduction may thus be considered to occur by means of holes inside the crystal, and by means of 130


electrons through the external connecting wires and battery. An impurity that has three electrons in its outer shell (trivalent) is known as an acceptor atom, because it takes electrons away from surrounding germanium atoms. Germanium that has been doped with trivalent acceptor atoms is called P type germanium to specify that current conduction is carried on by holes which are the equivalent of positive charges.

Conduction of electric current through P-or N-type germanium takes place equally well in either direction hence, reversing the polarity of the battery in the previous figs will not affect the amount of current flow, although it reverses its direction. Consider now what happens when P-type germanium is joined to N-type germanium and a voltage is applied across the junction as illustrated in following fig. In practice such an abrupt P-N junction may be obtained in two ways. In the grown junction a single crystal is obtained from a melt which at first contains impurities of either the P-or N type. In the middle of the growth process, impurities of the opposite kind are added to the melt, so that the remainder of the crystal abruptly grows into the opposite type. In contrast, a fused P-N junction is obtained by pressing small dots of indium (P-type) on a water of N type germanium. After a few minutes of heat treatment, the indium fuses to the surface of the germanium and produces P type germanium for a thin layer below the surface. A P-N junction is thus formed between this P region and the remainder of the N type germanium water. Both the grown and the fused P-N junctions are extensively used in 131


junction diodes and transistors, each having specific characteristics and limitations. Immediately on joining the P and N type crystals the electrons of N-type and holes of P-type rush towards the junction to recombine. At the same time the positive ions of arsenic of N-type and negative ions of Indium are also attracted towards each other. Therefore after few recombination of electrons and holes further action is stopped by these ions. These ions being larger in size repel the holes and electrons. Thus electrons and holes are held at the junction.

Depletion Layer The build up of arsenic positive ions and Indium negative ions at the region near the junction of PN crystal deplete with free electron of N-type and holes of P-type crystal. This region is called the depletion layer.

Barrier Potential The potential difference across the depletion layer in an un biased PN junction is called Barrier potential. At 25 C. The barrier potential approximately equals 0.7 volts for silicon and 0.3 volts for germanium.

Fig 4.19 Depletion Layer



Forward Bias With the P type germanium based positively, as illustrated in following fig, the (positive) holes are repelled by the battery voltage towards the junction between the P and N type material

Fig 4.20 Current flow across P-N junction with forward biased

Simultaneousl y, the el ectrons in the N type germanium are repelled by the negative battery voltage towards the P-N junction. Although there is normally a potential barrier at the P-N junction that prevents electrons and holes from moving across and combining, under the influence of the electric field of the battery the holes move to the right across junction and the electrons move to the left. In the region of the P-N junction therefore, electrons and holes meet and combine, thus ceasing to exist as mobile charge carriers. For each electron hole combination that takes place near the junction a covalent bond near the positive battery terminal breaks down, an electron is liberated and enters the positive terminal. This action creates a new hole which moves to the right towards the P-N junction. 133


At the opposite end, in the N region near the negative terminal, more electrons arrive from the negative battery terminal and enter the N region to replace the electrons lost by combination with holes near the junction. These electrons move towards the junction at the left, where they again combine with new holes arriving there. As a consequence, a relatively large current flows through the junction. The current through the external connecting wires and battery is carried by electrons, in the direction shown in above fig. The battery connection that permits current to flow across the P-N junction is known as forward bias. A minimum voltage of about 0-1 V is needed to overcome the potential barrier at the junction and permit any current to flow . The current then increases rapidly with increasing battery voltage and as little as 1 to 2 V permit currents of 20 to 100 mA.

Reversed Bias If the battery voltage is reversed in polarity, as illustrated in following fig, an entirely different situation prevails. The holes are now attracted to the negative battery terminal and move away from the P-N junction, while the electrons also move away from the junction because of the attraction of the positive terminal. Since there are effectively no hole and electron carriers in the vicinity of the junction, current flow stops almost completely. A small reverse current of a few microamperes still flows across the junction, however, as illustrated by the voltage current characteristic. This reverse current is due to thermally generated electron hole pairs within both the P and N type materials. As mentioned before, some covalent bonds always break



down because of the normal heat energy of the crystal molecules.

Fig 4.21 P-N Junction with reverse bias

Electrons liberated by this process in the P material move right across the junction under the influence of the electric field, while holes generated in the N material move to the left into the P material. Thus a s m a l l e l e c t r o n h o l e c o m bi n a t i o n c u r r e n t i s maintained by these so called minority carriers. If the reverse bias is made very high, the covalent bonds near the junction break down, as indicated in fig, and a large number of electron hole pairs will be liberated; the reverse current then increases abruptly to a relatively large value.




2. 3. 4. 5. 6. 7. 8. 9. 10. 11.

12. 13. 14.

Name two commonly used semiconductors. Differentiate between insulators, conductors and semiconductors u sing ener gy band diagrams. Why the conductivity of silicon is more than that of germanium. What is intrinsic semiconductor? How hole plays a role in the conducting the current? What are impurities? How they help in increasing the conductivity of semiconductor? Differentiate between P-type and N-type semiconductor. What are majority carriers in N-type semiconductors? Why concentration of free electrons and holes is same in semiconductor? What is barrier potential in PN junction? What causes majority carriers to flow when a P region is brought together with N region? Differentiate between Forward and Reverse biasing. What causes majority carriers to flow at a moment when P region and N region are brought together? Explain the formation of the depletion region in an open circuited PN junction. State what you understand by barrier potential across PN junction. State True or False: a) The electron in the outer most orbits is called valance electron. b) A pure germanium crystal is extrinsic semiconductor. 136


c) d) e) f) g)

Free electrons are minority carriers in the N-type semiconductor. Excess electrons can be added by adding a pentavalent impurity. The barrier potential offers resistance to majority carriers. Forward bias increases the potential barrier. In Forward bios, holes in P region are injected into N region.




Chapter 5


Diode & Diode Circuits A simple PN junction can function as an semiconductor diode. The P-type material is called anode and N-type cathode. A diode when under forward bias offers low resistance hence large current flows through it. To porte to the diode and limit the current a resistance ‘R’ is used in series with diode. The anode is given positive supply and cathode is connected to the negative supply. When polarity of the battery is reversed the anode is connected to negative and cathode to positive of the battery the diode offers a high resistance and very small leakage current flow through it which is negligible.

Fig 5.1 Diode Symbol

This property of the diode to conduct in only one direction makes it useful in many application. They are marked for current and voltage ratings. They are used as Detectors, Rectifiers and Limiters. Small signal diodes are with power rating less than 0.5 watts and Rectifiers diodes are more than 0.5W.

Avalanche Effect When reverse bias is increased across a PN diode a point is reached when the charge carries gain enough acceleration and new electron hole pairs are produced due to collision. The reverse current will then rise sha rply. Thi s phenom ena is c alled avalanche effect. The voltage at which it occurs is called Avalanche voltage. It is less than 6 volts.


Zener Effect Again if the reverse voltage across a PN diode is when raised to a critical value electron holes are generated from the inner shells of the atoms of junction region. This is because of the intense field established across the region due to reverse voltage. This results in a very high reverse current. This effect is called zener effect, and the voltage at which it occurs is called zener voltage. It is less than 4 volts.

BREAKDOWN VOLTAGE When the reverse voltage across the PN diode is raise d considerably the electro n holes again sufficient acceleration. The reverse current increases sharply. Further increase in the reverse voltage will increase the electron hole acceleration, they collide with the other atoms and new electron holes are generated. This results in dissipation of heat. As the temperature rises more electron hole are generated and the current increases further. This process continues and a very high temperature is reached and the diode is permanently damaged. The voltage at which this occur is called break down voltage.




Metal encased diodes can be identified by the diode symbol marked on the body. Glass encased diodes, the cathode and is indicated by a stripe or series of stripes or a dot. Conventional diodes can be checked by Ohm meter, It shows low forward resistance and very high reverse resistance. Test to be carried out in open circuit condition.



SPECIAL PURPOSE DIODE Zener Diodes Zener diodes are designed to work in the break down region through suitable doping. Hence they are operated under reverse bias condition. A zener diode has very high resistance at bias potential below the zener voltage. This resistance could be several mega ohms. At zener voltage the zener diode suddenly shows low resistance, say 5 to 100 ohm. In the forward bias it starts conducting at around 0.7 volts like an ordinary silicon diode. Zener diodes are available with breakdown voltages from 2 volts to 200 volts, and have power ratings from ¼ W to more than 50W. In the Zener region operation it behaves as a constant voltage source. The current is limited only by the series resistance.

Zener Diode

Fig 5.2 Zener Current Vs Voltage Curve



Varactor Diode Also called voltage capacitance, varicap, Epicap and tuning diode. It utilizes the diode capacitance. A small signal diode under Reverse bias, at low frequency has very high resistance. But at high frequencies the diode be haves like a capacitor. The P and N region act as plates of capacitor and the depletion layer as the di-electric. This capacitance is called transition capacitance (CT). As the reverse bias is raised, the depletionlayer gets wider and the Tr a n s i t i o n ca p aci t a n ce de cr e as e s . Thu s t he capacitance is therefore controlled by voltage. In a typical case, a varactor shows 10 pf at reverse voltage of 5 volts and 5 pf at 30 volts. Varactors are found in the values from 1 pf to 500 pf and voltage rating 10 to 100 volts. Used in AFC circuits.

Varistor Diode A varistor diode has a voltage dependent non-linear resistance which drops as the applied voltage is increased. Used in bias stabilisation circuits, in meter protection circuits.

Fig 5.3 Varistor Diode

Photo diodes This diode is also operated under reverse bias. When it is exposed to light of certain intensity a voltage appears across the load resistor. It is an open circuit in the dark. That means a very high resistance.



Fig. 5.4 Photo Diode

Light-Emitting Diodes(LEDs) In forward -biased diode, free electrons cross the junction and fall from into holes. As these electrons fall from higher to a lower level the energy is dissipated in the form of heat. But in LEDs since elements like gallium, arsenic and Phosphorous are used, the energy dissipated is seen in the form of light. There are LEDs which radiate Red, Green, Yellow, blue, orange, or Infra-Red (Invisible ) light.

Fig 5.5. LED

LED Voltage and Current LEDs have typical voltage drop from 1.5 V to 2.5 V and current between 10 mA and 50mA.


Fig 5.6 Circuit for LED 144


To find the current of the given LED circuit. If LED voltage drop is 2 volts, then current I

10V  2 V  118 . mA 680

Tunnel Diodes By increasing the doping level the breakdown is made to occur at 0 V, but the heavier doping distorts the forward curve.

Fig. 5.7 Tunnel Diode

The forward bias produced immediate conduction. The current reaches a maximum value Ip (Peak current), when the diode voltage equals Vp further increase in voltage Vv (Valley voltage). The region between the peak and valley points is called ‘negative resistance region’. The negative resistance of tunnel diode is useful for its use in the oscillator circuits.

Fig 5.8 Voltage/Current Curve showing valley in Forward bias 145


A PN -Junction diode, due to its property of unidirectional conductivity is useful as a rectification is the process of converting alternating current into direct current. As most of the electronic circuits required the energizing source therefore a rectifier circuit becomes an essential part of all the electronic circuits in use.

HALF WAVE RECTIFIER The arrangement shown in the figure is a half wave rectifier circuit. It consists of a transformer, usually a step down transformer, a diode ‘D’ and a resistor, which represent the load therefore called R L. Alternating current source is connected across the primary of transformer marked ‘P’ Anode of diode ‘D’ is connected to one end of the secondary whose other and is connected to the cathode through R L.

Fig 5.9 Diode as Half wave Rectifier

Since the diode conducts only one when its anode is positive with respect to cathode therefore when ever anode end of secondary ‘S’ is positive, the current passes through the diode, to cathode, through load resistor R L and is returned to the other end if secondary. The input alternating current full cycle 146


is shown in the diagram. As the current in secondary changes and the anode end becomes negative for the next half cycle of AC. The diode stops conducting. Hence the out put is obtained only for the positive half cycle, shown in the DC out put graph. The process continues, and the diode conducts only on positive half cycles of AC. Thus the output so obtained is positive peaks only. Since the output flows only in one direction for the half cycle, the rectifier is called half wave rectifier.

Peak Inverse Voltage Peak inverse voltage is that safe inverse voltage that can be applied to a diode during the non conducting half cycle. That is when cathode is driven positive with respect to anode. It is of significance because during half cycle of AC, the diode is reverse biased to the full secondary peak voltage. Hence a diode must approximately be rated for the value of reverse bias break-down voltage.

FULL WAVE RECTIFIER As the name goes, in this circuits two diodes are used and both the half cycles of an AC is rectified. In this type of arrangement a centre tapped transformer is used. Across each diode is the voltage between either end of secondary and the centre tap. Since the centre tap of the transformer is taken as common point. Therefore the cathodes of the two diodes are returned to centre tap through load resistor R L.



Fig 5.10 Diode as Full wava Rectifier

When D 1 and of the secondary is positive with respect to point C t of secondary the diodeconducts, and current flows from anode to cathode, through R L to C t . When D 2 end of secondary is positive during next half cycle with respect to C t , D 2 conducts, and current flows through anode to cathode through R L and C t . Hence during positive half cycle of AC input, as shown in the figure there is a output current across R L, and also during negative half cycle there is output current due to D 2 conduction. Thus both halves are rectified for one complete cycle of AC. It can be seen from the DC output diagram that the voltage developed across R L is not a steady dc. It still has AC component in the form of maximum to minimum variation of DC.

This type of rectifier circuit utilizes four diodes connected as shown in the diagram. The bridge rectifier also is a full wave rectifier. When secondary’s end connected to point ‘A’ is positive, D 1 anode becomes positive since point ‘B’ is negative at that moment, therefore D 1 conducts through R L through D 3 to point B of secondary. 148


Fig. 5.11 Bridge Rectifier

Similarly when point ‘B’ is positive and point ‘A’ is negative during next half cycle D 2 anode is driven positive with respect to cathode and it conducts through R L through D 4 to point ‘A’ of secondary shown by dotted line in the diagram. Thus at a time two diodes conduct, and the two diodes come in series.

Advantage 1) 2)

3) 4)

Since the two diodes are coming in series, the circuit current carrying capacity is increased. The peak inverse voltage that can be applied safel y is also i ncrease d as t he inv erse resistance of each diode adds up in series. Conversely diodes with lesser reverse resistance also can be used. A centre tapped transformer is not necessary for this circuit arrangement. If DC requirement is a high as peak voltage then use of a transformer can be eliminated. 149


The output of a diode rectifier is not suitable DC to be applied to various electronic devices. This is because the DC obtained contains AC component, and there is pulsation in amplitude of DC. These pulsations need to is removed to obtain a smooth DC. For this purpose filter network is used. To remove ripples from a rectified DC a smoothing action is obtained by filter network. This consists of capacitors, choke coil and resistor. When the first component is choke in a filter network, it is called choke input filter, and when the first element is a capacitor it is called capacitor input filter.

Ripple Frequency It is the number of positive peaks per cycle of AC present in the output of a diode rectifier. The ripple frequency of a half wave rectifier is same as the frequency of AC. This is because only one positive peak appear for one cycle of rectified AC. But in case of a full wave rectifier the ripple frequency is twice the frequency of AC. This is because for each cycle of AC the output of rectifier produces two positive peaks.

CHOKE-INPUT FILTER As the choke or coil has a property to oppose any change in the current, therefore the variations in the DC is blocked and the DC components is allowed to pass through the choke. Small peak variation which pass through choke Charge the capacitor C to its peak value, During the periods which the peak voltages tend to fall, the capacitor discharges and try to maintain the current. Thus the deep valleys between the two peaks is covered by the choke and capacitor action and the resultant filtered output is 150


smoo thed out to a large extent. For further improvement more addition filter circuit ripple if still present and is less than 1% of steady voltage is considered to be negligible. The choke coil ‘L’ passes the DC but opposes AC. pulsations of ripples, Some variation which get through choke are by passed to earth by capacitor C connected across load. A small ripple if still present and is less than 1% of steady voltage is considered to be negligible.

Unfiltered DC

Filtered DC

Fig. 5.12 Choke-Input Filter

In the absence of load the capacitor charges to the peak value of the ripple voltage. But as the load current is drawn the voltage drops slightly. The choke action does not allow the capacitor to charge to peak value therefore, it remains less than peak value. The out put voltage changes little with changes inload current hence it provides good voltage regulator. Resistance connected across the output is called bleeder resistor. It protects rectifier from heavy surge by keeping a minimum load across it. When switched off the capacitor charge discharge through it.

CAPACITOR INPUT FILTER This type of filter circuit has capacitor as its first component connected to rectifier output voltage. C Capacitor is first component connected to rectifier therefore the rectifier output voltage first charges 151


the capacitor to the peak value of the pulsation. The capa citor tends to ho ld the charg e bet w een successive pulses, through discharging slowly through the choke and load resistor. Therefore the output voltage slightly drops off between peaks as shown in the fig(b).

Fig 5.13 (a)

Fig 5.13 (b)

Capacitor Input Filter

(1) (2)

Output of FIlter

For the same input voltage the output of C input filter is higher than CK input filter. Voltage regulation is this case is poorer than choke input filter as the voltage drops with increase in load current.

The bleeder resistor in the output is tapped, and hence works as voltage divider.

VOLTAGE DOUBLER Basically the circuit comprises the output voltages of two halfwave rectifiers D1 & D2 connected in series. This arrangement can deliver a DC. Output voltage of twice the peak value of the applied AC input. It is full wave rectifier circuit because each diode passes current to load resistor R L on alternate half cycle of input. When point A of secondary is positive diode 1 conducts and charges C1 to the peak value of secondary voltage. During next half point B becomes positive and A is negative, D1 is not conductive the charge on C1 remains constant. This time D2 152


conducts and charges up C2 to the peak value of secondary voltage. Again when the direction changes the C2 voltage remains constant when D2 is non-conducting and small change leaks off through R2.

Fig 5.14 Voltage Doubler

Since the capacitors C1 & C2 are in series, the total voltage developed across each capacitor and resistor is the sum of the voltage across each capacitor resistor combination. And since the capacitors are charged to the peak value of secondary voltage therefore the voltage is twice the secondary peak voltage. This condition is achieved under no load condition. But when load. But when load current is drawn the voltage drops considerably therefore the capacitor value is selected to large value. (more than 10 F)

Voltage regulation means maintaining a constant voltage across out put of a power supply circuit inspite of variation in the load or input voltage. Semiconductor devices are used for this purpose.

Zener as regulator: Simple DC voltage stabilizer using zener diode is connected directly across board Impeding. 153




If input voltage increases, the total current increases and current through zener also increases, thereby maintaining the load current constant. Hence output voltage remains almost constant. If input DC is constant, but board impedance reduces. Therefore, board current will shoot up. The zener by this increase in current through it and current through load remains same. Thus the voltage across load also remains constant.

Advantages Zener is small, light weight, rugged and regulation over wide range of current.

Disadvantages 1) 2)

Power dissipation in series resistance (Rs) and diode itself is a loss. The stabilized voltage depends upon the zener voltage (Vz) which cannot be varied.

Fig 5.15 Zener as Voltage Regulator

Types of Regulator circuits There are mainly two type. 1) 2)

Series voltage regulators which are mostly used. Shunt voltage regulation need when load be battery constant. 154


1. 2. 3.

4. 5. 6.



Draw the circuit diagram of a half-wave rectifier. Explain its working. Draw the circuit of full-wave rectifier with capacitor input filter. Draw the circuit diagram of a full wave rectifier using a) Centre tap connection b) Bridge connection What is ripple frequency? Draw the circuit diagram of voltage regulator circuit using a zener diode. Explain its working. State True or False: a) A zener diode has a high forward voltage rating. b) The light emitting diode depends on the recombination of holes and electrons. In half-wave rectifier, the load current flows for only for the positive half-cycle of input signal. In a full-wave rectifier, the current in each of the diode flows for complete cycle of input signal.




Chapter 6


Junction Transistor Shockley invented the first transistor is 1951. Transistors are made up of two diodes, a base emitter diode and a base-collector diode, It is made by jointing three semiconductor crystals either PNP type or NPN type. For external connection three electrodes are attached to them. These electrodes are called Emitter, Base and Collector.

EMITTER Emitter is heavily doped. Its function is to emit or inject electrons in to the base region.

BASE It is lightly doped region and very thin. It passes most of the emitter injected electrons on to the collector.

COLLECTOR The doping level of this region is intermediate. That is between the heavy doping of the emitter and light doping of base region, It collects electrons from the Base. Collector has the largest area of the three regions.

Fig 6.1(a) PNP Transistor

Fig 6.2(b) NPN Transistor

The symbol used to represent a PNP and NPN transistor arrow points towards base for PNP and out wards for NPN.







Fig 6.2 Symbols used for PNP and NPN

AMPLIFYING ACTION OF A TRANSISTOR The transistor has ability to control current. Associated with this property a transistor also has the ability to amplify current, voltage and power. The transistor amplifying action is basically due to its capability of transferring its signal current from a low resistance circuit to high resistance circuit.

Fig 6.3 Amplifying using Transistor

Since the emitter base junction is forward biased, it offers very low impedance to the signal source (V S) If the input resistance typical varies from 20 to 100 and output junction (collector base junction) being reverse biased offers high resistance which may very between 100 to 1M. Then suppose input signal voltage (V S) is 20 mV. Using an average value of 10 for the input resistance (R in), we get the effective value of the emitter current (ie.) variation as:



IE 

20x10 3  0.5mA 40

Since ic is almost name as iE, the effective value of ic variation is: I C  I E  0.5mA

Now the output resistance (Rs) of the transistor is very high (say 500k), and the load resistance is comparatively low. (5k), the output side of the transistor acts like constant current source. Almost all the collector current (ic) passes through the load resistor R1. Therefore the output voltage Vc is: VO  I C R L

 (0.5x103 )(5x103 ) =2.5 V The ratio of the output (%) to the input voltage (Vs) is known as the voltage amplification or voltage gain (AV) of the amplifier. Therefore, AV 

VO 2.5   125 VS 20x103

There are three basic circuits as shown in Fig. with their bias voltage supplied by independent power sources:

COMMON BASE CONFIGURATION Common base configuration also called grounded base configuration because the common electrode is often connected to the chassis ground. It is shown in Fig. (a) for a P-N-P transistor and its corresponding 160


triode circuit is shown in Fig. In this arrangement, the input voltage is applied across the emitter-base circuit. Since base is grounded, it also serves as the return for the collector output circuit. So far as the a.c. signal input and output voltages are concerned, the two batteries may be considered as practically direct returns to the chassis ground. In this configuration. (i) (ii) (iii) (iv) (v) (vi)

current gain is less than unity voltage gain is high (about 2000) power gain is medium (20-30 dB). input resistance of the emitter circuit is very low (about 60 ~) the output resistance of the collector circuit is very high (about 100 K). input and output signal voltages are in phase.

Fig. 6.4 Triode Circuit for PNP

COMMON-EMITTER CONFIGURATION Comm on-emit ter configuration is also c alled grounded-emitter configuration because emitter which is common electrode is connected to chassis ground. As seen from Fig.(b), the input voltage is applied to the base while the emitter returns directly to chassis ground. The output voltage is taken from the collector with respect to chassis ground.



Fig. 6.5 Common Emitter configuration

(i) (ii) (iii) (iv) (v) (vi)

current gain is high voltage gain is high power gain is the highest input resistance is medium (600 ohm) output resistance is medium (20 K) there is 1800 phase reversal between input and output signal voltages.



Common-collector or grounded collector configuration is the reverse of the common-emitter configuration. It is shown in Fig.(c).

Fig. 6.6 Common collector configuration

In this configuration (i)

current gain is the highest (30-250) 162


(ii) (iii) (iv) (v) (vi)

voltage gain is less than unity i.e. output voltage is less than input voltage power gain is the lowest (10-20 dB). input resistance is high output resistance is low there is no phase reversal between the input and output signal voltages.

Most commonly-used is the CE circuit because it is the only circuit which has voltage and current gains higher than unity. Consequently, its power gain is the best. Moreover, it is the only configuration amongst the three considered above which provides phase inversion. The next most widely-used circuit configuration is the common-collector (or emitter follower) circuit particularly for impedance matching and circuit isolation purposes. Since this circuit can pass signal in either direction, it can also be used for two-way amplifier and switching circuits. The only important use of CB circuit is for matching a low-impedance circuit to a high-impedance circuit in an amplifier. Stability of IC with temperature changes is very good in this circuit.

A transistor is a current-operated device, hence, in the case of a transistor, the current is taken as an independent variable in the measurement and specification of transistor characteristics. Thus, emitter or collector current is varied and the resulting emitter or collector voltage is observed. In the case of vacuum tubes, on the other hand, electrode voltages are varied and the corresponding currents noted. 163


Transistor current vs. voltage characteristics are specified with respect to constant-current parameters whereas tube voltage vs. current characteristics are specified with respect to a constant-voltage parameter. For example, V p /I p characteristic is drawn for a constant value of grid voltage V g. But a similar set of transistor collectorcurrent vs. collector-voltage curves are plotted for a constant value of emitter current (for common-base configuration) or base current (for common emitter configuration). These are known as output or collector static characteristics. Fig. (a) shows V p /I p curves of a pentode for fixed values of V g. Fig. (b) shows V c /I c characteristics of a transistor for common-base circuit for selected constant values of emitter current (I E). Similarly, Fig. (c) shows the transistor V c/I c curves for common emitter transistor circuit for selected constant values of base current (I B ).




Fig 6.7 Various characterstic curves of a Transistor

Other characteristics which may be plotted for a common-base circuit are (i) (ii) (iii)

I E vs. V E for constant value of I C I C vs. V E for constant values of I E I E vs. V C for constant values of I C 164


The I C /V E characteristic is known as the feedback characteristic because it shows the influence to output (i.e. collector) current upon the input (emitter) voltage. Similarly, I E/V C characteristic is known as transfer characteristic since it shows the influence of input (emitter) current upon the output (collector) voltage.

CURRENT AMPLIFICATION FACTORS The Alpha Factor ( ) It is also known as the current amplification factor and is the property of the common-base circuit. dc

collector current I C  emitter current IE


change in collector current  change in emitter current 

In general,



VCBCons tan t

The Beta Factor It is the current gain factor (also known as ‘transport factor’) of a common emitter circuit. It is represented by Greek letter .

In general


collector current I C  base current IB


change in collector current I C  change in base current IB


VCE Constant



Relation between dc

as 



IB  I E  IC dc



IC I /I  C E IE  IC 1  IC / IE IC IE




COMMON-BASE CONFIGURATION In this configuration the input signal is fed between the Emitter(E) and Base(B). The output signal is developed between the collector and base. Since the V EB is quite low a series resistor Rs (1K) in E circuit is used. This helps in limiting current without this the IE may change by large amount to a small variation in VEE through R1.

Fig 6.8 CB configuration circuit



Input Characteristics of Common Base In common base input characteristics are plotted between I E and the Emitter Base(E B ) voltage V EB for different values of CB voltage V CB . For a given value of V CB the curve is just like the diode characteristics in FB region. Here the EB is the PN junction diode which is Forward-Biased, this junction becomes a better diode as V CB increases is there will be a greater I E for a given V EB. As V CB increases although the effect is very small.


Fig 6.9 Input Characterstic Curve for Common Base

From the slope of the input characteristics we can pet the dynamic input resistance of the transistor. ri 

v EB iE

VCB Constant

The dynamic input resistance ri is very low 20 to 100. Since the curve is not Linear the value ri varies with the point of measurement. As the Emitter base 167


voltage increases the curve bends to become more vertical. As a result r i decreases.

Output Characteristic Curves for CB Configuration The output characteristics curve show the way in which the I C varies with change in common base voltage V CB with I E constant. As per standard convention a current entering into a transistor is positive. For PNP, I C is flowing out of the transistor and is negative. Since collector junction is RB, the voltage V CB is negative. The is entering into the transistor and is taken as positive. In Fig. below are shown the common-base output (or collector) characteristics of a PNP transistor. The active, cutoff and saturation regions have also been indicated on the diagram itself. Extreme flatness of the characteristics indicates high output resistance whereas extreme uniformity of spacing between curves of constantcurrent input denotes linear relation between input and output currents.


Active Region It is that region in which the transistor is FR-biased i.e. emitter-base junction is forward-biased and the collector-base junction is reverse biased. In this region when I E = 0, I C = I CO When I E is setup, I C  I E  I CO . In the active region, current is practically independent of collector voltage and depends only on the emitter current. However, due to Early effect there is nearly 0.5% increase in I C with increase in V CB .



Fig 6.10 Output characterstic curve for Common Base


Saturation Region In this region, both emitter and collector junctions are forward-biased i.e. FF-biased. This region is also referred to as bottomed region because voltage falls near the bottom of the characteristic when V CB = 0 (though, in fact, it is slightly positive). Here, I C increases rapidly with even small increase in V CB .


Cut-off Region In this region, both the emitter and collector are reverse-biased i.e. RR-biased. It lies below and to the right of I B =0 curve. From output characteristics we can determine number of important transistor parameter

Dynamic Output Resistance (ro) The dynamic output resistance ro is defined as: VCB and iC are small changes in collector voltage and collector current around a given point on characteristics curve. Since output curves are very flat for given VCB, the ic is very small. It means output resistance is very high. 169


ro 

v CB iC

I E Constant

Dc alpha of transistor The DC alpha of transistor is given by



AC Current Gain AC current gain h fb or

iC iE

VCB  Constant

The only way to keep VCB constant, in above case, is to short circuit the lead R L . The value of hfb is in the range from 0.95 to 0.995. In CB configuration current gain ( h fb or ) is less than unity (0.98), dynamic input resistance r i is very low (20 ) and dynamic output resistance is very high (1M ). The leakage current I CBO is quite low ( 4 A for Ge and 0.02 A for Si) which is temperature dependant.

Early Effect As Vcc is made to increase the reverse bias, the space charge width between collector and base is increased which results in decreasing the effective base width. This dependence of base width on collector voltage is known as Early Effect (after name of its investigator J.M. Early). The decrease in W leads to the following two consequences (i)

there is less chance of hole-electron recombination within the base. Hence, and are slightly increased. 170



since charge gradient is increased within the base, the minority carrier current injected across the emitter junction is increased.

COMMON EMITTER CONFIGURATION In common Emitter, emitter is common to input and output. Signal is applied between b & c and the output is developed between c & e. B-E in E-B & CE in Reverse bias transistor works in active region. Such ER biasing is achieved by the following connection.

Fig 6.11 Common Emitter Configuration

The FB needs very small voltage (0.6V) V CC is connected between c &e. Then net potential of C with respect to the base is V CC -V BB , The collector base junction is RB by this potential. As V CC is very large V BB van be neglected and V CC alone may be considered between b& c under RB.

Input Characteristics of Common Emitter I B and V BE are the input variables. The output variables are ic and V CB . The change in output voltage V CB does not result in a large deviation of the effect of the curves. For commonly used DC voltage the effect of changing V CE on input characteristics 171


can be ignored. We can find the dynamic input resistance of the transistor at a given voltage V BE. It is given by

ri 

v BE iB

VCE Constant

Fig 6.12 Input Characterstic curve for CE configuration

Output characteristic Curves for CE Configuration The family of curves are shown in along with a load line corresponding to V CC = 10 V and R L =500 and can, as before, be divided into three regions active, saturation and cut-off regions. The slope of the curves indicates an output resistance which is less than in CB configuration. Less uniformity in spacing of constant-current curve indicates lesser linearity between input and output currents. They relates to output current ic to the voltage between C & E. VCE, for various values of input current IB. The quantities VCE, ic and IB are all 172


negative for PNP. For NPN we reverse terminal of battery VCC & VBE so VCE, ic and IE become positive.

Fig 6.13 Output Characterstic curve for CE configuration


Active Region In this region, emitter is forward biased and collector is reverse-biased. It is the area to the right of the ordinate V CE = 0.5 V and above 1.0. In this region, I C responds most sensitively to changes in I B i.e. the input current signal. For minimum distortion in output, the transistor operation should be restricted to this region.


Saturation Region

The region of the collector curve from V CB = -0.1 V to V CE = -0.5 V or so is called saturation region because incremental changes in IB (beyond 200 A) do not produce correspondingly large changes in I C that are found at lower values of I B . One point of comparison between CB saturation region and CE saturation region is worth mentioning. In CB configuration, transistor enters the saturation 173


region when the collector is slightly forward-biased. On the other hand, saturation is entered in CE configuration while collector is still reverse-biased.


Cut-off Region Cut-off condition of the transistor is reached when I C =I CO and I E=0, However, to cut-off the transistor, it is not enough to reduce I E to zero. It is found that emitter junction has to be reverse biased slightly (0.1 V for Ge and 0V for Si) to achieve this.

COMMON COLLECTOR CONFIGURATION In common collector configuration we make collector common to the input and output is taken at the emitter rather than at the collector hence R1 is connected between emitter and ground.

Fig 6.14 CC configuration

In Fig. the V BB forward biases the base emitter junction VCC has large voltage so that the collector junction is reverse biased. This circuit is also called emitter follower.

Current Relation in Common Collector Base current (I B) is input current, and emitter current is the output current. I E is dependant on I B . I B = f(I B ) 174



I E= I E +I C


IC =



Since collector is grounded eliminate I C . Then

I E = I B+ (1IE 


1 1


IE  (


) I E = I B + I CBO

1 1



IB  dc


1 1

I CBO dc




 1) I B  (


 1) I CBO

neglecting leakage current I CEO, We get

IE  (

dc  1) I B


IE ( IB


 1)


WHY COMMON EMITTER IS EXTENSIVELY USED? An amplifier is an electronic circuit that is capable of amplifying (increasing the level) signals.



Therefore whole of signal voltage (V S) must reach input of the first amplifying stage. A source works as a good voltage source only when the load res is tance i s much gr eater tha n the so u rce resistance, Thus the input resistance of first stage of amplifier acts as the load resistance to the source (V S). It should also important that when output of first stage is given to the next stage as input then it should not disturb the first stage input. For that it is necessary that the output resistance of first stage should be low and input resistance of second stage should be high. When such conditions are satisfied the first stage works as voltage source and the second as load resistance of source (or first stage) By output resistance of first stage it is meant its internal resistance, and it should be low compared to load resistance. (ie. 2nd input resistance). The second stage will deliver more power to load if its output resistance is lower than the input resistance of next stage which is load.

Fig 6.15 Basic CE amplifier circuit

We can therefore say that a good amplifier is one which has high input resistance and low output 176


resistance. This property is available in CE amplifier with input resistance of 1K and output resistance of 10K . at the same time its voltage gain is better than other configurations. That’s why CE is used extensively.

DC LOAD LINES A load line can be drawn on the collector curves to give more insight into how a transistor works and what region it operates in. The approach is similar to that used with a diode. In the circuit of Fig. the supply voltage V CC reverse-biases the collector diode through R C . The voltage across this resistor is V CC V CF. Therefore, the current through it equals IC 


This is the equation of the dc load line.

Fig 6.16 DC load line on collector characterstics

In an amplifier circuit, the operating conditions of the transistor are described by the values of its V CE and I C . These values fix up the operating point of the transistor. The operating point is decided not only by the characteristics of the transistor itself, but also by the number of other factors such as V CC , R C , 177


R B , V BE, and V BB . First the value of V CC and R C is fixed, in an amplifier circuit, to ensure that the operating point must lie on the dc load line. To decide, where the point lies on the dc load line, we require the value of IB, which can be found using the values of V BE, R B , and V BE as V BE = I B R B + V BE IB 


Once the base current value is known, there will be a collector characteristics curve. The exact operating point will lie at the intersection of this curve and the dc load line. This point is called quiescent operating point or simply Q point.

AMPLIFIER ANALYSIS USING DC LOAD LINE A transistor can amplify ac signals only after its de operating point is suitably fixed. We have seen in the last section how to fix the Q point on the output characteristics. The Q point should preferably lie in the middle portion of the active region of the characteristics. This helps the transistor to amplify ac signals faithfully, i.e. without distorting its waveshape. Under quiescent condition, the base current has a constant dc value. It is determined from the Q point. Now, we apply the ac signal to the input of the amplifier circuit. The base voltage varies as per the signal voltage VS. As a result, the base current will also vary. As the base current varies, the instantaneous operating point of the transistor moves along the dc load line. Thus, the instantaneous values of collector current and voltage also vary according to the input signal. The variation in 178


collector voltage is many times larger than the variation of the input signal. The collector-voltage variation reaches the output terminals through capacitor Cc 2 . The output is therefore many times larger than the input.

Fig 6.17 Amplifier analysis using load line

Operating Point Operating point can be any point on dc load line as discussed above. Now the selection of operating point should be done judiciously. Fig shows that on a dc load line, A, B or C could be operating point.

Fig 6.18 Various operating point on a load line 179


Point A is very near to the saturation region. Even the base current is varying sinusoidally, the output current is seen to be clipped at the positive peaks. This results in distortion of the signal. At the positive peaks, the base current varies, but collector current remains constant at saturation value. Thus, point A is not suitable for operating point.

Fig 6.19 Amplified output at A & B point on load line

In Fig (b) point B is very near to cutoff region. The output signal is again clipped at the negative peaks. Hence, this too is not a suitable operating point. It is clear from the Fig (c) that the output signal is not distorted if point C is chosen as the operating point. A good amplifier amplifies signals without 180


introducing distortion, as much as possible. Thus, point C is the most suitable operating point.

Fig 6.20 Amplified output at C Point on load line

TRANSISTOR BIASING When a forward bias is applied to the emitter diode and veb is greater than the barrier Potential, the conduction band electrons enter the base region. The thin and lightly doped base region gives almost all these electrons enough life time to diffuse into the collector. The collector base regions are under reverse bias condition. The depletion layer field then pushes a steady stream of electrons into the collector region. These electrons then leave the collector and enter collected band to the positive terminal of voltage source. In most transistors more than 95% of the emitter electrons flow to the collector, less than 5% fall into base holes and flow out the external base load. This constant base current (1b) and is called recombination current. This current is small because the base is lightly doped with only few available holes. 181


For transistor operation the base emitter diode is always under forward bias and base collector is always under reverse bias condition. This method provides a control over the collector current through base emitter voltage.

Different Methods of Transistor Biasing Some of the methods used for biasing a transistor are as under : (i) (ii) (iii) (iv) (v)

fixed bias emitter bias collector-to-base bias voltage divider bias with emitter bias and bias compensation.

Combinations of these methods are also used frequently.

Fixed Bias The fixed bias circuit is shown in Fig. (a) Here, single power source V CC drives both the collector and the base. In this circuit, I B remains constant.

Fig 6.21 (a) Fixed Base Circuit

(B) Emitter Bias Circuit

Emitter bias The circuit is shown in Fig. (b) The base has been returned to ground through resistance R B of 182


moderate size and emitter resistance R E introduced with its own power supply.

Collector-to-Base Bias It is a type of self-bias arrangement sometimes simply called collector bias or collector feedback bias. This circuit differs from the fixed-bias circuit of Fig. in that the resistance R 3 is connected to collector (whose voltage is not fixed) instead of to the positive terminal of V CC . This ensures automatic reduction in I B with increase in temperature.

Fig 6.22 Collectoe to base bias circuit

In this arrangement, if I C tends to increase due to increasing temperature, it causes (i) (ii)

greater voltage drop over R L a decrease in potential of point C


decrease in forward bias of the transistor junction and consequently a decrease in I E and I C .


Hence, any tendency on the part of I C to change is automatically neutralised by counter reactions produced in the circuit. Since changes in voltage at point C are reflected (fed back) to base terminal for counterbalancing the 183


changes in I C , this circuit is sometimes referred to as negative feedback circuit.

Voltage Divider with Emitter bias In this arrangement, base bias is provided with both emitter and collector feedback control which results in improved sensitivity. Resistance R 1 and R 3 constitute the voltage divider over which V CC is dropped. In fact, it is a combination of (i) (ii)

fixed bias provided by V CC , R 1 and R 2 and emitter bias provided by RE. The circuit shown in Fig. can be solved.

Fig 6.23 Voltage Emitter with emitter bias




2. 3. 4. 5. 6. 7.


9. 10.


Draw a diagram showing the NPN junction transistor. Label the emitter, b ase and collectors regions. Also label the emitter base and collectors base junctions. Draw a similar diagram for PNP junction transistor. Why an ordinary junction transistor is called bipolar. Explain the function of emitter in the operation of junction transistor. What are input and output terminals in CE configuration? Drive the relationship between a and ß of a transistor. Sketch the typical CE output characteristic curve for an NPN transistor and label all variables. Explain the active region and saturation region in output characteristic curve of CB and CE configuration. Why CE configuration is widely used in amplifier circuits? How can you calculate the voltage gain of CE amplifier by plotting DC load line on output characteristic of transistor? State True or False : a) In a PNP transistor with normal bias, only holes cross the collector junction? b) For transistor action, the base region must be narrow. c) In a PNP transistor, electrons flow into transistor at the collector and base leads. d) The current I CBO flows in the collector and base leads. 185




13. 14.

The arrowhead on the transistor symbol always points in the direction of electron flow in the emitter region. f) Compared to CB amplifier, CE amplifier has lower current amplification. g) The input and output signals of a common-emitter amplifier are in the same place. In a transistor circuit, IE = 5mA, Ic = 4.95mA, and ICEO = 200 UA. Calculate ß dc and leakage current I CBO. What do you understand by “Biasing”? Why a transistor should be biased. Discuss any two methods of transistor biasing.


Chapter 7


Transistor Amplifier When only one transistor with associated circuitry is used for amplifying a weak signal, the circuit is known as single stage transistor amplifier. By stage we mean that a single transistor with its bias and auxiliary equipments. A voltage divider biasing method is used, which is employed in almost all amplifier biasing. Fig (a) shows a single stage amplifier.

Fig. 7.1 Single state Transistor amplifier circuit

Fig. shows a practical circuit for single stage transistor amplifier in common use. C C is the coupler capacitors that pass a-c signal from one side to the other. It is also called a blocking capacitor. Since it blocks the DC voltage. Capacitor C E is by pass capacitor, it bypasses all the AC from the emitter to ground. In the absence of C E the a.c. voltage developed across R E will affect input a-c voltage. It will work like a feed back. C E is selected such as to provide by pass of lowest input frequency signal. It will offer low impedance as compared to R E at lowest frequency present in the signal which is approx.1/ 10 of R E.



X CE 

RE 10

The resistance R E represent the input resistance of the next stage R 1 , R 2 decide the base DC voltage. This voltage R E fix the emitter current. The collector is almost same as emitter current. The resister RC thus decides the also of V CE.

Fig 7.2 Practical circuit for single stage Transistor amplifier

D.C. Equivalent Circuit

Fig 7.3 D.C.Equivalent Circuit

In the d.c equivalent circuit of a transistor amplifier, only d.c. conditions are to be considered i.e. it is 189


presumed that no signal is applied. As direct current cannot flow through a capacitor, therefore, all the capacitors look like open circuit in the d.c. equivalent circuit.

A.C. Equivalent Circuit In the a.c equivalent circuit of a transistor amplifier, only a.c. conditions are to be considered. Obviously, the d.c. voltage is not important in such a circuit and may be considered zero. The capacitors are generally used to couple or bypass the a.c. signal.

Fig 7.4 A.C.Equivalent Circuit

AMPLIFIER EQUIVALENT CIRCUIT An amplifier can be replaced by an equivalent circuit for the the purpose of analysis. Fig (a) shows the amplifier circuit where as fig. (b) shows the equivalent circuit. V1 Input signal voltage to the amplifier I1 Input signal current R in Input resistance of the amplifier A0 voltage gain of the amplifier when no load is connected I2 Output current V2 Output voltage across load RL R out Output resistance of the amplifier RL load resistance 190


AV Voltage gain when load RL is connected

Fig 7.5 Amplifier Equivalent Circuit)

Important Quantity of Amplifier Current Gain (Ai) A i (Current gain) =

Output current I 2  Input current I1

Voltage Gain (Av) A v (Voltage gain) =

Output voltage V2  Input voltage V1

Input Impedance (Zi) Z i (Input Impedence) =

Input voltage V1  Input current I1

Output Impedance (Z0) Z 0 (Output Impedence) =

Output voltage V2  Output current I 2

When more than one stage of amplifiers are used then the output of first stage makes input of second stage and output of second stage take input of third stage and so on. The final output (V o) is then available at the output terminals of the last stage. 191


Fig 7.6 Schematic diagram of Multistage Amplifier

The output of first stage is: V 1 =A 1 V 0 where A 1 is voltage gain. Output of second stage is : V 2= A 2V 1 and the final output therefore is : V n=A nV n-1 where A n is voltage gain of last stage. If we look up all the amplifiers as a single one; Then, A

Vn V1 V2 V V  x x........ n 1 x n V0 V0 V1 Vn  2 Vn 1

A  A 1xA 2 x............ A n 1xA n

DECIBEL GAIN (DB) The gain of an amplifier is also expressed in dB. It was found to compare two powers on a logarithmic scale in more convenient rather than on a linear scale. The logarithmic unit is named Bel. The number of Bel by which a power P out exceeds power P in is defined as Power gain = No. of dB Pout = 10 x no. of bel =  10 log10 P in 192


The unit dB denotes power ration. In communication applications 6 mw or 1 mw is taken as a standard reference level. When reference taken is 1 mw then db is referred to and dBm. A negative value of no. of dB means that the power P out is less than the reference power P in. In amplifiers P in may represent input power and P out the output power. If V in and V out are input and output voltage thenP in=V in/R in and P out =V out /R out when R in & R out are input and output Impedance. (1) For dB the equation is: No. of dB

 10 log10

Vout / R out Vin / R in

(2) If input and output impedances are equal, then: No. of dB

 10 log10

Vout V 10 log10 out x Vin Vin

Vout Vout = 10 x 2 log10 V = 20 log10 V in in

e.g.. If voltage gain of an amplifier is 10. It can be shown in dB as: Vout Gain in dB = 20 log10 V = 20x log10 10 = 20 x 1 = in

20 dB.

Advantages of using dB (1)

Gain can be added directly for multistage amplifiers. 193




Small as well as very large linear quantities can be shown conveniently in small figures. e.g. (1) gain of 0.000001 loss may be represented as a voltage gain -120 dB or voltage log of 120 dB. (2) Power gain of 456000 is 56.99 dB. If circuits used ultimately produce sound, then the sound intensities are measured on logarithmic scale rather than linear scale. If audio power increases from 4W to 64W the hearing level does not increase by a factor of 64/4 =16. It may increase by a factor of only 3 since (4) = 64. Thus the use of dB is justified on psychological basis too.

COUPLING OF TWO STAGES There are various methods used in transferring energy from one stage to the other, called ‘Coupling’. (1) (2) (3)

Resistance capacitance coupling Transformer coupling Direct coupling

Resistance Capacitance Coupling This is most widely used method. The signal developed across RC of 1st stage through CC. The coupling capacitor blocks DC of 1st stage so it does not effect the biasing of 2nd stage. Therefore also called blocking capacitor.

Disadvantage In this coupling there is always voltage drop across the coupling capacitors. This loss increases as the frequency of applied signal is lowered. It has best results above 10 Hz frequency signals.



Uses It is extensively used in small signal audio amplifiers. tape recorder, PA system radio, T.V receivers etc. It has low cost and easy to build.

Fig 7.7 Resistance Capacitance Circuit Coupling

Transformer Coupling When transformers are used to couple two stages there is no coupling capacitor used. The DC isolation between the two stages provided by the same confer itself.

Fig 7.8 Transformer Coupling Circuit



Advantage The main advantage that there is no voltage loss collector as there is no resistor use. The winding DC resistance is very low. This becomes of much importance when amplifier is used a power amplifier.

Disadvantage (1) (2) (3) (4)

Size of system becomes bigger and heavier. Cost is relatively more. Due to various transformer losses all the frequencies do not got equal amplification. It may provide better response to some frequency and discriminate other. Therefore not suitable for low frequency signals.

Uses (1) (2)


They are widely used in RF amplifier 20 KHz and above. By shunting with suitable capacitors we can get resonance at desired frequencies, such circuit are called tuned voltage amplifiers. By selecting suitable turns ratio we can match any load with the output impedance of the amplifier, which results in maximum transfer of energy from amplifier to load.

Direct Coupling In this type of coupling the output of one stage of amplifier is connected to the input of the next stage by means of a “simple connecting wire”. This is useful for the signal frequencies below 10 Hz. The DC voltage at the collector of 1st stage reaches the base of the second stage. Hence it should be taken into account while designing the biasing circuit of second stage.



Fig 7.9 Direct Coupling Circuit

Disadvantage This has a serious drawback. A transistor and VBE vary to temperature resulting in shift in collector current which has no relation with input voltage. This shift or change is called ‘drift’ signal.

DISTORTION IN AMPLIFIERS If the wave shape of the output of an amplifier is not an exact replica of the wave shape of the input we call it a distortion. Opposite of distortion is ‘Fidelity’. Fidelity in the quantity of an amplifier to reproduce the input signal variations faithfully in the output therefore high fidelity amplifiers are called Hi-Fi amplifiers. Distortion is caused due to various reasons and hence there are different types of distortions namely:-

Frequency Distribution If all the frequency components of the signal are not amplified equally well by the amplifier it is said to have frequency distortion. This may be caused due to associated reactive components used with circuit like capacitor transformer etc.



Phase distortion This distribution is not important in audio amplifier. Since the time of signal is shifted. This is caused again by reactive components used in the circuit. However it has serious problems in video amplifier.

Harmonic Distortion This distortion is caused due to new frequency components which are not available in the original signal. This is caused due to the multiple of a frequency, e.g.. 400Hz, 800Hz, 1200Hz, 1600Hz.

A voltage amplifiers is one which gives largest possible voltage gain. Where as the power amplifier is meant to boost the power level of input signal. It needs larger voltage input signal. To develop large voltage the circuit is designed to develop voltage across the resistor. This reduces the applied voltage when signal is applied. Hence de used is less than DC supplied. In power amplifier this difference is reduced to achieve maximum power Usually power amplifiers are operated under class ‘C’ operation.

Fig 7.10 Schematic diagram for Power Amplifier

PUSH-PULL AMPLIFIER This amplifier can work as class A, AB or B of special circuit connections. It has low distortion. This circuit



is used as audio amplifier in radio T.V., Tape recorders, RA system etc. The circuit arrangements is shown in the figure under matched conditions maximum power is delivered to the load by the amplifier. Resistor R1 R2 and RE form the biasing network. When AC input is given, if induced voltage is 20 V across AB. Point ‘C’ is CT for AC it is at 0 and with respect to C each half has 10V. But their polarity are opposite ie. if point A is positive at that instant point B is negative and since the base of two transistors are connected to either end the signal appearing at the two transistors are of opposite polarity are in opposite phase. As for DC, the standing current flows in the opposite direct through the transformer and cancel out of the flux if matched properly. For AC input also the current flow in the two halves of the currents get added up, and therefore the output wave form is the sum of the two input wave forms.

Fig 7.11 Circuit for Push-Pull Amplifier



COMPLEMENTARY SYMMETRY PIP CIRCUIT This circuit uses a pair of transistors having complimentary symmetry, that is one transistor is PNP and the other is NPN. This circuit needs two power supply. R act as voltage divider across V CC to forward bias the base emitter junction of T 1 . Similarly R is voltage divider across V CC to forward bias the base emitter junction of T 2 . The transistors are operated in class ‘B’ the operating point at cut off point. Therefore under no signal there is zero collector current.

Fig 7.12 PIP Circuit

When AC input is applied the two transistor conduct during half cycle of signal as they are PNP & NPN and their biasing is opposite. For positive half the NPN conducts and for negative half the PNP conducts as the base emitter are forward biased. Since the output current flow through the load during half cycles alternatively through the two transistors centre tapped transformer is necessary. The two transistor characteristics if not matched correctly will result is distortion. This type of circuit is replacing the push pull amplifiers using transformers. 200


1. 2. 3. 4. 5. 6. 7. 8.

Draw a circuit diagram of a single stage transistor amplifier. Draw an AC equivalent circuit os a common emitter transistor amplifier. Why do you need more than one stage of amplifier in practical circuits? Define the decibel for expressing (a) voltage (b) current and power. What are the various coupling schemes of two stages of amplifiers? State the advantage and disadvantages of transformer coupling scheme. Why a power amplifier is also known as largesignal amplifier. Differentiate between voltage amplifier and power amplifier.




Chapter 8


Field Effect Transistor (FET) Field-Effect transistor is a semiconductor device in which current is controlled by an electric field as is done in vacuum tubes. Broadly speaking there are two types of FETs: i) ii)

junction field-effect transistor (JFET) metal-oxide semiconductor FET (MOSFET)

As shown in fig, it can be fabricated by two methods, either N-type semiconductor bar is sandwiched between heavily doped P-type regions or P-type semi conductor bar is sandwiched between heavily doped n-type regions, thus forming N-channel FET or P-channel FET respectively. The ohmic contacts are made on either ends and when source is connected across them a current flows through them. The current in FET is carried by majority carrier. The majority carriers in P-channel FET are holes and in N-channel FET are electrons. On either end of channel are source and Drain terminal. They can be interchanged. Source

It is the terminal through which the majority carriers enter the bar (Channel). Its current is denoted by I S.

FIELD EFFECT TRANSISTOR Fig 8.1 N-channel & P-channel JFET


It is the terminal through which the majority carriers enter the bar (Channel). Its current is denoted by I S. Drain The terminal through which the majority carriers leave the bar. The drain current is denoted by I D. The Gate The heavily doped regions on either side are connected through terminal called gate. A voltage is applied between gate and source V GS. In n-channel FET gate voltage is negative with respect to source. Gate current is denoted by I G. The schematic symbols for N-channel and P-channel are shown in Fig. It must be noted that gate arrow always points to N-type material.

Fig 8.2 (a) N-channel

Fig 8.2 (b) P-channel

OPERATION OF JFET In FET the gate junction is reverse biased. Further the P-region is heavily doped. Hence the depletion region penetrates into the n-type bar there by reducing the effective conducting cross action area of the channel. This decreases the channel conductivity area and hence reduces the current from source to drain. As V GG is increased the reverse bias at the gate junction increases, thickness of depletion region increases the effective area of channel reduces. Thus by varying 205


the reverse bias across the gate junction drain current I D can be controlled.

Fig 8.3 Circuit for JFET

It is called FET because, the current control is effected by the extension of the field associated with the depletion region is caused by the increasing reverse bias.

Pinch-Off Voltage As the V DS (drain source) is progressively increased a value of V DS is reached at which the channel is pinched off ie more or less blocked. With further increase of V DS the current Id begins to level off and approach a constant value. The value of V DS at which the channel is pinched off is call pinch off voltage.


When V GS is zero, V DS is zero the drain current Id is zero. With increase is V DS, Id increases linearly with V DS. With increase in I D ohmic voltage drop across source and drain reverse bias the gate junction. This voltage results in decrease in the conduction, as the value of V DS is increase the conduction decrease till a value is reached when the channel is pinched off. The channel 206


3. 4.


does not get closed completely and hence I D doesn’t become zero. For larger value of negative gate voltage V GS reverse bias is greater. Each curve has small ohmic region for small value of V DS in which region Id is proportional to V DS. For V GS =+0.5, this value is in the direction of FB, the gate current (I G) remains extremely low because with this low value of gate voltage the silicon junction is still at less than the cut in voltage (V 1 ).

Fig 8.4 Characterstic curve for FET



With continued increase of V DS avalanche break down occurs at progressively lower values of V DS as the gate reverse bias magnitude is increased. This is because the reverse bias gate voltage adds to the drain voltage. There by the effective voltage across gate is increased. The maximum value of V DS that can be applied across FET is thus the lowest voltage which causes avalanche break down.



Metal Oxide Semiconductor field effect transistor is widely used in many circuit applications. The input impedance of a MOSFET is much more than that of a JFET because of very small gate leakage current. It can be further subdivided as follows:

Depletion-enhancement MOSFET or DE MOSFET With negative gate voltage, it acts as depletion MOSFET. In this mode, I D flows with zero gate bias voltage. Hence, DE MOSFET operates in a manner similar to a JFET. Since DE MOSFET conducts when V GS =0, it is also known as normally-on MOSFET. With positive gate, it operates in enhancement mode but no drain current flows with zero gate-bias voltage. Hence, it operates in a manner similar to a junction transistor. Since MOSFET can operate in both depletion and e nh a n cem en t m o de s, i t i s ca l l e d d e p l e t i o nenhancement MOSFET.

Enhancement-only MOSFET It works with large positive gate voltages only. it is called normally-off MOSFET.

CONSTRUCTION On grounding substrate and applying a negative voltage at the gate an electric field is created. This is induced in SiO 2 layer, the top have positive induced voltage the lower side negative. This negative again induced positive charges in the N-type substrate in the form of minority carrier in the region immediately below the SiO 2 layer. This positive charge increases with increase of gate negative 208


voltage. Thus the conductivity of this region increases and current flows from S to D. In this way the drain current I D has been enhanced by applying negative gate voltage.

Fig 8.5 JFET construction

WORKING Enhancement-type N-channel MOSFET The circuit connections are shown in Fig.(b). In this device, no drain current flows from source to drain with zero gate bias. When positive voltage is applied to the gate, the input gate capacitor is able to create free electrons in the channel which then conduct drain current. As seen from the enlarged view of the gate capacitor in Fig.(c), free electrons are induced in the channel by capacitor action. These electrons are added to those already existing there. This increased number of electrons increases or enhances the conductivity of the channel. In fact, positive gate produces an N-region in the area lying between the substrate and gate-insulating film. This Nregion, in turn, establishes an N-N-N channel from source to drain for current flow. As positive gate voltage is increased, cross-sectional area of the Nregion is increased, conductivity of the source-todrain channel is increased and, so, increasing amount of current flow between the two terminals. That is why, positive gate operation of MOSFET is known as enhancement-mode operation. 209


Depletion-type N-channel MOSFET Formed by diffusing n-channel between n+ type source and drain in n-channel Moseft. In this Mosfet unlike enhancement type, an appreciable drain current I DSS flows for V GS=0 on making the gate voltage negative, positive charge gets induced in the n-type channel through SiO 2 layer of gate capacitor. But in n-channel FET the current is due to majority carrier electrons. Hence there induced positive charge make the n-channel less conductive. The drain current therefore reduces as V GS is made more and more negative. This nondistribution of charges in the channel result in depletion of majority carriers. Hence named depletion Mosfet. When V GS=0, electrons can flow freely from source to drain through the conducting channel. When gate is given negative voltage, it depletes the N-channel of its electrons by inducing positive charge in it as shown in Fig.(d). Greater the negative voltage on the gate, greater is the reduction in the number of electrons in the channel and consequently lesser its conductivity. In fact, too much negative gate voltage can pinch-off the channel. Hence, with negative gate voltage, MOSFET behaves like a JFET. The volt ampere characteristics of the depletion Mosfet are similar to these of JEFT. For obvious reasons, negative-gate operation of a MOSFET is called its depletion-mode operation. Th e d e p l e t i o n M O S F E T c a n b e o p e r a t e d i n enhancement mode by applying a positive gate voltage. This results in induced negative charge in n-type channel. Thus the conductivity of the channel gets increased and Id rises above I DSS. Since gate current in both modes is negligibly small, input resistance of a MOSFET is incredibly high varying from 10 10 to 10 14 . 210


SYMBOLS FOR MOSFET Schematic symbol of a normally-on MOSFET is shown in Fig. The gate looks like a metal plate. The arrow is on the substrate and towards the N-channel. When SS is connected to an external load, we have a 4-terminal device but when it is internally shorted to S, we get 3-terminal device as shown in Fig.

Fig 8.6 MOSFET Symbols

Threshold Voltage in Enhancement Mosfet: This voltage is usually indicated by the manufacturers on the data sheet, along with current I D. On which indicates approx. the maximum drain current on characteristics for a certain value of V GS. For P-channel Mosfet the gate-source threshold voltage (Vr) is about 4 volts and drain voltage 12V. This is much higher to other IC voltage of 5V. Therefore a Mosfet cannot operate from 5 volts supply used for ICS. Modification are made to reduce the techniques used to reduce the threshold voltage are:(1) (2) (3)

Change in crystal orientation instead of (111) silicon crystal 100 orientation is used. Used of silicon nitride (Si N) & SiO 2 to form layer. Use of polycrystalline silicon doped with boron from aluminium as gate electrode.



The above techniques result in threshold voltage (Vr) reduction from 4-6 volts to 1.5 to 2.5 volts.




Easy to fabricate them n-channel MOSFET. Contaminants are positive ions. They turn the MOSFET on prematurely in n-channel. In pchannel these positive ions have no effect. P-channel have ON resistance more than twice than of n-channel MOSFET. Therefore nchannel MOSFET circuit are smaller than Fchannel circuits. N-channel MOSFET have higher switching speed. Therefore N-channel MOSFET circuits are superior on various counts but are costly. Hence, not extensively used.



1. 2. 3. 4. 5. 6.

Sketch the basic structure of N-channel JFET. Draw the circuit symbol of (a) an N-channel JFET (b) A P-channel JFET. Show the biasing arrangement of an N-channel JFET. Draw typical drain characterstics curves of JFET? What are the various types of MOSFET? Explain in brief. What is threshold voltage in Enhancement MOSFET?




Chapter 9


Number System A digital computer performs various computational tasks using the digital or binary logic. The digital logic is called binary logic as only two states are used. The very idea that a two-valued number system can possibly be the basis for the most powerful and sophisticated computers seems astounding, to say the least. Everything in the digital world is based on the binary number system and because human logic tends to be binary (ie. true or false, yes or no statements), digital components that are constrained to take discrete values are further constrained to take only two values and are said to be binary. Numerically, this involves only two symbols: 0 and 1. Logically, we can use these symbols or we can equate them with others according to the needs of the moment. Thus, when dealing with digital logic, we can specify that: 0 = false = no 1 = true = yes Using this two-valued logic system, every statement or condition must be either “true” or “false;” it cannot be partly true and partly false. While this approach may seem limited, it actually works quite nicely, and can be expanded to express very complex relationships and interactions among any number of individual conditions. One essential reason for basing logical operations on the binary number system is that it is easy to design simple, stable electronic circuits that can switch back and forth between two clearly-defined states, with no ambiguity attached. It is also readily possible to design and build circuits that will remain


indefinitely in one state unless and until they are deliberately switched to the other state. This makes it possible to construct a machine (the computer) which can remember sequences of events and adjust its behavior accordingly. These states in the computer are represented by two digits: 0 and 1- called binary digit. A binary digit is called a bit. Data or Information is represented in groups of bits. Using various coding technique, bits (0 and 1) are made to represent not only binary numbers but also any other discrete symbols, such as decimal digits or letters of the alphabet. These letters and digits are used to develop complete sets of instructions for performing various types of computations. The number system, that we used in daily life is decimal number system, which employ the base 10, whereas binary numbers use a base 2 system. This means, that any number in the decimal number system is represented using the base 10 raised to an integer power. Whereas, in binary number system, the any number is represented using the base 2 raised to an integer power. For example, the decimal number 33 is represented as follows: 3 x 10 1 + 3 x 10 0= 33 whereas, the binary number 100001 represents a quantity that can be converted to a decimal number by multiplying each bit by the base 2 raised to an integer power as follows : 1x 2 5+0 x 2 4 +0 x 2 3 + 0 x 2 2 + 0 x 2 1 + 1 x 2 0= 33 The six bits 100001 represent a binary number whose decimal equivalent is 33. 217


Similarly, other group of bits represent various characters in digital computer system. This is similar to the concept than the same letters of an alphabet are used to construct different languages, such as English and French, but here we are limited to use only two characters - 0 and 1. In computer or other digital machines, the binary numbers are represented by physical quantities like voltage. The machine may be designed to accept 1 value - say for high voltage and 0 value for low voltage. This way, a series of 0 and 1 signals are actually transmitted using high and low voltage. Now these signals are combined with certain conditions to get the required output. These conditions are called binary logic. It will be discussed in more detail in coming section.

There are two basic type of data which are stored and processed by computers; namely characters and numbers. Characters include letters and special symbols. For example, computers may be programmed to read a lot of names, sort them in alphabetical order and print the sorted list. The other type of data are decimal numbers such as 1234, 489, 1569 etc. Numbers are processed using arithmetic operations such as add, subtract, multiply and divide. In this case we assign values to numbers and the processing results in new values.

DECIMAL NUMBER SYSTEM The number system used almost universally by humans is called DECIMAL SYSTEM. It is so firmly ingrained in our minds from early childhood that we use it correctly without even pausing to understand the system of numbers. The decimal number system 218


is a number system which has a base (or radix) of 10. In decimal system we have 10 symbols (0 to 9). It must be noted that all positional number systems have the highest numerical symbol having a value one less than the base (or radix) i.e. In Decimal number system we have 10 symbols (0 to 9). In octal number system, which has a base of 8 will have 8 symbols (0 to 7) and in binary system with base 2 we will have only 2 symbols (0 and 1). Any number can be represented by arranging symbols in various positions. You know that in the decimal system the successive positions to the left of the decimal point represent s units, tens, hundreds, thousands etc. It is very likely that you have not given a thought to the fact that each position represents a specific power of the base. For example the decimal number 45987 represents: (4x10 4) + (5x10 3) + (9x10 2) + (8x10 1) + (7x10 0) 40000 + 5000 + 900 + 80 + 7 = 45,987 This procedure can be done more figuratively and hence easier to comprehend, in the following way : 4x10 4 5x10 3 9x10 2 8x10 1 7x10 0

= 40000 = 5000 = 900 = 80 = 7 45987

[Remember that any number raised to the power zero is 1 i.e. n 0 = 1, 2 0 = 1, 100 0 = 1] From this example it should be clear that the left most digit in a number in the Most Significant Digit (MSD). It is 4 in our example. The right most digit, namely 7, is the Least Significant Digit (LSD). The power of 10 in the fifth digit is 4, in the forth digit 219


it is 3, in the third digit it is 2 and so on. That is, the power of 10 in the nth digit is (n-1). Now, we will illustrate the decimal fraction by an example, let the decimal fraction be 0.76853. This decimal fraction can be interpreted as follows : 2x10 -5 5x10 -4 8x10 -3 6x10 -2 7x10 -1

= = = = =

0.00002 0.0005 0.008 0.06 0.7 0.76852

Let us examine a real decimal number to sum up this discussion. Let the number is 95.85 9x10 1 = 90 5x10 0 = 5 -1 8x10 = 0.8 5x10 -2= 0.05 Addition gives 95.85

BINARY NUMBER SYSTEM Electrical devices generally have two stable states. Physically, it could be compared with and quantity like volatage or current. For example, either they are passing current (that is are ON or are in State 1) or not passing current (that is are OFF or are in State 0). This fact is kept in mind using a binary system of number. Binary system also simplifies the design of magnetic particles on storage devices which are either magnetized (are in State 1) or are not magnetized (are in State 0). When we count in decimal system, we start counting from 0 up to 9, which are the basic ten digits. Next number is desired by using the second digit of this system as basic numeral i.e. 1 and writing first digit 220


after this i.e. 0. So the next number in the order is 10. Here we have carried 1 in front of the first basic digit 0. This series is thus written by prefixing 1 to all basic digits i.e. 10, 11, 12, 13, .... up to 19. Then we use 2 prior to all basic digits and form next series like 21, 22, 23, ..... up to 20. The binary system uses only two basic digits i.e. 0 and 1, while counting we start off 0 and then 1. After this we have to come 1 into next column and put 0 in the unit’s column. So after 1, we have 10 counting up from 0, we got 0, 1, 10, 11, 100, 1101, 111, 1000 etc. The table shows the binary equivalents of decimal numbers. Decimal 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Binary 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111

In binary system there are only 2 digits and the system is based on 2. So each number of this system has got a value 2 times (twice) that of the digit just 221


right to it. As we have seen in case of decimal, the place value gets multiplied by 10, everytime we shift to a digit on left hand side. This means first digit has a place value of 10, second digit has got a value of 100, then 1000 and so on. Similarly in case of binary system first digit has got a value of 1, second has got a value of 2, third 4, fourth 8. For instance binary number 1011 means : 1*2 0 1*2 1 0*2 2 1*2 3 Adding

= = = =

1 2 0 8 11

Conversion from Decimal to Binary For Converting decimal to binary, we have to successively divide the decimal number by two, until it is reduced to 0. When on division by two, there is a remainder of one, this becomes a binary digit 1. And if there is no remainder it becomes a binary 0. To convert decimal number 19 into binary. 19/2 = 9/2 = 4/2 = 2/2 = 1/2 =

9 4 2 1 0

remainder remainder remainder remainder remainder

1 1 0 0 1

Now reverse the order of digits in remainders to get the binary number. So the binary equivalent is 10011. Hence (19) 2 = (10011) 2

Example Convert decimal 252 to binary. 222


252/2 126/2 63/2 31/2 15/2 7/2 3/2 1/2

= = = = = = = =

126 63 31 15 7 3 1 0

remainder remainder remainder remainder remiander remainder remainder remainder

is is is is is is is is

0 0 1 1 1 1 1 1

So the binary equivalent of 252 is 11111100.

Conversion from Decimal Fraction to Binary Fraction To convert a decimal fraction to its binary equivalent we use the technique of successive multiplication by 2. The integer part is noted down after the multiplication by 2 at each stage and the remainder new fraction is used for the multiplication by 2 at the next stage. The following example illustrate the procedure.

Example Convert decimal fraction 0.8125 to its equivalent binary fraction. Fraction 0.8125 0.625 0.25 0.50

Fraction x 2 1.625 1.25 0.50 1.00 (0.8125) 10


Remainder New Fraction 0.625 0.25 0.5 0.0 (0.1101) 2

Integer 1 (MSB) 1 0 1 (LSB)

Example Convert the decimal fraction 0.635 into its binary equivalent : 223




0.635 0.27 0.54 0.08 0.16 0.32 0.634

1.27 0.54 1.08 0.16 0.32 0.64 1.28

Remainder Integer New Fraction 0.27 1 (MSB) 0.54 0 0.08 1 0.16 0 0.32 0 0.64 0 0.28 1 (LSB)

It is obvious from the above example that the remainder new fraction does not become zero even after seven multiplications. The process continues further. For such a case an approximation is made. For such cases, we may take the result up to 6 binary bits after the binary point. Hence (0.635) 10 = (0.1010001) 2

Conversion from Binary to Decimal Just as powers of 10 are important in the decimal number system of enumeration powers of 2 are important in binary number system. We thus give the following table for the powers of 2 and their decimal equivalents. The abbreviation K stand for 1024 which is approximately 1000, a kilo. Thus the notation 16K means 16x1024=16384. The abbreviation M stand for Mega i.e. 1024x1024=1048576. Power of 2 20 21 22 23 24 25

Decimal Abbreviation Equivalent 1 2 4 8 16 32 224


26 27 28 29 2 10 2 11 2 12 2 13 2 14 2 15 2 16 2 17 2 18 2 19 2 20 2 21

64 128 256 512 1024 2048 4096 8192 16384 32768 65536 131072 262144 524288 1048576 2097152

K 2K 4K 8K 16K 32K 64K 128K 256K 512K 1M 2M

The decimal value of a binary expression is equal to decimal values of the binary digits. However, the method shall be further clear from the following example

Example Convert binary number 110110 into decimal system: Binary Number 1 Binary place value 32(2 5)

1 0 1 4 3 16(2 ) 8(2 ) 4(2 2 )

1 0 1 2(2 ) 1(2 0)

Multiply & Add for getting decimal equivalent = 32 + 16 + 0 + 4 + 2 + 0 = 54 Hence (110110) 2 = (54) 10

Example Convert the binary number 11111100 into decimal number system :



Binary Number 1 1 Binary Place Value 128 64

1 32

1 1 16 8

1 4

0 2

0 1

Decimal equivalent 128+64 + 32 + 16 +8 + 4+0 +0 = 252 Hence (11111100) 2 = (252) 10

Conversion from Binary fraction to Decimal fraction In the decimal number system the weights of the digits in 0.635 which lie after the decimal point are represented as : 0.635

= = =

0.6 + 0.03 + 0.005 6 x 1 + 3 x 1 + 5 x 1 10 100 1000 -1 6 x 10 + 3 x 10 -2 + 5 x 10 -3

Similarly in the binary number system the weights of the binary bits in a binary number 0.1104, which lie after the binary point, can be expressed as: 0.1101 = = = (0.1101) 2

1 x 2 -1 + 1 x 2 -2 + 0 x 2 -3 + 1 x 2 -4 1 x 1/2 + 1 x 1/4 + 0 x 1/8 + 1 x 1/16 0.5 + 0.25 + 0.0625 = (0.8125) 10

Example Convert the binary fraction 0.10110 to its equivalent decimal fraction. 0.10110 = 1 x 2 -1 + 0 x 2 -2 + 1 x 2 -3 + 1 x 2 -4 + 0 x 2 -5 = 1 x1/2+1x1/4+1 x 1/8 + 1 x 1/16 + 1 x 1/32 = 0.5 + 0.125 + 0.0625 + 0 Hence (0.10110) 2 = (0.5775) 10

OCTAL NUMBER SYSTEM The base of the octal number system is 8. It uses eight digits 0, 1, 2, 3, 4, 5, 6 and 7. The next numbers after 7 in octal number will be 10, 11, 12, 13, 14......... 226


As 8 = 2 3 , an octal number is represented by a group of three binary bits. For example four is represented by 100, 6 by 110 and 7 by 111. If an octal number contains two or more digits, then each digit is individually represented by a group of three binary bits. For example 46 to the base 8 is represented by 100, 110 and 354 8 by 011 101 100. Table shows octal numbers and their binary representations.

Conversion of Octal Number to Decimal Number For conversion of a number from any number system to decimal number system we make the use of the following well known expression : The weight of the nth digit of the number from the right hand side. = nth digit x (Base) n-1

Example Convert the Octal number 578 to its equivalent decimal number. As the base of the Octal number system is 8, applying the general rule of conversion, we get. (57) 8

= = =

(57) 8

5 x 81 + 7 x 80 40 + 7 (47) 10

Example Convert the octal number 365 to its decimal equivalent : (365) 8

= = = =

3 x 82 + 6 x 81 + 5 x 80 3 x 64 + 6 x 8 + 5 + 1 192 + 48 + 5 (245) 10



Conversion of a Octal Fraction to a Decimal Fraction In the Octal system the weight of the octal digits after the octal point are 8 -1 , 8 -2 etc. Thus (0.563) 8 = 5 x 8 -1 + 6 x 8 -2 + 3 x 8 -3 = 0.625 + 0.09375 + 0.005859375 = (0.724609375) 10

Conversion of a Decimal Number to Octal Number For the conversion of a decimal number to an equivalent octal number the technique of repeated division by 8 is used. This is explained in the following examples :

Example Convert the decimal number 63 to its equivalent octal number : Quotient Remainder 63/8 = 7 7 (LSB) 7/8 = 0 7 (MSB) Hence (63) 10 = (77) 8

Example Convert the decimal number 957 to its equivalent octal number. Quotient Remainder 957/8 = 119 119/8 = 14 14/8 = 1 1/8 = 0 (957) 10 = (1675) 8

5 7 6 1



You can check the result as shown below : (1675) 8

= 1 x 83 + 6 x 82 + 7 x 81 + 5 x 80 = 512 + 384 + 56 + 5 = (957) 10 228


Conversion of a Decimal Fraction to octal fraction For the conversion of a decimal fraction to its equivalent octal fraction the technique of repeated multiplication by 8 is used. The integer part is noted down and the new remainder fraction is used for the multiplication at the next stage.

Example Convert the decimal fraction 0.96 to its equivalent octal fraction. Fraction

Fraction x 8

0.96 0.68 0.44 0.52 0.16

7.68 5.44 3.52 4.16 1.28

Remainder Fraction 0.68 0.44 0.52 0.16 0.28

New Integer 7 (MSB) 5 3 4 1 (LSB)

This process will continue further, so we may take the result up to 5 places of octal point. (0.96) 10 = (0.75341) 8

Conversion of Binary Number to Octal Number The octal number system is a base-8 system. As 2 3 = 8, for binary, to octal conversion, groups of 3 binary bits each are formed in the binary number, After forming the groups, each group of three binary bits is converted to its octal equivalent.

Example Conv ert the binary nu mber (101111) 2 to i ts equivalent octal number. We form groups of 3 bits each of the binary number from right to left thus. 101111 (101111) 2

= = 229

(101) (111) (57) 8


Example Convert the binary real number to its equivalent octal number 1010.1101 In the integer part of the binary number the group of 3 bits is formed from right to left. In the binary fraction, the group of 3 bits is formed from left to right. Thus (1010.1101) 2 = (1) (010).(110) (1) Converting them into groups of 3. = (12.61) 8

Conversion of Octal Number to Binary Number To convert an octal number to its equivalent binary number each digit of the given octal number is converted to its 3 bits binary equivalent. This thing will be more clear from the following examples :

Example Convert the octal number 375 to its equivalent binary number : (375) 8 = (011) (111) = (011111101) 2


Example Convert the real octal number 56.35 to its equivalent binary number : (56.35) 8

= (101) (110).(011) (101) = (101110.011101) 2

HEXADECIMAL NUMBER SYSTEM The hexadecimal number system has the radix (base as 16). Its digits are from 0 to 9 and A to F. Thus in hexadecimal number system, decimal number 10 is represented by A, 11 by B, 12 by C, 13 by D, 14 by E and 15 by F. The decimal number 16 is represent to as 10 and 17 by 11 in hexadecimal number system. 230


A hexadecimal digit is represented by four binary bits. For example, the number 5 is represented by 0, 101 hex adeci mal eq ui val ent . Th e d i g i t A o f hexadecimal is 1010 in 4 bit, binary representation. If a hexadecimal number consists of two or more than two digits, each digit is individually represented by four binary bits. For example 86 in hexadecimal i s re p resen ted by 100 0 0110 . Tab l e sh o ws , hexadecimal numbers and their binary representations. The binary representation of a hexadecimal number is also called binary coded hexadecimal number. Decimal Number

Hexadecimal Number

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 43 255

0 1 2 3 4 5 6 7 8 9 A B C D E F 10 11 2B FF 231

Binary Coded Hexadecimal Number 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 00010000 00010001 00101011 11111111


Conversion of Hexadecimal to Decimal For converting any number from any number system to decimal number system we make use of the following well known expression. The weight of the digit of the number from the right hand side. = nth digit x (Base) n-1

Example Convert the hexadecimal number (1A) 16 to its equivalent decimal number (1A) = 1 x 16 1 + A x 16 0 = 1X 16 + 10 X 1 = 26 (1A) 16 = (26) 10

Example Convert the hexadecimal number (BDF6) 16 to its equivalent decimal number. BDF6 3210


= B x 16 3 + Dx 16 2 + F x 16 1 + 6 x 16 0 = 11 x 16 3 + 13 x 16 2 + 15 x 16 1 + 6 x 1 0 = 11 x 4096 + 13 x 256 + 15 x 16 + 6 = (23630) (BDF6) 16 = (48630) 10

Conversion from Decimal to Hexadecimal The procedure is similar to the other number systems. The number is converted by successive division by 16 and noting down the remainders. The remainders one in decimal val ue and hence eventually be converted into the hex equivalent before reporting. The numbers formed are reversed in their digital order as shown diagrammatically below :

Example Convert the decimal number 1046 into equivalent hexadecimal : 232


1046/16 65/16 4/16 Hence (1046) 10

Quotient 65 4 0 = (416) 16

Remainder 6 s 1 4

Conversion from Decimal fraction to Hexadecimal fraction The fractional part is multiplied by 16 successively till the fractional portion is reduced zero. The second and other successive multiplications are performed only on the fractional portion of the product obtained in the previous operation.

Example Convert decimal 0.96875 into hexadecimal number system. Fraction

Fraction x 16

0.96875 0.5000

15.5000 0.0000

Remainder Fraction 0.5000 0.0000

New Integer 15 8

Hence (0.96875) = (15) (8) = (F8) 16

Conversion from Octal Number System to Hexadecimal Number System The conversion of Octal number to its equivalent hexadecimal number is done through binary conversion as illustrated by the following example :

Example Convert the octal number 535 to its equivalent hexadecimal number. First converting (535) 8 to its equivalent binary number. 535

= =

(101) (011) (101) (101011101) 2 233


Now forming the group of 4 binary bits to obtain its hexadecimal equivalent. (101011101) 2

= (1) (0101) (1101) = (0001) (0101) (1101) = (15D) 16

Example Convert the real Octal number 67.56 to its equivalent hexadecimal number. Converting (67.56) 8 first to its binary equivalent we get. (67.56) 8

= (110) (111) . (101) (110) = (110111.101110) 2

Now forming the groups of 4 binary bits to obtain its hexadecimal equivalent. We have, (110111.101110) 2 = (11) (0111) . (1011) (10) = (011) (0111) . (1011) (1000) (110111.101110) 2 = (37.B8) 16

Conversion from hexadecimal number to octal number The conversion of a hexadecimal number to octal number is also done through binary conversion as illustrated below :-

Example Convert the hexadecimal number 3DF t o its equivalent octal number. The hexadecimal number 4EF is first converted to its binary equivalent. (4EF) 16

= (0100) (1110) (1111) = (010011101111) 2

This binary equivalent is divided into groups of 3 bits to obtain its octal equivalent. 234



= (010) (011) (101) (111) = (2357) 8

Example Convert the real hexadecimal number (6A.2B) 16 to its equivalent octal number. The number (6A.2B) is first converted to its binary equivalent. (6A.2B) 16

= (0110) (1010) . (0010) (1011) = (01101010.00101011) 2

Now forming the groups of 3 binary bits to obtain its octal equivalent, we get. (01101010.00101011) 2 =(001)(101)(010).(001) (010) (110) = (152.126) 8

BINARY ADDITION We will see in this section, how to add binary numbers. Counting is a form of addition since successive numbers are obtained by adding 1. In the decimal number system we start with 0 and by successively adding 1, we reach 9. As the base of the system is 10, there are no further symbols. Thus, after 9 we count 10. The 1 becomes a carry to the tens positional system. In the binary system, the count progress as follows: 0, 1, 10, 11, 100, 101 ............... When we add two binary numbers, we write the numbers one below the other with their least significant bits (LSB’s) aligned. If the numbers have fractional parts, then the binary points must be aligned. 235


When we add, we, start with the least significant bit. Depending upon the valves ‘a’ and ‘b’ of the bits to be added, we will have a sum and may have a carry to the next stage of addition. There are four possible combinations in which ‘a’ and ‘b’. a 0 0 1 1

b 0 1 0 1

sum 0 1 1 0

carry 0 0 0 1

i.e. 1+1 = 0, with a carry of 1 to the next column on the left hand side. And also: 1+1+1 = 1 with a carry of 1. Using only the above rules we are able to do binary addition.

Example Add (11) 2 to (01) 2 Carry Augent Addend

1 1 1 1 0 1 1 0 0

Example Compute the binary sum of 11011011 and 1001110 : Carry 1 1111 Augent 11011011 Addend 1001110 100101001 We can add more than two binary numbers by accumerlating them to running total one at a time. For example, the sum of numbers 11101, 1010, 1100, 1010, 1101 is obtained as follows : 236






11 11101 10110 110011 110011 001100 111111 1111 111111 011010 111001 11 1 111001 011001 1000110

Carry over First number Second number. First Partial Sum First partial sum Third number Second Partial Sum Second partial sum Fourth number. Third partial sum Third Partial Sum Fifth Number Final Sum

We do not use the same technique as with decimal numbers, since the exorbitant amount of carrying will cause errors.

BINARY SUBTRACTION Recall that in decimal subtraction we subtract a decimal digit by borrowing 1 from the next column. For example, the decimal difference between 79926 and 7985 is obtained as follows : 10100 Borrowed by the previous column to the right. 79926 7985 71941 Binary subtraction can be accomplished similarly, if we remember the following subtraction identities:



a 0 1 1 0

b 0 0 1 1

Difference 0 1 0 1

Borrow 0 0 0 1

Consider carefully the following examples :

Example Compute the binary subtraction from 1111011 to 101001. Here there is no borrowing. 1111011 101001 1010010

Example Compute the binary subtraction from 111101 to 10010. Here we borrow 1 from the third column because of the difference 0-1in the second column. 111101 10010 101011 Now, what happen if we cannot borrow 1 from the next column because the column contains a 0 ? First we look at what happens in decimal subtraction. The decimal difference between 800046 and 397361 is obtained as follows : 7999 800046 397261 402785

Status of the last four digits due to borrowing by the second column to the right.

Observe that we borrowed 1 from the sixth column for the second column, since the third, fourth and 238


fifth columns contained zeros. After the borrowing, the third, fourth, and fifth columns contain. 10 - 1 = 9 Now the same thing happens in binary subtraction, except that after the borrowing the Zero column contain. 10 - 1 = 01 For example, the binary difference of 110001 and 1010 is obtained as follows: 01110 Borrowed by the previous column to the right. 110001 001010 100111

COMPLEMENTS For a number which has n digits in it, a complement is defined as the difference between the number and the base raised to the nth power and the base raised to the nth power minus 1. Complements are used in digital computers for simplifying the subtraction operation and for logical manipulations. There are two types of complements for each base or system. i) ii)

the r’s complement. the (r-1)’s complement.

When the valve of the base is substituted, the two types receive the names, 2’s and 1’s complement for binary numbers, or 10’s and 9’s complement for decimal numbers.

The r’s Complement Given a positive number N in base r with an integer part of n digits, the r’s complement of N is defined



as rn-N for N # 0 and 0 for N = 0. The following numerical example will help clarify the definition. The 10’s complement of (52520) 10 is 10 5 - 52520 = 47580. The number of digits in the number is n=5 The 10’s complement of (0.3267) 10 is 1 - 0.3267 = 0.6733 No integer part, so 10 n = 10 0 = 1. The 10’s complement of (25.639) 10 is 10 2 - 25.639 = 74.361. The 2’s complement of (101100) 2 is (2 6 ) 10 - (101100) 2 = (1000000 - 101100) 2 = 010100 The 2’s complement of (0.0110) 2 is (1 - 0.0110) 2 =


From the definition and the examples, it is clear that the 10’s complement of a decimal number can be formed by leaving all least significant zeros unchanged, subtracting the first non zero least significant digit from 10, and then subtracting all other higher significant digits from 9. The 2’s complement can be formed by leaving all least significant zeros and the first non zero digits unchanged, and then replacing 1’s by 0’s by 1’s in all other higher significant digits.

Given a positive number N in base r with an integer part of n digits and a fraction part of m digits, the (r1)’s complement of N is defined as rn-r-m-N. Some numerical examples follows : The 9’s complement of (52520) 10 is (10 5 - 1 - 52520) = (99999 - 52520) = 47479. 240


No fraction part, so 10 -m = 10 0 =1 The 9’s complement of (0.3267) 10 is (1 - 10 -4 - 0.3267) =

(0.9999 - 0.3267) = 0.6732

No integer part so 10 n = 10 0 = 1. The 9’s complement of (25.639) 10 is (10 2 - 10 -3 - 25.639) =

99.999 - 25.639 = 74360

The 1’s complement of (101100) 2 is (2 6 -1) - (101100) = =

(111111 - 101100) 2 010011

The 1’s complement of (0.0110) 2 is (1 - 2 -4 ) 10 - (0.0110) 2 = =

(0.1111 - 0.0110) 0.1001

From the examples, we see that 9’s complement of a decimal number is formed simply by subtracting every digit from 9. The 1’s complement of a binary number, is even simpler to form the 1’s are changed to 0’s and 0’s to 1’s. Since the (r-1)’s complement is very easily obtained, it is sometimes convenient to use it when the r’s complement is desired. From the definitions and from a comparison of the results obtained in the examples, it follows that the r’s complement can be obtained from (r-1)’s complement after the addition of r -m to the least significant digit. For example the 2’s complement of 10110100 is obtained from the 1’s complement 01101011 by adding 1 to give 01001100. 241


It is worth mentioning that the complement of the complement restores the number to its original valve. The r’s complement of N is r n - N and the complement of (r n - N) is r n - (r n - N)=N ; and similarly for the 1’s complement.

Subtraction with r’s complements In this method, we borrow a 1 from a higher significant position when the minuend digit is smaller than the corresponding subtrahend digit. When subtraction is implemented by means of digital components, this method is found to be less efficient than the method that uses complements and addition as stated below. The subtraction of two positive numbers (M-N), both of base r, may be done as follows :  

Add the minuend M to the r’s complement of subtrahend N. Inspect the result obtained in step 1 for an end carry. (a) If an end carry occurs, discard it. (b) If an end carry does not occur, take the r’s complement of the number obtained in step 1 and place a negative sign in front.

The following examples illustrate the procedure :

Example Using 10’s complement, subtract 72532 - 3250 M = 72532 N = 03250 10’s complement of N = 96750 end carry Answer = 69282 242

+ 1.

72532 96750 69282


Example Subtract (3250 - 72532) 10 M = 03250 N = 72532 10’s complement of N = 27468 03250 + 27468 30718 No Carry Answer = - 69282 = - (10’s complement of 30718). The binary subtraction using 2’s complementary method is performed using the following three steps: Step 1 Step 2 Step 3

Find the 2’s complement of the number you are subtracting (subtrahend) Add this to the number from which you are taking away (minuend) If there is a carry 1, discard it to obtain the result; if there is no carry, take 2’s complement of a sum and attach a negative sign to obtain the result.

Example Subtract 0111000 (or decimal 56) from 1011100 (or decimal 92) using complementary method. 2’s complement of 0111000 = 1001000. Hence, we add the numbers. 1011100 (or decimal 92) to the 2’s complement of 0111000 (or decimal 56) as stated in the step 2. Therefore 1011100 + 1001000(2’s complement of 01110000) 10100100



Carry discarded Result = 0100100 (or decimal 36)

Example Subtract 100011 (or decimal 35)( from 010010 (or decimal 18) using complementary method. 2’s complement of 100011 = 011101, therefore, 010010 + 011101 (2’s complement of 100011) 101111 Since there is no carry, we will take 2’s complement of the sum and place a -ve sign before the result. Hence Result = - 010001 (or decimal 17)

Example Subtract 01110 from 10101 using 2’s complementary method. 2’s complement of 01110 = 10010 Hence

10101 10010 Add 100111

Carry Discarded. Answer = 0111 (decimal 7)

The BCD codes are used to represent a decimal number where in a decimal number is represented by four binary bits. For example, 3x10 [i.e. 3 to the base 10] is represented by 0011 in Binary coded Decimal. If a decimal number consists of two or more digits, then each digit of the decimal number is individually represented by its 4-bit binary equivalent. For example, 56x10 [i.e. 56 to the base 10] is represented by 01010110, in BCD code. 244


Difference between BCD Codes & Binary Equivalent Numbers are usually represented by some sort of binary codes. There is a difference between a binary equivalent of a decimal number and the binary code of a decimal number. For example, the binary e qui va l ent of the deci m a l num b e r 4 3x 1 0 i s 101011x2, but it is represented in BCD code as 01000011.

Uses of BCD Codes BCD codes are used where the decimal information is directly [in coded form] transferred into or out of a digital system. Electronic calculators, digital voltmeters, frequency counters, electronic counters, digital clocks etc. work with BCD numbers. BCD codes have also been used in early computers. Modern computers do not use BCD numbers as they have to process names and other non- numeric data.

EBCDIC CODE The major problem with BCD code is that only 64 [2 6 ] different characters can be represented in it. This is not sufficient for providing decimal numbers [10], lower case letters [26], capital letters [26], and a fairly large number of other special characters [28+]. Hence, the BCD code was extended from a 6-bit code to an 8-bit code. The resulting code is called the extended binary-coded decimal interchange code [EBCDIC]. In this code, it is possible to represent 256 [2 8 ] different characters instead of 64 in BCD code [2 6 ]. In addition to the various character requirements mentioned above, this also allows a large variety of printable characters and several non-printable control characters. The control characters are used to control such activities as 245


printer vertical spacing, movement of cursor on the terminal screen, etc. All of the 256 bit combinations have not yet been assigned characters, so the code can still grow as new requirements develop. Because EBCDIC is an 8-bit code, it can be easily divided into two 4 bit groups. Each of these 4-bit groups can be represented by 1 hexadecimal digit. Thus, hexadecimal number system is used as shortcut notation for memory dump by computers TABLE A : Numeric & Alphabatic Characters in EBCDIC Notation Character



1100 1100 1100 1100 1100 1100 1100 1100

0001 0010 0011 0100 0101 0110 0111 1000

C1 C2 C3 C4 C5 C6 C7 C8


1100 1101 1101 1101 1101 1101 1101 1101 1101 1101

1001 0001 0010 0011 0100 0101 0110 0111 1000 1001

C9 D1 D2 D3 D4 D5 D6 D7 D8 D9


1110 1110 1110 1110 1110 1110 1110 1110

0010 0011 0100 0101 0110 0111 1000 1001

E2 E3 E4 E5 E6 E7 E8 E9

1 2 3 4 5 6 7 8 9 0

1111 1111 1111 1111 1111 1111 1111 1111 1111 1111

0000 0001 0010 0011 0100 0101 0110 0111 1000 1001

F0 F1 F2 F3 F4 F5 F6 F7 F8 F9


Code Digit

Hexadecimal Equivalent


that use EBCDIC for internal representation of characters. This results in a one-to-four reduction in the volume of memory dump.

ASCII CODE American Standard Code for Information Interchange [ASCII] has been adopted by several A m e r i ca n c o m p u t e r m a n u f ac t u r e r s a s t h e i r computers' internal code. This code is popular in TABLE B : Numeric & Alphabatic Characters in ASCII-7 Notation Character


0 1 2 3 4 5 6 7 8 9

011 011 011 011 011 011 011 011 011 011

0000 0001 0010 0011 0100 0101 0110 0111 1000 1001

30 31 32 33 34 35 36 37 38 39


100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 101 101 101 101 101 101 101 101 101 101 101

0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010

41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A


Code Digit

Hexadecimal Equivalent


data communications, and is used almost exclusively to represent data internally in microcomputers. ASCII is of two types : ASCII-7 AND ASCII-8. ASCII7 is a 7 bit code that allows 128 [2 7 ] different characters. The first 3 bits are used as zone bits and the last 4 bits indicate the digit. Microcomputers using 8-bit byte [group of 8 bits for one byte] use the 7 bit ASCII by leaving the left most first bit of each byte as a zero. TABLE D : Numeric & Alphabatic Characters in ASCII-8 Notation Character

ASCII-8 Zone

0 1 2 3 4 5 6 7 8 9

0101 0101 0101 0101 0101 0101 0101 0101 0101 0101

0000 0001 0010 0011 0100 0101 0110 0111 1000 1001

50 51 52 53 54 55 56 57 58 59


1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1011 1011 1011 1011 1011 1011 1011 1011 1011 1011 1011

0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010

A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA


Code Digit

Hexadecimal Equivalent


ASCII-8 is an extended version of ASCII-7. It is an 8-bit code that allows 256 [2 8 ] different characters rather than 128. The additional bit is added to the zone bits. Table C shows the alphabetic and numeric characters in ASCII-8 notation. Observe that other than the zone-value differences, ASCII-7 and ASCII8 are identical. ASCII also uses hexadecimal as its four-to-one shortcut notation for memory dump.





Answer true or false i. The word ‘bit’ is contraction of the word ‘binary digits’. ii. All binary numbers consist of a string of ‘1’s & ‘0’s. iii. The number, 111 2 is read as one hundred and eleven. iv. In the number 1010 2 each 1 has the same weightage. v. In binary system, the place value of a digit increases or decreases by power of 2. vi. In the hexa decimal number system each digit represents four bits. vii. A byte is the smallest addressable unit of storage. viii. Shifting a binary number by one bit to its right effectively multiplies the number by 2. Fill in the blanks with appropriate words i. 1 kilobyte equals _______ bytes. ii. Representing input data by the standard abbreviation is called data ______. iii. The set of characters including 26 alphabets and ten numerals is called ________. iv. Data is the name given to basic _______ on which the computer works. v. A byte consist of ______bit. vi. Properly-arranged data is called __________. vii. Collecting the data and converting it into information is called _________. viii. A nibble is a string of _______ bits. 250



3. 4. 5. 6.

I n f o r m at i o n t o be pr o c e s s e d b y a computer is called _________. x. The binary equivalent of decimal number 13 is ___________. xi. The decimal equivalent of binary number 10110101 is _________. xii. The hexa decimal digit A, C and F are equivalent to _______, _______ and ________ in the decimal system. xiii. The binary number 1001 is equivalent to hexa decimal ________. xiv. The decimal number 127 is equal to the hexa decimal __________. xv. In a hexa decimal system, the number after 19 is _____________. Define the term ‘byte’. What is the difference between a bit and a byte ? Give the full form of the following abbreviations : BCD, EBCDIC, ASCII. Wh y i s t he binar y system use d i n t he computers? What are the octal and hexa decimal number systems ? How are binary digits converted to octal or hexa decimal? Why are binary digits converted to octal or hexa decimal?




Convert the following binary numbers into the decimal system : (a) 1101101, (b) 10101110, (c) 1011011011. Convert each decimal number into the binary system : (a) 237, (b) 359, (c) 875. Convert the following decimal numbers to binary : 251


10. 11.






(1) 18, (2) 26, (3) 44, (4) 50, (5) 111, (6) 173 (7) 196, (8) 236, (9) 298, (10) 331, (11) 382, (12) 515 Convert the numbers of question 9 into octal base and hexadecimal system. Convert following hexadecimal numbers into decimal system. (a) 1EB, (b) 1B0 , (c) 148, (d) E4, (e) 8B Convert following binary numbers into octal numbers (1) 100111, (2) 110101, (3) 1010101, (4) 10001000, (5) 10011101 Evaluate : (a) 110111+100110+10101+111011 (b) 11.101+1010.11+110.011 (c) 111011*11010 (d) 1101.01*10.11 Find the ones and two’s complements of the binary numbers (a) 111011, (b) 1101111, (c) 01100110, (d) 1100011000 Perform the following binary additions (a) 1110+1111 (b) 1011+1001 (c) 1011+110 (d) 101101+1101101 (e) 1111+111+1111 (f) 10111+01110 (g) 110111+111011 Find 1’s complement of following binary numbers (a) 1010 (b) 01101 252





(c) 01111 (d) 11011.01 Find the 2’s complement of following binary numbers (a) 10011.11 (b) 1011 (c) 11011 (d) 11011.01 Perform the subtraction using 2’s and 1’s complement methods(a) 10011-111011 (b) 01010-10011 Perform the following subtractions by adding the 2’s complement. (a) 111100-111011 (b) 1010010-1101111 (c) 11001001-01100110 (d) 1110111000-1100011000




Chapter 10


In computer or other digital machines, the binary numbers are represented by physical quantities like voltage. The machine may be designed to accept 1 value - say for high voltage and 0 value for low voltage. This way, a series of 0 and 1 signals are actually transmitted using high and low voltage. Now these signals are combined with certain conditions to get the required output. These conditions are called binary logic. For example, consider the logical statement: “If I press the switch to on position, the fan will turn on.” At first glance, this seems to be a correct statement. However, in this example, a more complete statement would be: “If I press the switch to on position and the fan is good and the power is on, the fan will turn on.” If we look at these two statements as logical expressions and use logical terminology, we can reduce the first statement to: Fan = Switch This means nothing more than that the light will follow the action of the switch, so that when the switch is up/on/true/1 the light will also be on/ true/1. Conversely, if the switch is down/off/false/ 0, the light will also be off/false/0. Now if we look at the other statement, we have a slightly more complex expression: Fan = Switch and Fan and Power This indicates that the Fan will turn on, only if Press the switch to on position and Fan is perfectly right and the Power is there. If any one of the requirement is missing, the fan will not turn on.


This type of manipulation of binary information is done by logic circuits called gates. These gates produce signals of binary 1 or 0 when input logic requirements are satisfied.

The term algebra is commonly used in connection with the real numbers. The number system has two operations + and *, which are extended to relations between variables to build up algebraic expressions such as x+y, 2*x, x*x, etc. Here x and y vary over the set of numbers. Boolean Algebra was introduced by George Boole (1815-1864), an English Mathematician in 1847. The Boolean Algebra deals with unique type of variables. This variable is named as Boolean variable. Boolean algebra is described as a finite algebra due to the finite number of values that are represented in the algebra. This is not the same thing as a binary number in which the individual digits of the number have only the values 0 or 1. In Boolean algebra there are only two values all together. This is the basic abstraction on which the algebra is based. The two values 0 and 1 are regards as inverses of each other. There is only one possible inverse in a Boolean algebra that has only two values. The inverse of a constant or variable has the opposite value of the constant or variable itself.

BOOLEAN VARIABLE In algebra, we define a variable as the ‘one’ that has different values at different, instant of time. However, the Boolean variable is a variable that can have only two states or values at any instant of time. These variables are represented by letters and can have 257


one of two values, either 1 or 0 (True or False). Boolean variable is a subset of algebraic variable.

Definition of Binary Logic An algebraic structure consists of objects and operations. To describe binary logic as an algebraic system we need only give the objects and the operations which will be used to combine the objects. The objects are a collection of statements, and the operations are the usual logical operations of “and”, “or”, “if, then”, “not”, and “if and only if”. A statement is either True or False. These objects are comprises of the binary variables and logical operations. Each variable can have two and only two distinct possible values 1 and 0. There are three basic logical operations AND, OR and NOT.

Logic Gates A gate is a special type of amplifier circuit designed to accept and generate voltage signals corresponding to binary 1’s and 0’s. As such, gates are not intended to be used for amplifying analog signals (voltage signals between 0 and full voltage). Used together, multiple gates may be applied to the task of binary number storage (memory circuits) or manipulation (computing circuits), each gate’s output representing one bit of a multi-bit binary number. These gates are denoted by special symbols in a logical diagram. There are three fundamental logical operations of AND, OR and NOT, from which all other functions, no matter how complex, can be derived. There are numerous of such logic gates in digital computer systems. Every gate is represented by a distinct graphic symbol and its operation is described 258


by means of an algebraic function. The input-output relationship of the binary variables for each gate is represented in tabular form in a truth table.

TRUTH TABLE Truth table is the pictorial representation of Boolean expression for showing results of all possible combinations of input. The input Boolean variable will have one of the two states 0 or 1, True or False. The combinations of all such input variable states will result into an output value for that Boolean expression. The study of this table is very helpful to simplify Boolean expression and to design electronic circuit.

AND GATE The AND gate implements the AND function, which means that all the inputs connected through the AND gate must be true to get a true result. With the gate shown in the Fig, both inputs must have logic 1 signals applied to them in order for the output to be a logic 1. With either input at logic 0, the output will be held to logic 0. The algebric expression of the AND gate is as follows: x = A . B

Fig 10.1 The AND Gate and Truth table



The symbol normally used to connect the variable through AND is a dot, which is the same symbol used for multiplication in some mathematical expressions. There is no limit to the number of inputs that may be applied to an AND function, so there is no functional limit to the number of inputs an AND gate may have. But, usually commercial AND gates are most commonly manufactured with 2, 3, or 4 inputs.

THE OR GATE The OR gate is sort of the reverse of the AND gate. The OR function, like its verbal counterpart, allows the output to be true (logic 1) if any one or more of its inputs are true. Verbally, we might say, “If it is raining OR if I turn on the sprinkler, the lawn will be wet.” Note that the lawn will still be wet if the sprinkler is on and it is also raining. This is correctly reflected by the basic OR function. In symbols, the OR function is designated with a plus sign (+). The algebric expression of the OR gate is as follows: x = A + B The OR gate produces the inclusive OR function that is the output is 1 if input A or input B or both inputs are 1; otherwise the output is 0.

Fig 10.2 The OR Gate and Truth Table 260


In logical diagrams, the symbol shown above represent the OR gate. Similar to the AND function, the OR function can have any number of inputs. However, practical commercial OR gates are mostly limited to 2, 3, and 4 inputs, as with AND gates. If the product terms are separated by OR operators, the function is referred to as a Sum-Of-Products (or SOP). A function consisting of groups of OR operators separated by AND operators is referred to as a Product-of-Sum (POS). A Boolean function of AND operators separated by ExOR operators is often referred to as an Exclusive-OR-Sum-Of-Products (or ESOP).

THE INVERTOR The inverter is a little different from AND and OR gates in that it always has exactly one input as well as one output. Whatever logical state is applied to the input, the opposite state will appear at the output.

Fig 10.3 The Invertor and truth table

The NOT function, as it is called, is necesasary in many applications and highly useful in others. A practical verbal application might be: The door is NOT locked = You may enter The NOT function is denoted by a horizontal bar over the value to be inverted, as shown in the figure to the left. In some cases a single quote mark (‘) may also be used for this purpose: 0’ = 1 and 1' = 0. For 261


greater clarity in some logical expressions, you may use the overbar most of the time. In the inverter symbol, the triangle actually denotes only an amplifier, which in digital terms means that it “cleans up” the signal but does not change its logical sense. It is the circle, also called bubble, at the output which denotes the logical inversion. The circle could have been placed at the input instead, and the logical meaning would still be the same. The algebraic symbol used for the logic complement is either a prime or a bar over the variable symbol. x = A'

More than two inputs AND and OR gates may have more than two inputs. An AND gate with four inputs and an OR gate with three inputs are shown in the fig below. The four input AND gate responds with a logic 1 output if all four input signals are logic 1. The output produces a logic 0 signal of any input is logic 0. The three input OR gate responds with a logic 1 when any input is a logic 1, Its output becomes logic 0 if all input signals are logic 0.

Fig 10.4 (a) Four Inputs AND Gate

(b) Three Input OT gate

OTHER LOGICAL GATES The NAND function is the complement of the AND function, as indicated by the graphic symbol which consists of an AND graphic symbol followed by a small circle. The designation NAND is derived from the abbreviation of NOT-AND A more proper 262


designation would have been AND- invert since it is the AND function that is inverted. The NOR gate is the complement of the OR gate and uses an OR graphic symbol followed by a small circle.

NOR The NOR operator is complement of the OR function and its name is an abbreviation of not-OR. It gives the values complement of OR. The truth table of NOR is as follows :

Fig 10.5 The NOR gate and Truth Table

In symbols, the NOR function is designated with a plus sign (+). The algebric expression of the NOR gate is as follows: x = (A + B)'

NAND Similar to NOR, NAND is complement of AND. It ia an abbriviation for not-AND. The truth table is as follows :

Fig 10.6 The NAND gate and Truth Table 263


In symbols, the NAND function is designated with a dot sign (.). The algebric expression of the NANDgate is as follows: x = (A.B)'

XOR or EOR This operator is similar to OR but excludes the combination of both X & Y being equal to 1. This is abbriviated for exclusive-OR.

Fig 10.7 The XOR gate and Truth Table

Exclusive-NOR This operator is complement of exclusive-OR that is why called Exclusive-OR-NOT. It is 1 when both x & y has same values i.e. when both are 0 or both are 1.

Fig 10.8 The Exclusive NOR gate and Truth Table

As we have seen, in Boolean algebra, the AND inputs are described as a function with products or 264


the multiplication of inputs, just like in regular algebra. And the OR inputs are described as a function with sums, or the addition of inputs. Like any other algebra or mathematical system, Boolean algebra is defined with a set of elements, a set of operators, and a number of unproved axioms or postulates. The set of elements for regular algebra is all the real numbers, and for Boolean algebra, the elements are 0 and 1. In logic, the 0 and the 1 represent the two possible states of a premis or a hypothesis. A hypothesis can either be correct (true) or incorrect (false). There are four operators in regular algebra ‘+’ for additio n, ‘*’ for multipli cation, ‘-’ for subtraction which is addition of a negative number, and ‘/’ for division which is multiplication of the reciprocal of a number. The operators for Boolean algebra are also the ‘+’ and the ‘*’, which define Boolean addition (OR) and multiplication (AND). Just like in regular algebra, when you have two or more variables multiplied or “ANDed” together, you can simply write them together without spaces, as when you AND A with B, you simply write AB.

The basic theorems of Boolean algebra There is a group of four basic theorems for each of the binary operators that are constructed by applying the following pairs of signals to the two inputs of each of the operators:   

Applying the same signal to both inputs Applying a signal and its inverse to the two inputs Applying a signal and a logic 0 to the two inputs



Applying a signal and a logic 1 to the two inputs.

The following truth tables shows the result of above basic theorems:

Same Signal to both Inputs i)

A + A = A


A .A = A


A 

A 0 1 A 0 1

A 0 1 A 0 1   

A+A 0 1 A.A 0 1    

A 0 1 A 0 1   

A’ 1 0 A’ 1 0 A’  

A+A’ 1 1 A.A 0 0 A’  

A 0 1 A 0 1

0 0 0 0 0 0

A+0 0 1 A.0 0 0

 

Signal & its Inverse as Input i)

A + A’ = 1


A .A’ = 0


A A’

Signal and a Logic 0 i)

A + 0 = A


A .0 = 0




A 0

  

0  

0  

A 0 1 A 0 1   

1 1 1 1 1 1 0  

A+0 1 1 A.0 0 1 0  

Signal and a Logic 1 i)

A + 1 = 1


A .1 = A


A 1A’

THE COMMUTATIVE, ASSOCIATIVE AND DISTRIBUTIVE LAWS In order to enable us to manipulate Boolean equations and functions we need to establish three so-called laws.

The Commutative Law The commutative law refers to the order in which the variables or terms are arranged in a formula. In discussion in the previous section, if we reverse the order in which the variables were arranged for each theorem, there will be no impact on the results of the basic theorems developed there. Consequently we can write the commutative law for each of the operators as follows: AND OR XOR

AB = BA A+B = B+A A = BA



The Associative Law The associative law refers to the rearrangements of the parenthesis in an equation. It can be stated as follows: AND OR XOR

(AB)C (A+B)+C (A)C

= A(BC) = ABC = A+(B+C) = A+B+C = A(BC) = ABC

The Distributive Law The distributive law also refers to the removing of the parenthesis in an equation. It can be stated as follows: A(B+C) A(BC)

= AB + AC = ABAC

There is also a distributive law for the POS case with the AND and OR operators. This is: (A+B)(A+C)

= A+BC

We can derive this result using the distributive law already established. (A+B)(A+C)

= = = =

A(A+B) + C(A+B) AA + AB + CA + CB A(1 + B + C) + BC A + BC

DEMORGAN’S THEOREM - The inverse of Boolean functions A mathematician named DeMorgan developed a pair of important rules regarding group complementation in Boolean algebra. You should recall from the chapter on logic gates that inverting all inputs to a gate reverses that gate’s essential function from AND to OR, or visaversa, and also inverts the output. So, an OR gate 268


with all inputs inverted (a Negative-OR gate) behaves the same as a NAND gate, and an AND gate with all inputs inverted (a Negative-AND gate) behaves the same as a NOR gate. DeMorgan’s theorems state the same equivalence in “backward” form: that inverting the output of any gate results in the same function as the opposite type of gate (AND vs. OR) with inverted inputs. Or in other words, it says that any logical binary expression remains unchanged if we    

Change all variables to their complements. Change all AND operations to ORs. Change all OR operations to ANDs. Take the complement of the entire expression.

In symbols: not (x and y) = (not x) or (not y) not (x or y) = (not x) and (not y) E.g. if it is not the case that I am tall and thin then I am either short or fat (or both). (AB)’ = A’ + B’ (A+B)’ = A’B’ Graphically, it can follows(Equation 1):




Fig 10.9 The circuit equivalent of (AB)’ = A’ + B’

The theorem can be extended to combinations of more than two terms in the obvious way. When multiple “layers” of bars exist in an expression, you 269


may only break one bar at a time, and it is generally easier to begin simplification by breaking the longest (uppermost) bar first. For example, let’s take the expression (A + (BC)’)’ or and reduce it using DeMorgan’s Theorems:

Fig 10.10 Circuit Equivalent of

Following the advice of breaking the longest (uppermost) bar first,you cab begin by breaking the bar covering the entire expression as a first step:

As a result, the original circuit is reduced to a threeinput AND gate with the A input inverted:

Fig 10.11 Circuit Equivalent of



Thus you may summarise the Demorgan’s Theorem as follows: 

DeMorgan’s Theorems describe the equivalence between gates with inverted inputs and gates with inverted outputs. Simply put, a NAND gate is equivalent to a Negative-OR gate, and a NOR gate is equivalent to a Negative-AND gate. When “breaking” a complementation bar in a Boolean expression, the operation directly underneath the break (addition or multiplication) reverses, and the broken bar pieces remain over the respective terms. It is often easier to approach a problem by breaking the longest (uppermost) bar before breaking any bars under it. You must never attempt to break two bars in one step! Complementation bars function as grouping symbols. Therefore, when a bar is broken, the terms underneath it must remain grouped. Parentheses may be placed around these grouped terms as a help to avoid changing precedence.

The even and odd properties of ExOR If a given term appears twice in a function connected by ExOR operators, then the two terms will cancel out. This results directly from the basic theorems of the ExOR operator: x  x = 0 and y  0 = y. Consequently the following statements hold for the ExOR gate: x  x. . . x = 0 x  x. . . x = x x  y  z. . . = 0

for an even number of x for an odd number of x if an even number of the variables x,y,z... have the value 1 271


x  y  z. . . = 1

if an odd number of the variables x,y,z... have the value 1

SIMPLIFICATION OF BOOLEAN FUNCTIONS The following two examples will give you some idea of how to use the theorems for simplification of Boolean inclusive OR functions. 1. y = = = =

p’r’ + p’r’ + p’r’ + p’r’(1

pq’ + q’r’ pq’ + q’r’(p + p’) q’r’ = q’r’1 = q’r’(p+p’) pq’ + pq’r’ + p’q’r’ distributive theorem + q’) + pq’(1 + r’) taking out common factors = p’r’ + pq’ 1+q’ = 1, etc. Note that we have used the distributive and commutative laws in two of the steps. The term q’r’ is said to be redundant. This becomes clear when we look at Karnaugh maps. 2. y = r’s + p’q’s + p’qrs + pqr’ = s(r’ + p’q’ + p’qr) + pqr’ distributive theorem Note that the r in the term p’qr is redundant according to the second simplification theorem. Therefore: y = s(r’ + p’q’ + p’q) + pqr’ = s(r’ + p’(q’ + q)) + pqr’ distributive theorem = s(r’ + p’) + pqr’ (q’+q)=1, p’1 = p’ = sr’ + sp’ + pqr’

Minterms, maxterms and canonical forms A concept that we need is the idea of a canonical form for Boolean algebra. A Boolean expression can be expanded by ANDing any term with a missing variable by the sum of that variable with its inverse. Let p be a term in a Boolean expression, then p=p1=p(q+q’). As already shown, this does not alter 272


the value of the expression. If this is carried out for all missing variables and for all terms, the result is the canonical expansion for the expression. This form of the expansion is called the minterm canonical form. For example: A+B = A(B+B’) + B(A+A’) = AB + AB’ + A’B The minterm form is known as the first canonical form, which is a pure OR combination of minterms where a minterm is an AND function that includes each variable once in its normal or complemented form. The first canonical form is also known as the sum of products. A dual form of the expansion is also possible, by expanding the expression into a product of sums. This is known as the maxterm canonical form. The maxterm form is known as the second canonical form, which is a pure AND combination of maxterms where a maxterm is an OR function that includes each variable once in its normal or complemented form. The second canonical form is also known as the product of sums. There are 2 n possible entries for a truth table of n variables. The minterms of an expression correspond with the entries in the truth table for the expression that have the value 1. Since the inverse of a function is found by replacing all 1s with 0s and all 0s with 1s in a truth table for the function, the inverse of a function with m minterms is the remaining (2 nm)minterms. In the following example a shorthand way of writing the minterms has been used. The sigma notation replaces each minterm with a decimal number corresponding to the binary number obtained by 273


replacing each variable with a 0 or 1 depending on whether the variable is primed or not. Since the order of the variables is important for this notation this is shown in parenthesis. Each minterm must of course show the variables in the same order. The following example shows the expansion of a funct i on int o mi nterm s and th e s ubse q ue nt derivation of the inverse of the function. B + A’C = B(A+A’)(C+C’) + A’(B+B’)C = ABC + ABC’ + A’BC + A’BC’ + A’BC + A’B’C = ABC + ABC’ + A’BC + A’BC’ + A’B’C = (ABC)1,2,3,6,7 The inverse of the function is the remaining minterms. ie. (ABC)0,4,5 (B+A’C)’ = AB’C + AB’C’ + A’B’C’ = AB’(C + C’) + (A + A’)B’C’ = AB’ + B’C’ Takin g the in ver se of both sides and using DeMorgan’s theorem with the first and third lines of the right hand side: B + A’C = (A’+B+C’)(A’+B+C)(A+B+C) = (A’+B)(B+C) The right hand side of the first line above is the maxterm canonical form of the expression and the second line is the distributive or Product of Sums form of the expression. The fact that an arbitrary Boolean expression can be expanded into canonical form implies that the algebra derived is complete in the sense that any desired function of the given variables can be represented by it. Hence the AND, OR and Invert operators are sufficient to form a complete Boolean algebra. 274


Karnaugh maps or K-maps are a useful graphic technique to perform the minimization of a canonical form. They utilise Boolean theorems in a mapping procedure which results in a simplified Boolean expression being developed. For example, consider the Karnaugh map for a 2-input AND gate.

Fig 10.12 Making Karnaugh Map

The Karnaugh map comprises a box for every line in the truth table; the binary values above the boxes are those associated with the a and b inputs. Unlike a truth table, in which the input values typically follow a standard binary sequence (00, 01, 10, 11), the Karnaugh map’s input values must be ordered such that the values for adjacent columns vary by only a single bit, for example, 00, 01, 11, and 10. This ordering is known as a gray code, and it is a key factor in the way in which Karnaugh maps work. The y column in the truth table shows all the 0 and 1 values associated with the gate’s output. Similarly, all of the output values could be entered into the Karnaugh map. However, for reasons of clarity, it is common for only a single set of values to be used, typically the 1s. Similar maps can be constructed for 3-input and 4input functions. In the case of a 4-input map, the values associated with the c and d inputs must also be ordered as a gray code; that is, ordered in such 275


a way that the values for adjacent rows vary by only a single bit.

Fig 10.13 Block diagram of Karnaugh map for 3/4 input function

Karnaugh maps often prove useful in the simplification and minimization of Boolean functions. Consider an example 3-input function represented as a black box with an associated truth table. A 0 0 0 0 1 1 1 1

B 0 0 1 1 0 0 1 1

C 0 1 0 1 0 1 0 1

Y 0 1 0 1 1 1 0 0

the values assigned to the y output in the truth table were selected randomly, and have no significance beyond the purposes of this example.The first canonical form is developed from the output 1’s in the truth table. 276


As can be seen, Y is only 1 for the 2nd, 4th, 5th and 6th rows of the truth table. Therefore the minterm (AND function) expressions for these four rows are formed and OR-ed together to give the minterm form for the circuit as Y = (A’.B’.C)+(A’.B.C)+(A.B’.C’)+(A.B’.C) The equation extracted from the truth table in sumof-products form contains four minterms, one for each of the 1s assigned to the output. Algebraic simplification techniques could be employed to minimize this equation, but this would necessitate every minterm being compared to each of the others which can be somewhat time-consuming. This is where Karnaugh maps enter the game. The 1s assigned to the map’s boxes represent the same minterms as the 1s in the truth table’s output column; however, as the input values associated with each row and column in the map differ by only one bit, any pair of horizontally or vertically adjacent boxes corresponds to minterms that differ by only a single variable. Such pairs of minterms can be grouped together and the variable that differs can be discarded.

Fig 10.14 Pair of minterms

In the case of the horizontal group, input a is 0 for both boxes, input c is 1 for both boxes, and input b is 0 for one box and 1 for the other. Thus, for this group, changing the value on b does not affect the value of the output. This means that b is redundant and can be discarded from the equation representing 277


this group. Similarly, in the case of the vertical group, input a is 1 for both boxes, input b is 0 for both boxes, and input c is 0 for one box and 1 for the other. Thus, for this group, input c is redundant and can be discarded. Y = (A’.C)+(A.B’)

RULES OF SIMPLIFICATION The Karnaugh map uses the following rules for the simplification of expressions by grouping together adjacent cells containing ones: 

Groups may not include any cell containing a zero.

Groups may be horizontal or vertical, but not diagonal.

Groups must contain 1, 2, 4, 8, or in general 2 n cells. That is if n = 1, a group will contain two 1’s since 2 1 = 2. If n = 2, a group will contain four 1’s since 2 2 = 4.



Each group should be as large as possible.

Each cell containing a one must be in at least one group.

Groups may overlap.

Groups may wrap around the table. The leftmost cell in a row may be grouped with the rightmost cell and the top cell in a column may be grouped with the bottom cell.

There should be as few groups as possible, as long as this does not contradict any of the previous rules.



consider some 4-input Karnaugh map examples :

Fig 10.15 Example grouping of four adjacent minterm

A combinational circuit is an arrangement of logic gates. This arrangaments takes input from external source and passes on the required output to the external destination. The input and output consist of combination of combination of 1’s and 0’s. A block diagram of a combinational circuit is shown in following figure. A combinational circuit is capable of transforming binary information from the given input data to the 280


required output data. As the input and output, both are digital, these circuits are normally employed in digital systems for controlling decisions and producing results. These circuits when transferred on silicon-chip are called Integerated Circuits.

Fig 10.16 Schematic diagram of Combinational Circuit

A simple circuit of only a few gates is useful in showing how a combinational circuit works. In the circuit shown below, there are but three different gates. As the inputs changes, the output also varies. There are 2 n possible combinations of binary input values for n input variables. The Boolean expressions that define this circuit are X = A’ Y = A’B Z= A’B + C

Fig 10.17 Simple Combinational Circuit

Given a combinational circuit, it is possible to discover the output behavior of the circuit, i.e. r e c on st r u ct t h e t r u t h t abl e t h at c o m p l e t e l y characterize the circuit. This can be done in a number of ways: 

Algebraic Simplification 281


 

Truth Table Construction Simulation

If the digital circuit is accompanied by a verbal explanation of its function, then the Boolean functions or the truth table is sufficient for verification. If the function of the circuit is under investigation then it is necessary to interpret the operation of the circuit from the derived Boolean functions or the truth table.

Analysis Procedures The analysis of a combinational circuit starts with a given logic circuit diagram. The requirement may be to compare the logic circuit with the defined output or interpret the operation of the circuit from the derived Boolean functions or the truth table. The analysis procedure involoves following steps: 

Derivation of Boolean Functions The procedures for algebraic simplification provides an analytic and minimized form for the given circuit. The procedures can be described in the following steps.  From the circuit, identify and label every input.  From the circuit, identify and label every circuit output and every gate output.  Write the relationship for every output using either the actual input variables or the intermediate variables.  Start with the equations for the outputs of the system and eliminate all intermediate variables from the equations until only input variables remain.



Derivation of the Truth Table This method is easier to perform, but results only in a truth table form. The truth table information can be minimized to yield an analytic function if desired. There are three steps in this procedure.  From the circuit, identify and label every input.  From the circuit, identify and label every circuit output and every gate output.  Reconstruct the truth table. Logic Simulation This method is ideal for rapid prototyping or initial look. When the circuit is too complex to analyze by analytic means, any of the circuit simulation package can be used to discover the behavior of the circuit. The steps for this approach is outlined below.  Input the circuit. Many simulation packages allow circuit input by direct scr een captu r e or alte rnat ively by reading a SPICE like file.  Create a system clock. The clock provides a source signal for changing the circuit inputs.  Create a counter. The counter is driven by the clock and provides a binary code equivalent to the variable number for the circuit inputs. The counter will cycle through all possible combinations of the circuit inputs.  Perform the simulation. The last step is to start the circuit simulator. The output of the circuit simulator provides the desired outputs of the circuit for all possible combinations of the circuit 283


inputs, the truth table for the given circuit. Distill the truth table from the simulation results.

Design Procedure The procedures for the synthesis or design of a combinational circuit is just the reverse of that for the analysis of a combinational circuit.

 

Define the input. Based on the problem, define the given input variables. Translate each required input into a Boolean variable. Clearly state what each state of the input variable stands for. Make sure that all required information for determining all the outputs are available. Define the output. Based on the problem, define the given output variables. Translate each required output into a Boolean variable. Clearly state what each state of the output variable stands for. Construct the truth table. Define the truth table for all possible combinations. Simplify the output functions. Minimize the output functions using axioms, K-Maps, or computer programs. Realize the circuit. Select appropriate components to realize the output functions.

HALF ADDER The logic circuits that perform addition within the Arithmetic and Logic Unit (ALU) of the CPU are called adders. A unit that adds two binary digits is called the half adder and the one that adds together three binary digits is called a full adder. A half adder 284


sums two binary digits to give a sum term (S), and a carry term (C), both being Boolean variables. 0 + 0 0

1 + 0 1



+ 1 1 10

+ 1

The addition of two 1-bit numbers results in a 1-bit sum (S) and a 1-bit carry-out (C). A 1 1 0 0

B 1 0 1 0

S 0 1 1 0

C 1 0 0 0

Let’s simplify the above output for two input. For Sum:

Fig 10.18 (a) Truth Table for Half Adder Sum

Therefore S = A’B+B’A = A B product)

(Using Sum of

For Carry

Fig 10.18 (b) Truth Table for Half Adder Carry

Thus C = AB. Thus, Half adder is best described by the two equations: 285


S = A  B C = AB The logic diagram is shown in Fig . It consists of an exclusive OR gate and an AND gate.

Fig 10.19 Logic diagram for Half Adder Carry

FULL ADDER The Half Adder had two inputs and two outputs, i. e., the two numbers to be added, the C and the S. The Full Adder has three inputs and two outputs. The inputs are the two numbers to be added and the carry from a previous addition. The outputs are the Sum and the Carry. 1 1 +1 ___

0 1 +1 ___

1 0 +1 ___

1 1 +0 ___

0 0 +1 ___

1 0 +0 ___

0 1 +0 ___

0 0 +0 ___









Which gives us the following truth table.

Fig 10.20 Truth Table for Full Adder 286


Using Sum of product method for Carry Ca = (A’.B.C)+(A.B’.C)+(A.B.C’)+(A.B.C) Ca = (A’B + A.B’).C + A.B(C+C’) Ca = (A  B).C+A.B Similarly, using Sum of product for Sum Su Su Su Su Su

= = = = =

(A’.B’.C)+(A’.B.C’)+(A.B’.C’)+(A.B.C) (A’.B’ + A.B).C + (A’.B + A.B’).C’ (A’.B+A.B’)’.C + (A’.B + A.B’).C’ (A  B)’.C + (A  B).C’ A  B  C

Using these results we can construct our Full Adder using two ExOR, two AND and an Or gate.

Fig 10.21 Logic diagram for Full Adder

FULL -SUBTRACTOR The full subtractor has three inputs and two outputs.

Fig 10.22 Truth Table for Full Subtractor 287


Whereas one output is the difference(D) between two inputs, the other output is the the next borrow. The three inputs are minuend, subtrhaend and previous borrow. The truth table for the circuit is shown below. The simplified boolean function can be derived using the truth table: D = A  B  C K = A’B + A’C + BC The boolean function for difference is same as that of Sum in Full Adder. Similarly, the output K resembles the function Ca of Full adder with the difference that input variable A is complemented. Thus it is possible to convert a Full Adder circuit to Full subtraction by complementing A before applying it to the gates of Carry output.

DECODERS A decoder converts a binary coded number (n) into 2 n outputs. An output is active when selected by the input. The decoder has n inputs corresponding to the n-bit binary coded number and 2 n outputs. For example, a 4 to 16 bit binary decoder will have four input bits where the value 0 through 15 may be applied. For each input combination one of the 16 outputs will be asserted. i.e. If 1001 is the input string the output associated with 9 will be asserted. The activation of each output is hard coded into circuit. For example, when the input is 00 for a 2bit decoder, the X output is activated by the AND gate with the gate inputs connected to A’B’.



Fig 10.23 Truth Table for Decoders

Here D0 = A’B’, D1 = A’B, D2 = AB’, D3 = AB. the logic circuit will be as given below.

Fig 10.24 Logic diagram for Decoders

Usage of Decoders  

Decode a coded binary number (ab) into individual output (i). Implement a Boolean function. The inputs of the Boolean function are used as the decoder inputs, a and b. The decoder outputs can be used to create the function output. All the decoded outputs that give a 1 output can be ORed together to form the function output.

There are different varieties of decoders manufactured by various vendors. These include  

74139 -Dual 2-to-4 decoders with three inputs and eight corresponding outputs 74138 -Single 3-to-8 decoder with three inputs and eight corresponding outputs 289


74154 -Single 4-to-16 decoder with four inputs and sixteen corresponding outputs

Real components usually have active high inputs and active low outputs. To allow for expansion and better control, real components usually have one or more Enable inputs. Some Enable inputs are active high while other Enable inputs are active low.

ENCODERS An encoder performs the opposite function of a decoder. In its most common implementation, an encoder has 2 n inputs and n outputs. The n outputs are the binary encoding of which input line is 1. Note that we do not specify what happens when more than on input line is high. Since there are so many inputs to consider and the size of our truth table grows exponentially with the number of inputs (which is growing exponentially with the number of outputs), let’s stick to a 4-to-2 encoder. The truth table (partial) is shown in Table.

Fig 10.25 Truth Table for Encoders

Note that we have not supplied rows for every possible input combination. That’s because we don’t know (and don’t care, one could say) what the outputs are when more than one input is 1. We can use the truth table to complete the design in the standard manner. The POS representation for O1 and O2 are: 290


O1 = A’BC’D’ + A’B’C’D O2 = A’B’CD’ + A’B’C’D These can be simplified to O1 = A’C’ O2 = A’B’ Note that this simplification is not simply done by the application of the laws of boolean algebra, but relies on the fact that we don’t care what the output is when more than one line is 1.

Seven Segment Displays A seven display is a device which digital systems uses to display decimal numbers from 0 - 9. A 7segment display contains seven separate LEDs and 1 or 2 decimal points. These LED segments are labeled individually by the letters a,b,c,d,e,f,g.

Fig 10.26 Seven Segment Display

By illuminating certain segments of the seven segment display, the decimal numbers 0 - 9 can be displayed. There are two types of LED 7-segment displays: common cathode (CC) and common anode (CA). The difference between the two displays is the common cathode has all the cathodes of the 7-segments connected directly together and the common anode 291


has all the anodes of the 7-segments connected together.

Fig 10.27 Common Anode LED

As shown above all the anode segments are connected together. When working with a CA seven segment display, power must be applied externally to the the anode connection that is common to all the segments. Then by applying a ground to a particular segment connection (a-g), the appropriate segment will light up. An additional resistor must be added to the circuit to limit the amount of current flowing thru each LED segment.

Fig 10.28 Common Anode Logic Diagram



The above diagram shows the instance when power is applied to the CA connection and segments b & c are grounded causing these two segments to light up. A typical pinout for a seven segment common anode display is shown below.

Fig 10.29 Common Anode Connection

A common cathode seven segment is different from a common anode segment in that the cathodes of all the LEDs are connected together. For the use of this seven segment the common cathode connection must be grounded and power must be applied to appropriate segment in order to illuminate that segment.

Fig 10.30 Common Cathode LED

BCD to Seven Segment Decoder A BCD to Seven Segment Decoder inputs data in BCD form and converts it to a seven segment output. The IC does the decoding that is involved in activating the appropriate segment outputs (a-g) that is 293


required to represent the binary number that is inputed. There are 4 binary inputs to the Decoder and seven output segments (a-g). For example if the BCD number 0100 (4) is inputed into the Decoder, the Decoder must activate outputs (b, c, f, g). (b, c, f, g) must be activated because they combined to form the digit 4.

Fig 10.31 BCD and Seven segment output

A BCD to Seven Segment Decoder that works with a CA Display must produce outputs that are active low. (There is already power being applied externally to the common anode connection. So in order to illumiate a segment a ground must be supplied.) A BCD to Seven Segment Decoder that works with A CC Display must produce outputs that are active high. This is because the common connection to the CC display is tied to ground. Therefore in order to illuminate a segment a high or supply voltage is needed. The diagram above shows a BCD to Seven Segment Decoder that would work with a CC Display. This is because the outputs from the Decoder are active high. After the number 9 most BCD to decimal decoders will display other symbols for the numbers from ten to 15. For a 4 bit input, 1111 (15) is the maximum possible input.



MULTIPLEXERS A multiplexer logically makes the connection from 2 n inputs to a single output. The single output reflects the status of the chosen input according to the selection of the n select lines representing a binary coded number. The output reflects the information carried in the selected input. The selection is chosen by the equivalent binary number (CBA) as indicated by the input select lines. The various types of Multiplexers may include :   

2-to-1 multiplexer 4-to-1 multiplexer 8-to-1 multiplexer

Multiplexes the information from a number of sources into a single output line. All the inputs are Boolean variables, i.e. an input can either be a 0 or 1. Multiplexes also implement a Boolean function. The output combinations of the Boolean function are used as the multiplexer inputs. The Boolean variables are used to select one of the inputs.

Fig 10.32 Logic diagram for Multiplexes

Consider the 4-to-1 multiplexer shown in the Fig. The four input lines are applied to four AND gates sending outputs to a single OR gate. Only one input 295


line has a path to the output at any particular time, which is controlled by lines S 1 and S 0 . The following table displays the combination values of S 1 and S 0 for which various AND gate is selected to have a direct path to output.

Fig 10.33 4-to-1 multiplexer

A multiplexer is also called a data selector since it selects one of multiple input data lines and steers the binary information to the output line.

DEMULTIPLEXERS Demultiplexers is inverse function of a multplexer. It distributes single input to multiple outputs according to the selection inputs. The function of a demultiplexer is to receive binary information from a single source and steer it to any of 2 n outputs under control of the selection lines. A demultiplexer works in an exact opposite direction as a multiplexer. A 1-to-n demultiplexer logically distributes the input to the selected output. The selection is chosen by the input select lines. Since the input select lines only point to a single output, there is never the possibility of more than one out pu t bein g act ive a t one t i m e . W he n t he 296


demultiplexer input is zero, all outputs are zero regar dless of the inpu t sel ecti on. When the demultiplexer input is one, a single output selected by the input select lines is one. All others remain zero. A decoder works as a demultiplexer if the enable line is taken as the data input and the decoder inputs A, B and C are taken as the selection lines.

SEQUENTIAL LOGIC Up to now, we have dealt with combinatorial logic, i.e. the outputs depend only on the current inputs - the outputs disappear when the inputs disappear. In many cases, definitely in a computer, we require retention of state - memory. Digital circuits with memory are called sequential circuits. The essential difference between Combinational Logic (the kind we have seen up to now) and Sequential Logic is simple. The output of some Combinational logic depends solely on the inputs to it at that instant. With sequential logic the output of a logic system depends not only on the state of the inputs and outputs of the various logic gates used, but also on the sequence or order in which things occur. A sequential circuit can be modelled as a separate combinatorial circuit connected to memory or storage, as shown in Figure. The memory elements are devices capable of storing binary information within them. However, this diagram is useful only from a theoretical point of view, and, in practice, the memory and gates are all mixed up.



Fig 10.34 Sequential Circuit

The sequential logic circuits can be divided into two categories - synchronous and asynchronous. A synchronous sequential circuit gives particular signals at discrete instant of time. The asynchronous sequential circuit signals depends upon the order in which its input signals change and can be affected at any instant of time. Asynchronous sequential circuits use time delay devices for as memory elements. These devices takes a finite time for the signal to propogate through the devices. You can also have gate type asynchronous sequential circuits, where memory element is consist of logic gates. Thus, an asynchronous sequential circuit can be regarded as a combinational circuit with feedback, but such circuits become unstable - at times- because of feedback among logic gates. A synchronous sequential logic system employ signals that affect the memory elements only at discrete instants of time. The objective could be 298


achieved by using clock pulses. The clock pulses are provided by some form of astable or pulse generator. In large systems it is probably a crystal-controlled oscillator with a frequency measured in MHz, but for simple systems it could be any astable which produces fast rise and fall times. The objective of clock pulse generator is to synchronize pulses arriving from different clocks. Practically, the synchonization of pulses can be obtained by applying the clock pulses into AND gates along with the signals, which specify the required change in memory elements. The AND gate will transmit the output only when the clock pulses arrival will coincide with each other. Such circuits that use clock pulses in the inputs of memory elements are called clocked sequential circuits. These circuits are stable and their timing is easily broken down into independent discrete steps each of which is considered separately. The memory elements used in clocked sequential circuits are called flip flops. These elements are binary cells capable of storing one bit of information. A flip flop circuit has two outputs, one for the normal value and one for the complement value of the bit stored in it. Binary information can enter a flip flop in a variety of ways, a fact which gives rise to different types of flip flops. Thus, Flip-flop is the common name given to twostate devices which offer basic memory for sequential logic operations. Flip-flops are heavily used for digital data storage and transfer and are commonly used in banks called “registers” for the storage of binary numerical data.



RS FLIP-FLOP The set/reset type flip-flop is triggered to a high state at Q by the “set” signal and holds that value until reset to low by a signal at the Reset input. This can be implemented as a NAND gate latch or a NOR gate latch and as a clocked version.

NOR Gate Latch The NOR gate flip flop actually has two outputs, defined in more general terms as Q and Q’. It should be clear that regardless of the value of Q, its complement is Q. There are two inputs to the flip flop defined as R and S. The S stands for set and the R for reset. It should operate as follows: When set is taken 0, the output should go to 1. When reset is taken 0 the output should go to 0 again.

Fig 10.35 RS Flip flop with NOR-Gate Latch

The concept of a “latch” circuit is important to creating memory devices. The function of such a circuit is to “latch” the value created by the input signal to the device and hold that value until some other signal changes it.

Analysis of Circuit 1.

Assume S = 0, R = 0, Q=0. Thus, NOR gate 1 has (0,0) as input, i.e. Q’ = 1. 300


This 1 goes to NOR gate 2 which now has (1,0) as input, so Q = 0. This is a stable and consistant state.

Fig 10.36 RS Flip-flop




5. 6. 7. 8.

Assume S = 0, R = 0, Q=1. So (0,0) into NOR gate 1 gives Q = 1. And, (1,0) into NOR gate 2 gives Q’ = 1. This is also stable state. Thus, the states Q = Q’ = 0 and Q = Q’ = 1 are inconsistent, so for S = R= 0, Q will remain 0 or 1; it is stable in either state. If we start at Q = 0, and S changes to 1. (1,0) into NOR gate 1 gives Q’ = 0. This 0 goes to NOR gate 2 i.e. (0,0) into gate 2 which gives Q = 1. Thus, setting S to 1 switches the latch from 0 to 1. At Q = 0, setting R to 1 has no effect since (1,0) into NOR gate 2 has the same effect as (1,1). At Q = 1, R = 1; (0,1) into NOR gate 2 gives Q = 0. At Q = 1, S = 1 has no effect. You can verify as exercise. Now only thing remains to be seen is that what happens if S = R = 1, i.e. someone is not using the device correctly? While S, R are held at 1, the only ‘consistent’ output state is Q = Q’ = 0. As soon as one drops, the output 301


goes into the appropriate stable state. If they drop together, then the stable state is chosen randomly. Above analysis can be transformed into Truth table as follows: R S Output 0 0 No Change (Can data storage) 0 1 Q = 1 1 0 Q = 0 1 1 Invalid State

be used for

Timing Diagram The behaviour of a sequential system, even a relatively simple one such as the RS flip flop can be difficult to understand (and even more difficult to describe in words). For this reason we often draw each input and output in graphical form. The four graphs in the Fig. show how the states of the inputs and outputs change as time progresses.

Fig 10.37 Timing diagram for NOR gate latch

We call this a timing diagram. You will see that the set input starts at logic 0. As it is taken to logic 1 302


output Q rises from logic 0 to logic 1 and Q’ falls to logic 0. The set input must fall to logic 0 before reset is taken to logic 1, so that Q can fall to logic 0 and Q’ can rise to logic 1 ready to begin the sequence again.

NAND Gate Latch The NOR gate flip flop actually has two outputs, defined in more general terms as Q and Q’. It should be clear that regardless of the value of Q, its complement is Q. There are two inputs to the flip flop defined as R and S. The S stands for set and the R for reset.

Fig 10.38 NAND gate Latch




If S = 1, R = 1 and Q’ = 1, then NAND gate 1 gives Q = 0. Now this Q goes to NAND gate 2 to give Q’ = 1. Similarly, if S = 1, R = 1 and Q = 0, then NAND gate 2 output gives Q’ = 1. This output goes to NAND gate 1 to give Q = 0. Thus, this is a stable and consistant state. After being set to Q=1 by the low pulse at S (NAND gate function), the restored normal value S=1 is consistent witht the Q=1 state, so it is stable. Another negative pulse on S gives which does not switch the flip-flop, so it ignores further input.



Fig. 10.39 NAND gate latch with Set on

Above analysis can be transformed into Truth table as follows: R S Output 1 1 No Change (Can data storage) 1 0 Q = 1 0 1 Q = 0 1 1 Invalid State

be used for

The timing graph of NAND gate RS flip-flop is as shown below:

Fig 10.40 Timing diagram for NAND gate latch

You will see that the set input starts at logic 1. As it is taken to logic 0 output Q rises from logic 0 to logic 1 and Q falls to logic 0. The set input must rise 304


to logic 1 before reset is taken to logic 0, so that Q can fall to logic 0 and Q can rise to logic 1 ready to begin the sequence again. One disadvantage of the S/R flip-flop is that the input S=R=0 (in NAND) or S = R = 1 (in NOR) gives ambiguous results and must be avoided. A major problem with the S - R flip flop (or bistable) is that when Set = 0 (1 in NOR) and Reset = 0 (1 in NOR), we find that both Q and Q = 1. In such a situation, it is impossible to predict whether the flip-flop will return to its set or reset state. Obviously this ambiguity needs to be avoided and this can be achieved by changing the inputs alternately as shown above. The J-K flip-flop gets around that problem.

Clocked RS Flip-flop In large well designed digital systems it would not be good practice to allow the sequence of events to be determined by individual logic gates, as this leads to problems. Ideally they should all change state at the same time. This is achieved by ‘clocking’ the logic system. A clocked logic system is one which responds to a clock pulse. If the same clock pulse is applied to all bistables at the same time things happen in an orderly rather than haphazard way. As we have seen however a simple S - R bistable does not act reliably when both inputs change simultaneously, so they are rarely used in the form we have looked at so far. A clocked S - R bistable can be made as shown. A clocked S - R flip-flop prevents S and R being passed to the flip flop until the clock pulse is taken high. The finite time between clock pulses allows the outputs to settle before the next change occurs. 305


In order to add clock synchronization to a flip-flop, a ciruit is used to apply the clock pulses to the flipflop. To convert a NAND gate latch to a clocked S/ R flip-flop, two NAND gates may be used as above left to enable an input pulse on either the S or R lines to trigger a transition.

Fig 10.41 Pulse Sterring Circuit

When the signal line S goes high, the other line to the NAND gate from the pulse steering circuit must also be high for it to generate a low output. Likewise, a clock pulse must have the reset NAND gate high to receive a high RESET pulse. Therefore all transitions are synchronized to the clock.

Fig 10.42 NAND gate latch with pulse steering circuit



D FLIP -FLOP As we already discussed about the drawback of RS flip-flop. The value of R and S could not be same as it makes impossible to predict whether the flip-flop will return to its set or reset state. One way to ensure that the S and R inputs are never held at the same logic level (to avoid the problems mentioned above) is to connect the S and R inputs together with an inverter in between. This ensures that S is always the complement of R and vice-versa. This arrangement is called a ‘D-type’ flip flop. It has a single input. The ‘D’ stands for data. The signal on the data input is transferred to the Q output, each time the clock goes to logic 1. The D flip-flop tracks the input, making transitions with match those of the input D. The D stands for “data”; this flip-flop stores the value that is on the data line. It can be thought of as a basic memory cell. A D flip-flop can be made from a set/reset flipflop by tying the set to the reset through an inverter. The result may be clocked.

Fig 10.43(a) The D flip-flop and symbolic representation 307


Fig 10.43(b) The D flip-flop and symbolic representation

When the Trigger is activated, the value on D is transferred to Q (and thus NOT D is transferred to Q’). From then on, it matters not whether D changes, Q and Q’ will hold their values until trigger is activated again. The following is the Truth Table of a D-type FlipFlop. D 0 0 1 1

Q 0 1 0 1

Q 0 1 0 1

Q’ 1 0 1 ignores D 0

As you can see, no matter what happens to D, Q and Q’ are unchanged so long as there is no Clock pulse. In D-type flip-flop, the trigger could be activiated oftenly. The trigger is often activated on a regular interval, hence it is sometimes called the ‘Clock’.

Fig 10.44 Clock pulses in D flip-flop 308


If a trigger occurs between time=t and time=t+1, then we get the following truth table. D 0 0 1 1

Q 0 1 0 1

Q(t+1) 0 0 1 ignores Q(t) 1

The D flip-flop tries to follow the input D but cannot make the required transitions unless it is enabled by the clock. Note that if the clock is low when a transition in D occurs, the tracking transiton in Q occurs at the next upward transition of the clock.

Fig 10.45 Clock pulses in D flip-flop

EDGE- TRIGGERED D FLIP -FLOP Enabling/clocking with a level is uncomfortable for engineers. Edges or transitions are better - they are more clearly defined. Thus, D-type edge triggered, for a circuit.

Fig 10.46 Logic diagram for Edge triggered D Flip Flop 309


The narrow positive spike enables the AND gates for an instant; the narrow negative spike does nothing. The effect is to activate the AND gates during the positive spike, equivalent to sampling the value of D for an instant. At this unique point in time, D and its complement hit the flip flop inputs, forcing Q to set or reset (unless Q already equals D). This kind of operation is called edge triggering because the flip flop responds only when the clock is in transition between its two voltage states. The triggering in above fig occurs on the positive going edge of the clock; this is why it’s referred to as positive edge triggering.

JK FLIP -FLOP The J-K flip-flop is the most versatile of the basic flip-flops. It has the input- following character of the clocked D flip-flop but has two inputs,traditionally labeled J and K. If J and K are different then the output Q takes the value of J at the next clock edge.

Fig 10.47 Clock pulse for JK Flip Flop

A simplified version of the versatile J-K flip-flop is given below. Note that the outputs feed back to the 310


enabling NAND gates. This is what gives the toggling action when J=K=1. The purpose of the J-K Flip-Flop can be best described using the Truth Table for it (a clock occurs between time=t and time=t+1). J 0 0 0 1 1 1 1 1

K 0 0 1 1 0 0 1 1

Q(t) 0 1 0 1 0 1 0 1

Q(t+1) 0 1 0 1 1 1 1 0

The positive going transition (PGT) of the clock enables the switching of the output Q. The “enable” condition does not persist through the entire positive phase of the clock. The J & K inputs alone cannot cause a transition, but their values at the time of the PGT determine the output according to the truth table. This is an application of the versatile J-K flipflop.

Fig 10.48 Switching in J-K Flip-flop

T FLIP-FLOP The T or “toggle” flip-flop changes its output on each clock edge, giving an output which is half the 311


frequency of the signal to the T input. It is useful for constructing binary counters, frequency dividers, and general binary addition devices. It can be made from a J-K flip-flop by tying both of its inputs high.

Fig 10.49 Block Diagram for T Flip-flop



1. 2. 3.

4. 5.




Define the basic logic operations (AND, OR, NOT, NAND, NOR, XOR). Describe the advantages of using NOR and NAND gates compared to AND and OR gates Consider the Boolean function of 3 boolean variables that is true if and only if exactly 1 of the three variables is true. Draw the TT. Draw the logic diagram with AND OR NOT. Draw the logic diagram with AND OR and bubbles. Show that a 2-input NAND is universal. Give truth tables for the following logic funct io ns , and asso ci ate e ach o f t he se functions with a symbolic form shown below which represents the corresponding logic gate. AND, OR, NAND, NOR, NOT, EOR

Demonstrate that all three logic functions, NOT, AND and OR, can be implemented using only NAND gates. Use whatever method you think appropriate to prove that the two logic functions: Z = NOT (X OR Y) Z = NOT (X) AND NOT (Y) are equivalent, where X and Y are two Boolean variables. Give the truth table for the following logic circuit with inputs A and B and output F.




R Q 313




Give the truth table for the following circuit with inputs A 0 and A 1 , and outputs S 0 ~ S 3 , and describe the possible use of this circuit. S0 A0 A1


S1 S2 S3


Work out a Boolean expression to describe each of the following logic systems.





Part of an automated sequence for packing rice in sealed plastic bags is represented by the truth table shown below. count Q 0 Q1 Q2 Q3 Hold bag start Hopper Seal A B open motor opened bag 0 0 1 1 0 0 1 0 1 1 1 0 0 1 1 0 1 0 1 1 0 0 0 1 a) Derive a Boolean expression for each of the output requirements Q 0 to Q 3. b) Draw a complete logic system incorporating all four output functions. Use any of the following gates AND, OR, NOT, NAND, NOR, XOR. In the circuit shown below, the LED lights up when certain switches are closed.

a) b) c) d)

Draw up a truth table for the system. What is the Logic level at the output when the LED lights ? What is the logic level at A when (i) the switch is closed (ii) the switch is open ? State the combination of switches, which when pressed, light the LED. 315





Use De-Morgans theorem to find P if: a) P = A . (B + C’) b) P = A + B . C c) P = (A . B )’+ C’ . D d) P = (A + B)’ . (C + D’) Show that: a) (U + V) . (U + V’) = U b) (( X + Y ).(Y’ . X))’ = X’ c) (W . Z + W)’ = W’ (i) Give the truth table for the following clocked D flip-flop.



C (ii)


Choose correct answer(s) for the question: D flip-flop is typically used to build which of these: (1) register, (2) static RAM, (3) demultiplexer, (4) adder? Complete the following truth table for a 4-bit register with 4 rising-edge-triggered D flipflops, as shown in the diagram. In the diagram, I 3 I 2 I 1 I 0 represents the 4-bit input data, O 3 O 2 O 1 O 0 represents the 4-bit output data, and C is the clock signal. C I 3 I2 I1 I0 O3 O2 O1 O0 0 1 0 1 0 1 0 1 0 0 0 0 0 1 0 0 0 1 1 1 0 1 1 1 0 1 1 1 1 1 1 0 0 0 0 1 1 0 0



I3 I


. 17.



I2 D C



I1 D C








O3 O2 O1 O (a) Draw a block diagram for a one-bit full adder: a rectangle with the (three) inputs coming in at the top, and the (two) outputs emerging from the bottom. (b) Hence, or otherwise, draw a block diagram for a two-bit full adder. (c) Hence, or otherwise, draw a block diagram for an n-bit full adder - who only the lower two components, and the top one. Design a circuit that outputs a ‘1’ if the 4-bit input is composite, and a ‘0’ if it is prime. (A prime number simply defined as a number that is divisible by one and itself, and one is not prime.) Show the following work: i) the truth table for this function ii) the corresponding K-map with circled product terms using technique described above, iii) the SOP expression derived from the Kmap, iv) a logic circuit that implements this expression, using inverters, ANDs and ORs of the 2- and/or 3-input variety. Use K-maps to implement a two-bit arithmetic adder (i.e. design a circuit). There should be four input lines (two two-bit numbers), and 317


20. 21.

three output lines. Make sure to show all work clearly and neatly (truth tables, etc.) Describe the operation of S-R, T, D, and J-K latches and flip-flops Draw timing diagrams of circuits containing latches and flip-flops.


Chapter 11


Registers & Counters A clocked sequential circuit consists of a group of flip flops and combinational gates connected to form a feedback path. The flip flops are essential because, in their absence, the circuit reduces to a purely combinational circuit (provided there is no feedback path). A circuit with only flip flops is considered a sequential circuit even in the absence of combinational gates. An MSI circuit that contains storage cells within it is, by definition a sequential circuit. MSI circuits that include flip flops or other storage cells are usually classified by the function they perform rather than by the name “sequential circuit”. These MSI circuits are classified in one of three categories: registers, counters, or random access memory. This chapter presents various registers and counters available in IC form and explains their operation. The organization of the random access memory is also presented. A group of flip flops constitutes a register, since each flip flop is a binary cell capable of storing one bit of information. An n-bit register has a group of n flip flops and is capable of storing any binary information containing n bits. In addition to the flip flops, a register may have combinational gates that perform certain data processing tasks. In its broadest definition, a register consists of a group of flip flops and gates that effect their transition. The flip flops hold binary information and the gates control when and how new information is transferred into the register.


A counter is essentially a register that goes through a predetermined sequence of states upon the application of input pulses. The gates in a counter and connected in such a way as to produce a prescribed sequence of binary states in the register. Although counters are a special type of register, it is common to differentiate them by giving them a special name. A memory unit is a collection of storage cells together w i t h as soc i a t e d ci r c u i t s nee de d t o t r a n s f e r information in and out of storage. A random access memory (RAM) differs from a read only memory (ROM) in that a RAM can transfer the stored information out (read) and is also capable of receiving new information in for storage (write). A more appropriate name for such a memory would be read write memory. Registers, counters, and memories are extensively used in the design of digital systems in general and digital computers in particular. Registers can also be used to facilitate the design of sequential circuits. Counters are useful for generating timing variables to sequence and control the operations in a digital system. Memories are essential for storage of programs and data in a digital computer. Knowledge of the operation of these components is indispensable for the understanding of the organization and design of digital systems.

A register is simply a group of flip flops that can be used to store a binary number. Shift registers are a type of sequential logic circuit, mainly for storage of digital data. They are a group of flip-flops connected in a chain so that the output from one flip-flop becomes the input of the next flip-flop. Most of the 321


registers possess no characteristic internal sequence of states. All the flip-flops are driven by a common clock, and all are set or reset simultaneously. The first method involves shifting the data 1 bit at a time in a serial fashion, beginning with either the MSB or the LSB. This technique is referred to as serial shifting. The second method involves shifting all the data bits simultaneously and is referred to as parallel shifting. There are two ways to shift data into a register (serial or parallel ) and similarly two ways to shift the data out of the register. This leads to the construction of four basic register types. Here, the basic types of shift registers are studied as shown in the following Fig, SISO (serial in/serial out), SIPO (serial in/parallel out), PISO (parallel in/serial out) and PIPO (parallel in/parallel out), and bidirectional shift registers. All of these configurations are commercially available as TTL MSI/LSI circuits. For instance:     

Serial in serial out -54/74L91, 8 bits Serial in parallel out -54/74164, 8 bits Parallel in serial out -54/74165, 8 bits Parallel in Parallel out - 54/74194, 4 bits Parallel in parallel out -54/74198, 8 bits.

Fig 11.1 Serial In - Serial Out



Fig 11.2 Serial In - Parellel Out

Fig 11.3 Parellel In - Parellel Out

Fig 11.4 Parllel in - Parllel Out

SERIAL IN -SERIAL OUT The flip flops used to construct registers are usually either JK or D types. So, let’s begin by summarizing the operation of a D flip flop. 323


You can construct a four-bit shift register using four D flip-flops, as shown below. The operation of the circuit is as follows. The register is first cleared, making all four outputs to zero. The input data is then applied sequentially (one by one) to the D input of the first flip-flop on the left (FF0). During each clock pulse, one bit is transmitted from left to right. Assume a data word to be 1001. The least significant bit (right most) of the data will be shifted through the register from FF0 to FF3.

Fig 11.5 Logic diagram for Serial In Serial Out Register

Fig 11.5 Movement of bit in SISO

In order to get the data out of the register, it is shifted out sequentially (one by one). This can be done destru ct ivel y o r no n-dest r uc tiv el y . F or destructive readout, the original data is lost and at the end of the read cycle, all flip-flops are reset to zero. To avoid the loss of data, an arrangement for a nondestructive reading can be done by adding two AND gates, an OR gate and an inverter to the system. The construction of this circuit is shown The data is loaded to the register when the control line is HIGH (ie WRITE). The data can be shifted out of the register when the control line is LOW (ie READ). This is shown in the following figures: 324


Fig 11.6 Avoiding Dsta loss in SISO

Fig 11.7 Modified movement of bit

You can also use a JK flip flop in SISO Register. The data bit to be shifted into the flip flop must be present at the J and K inputs when the clock transitions (low or high). Since the data bit is either a 1 or a 0, there are two possible cases. 1. 2.

To shift a 0 into the flip flop, J=0 and K=1. To shift a 1 into the flip flop, J=1 and K=0.

The important point to note is that the J and K inputs must be controlled to provide the correct input data. The J and K logic levels may be changing while the clock is high (or low), but they must be steady from just before until just after the clock transition. Clearly, K=J, or J=K. In other words, one signal is always the complement of the other. Thus, one data signal at D could be replaced by a JK Flip Flop having the same input at J and its inverted input at K as shown in following Fig.



Fig 11.8 Equivalent JK Flip Flop

SERIAL IN-PARALLEL OUT The second type of register is one in which data is shifted in serially, but shifted out in parallel. In order to shift the data out in parallel, it is simply necessary to have all the data bits available as outputs at the same time. This is easily accomplished by connecting the output of each flip flop to an output pin. For instance, an 8 bit shift register would have eight output lines-one for each flip flop in the register. For this kind of register, data bits are entered serially in the same manner as discussed in the last section. The difference is the way in which the data bits are taken out of the register. Once the data are stored, each bit appears on its respective output line, and all bits are available simultaneously. A construction of a four-bit serial in - parallel out register is shown below.

Fig 11.9 Logic diagram of JK Flip Flop



Shifting data into the register in a serial fashion is exactly the same as the previously discussed. Data at the serial inputs may be changed while the clock is either low or high, but the usual setup and hold times must be observed. The data sheet for this device gives setup time as 30ns minimum and hold time as 0.0 ns. Since data are shifted into the register on positive clock transitions, the data input line must be stable from 30ns before the positive clock transition until the clock transition is complete.

PARALLEL IN-SERIAL OUT In above two cases, the sequential (one by one) shifting of data into and out of a register has been discussed. We can now use these same ideas to develop methods for the parallel entry of data into a register. A four-bit parallel in - serial out shift register is shown below. The circuit uses D flip-flops and NAND gates for entering data (ie writing) to the register.

Fig 11.10 Logic diagram for PISO

D0, D1, D2 and D3 are the parallel inputs, where D0 is the most significant bit and D3 is the least significant bit. To write data in, the mode control line is taken to LOW and the data is clocked in. The data can be shifted when the mode control line is 327


HIGH as SHIFT is active high. The register performs right shift operation on the application of a clock pulse.

PARALLEL IN-PARALLEL OUT The fourth type of register is designed such that data can be shifted either into or out of the register in parallel. For parallel in - parallel out shift registers, all data bits appear on the parallel outputs immediately following the simultaneous entry of the data bits. The following circuit is a four-bit parallel in - parallel out shift register constructed by D flip-flops.

Fig 11.11 Logic diagram for PIPO

The D’s are the parallel inputs and the Q’s are the parallel outputs. Once the register is clocked, all the data at the D inputs appear at the corresponding Q outputs simultaneously.

BIDIRECTIONAL SHIFT REGISTERS The registers discussed so far involved only right shift operations. Each right shift operation has the effect of successively dividing the binary number by two. If the operation is reversed (left shift), this has the effect of multiplying the number by two. With 328


suitable gating arrangement a serial shift register can perform both operations. A bidirectional, or reversible, shift register is one in which the data can be shift either left or right. A four-bit bidirectional shift register using D flipflops is shown below.

Fig 11.12 Bi-directional Shift Register

Here a set of NAND gates are configured as OR gates to select data inputs from the right or left adjacent bistables, as selected by the LEFT/RIGHT control line.

APPLICATIONS Shift registers can be found in many applications. Here is a list of a few.

To produce time delay The serial in -serial out shift register can be used as a time delay device. The amount of delay can be controlled by:  

the number of stages in the register the clock frequency

To simplify combinational logic The ring counter technique can be effectively utilized to implement synchronous sequential circuits. A 329


major problem in the realization of sequential circuits is the assignment of binary codes to the internal states of the circuit in order to reduce the complexity of circuits required. By assigning one flip-flop to one internal state, it is possible to simplify the combinational logic required to realize the complete sequential circuit. When the circuit is in a particular state, the flip-flop corresponding to that state is set to HIGH and all other flip-flops remain LOW.

To convert serial data to parallel data A co mputer or microprocessor- ba sed sy stem commonly requires incoming data to be in parallel forma t. But f req uentl y , these sy ste ms must communicate with external devices that send or receive serial data. So, serial-to-parallel conversion is required. As shown in the previous sections, a serial in - parallel out register can achieve this.

COUNTERS A register that goes through a predetermined sequence of states upon the application of input pulses is called a counter. The input pulses may be clock pulses or may originate from an external source. They may occur at uniform intervals of time or at random. Counters are found in almost all equipment containing digital logic. They are used for counting the number of occurrences of an event and are useful for generating timing signals to control the sequence of operations in digital computers. The sequence of state of a counter may follow a binary count or any other sequence. A wide variety of different types of counters are available in integrated circuit packages.



Coun ters may be oper ated synchronous ly or asynchronously. The signals that affect the flip flops in an asynchronous counter are generated in output transitions of other flip flops. Asynchronous counters are sometimes called ripple counters. This is because flip flop transitions ripple through from one flip flop to the next in sequence until all flip flops reach a new state. In a synchronous counter, all the flip flops receive the same clock pulse and as a consequence, all flip flops change state synchronously with the pulse. A counter circuit will usually employ flip flops with complementing capabilities. Both T type and JK type flip flops have this property. The flip flop in a binary counter that holds the low order bit is complemented with every clock pulse. Every other flip flop in the register is complemented if and only if all its lower order flip flops contain 1’s. Following could be the possible types of Counters :      

Asynchronous (Ripple) Counters Asynchronous Decade Counters Asynchronous Up-Down Counters Synchronous Counters Synchronous Decade Counters Synchronous Up-Down Counters

ASYNCHRONOUS (RIPPLE) COUNTERS A two-bit asynchronous counter is shown in the Fig. Here, the external clock is connected to the clock input of the first flip-flop (FF0) only. So, FF0 changes state at the falling edge of each clock pulse, but FF1 changes only when triggered by the falling edge of the Q output of FF0. Because of the inherent propagation delay through a flip-flop, the transition of the input clock pulse and a transition of the Q 331


output of FF0 can never occur at exactly the same time. Therefore, the flip-flops cannot be triggered s im u l tan eou sl y, p ro du ci ng an as y nchr o no u s operation. For simplicity, the transitions of Q0, Q1 and CLK in the timing diagram above are shown as simultaneous even though this is an asynchronous counter. Actually, there is some small delay between the CLK, Q0 and Q1 transitions. Normally, all the CLEAR inputs are connected together, so that a single pulse can clear all the flipflops before counting starts. The clock pulse fed into FF0 is rippled through the other counters after propagation delays, like a ripple on water, hence the name Ripple Counter. The 2-bit ripple counter circuit shown above has four different states, each one corresponding to a count value. Similarly, a counter with n flip-flops can have 2 n states. The number of states in a counter is known as its mod (modulo) number. Thus a 2-bit counter is a mod-4 counter.

Fig 11.13 Asynchronous Counters 332


A mod-n counter may also described as a divide-byn counter. This is because the most significant flipflop (the furthest flip-flop from the original clock pulse) produces one pulse for every n pulses at the clock input of the least significant flip-flop (the one triggers by the clock pulse). Thus, the above counter is an example of a divide-by-4 counter. The following is a three-bit asynchronous binary counter and its timing diagram for one cycle. It works exactly the same way as a two-bit asynchronous binary counter mentioned above, except it has eight states due to the third flip-flop.

Fig 11.14 Three bit asynchorous binary counter

Fig 11.15 Three bit asynchorous binary counter binary counter

ASYNCHRONOUS DECADE COUNTERS The binary counters previously introduced have 2 n states. But counters with states less than this number are also possible. They are designed to have the number of states in their sequences, which are 333


called truncated sequences. These sequences are achieved by forcing the counter to recycle before going through all of its normal states. A common modulus for counters with truncated sequences is ten. A counter with ten states in its sequence is called a decade counter. The circuit below is an implementation of a decade counter.

Fig 11.16 Asynchronous Decade Counter

Once the counter counts to ten (1010), all the flipflops are being cleared. Notice that only Q1 and Q3 are used to decode the count of ten. This is called partial decoding, as none of the other states (zero to nine) have both Q1 and Q3 HIGH at the same time. The sequence of the decade counter is shown in the table below:

Fig 11.17 Truth Table for Asynchorous Decade Counter



ASYNCHRONOUS UP-DOWN COUNTERS In certain applications a counter must be able to count both up and down. The circuit below is a 3-bit up-down counter. It counts up or down depending on the status of the control signals UP and DOWN. When the UP input is at 1 and the DOWN input is at 0, the NAND network between FF0 and FF1 will gate the non-inverted output (Q) of FF0 into the clock input of FF1. Similarly, Q of FF1 will be gated through the other NAND network into the clock input of FF2. Thus the counter will count up.

Fig 11.18 Logic Circuit for Asynchronous Up-down Counter

When the control input UP is at 0 and DOWN is at 1, the inverted outputs of FF0 and FF1 are gated into the clock inputs of FF1 and FF2 respectively. If the flip-flops are initially reset to 0’s, then the counter will go through the following sequence as input pulses are applied. You may note that an asynchronous up-down counter is slower than an up counter or a down counter because of the additional propagation delay introduced by the NAND networks.



Fig 11.19 Truth Table for Asynchronous Up-down Counter

SYNCHRONOUS COUNTERS In synchronous counters, the clock inputs of all the flip-flops are connected together and are triggered by the input pulses. Thus, all the flip-flops change state simultaneously (in parallel). The circuit below is a 3-bit synchronous counter. The J and K inputs of FF0 are connected to HIGH. FF1 has its J and K inputs connected to the output of FF0, and the J and K inputs of FF2 are connected to the output of an AND gate that is fed by the outputs of FF0 and FF1.

Fig 11.20 Logic Circuit for Synchronous Counter

Pay attention to what happens after the 3rd clock pulse. Both outputs of FF0 and FF1 are HIGH. The positive edge of the 4th clock pulse will cause FF2 to change its state due to the AND gate.



Fig 11.21 Clock Pulse for Synchronous Counter

SYNCHRONOUS DECADE COUNTERS Similar to asynchronous decade counter, the synchronous decade counter counts from 0 to 9 and then recycles to 0 again. This is done by forcing the 1010 state back to the 0000 state. This so called truncated sequence can be constructed by the following circuit.

Fig 11.22 Logic Circuit for Synchronous Decade Counter

Fig 11.23 Truth Table for Synchronous Decade Counter 337


From the sequence above, we notice that:    

Q0 toggles on each clock pulse. Q1 changes on the next clock pulse each time Q0=1 and Q3=0. Q2 changes on the next clock pulse each time Q0=Q1=1. Q3 changes on the next clock pulse each time Q0=1, Q1=1 and Q2=1 (count 7), or when Q0=1 and Q3=1 (count 9).

These characteristics are implemented with the AND/OR logic connected as shown in the logic diagram above.

SYNCHRONOUS UP-DOWN COUNTERS A circuit of a 3-bit synchronous up-down counter and a table of its sequence are shown below. Similar to an asynchronous up-down counter, a synchronous up-down counter also has an up-down control input. It is used to control the direction of the counter through a certain sequence.

Fig 11.24 Logic Gates for Synchronous Up-down Counter

An examination of the sequence table shows:  

for both the UP and DOWN sequences, Q0 toggles on each clock pulse. for the UP sequence, Q1 changes state on the next clock pulse when Q0=1. 338


for the DOWN sequence, Q1 changes state on the next clock pulse when Q0=0.

Fig 11.25 Truth Table for Synchronous Up-Down Counter

 

for the UP sequence, Q2 changes state on the next clock pulse when Q0=Q1=1. for the DOWN sequence, Q2 changes state on the next clock pulse when Q0=Q1=0.

These characteristics are implemented with the AND, OR & NOT logic connected as shown in the logic diagram above.

APPLICATIONS OF COUNTERS Digital counters are very useful in many applications. They can be easily found in digital clocks and parallel-to-serial data conversion (multiplexing). In this section, we will use the later as an example on how counters are being used. A group of bits appearing simultaneously on parallel lines is called parallel data. A group of bits appearing on a single line in a time sequence is called serial data. Parallel-to-serial conversion is normally accomplished by the use of a counter to provide a binary sequence for the data-select inputs of a multiplexer, as illustrated in the circuit below.



Fig 11.26 Parllel to Serial data conversion Logic

The Q outputs of the modulus-8 counter are connected to the data-select inputs of an eight-bit multiplexer. The first byte (eight-bit group) of parallel data is applied to the multiplexer inputs. As the counter goes through a binary sequence from 0 to 7, each bit beginning with D0, is sequentially selected and passed through the multiplexer to the output line. After eight clock pulses, the data byte has been converted to a serial format and sent out on the transmission line. Then, the counter recycles back to 0 and converts another parallel byte sequentially again by the same process.

Multivibrators are oscillators that produce digital signals. Oscillators are electronic circuits that generate an output signal that changes its form, usually without an input signal. There are many different types of oscillators and they may produce sine waves, pulses, square waves, triangular waves, 340


or sawtooth waves. The following are examples of different types of oscillator signals.

Fig 11.27 Different type of Oscillator signals

Oscillators have many uses. They generate clock or timing signals for digital systems such as computers. They also provide reference frequencies for radio transmitters and receivers and they keep the time inside digital watches. There are two types of oscillators.

Sinusoidal oscillators. This type generates a waveform like a sine wave.

Relaxation oscillators. This is the type used in digital electronics because it generates rectangular pulses. Those that generate sawtooth, peaked waveforms are also in this category. For digital electronics circuits the frequency of the clock signal must be stable and very accurate. The crystal-controlled oscillator has these characteristics. The quartz crystal in the oscillator generates the signal by means of the piezoelectric effect. Shown below is a schematic diagram using two inverters. 341


Now that we know what oscillators are, let’s return our thoughts back to multivibrators. There are three types of multivibrators.

Astable Multivibrator This multivibrator is also called a free-running signal or a clock signal.

Fig 11.28 Crystal Controlled Oscillator

Bistable Multivibrator This multivibrator is also called a flip-flop or a latch. This multivibrator has two stable states. It remains in one of the states until a trigger is applied. It then flips to the other state and remains there until another trigger pulse is applied.

Fig 11.29 Diagram shows three input trigger pulses that changes the output state three times. After the third pulse, the output remains high

Monostable Multivibrator



This multivibrator is also called a one-shot. An input signal called a trigger is applied to the oneshot causing the output of the one-shot Q to go high for a certain amount of time. The amount of time Q goes high depends on an external resistor and capacitor added to the circuit. This circuit is used to delay, reshape, and/or eliminate mechanical switch bounce.

MONOSTABLE MULTIVIBRATORS A Monostable Multivibrator is also called a oneshot. This multivibrator produces a single pulse that stays high or low for a fixed amount of time. An input signal called a trigger must be applied to activate the one-shot. The amount of time that the pulse stays high or low depends on external resistors and capacitors to the one-shot. This device is used to delay, reshape, and/or eliminate mechanical switch bounce.

Fig 11.30 Diagram shows a short input trigger pulse producing a long output pulse and then returning to its original state

There are two types of one-shots. Retriggerable oneshots allow the one-shot to be fired while the output is still activated. This allows the output to stay activated for a longer time that the device was configured for. A non-retriggerable one-shot cannot be retriggered while the output is activated. For this one-shot the output must complete it’s cycle, return to it’s resting state and then be triggered again.



Shown below is a schematic diagram of a monostable multivibrator built with transistors. One transistor will normally be on and the other transistor will normally be off. The state changes when a pulse is triggered. The transistor which is normally on goes into cutoff while the other transistor turns on and begins conducting. This condition exists only for a short period of time. After this the circuit then returns to it’s original state until another pulse is triggered.

Fig 11.31 Monostable Multivibrator using transistor

The nex t sch em a t i c d i ag r am i s f o r a n o t he r monostable multivibrator. This one uses NAND gates. LEDs as used to display the input and output signals for the one-shot.

Fig 11.32 Multivibrator using NAND Gate 344


The red LED represents the input signal and the green LED represents the output signal. As shown by the waveform, the green LED will light up after an input trigger pulse is applied. After a certain amount of time, depending on the value of the capacitor, the green LED will turn off.

ASTABLE MULTIVIBRATORS A astable multivibrator is also called a free-running or clock signal. This multivibrator has no stable state. It is an oscillator circuit that generates a continuous flow of digital pulses that switches back and forth between two states while providing a square edge signal output. Clocks used in computer circuits are considered astable multivibrators.

Fig 11.33 Diagram show the output constantly changing from a high to a low state. Output is not stable and does not stay in one state

Shown below is a schematic diagram of an astable multivibrator built using transistors. One transistor is normally on and the other transistor is normally off. The states of both transistors change continuously because of the charging and discharging of the two capacitors. The output signal may be taken from the collector of either transistors. The next schematic diagram shows a astable multivibrator, that is constructed using NAND gates and inverters. Two output signals are shown and are opposites of each other.



Fig 11.34 Astable Multivibrator using Transistor

Fig 11.35 Astable Multivibrator using NAND gates and Inverters




Frequency Frequency is a measurement of the number of complete cycles per second that a signal contains. The units of frequency is the hertz (Hz). In the diagram above, five cycles are completed in one second. Therefore the frequency is 5 Hz.

Period Period (T) is the time required to complete one cycle. In the diagram above, it takes 0.2 seconds to complete one cycle, therefore the period is .2 seconds. Because frequency ( f ) and time ( t ) are inverses of each other, the following formulas can be used to calculate one from the other. f = 1/t



Duty Cycle Duty cycle is a measurement of the percent of time the signal is high divided by the total period of the signal. The formula is: Duty Cycle = Time Signal in High State x 100/ Period of Cycle

Fig 11.36 The graph showing the various associated terms with clock

555 IC Timer as a Clock Signal Timing or synchronization is very crucial to most electronic devices and systems. This is because timing is essential in maintaining the proper sequencing of events. There are many ICs designed and manufactured specifically to accomplish this task. One of the most popular of these ICs is the 555 Timer. Shown below is the pinout diagram of the 555 Timer IC.

Fig 11.37 8 Pin DIP 555 Timer



Fig 11.38 555 Timer configure to output a clock signal

The diagram above shows the 555 I C Timer configured to output a clock signal. The clock frequency is determined by the formula: F = 1.44/((R1 + 2*R2)*C) F = 1.44/((1K + 2*470)*1uF)= 742 Hz

A Digital to Analog converter, converts information in digital form to analog form. Both the digital information and the analog information represents the same data but differ in form that the information is saved and presented. The operation of a D/A converter is similar to that of a language translator that is used to convert one language to another.

Fig 11.39 Digital Analog Converter



A typical D/A converter will accept data in digital binary form and convert it to a continuous representation of that data in analog form. Sampling rate is a measure of how fast a D/A converter can receive data and convert that data to analog form. The sampling rate depends on two things. It depends on how fast the information can be received by the D/A converter and how fast the D/A converter can process the information. The units for sampling rate is cycles per second or Hz. D/A Converters are used by many digital processing devices such as computers. D/A converters are used by computers to communicate with the outside analog world. Many external devices require information to be inputed to them in analog form. Also many communication systems transmit information in analog form and would need a D/A Converter to convert the digital signals of a computer to analog form. A Modem is one such device.

Inputs and Outputs of DAC D/A converters are used by computers to communicate with the outside analog world. Many external devices require information to be inputed to them in analog form. Also many communication systems transmit information in analog form and would need a D/A Converter to convert the digital signals of a computer to analog form. A Modem is one such device. E.g.

Determine the output of a 8-bit D/A Converter with a bit resolution of .2V and a binary input of 01101101. To determine the analog output voltage, we simply multiply the bit resolution by the binary input. 349


0.2V * 119 = 23.8V To obtain the range of output voltages for the system would look at the smallest and largest possible inputs (00000001 - 11111111). The analog equivalents would be: 0.2V * 1 = .2V to 0.2V * 255 = 51V

OP-AMP The operational amplifier (op-amp) is a IC that can be configured in various voltage gain configurations. The 741 is the most commonly used OP-AMP IC. The pin-out for a 741 is shown below:

Fig 11.40 Pin out for 741

Fig 11.41 Logic Circuit for Op-amp

One of the most commonly used configuration for the op-amp is the summing amplifier. The summing 350


op-amp amplifier is able to sum and amplify various input voltages. A summing op-amp configuration is shown below: The resistors shown in the diagram are use to determine the gain of the amplifier. The gain can be set differently for each input. The formula for the output voltage of a summing amplifier is: Vout = - ((Rf/R1)*Vin1 + (Rf/R2)*Vin2 + (Rf/R3)*Vin3 +...+ (Rf/Rn)*VinN )

As the name suggests, an analog to digital converter takes analog input signal and converts it to a digital signal. This is the way that a digital cell phone takes a person’s voice and prepares it to be sent via a digital wireless link. If on wishes to use an analog input to a robot, an A/D converter is required.. An analog to digital converter performs a process called sampling and quantization. It begins by taking a reading of the analog signal at a certain time (sampling). This reading is can still take on an infinite range of data, though. The A/D then rounds the data to the nearest value representable by the number of bits used. ADC inputs are almost always voltages (as opposed to currents), and may take any value within the ADC’s specified range. For example, if the ADC is specified to handle +/-10 Volts, an analog input of +1.234567 Volts is perfectly valid. The analog input can thus have “infinite” resolution, but the ADC output will be limited according to the number of bits it can use to represent the value. If the ADC has 8 bits, for example, it can only encode 256 possible values (2 8 = 256). If these must handle the entire +/-10 Volt range (20 Volts), then resolution 351


will be 20 / 256 or 0.078125 Volts at best. So our analog input example might be encoded as 15/256 * 20 = 1.171875 Volts, or maybe as 16/256 * 20 = 1.250000 Volts, but it it will never be “exact”. The difference is called “quantization error”, and can be reduced by using an ADC with more bits. Most modern ADC boards have 12 or 16 bits. On a command from the computer, a timer, or an external source, the ADC will “sample” the input voltage very briefly and hold that value as a charge on a capacitor, using a circuit called a “Sample and Hold” (S/H) or “Track and Hold” amplifier. During the “hold” time, the held analog voltage is converted to a digital number by any of several me an s. The m ost co m m on m et ho d is c al le d “successive approximation”, wherein a trial number is converted back to an analog voltage with a Digital to Analog Converter (DAC) and compared to the held input. The trial number is increased or decreased as needed and the final number is reported as the ADC output.

WORKING OF ADC The typical A/D converter uses some variation of a successive approximation scheme to determine what the input voltage is. This process uses a digital to analog converter (DAC, described below) and compares the output of theDAC to the input signal. The procedure works as follows. The A/D converter sets the highest order bit on the D/A to 1 and all other bits to 0. It then compares the DAC output voltage to the input signal (using an analog comparator). If the input is higher than the DAC signal, the bit is left at 1, if the input is lower the bit it set to 0. Then the procedure is repeated with the next lower order bit leaving the higher order bit(s) 352


with the previously determined value(s). Thus the digital value of the input signal is successively approximated until finally the least significant bit (LSB) is determined and the conversion is complete. This process is all controlled by a clock that must run at the number of bits times the maximum sampling frequency (at least). This is why for a given clock speed, a conversion with more bits takes longer. A DAC is a much simpler device which essentially consists of a summing amplifier with an input for each bit. When a bit is set the summing amplifier adds in the voltage corresponding to that bit. This process operates at the speed at which the summing amplifier can settle (reach a stable output value), which is extremely short compared to the time an A/ D conversion takes with its iterative successive approximation process. Here are some A/D types:

Flash Analog-to-Digital Converter Flash Analog-to-Digital Converters are used for systems that need the highest speeds available. Some applications of flash ADC include radar, high speed test equipment, medical imaging and digital communication. The difference with this and other types of ADC is that the input signals are processed in a parallel method. Flash converters operate by simultaneously comparing the input signal with unique reference levels spaced 1 least significant bit apart. This requires many front-end comparators and a large digital encoding section. Simultaneously, each comparator generates an output to a priority encoder which then produces the digital representation of the input signal level. In order for this to work you have to use one comparator for each least significant bit. Therefore, a 8-bit flash



converter requires 255 comparators along with high speed logic to encode the comparator outputs.

Fig 11.42 Basic Architecture of Flash ADC

CMOS Flash ADC There are two types of Flash ADC where one is bipolar and the other is CMOS. The difference is in how the front end of the comparators are created. CMOS is used for the ease of using analog switches and capacitors. CMOS flash converters can equal the speed of all except the bipolar designs with emitter-coupled logic. The advantage of using CMOS is that the power consumption is less with the N and P channels.

Bipolar Flash ADC Using Bipolar components gives a different frequency response limitation due to the transistors. Using buffers are used to prevent the input and reference signal from excessive comparator loading. These buffers responsible for the dynamic performance of ADC. Although it is possible to use TTL or CMOS, ECL (emitter-coupled logic) is used for the highest 354


speed. The high speed is possible by using ECL for the encoding stage which requires a negative supply voltage. This means that the bipolar comparators also need a negative supply voltage. ECL is faster because is keeps the logic transistors from operation in the saturated state (restricted to either cutoff or active). This eliminates the charge storage delays that occur when a transistor is driven in the saturated mode.

Tracking Analog-to-Digital Converter Tracking uses a up down counter and is faster that the digital ramp single or multi-slope ADC because the counter is not reset after each sample. It tracks analog input hence the name tracking. In order for this to work the output reference voltage should be lower than the analog input. When the comparator output is high the counter is in counting up mode of binary numbers.

Fig 11.43 An 8 -bit tracking ADC

This as a result increases stair step reference voltage out until the ramp reaches the input voltage amount. When reference voltage equals the input voltage the 355


comparators output is switched to low mode and starts counting down. If the analog input is decreasing the counter will continue to back down to track input. If the analog input is increasing the counter will go down one count and resume counting up to follow the curve or until the comparison occurs.

Single-Slope Analog-to-Digital Converter Single-slope ADCs are appropriate for very high accuracy of high-resolution measurements where the input signal bandwidth is relatively low. Besides the accuracy these types of converters offer a lowcost alternative to others such as the successiveapproximation approach. Typical applications for these are digital voltmeters, weighing scales, and process control. They are also found in batterypowered instrumentation due to the capability for very low power consumption. The name implies that single-slope ADC use only one ramp cycle to measure each input signal. The single-scope ADC can be used for up to 14-bit accuracy. The reason for only 14-bit accuracy is because single-slope ADC is more susceptible to noise. Because this converter uses a fixed ramp for comparing the input signal, any noise present at the comparator input while the ramp is near the threshold crossing can cause errors. The basic idea behind the single slope converter is to time how long it takes for a ramp to equal and input signal at a comparator. Absolute measurements require that an accurate reference (Vref) matching the desired accuracy be used for comparing the time with the unknown input measurement. Therefore the input unknown (Vun) can be determined by: Vun = Vref(Tun/Tref) 356


Where the ration is directly proportional to the difference in magnitudes. The main part of the single-slope analog to digital converter is the ramp voltage required to compare with the input signal. If the ramp function is highly linear then the system errors will be completely cancelled. Since each input is measured with the same ramp signal and hardware, the component tolerances are exactly the same for each measurement. Regardless of the initial conditions or temperature drifts, no calibration or auto zero function is required.

Dual-Slope Analog-to-Digital Converter Dual -Slope AD C operate on the princip le of integrating the unknown input and then comparing the integration times with a reference cycle. The The basic way is to use two slopes (dual) as in this diagram.

Fig 11.44 Dual-slope ADC

This circuit operates by switching in thr unknown input signal and then integrating for full scale number counts. During this cycle the reference is switched in and if the reference is of opposite polarity, the ramp will be driven back towards ground. The time that is takes for the ramp to again 357


reach the comparator threshold of ground will be directly proportional to the unknown input signal. Since the circuit uses the same time constant for the integrator, the component tolerances will be the same for both the integration and differentiation cycles. Therefore the errors will cancel except for the offset voltage that will be additive during both the cycles. The main benefits of this Type is the increased range, the increased accuracy and resolution, and the increased speed.

Programs and data need to be in main memory in order to be executed or referenced. Programs or data not needed immediately may be kept in off-line Secondary Storage until needed and then brought into the main memory for execution or reference. Secondary storage media such as Tape or disks are generally less costly than main storage and have much greater capacity. Main memory can generally be accessed much faster. From a hardware point of view the computer main memory is formed by a large number of basic units referred to as “memory cells.” Each memory cell is a device or an electronic circuit that has two or more stable states. In current practice, only two state devices are commonly available, each is capable of storing a binary digit, or in short bit. All computers have a basic, 640K memory allotment, this is referred to as conventional or base memory. Many applications can use this standard memory only. Such programs cannot utilize anything but the base memory even if your system has 128 MB of memory. The problem is that by the time you load start-up programs such as the operating system 358


(COMMAND.COM), mouse network drivers, and a disc cache, conventional memory may be reduced to 550 KB or less. The primary storage (also called main memory ) section is used for four purposes. Three of these relate to the data being processed.  

Data are fed into an input storage area where they are held until ready to be processed. A working storage space that‘s like a sheet of scratch pad is used to hold the data being processed and the intermediate results of such processing. An output storage area holds the finished results to the processing operations until they can be released. In addition to these data-related purposes, the primary storage section also contains a program storage area that holds the processing instructions.

The memory is organized into locations known as memory word. Each location has a unique address. The address of first location is zero. This is specified by all zero's in the address. The size of address (number of bits) depends on the capacity of the memory. If there are "n" address bits, it is possible to address the complete range of memory with 2 n memory locations. Internal memory of a modern computer is contained in silicon chips which are of two types:  

Read only memory (ROM) Random Access Memory (RAM)

RAM (RANDOM ACCESS MEMORY) RAMs are designed to act as short term memory, and therefore also known as volatile memory. A 359


RAM holds information which is needed for a particular operation. New information can be recorded, read and then rubbed out when no longer needed. But once the computer is switched off, a RAM forgets everything. RAM stands for Random Access Memory which means that the CPU can find each part of the memory straight away. This is similar to looking up a word in a dictionary. You can go straight to the word you want to look at, you don’t have to start at the beginning and read through the book until you reach the word. The CPU can find each part of the memory because each part is numbered. This number is called the address of the memory location. Whenever, you switch on the computer, it displays the memory check before loading operating system. This is done to check the RAM available so that accordingly, the programs may be stored in the computer. CPU can read from or write to " HIGH SPEED " memory. Memory is packaged in bank of 8/9 small chips or SIMM's . SIMM's are ( single in line memory module). There are different kinds of RAM's which are used in PC's.

Static RAM It is the simplest kind of memory. It is called " static' because entered data stays there in power up. They need six transistors for each bit storage location. SRAM is quite faster than Dynamic RAM. SRAM's are quite expensive and are very rarely used as main memory.



Dynamic RAM is a volatile ram i.e. data is stored temporarily. Each bits of single transistor and capacitor. DRAM based system requires refresh circuitry. Each bit has row address and column address.

EDO RAM ( extended data output ) It is a new type of memory being offered for Pentium systems. There are 72 pin SIMM's with specially manufactured chips that allow for timing overlap between successive accesses. This improves the performance of the RAM.

ROM CHIPS R O M s or R ea d o n l y M e m o r i es h o l d s e t s o f instructions which tell the microprocessor what to do. For instance, a ROM will tell the processor, how to recognize keys and which key is to be pressed and how to light up the screen. Information stored on a ROM can only be read, it cannot be rubbed out or added to. It is permanently built in computer at the time of its production and therefore also known as firmware. ROM also holds permanent data like trigonometric functions. Several variations of ROM are available:

PROM (Programmable ROM ) is called PROM. In this type of memory original program in ROM supplied by the manufacturer as an integral part of computer can be altered by the user slightly.

EPROM (Erasable Programmable ROM ) These are the PROMs which are erasable by a special process (e.g. by taking out the memory of the computer and subjecting to ultraviolet light) and 361


then written again as for a new PROM. The ultravoilet light is passed for around 6 to 40 minutes to erase the contents of ROM. For programming, electrical charge is trapped in an insulated gate region. The charge is retained for more than ten years because there is no leakage path.

EAROM (Electrically Alterable ROM) This is the same as EPROM but here erasing can be done by electrical means, so alteration is very easy. These are also known as EAPROM or electrically erasable PROMs(E 2 PROM). It can be erased and reprogrammed about ten thousand times. Both erasing and programming take about 4 to 10 ms.

RANDOM-ACCESS MEMORIES (RAM) A Memory Unit is a collection of storage cells together w i t h as soc i a t e d ci r c u i t s nee de d t o t r a n s f e r information in and out of storage.It Is an ordered sequence of storage cells, each capable of holding a piece of information. Each cell has its own unique address. The information held can be input data, computed values, or your program instructions. The memory unit stores binary information in groups of bits called words. A Word is an entity of bits that move in and out of storage as a unit. It may represent a number, an instruction code, characters, or any other binary-coded information. A word of eight bit is also called byte. Memory capacity is the total number of bytes that can be stored. Number of words and the number of bits in each word represent the internal structure of the memory.



Storage The location of any field, operand, or group of bytes in main storage is specified by the address of the left-most byte of the field. Byte locations are consecutively numbered, left to right, starting with 0; each number is considered the address of the corresponding byte. Thus, a fullword specified at location 1000 consists of bytes 1000, 1001, 1002, and 1003. Thus, if the addressing arrangement of a computers uses a 24-bit binary address, it will accommodate a maximum of 16,777,216 = (2 24)byte addresses. The length of any field in main storage is either implied by the operation to be performed or is stated explicitly as part of the instruction. When the length is implied, the information is said to have a fixed length, which can be either one, two, four, or eight bytes. When the length of a field is not implied by the operation, but is stated explicitly, the information is said to have a variable length which can vary in 1-byte increments from a minimum of one byte to a maximum of 256 bytes. Fixed-length fields, such as halfwords, fullwords, and double-words, must be aligned in main storage on an integral boundary commensurate with their length. For example, fullwords (four bytes) must be located in main storage so that the address of the left-most byte is a multiple of 4. A halfword must have an address that is a multiple of 2, and a double-word must have an address that is a multiple of 8. Variable-length fields are not limited to integral boundaries, and may start on any byte location. Data fields in main storage are commonly referred to as ‘cells’; whereas data fields in the CPU are kept in what are called ‘registers’. 363


Registers There are 16 general-purpose 32-bit registers for fixed-point operations, and four floating-point 64bit registers for floating-point operations. Additions, su bt r act ions, m ul ti pl icati ons, d ivi si ons, a nd comparisons can be performed upon one operand in a register and another operand either in a register or in main storage. For some purposes, a pair of general-purpose registers are treated as a single register of 64 bits. For communicating with the environment around it, memory unit has control lines, address selection lines, and data input and output lines. The control signal specify the storage or retrival of data, address lines, selects the data to be retrieved of the thousand words available, input lines provides provides the information to be stored in memory and the output lines supply the information coming out of memory. A block diagram of a memory unit is shown in following Fig.

Fig 11.45 Memory Unit

There are two control signals, called read and write. A write signal stores information, whereas a read signal retrives information. The write operation 364


transfers the address of the desired word to the address lines and also transfers the data bits (the word) to be stored in memory to the data input lines. It also activates the write control line by setting Read/Write to 0. On the other hand the Read operation transfers the address of the desired word to the address lines and activiates the Read control line by setting Read/Write to 1. On accepting one of the control signals, the internal control circuits inside the memory unit provide the desired function.

IC RAM IC RAM - Integerated Circuit Random Access Memory, can also have a single control line for read and write control. This could be done by assigning different binary state (0 or 1) to different operation (read/write). The RAM of m words with n bits per word will be containing of m x n storage cells. The binary storage cell is the basic building block of a memory unit. Here, we would try to explain the concept of main memory using J-K type flip-flop. It would be possible to make a (main) memory, or individual registers, from J-K type flip-flops using it with five other gates. The following figure provides the detail of such storage cell and its block diagram. Following figure shows the logic diagram for a four word three-bits memory system. It is instructive to understand how it works in principle, because all bigger chips operate similarly.



Fig 11.46 J-K type Flip-flop along with various gates

Fig 11.47 Logic diagram for four word three bit memory

Inputs Two address bits: A 0 , A 1 for 4 words. A single address refers to all 3-bits of a word; you cannot subdivide or access individual bits.

Outputs O 0 , O 1 , O 2 data out.

Operation Write

A 0 , A 1 are decoded on the appropriate row of 3-bits. I 0 is on the J-K input of of 366



all four bits (rows) of the first column; ditto I 1 and I 2 on columns 1 and 2 respectively. Thus writing is finished. A 0, A 1 a r e d e c o d e d t o s e l e c t t h e appropriate row (word). The output data are enabled onto the O i lines.

READ ONLY MEMORIES (ROM) A ROM is logically quite similar, except you cannot write it in the normal way; it is fixed during manufacture; or it written with special equipment PROM, Programmable ROM. ROM stays the same even when the power is off: it is non-volatile. Thus, a ROM is restricted to reading words that are permanently stored within the unit and there is no option to write words into ROM. Some people call it a code book, as a book has also a single writer and many non-writing readers. If you want to change a book, you have to write to the author to get it done. Similarly, if you want changes to a ROM, you have to ask for a new one.

Fig 11.48 Schematic diagram for ROM

Similar to RAM, an m x n ROM is an array of binary cells organized into m words of n bits each. For communicating with the environment around it, memory unit has address selection lines and data 367


output lines. The ROM does not need a read control line since at any given time, the output lines automatically provide the 1’s and 0’s of the n bits of the word selected by the address value. A block diagram of a memory unit is shown in following Fig. Thus, the ROM consists of two parts. In the first part, the n address lines are decoded into 2n row lines, each corresponding to the decimal value of the implied address. These address decoders are not actually implemented as a memory but, because their content is simply the complete table of all subsequent values, as specialized cells that fire when the applied address corresponds to the hardwired internal value. The second part contains the output function. For each of the m output variables their correspondence with the input table is given. For each presented address, the right row-line is fired to select the right output values. These values are then uniquely transported to the function outputs. Overall the memory plane will take (n+m).2n bit, though this amount can be severely reduced if dedicated address decoders are used. In fact a ROM can be constructed with decoders and a set of OR gates. There is no need for providing storage capabilities as in a RAM, since the values of the bits in the ROM are permanently fixed. Consider the logic diagram of a 4 by 3 ROM as depicted in following fig. The unit contains a 2 by 4 decoder to decode the two address lines. The OR gates provide the three outputs. If each minterm output of the decoder is connected to the input of each OR gate, the circuit outputs will all be 1 no matter what word is selected by the address lines.



Fig 11.49 Logic diagram for 4 by 3 ROM Suppose

we want the ROM to contain the bit combinations defined in the truth table. The truth table defines a bit combination of 010 for word 0 (D 0 ). This bit combination is obtained by breaking two wires (marked with a cross) between word 0 and the leftmost inputs of the OR gates. Thus, when the input address is 00, the D 0 output of the decoder is equal to 1 and all other outputs of the decoder are equal to 0. Only the OR gate associated with output B 0 receives an input of 1 because the other two wires are broken. Therefore, the output lines will provide an output A 0 B 0 C 0 =010. Similarly, all other wires marked with crosses indicate broken wires and when these wires are removed from the diagram, the logic diagram so obtained will implement the truth table listed for the ROM. To fabricate an IC ROM, mask programming is used. Each cell in a ROM incorporates a link that can be fused during the last fabrication process. A broken link in a cell defines one binary state and an unbroken link represents the other state. Using 369


mask programming, you can create a mask for the links to produce the 1’s and 0’s of each word required.

Fig 11.50 Truth Table

It the requirement is small, it is more convenient to use a programmable ROM, referred to as PROM. A fresh PROM contain all 0’s (or all 1’s ) in every word. Each cell in a PROM incorporates a link that can be fused by application of a high current pulse. A broken link in a cell defines one binary state and an unbroken link represents the other state. You can fuse the links to produce the required output, which is usually irreversible.



1. a)





Multiple Choice Questions The output of an 8-bit serial in - serial out shift register is connected back to its input. Assume the initial content of the shift register is 11000011. After 4 clock pulses, the content becomes: A. 11000011 B. 00001100 C. 00111100 D. 00001111 E. 11110000 The above operation could be produced by: A. a serial in - serial out shift register. B. a ring counter. C. a Johnson counter. D. a bidirectional shift register. E. none of the above. How many clock pulses are needed to shift a byte of data into and out of an eight-bit serial in - serial out shift register? A. 4. B. 8. C. 12. D. 16. E. none of the above. How many clock pulses are needed to shift a byte of data into and out of an eight-bit serial in - parallel out shift register? A. 4. B. 8. C. 12. D. 16. E. none of the above. The initial content of a 4-bit bidirectional shift register is 0011. The serial input contains 1100. After applying two clock pulses when the control line is set to shift-left mode, and then two clock pulses when the control line is 371






set to shift-right mode, the content of the register becomes: A. 0011 B. 1100 C. 1111 D. 0000 E. 1001 The initial content of a 4-bit bidirectional shift register is 0011. The serial input contains 1111. After applying two clock pulses when the control line is set to shift-left mode, and then two clock pulses when the control line is set to shift-right mode, the serial output contains: A. 0011 B. 1100 C. 1111 D. 0110 E. 1001 The binary number 100101 is serially shifted (LSB first) into a four-bit parallel out shift register that has an initial content of 1010. After 6 clock pulses, the content becomes: A. 1010 B. 1001 C. 0101 D. 0110 E. 1100 A three-bit up-down binary counter is in the down mode and in the 000 state. After 3 clock pulses, to what state does the counter go? A. 010 B. 011 C. 111 D. 110 E. 101 A four-bit up-down binary counter is in the up mode and in the 1101 state. After 4 clock pulses, to what state does the counter go? A. 1010 B. 1001 C. 0001 D. 0000 E. 1111 372





2. a)



d) e)


How many states does a modulus-12 counter have? A. 24. B. 12. C. 8. D. 6. E. 4. Decade counter is: A. a 10 bit counter. B. a mod-10 counter. C. a divide-by-10 counter. D. a counter with 10 states. E. an up-down counter. The current state of a decade counter is 1000. After 3 clock pulses, the state becomes: A. 1000 B. 1001 C. 1010 D. 1011 E. 0001 State Truw or False A serial in - parallel out shift register can be used as a serial in - serial out shift register, simply by getting the serial output from the right-most (LSB) flip-flop. The above operations are produced by a serial in - serial out shift register with a nondestructive readout capability. If a ring counter starts from an invalid state, the state will not change even clock pulses are applied. A n-bit ring counter has n distinct states. A serial in - serial out shift register can be used as a time delay device. The number of flip-flops used can alter the amount of time delay. All flip-flops in a synchronous counter are clocked simultaneously. 373



h) i)


4. 5.



The most important advantage of synchronous counters over asynchronous counters is that there is no cumulative time delay. A divide-by-4 counter is a mod-4 counter. A truncated sequence is a sequence that does not include all of the possible states of a counter. Draw the circuit diagram, and describe the operation of a shift register and a cyclic shift register State the major differences between RAM and ROM? Complete the following table about the typical characteristics of memories. Indicate your answer by putting “Yes” or “No” in the first, third and fourth column, and by selecting the appropriate construction technology for the second column.

Assume that a microprocessor has address lines A 00 ~ A 23 and data lines D 00 ~ D 15. (i) What is the maximum address space of this processor? (Express the results in bytes or MB). (ii) What is the effect of forcing the address bit A 00 to be always zero? (iii) At least how many read cycles are needed for this processor to fetch a long word of 4 bytes? Store numbers $FE, $00DC, $12AB, $41, $42 in the given order in the section of memory shown below to maximise the efficiency of 374



9. 10.


access for a machine that accesses a 16-bit word at a time. Address: $400400 $400401 $400402 $400403 $400404 $400405 $400406 $400407 $400408 Assume that a m i cropr oces sor i s by teaddressable and has 24 address lines A 00 ~ A 23. What address lines are required to span (i.e. address) each of the following memory blocks? A) 2 K Bytes B) 64 K Bytes C) 4 M Bytes D) 16 M Bytes How many 1M´4 bits RAM chips are needed to build a memory with a total size of 4M´16 bits? If a byte-addressable RAM occupies the hexadecimal addresses A000 to BFFF, then how many K Bytes of storage space is available? What is the difference between a register and a main memory word? What is the advantage of a computer with many registers over one with few registers?




Chapter 12


Microcomputer & Microprocessor Architecture A digital computer is a multipurpose, programmable machine that reads binary instructions from its memory, accepts binary data as input and processes data according to those instructions, and provides results as output. The physical components of the computer are called hardware. A set of instructions written for the computer to perform a task is called a program, and a group of programs is called software.

BINARY The computer recognizes and operates in binary digits, 0 and 1, also known as bits. A bit is the abbreviated form of the term binary digit. These digits are represented in terms of electrical voltages in the machine: generally, 0 represents one voltage level and 1 represents another. The digits 0 and 1 are also synonymous to low and high, respectively.

PROGRAMMABLE The computer is programmable; that is, it can be instructed to perform tasks within its capability. A toaster can be cited as an example of an elementary programmable machine. It can be programmed to remain on for a given time period by adjusting the setting to “light “ or “dark”. The toaster is designed to understand and execute one instruction given through a mechanical lever. On the other hand, digital computers are designed to understand and execute many binary instructions. A computer is a much more sophisticated machine than a toaster. It is a multipurpose machine that can be used to


perform sophisticated computing functions, as well as to perform such simple control tasks as turning devices on and off. One of the primary differences between a toaster and a computer is that a toaster executes only one function, and that function cannot be changed. On the other hand, the person using a computer can select appropriate instructions, and ask the computer to perform various tasks on a given set of data. The engineer who designs a toaster determines the timing for light and dark toast, and the manufacturer of the toaster provides the necessary instructions to operate the toaster. Similarly, the design engineers of a computer determine a set of tasks the computer should perform, and design the necessary logic circuits. The manufacturer of the computer provides the user with a list of the instructions the computer will understand. Typically, an instruction for adding two numbers may look like a group of eight binary digits, such as 1 0 0 0 0 0 0 1. These instructions are simply a pattern of 0s and 1s. Now, the question is; Where does one write those instructions and enter data? The answer is memory.

MEMORY Memory is like the page of a notebook with space for a fixed number of binary numbers on each line; howe ver, these pages are generally mad e of semiconductor material. Typically, each line has space for eight binary bits. In reality, a line is an 8 bit register that can store eight binary bits; several of these registers are arranged in a sequence called memory. These registers are always grouped together in powers of two. For example, a group of 1024 (2 10) 8 bit registers on a semiconductor chip is known as 1K byte of memory; 1K is the closest approximation in thousands. The user writes the necessary 379


instructions and data in memory, and asks the computer to perform the given task and find an answer. This statement raises several questions. How does one enter those instructions and data in the computer’s memory? And where does not look for the answer? The answers are input and output (I/O) devices.

INPUT/OUTPUT The user can enter instructions and data in memory through such devices as a keyboard or simple switches, which are called input devices. The computer reads the instructions from the memory a n d p r o ce ss e s t h e da t a ac co r d i n g t o t h o s e instructions. The result can be displayed in several ways, such as by seven segment LEDs (Light Emitting Diodes) or printed by a printer. These devices are called output devices. This still does not explain how and where the computer processes data. It processes data by using the group of logic circuits called its central Processing Unit (CPU).

THE CPU The central processing unit of the computer consists of various registers to store data, the arithmetic/ logic unit (ALU) to perform arithmetic and logical operations, instruction decoders, counters, and control lines. The CPU reads instructions from the memory and performs the tasks specified. The CPU communicates with input/output devices to accept on to send data. The input and output devices are known also as peripherals. The CPU is the primary and central player in communicating with various devices such as memory, input and output, however, the timing of the communication process is controlled by the group of circuits called the control unit. 380


The description of a computer given here is traditionally represented by the block diagram shown in following fig. The block diagram shows that the computer has five components. ALU, control unit, memory, input and output. The combination of the ALU and the control unit is known as the CPU. Before exploring the details of these components of the computer, we should examine what changes have occurred in semiconductor technology and how those changes have affected computers.

Fig 12.1 Schematic Diagram of Computer

Computer Technology In the last twenty five years, semiconductor technology has undergone unprecedented changes. Integrated circuits (ICs) appeared on the scene at the end of the 1950s, following the invention of the transistor. In an integrated circuit, an entire circuit consisting of several transistors, diodes, and resistors is contained on a single chip. In the early 1960s, logic gates known as the 7400 series were commonly available as ICs, and the technology of integrating the circuits of a logic gate on a single chip became known as Small Scale Integration (SSI). 381


As semiconductor technology advanced, more than a hundred gates were fabricated on one chip; this was called Medium Scale Integration (MSI). A typical example of MSI is a decade counter (7490). Within a few years, it was possible to fabricate more than a thousand gates on a single chip, this came to be known as Large Scale Integration (LSI). Now we are in the era of Very Large Scale Integration (VLSI) and Super Large Scale Integration (SLSI). The lines of demarcation between these different scales of integration are ill defined and arbitrary. As the technology moved from SSI to SLSI, the face of the computer changed. Initially computers were built with discrete logic gates (SSI). As more and more logic circuits were built on one chip using LSI technology, it became possible to build the whole CPU with its related timing function on a single chip. This came to be known as the microprocessor, and a computer built with a microprocessor is known as a microcomputer. This distinction may soon disappear, however, as the computing power of the microprocessor approaches that of the CPUs of the traditional large computers. Early microcomputers were built with a 4 bit microprocessor. Now a 64 bit microprocessor is being used in some prototype computers. Even if they are built with a microprocessor it is meaningless to classify them as microcomputers.

Microcomputer Organization Following fig shows a simplified but formal structure of a microcomputer. It includes four components: microprocessor, input output and memory (read write memory and read only memory). These components are organized around a common communication path called a bus. The entire group



of components is called a system or a microcomputer system while the components are called subsystems.

Fig 12.2 Microcomputer Organisation

At the outset, we will differentiate between the terms microprocessor and microcomputer because of the common misuse of these terms in popular literature. The microprocessor is one component of the m icrocom puter. On the other hand , the microcomputer is a complete computer similar to any other computer, except that the CPU functions of t h e mi cro co mpu ter are perf orm ed by t he microprocessor. Similarly the term peripheral is used for input/output devices, however, occasionally memory is also included in this term. The various components of the microcomputer shown in above fig and their functions are described in the following paragraphs.

The microprocessor is a semiconductor device consisting of electronic logic circuits manufactured by using either a large scale (LSI) or very large scale integration (VLSI) technique. The microprocessor is capable of performing computing functions and making decisions to change the sequence of program execution. In large computers, the CPU performs these computing functions and it is implemented on one or more circuit boards. The microprocessor is in 383


many ways similar to the CPU however the microprocessor includes all the logic circuitry (including the control unit) on one chip. For clarity, the microprocessor can be divided into three segments as shown in above fig arithmetic /logic unit (ALU) register unit and control unit.

ARITHMETIC /LOGIC UNIT In this area of the microprocessor, computing functions are performed on data. The ALU performs ari t h met ic op er at i ons su ch as a d di t io n and subtraction, and logic operations such as AND, OR and exclusive OR, Results are stored either in registers or in memory or sent to output devices.

REGISTER UNIT This area of the microprocessor consists of various registers. The registers are used primarily to store data temporarily during the execution of a program. Some of the registers are accessible to the user through instructions.

CONTROL UNIT The control unit provides the necessary timing and cont r ol sign al s t o all the oper a tio ns in t he microcomputer. It controls the flow of data between the microprocessor and peripherals (including memory). At present, microprocessors are available from many manufacturers. Examples of widely used microprocessors include the Intel 8080A and 8085, Zilog Z80, Motorola 6800 and 6809, and MOS Technology 6500 series. Microcomputers such as the Radio Shack TRS -80 and the Tele Video 802 are designed around the Z80 microprocessor. The design of the IBM Personal Computer is based on the Intel 384


8088 microprocessor. Single board microcomputers such as the Intel SDK -85 (See Figure 1.5) the Motorola MEK -6800-D2, and the Rockwell Aim 65 are commonly used in college laboratories. The SDK-85 is based on the 8085 microprocessor, the MEK 6800 D2 is based on the 6800 microprocessor, and the Aim 65 is based on the 6502 microprocessor.

INPUT The input section transfers data and instructions in binary from the outside world to the microprocessor. It includes devices such as keyboards, teletypes, and analog to digital converters. Typically, a microcomputer used in college laboratories includes either a hexadecimal keyboard or an ASCII keyboard as an input device. The hexadecimal keyboard has sixteen data keys ( 0 to 9 and A to F) and some additional function keys to perform operations such as storing data and executing programs. The ASCII keyboards is similar to a typewriter keyboard, and it is used to enter programs in an English like language. Although the ASCII keyboard is found in most microcomputers, single board microcomputers generally have a Hex keyboard.

OUTPUT The ou tput s ect io n t r ansf er s d ata fr om the microprocessor to output devices such as light emitting diodes (LEDs), cathode ray tubes (CRTs), printers, magnetic tape, or another computer. Typically single board computers include LEDs and seven segment LEDs as output devices.

MEMORY Memory stores binary information such as instructions and data, and provides that information to the microprocessor whenever necessary. To 385


exe cu te prog r ams, the micr opr o cesso r r e ads instructions and data from memory and performs the computing operations in its ALU section. Results are either transferred to the output section for display or stored in memory for later use. The memory block has two sections Read only Memory (ROM) and Read/Write Memory (R/WM) popularly known as Random Access Memory (RAM). The ROM is used to store programs that do not need alterations. The monitor program of a single board microcomputer is generally stored in the ROM. This program interprets the information entered through a keyboard and provides equivalent binary digits to the microprocessor. Programs stored in the ROM can only be read, they cannot be altered. The Read/Write memory (R/WM) is also known as user memory. It is used to store user programs and data. In single board microcomputers, in which instructions and data are entered through a Hex keyboard, the monitor program monitors the keys and stores those instructions and data in the R/W memory. The information stored in this memory can be read and altered easily.

SYSTEM BUS The system bus is a communication path between the microprocessor and the peripherals; it is nothing but a group of wires that carries bits. ( In fact, there are several buses in the system; we will discuss them in the next chapter.) The microcomputer bus is in many ways similar to a one track, express subway: the bus carries bits, just as the subway carries people. The analogy of an express subway with only one destination is more appropriate than that of a regular subway, because the microcomputer bus carries bits between the microprocessor and 386


only one peripheral at a time. The same bus is time shared to communicate with various peripherals, with the timing provided by the control section of the microprocessor.

HOW DOES THE MICROCOMPUTER WORK? Assume that a program and data are already entered in the R/W memory (writing and executing a program will be explained later). The program includes binary instructions to add given data and to display the answer at the seven segment LEDs. When the microcomputer is given a command to execute the program, it reads and executes one instruction at a time and finally sends the result to the seven segment LEDs for display This process of program execution can best be described by comparing it to the process of assembling a radio kit. The instructions for assembling the radio are printed on a sheet of paper in sequence. One reads the first instruction, then picks up the necessary components of the radio and performs the task. The sequence is this read, interpret, and perform. The microprocessor performs in the same way. The instructions are stored sequentially in the memory. The microprocessor fetches the first instruction from its memory sheet, decodes it, and executes that instruction. The sequence of fetch, d ec o d e , ar e e x e cu t e i s c o nt i n u e d u nt i l t h e microprocessor comes across the instruction, Stop. During the entire process, the microprocessor uses the system bus to fetch the binary instructions and data from the memory. It uses registers from the register section to store data temporarily, and it performs the computing function in the ALU section.



Finally, it sends out the result in binary using the same bus lines, to the seven segment LEDs.

The microprocessor is a programmable logic device, designed with registers, flip flops and timing e l e m e n t s . Th e m i cr o p r o c es s o r h a s a s e t o f instructions designed internally to manipulate data and communicate with peripherals. This process of data manipulation and communication is determined by the logic design of the microprocessor, called the architecture. The microprocessor can be programmed to perform functions on given data by selecting necessary instructions from its set. These instructions are given to the microprocessor by writing them into its memory. Writing (or entering ) instructions and data is done through an input device such as a keyboard. The microprocessor reads or transfers each instruction one at a time, matches it with its instruction set, and performs the data manipulation indicated by the instruction. The result can be stored in memory or sent to such output devices as LEDs or a CRT terminal. In addition, the microprocessor can respond to external signals. It can be interrupted reset, or asked to wait to synchronize with slower peripherals. All the various functions performed by the microprocessor can be classified in three general categories: 1. 2. 3.

Microprocessor initiated operations Internal data operations Peripheral (or externally ) initiated operations

To perform these functions, the microprocessor requires a group of logic circuits and a set of signals called control signals. However, early processors do not have the necessary circuitry on one chip; the 388


complete units are made up of more than one chip. Therefore, the term Micro Processing Unit (MPU) is defined here as a group of devices that can perform these functions with the necessary set of control signals. This term is similar to the term Central Processing Unit (CPU). However, later microprocessors include most of the necessary circuitry to perform these operations on a single chip. Therefore, the terms MPU and microprocessor often are used synonymously. The microprocessor functions listed above are explained here in relation to the 8085 or 8080A MPU. The explanation does not include either the details of the MPUs or the differences between the 8085 and 8080 A microprocessors. The devices necessary to make up the 8085 and the 8080A MPUs will be discussed in the next chapter.

8085 The 8085 contains two 16-bit register. The program counter (PC) contains the address of the memory location where the next instruction will be fetched from. Because the program counter is 16 bit wide, its range of addresses goes from 0000 to FFFF. This corresponds to 65,536 (2 raised to 16th power) different addresse. Thus, the 8085 is capable of accesing 64 KB of memory. Any one of these memory locations can be thought of as the contents of Register M (for memory). The 8085 automatically updates the contents of the program counter to ensure proper program executtion. The other 16 bit register is teh stack pointer(SP). The stack pointer is used to maintain the address of the area in memory commonly called a stack. The stack is used to store temporary value, such as subroutine return addresses. The 8085 uses the stack pointer to go to the correct memory location 389


when it need to read or write stack information. As it does in the 8088, the stack builds toward zero. As new items get stored on the stack the address in the stack pointer gets smaller. To prevent a stack from overwriting a program, the program is usually loaded into memory at a low starting address (usually the begining of usable RAM) with the stack pointer intialized to a much higher address ( near the end of RAM). One other register is available for limited use and testing by programmer, the flag register. Flags are 1-bit status indicators that show how conditions inside the 8085 have changed as a result of previous instruction execution. For example, if a decrement instruction (DCR B) reduces a number in a register (B) to zero, the zero flag is set. The flags are tested by certain instructions called conditional instructions. The following figure displays all the inputs and output signals used by 8085.

Fig 12.3 8085 Pinout diagram 390


Microprocessor Initiated Operations and 8085/8080A Bus Organization The MPU performs primarily four operations: 1. 2. 3. 4.

Memory Read: Reads data from memory. Memory Write: Writes data into memory. I/O Read: Accepts data from input devices. I/O Write: Sends data to output devices.

All these operations are part of the communication process between the MPu and peripheral devices ( i n c l u di n g m e m or y) t o co m m u n i c a t e w i t h a peripheral ( or a memory location), the MPU needs to perform the following steps: Step 1: Identify the peripheral or the memory location ( with its address). Step 2: Transfer data. Step 3: Provide timing or synchronization signals. The 8085/8080A MPU performs these functions using three sets of communication lines called buses: the address bus, the data bus, and the control bus, these buses are shown as one group, called the system bus.

ADDRESS BUS The address bus is a group of sixteen lines generally i den t if i ed a s A 0 t o A 15 . The add r e ss b us i s unidirectional: bits flow in one direction-from the MPU to peripheral devices. The MPU uses the address bus to perform the first function: identifying a peripheral or a memory location (Step 1). In a computer system each peripheral or memory location is identified with a binary number, called an address, and the address bus is used to carry a 16 bit address. This is similar to the postal address of a house. The number of a house can be identified 391


with various number schemes. For example, the forty fifth house in a lane can be identified with the two digit number 45, or with the four digit number 0045. The two digit numbering scheme can identify only a hundred houses, from 00 to 99. On the other hand, the four digit scheme can identify ten thousand houses, from 0000 to 9999. Similarly the number of address lines of the MPU determines its capacity to identify different memory locations (or peripherals). The 8085/8080A MPU with its sixteen address lines is capable of addressing 2 16 =65536 ( generally known as 64K) memory locations. 1K memory is determined by rounding off 1024 to the nearest thousand; similarly, 65536 is rounded off to 64000 as a multiple of 1 K. Most 8 bit microprocessors have sixteen address lines. This may explain why most microcomputer systems have 64K memory- however, not every microcomputer system has 64K memory. In fact, most single board microcomputers have memory less than 2K, even if the MPU is capable of addressing 64K memory. The number of address lines is arbitrary; it is determined by the designer of a microprocessor based on such considerations as availability of pins and intended applications of the processor. For example, the MOS Technology MCS 6515 microprocessor has twelve address lines and is capable of addressing 4K (2 12 =4096) memory. Another example is the Motorola 68000, which has 23 address lines.

DATA BUS The data bus is a group of eight lines used for data flow as shown in following figure. These lines are bidirectional data flow in both directions between the MPU and peripheral devices. The MPU uses the 392


data bus to perform the second function: transferring data (Step2). The eight data lines enable the MPU to manipulate 8-bit data ranging from 00 to FF ( 2 8 = 256 numbers). The largest number that can appear on the data bus is 11111111 (255 10). The data bus influences the m ic r opr ocesso r ar chi t ect ur e co ns id e ra b l y . I t determines the word length and the register size of a microprocessor thus the 8085/8080A microprocessor is called an 8-bit microprocessor. Microprocessors such as the Intel 8086, Zilog Z8000, and Motorola 68000 have sixteen data lines, thus they are known as 16 bit microprocessors.

Fig 12.4 Data Bus

AD0-AD7, A8-A15 The 16-bit address bus is contained in two groups in 8085. The upper half of the address bus is output by the processot as A8 through A15. The other half of the address bus is mixed with the 8-bit bidirectional data bus. The resulting combination is called AD0 through AD7. We commonly refer to this type of architecture as a miltiplexed address/data bus. During execution of a program there are times when AD0 through AD7 represent A0 through A7 393


(the lower half of the address bus), and times when they represent D0 through D7 (the bi-directional data bus). The use of the multiplexed bus reduces the number of connections that need to be made to the chip, but also unfortunately slows down program execution. Because address and data information can’t exist on the multiplexed bus at the same time.

ALE How does the external circuitry connected to the 8085 know when AD0-AD7 is an address bus and when it is a data bus? An additional signal, ALE, meaning address latch enable, is also output by the processor. When an ALE becomes active it is an indication to external circuitry that the lower address byte must be captured from AD0-AD7. Usually an 8bit latch is used to store the lower half of the address bus. When ALE is not active (when it is low), it is assumed that AD0-AD7 represent D0-D7.

CONTROL BUS The control bus is comprised of various single lines that carry synchronization signals. The MPU uses such lines to perform the third function : providing timing signals (Step 3). The term bus, in relation to the control signals, is somewhat confusing. These are individual lines that provide a pulse to indicate an MPU operation. The MPU generates specific control signals for every operation (such as Memory Read or I/O Write) it performs. These signals are used to identify a device type with which the MPU intends to communicate. To communicate with a memory -for example, to read an instruction from a memory location- the MPU places the 16 bit address on the address bus . The address on the bus is decoded by an external 394


logic circuit, which will be explained later, and the memory location is identified. The MPU sends a pulse called Memory Read as the control signal. The pulse activates the memory chip, and the contents of the memory location (8-bit data) are placed on the data bus and brought inside the microprocessor.

Fig 12.5 Address Bus

What happens to the data byte brought into the MPU depends on the internal architecture of the microprocessor.

Internal Data Operations and the 8085/8080A Registers The internal architecture of the 8085/8080A microprocessor determines how and what operations can be performed with the data. These operations are 1. 2. 3. 4. 5.

Store 8 bit data. Perform arithmetic and logical operations. Test for conditions. Sequence the execution of instructions. Store data temporarily during execution in the defined R/W memory locations called the stack. 395


To perform these operations, the microprocessor requires registers, an arithmetic logic unit (ALU) and control logic, and internal buses (paths for information flow). Following figure is a simplified representation of the 8085/8080A internal architecture it shows only those registers which are programmable, meaning those registers that can be used for data manipulation by writing instructions. These registers are described in reference to the five operations previously listed.

Fig 12.6

8085 Internal Architecture

REGISTERS The 8085/8080A has six general purpose registers to perform the first operation listed above that is to store 8 bit data during a program execution. These registers are identified as B, C, D, E, H, and L as shown in above fig. They can be combined as register pairs BC, DE, and HL to perform some 16 bit operations. These registers are programmable, meaning that a programmer can use them to load or transfer data from the registers by using instructions. For example, the instruction MOV B,C transfers the data from register C to register B. Conceptually the 396


registers can be viewed as memory locations, except they are built inside the microprocessor and identified by specific names. Some microprocessors do not have these types of registers, instead, they use memory space as their registers.

ACCUMULATOR The accumulator is an 8 bit register that is part of the arithmetic logic unit (ALU). This register is used to store 8 bit data and to perform arithmetic and logical operations. The result of an operation is stored in the accumulator. The accumulator is also identified as register A.

FLAGS The ALU includes five flip flops that are set or reset according to data conditions in the accumulator and other registers. The microprocessor uses them to perform the third operation namely testing for data conditions. For example, after an addition of two numbers, if the sum in the accumulator is larger than eight bits, the flip flop that is used to indicate a carry, called the carry flag (CY), is set to one. When an arithmetic operation results in zero, the flip flop called the Zero flag (Z) is set to one. The 8085/8080A has five flags to indicate five different types of data conditions. They are called Zero (Z), Carry (CY), Sign (S), Parity (P) and Auxiliary Carry (AC) flags. The most commonly used flags are zero and Carry; the others will be explained as necessary. Above fig shows an 8 bit register, called the flag register, adjacent to the accumulator. It is not really a register, five bit positions, out of eight, are used to store the outputs of the five flip flops. The flags are stored in the 8 bit register so that the programmer 397


can examine these flags (data conditions) by accessing the register through an instruction. In the instruction set the term PSW (Program Status Word) refers to the accumulator and the flag register. These flags have critical importance in the decision m a ki n g pr o ce s s o f t h e m i cr o p r o c e s s o r . T he conditions (set or reset) of the flags are tested through software instructions. For example the instruction JC (Jump on Carry ) is implemented to change the sequence of a program when the CY flag is set. The importance of the flags cannot be emphasized enough; they will be discussed again in applications of conditional jump instructions.

PROGRAM COUNTER (PC) This 16-bit register deals with the fourth operation, sequencing the execution of instructions. This register is a memory pointer. Memory locations have 16 bit address, and that is why this is a 16 bit register. The microprocessor uses this register to sequence the execution of instructions. The function of the program counter is to point to the memory address from which the next byte is to be fetched. When a byte (machine code) is being fetched the program counter is incremented by one to point to the next memory location.

STACK POINTER (SP) The stack pointer is also a 16 bit register used as a memory pointer, initially, it will be called the stack pointer register to emphasize that it is a register. It points to a memory location in R/W memory, called the stack. The beginning of the stack is defined by loading a 16 bit address in the stack pointer (register). 398


PERIPHERAL OR EXTERNALLY INITIATED OPERATIONS External devices (or signals) can initiate the following operations, for which individual pins on the microprocessor chip are assigned Reset, Interrupt, Ready, hold. Reset When the reset is activated, all internal operations are suspended and the program counter is cleared (it holds 0000 H). Now the program execution can again begin at the zero memory address. Interrupt The microprocessor can be interrupted from the normal execution of instructions and asked to execute some other instructions called service routine ( for example, emergency procedures). The microprocessor resumes its operation after completing the service routine. Ready The 8085/8080A has a pin called Ready. If the signal at this READY pin is low, the microprocessor enters into a Wait state. This signal is used primarily to synchronize slower peripherals with the microprocessor. Hold When the HOLD pin is activated by an external signal, the microprocessor relinquishes control of buses and allows the external peripheral to use them. For example, the HOLD signal is used in Direct Memory Access (DMA) data transfer. These operations are listed here to provide an overview of capabilities of the 8085/8080A. They will be discussed again in Part III, Interfacing Peripherals (I/Os) and Applications.



MEMORY Memory is an essential component of a microcomputer system. It stores binary instructions and data for the microprocessor. Two types of memory were identified in the last chapter. Read/ Write Memory (R/WM) and Read only Memory (ROM). The R/W Memory is made of registers, and each register has a group of flip flops that stores bits of information. The number of bits stored in a register is called a memory work: memory devices (chips) are available in various word sizes. The MPU can read from or write into this memory. The second type of memory, the ROM, stores information permanently in the form of diodes; a group of diodes can be viewed as a register. The MPU can only read information from the ROM; it cannot write into this memory. In a memory chip, all registers are arranged in a sequence and identified by binary numbers called memory addresses. The assignment of memory addresses to various registers in a memory chip and the process of communication between the MPU and the memory are described below. The following discussion is equally applicable to R/WM and ROM except for slight differences in Read Write control signals.

Memory Organization (R/W Memory) For an 8-bit microprocessor, memory is required to store eight bits of information as a group; thus the memory word length should be eight bits. To communicate with memory, the MPU should be able to 1. 2. 3.

Select the chip Identify the register Read from or write into the register 400


Following fig shows a hypothetical memory chip of eight registers with three address lines, one chip select (CS) line, one read write (R/W) line, and eight I/O lines. The MPU uses the CS line to select the chip, and the R/W line to control data flow. The registers are arranged sequentially and numbered 0002 to 1112. These numbers are called memory addresses, identifying each register as a memory location. To identify each register, the MPU would require three address lines to place eight different addresses from 0002 to 1112. The 8085/8080A MPU with its sixteen address lines is capable of identifying or addressing 65,536 (64K) such memory registers or locations.

Fig 12.7 Hypothical Memory Chip of eight register

The size of this hypothetical chip can be specified either as 8 byte, 8 x 8 bit, or 64 bit. A memory chip with 256 registers (or locations) with 4 I/O lines is specified as 256 x 4 bit or 1024 bit. For an 8 bit microprocessor, two such memory chips ( 256x 4) would be necessary to form the 8 bit memory word size resulting in 256 bytes of memory. To read from or write into a memory location , the microprocessor places the address (101) on the address bus. The decoder decodes the address and identifies the register. The control signal R/W 401


enables the I/O lines, and the data byte is either read from or stored in the memory location. The chip select CS line, also known as Chip Enable (CE), is necessary to select one particular memory chip from among several memory chips in a system. The 8085/8080A microprocessor has sixteen address lines, and this hypothetical chip requires only three address lines. The question of what to do with the other thirteen lines and the chip select (CS) line is still unresolved.

Memory Map Memory map is defined as the assignment of addresses to memory registers in various memory chips in a system. In a system based on the 8085/ 8080A microprocessor, the entire memory map can range from 0000H to FFFFH (2 16= 65,536). This memory map can be illustrated with an analogy of identical houses built in a sequence and their postal addresses or numbers. Let us assume that houses are given four digit decimal numbers, which will enable us to number ten thousand houses from 0000 to 9999. Since it is cumbersome to direct someone to houses with large numbers, the numbering scheme can be devised with the concept of a row or block. Each block will have a hundred houses to be numbered with the last two digits from 00 to 99. Similarly, the blocks are also identified by the first two decimal digits. For example, a house with the number 0247 is house number 47 in block 2. With this scheme all the houses in block 0 will be identified from 0000 to 0099, in block 20 from 2000 to 2099, and in block 99 from 9900 to 9999. This numbering scheme with four decimal digits is capable of giving addresses to ten thousand houses from 0000 to 9999 ( 100 blocks of 100 houses each). A new area under 402


development may have only two blocks completedblock 0 and block 20 the houses on these blocks can have addresses 0000 to 0099 and 2000 to 2099, even if other blocks are still empty. Let us also assume that all houses are identical and have eight rooms. The example of numbering the houses is directly applicable to assigning addresses to memory registers. In the binary number system, sixteen binary digits can have 65,536 (2 16 ) diff erent combinations. In the hexadecimal number system sixteen binary bits are equivalent to four Hex digits that can be used to assign addresses to 65, 536 memory registers from 0000H to FFFFH; however, it is easier to think in terms of two Hex digits than four Hex digits. Therefore, the concept of memory page, similar to the concept of block, can be devised as explained below. In a memory system memory registers can be conceptually organized in a group to be numbered with low order two hexadecimal digits, similar to the last two digits of the house address. With two Hex digits, 256 registers can be numbered from 00H to FFH; this is known as a page with 256 lines to read from or write on. Although the number FFH is equal to 255 the total number of lines is equal to 256 because the first line is numbered 0. Similarly, the high order (first) two Hex digits can be used to number the pages from 00H to FFH. For example the memory address 020FH represents line 15 (register) on page 2, the address 07FFH represent line 255 on page 7, and the address 1064H represents line 100 on page 16 ( 64H =100 10 and 10 H = 16 10). The total memory address will range from 0000H to FFFFH -256 pages with 256 lines each ( 256 x 256 = 65,536, known as 64K ). To complete the analogy, a line (register) is equivalent to a house a page is 403


equivalent to a block, and eight flip flops in a register are equivalent to eight rooms in a house. These concepts are further illustrated by the following example of a memory chip with 256 bytes of memory.

INPUT/OUTPUT (I/O) The remaining components of the microcomputer system are Input /Output devices. The MPU communicates with the “the outside world” through such devices. The MPU accepts binary data as input from devices such as keyboards or floppy disks, and sends data to output devices such as LEDs or printers. There are two different methods by which the MPU identifies and communicates with the I/O devices. These methods are known as Peripheral ( or Direct) I/O and Memory Mapped I/O. The methods differ in terms of the number of address lines used in identifing an I/O device the type of control lines used to enable the device, and the instructions used for data transfer. The 8085/8080A MPU can use either eight address lines or sixteen address lines to identify an I/O device, as discussed below.

IO/M As we have stated that the 8085 is capable of accessing 64K memory locations. More specifically, the 8085 can access 65,536 memory locations and 256 I/O ports. An I/O port is little different from a memory location from the standpoint of simply reading and writing to it. However, the hardware that makes an I/O port work different from the devices used to make a memory. Input port require buffers to gate input data onto data bus. Output ports require latches to store output data from the data bus.



The range of allowable memory addresses is 0000 to FFFF. The range of allowable port addresses is 00 to FF. Memory address 0078 is not the same as port address 78 even though the processor A0 through A7 to point to each of them. The 8085 has an unusual way of using its signals to do a couple of different things. To distinguish between the memory and port addresses that appear on A0-A7, the 8085 supplies IO/M signals. The name is short for inputoutput /memory and the operation is very simple. If the 8085 accessing a memory location, IO/M will be low. If the 8085 is accessing an IO port, IO/M will be high. This is a way of telling external circuitry to use A0-A7 differently when IO/M is high.

Peripheral or Direct I/O I n p e r i ph eral or di r ec t I /O ( a ls o k no w n a s accumulator I/O) two instructions ( IN and OUT) are used for data transfer. The MPU uses eight address lines to send the address of an I/O device. Recall the analogy of postal addresses. The eight address lines are capable of identifying 256 input devices and 256 output devices. The input and output devices are differentiated by the control signals I/O Read (IOR) and I/O Write (IOW). Thus, in this method, I/O addresses range from 00 to FF. These addresses are known as either I/O device addresses or I/O port numbers. The steps in communicating with an I/O device are similar to those in communicating with memory and can be summarized as follows: 1.


The MPU places an 8 bit device address on the address bus, which is decoded by the external decode logic. The MPU sends a control signal (I/O Read or I/O Write) and enables the I/O device. 405



Data are placed on the data bus for transfer.

Memory Mapped I/O In memory mapped I/O, the MPU uses sixteen address lines to identify an I/O device. This process is similar to communicating with a memory location. The memory mapped I/O technique uses the same control signals (MEMR or MEMW) and instruction as those of memory. The memory map (64K) is shared between memory and I/O devices. The MPU views these I/O devices as if they were memory locations. In such microprocessors as the Motorola 6800, there are no special I/O instructions; all I/ Os are part of the memory map.

RD & WR Now that we can access a memory or IO location, how do we read its data or write new data to it. The 8085 provides two additional signals for this purpose. RD(read) is used to read data into the processor. WR(write) is used to store the contents of the data bus in the selected location. Both signals are active when they are low. Normally, RD and WR are high, indicating that the 8085 is neither reading nor writing..

S0 and S1 Two status signals are output to the let external circuitry know what the 8085 is doing. S0 and S1 are used for this purpose. When S0 and S1 are both low, the processor is indicating that it has halted. S0 and S1 have three other status that signify read, write and fetch operation.

SOD A neat feature of 8085 is its SOD line. SOD stands for serial output data and is really a 1 bit output port. Having a 1-bit output port into the chip 406


eleminates the need for external circuitry to do the same thing. Turning a relay on and off, or flashing an LED can be easily accomplished with SOD.

CLKout, X1 and X2 CLKout is provided to assist in operating the external circuitry at the same speed as the processor. This is important when UARTs are used for serial data communication. The frequency of CLKout is exactly one-half of the frequency generated by a crystal connected to X1 and X2. For example, if a 4-MHz crystal is connected to X1 and X2, CLKout will be 2MHz. It is important to use a crystal to control the timing in any microprocessor. In the case of 8085, the internal rate at which the processor performs its functions is also one-half of the crystal frquency.

INSTRUCTION NAMING CONVENTIONS The mnemonics assigned to the instructions are designed to indicate the function of the instruction. The instruc-tions fall into the following functional categories:

Data Transfer Croup The data transfer instructions move data between registers or between memory and registers. MOV Move MVI Move Immediate LDA Load Accumulator Directly from Memory STA Store Accumulator Directly in Memory LHLD Load H & L Registers Directly from Memory SHLDStore H & L Registers Directly in Memory An ‘X’ in the name of a data transfer instruction implies that it deals with a register pair (16-bits); LXI

Load Register Pair with Immediate data 407


LDAX Load Accumulator from Address in Register Pair STAX Store Accumulator in Address in Register Pair XCHG Exchange H & L with D & E XTHL Exchange Top of Stack with H & L

Arithmetic Group The arithmetic instructions add, subtract, increment, or decrement data in registers or memory. ADD ADI ADC ACI SUB SUI SBB SBI INR DCR INX DCX DAD

Add to Accumulator Add Immediate Data to Accumulator Add to Accumulator Using Carry Flag Add Immediate data to Accumulator Using Carry Subtract from Accumulator Subtract Immediate Data from Accumulator Subtract from Accumulator Using Borrow (Carry) Flag Subtract Immediate from Accumulator Using Borrow (Carry) Flag Increment Specified Byte by One Decrement Specified Byte by One Increment Register Pair by One Decrement Register Pair by One Double Register Add; Add Content of Register, Pair to H & L Register Pair

Logical Group This group performs logical (Boolean) operations on data in registers and memory and on condition flags. The logical AND, OR, and Exclusive OR instructions enable you to set specific bits in the accumulator ON or OFF. 408


ANA Logical AND with Accumulator ANI L o g i c a l A N D w i t h A c c u m u l a t o r U s i n g Immediate Data ORA Logical OR with Accumulator OR Logical OR with Accumulator Using Immediate Data XRA Exclusive Logical OR with Accumulator XRI Exclusive OR Using Immediate Data The Compare instructions compare the content of an 8-bit value with the contents of the accumulator; CMP Compare CPI Compare Using Immediate Data The rotate instructions shift the contents of the accumulator one bit position to the left or right: RLC RRC RAL RAR

Rotate Rotate Rotate Rotate

Accumulator Left Accumulator Right Left Through Carry Right Through Carry

Complement and carry flag instructions CMA Complement Accumulator CMC Complement Carry Flag STC Set Carry Flag

Branch Group The branching instructions alter normal sequential program flow, either unconditionally or conditionally. The unconditional branching instructions are as follows: JMP Jump CALL Call RET Return



Conditional branching instructions examine the status of one of four condition flags to determine whether the specified branch is to be executed. The conditions that may be specified are as follows: NZ Z NC C PO PE P M

Not Zero (Z = 0) Zero (Z = 1) No Carry (C = 0) Carry (C = 1) Parity Odd (P = 0) Parity Even (P = 1) Plus (S = 0) Minus (S = 1)

Thus, the conditional branching instructions are specified as follows: Jumps C INC JZ JNZ JP JM JPE JP0



Returns (Carry) (No Carry) (Zero) (Not Zero) (Plus) (Minus) (Parity Even) (Parity Odd)

Two other instructions can affect a branch by replacing the contents or the program counter: PCHL Move H & L to Program Counter RST S p e c i a l R e s t a r t I n s t r u c t i o n U s e d w i t h Interrupts

Stack I/O, and Machine Control Instructions The following instructions affect the Stack and/or Stack Pointer: 410


PUSHPush Two bytes of Data onto the Stack POP Pop Two Bytes of Data off the Stack XTHL Exchange Top of Stack with H & L SPHL Move content of H & L to Stack Pointer The I/0 instructions are as follows: IN Initiate Input Operation OUT Initiate Output Operation The Machine Control instructions are as follows: EI DI HLT NOP

Enable Interrupt System Disable Interrupt System Halt No Operation

The 8255 Programmable Peripheral Interface (PPI) is a versatile and easy to construct circuit card the plugs into an available slot in your IBM PC. Such a card allows you to do both digital input and output (DIO) to your PC. For example, you may want to have your PC turn on a switch, or have a switch electronically activate your PC to execute a program. The 8255 has 3 8-bit TTL-compatiable I/O ports. Thus technically you could control up to 24 individual devices. The following are the main features of 8255 PPI: 

3 8-bit IO ports PA, PB, PC assigned to I/O addresses 60H, 61H and 62H and an 8-bit command register at port 63H. PA can be set for Modes 0, 1, 2. PB for 0,1 and PC for mode 0 and for BSR. Modes 1 and 2 are interrupt driven. PC has 2 4-bit parts: PC upper (PCU) and PC lower (PCL), each can be set independently for 411


   

I or O. Each PC bit can be set/reset individually in BSR mode. PA and PCU are Group A (GA) and PB and PCL are Group B (GB) Address/data bus must be externally demux’d. TTL compatible. Improved dc driving capability

Fig 12.8 Pinout Diagram of 8255

THEORY OF OPERATION The Base Address Our range of cards plug into any available 8 or 16bit slot (also known as an AT or ISA slot) on your PC’s motherboard, just like a sound card or disk drive controller card does. Your CPU (Central Processing Unit) communicates with cards by knowing the card’s address and sending data to it. By physically using jumpers on the card, we can assign a set of addresses to the card, then in 412


software, we can tell the CPU what these addresses are. The configuration tells the 8255 whether ports are input or output and even some strange arrangements called bi-directional and strobed, but these ‘funny’ modes go a little beyond the scope of this tutorial. The 8255 allows for three distinct operating modes (Modes 0, 1 and 2) as follows: 

 

Mode 0: Ports A and B operate as either inputs or outputs and Port C is divided into two 4-bit groups either of which can be operated as inputs or outputs Mode 1: Same as Mode 0 but Port C is used for handshaking and control Mode 2: Port A is bidirectional (both input and output) and Port C is used for handshaking. Port B is not used.

For most applications using this range of cards Mode 0 will be used.

Fig 12.9

Block diagram of 8255



Direct Memory Access (DMA) is a method of allowing data to be moved from one location to another in a computer without intervention from the central processor (CPU). The Direct Memory Access (DMA) is implemented in the ISA bus through the DMA controller. To make the early ISA devices simple and cheap the logic of the bus control and address generation was concentrated in the DMA controller. The simplest case is for the fairly intelligent devices. Like the bus master devices on PCI they can generate the bus cycles and memory addresses all by themselves. The only thing they really need from the DMA controller is bus arbitration. So for this purpose they pretend to be cascaded slave DMA controllers. The way that the DMA function is implemented varies between computer architectures, so this discussion will limit itself to the implementation and workings of the DMA subsystem on the IBM Personal Computer (PC), the IBM PC/AT and all of its successors and clones. The PC DMA subsystem is based on the Intel 8237 DMA controller. The 8237 contains four DMA channels that can be programmed independently and any of the channels may be active at any moment. These channels are numbered 0, 1, 2 and 3. Starting with the PC/AT, IBM added a second 8237 chip, and numbered those channels 4, 5, 6 and 7. The original DMA controller (0, 1, 2 and 3) moves one byte in each transfer. The second DMA controller (4, 5, 6, and 7) moves 16-bits in each transfer. The two controllers are identical and the difference in 414


transfer size is caused by the way the second controller is wired into the system. Steps involved in transferring a block of data from I/O devices (e.g. a disk) to memory:   

   

the CPU sends a signal to initiate a disk transfer through the I/O interface the CPU sends the starting address of the block the disk driver reads the starting address, and reads a block of data and puts it in its own buffer the disk driver sends a interrupt signal to the CPU the CPU reads the datum into its registers (accumulator) the CPU checks if there is more to transfer, if yes, the CPU signals the disk driver to do so meanwhile the CPU transfer the datum from register to memory and increments its pointer to memory The DMA controller takes care of the last few steps (from signaling disk to transfer)

Fig 12.10

Basic Operation of DMA

INTEL’S 8237 DMA CONTROLLER The main features of Inter 8237 DMA are as follows: 415


       

The 8237 has 4 independent I/O channels It has 27 registers, 7 of which are system-wide registers and 5 for each channels. out of 5 regs: 4 16-bit and 1 6-bit. they are 6-bit is the mode register DMA base address DMA current address DMA total DMA remaining

The PIC is a “Programmable Interrupt Controler” and is one of the important chips, without it, x86 would not be an interrupt driven architecture. There needs to be a way for perhiperals and other devices external of the CPU to tell the system than an event has happened or needs to happen. exampels of this; hard disk IO, modem/serial ports, keyboard. Without the PIC interface, you would have to poll all the devices in the system to see if they want to do anything (signal an event), but with the PIC, your system can run along nicely until such time that a device wants to signal an event, which means you dont waste time going to the devices, you let the devices come to you when they are ready. In the begining, the age of the IBM XT, we had only 1 PIC chip giving us 8 hardware interrupt lines, but the 8259A PIC chip has a neat abality, it can cascade. Cascading means you can daisy chain PIC chips together. This is what happened with the introduction of the IBM AT, we had a second PIC chip cascaded onto the first, giving us a total of 15 hardware lines... Why 15 and not 16? Thats because 416


when you cascade chips, the PIC needs to use one of the int lines to signal to the other chip. Thus, in an AT, IRQ line 2 is used to signal the second chip... But to confuse things more, IRQ 9 is redirectd to IRQ 2. So when you get an IRQ 9, the signal is redirected to IRQ 2. The following are the key features of PIC 8259       

  

8 levels of interrupts. Can be cascaded in master-slave configuration to handle 64 levels of interrupts. Internal priority resolver. Fixed priority mode and rotating priority mode. Individually maskable interrupts. Modes and masks can be changed dynamically. Accepts IRQ, determines priority, checks whether incoming priority > current level being serviced, issues interrupt signal. In 8085 mode, provides 3 byte CALL instruction. In 8086 mode, provides 8 bit vector number. Polled and vectored mode. Starting address of ISR or vector number is programmable. No clock required.

PINOUT OF 8259 Pin D0-D7

RD-bar WR-bar

Function Bi-directional, tristated, buffered data lines. Connected to data bus directly or through buffers Active low read control Active low write control 417


Fig 12.11 Pinout of 8259


Address input line, used to select control register CS-bar Active low chip select CAS0-2 Bi-directional, 3 bit cascade lines. In master mode, PIC places slave ID no. on these lines. In slave mode, the PIC reads slave ID no. from master on these lines. It may be regarded as slave-select. SP/EN-bar Slave program / enable. In non-buffered mode, it is SP-bar inp ut, used to distinguish master/slave PIC. In buffered mode, it is output line used to enable buffers INT Interrupt line, connected to INTR of microprocessor INTA-bar Interrupt ack, received active low from microprocessor IR0-7 Asynchronous IRQ input lines, generated by peripherals.



Fig 12.12

Block Diagram of 8259 PIC

DRAWBACK OF PIC PIC (8259) Hardware Is Slow The PIC interrupt controller has a built-in hardware priority scheme that is not appropriate for machines running operating systems based on Windows NT Technology. To address this problem, a different hardware priority scheme is used by the operating system. When the operating system raises or lowers IRQL, a new mask is written into the 8259 that enables only the interrupts allowed at this IRQL. Therefore, raising or lowering IRQL causes either two “out” instructions or software simulation of one sort or another. Each of these I/O instructions causes bus cycles that must make it all the way to the South Bridge and back.

PIC Hardware Can’t Do Multiple Processors The 8259 PIC is limited because it cannot be used in machines with multiple processors. 419


INTERRUPT SEQUENCE (SINGLE PIC) One or more of the IR lines goes high.  Corresponding IRR bit is set.  8259 evaluates the request and sends INT to CPU.  CPU sends INTA-bar.  Highest priority ISR is set. IRR is reset.  8259 releases CALL instruction on data bus.  CALL causes CPU to initiate two more INTAbar’s.  8259 releases the subroutine address, first lowbyte then highbyte.  ISR bit is reset depending on mode.

APIC APIC is a distributed set of devices that make up an interrupt controller. In current implementations, each part of a system is connected by an APIC bus. One part of the system, the “local APIC,” delivers interrupts to a specific processor; for example, a machine with three processors must have three local APICs. Intel has been building local APICs into their processors since the Pentium P54c in 1994. Computers built with genuine Intel processors already contain part of the APIC system. The other important part of the system is the I/O APIC. There can be as many as eight I/O APICs on a system; they collect interrupt signals from I/O devices and send messages to the local APICs when those devices need to interrupt. Each I/O APIC has an arbitrary number of interrupt inputs (or IRQs). Intel’s past and current I/O APICs typically have 24 inputs - others can have as many as 64. And some machines have several I/O APICs, each with a number of inputs, amounting to hundreds of IRQs 420


in the machine that are available for device interrupts. However, without an I/O APIC in the system, the local APICs are useless. APIC solves all the problems described earlier in this article. Interrupt latency can be drastically reduced by assigning a unique vector to each device. Operating systems can speed up all of their synchronization code. As an industry, we can in cr e ase debu g gabi li ty and sta bi li ty j us t by shortening the chains of ISRs.

8088 MICROPROCESSOR Specificaitons 8 bit data bus interface 16 bit internal architecture Direct addressing capability to IMB of memory Direct sofware compability wwith 8086 24 operand addressing mode 2 clock rates; 5 MKHz and 8MHz

80286 MICROPROCESSOR Specificaitons Address space 16MB physical, 1 GB virtual Integerated memory management Upward compatiability to 8088

80386 MICROPROCESSOR Specificaitons Flexible 32 bit microporcessor 8 general purpose 32 bit registers Ver large address space 4GB physical 64 Terabyte virtual 421


4GB maximum segment size Integrated management unit Virtual memory space Option on -chip paging 4 levels of protection Fully compatible with 80286 Pipelined instruction execution

INTEL 486 DX MICROPORCESSOR Specification Binary Compatible with Large Software Base MS DOS, OS/2, Windows, Unix System V/ 386, IRMX, IRMK, Krnels High Integratin Enables on-chip 8 Kbyte code and Data Cache Floating Point unit Paged, Virtual Memory Management Easy to Use Built-in self test Hardware Debugging Support Intel Software support Extensive Third Party Sofware Support IEEE 1149. I Boundary Scan Compatibility Availabe on 50 MHz Versions only 168 PinGrid Array Package High Performance Design RISC Integer Core with Requent instruction Executing in One clock 25 MHz, 33 MHz, and 50 MHz clock 80, 106, 160 Mbyte/sec Burst Bus CHMOS IV and CHMOS V process Technology Dynamic Bus Sizing for 8- 16- and 32 Bit Busses Complete 32 Bit Architecture 422


Address and Data Busses Registers

Fig 12.13 486 CPU clock diagram

8-16, and 32-Bit Data Types Multiprocessor Support Multiprocessor Instructions Cache Consistency Protocols Support for Second Level Cache

PENTIUM Microprocessor technology improves at such a rapid rate that new families of microprocessors are introduced evry two years or so. Each succeeding generation outperforms the previous one by tow or mor times, integrating features trhat were previously found in external support ciruits. We have grown to assume that each new generation of m microporcesor will offer significant increased in computing power and that computers built around them will continue to shrink in size. 423


For year computer designers have built supercomputer that use multiple microprocessors as a way to increase overall computing power in a single machine. This technique is called multiprocessing and has largely been left to the high end of the computer market. The complex support circuits needed to get more than one microprocessor to work together in a single computer is very expensive compared to the circuits used in a pc few computer users can justify the high cost associated with this type of machine. Pentium is Central Processing Unit which is the 5th generation device with excellent features introduced in March 1993. It packs 3.1 million transistors which is three times as many as the 486. The Pentium has several advanced technology and engineering innovations giving it the computing power to run the present-day sophisticated and tomorrow’s emerging applications. The 66MHz Pentium is a leap in number-crunching, chewing through 100 million instructions per second, twice as fast as the 486. The High Performance systems availabel today both leverage the strngths of the Processor and integrate other advanced features to provide the best performance from the local system.

Technology New technology brings with it new design challenges for the computer engineer. The Pentium processor is larger, faster, hotter and more complex than previous microprocessors used in desktop PCs. Based on the sub-micro Technology, Pentium is implemented in 0.8 BICMOST Technology. BICMOST Technology is nothing but advantage of two 424


technologies. That is bipolor’s speed and cmos’s low power conception. The Pentium processor incorporates state-of-the art design techniques, such as dual execution unit, superscalar architecture, an integrated floatingpoint unit, separate on chip code and write back data caches, a 64 bit data bus, and other features to significantly increase performance. The operating frequency of the improvd hus interface unit increased to 66 megahertz and a technique called superscaling is used, which allows two instructins to be executed at once. It has two separate execution units running in parallel that increase the number of instruction it’s able to execute each clock cycle. The result is a performance capability over 300 times faster than of the 8088 processor used in the first PC

Difference between 80X86 and Pentium

Type of Architecture CRISC (Mixed CISC & RISC) Thr e e m et a l l a yer i nt er co nnect i o ns b e t w e e n components inside the chip. Two version of Pentium 425


is introduced by Intel. One is 60 Mhz and 100 mips and another is 66 Mhz and 112 mips. The heart of the pentium processor is its supercalar design, built around two instruction pipelines (V and U pipelines) each of which capable of performing indepedently. This technology allows the Pentium processor to execute two integer instruction in a single clock cycle. Pentium dual pipelines execute intruction in five stages, Prefetch, Instruction decode, Address generator, Execute and write back. When an instruction passes from prefetch to instruction decode, the pipeline is free to begin another operation. The Pentium processor may issue two instructions at one, on to each of the pipelines, in an instructionpairing process. Both instructions must be simple, and the V pipeline always receives the next sequential instruction after the one issued to the U pipeline, Each pipelines has its own arithmetic logic unit, generation circuitry and interface to the data cache. While the Intel 486 microprocessor incorporated a single 8 KB cache, the Pentium processor features two 8 KB cache, one for instructions and another for data. The caches act as a temporary storage places for instructions and data obtained from slower main memory. Since it is likely that a system will reuse data, the caches accelerate performance.







5. 6.

Fill in the blanks : a) CPU acts as the ______ of the computer. b) CPU consists of _________, ___________ & _________. c) The resisters are located in _________. d) Bus is set of wires that connect _______ and ______together. e) The address bus carries the ___________, w h e r e a s t h e c o nt r o l b u s c a r r i e s _________ among various units of a computers. f) Microprocessor could be of three types _______, _____ & _____. g) RISC stands for ____________________. h) Segment registers, generate _________ when combined with another value called _______. State True or False : a) The ALU performs arithmetic operations as well as Logical operations. b) Accumulator is a part of RAM. c) There are four main types of data buses used in PCs. Differntiate among CISC, RISC and EPIC. Which of thenm is latest technology and what are the plus point of the latest technology above two others? Explain how the Stack operates in a typical 8085 CPU microprocessor system, using the pr i n c i pl e o f h a n dl i n g Su br o u t i ne s a n d Interrupts to illustrate your answer. Explain how Port (or I/O) mapping operates on an 8085 CPU system. With reference to the 8085 CPU: 427



7. 8.

Can an I/O port be assigned the address 124H ? Explain your answer. (b) Explain the process used by the 8085 in order that it can return from an interrupt. Explain how the hardware interrupts on the 8085 CPU operate. Carefully explain what stages are involved in ex ecu t i n g a s ubr out i n e CA L L a nd R E T instructions. Use diagrams to illustrate the use of the Stack and other elevant registers.