Architectures for computer vision: from algorithm to chip with Verilog [Online-ausg ed.] 9781118659182, 111865918X, 9781118659212, 111865921X

This book provides comprehensive coverage of 3D vision systems, from vision models and state-of-the-art algorithms to th

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Architectures for computer vision: from algorithm to chip with Verilog [Online-ausg ed.]
 9781118659182, 111865918X, 9781118659212, 111865921X

Table of contents :
Architectures for Computer Vision......Page 3
Contents......Page 7
About the Author......Page 13
Preface......Page 15
Part One Verilog HDL......Page 19
1.1 Computer Architectures for Vision......Page 21
1.2 Algorithms for Computer Vision......Page 24
1.3 Computing Devices for Vision......Page 25
1.4 Design Flow for Vision Architectures......Page 26
Problems......Page 27
References......Page 28
2.1 The Verilog System......Page 29
2.2 Hello, World!......Page 30
2.3 Modules and Ports......Page 32
2.5 Data Types and Operations......Page 35
2.6 Assignments......Page 38
2.7 Structural-Behavioral Design Elements......Page 40
2.8 Tasks and Functions......Page 43
2.9 Syntax Summary......Page 45
2.10 Simulation-Synthesis......Page 47
2.11 Verilog System Tasks and Functions......Page 48
2.12 Converting Vision Algorithms into Verilog HDL Codes......Page 51
2.13 Design Method for Vision Architecture......Page 54
2.14 Communication by Name Reference......Page 56
2.15 Synchronous Port Communication......Page 58
2.16 Asynchronous Port Communication......Page 62
2.17 Packing and Unpacking......Page 68
2.18 Module Control......Page 69
2.19 Procedural Block Control......Page 73
Problems......Page 79
References......Page 80
3.1 Image Processing System......Page 81
3.2 Taxonomy of Algorithms and Architectures......Page 82
3.3 Neighborhood Processor......Page 84
3.4 BPBP Processor......Page 86
3.5 DP Processor......Page 88
3.6 Forward and Backward Processors......Page 91
3.7 Frame Buffer and Image Memory......Page 92
3.8 Multidimensional Array......Page 94
3.9 Queue......Page 95
3.10 Stack......Page 97
3.11 Linear Systolic Array......Page 99
Problems......Page 105
References......Page 106
4 Verilog Vision Simulator......Page 107
4.1 Vision Simulator......Page 108
4.2 Image Format Conversion......Page 109
4.3 Line-based Vision Simulator Principle......Page 116
4.4 LVSIM Top Module......Page 118
4.5 LVSIM IO System......Page 120
4.6 LVSIM RAM and Processor......Page 123
4.7 Frame-based Vision Simulator Principle......Page 127
4.8 FVSIM Top Module......Page 129
4.9 FVSIM IO System......Page 130
4.10 FVSIM RAM and Processor......Page 134
4.11 OpenCV Interface......Page 140
Problems......Page 143
References......Page 146
Part Two Vision Principles......Page 147
5 Energy Function......Page 149
5.2 MRF Model......Page 150
5.3 Energy Function......Page 153
5.4 Energy Function Models......Page 154
5.5 Free Energy......Page 156
5.6 Inference Schemes......Page 157
5.7 Learning Methods......Page 159
5.8 Structure of the Energy Function......Page 160
5.9 Basic Energy Functions......Page 162
References......Page 165
6.1 Camera Systems......Page 169
6.2 Camera Matrices......Page 171
6.3 Camera Calibration......Page 174
6.4 Correspondence Geometry......Page 176
6.5 Camera Geometry......Page 180
6.6 Scene Geometry......Page 181
6.7 Rectification......Page 183
6.8 Appearance Models......Page 185
6.9 Fundamental Constraints......Page 187
6.10 Segment Constraints......Page 189
6.11 Constraints in Discrete Space......Page 190
6.12 Constraints in Frequency Space......Page 194
6.13 Basic Energy Functions......Page 197
References......Page 198
7 Motion and Vision Modules......Page 201
7.1 3D Motion......Page 202
7.2 Direct Motion Estimation......Page 205
7.3 Structure from Optical Flow......Page 206
7.4 Factorization Method......Page 209
7.5 Constraints on the Data Term......Page 210
7.7 The Prior Term......Page 215
7.8 Energy Minimization......Page 219
7.9 Binocular Motion......Page 221
7.11 Blur Diameter......Page 223
7.12 Blur Diameter and Disparity......Page 225
7.13 Surface Normal and Disparity......Page 226
7.14 Surface Normal and Blur Diameter......Page 227
7.15 Links between Vision Modules......Page 228
Problems......Page 230
References......Page 231
Part Three Vision Architectures......Page 235
8 Relaxation for Energy Minimization......Page 237
8.1 Euler–Lagrange Equation of the Energy Function......Page 238
8.2 Discrete Diffusion and Biharminic Operators......Page 242
8.3 SOR Equation......Page 243
8.4 Relaxation Equation......Page 244
8.5 Relaxation Graph......Page 249
8.6 Relaxation Machine......Page 252
8.7 Affine Graph......Page 254
8.8 Fast Relaxation Machine......Page 256
8.9 State Memory of Fast Relaxation Machine......Page 258
8.10 Comparison of Relaxation Machines......Page 260
Problems......Page 261
References......Page 262
9.1 DP for Energy Minimization......Page 265
9.2 N-best Parallel DP......Page 272
9.3 N-best Serial DP......Page 273
9.4 Extended DP......Page 274
9.5 Hidden Markov Model......Page 278
9.6 Inside-Outside Algorithm......Page 283
Problems......Page 291
References......Page 292
10 Belief Propagation and Graph Cuts for Energy Minimization......Page 295
10.1 Belief in MRF Factor System......Page 296
10.2 Belief in Pairwise MRF System......Page 298
10.3 BP in Discrete Space......Page 301
10.4 BP in Vector Space......Page 303
10.5 Flow Network for Energy Function......Page 306
10.6 Swap Move Algorithm......Page 309
10.7 Expansion Move Algorithm......Page 313
Problems......Page 317
References......Page 318
Part Four Verilog Design......Page 321
11.1 Euler–Lagrange Equation......Page 323
11.2 Discretization and Iteration......Page 325
11.3 Relaxation Algorithm for Stereo Matching......Page 326
11.5 Overall System......Page 327
11.6 IO Circuit......Page 330
11.7 Updation Circuit......Page 332
11.8 Circuit for the Data Term......Page 335
11.9 Circuit for the Differential......Page 337
11.10 Circuit for the Neighborhood......Page 338
11.11 Functions for Saturation Arithmetic......Page 339
11.12 Functions for Minimum Argument......Page 341
11.13 Simulation......Page 342
Problems......Page 343
References......Page 344
12.1 Search Space......Page 345
12.2 Line Processing......Page 348
12.3 Computational Space......Page 349
12.4 Energy Equations......Page 351
12.5 DP Algorithm......Page 352
12.6 Architecture......Page 355
12.7 Overall Scheme......Page 356
12.8 FIFO Buffer......Page 360
12.9 Reading and Writing......Page 362
12.10 Initialization......Page 363
12.11 Forward Pass......Page 365
12.12 Backward Pass......Page 370
12.13 Combinational Circuits......Page 371
12.14 Simulation......Page 373
References......Page 376
13.1 Search Space......Page 379
13.2 Systolic Transformation......Page 381
13.3 Fundamental Systolic Arrays......Page 383
13.4 Search Spaces of the Fundamental Systolic Arrays......Page 386
13.5 Systolic Algorithm......Page 389
13.6 Common Platform of the Circuits......Page 391
13.7 Forward Backward and Right Left Algorithm......Page 393
13.8 FBR and FBL Overall Scheme......Page 396
13.9 FBR and FBL FIFO Buffer......Page 402
13.10 FBR and FBL Reading and Writing......Page 405
13.11 FBR and FBL Preprocessing......Page 406
13.12 FBR and FBL Initialization......Page 407
13.13 FBR and FBL Forward Pass......Page 409
13.14 FBR and FBL Backward Pass......Page 412
13.15 FBR and FBL Simulation......Page 413
13.16 Backward Backward and Right Left Algorithm......Page 415
13.17 BBR and BBL Overall Scheme......Page 418
13.18 BBR and BBL Initialization......Page 424
13.19 BBR and BBL Forward Pass......Page 425
13.20 BBR and BBL Backward Pass......Page 428
13.21 BBR and BBL Simulation......Page 430
Problems......Page 432
References......Page 433
14 Belief Propagation for Stereo Matching......Page 435
14.1 Message Representation......Page 436
14.2 Window Processing......Page 438
14.3 BP Machine......Page 439
14.4 Overall System......Page 440
14.5 IO Circuit......Page 443
14.6 Sampling Circuit......Page 445
14.7 Circuit for the Data Term......Page 447
14.8 Circuit for the Input Belief Message Matrix......Page 449
14.9 Circuit for the Output Belief Message Matrix......Page 452
14.10 Circuit for the Updation of Message Matrix......Page 453
14.11 Circuit for the Disparity......Page 454
14.12 Saturation Arithmetic......Page 455
14.13 Smoothness......Page 457
14.14 Minimum Argument......Page 459
14.15 Simulation......Page 460
Problems......Page 461
References......Page 462
Index......Page 465
EULA......Page 469

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