A switching theory for bilateral nets of threshold elements

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A switching theory for bilateral nets of threshold elements

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DIGITAL COMPUTER LABORATORY UNLVEFSITY OF ILLINOIS lTFBANA, ILLINOIS

REPORT NO

153

A SWITCHING THEORY FOR BILATERAL NETS OF THRESHOLD ELEMENTS by William Donald Hrazer

October

11, 1963

( This work is being submitted in partial fulfillment of the requirements for Degree of Doctor of Philosophy in Electrical Engineering, August, 1963.)

ACKNOWLEOOMENTS The author is indebted to several people for various forms of assistance given during the preparation of this thesis.

The following, in

particular, deserve special mention� Professor David E. Muller; advisor, mentor, and oracle; with whom · it has been the author's privilege to be associated thes e pas t years, and to whom the author owes his continuing interest in switching theory. Drs. James Gibson and Robert O. Winder of R CA Laboratories ;

the

form.er for suggesting the probl em, and the latter for valuable suggestions given during preliminary investigations in th e summer of

1961.

Profess ors F. E. Hohn, R. Narasimhan, and S. Seshu of t he University of Illinois, and Dr. S. Arnarel of RCA Laboratories for critical reading of the preliminary results, and suggestions for extens ion thereof.

Members of the Com puter Theory Res earch Group at RCA Laboratories and the Staff of the Digital Computer Laboratory of the University of Illinois for

many helpful discussions. Professor T. A. Murrell for his services as chairman of the final examination committee.

Mrs . Phyllis Ols on whos e exceptional typing skill, good sense, and experience will be obvious in t he fonnat of the final draft. Elizabeth B. Frazer, the author's wife, for her encouragement over the past two years, and her sharp proofreader's eye over the past two weeks .

TABLE OF CONTENTS Page

1.

INTRODUCTION



0

1

D

1.1 Preface . 1.2 An Outline of Bistable Device Characteristics 1.3 Networks of Two-Terminal Bistable Devices . 1.4 Threshold Switching Functions .

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15 15 16 19 24

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PROPERTIES OF A FAMILY OF FUNCTIONS DESCRIBING BILATERAL THRESHOLD NETS

4.1 4.2 4.3



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SNYTHE SIS OF BILATERAL THRESHOLD SWITCHING NETS

5.1 5.2 5.3 5.4 5.5

Introduction . . Clocked Automata and Combinational Logic Realizability of Idempotent Automata The ( p7 2 Realization Scheme Generai Synthesis Techniques •

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27 27 28 29 31 39

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39 39 40 47 55 57 57 58



Summary Suggestions for Future Work .

BIBLIOGRAPHY





AFTERWORD

6 .1 6.2

27



Introduction . Conventional Threshold Logic . . A Family of Functions Characterizing Bilateral Threshold Nets . Pairwise Monotonicity Extensions of Pairwise Monotonicity .

4.4 4.5

6.





Introduction . Graph-Theoretic Properties The Cycling Theorem A Canonical Form Equilibrium States

.

5.

.

SOME GENERAL PROPERTIES

3.1 3.2 3.3 3.4 3.5 4.

6

A MATHEMATICAL MODEL FOR BILATERAL THRESHOLD NETS

2.1 Rationale 2.2 The Model . 2.3 State Behavior of the Model . 2.4 Speed Independence and Semi-Modularity 2.5 The Balance Condition . . . 2.6 Nets with Inputs 2.7 Analysis of Synchronous Nets 2.8 Analysis of Asynchronous Nets 3.

1 2 2 4





59

-iv-

TABLE OF CONTENTS (CONTINUED) Page APPEN DIX A

61



APPENDIX B

65

B.l B.2

65 67

Proof of Theorem 3.10 . Another Characterization of Equilibriwn States

APPENDIX C

.

.

68



-v-

A SWITCHING THEORY FOR BILATERAL NETS OF THRESHOLD ELEMENTS

William Donald Frazer, Ph.D. Department of Electrical Engineering University of Illinois, 1963 Extant theories of logical design conventionally make several assumptions regarding the characteristics of the logical elements used in forming networks; among the most fundamental of these is that of directivity of information flow.

This assumption has historical basis in the fact that

most of the devices used heretofore in the construction of logical elements have been three-terminal devices.

The growing number of two-terminal bistable

devices--networks of._which are basically nondirective with respect to information flow--has created new problems associated with the artificial imposition of directivity, and thus raised the question of

whether

one.might ptofitably revise

one's concepts of logical design to conform to the characteristics of such devices. It is the object of this thesis to initiate a theory of logical design for networks in which information is not constrained to flow in only one direction along a connection between devices. for a very general class of such "nets": 1.

vertex i and k

i

1

a

ij

connection between vertices i and j. i is defined by a function F[ =

-1 ( x A




=

a)

f and g have the s ame domain

b)

g has value (+l ) whe neve r f doe s

f if�

g

=>

f but f

f if:

g

::>

f and f

-:/:. ::>

g g

A switching function, f J is "t -monotonic " whe n, for every

pair of valuat ions V and W, on s ome common subset of t or les s variables we have :

-27-

-28-

or

Clearly, if y




l

3)

(f ) 3 w 2

::>

5)

(f ) 1 w

::>

3

( f >:-: , but 2 ) 2 w l

(f ) l w 2

=

( f )- ,. 1 w 2

( f )- ' but 4 ) 3 w 2

(f ) 2 w

=

(f � ; 2 3

(f

l �3 ;

3

- 33For some valuation, �' over input s , the conditions 1 ) and 4) yield

Proof :

the strict inequality :

(4.4) or

(4. 5 ) ( Note that condit ion 4 allows one t o choose the s ign of the a23 term at will in (4 .4) . ) In a s imilar fashion, 2 ) and 5 ) yield, for s ome valuation,

a,

over the inputs , the strict inequal ity :

or

(4 . 6 ) Now s ince f that

3

i s a thres hold funct ion, and hence one-monotonic , we know

::> ( f )( f 3 )w 3 w 1 1

Since f

3

and f

1

or

::> ( f ) ( f 3 )w 3 w 1 -

-

1

or both .

must be pairwise monoton ic, we know from 5 ) that

::> ( r ) Therefore, it remains only to check whether ( f )- 3 w 3 w l l . Suppose s o . Then, combining ) ( f or, equivalently whether ( f ) 3 w 3 w = 1 l this hypothes is with 3 ) , for s ome valuat ion, 5, over the inputs , we have : ::> ( f '="-= . ( f )w 3 w 3 l l

or

- 34 (4 . 7 )

Comb ining ( 4 . 5 ) and ( 4 . 6 ) �

(4 . 8 )

which contradi cts ( 4 . 7 ) .

Therefore

Extending this method of proof, we obtain the following corollary . Corollary : n

If

a bilateral threshold switching net , N, contains

v e r t i c e s 1, 2,

.

.

.

, n and connections such that :

··-

and

then :

This theorem and its corollary demonstrate what happens if one forces directivity of informat ion flow to oc cur in a net of this kind . a

One can build

chain of elements in which this takes place J but thi s chain cannot c�ose :on

- 35itself becaus e of the atten u at ion in the we ights of the connect ing branches indicated by ( 4 . 8 ) for the three-vertex net .

One thus loses what amount s to

logical fan-out by c reating such a s ituat ion . That it is pos s ible to construct a net with two vert ices which satisfy (f . ) 1

w.

J

::>

and

( f . )1 w. J

i s shown by the net of Fig . 8 .

Here w

(f. ) 1 w.

1

:J

( f . )J w.

1

+l .

(3)

Figure 8 The remaining question is :

What happens if one chooses to make

vertex 3 in Fig . 7 independent of vertex l? two vertices affe cted then? Theorem 4 . 6 :

The answer is found in the following theorem .

If a bilate ral threshold sw itching net, N, contains

three verti ce�

1,

2 , 3, and connections such that :

1) 3) 5) then :

(f ) 3 w

How is the relat ion between these

2

::::>

( f )-- , but 4 ) 3 w 2 ( f )- , 3 w1 .

- 36Proof :

As in theorem 4 . 5, we still have the relation ( 4 . 5 ) : (4. 5 )

Proceeding in the same fashion as before , we have , combining ( 3 ) and ( 5 ) , for some input valuation� � :

or

-P ( f ):-: There 1 w 3 3 Then, comb ining this hypothes is with

Now, by the result of theorem 4 . 4, we know that (f1 ) w fore , suppose



(2 ) above , we have , for some input valuat ion, u,

or ( 4 . 10 )

But ( 4 . 5 ) and ( 4 . 9 ) combine to yield ( 4 . 11 ) -P ( f ) But since f is 1 w 1 3 3 a threshold swit ching funct i on, and hence one-monotonic, we must have

which contradicts ( 4 . 10 ) .

The rEfore ( f ) 1 w

-

.

or both;

- 37 , and ( f ):-: /;> ( f ) , it must be the case that /;> ( f1 ):-: so, since ( f ) 1 w w 1 w 1 w 3 3 3 3

Again we have an obvious corollary : Corollary :

If a bilateral threshold swit ching net , N, conta:i:os

n�.;

ve rtices and connect ions such that

and =

( f )n w

1

Then : ( f )1 w n Theorems

·.

4 . 5 .' and 4 . 6 togethe r give an idea of the more subtle

ramifications of bilateral ity .

That something like these relat ions exi sts

becomes apparent all too quickly when one sets out to des ign bilateral thre shold net s, but the nature of the diffi culty is not clear .

It may at first s eem

surpri sing that no more direct extensi ons of the concept of pairwise monotonicity are pre sented .

An

effort to discover such relat ions was made , but met with no

succe s s , largely because of the difficulty in defining a funct ional relation between elements not directly connected .

-

38

-

It would at first seem the case that the se theorems impose very stringent limitations on the capabilit ies of such nets , but this turns out not to be the case .

In

fact, a surpris ingly large clas s of automata are realizable ,

as we shall demons trate in the next chapte r . Before we devote attention to the quest ion of real izability, however, we ment ion one last theorem concerning the family of funct ions ( 4 . 1 ) . Theorem 4 . 7 :

Let N be a bilateral maj ority switching net, and let the

family of functions ( 4 . 1 ) describing N be :

Then the net described by the set of equations

is real ized by the same topology as N with each branch of we ight g replaced by one with we ight -g . Proof :

For a maj ority netj we may wr ite

Complementing all branche s corre sponds to replac ing ( A ) by ( -A ); thus : n s = -F[ L. a z a ] l. i . j ij j J j =l j =n+l

n+p

n+p

d . = f i. ( s � 1 1



.

.

, sp j z1 ,







+

,z ) n

a. .s ] j j =n+l l J L.

5.

5.1

SYNTHES IS OF BILATERAL THRESHOLD SWITCHING NErS

Introduct ion No theory of swit ching for any class of logic networks would be in

any sense complete without a discus s ion of the problem of s ynthe s i s of a net­ work to meet a de sired need . sion are two :

The central quest ions ar is ing in such a discus­

( 1 ) What class of automata is reali zable ?

members of thi s class be reali zed?

and (2 )

How may

In sp ite of the impre ss ion of severe limita­

tion which may have been conveyed by theorems ( 3 . 4 ), (4 . 5 ) and ( 4 . 6 ) - -and which

will probably be re inforced by any attempt to des ign such nets - - it turns out that it is pos s ible to realize a large class of automata us ing bilateral threshold switching nets, albe it in somewhat devious fashion .

5 .2

Clocked Automata and Comb inat ional Logic We begin our discus sion of the synthe sis of net s with a limitat ion :

Note that by theorem 3 . 4, we cannot realize any automaton which requi res a clock, for we cannot build the clock . It was pointed out to the author some t ime ago by R . 0 . Winder that bilateral thre shold swit ching nets are capable of performing all combinational logic operations . 4.5

and

The scheme for demonstrat ing this i s suggested by theorems

4.6 ;

Theorem 5 . 1 :

Bilateral threshold switching nets can be used to pe rform

any combi nat ional logic operat ion . Proof :

Cons ider the element of Fig . 9 .

If k

=

2 , the state of the

element and the s ignal appearing on line c will be the Boolean "or " of the state s of the vertices at a and b, and will be independent of the state of the vertex at c .

Similarly, for k - 3 9-

=

4 , the state of the

- 40vertex will be the Boolean "and " of a and b . directive .

The element i s thus

Negat ion is available through the use of invert ing branches .

The extens ion of this technique to multiple input elements is obvious , and one can build another element to " drive " this one by merely doubling the value of the threshold and all branch we ights .

Thus one

can s imulate, element for element, any directed combinat ional net .

a 1

1----"""--

c

b

Figure 9

We have so far demonstrated the unreal izability of clocked automata and the realizability of all c ombinat ional logic .

We now c ome to cons ider what

class of sequential machines are realizable .

5.3

Realizability of Idempotent Automata We begin this section with a definition . Definit ion �

B An n idempotent " automaton [ ] is one wh ich cannot distinguish

the input sequence

t

II

a



a ii ( " a followed by a " ) from the input sequence

Numbers in parentheses indicate branch we ights .

II

a . II

-41Idempotent automata have been called by other names , most frequently " asynchronous " automata .

It will be demonstrated now that all su ch automata

can be realized using bilateral threshold switching nets exclus ively .

Two

scheme s will be given for achieving such real izati ons , the first most straight forward, the second often more _effic ient . For the first real ization s cheme , we require specification for the automaton in the form of a Moore state diagram .

[ 20 ]

We begin with the following

observations concerning the propert ies of a state i of such a diagram for an In this diagram, S . represents the s et of

idempotent automaton ( see Fig . 10 ) .

1

all input combinat ions which can caus e the automaton t o enter state i from s ome M . is the set of all input "memory " comb inations- - input combina-

other state .

1

t ions which will cause the automaton, once in state i, to remain there .

w. 1

repre sent s the set of all input combinations which can cause the net to leave s tate i and go to some other state . Now if Fig . 10 repre sents a state of an idempotent automaton as adverti sed, then we mus t have : M . :::> S . 1

(5 . 1 )

1

and M.

1

where :::> and

n

n

W.

1

=

¢

( 5 .2 )

de note set inclus ion and intersection, respect ive ly, and

¢

is the

empty set . We realize the s tate diagram topologi cally, inserting in the net for each s tate of the state diagram a configuration such as that shown in Fig . 11 . this figure, the branches w ith arrowheads are connected to inputs . f

s

In

The inputs

and f ( vertex C in the figure ) are defined as follows ( cf . Fig . 10 ) : w

- 42 -

.,.;



_,A�------------� "

____________

r



·_ .l---

_____....

___,)

_ _ _ _ _

y-

Bu to aux iliary vertex for

(2 )

(3) ( -1 )

pre c e d i ng state



b ranches ,

of we ie;ht

(2 )

a branche s , ea.ch of we ight

threshold

each

(3)

(1 )

typi c a.1. c onf igura­

=

(2r

?c )

1

+

:

I

t ion shown at top

(r ) f

'1'

s



w

branches,

of we ight

Figu.re

ll .

1\2� )

ea.ch

(2 )

Realization of State 1 of

Fig .

10

-

'Jo

3d - 2 �) b ran che s ,

of we ight



each

(3 )

I

� VJ I

-

44

-

By ( 5 . 2 ) : f w The inputs g

il

v

f

(5.3)

1

-

s

( po int A in the f igure ) w ill be explained later .

We shall now

outline the operat ion of the net : To beg in with, assume that all vertice s in the figure are in the state ( -1 ) , and that the automaton is in some state which can lead into state i . Now assume that an input s

.

.

lJ

E

S . oc curs ; the automaton should proceed into l

This state change will be manifested in the net by a change in the

state i .

state of vertex C and its aux iliary vertex, D . As sume� for the moment , that one of the vertices of the type A assumes the state ( +l ) . (3

-

that

The we ighted sum of the states observed by vertex B is now

2 � ) , so it be come s ( +l ) also . ff

w

=

+l by ( 5 . 3 ) .

Now s .

.

lJ

E

S. l

implies that f

s

=

+l and also

Since ve rtex E is in the state ( -1 ) and the branch

j o ining it to vertex C has negat ive we ight , the weighted sum of the states observed by ve rtex C is equal to ( +l ) and it, being a maj ority element, assume s the state ( +l ) also .

It will be noted that the state of vertex D is completely

determi ned by that of vertex C .

Its only funct ion i s to provide a hysteretic

behavior of the ir common state with respect to changes in the states of other ve rtice s adj acent to c, and to provide a means , through the other branche s inc ident to it, of transmitting information about the state of C to other vertices without affe cting the state of C .

t

nv"

Therefore, the state of vertex D becomes ( +l )

denotes Boolean disj unction and

n---- "

denotes negat ion .

-45als o .

We have now reached the po int where vertices B, C, and D, as well as

some vertex such as A, are all in the state (+ l )

.

Now the branches at F go to vert ices of the type A for each of the pos sible suc cessor states to i .

It was by means of s imilar branches that the

vertex of type A which init iated the present chain react ion was set to (+ l )

.

Next, asswne that the latter vertex of type A, that to the left of vertex C in

the figure , asswnes the state (-1 ) .

The me chan ism through which thi s change

take s place will become apparent in a moment . revert to ( -1 ) .

This causes the ve rtex B to

As long as the input is not a member of the set W . , the automaton will remain in state i .

l

This is clear be cause , unless the input is a member of W . ,

the sum of the two inputs f

s

and f w will be at least zero .

l

The we ighted swn of

the states observed by vertex C under this cond ition is thus at least ( 2r + 1 ) .

We have thus far shown that s

lJ .

.

E S . will set vertices C and D and any input l

not in the set W . will not re set C ( or D ) to ( - 1 ) . l

Next, suppos e that the input as swnes value w that w

lJ .

.

E S

x

lJ .

.

E W. . l

It will be noted

for some state x which can follow i in the state diagram

By

( 5 . 3 ) the swn of the inputs to ve rtex C is now equal to ( +l ) again, the conne c-

tions from D and E be ing the only ones having pos itive we ight .

The vertices

C and D thus remain in the state (+ l ) unt il vertex E changes to the same state .

Thi s will come about when the suc ce ssor state vert ices corresponding to C and D

have asswned the state (+ l ) .

The a branche s of we ight (+2 ) inc ident to vertex E

come from the points corresponding to G on each of the pos s ible next vertex

pairs ; thus when one of these pairs asswnes the state ( +l ) , exactly one of these

a branche s will be j o ining vertex E to a ve rtex in state (+ l )

.

Thus the we ighted

sum of states observed by E will be (3 - 2a ), and it will asswne the state (+ l )

also .

This " turns off " C, and subs e que ntly D, and st ill more subsequently the

vertex of type A which e nabled the successor state to be set .

-46We have thus reached the condition in which the succes sor state vertex and its auxiliary have been set and the pres ent state vertex has been reset

( to ( -1 ) ) , all in a semi-modular fashion . 1 We now come to the much-pos tponed explanation of the functions g

ij



Cons ider the s tate diagram segment shown in Fig . 12;:

1

Figure 12 .

Illus trat ion of the Need for the Functions g

ij

Now if we were to connect the vertex B as soc iated with state d in a realizat ion of the Fig . 11 type directly to the vertex s ince �

E

D

as soc iated with state a, then,

S , an input of � when the net was in state a would cause the setting d

of the vertices B, and subsequently of the both s tate f and s tate d .

C-D

vertex pairs, corresponding to

This could be prevented by forming at point 1 the

logical " and " of ( 1 ) the s ignal indicat ing that the net is in state a and

(2 ) the logical " or " of the s ignals which can caus e a trans it ion from state a to state d .

T

The latter function (2 ) is the g . . for thi s particular point, and lJ

Verif icat ion is left to the reader .

-47-

. the ind icate d logical Fig . 11 .

II

. an d F1 1 s .f onne d at a vertex o f the type 1 ab e11 e d A in •

One f inal remark is that it is be cause more than one input may well

be capable of caus i ng the same trans i t i on that the nwnbe rs are not necessa rily as large as

t

a

and t:3 of Fig . 11

and q.)l respectively "

The re remains one problem t o be cons idered i n thi s real i zat ion .

Note

that if a s tate di agram ha s any loops such as that shown in Fig . 13a, then one of the branche s

F

G

and one of t he branche s

of Fig . 11 wi ll ul timately i nfluence

the same vertex of type C of the same figure .

This could resul t in a failure

of the net to behave in the spe c i f i ed manne r and thus result in a non- e erri modular net .

'I'Ee s olut i on t o th is prob lem

diagram of Fig . 13a, that of Fig . 13b.)l in

is

to realize ins tead of

wb i ch

are equ ivalent .



state

s tates a1 and a2 and b1 and b 2

Thi s di scus s ion prove s the important theorem � Theorem 5 . 2 :

It is pos s ible t o cons tru� t any idempotent automaton

us ing bilateral threshold nets exclus ively . As an example of the applicat i on of the technique , a reali zat ion of the state diagram of .Fig . 1 3b i s shown in Fig " 14 .

In

this state d iagram,)>

there are no vertices correspond ing to tbose of the type A; B.)l or s ince none ar e nece ssary .

Although thi s

to Fig . 11, it nonetheless

make s

the net .

l imi t s

E

in Fig . 11 ,

the re s emblance of the example

i t much easier to vi sual i ze the operat i on of

To examine the operat i on of the net, assume that one of the four

state ve rtices and i t s auxiliary

are

i n the s � ate ( +l ) and t he othe rs are all

in state ( -1 ); operat i on from such a poirt on depend s upon the inpu t sequence .

5 . 4 The p 2

( f)

Beal i z.a t i on Scheme

Now that we havE shown that it i s pos s ible to c ons truct a net reali zing

any idempotent automaton,

it

tecomes meaningful to att empt to iJnprove the

-48-

10 £...2!



0 0

0 0 0 1 1 l

0 l l 0

ll

(a )

State Diagram

of

"F" Element

0 0 0 1 i. 0

0 0

q 4 l �

11

10

10

0 0 0 l 1 0

0 0 0 l l l

11

Equivalent State Diagram by Method of Section 5 . 3

Figure 13

Realized ·

&

&

l

(1 )

(- 1 ) (-1)

(l)

I

+:­ \0 I

(-1 )

(1 ) f

& Figure 14 .

Realization of State Diagram of

Fig . 13b

a

- 50technique employed in such a real izationo

Criteria for evaluati ng the relative

" goodness " of various reali zation s cheme s are normally expressed in terms of minimality- -or more accurately, economy- -although in some cases , reliability has be come the primary cons iderat ion o

One should als o give some cons iderat ion

to questions of what might be te rmed " des ignability " ; there should be a systematic method for achieving a 11good11 reali zation o

We need a good definition of what is

meant by a " realization o 11 Suppose that we have an automaton specification given in terms of a flow-table or state diagram o Definit ion :

A

" reali zat ion " of a given automaton specificat ion by

means of a bilateral threshold switching net i s any net which has state behavi or des cribed by a spe cification equivalent to that above ; that i s , we will at the pre sent stage disregard cons iderations of outputs . A

reasonable apprai sal of the me rit of a particular reali zation might be defined

as follows : Definit ion : and

r

Let � be the specif ication of an idempotent automaton

the set of all nets which realize � in the above sense .

for a reali zation

y1

number of branches o

E

r

Then

let n . be the number of vertices and � - the l l

Then the " cost " of

l. l

will be approximated by :

(5 .4)

and c are constant s called the " cost of the vertex " and 2 the " cost of a branch " respect ively .

where c

1

-51Under any definition of thi s kind , the reali zation schemes of s ect ion 5 . 3 will be costly, for it requi re s two informat ion storage vertices for each state .

Also a large number of inputs are re quired, and thus � will

be large als o .

The s cheme is of inte re st, however , in that it demonstrates i n

a clear and conclus ive manner the reali zability of all idempotent automata .

In

thi s section, we present an alternative re ali zat ion techni que - -one which conforms more closely to clas s ical methods of directed log i � design .

This method can

s ometimes be more economi cal than the previous one in the sense of ( 5 . 4 ), but uses the same hysteres i s -pair configurat i on for memo ry . The alternat ive s cheme is dep i cted in Fig . 15 . of the net is contained in the hys tere s i s ·- pairs

C-D

The central memory

through

!I-J,

p

in number .

Assume for the moment that p i s even; then the bas ic idea of operat i on of the net is that each of the stable states will htve an equal number of ( +l ) and ( - 1 ) states among the memory pairs .

The number of such states available for ass ign­

ment to the vertices of the state diagram is thus ( 72) p

restriction in the as signments of the s e states , however :

.t

There is a further the state as s ignment

made to each state must differ from that made to each of its ne ighbors in the states of exactly two memory elements . uti lize all

Thi s means that one cannot always

�7 ) states , and a discuss ion of this que s t ion later in thi s 2

chapter will culmi nate in the proof of theorem

5.4

,

furthe r de tailing the

re qu irements for realization . To understand the operat ion of the ne t of Fig . 15 , as sume fi rst that the net i s in a stable s tate .

Then ex actly half of the memory vertex pairs

are in the state ( +l ) , and half are in the state ( - 1 ) .

Note that each of the

auxiliary vertices - -thos e of type D and T - - i s conne cted by means of a branch

t ( pJ� denotes the number of combinat ions of p items taken p/2 at a time . U N I V ERSITY Of

gll

(2 ) )

f ran aux iliary

&



eleme nt

4

p-1 branche s , each of we ight

(+l ) threshold

typical at top

{

(. 1 )

p-1 branche s , ea.ch of we ight ( +l ) typical at bottom �

=

2r + 1

=

(2 r

- 4 (p - l ) - 3)

- 4p

(2 {p - l ) ( -2 (p - l )

I I



V\ I'\)

(2 )

I

�, (p-1) -

{p-1 )

b ranche s , each of we ight

element

1)

each of weight

( -2 )

other pair .

&

&

{ _.., ,_,_ ,

Pigure 15 .

�7�

,.

2 to

for each other pair; also,

I

Realization Scheme

a

type B

(p-1 )

branches , .

to a type A element for ea.ch

-

53

-

of we ight ( -2 ) to a vertex of t ype A as sociated with each of the ( p

-

1)

remaining elements , and s imilarly by means of a branch of we ight (+2 ) to a

ve rtex of type B as sociated with ��ch of the ( p - 1 ) remaining elements " inputs f and f s erve �uch the same funct ion as the input s M N

r8

and f in W

. . of Fig o ll a . . are s i�ilar in funct ion to g 1J Fig " ll J and g . . and h lJ 1J

idea of operation is th is :

The

The bas ic

When an input change oc cur s which re qui re s that the

ne t change state .ll the state change take s place in two phases "

In the first

phase, the appropriate C-D vertex pair changes from state ( +l ) to ( - 1 ); in the se cond phase J the othe r appropriate C-D vertex pair changes from s tate ( -1 ) to

( +l ) .ll completing the trans ition .

Spe cifically, in e quilibrium.ll the s tate of

each C- type vertex is susta ined by its aux iliary} for .ll although the range of

values whi ch the inputs may as sume is ( -2r ) to (+2r ), the vert ices of type E and F associated with each C-D pair normally disagree in state "

The E-type

vertices are normally i n the state ( -1 ) and the F- type ( +l ) . When an input occurs in conj unction with the proper combinat ion of

( -1 ) state s to require a state change.ll however3 the F vertex as soc iated with the C-D pair whi ch must change from ( +l ) to ( - 1 ) assumes the s tate ( -l ) o corre spond ing E vertex remains ( -1 ) and the i nputs f thus the we ighted sum of states obse rved by the

C

Mi

The

and f go to ( - 1 ); Ni

ve r tex is ( -1 ) and it change s

s tate, causing the as soc iated D vertex to follow sui t "

This marks the end of

the first phase of the trans it ion; at th i s point, ( p/ .?. + l ) elements are in the state ( -1 ), and the remaining l p /2

-

1 ) elements in the state ( + 1 ) "

When the proper comb ination of (p/2 + l ) elements in s tate ( -1 ) occurs in conj unction with the above input combinat ion , the appropr iate

E

vertex

associated with that C-D pai r which mus t change from ( -1 ) to ( +l ) assume s the s tate ( +l ) o

The correspond ing

F

vertex remains � +l ) and the input s f

-

Mi

and f

go to ( +l ) ; thus the we ighted sum of s tate s obse rved by tte C vertex is ( +l )

Ni

- 54and it changes state, caus ing the as soc iated D vertex to follow suit, and completing the trans ition . To s wnrnarize, the F vert ices remain in the

( +l )

state unles s the

re quired input occurs in conjunction with the proper set of

( p/2 )

states ( -1 ) .

Similarly, the E vertices remain in the ( -1 ) state unles s the required input occurs in conjunct ion with the proper set of

( p/2

( p/2 )

always take place in the s ame order, going from s tates ( -1 ) , then back to

( p/2 )

states ( -1 ) .

+ 1 ) states ( -1 ) . states ( -1 ) to

Trans it ions

( p/2

+

1)

This real ization sc.heme can be

altered to include the case in which p is not even by appropriate adjustment of thresholds and we ights . As mentioned previously, it may not be pos s ible to realize an arb itrary state diagram of n states with a number of memory element pairs p which is minimal in the sense that

(p/2)

is the smalles t integer greater than

A bound on the number of memory elements required i s specified

or equal to n . by Theorem 5 . 3 . Definition :

For a dire cted linear graph

G

without parallel branches ,

define the " image graph " to be the nondirected graph, from

G

1)

G' ,

derived

by applicat ion of the following operations : Replace each

( directed )

element of

G

with a nondire cted

element . 2)

Eliminate all s lings . 1

3)

Replace any pair of parallel branches resulting from 1 ) with a s ingle branch .

1

Branches which begin and terminate on the same vertex .

- 55 Let. S be the state diagram of an idempotent automaton

Theorem 5 . 3 :

and let S ' be the image graph of S . of the

�/�

(1 )

y

0

Then S is real izable by means

reali zation s cheme with p � ma.x (x , y ) where 0 0

=

smallest integer y such that

nodes of S ( or S ' ) .

(2 )

x

0

=

smalle st integer x such that

�7� �

number of

(� )2 � degree

of

each vertex in S ' . Proof :

The ne ces s ity of the re qui rement ( 1 ) is clear; we have thus

only to worry about the si tuation which might ar ise if the degree of one or more vertices were too great to allow the number y to 0 determine p .

We observe that what we really require is that the

graph S ' be imbeddable in the subgraph of the x- cube cons i sting of pre cisely those vert ices wh ich have x/

2

will be true when x is chosen such that

nonzero components .

(2 )

Th is

is sati sfied, for

( � )2

is the degree of each vertex in the subcube . We make me ntion at this point of a practi cal note . -

In the cas e of

-

both of these reali zation schemes , we have made use of verti ces of arbitrarily large degree .

The assumpt ion that such ex ists i s i n one s ense unrealistic, in

that circuit element tolerance s will normally restrict the degree of ve rtices . This doe s not make such reali zat ions impo s s ible , howeve r, for one might construct nets of vert ices of les ser degree which s imulate the behavior of a vertex or group of vertices of larger degree , and replace the latter by the e quivalent net in a reali zation. 5.5

General Synthe s i s Techniques The observant reader will have not iced that both of the real ization

techniques outl ined so far are bas ically of a direct ive nature .

The trick of

- 56forming hysteretic pai rs has enabled us to achieve memory in nets , as well as limited directivityj and we have relied heavily on these in both s chemes .

One

might well ask why no scheme i s presented which relies more on the inherent lack of directivity of bilateral threshold switching net s - -one wh ich would go from state to state in a completely deterministic but nonobvious fashion o

This

problem has been cons idered at length, but no sat is facto ry solut ion has been found, nor, it is feltj is one l ikely to be found in the immediate future . In

order to achieve a systematic synthesis procedure based on, for

example j the matrix analys is technique of Chapter 2, we might require that

D

of

equation ( 3 o 2 ) be the next state for any state and input, and that the network be semi -modular .

Thus for each s tate of the s tate diagram, we would have a set

of relations like ( 3 . 2 ) o Bl

The problem at first seems the refore to res emble the

. 1 11 . 1 . bl e as s1gnmen . t pro blem o f async hronous sequent 1a secondary var 1a c 1ass 1ca

switching ci rcuit theory o

In the latter, however, one v s two main concerns are

economy and elimination of " critical races u "

In

the pres ent instance , one must

f ind a solut ion to a very large sy.3 tem of s imultaneous li near inequalit ies as well .

The re are some state as s ignment s which are impos s ible in the sense that

they result in inconsis tant ine qualities .

In other words, the threshold character

of the network functi ons limit s the po ss ible state assignment s in a manner as yet undete rmined o

The problem is in essence a general izat ion of the problem of

characteri zing the set of all functions reali zable by a s i ngle threshold element - -a problem which itself i s as yet incompletely unde rstood .

For these

reasons , the search for such general techniques was , for the present, abandoned after considerable effort o

6 6.1

o

AFTEFWORD

Summary An

effort has been made in this paper to pres ent a theory of swi tchi ng

for networks of two- terminal b i stable devices .

A model has been propos ed i n

Chapte r 2 for what seems the mos t reas onable forrn for suc h ne tworks � and an analysi s procedure based on this model developed - -also in Chapter

2o

In

Chapter 3, several propert ies of such net s were demons trated - - includ ing the

critical property of proceeding uniformly t o e quilibr ium- -and a canonical form The ques t i on of tte number of stable state s w� ich might be pos s e s s ed

developed o

by such a ne t was also cons idered) and an atterr.pt was made to find a bound on this number . Next, we cons idered characteri z ing the behavior of such nets in a manne r more familiar to de s igners of convent ional logi c , and we re able thus to begin to charac te rize the elus i ve trfan-out 11 pror,erty wh ich plagues from the very start any attempt to use convent ional logical des ign te chniques on nets of this type .

It was he re also that, through development of the property of

"

.

.

pairwise

monotoni c ity, 11 some insight was gained i nto the relat ionship between tte b ilateral nature of the connecti ons between elements and the mono tonic nature of the s tate functions .

The prope rties demonstrated up to th is poin t did not bode well for

any hopes of meaningful logi c capab ility, and the reali zat i on that one cannot realize any automaton re qui ri ng a c lock d i d no tting to disrel the gloom o section 5 . 3, howeve r, it w&s demonstrated that

the

In

set of all asyncr ronous

machine s are real izable , and in sec t ion 5 4, a firs t attempt was made to find a reali zat ion which would be i n s ome sense economical o To summar i ze the summary} we bave a model J an analys i s 1 rocedure , a canoni cal form} a handful of important propert ies , and two synthe s i s s chemes .

- 57 -

- 5 86.2

Sugge stions for Future Work To attempt to detail areas for fruitful future invest igat ion is in

one sense ludicrous , because one can proceed in virtually any direct ion he des ire s .

Some attempt should be · made to build nets of this kind, to see how

well the theory will predict re sults .

Further inve st igations into the propert ies

of the family of functions discus sed in Chapter 4 could well shed more light on logical de sign techniques , and pe rhaps provide a bas is for a technique of the type discussed in section 5 . 5 .

Another approach which appears promis ing but

has so far yielded few re sult s i s that of cons idering ( A� - �) as an affine transformat ion of the n- cube . state s has yet to be found .

Finally, a good bound on the number of stab�e

BIBLIOGRAPHY 1.

Arden, D . N. , " Delayed Logic and Finite State Machine s " ; Proc . First and Se cond Ann . Symp . SCTLD; AIEE Pub . S- 134; Sept . , 1961; pp . 133-151 .

2.

Bartky, W . S . , and Muller, D . E . ; " An Illiac Program for Simulat ing the Behavior of Asynchronous Circuits and Det ect ing Undes irable Race Conditions " ; pres ented at ACM Nat ional Mtg . ; June, 1957 .

3.

Berge , C . , Theorie des Graphes et ses Appl ications ; Pari s : English Ed . - -New York : John Wiley and Sons, Inc . , 1962 .

4.

Cadden, W . J . , 11Equivalent Se quent ial Circuit s 11; IRE : pp . 30- 34; (March, 1959 ) .

5.

Caldwell, S . H . , Switching Circuits and Logical Des ign; New York : Wiley and Sons, Inc . , 1958 .

6.

Cameron, S . H . , "An Est imate of the Complex ity Re qu i s ite in a Univer sal Dec is ion Network11 ; WADD Tech . Rep . 60- 600; March, 1961; pp . 197-212 .

7.

Crane , H . D . , " On the Complete Log ic Capability and Realizability of Trigger- Coupled Neuristors " ; Stanford Re s . Inst . , Proj ect No . 3286 Interim Rep . No . 4; July, 1961 .

8.

Elgot, C . C . , and Rutledge, J . D. , " Operat ions on Finite Automata " ( Extended Summary ) ; Proc . First and Second Ann . Symp . SCTLD; AIEE Pub . S-134; Sept . , 1961; pp . 129-132 .

9.

Fan, K . , " On Systems of Linear Ine qualities vi; in Linear Inequalit ies and Related Systems ; Kuhn, H . W . , and Tuckeri A " W . , eds . ; Princeton : Princ eton Univ . Pres s, Ann . Math . Studies , No . 38, 1956 .

Dunod, 1958 .

PGCT; CT-6, 1, John

I

10 .

Frazer, W . D . , " A Preliminary Inve stigat ion of the Propert ies of Switching Networks of Bilateral Elements " ; ( Unpublished ) RCA Laboratories , Internal· Memorandum, 1961 .

11 .

Ginsburg, S . , "Examples of Abstrac t Machines wi ; IRE : pp . 1)2-135 ; ( April, 1962 ) .

12 .

Goto, E . , et al . , " Esaki Diode High-Speed Logical Circuits 11 ; IRE : EC-9, 1, pp . 25 -29; (Marc h, 1960 ) .

13 .

K"onig, D. , Theorie der Endl ichen und Unendlichen Graphen; New York : 1950 .

14 .

Kuhn, H . W . , " Solvab ility and Consistency for Linear Equat ions. and Ine qualities " ; Amer . Math . Monthly, 63, 4, pp . 217-232, (April, 1956 ) .

15 .

Kunihiro, T . , " Applications of Tunnel Diodes in Switching Circuits " ; Univ . of Illinois , Digital Computer Lab . Rep . No . 102 ; Oct . , 1960 .

- 59-

PGEC; EC-11, 2 , PGEC, Chelsea,

-6016 0

Landauer, R o , " Irrevers ibility and Heat Generation in the Comput ing Process " ; IBM J o Res o and Dev o , .2_, 3, pp . 183-191, ( July, 1961 ) .

17 0

Lewin, Mo Ho , "Negative Res i stance Elements as Digital Computer Component s " ; Proc o EJCC, pp . 15 -27, Dec . , 1959 .

18 .

Lo, A . W . , "some Thoughts on Digital Components and Circuit Techniques " ; IRE : PGEC, EC-10, 3, PP o 416-425, ( Sept a , 1961 ) .

19 .

Minsky, M . L . , " Some Universal Elements for Finite Automata " ; in Automata Studies ; Shanno n, C . E . , and McCarthy, J . , eds . ; Princeton : Pri nceton Univ. Press, Ann . Math . Studies , No a 34, 1956 .

20 0

Moore, E . F . , "Gedanken Experiments on Se quential Ma.chines"; in Automata Studies; Shannon, C . E . , and Mc Carthy, J . , eds . ; Princeton : Princeton Univ . Press, Ann . Math a Studies , No a 34, 1956 .

21 .

Moser, J . K. 1 " Bistable Systems of Differential Equat ions with Applications to Tunnel Diode Circuits "; _ IBM Journ . Res . and Dev . , 5 , 3, pp . 226-240, ( July, 1961 ) .

22 .

Muller, D o E a , and Bartky, W . S a , " A Theory of Asynchronous Circuits " ; Proc o Int . Symp . on Theory of Switching; Cambridge : Harvard Univ . Press, 1959; pp . 204-243 .

230

Muroga, s . , " Functional Fonns of Dual- Comparable Functions and a Necessary and Sufficient Condition for Realizability of a Maj ority Function " ( Revisedl Revis ion of paper in Proc . First and Second Ann . Symp . SCTLD; AIEE Pub . S-134; Sept . , 1961, pp . 39-46 .

24 .

Onyshkevych, L o S . 1 et al . , " Parametric Phase-Locked Os cillator- ­ Characteristics and Applications to Digital Systems " ; IRE : PGEC, EC-8, 3, pp . 277-286; ( Sept . , 1959 ) .

25 .

Paull, M. C . , "Review of 4 Pape rs in Threshold Logic "; IRE : 3, pp . 541- 542 ; ( Sept . , 1961 ) 0

26 .

Ringel, G . , F"arbungsprobleme auf Flachen und Graphen; Berl in : Verlag Gewissens chaften, 1960 .

27 .

Seshu, S . and Reed, M. B . , Linear Graphs and Electrical Networks ; Reading, Mas s . : Addison Wes ley Pub o Co o , Inc . , 1961 .

28 .

Unger, S . Ho , " Hazards and Delays in Asynchronous Sequent ial Switching Circuits "; IRE : PGCT, CT-6, 11 pp . 12 -25; ( March, 1959 ) .

29 .

Whitney, H . , " On the Abstract Propert ies of Linear Dependence "; Amer . J . Math . , LVII, PP o 509-5 331 ( 1933 ) .

30 .

Winder, R .

31 .

Winder, R . o . , " Characterizing Threshold Funct ions " ( Review of 6 papers in threshold logic ) ; IRE : PGEC, EC- 11, 5, pp . 717-718; ( Oct . , 1962 ) .

O.,

PGEC, EC- 10, Deutsche

"Threshold Logic "; Ph o D . Thes is , Princeton Univers ity, 1962 .

APPENDIX AN EXAMPLE OF

THE

A

MATRIX ANALYSIS TECHNIQUE

Cons ider the net shown in Fig . 16 :

-1

Input +l

Notes :

1) 2) 3)

4)

All thresholds zero .

All branche s of we ight + indi cated o

1

unle ss othe rwise

Numbers bes ide vertices indicate mat rix order .

Shaded vertices have init ial state +l . Figure 16

The matrix A for this net is :

-61-

- 1;

others ,

-62-

A =

0

1

0

0

1

0

0

0

1

0

1

0

1

1

0

0

0

0

2

0

0

1

0

1

0

0

0

0

1

0

0

1

1

0

-1

0

0

0

0

0

1

0

0

-1

0

-1

0

0

1

1

0

0

0

0

-1

0

1

1

0

0

0

0

0

0

0

1

0

1

0

1

0

0

0

0

0

1

1

0

0

1

The vector � i s, init ially : 1 1 1 -1 z =

1 1 -1 -1 1 -1

Us ing the relat ion F[�] = .Q, we find that : 1 1 1 1 D =

1 -1 -1 -1

-63From thi s , we can see that vert ices 4 and

6

are exc ited in the init ial state .

It may als o be verified that Q is an equ ilibrilUTl state .

Thus as a synchronous

machine with an external clock s ignal, the net make s but one state trans ition . As an asynchronous machine , on the other hand, the net can enter e ither of two addit ional states from the init ial state; vertex 4 alone , or vertex

6

alone may

change . In these cases, the corresponding states would be :

Z' -4

=

1 1 1 1 -1 -1 -1 -1

1 1 1 1 1 1 -1 -1

z1

=



1 1 1 -1 1 -1 -1 -1

� =

1 1 1 1 1 -1 -1 -1

Note that the latter case leads again to the same equi librilllTl stat e , for only vertex 4 remains excited .

In the former case, vert ices 5 and

6

are excited .

Allowing these verti ces t o change individually, we find that the corresponding states are :

�46

=

1 1 1 1 1 -1 -1 -1

1 1 1 1 D -4 6 = 1 -1 -1 -1

z4v

5

=

1 1 1 1 -1 1 -1 -1

D4 - 5

=

1 1 1 1 -1 -1 -1 -1

- 64 Now we have a violation of semi -modularity, for vertex 5 has pas sed from excitation to equilibrium without changing when vertex 6 was allowed to change alone ( compare �4 and �4 ) . 6 Vertex 6 is st ill exc ited in the latter case; s o we allow it to change and find that the result ing states are :

.

:

�4 56

=

1

1

1

1

1

1

1 -1

�4 56

=

1 1

-1

-1

-1

-1

-1

-1

Therefore this change sequence leads also to the same equilibrium state . This net is an example of a speed- independent but not semi -modular net in which the balance condition never oc curs .

The fi nal state will be that

given by _I> regardless of the order of change impos ed upon the excited vertices, but one sequence of changes - -notably 4 , 6- - causes a violation of the semi ­ modularity condit ion .

APPENDIX B B.l

Proof of Theorem 3 . 10 We cons ide r only autonomous canonical nets , for the que stion of stable states has meaning only with respe ct to constant input, and the inputs may then be regarded as part of the constant s ources The rows of A for such a net may

as soc iated with the canonical net .

be looked on as a set of vectors , a . , in Euclidean n+2 space having -1

the following properties � 1)

The set of n vectors is not necessarily l inearly independent .

.:: )

2)

The first ve ctor must lie in the x 1 the se cond in the x

3)

2

=

=

0 hyperplane ,

0 hyperplane , etc .

For all i f j , i , j � n, the x . component of the ith J

vector must e qual the x . component of the j th ve ctor . l

4)

The lengths of all vectors are the same .

The fourth constraint , stemming from the regularity of the canonical net, implie s that the loc i of poss ible cho ices for the ve ctors , a . , -1

are hypers quares in each of the zero-coordinate planes . In like manner, the 2

n

pos s ible states of the network may be

looked on as vectors from the origin in n-space to each of the vertices of the cube of s ide 2 centered at the origin . one of these state s having z choose A s o that

1

=

Now suppose we choos e

+l and try to determi ne how then to

1)

The net w ill have the chos en state as an equilibrium state

2)

The net will have a maximum number of additional e quilibrium

and

states .

-6 5-

-66We note that for a canonical net, equat ion ( 3 o 3 ) becomes

F[ A�]

=

Z'

The proces s of matrix mult iplication thus corresponds to forming the dot product of the total state vector ( including pos it ions for the constant sources ) with each, in turn, of the row vectors of A . A stable state i s one for which, for each of these mult ipl ications, the cosine of the included angle has the same s ign as the corresponding component of the state vector .

Now to go back to our chosen

equil ibrium state . In the x

=

1

0 hyperplane lie the proj ections of the 2

states; there are 2

n- 1

n

pos s ible

of these and we can list them :

0

-1

-1

-1

-1

0

-1

-1

-1

1

0

-1

-1

1

-1

0

1

1

1

1

2

n-1

vectors

We now des ire to pick an � which will maximize cond it ion ( 2 ) above , l subj ect to condition ( 1 ) .

Now vertex 1 will be in equilibrium in the

state ( +l ) whenever the rest of the ve rtices of the net are in any state who se proj ection makes an angle of 90 tion of � in the x l 1 ve ctors .

=

0 hyperplane .

°

or les s with the proj ec­

There are at most 2

Because of theorem r 3 . 8 ) however, at most 2

can be equilibrium states .

such

of these

By the o.r.efn. . 3 . 9, however, each corres-

ponds to two equilibrium state s . states is bounded above by 2

n- 3

n-2

Therefore the number of equilibrium

n-2 •



-6 7The interested reader is invited to try to extend this argument and thus improve the bound .

B.2

Another Charac teri zation of Equilibr ium States Another approach to �he quest ion of count ing the number of pos s ible

e quilibrium states is this .

Recall the equation for an equilibrium state : F[A

0

(X, B ) )

( Here A has been augmented t o be s quare ) . A



(Xi B )

=

(X, B )

This is equivalent to ; =

� (X, B )

where Q . i s a diagonal matr ix with finite pos it ive entries . 1

Now Q . is nonl

s ingular , so we have

We therefore des ire to know how many unit e igenvalues we can have as Q. ranges over all pos s ible Q o l

The s et o f such Q i s finite because each row

entry of Q . is bounded by the maximum degree of a ve rtex o l

APPENDIX C

SUPPLEMENT

TO PROOF OF THEOREM

3.7

We wish to show that � group of states such as exist o

and V must always

T, U1

To s ee that this i s so, cons ider the follow ing argument x Suppose we have a speed-dependent net

N

which can proceed from

initial state I to any one of seve ral equilibrium states , E , 1 know that each of E1 ,







, E is acce ssible from t

13







;

E . t

Now we

and that none of E1 1

is accessible from any other, s ince all are equilibrium states .

As

an

E t

Q · ·�

indicated in

the main body of the proof, the s ingle - vertex-change sequence diagram must be a Has se diagram s ince no state can repeat . Now cons ider an arb itrary equilibrium state E acces sible from some set of states a = (a , i1







,a

ik

).

.

1



Such a state is

Cons ider a member, a

of this set; either some other equilibrium state is ac ces s ible from If

so, then a . corresponds to 1q

leading from a ·

iq

T,

E

i

to

u,

at q

iq



or not .

and the first state i n any sequence

t o an equilibrium state other than E

If no equilibrium state other than E

i

i

corresponds to V of

F15 .

4.

is acces s ible from any of the

members of a, then cons ider the set � = ( � , • • • , � ) of state s via which members i1 iP of a are accessible from I .

Again we apply the same argument; either some

equilibrium state other than E . is ac cess ible from same member of � or not . 1

s o, then the appropr iate � .

ll

corresponds to

T,

the appropriate a . to 1j

as;ain, the first state in any sequence leading from �

ix

state, to V.

If

If

U, and, ,

to another equilibrium

not , then we consider the set of states from which members of

� are access ible . t

l

It is worthwhile to not e that while the intersection of the sets a and � need not be empty, any � - , as above , may not be a member of a . lX

-68-

-69Now the state sequences are

all finite and nonrepetit ive,

equilibrium states are acces sible from I .

Therefore, we must,

if

and

all

we proceed in

this manne r, eventually find some first set, � ' of states in this sequence w ith the property that more than one equilibrium state is access ible from some member � iz of this set .

In this case, �

iz

T,

any state adj acent to �

iz

and

via which the net can reach

�-

and via which the net can reac h any other equilibrium state corresponds to V.

1Z

E1

corre sponds to

corresponds to U, and any state adj acent to

Since E . was chosen arb it rar ily, this argument applies to each of l